2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/acpica/acpi_cpu.c,v 1.72 2008/04/12 12:06:00 rpaulo Exp $
31 #include <sys/param.h>
33 #include <sys/kernel.h>
34 #include <sys/malloc.h>
35 #include <sys/globaldata.h>
36 #include <sys/power.h>
39 #include <sys/thread2.h>
40 #include <sys/serialize.h>
41 #include <sys/msgport2.h>
42 #include <sys/microtime_pcpu.h>
44 #include <bus/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/globaldata.h>
47 #include <machine/md_var.h>
48 #include <machine/smp.h>
51 #include <net/netisr2.h>
52 #include <net/netmsg2.h>
53 #include <net/if_var.h>
58 #include "acpi_cpu_cstate.h"
61 * Support for ACPI Processor devices, including C[1-3+] sleep states.
64 /* Hooks for the ACPICA debugging infrastructure */
65 #define _COMPONENT ACPI_PROCESSOR
66 ACPI_MODULE_NAME("PROCESSOR")
68 struct netmsg_acpi_cst {
69 struct netmsg_base base;
70 struct acpi_cst_softc *sc;
74 #define MAX_CX_STATES 8
76 struct acpi_cst_softc {
78 struct acpi_cpu_softc *cst_parent;
79 ACPI_HANDLE cst_handle;
81 uint32_t cst_flags; /* ACPI_CST_FLAG_ */
82 uint32_t cst_p_blk; /* ACPI P_BLK location */
83 uint32_t cst_p_blk_len; /* P_BLK length (must be 6). */
84 struct acpi_cst_cx cst_cx_states[MAX_CX_STATES];
85 int cst_cx_count; /* Number of valid Cx states. */
86 int cst_prev_sleep; /* Last idle sleep duration. */
88 int cst_non_c3; /* Index of lowest non-C3 state. */
89 u_long cst_cx_stats[MAX_CX_STATES];/* Cx usage history. */
90 /* Values for sysctl. */
91 int cst_cx_lowest; /* Current Cx lowest */
92 int cst_cx_lowest_req; /* Requested Cx lowest */
93 char cst_cx_supported[64];
96 #define ACPI_CST_FLAG_PROBING 0x1
98 #define PCI_VENDOR_INTEL 0x8086
99 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
100 #define PCI_REVISION_A_STEP 0
101 #define PCI_REVISION_B_STEP 1
102 #define PCI_REVISION_4E 2
103 #define PCI_REVISION_4M 3
104 #define PIIX4_DEVACTB_REG 0x58
105 #define PIIX4_BRLD_EN_IRQ0 (1<<0)
106 #define PIIX4_BRLD_EN_IRQ (1<<1)
107 #define PIIX4_BRLD_EN_IRQ8 (1<<5)
108 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | \
109 PIIX4_BRLD_EN_IRQ | \
111 #define PIIX4_PCNTRL_BST_EN (1<<10)
113 /* Platform hardware resource information. */
114 static uint32_t acpi_cst_smi_cmd; /* Value to write to SMI_CMD. */
115 static uint8_t acpi_cst_ctrl; /* Indicate we are _CST aware. */
116 int acpi_cst_quirks; /* Indicate any hardware bugs. */
117 static boolean_t acpi_cst_use_fadt;
120 static boolean_t acpi_cst_disable_idle;
121 /* Disable entry to idle function */
122 static int acpi_cst_cx_count; /* Number of valid Cx states */
124 /* Values for sysctl. */
125 static int acpi_cst_cx_lowest; /* Current Cx lowest */
126 static int acpi_cst_cx_lowest_req; /* Requested Cx lowest */
128 static device_t *acpi_cst_devices;
129 static int acpi_cst_ndevices;
130 static struct acpi_cst_softc **acpi_cst_softc;
131 static struct lwkt_serialize acpi_cst_slize = LWKT_SERIALIZE_INITIALIZER;
133 static int acpi_cst_probe(device_t);
134 static int acpi_cst_attach(device_t);
135 static int acpi_cst_suspend(device_t);
136 static int acpi_cst_resume(device_t);
137 static int acpi_cst_shutdown(device_t);
139 static void acpi_cst_notify(device_t);
140 static void acpi_cst_postattach(void *);
141 static void acpi_cst_idle(void);
143 static void acpi_cst_cx_probe(struct acpi_cst_softc *);
144 static void acpi_cst_cx_probe_fadt(struct acpi_cst_softc *);
145 static int acpi_cst_cx_probe_cst(struct acpi_cst_softc *, int);
146 static int acpi_cst_cx_reprobe_cst(struct acpi_cst_softc *);
148 static void acpi_cst_startup(struct acpi_cst_softc *);
149 static void acpi_cst_support_list(struct acpi_cst_softc *);
150 static int acpi_cst_set_lowest(struct acpi_cst_softc *, int);
151 static int acpi_cst_set_lowest_oncpu(struct acpi_cst_softc *, int);
152 static void acpi_cst_non_c3(struct acpi_cst_softc *);
153 static void acpi_cst_global_cx_count(void);
154 static int acpi_cst_set_quirks(void);
155 static void acpi_cst_c3_bm_rld(struct acpi_cst_softc *);
156 static void acpi_cst_free_resource(struct acpi_cst_softc *, int);
157 static void acpi_cst_c1_halt(void);
159 static int acpi_cst_usage_sysctl(SYSCTL_HANDLER_ARGS);
160 static int acpi_cst_lowest_sysctl(SYSCTL_HANDLER_ARGS);
161 static int acpi_cst_lowest_use_sysctl(SYSCTL_HANDLER_ARGS);
162 static int acpi_cst_global_lowest_sysctl(SYSCTL_HANDLER_ARGS);
163 static int acpi_cst_global_lowest_use_sysctl(SYSCTL_HANDLER_ARGS);
165 static int acpi_cst_cx_setup(struct acpi_cst_cx *cx);
166 static void acpi_cst_c1_halt_enter(const struct acpi_cst_cx *);
167 static void acpi_cst_cx_io_enter(const struct acpi_cst_cx *);
169 static device_method_t acpi_cst_methods[] = {
170 /* Device interface */
171 DEVMETHOD(device_probe, acpi_cst_probe),
172 DEVMETHOD(device_attach, acpi_cst_attach),
173 DEVMETHOD(device_detach, bus_generic_detach),
174 DEVMETHOD(device_shutdown, acpi_cst_shutdown),
175 DEVMETHOD(device_suspend, acpi_cst_suspend),
176 DEVMETHOD(device_resume, acpi_cst_resume),
179 DEVMETHOD(bus_add_child, bus_generic_add_child),
180 DEVMETHOD(bus_read_ivar, bus_generic_read_ivar),
181 DEVMETHOD(bus_get_resource_list, bus_generic_get_resource_list),
182 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
183 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
184 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
185 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
186 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
187 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
188 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
189 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
190 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
194 static driver_t acpi_cst_driver = {
197 sizeof(struct acpi_cst_softc),
200 static devclass_t acpi_cst_devclass;
201 DRIVER_MODULE(cpu_cst, cpu, acpi_cst_driver, acpi_cst_devclass, NULL, NULL);
202 MODULE_DEPEND(cpu_cst, acpi, 1, 1, 1);
205 acpi_cst_probe(device_t dev)
209 if (acpi_disabled("cpu_cst") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
212 cpu_id = acpi_get_magic(dev);
214 if (acpi_cst_softc == NULL)
215 acpi_cst_softc = kmalloc(sizeof(struct acpi_cst_softc *) *
216 SMP_MAXCPU, M_TEMP /* XXX */, M_INTWAIT | M_ZERO);
219 * Check if we already probed this processor. We scan the bus twice
220 * so it's possible we've already seen this one.
222 if (acpi_cst_softc[cpu_id] != NULL) {
223 device_printf(dev, "CPU%d cstate already exist\n", cpu_id);
227 /* Mark this processor as in-use and save our derived id for attach. */
228 acpi_cst_softc[cpu_id] = (void *)1;
229 device_set_desc(dev, "ACPI CPU C-State");
235 acpi_cst_attach(device_t dev)
239 struct acpi_cst_softc *sc;
242 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
244 sc = device_get_softc(dev);
246 sc->cst_parent = device_get_softc(device_get_parent(dev));
247 sc->cst_handle = acpi_get_handle(dev);
248 sc->cst_cpuid = acpi_get_magic(dev);
249 acpi_cst_softc[sc->cst_cpuid] = sc;
250 acpi_cst_smi_cmd = AcpiGbl_FADT.SmiCommand;
251 acpi_cst_ctrl = AcpiGbl_FADT.CstControl;
254 buf.Length = ACPI_ALLOCATE_BUFFER;
255 status = AcpiEvaluateObject(sc->cst_handle, NULL, NULL, &buf);
256 if (ACPI_FAILURE(status)) {
257 device_printf(dev, "attach failed to get Processor obj - %s\n",
258 AcpiFormatException(status));
261 obj = (ACPI_OBJECT *)buf.Pointer;
262 sc->cst_p_blk = obj->Processor.PblkAddress;
263 sc->cst_p_blk_len = obj->Processor.PblkLength;
265 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "cpu_cst%d: P_BLK at %#x/%d\n",
266 device_get_unit(dev), sc->cst_p_blk, sc->cst_p_blk_len));
269 * If this is the first cpu we attach, create and initialize the generic
270 * resources that will be used by all acpi cpu devices.
272 if (device_get_unit(dev) == 0) {
273 /* Assume we won't be using FADT for Cx states by default */
274 acpi_cst_use_fadt = FALSE;
276 /* Queue post cpu-probing task handler */
277 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cst_postattach, NULL);
280 /* Probe for Cx state support. */
281 acpi_cst_cx_probe(sc);
287 * Disable any entry to the idle function during suspend and re-enable it
291 acpi_cst_suspend(device_t dev)
295 error = bus_generic_suspend(dev);
298 acpi_cst_disable_idle = TRUE;
303 acpi_cst_resume(device_t dev)
305 acpi_cst_disable_idle = FALSE;
306 return (bus_generic_resume(dev));
310 acpi_cst_shutdown(device_t dev)
312 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
314 /* Allow children to shutdown first. */
315 bus_generic_shutdown(dev);
318 * Disable any entry to the idle function. There is a small race where
319 * an idle thread have passed this check but not gone to sleep. This
320 * is ok since device_shutdown() does not free the softc, otherwise
321 * we'd have to be sure all threads were evicted before returning.
323 acpi_cst_disable_idle = TRUE;
329 acpi_cst_cx_probe(struct acpi_cst_softc *sc)
331 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
333 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
334 sc->cst_prev_sleep = 1000000;
335 sc->cst_cx_lowest = 0;
336 sc->cst_cx_lowest_req = 0;
339 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
340 * any, we'll revert to FADT/P_BLK Cx control method which will be
341 * handled by acpi_cst_postattach. We need to defer to after having
342 * probed all the cpus in the system before probing for Cx states from
343 * FADT as we may already have found cpus with valid _CST packages.
345 if (!acpi_cst_use_fadt && acpi_cst_cx_probe_cst(sc, 0) != 0) {
347 * We were unable to find a _CST package for this cpu or there
348 * was an error parsing it. Switch back to generic mode.
350 acpi_cst_use_fadt = TRUE;
352 device_printf(sc->cst_dev, "switching to FADT Cx mode\n");
356 * TODO: _CSD Package should be checked here.
361 acpi_cst_cx_probe_fadt(struct acpi_cst_softc *sc)
363 struct acpi_cst_cx *cx_ptr;
367 * Free all previously allocated resources.
370 * It is needed, since we could enter here because of other
371 * cpu's _CST probing failure.
373 acpi_cst_free_resource(sc, 0);
375 sc->cst_cx_count = 0;
376 cx_ptr = sc->cst_cx_states;
378 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
379 sc->cst_prev_sleep = 1000000;
381 /* C1 has been required since just after ACPI 1.0 */
382 cx_ptr->gas.SpaceId = ACPI_ADR_SPACE_FIXED_HARDWARE;
383 cx_ptr->type = ACPI_STATE_C1;
384 cx_ptr->trans_lat = 0;
385 cx_ptr->enter = acpi_cst_c1_halt_enter;
386 error = acpi_cst_cx_setup(cx_ptr);
388 panic("C1 FADT HALT setup failed: %d", error);
392 /* C2(+) is not supported on MP system */
393 if (ncpus > 1 && (AcpiGbl_FADT.Flags & ACPI_FADT_C2_MP_SUPPORTED) == 0)
397 * The spec says P_BLK must be 6 bytes long. However, some systems
398 * use it to indicate a fractional set of features present so we
399 * take 5 as C2. Some may also have a value of 7 to indicate
400 * another C3 but most use _CST for this (as required) and having
401 * "only" C1-C3 is not a hardship.
403 if (sc->cst_p_blk_len < 5)
406 /* Validate and allocate resources for C2 (P_LVL2). */
407 if (AcpiGbl_FADT.C2Latency <= 100) {
408 cx_ptr->gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
409 cx_ptr->gas.BitWidth = 8;
410 cx_ptr->gas.Address = sc->cst_p_blk + 4;
412 cx_ptr->rid = sc->cst_parent->cpu_next_rid;
413 acpi_bus_alloc_gas(sc->cst_dev, &cx_ptr->res_type, &cx_ptr->rid,
414 &cx_ptr->gas, &cx_ptr->res, RF_SHAREABLE);
415 if (cx_ptr->res != NULL) {
416 sc->cst_parent->cpu_next_rid++;
417 cx_ptr->type = ACPI_STATE_C2;
418 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
419 cx_ptr->enter = acpi_cst_cx_io_enter;
420 cx_ptr->btag = rman_get_bustag(cx_ptr->res);
421 cx_ptr->bhand = rman_get_bushandle(cx_ptr->res);
422 error = acpi_cst_cx_setup(cx_ptr);
424 panic("C2 FADT I/O setup failed: %d", error);
430 if (sc->cst_p_blk_len < 6)
433 /* Validate and allocate resources for C3 (P_LVL3). */
434 if (AcpiGbl_FADT.C3Latency <= 1000 &&
435 !(acpi_cst_quirks & ACPI_CST_QUIRK_NO_C3)) {
436 cx_ptr->gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
437 cx_ptr->gas.BitWidth = 8;
438 cx_ptr->gas.Address = sc->cst_p_blk + 5;
440 cx_ptr->rid = sc->cst_parent->cpu_next_rid;
441 acpi_bus_alloc_gas(sc->cst_dev, &cx_ptr->res_type, &cx_ptr->rid,
442 &cx_ptr->gas, &cx_ptr->res, RF_SHAREABLE);
443 if (cx_ptr->res != NULL) {
444 sc->cst_parent->cpu_next_rid++;
445 cx_ptr->type = ACPI_STATE_C3;
446 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
447 cx_ptr->enter = acpi_cst_cx_io_enter;
448 cx_ptr->btag = rman_get_bustag(cx_ptr->res);
449 cx_ptr->bhand = rman_get_bushandle(cx_ptr->res);
450 error = acpi_cst_cx_setup(cx_ptr);
452 panic("C3 FADT I/O setup failed: %d", error);
460 * Parse a _CST package and set up its Cx states. Since the _CST object
461 * can change dynamically, our notify handler may call this function
462 * to clean up and probe the new _CST package.
465 acpi_cst_cx_probe_cst(struct acpi_cst_softc *sc, int reprobe)
467 struct acpi_cst_cx *cx_ptr;
475 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
479 KKASSERT(&curthread->td_msgport == netisr_cpuport(sc->cst_cpuid));
483 buf.Length = ACPI_ALLOCATE_BUFFER;
484 status = AcpiEvaluateObject(sc->cst_handle, "_CST", NULL, &buf);
485 if (ACPI_FAILURE(status))
488 /* _CST is a package with a count and at least one Cx package. */
489 top = (ACPI_OBJECT *)buf.Pointer;
490 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
491 device_printf(sc->cst_dev, "invalid _CST package\n");
492 AcpiOsFree(buf.Pointer);
495 if (count != top->Package.Count - 1) {
496 device_printf(sc->cst_dev, "invalid _CST state count (%d != %d)\n",
497 count, top->Package.Count - 1);
498 count = top->Package.Count - 1;
500 if (count > MAX_CX_STATES) {
501 device_printf(sc->cst_dev, "_CST has too many states (%d)\n", count);
502 count = MAX_CX_STATES;
505 sc->cst_flags |= ACPI_CST_FLAG_PROBING;
509 * Free all previously allocated resources
511 * NOTE: It is needed for _CST reprobing.
513 acpi_cst_free_resource(sc, 0);
515 /* Set up all valid states. */
516 sc->cst_cx_count = 0;
517 cx_ptr = sc->cst_cx_states;
518 for (i = 0; i < count; i++) {
521 pkg = &top->Package.Elements[i + 1];
522 if (!ACPI_PKG_VALID(pkg, 4) ||
523 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
524 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
525 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
527 device_printf(sc->cst_dev, "skipping invalid Cx state package\n");
531 /* Validate the state to see if we should use it. */
532 switch (cx_ptr->type) {
535 cx_ptr->enter = acpi_cst_c1_halt_enter;
536 error = acpi_cst_cx_setup(cx_ptr);
538 panic("C1 CST HALT setup failed: %d", error);
547 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_C3) != 0) {
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
549 "cpu_cst%d: C3[%d] not available.\n",
550 device_get_unit(sc->cst_dev), i));
557 * Allocate the control register for C2 or C3(+).
559 KASSERT(cx_ptr->res == NULL, ("still has res"));
560 acpi_PkgRawGas(pkg, 0, &cx_ptr->gas);
562 cx_ptr->rid = sc->cst_parent->cpu_next_rid;
563 acpi_bus_alloc_gas(sc->cst_dev, &cx_ptr->res_type, &cx_ptr->rid,
564 &cx_ptr->gas, &cx_ptr->res, RF_SHAREABLE);
565 if (cx_ptr->res != NULL) {
566 sc->cst_parent->cpu_next_rid++;
567 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
568 "cpu_cst%d: Got C%d - %d latency\n",
569 device_get_unit(sc->cst_dev), cx_ptr->type,
571 cx_ptr->enter = acpi_cst_cx_io_enter;
572 cx_ptr->btag = rman_get_bustag(cx_ptr->res);
573 cx_ptr->bhand = rman_get_bushandle(cx_ptr->res);
574 error = acpi_cst_cx_setup(cx_ptr);
576 panic("C%d CST I/O setup failed: %d", cx_ptr->type, error);
580 error = acpi_cst_cx_setup(cx_ptr);
582 KASSERT(cx_ptr->enter != NULL,
583 ("C%d enter is not set", cx_ptr->type));
589 AcpiOsFree(buf.Pointer);
592 /* If there are C3(+) states, always enable bus master wakeup */
593 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM) == 0) {
594 for (i = 0; i < sc->cst_cx_count; ++i) {
595 struct acpi_cst_cx *cx = &sc->cst_cx_states[i];
597 if (cx->type >= ACPI_STATE_C3) {
598 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
604 /* Fix up the lowest Cx being used */
605 acpi_cst_set_lowest_oncpu(sc, sc->cst_cx_lowest_req);
609 * Cache the lowest non-C3 state.
610 * NOTE: must after cst_cx_lowest is set.
615 sc->cst_flags &= ~ACPI_CST_FLAG_PROBING;
621 acpi_cst_cx_reprobe_cst_handler(netmsg_t msg)
623 struct netmsg_acpi_cst *rmsg = (struct netmsg_acpi_cst *)msg;
626 error = acpi_cst_cx_probe_cst(rmsg->sc, 1);
627 lwkt_replymsg(&rmsg->base.lmsg, error);
631 acpi_cst_cx_reprobe_cst(struct acpi_cst_softc *sc)
633 struct netmsg_acpi_cst msg;
635 netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
636 acpi_cst_cx_reprobe_cst_handler);
639 return lwkt_domsg(netisr_cpuport(sc->cst_cpuid), &msg.base.lmsg, 0);
643 * Call this *after* all CPUs Cx states have been attached.
646 acpi_cst_postattach(void *arg)
648 struct acpi_cst_softc *sc;
651 /* Get set of Cx state devices */
652 devclass_get_devices(acpi_cst_devclass, &acpi_cst_devices,
656 * Setup any quirks that might necessary now that we have probed
657 * all the CPUs' Cx states.
659 acpi_cst_set_quirks();
661 if (acpi_cst_use_fadt) {
663 * We are using Cx mode from FADT, probe for available Cx states
664 * for all processors.
666 for (i = 0; i < acpi_cst_ndevices; i++) {
667 sc = device_get_softc(acpi_cst_devices[i]);
668 acpi_cst_cx_probe_fadt(sc);
672 * We are using _CST mode, remove C3 state if necessary.
674 * As we now know for sure that we will be using _CST mode
675 * install our notify handler.
677 for (i = 0; i < acpi_cst_ndevices; i++) {
678 sc = device_get_softc(acpi_cst_devices[i]);
679 if (acpi_cst_quirks & ACPI_CST_QUIRK_NO_C3) {
680 /* Free part of unused resources */
681 acpi_cst_free_resource(sc, sc->cst_non_c3 + 1);
682 sc->cst_cx_count = sc->cst_non_c3 + 1;
684 sc->cst_parent->cpu_cst_notify = acpi_cst_notify;
687 acpi_cst_global_cx_count();
689 /* Perform Cx final initialization. */
690 for (i = 0; i < acpi_cst_ndevices; i++) {
691 sc = device_get_softc(acpi_cst_devices[i]);
692 acpi_cst_startup(sc);
694 if (sc->cst_parent->glob_sysctl_tree != NULL) {
695 struct acpi_cpu_softc *cpu = sc->cst_parent;
697 /* Add a sysctl handler to handle global Cx lowest setting */
698 SYSCTL_ADD_PROC(&cpu->glob_sysctl_ctx,
699 SYSCTL_CHILDREN(cpu->glob_sysctl_tree),
700 OID_AUTO, "cx_lowest",
701 CTLTYPE_STRING | CTLFLAG_RW, NULL, 0,
702 acpi_cst_global_lowest_sysctl, "A",
703 "Requested global lowest Cx sleep state");
704 SYSCTL_ADD_PROC(&cpu->glob_sysctl_ctx,
705 SYSCTL_CHILDREN(cpu->glob_sysctl_tree),
706 OID_AUTO, "cx_lowest_use",
707 CTLTYPE_STRING | CTLFLAG_RD, NULL, 0,
708 acpi_cst_global_lowest_use_sysctl, "A",
709 "Global lowest Cx sleep state to use");
713 /* Take over idling from cpu_idle_default(). */
714 acpi_cst_cx_lowest = 0;
715 acpi_cst_cx_lowest_req = 0;
716 acpi_cst_disable_idle = FALSE;
719 cpu_idle_hook = acpi_cst_idle;
723 acpi_cst_support_list(struct acpi_cst_softc *sc)
729 * Set up the list of Cx states
731 sbuf_new(&sb, sc->cst_cx_supported, sizeof(sc->cst_cx_supported),
733 for (i = 0; i < sc->cst_cx_count; i++)
734 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cst_cx_states[i].trans_lat);
740 acpi_cst_c3_bm_rld_handler(netmsg_t msg)
742 struct netmsg_acpi_cst *rmsg = (struct netmsg_acpi_cst *)msg;
744 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
745 lwkt_replymsg(&rmsg->base.lmsg, 0);
749 acpi_cst_c3_bm_rld(struct acpi_cst_softc *sc)
751 struct netmsg_acpi_cst msg;
753 netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
754 acpi_cst_c3_bm_rld_handler);
757 lwkt_domsg(netisr_cpuport(sc->cst_cpuid), &msg.base.lmsg, 0);
761 acpi_cst_startup(struct acpi_cst_softc *sc)
763 struct acpi_cpu_softc *cpu = sc->cst_parent;
764 int i, bm_rld_done = 0;
766 for (i = 0; i < sc->cst_cx_count; ++i) {
767 struct acpi_cst_cx *cx = &sc->cst_cx_states[i];
770 /* If there are C3(+) states, always enable bus master wakeup */
771 if (cx->type >= ACPI_STATE_C3 && !bm_rld_done &&
772 (acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM) == 0) {
773 acpi_cst_c3_bm_rld(sc);
777 /* Redo the Cx setup, since quirks have been changed */
778 error = acpi_cst_cx_setup(cx);
780 panic("C%d startup setup failed: %d", i + 1, error);
783 acpi_cst_support_list(sc);
785 SYSCTL_ADD_STRING(&cpu->pcpu_sysctl_ctx,
786 SYSCTL_CHILDREN(cpu->pcpu_sysctl_tree),
787 OID_AUTO, "cx_supported", CTLFLAG_RD,
788 sc->cst_cx_supported, 0,
789 "Cx/microsecond values for supported Cx states");
790 SYSCTL_ADD_PROC(&cpu->pcpu_sysctl_ctx,
791 SYSCTL_CHILDREN(cpu->pcpu_sysctl_tree),
792 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
793 (void *)sc, 0, acpi_cst_lowest_sysctl, "A",
794 "requested lowest Cx sleep state");
795 SYSCTL_ADD_PROC(&cpu->pcpu_sysctl_ctx,
796 SYSCTL_CHILDREN(cpu->pcpu_sysctl_tree),
797 OID_AUTO, "cx_lowest_use", CTLTYPE_STRING | CTLFLAG_RD,
798 (void *)sc, 0, acpi_cst_lowest_use_sysctl, "A",
799 "lowest Cx sleep state to use");
800 SYSCTL_ADD_PROC(&cpu->pcpu_sysctl_ctx,
801 SYSCTL_CHILDREN(cpu->pcpu_sysctl_tree),
802 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
803 (void *)sc, 0, acpi_cst_usage_sysctl, "A",
804 "percent usage for each Cx state");
807 /* Signal platform that we can handle _CST notification. */
808 if (!acpi_cst_use_fadt && acpi_cst_ctrl != 0) {
810 AcpiOsWritePort(acpi_cst_smi_cmd, acpi_cst_ctrl, 8);
817 * Idle the CPU in the lowest state possible. This function is called with
818 * interrupts disabled. Note that once it re-enables interrupts, a task
819 * switch can occur so do not access shared data (i.e. the softc) after
820 * interrupts are re-enabled.
825 struct acpi_cst_softc *sc;
826 struct acpi_cst_cx *cx_next;
827 union microtime_pcpu start, end;
828 int cx_next_idx, i, tdiff, bm_arb_disabled = 0;
830 /* If disabled, return immediately. */
831 if (acpi_cst_disable_idle) {
837 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
838 * since there is no Cx state for this processor.
840 sc = acpi_cst_softc[mdcpu->mi.gd_cpuid];
846 /* Still probing; use C1 */
847 if (sc->cst_flags & ACPI_CST_FLAG_PROBING) {
852 /* Find the lowest state that has small enough latency. */
854 for (i = sc->cst_cx_lowest; i >= 0; i--) {
855 if (sc->cst_cx_states[i].trans_lat * 3 <= sc->cst_prev_sleep) {
862 * Check for bus master activity if needed for the selected state.
863 * If there was activity, clear the bit and use the lowest non-C3 state.
865 cx_next = &sc->cst_cx_states[cx_next_idx];
866 if (cx_next->flags & ACPI_CST_CX_FLAG_BM_STS) {
869 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
870 if (bm_active != 0) {
871 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
872 cx_next_idx = sc->cst_non_c3;
876 /* Select the next state and update statistics. */
877 cx_next = &sc->cst_cx_states[cx_next_idx];
878 sc->cst_cx_stats[cx_next_idx]++;
879 KASSERT(cx_next->type != ACPI_STATE_C0, ("C0 sleep"));
882 * Execute HLT (or equivalent) and wait for an interrupt. We can't
883 * calculate the time spent in C1 since the place we wake up is an
884 * ISR. Assume we slept half of quantum and return.
886 if (cx_next->type == ACPI_STATE_C1) {
887 sc->cst_prev_sleep = (sc->cst_prev_sleep * 3 + 500000 / hz) / 4;
888 cx_next->enter(cx_next);
892 /* Execute the proper preamble before enter the selected state. */
893 if (cx_next->preamble == ACPI_CST_CX_PREAMBLE_BM_ARB) {
894 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1);
896 } else if (cx_next->preamble == ACPI_CST_CX_PREAMBLE_WBINVD) {
897 ACPI_FLUSH_CPU_CACHE();
901 * Enter the selected state and check time spent asleep.
903 microtime_pcpu_get(&start);
906 cx_next->enter(cx_next);
909 microtime_pcpu_get(&end);
911 /* Enable bus master arbitration, if it was disabled. */
913 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0);
917 /* Find the actual time asleep in microseconds. */
918 tdiff = microtime_pcpu_diff(&start, &end);
919 sc->cst_prev_sleep = (sc->cst_prev_sleep * 3 + tdiff) / 4;
923 * Re-evaluate the _CST object when we are notified that it changed.
926 acpi_cst_notify(device_t dev)
928 struct acpi_cst_softc *sc = device_get_softc(dev);
930 KASSERT(curthread->td_type != TD_TYPE_NETISR,
931 ("notify in netisr%d", mycpuid));
933 lwkt_serialize_enter(&acpi_cst_slize);
935 /* Update the list of Cx states. */
936 acpi_cst_cx_reprobe_cst(sc);
937 acpi_cst_support_list(sc);
939 /* Update the new lowest useable Cx state for all CPUs. */
940 acpi_cst_global_cx_count();
943 * Fix up the lowest Cx being used
945 if (acpi_cst_cx_lowest_req < acpi_cst_cx_count)
946 acpi_cst_cx_lowest = acpi_cst_cx_lowest_req;
947 if (acpi_cst_cx_lowest > acpi_cst_cx_count - 1)
948 acpi_cst_cx_lowest = acpi_cst_cx_count - 1;
950 lwkt_serialize_exit(&acpi_cst_slize);
954 acpi_cst_set_quirks(void)
959 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
962 * Bus mastering arbitration control is needed to keep caches coherent
963 * while sleeping in C3. If it's not present but a working flush cache
964 * instruction is present, flush the caches before entering C3 instead.
965 * Otherwise, just disable C3 completely.
967 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
968 AcpiGbl_FADT.Pm2ControlLength == 0) {
969 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
970 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
971 acpi_cst_quirks |= ACPI_CST_QUIRK_NO_BM;
972 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
973 "cpu_cst: no BM control, using flush cache method\n"));
975 acpi_cst_quirks |= ACPI_CST_QUIRK_NO_C3;
976 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
977 "cpu_cst: no BM control, C3 not available\n"));
981 /* Look for various quirks of the PIIX4 part. */
982 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
983 if (acpi_dev != NULL) {
984 switch (pci_get_revid(acpi_dev)) {
986 * Disable C3 support for all PIIX4 chipsets. Some of these parts
987 * do not report the BMIDE status to the BM status register and
988 * others have a livelock bug if Type-F DMA is enabled. Linux
989 * works around the BMIDE bug by reading the BM status directly
990 * but we take the simpler approach of disabling C3 for these
993 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
994 * Livelock") from the January 2002 PIIX4 specification update.
995 * Applies to all PIIX4 models.
997 * Also, make sure that all interrupts cause a "Stop Break"
998 * event to exit from C2 state.
999 * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak)
1000 * should be set to zero, otherwise it causes C2 to short-sleep.
1001 * PIIX4 doesn't properly support C3 and bus master activity
1002 * need not break out of C2.
1004 case PCI_REVISION_A_STEP:
1005 case PCI_REVISION_B_STEP:
1006 case PCI_REVISION_4E:
1007 case PCI_REVISION_4M:
1008 acpi_cst_quirks |= ACPI_CST_QUIRK_NO_C3;
1009 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1010 "cpu_cst: working around PIIX4 bug, disabling C3\n"));
1012 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
1013 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
1014 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1015 "cpu_cst: PIIX4: enabling IRQs to generate Stop Break\n"));
1016 val |= PIIX4_STOP_BREAK_MASK;
1017 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
1019 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val);
1021 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1022 "cpu_cst: PIIX4: reset BRLD_EN_BM\n"));
1023 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
1035 acpi_cst_usage_sysctl(SYSCTL_HANDLER_ARGS)
1037 struct acpi_cst_softc *sc;
1041 uintmax_t fract, sum, whole;
1043 sc = (struct acpi_cst_softc *) arg1;
1045 for (i = 0; i < sc->cst_cx_count; i++)
1046 sum += sc->cst_cx_stats[i];
1047 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1048 for (i = 0; i < sc->cst_cx_count; i++) {
1050 whole = (uintmax_t)sc->cst_cx_stats[i] * 100;
1051 fract = (whole % sum) * 100;
1052 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1053 (u_int)(fract / sum));
1055 sbuf_printf(&sb, "0.00%% ");
1057 sbuf_printf(&sb, "last %dus", sc->cst_prev_sleep);
1060 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1067 acpi_cst_set_lowest_oncpu(struct acpi_cst_softc *sc, int val)
1069 int old_lowest, error = 0, old_lowest_req;
1070 uint32_t old_type, type;
1072 KKASSERT(mycpuid == sc->cst_cpuid);
1074 old_lowest_req = sc->cst_cx_lowest_req;
1075 sc->cst_cx_lowest_req = val;
1077 if (val > sc->cst_cx_count - 1)
1078 val = sc->cst_cx_count - 1;
1079 old_lowest = atomic_swap_int(&sc->cst_cx_lowest, val);
1081 old_type = sc->cst_cx_states[old_lowest].type;
1082 type = sc->cst_cx_states[val].type;
1083 if (old_type >= ACPI_STATE_C3 && type < ACPI_STATE_C3) {
1084 cputimer_intr_powersave_remreq();
1085 } else if (type >= ACPI_STATE_C3 && old_type < ACPI_STATE_C3) {
1086 error = cputimer_intr_powersave_addreq();
1089 sc->cst_cx_lowest_req = old_lowest_req;
1090 sc->cst_cx_lowest = old_lowest;
1097 /* Cache the new lowest non-C3 state. */
1098 acpi_cst_non_c3(sc);
1100 /* Reset the statistics counters. */
1101 bzero(sc->cst_cx_stats, sizeof(sc->cst_cx_stats));
1106 acpi_cst_set_lowest_handler(netmsg_t msg)
1108 struct netmsg_acpi_cst *rmsg = (struct netmsg_acpi_cst *)msg;
1111 error = acpi_cst_set_lowest_oncpu(rmsg->sc, rmsg->val);
1112 lwkt_replymsg(&rmsg->base.lmsg, error);
1116 acpi_cst_set_lowest(struct acpi_cst_softc *sc, int val)
1118 struct netmsg_acpi_cst msg;
1120 netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
1121 acpi_cst_set_lowest_handler);
1125 return lwkt_domsg(netisr_cpuport(sc->cst_cpuid), &msg.base.lmsg, 0);
1129 acpi_cst_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1131 struct acpi_cst_softc *sc;
1135 sc = (struct acpi_cst_softc *)arg1;
1136 ksnprintf(state, sizeof(state), "C%d", sc->cst_cx_lowest_req + 1);
1137 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1138 if (error != 0 || req->newptr == NULL)
1140 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1142 val = (int) strtol(state + 1, NULL, 10) - 1;
1146 lwkt_serialize_enter(&acpi_cst_slize);
1147 error = acpi_cst_set_lowest(sc, val);
1148 lwkt_serialize_exit(&acpi_cst_slize);
1154 acpi_cst_lowest_use_sysctl(SYSCTL_HANDLER_ARGS)
1156 struct acpi_cst_softc *sc;
1159 sc = (struct acpi_cst_softc *)arg1;
1160 ksnprintf(state, sizeof(state), "C%d", sc->cst_cx_lowest + 1);
1161 return sysctl_handle_string(oidp, state, sizeof(state), req);
1165 acpi_cst_global_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1167 struct acpi_cst_softc *sc;
1171 ksnprintf(state, sizeof(state), "C%d", acpi_cst_cx_lowest_req + 1);
1172 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1173 if (error != 0 || req->newptr == NULL)
1175 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1177 val = (int) strtol(state + 1, NULL, 10) - 1;
1181 lwkt_serialize_enter(&acpi_cst_slize);
1183 acpi_cst_cx_lowest_req = val;
1184 acpi_cst_cx_lowest = val;
1185 if (acpi_cst_cx_lowest > acpi_cst_cx_count - 1)
1186 acpi_cst_cx_lowest = acpi_cst_cx_count - 1;
1188 /* Update the new lowest useable Cx state for all CPUs. */
1189 for (i = 0; i < acpi_cst_ndevices; i++) {
1190 sc = device_get_softc(acpi_cst_devices[i]);
1191 error = acpi_cst_set_lowest(sc, val);
1198 lwkt_serialize_exit(&acpi_cst_slize);
1204 acpi_cst_global_lowest_use_sysctl(SYSCTL_HANDLER_ARGS)
1208 ksnprintf(state, sizeof(state), "C%d", acpi_cst_cx_lowest + 1);
1209 return sysctl_handle_string(oidp, state, sizeof(state), req);
1213 * Put the CPU in C1 in a machine-dependant way.
1214 * XXX: shouldn't be here!
1217 acpi_cst_c1_halt(void)
1220 if ((mycpu->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0)
1221 __asm __volatile("sti; hlt");
1223 __asm __volatile("sti; pause");
1227 acpi_cst_non_c3(struct acpi_cst_softc *sc)
1232 for (i = sc->cst_cx_lowest; i >= 0; i--) {
1233 if (sc->cst_cx_states[i].type < ACPI_STATE_C3) {
1239 device_printf(sc->cst_dev, "non-C3 %d\n", sc->cst_non_c3);
1243 * Update the largest Cx state supported in the global acpi_cst_cx_count.
1244 * It will be used in the global Cx sysctl handler.
1247 acpi_cst_global_cx_count(void)
1249 struct acpi_cst_softc *sc;
1252 if (acpi_cst_ndevices == 0) {
1253 acpi_cst_cx_count = 0;
1257 sc = device_get_softc(acpi_cst_devices[0]);
1258 acpi_cst_cx_count = sc->cst_cx_count;
1260 for (i = 1; i < acpi_cst_ndevices; i++) {
1261 struct acpi_cst_softc *sc = device_get_softc(acpi_cst_devices[i]);
1263 if (sc->cst_cx_count < acpi_cst_cx_count)
1264 acpi_cst_cx_count = sc->cst_cx_count;
1267 kprintf("cpu_cst: global Cx count %d\n", acpi_cst_cx_count);
1271 acpi_cst_c1_halt_enter(const struct acpi_cst_cx *cx __unused)
1277 acpi_cst_cx_io_enter(const struct acpi_cst_cx *cx)
1282 * Read I/O to enter this Cx state
1284 bus_space_read_1(cx->btag, cx->bhand, 0);
1286 * Perform a dummy I/O read. Since it may take an arbitrary time
1287 * to enter the idle state, this read makes sure that we are frozen.
1289 AcpiRead(&dummy, &AcpiGbl_FADT.XPmTimerBlock);
1293 acpi_cst_cx_setup(struct acpi_cst_cx *cx)
1295 cx->flags &= ~ACPI_CST_CX_FLAG_BM_STS;
1296 cx->preamble = ACPI_CST_CX_PREAMBLE_NONE;
1298 if (cx->type >= ACPI_STATE_C3) {
1300 * Set the required operations for entering C3(+) state.
1301 * Later acpi_cst_md_cx_setup() may fix them up.
1305 * Always check BM_STS.
1307 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM) == 0)
1308 cx->flags |= ACPI_CST_CX_FLAG_BM_STS;
1311 * According to the ACPI specification, bus master arbitration
1312 * is only available on UP system. For MP system, cache flushing
1315 if (ncpus == 1 && (acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM) == 0)
1316 cx->preamble = ACPI_CST_CX_PREAMBLE_BM_ARB;
1318 cx->preamble = ACPI_CST_CX_PREAMBLE_WBINVD;
1320 return acpi_cst_md_cx_setup(cx);
1324 acpi_cst_free_resource(struct acpi_cst_softc *sc, int start)
1328 for (i = start; i < MAX_CX_STATES; ++i) {
1329 struct acpi_cst_cx *cx = &sc->cst_cx_states[i];
1331 if (cx->res != NULL)
1332 bus_release_resource(sc->cst_dev, cx->res_type, cx->rid, cx->res);
1333 memset(cx, 0, sizeof(*cx));