sys/dev/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <drm/drmP.h>
  30 #include <drm/drm_crtc.h>
  31 #include <drm/drm_edid.h>
  32 #include "intel_drv.h"
  33 #include <drm/i915_drm.h>
  34 #include "i915_drv.h"
  35 #include "intel_sdvo_regs.h"
  36
  37 #include <bus/iicbus/iic.h>
  38 #include <bus/iicbus/iiconf.h>
  39 #include "iicbus_if.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char *tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         device_t i2c;
  72         u8 slave_addr;
  73
  74         device_t ddc_iic_bus, ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         uint32_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * i830_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint8_t hotplug_active[2];
 101
 102         /**
 103          * This is used to select the color range of RBG outputs in HDMI mode.
 104          * It is only valid when using TMDS encoding and 8 bit per color mode.
 105          */
 106         uint32_t color_range;
 107
 108         /**
 109          * This is set if we're going to treat the device as TV-out.
 110          *
 111          * While we have these nice friendly flags for output types that ought
 112          * to decide this for us, the S-Video output on our HDMI+S-Video card
 113          * shows up as RGB1 (VGA).
 114          */
 115         bool is_tv;
 116
 117         /* On different gens SDVOB is at different places. */
 118         bool is_sdvob;
 119
 120         /* This is for current tv format name */
 121         int tv_format_index;
 122
 123         /**
 124          * This is set if we treat the device as HDMI, instead of DVI.
 125          */
 126         bool is_hdmi;
 127         bool has_hdmi_monitor;
 128         bool has_hdmi_audio;
 129
 130         /**
 131          * This is set if we detect output of sdvo device as LVDS and
 132          * have a valid fixed mode to use with the panel.
 133          */
 134         bool is_lvds;
 135
 136         /**
 137          * This is sdvo fixed pannel mode pointer
 138          */
 139         struct drm_display_mode *sdvo_lvds_fixed_mode;
 140
 141         /* DDC bus used by this SDVO encoder */
 142         uint8_t ddc_bus;
 143
 144         /*
 145          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 146          */
 147         uint8_t dtd_sdvo_flags;
 148 };
 149
 150 struct intel_sdvo_connector {
 151         struct intel_connector base;
 152
 153         /* Mark the type of connector */
 154         uint16_t output_flag;
 155
 156         enum hdmi_force_audio force_audio;
 157
 158         /* This contains all current supported TV format */
 159         u8 tv_format_supported[TV_FORMAT_NUM];
 160         int   format_supported_num;
 161         struct drm_property *tv_format;
 162
 163         /* add the property for the SDVO-TV */
 164         struct drm_property *left;
 165         struct drm_property *right;
 166         struct drm_property *top;
 167         struct drm_property *bottom;
 168         struct drm_property *hpos;
 169         struct drm_property *vpos;
 170         struct drm_property *contrast;
 171         struct drm_property *saturation;
 172         struct drm_property *hue;
 173         struct drm_property *sharpness;
 174         struct drm_property *flicker_filter;
 175         struct drm_property *flicker_filter_adaptive;
 176         struct drm_property *flicker_filter_2d;
 177         struct drm_property *tv_chroma_filter;
 178         struct drm_property *tv_luma_filter;
 179         struct drm_property *dot_crawl;
 180
 181         /* add the property for the SDVO-TV/LVDS */
 182         struct drm_property *brightness;
 183
 184         /* Add variable to record current setting for the above property */
 185         u32     left_margin, right_margin, top_margin, bottom_margin;
 186
 187         /* this is to get the range of margin.*/
 188         u32     max_hscan,  max_vscan;
 189         u32     max_hpos, cur_hpos;
 190         u32     max_vpos, cur_vpos;
 191         u32     cur_brightness, max_brightness;
 192         u32     cur_contrast,   max_contrast;
 193         u32     cur_saturation, max_saturation;
 194         u32     cur_hue,        max_hue;
 195         u32     cur_sharpness,  max_sharpness;
 196         u32     cur_flicker_filter,             max_flicker_filter;
 197         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 198         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 199         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 200         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 201         u32     cur_dot_crawl,  max_dot_crawl;
 202 };
 203
 204 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
 205 {
 206         return container_of(encoder, struct intel_sdvo, base.base);
 207 }
 208
 209 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 210 {
 211         return container_of(intel_attached_encoder(connector),
 212                             struct intel_sdvo, base);
 213 }
 214
 215 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 216 {
 217         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 218 }
 219
 220 static bool
 221 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 222 static bool
 223 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 224                               struct intel_sdvo_connector *intel_sdvo_connector,
 225                               int type);
 226 static bool
 227 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 228                                    struct intel_sdvo_connector *intel_sdvo_connector);
 229
 230 /**
 231  * Writes the SDVOB or SDVOC with the given value, but always writes both
 232  * SDVOB and SDVOC to work around apparent hardware issues (according to
 233  * comments in the BIOS).
 234  */
 235 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 236 {
 237         struct drm_device *dev = intel_sdvo->base.base.dev;
 238         struct drm_i915_private *dev_priv = dev->dev_private;
 239         u32 bval = val, cval = val;
 240         int i;
 241
 242         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 243                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 244                 I915_READ(intel_sdvo->sdvo_reg);
 245                 return;
 246         }
 247
 248         if (intel_sdvo->sdvo_reg == SDVOB) {
 249                 cval = I915_READ(SDVOC);
 250         } else {
 251                 bval = I915_READ(SDVOB);
 252         }
 253         /*
 254          * Write the registers twice for luck. Sometimes,
 255          * writing them only once doesn't appear to 'stick'.
 256          * The BIOS does this too. Yay, magic
 257          */
 258         for (i = 0; i < 2; i++)
 259         {
 260                 I915_WRITE(SDVOB, bval);
 261                 I915_READ(SDVOB);
 262                 I915_WRITE(SDVOC, cval);
 263                 I915_READ(SDVOC);
 264         }
 265 }
 266
 267 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 268 {
 269         struct iic_msg msgs[] = {
 270                 {
 271                         .slave = intel_sdvo->slave_addr << 1,
 272                         .flags = 0,
 273                         .len = 1,
 274                         .buf = &addr,
 275                 },
 276                 {
 277                         .slave = intel_sdvo->slave_addr << 1,
 278                         .flags = IIC_M_RD,
 279                         .len = 1,
 280                         .buf = ch,
 281                 }
 282         };
 283         int ret;
 284
 285         if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0)
 286                 return true;
 287
 288         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 289         return false;
 290 }
 291
 292 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 293 /** Mapping of command numbers to names, for debug output */
 294 static const struct _sdvo_cmd_name {
 295         u8 cmd;
 296         const char *name;
 297 } sdvo_cmd_names[] = {
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 341
 342         /* Add the op code for SDVO enhancements */
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 387
 388         /* HDMI op code */
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 409 };
 410
 411 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 412
 413 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 414                                    const void *args, int args_len)
 415 {
 416         int i;
 417
 418         DRM_DEBUG_KMS("%s: W: %02X ",
 419                                 SDVO_NAME(intel_sdvo), cmd);
 420         for (i = 0; i < args_len; i++)
 421                 kprintf("%02X ", ((const u8 *)args)[i]);
 422         for (; i < 8; i++)
 423                 kprintf("   ");
 424         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 425                 if (cmd == sdvo_cmd_names[i].cmd) {
 426                         kprintf("(%s)", sdvo_cmd_names[i].name);
 427                         break;
 428                 }
 429         }
 430         if (i == ARRAY_SIZE(sdvo_cmd_names))
 431                 kprintf("(%02X)", cmd);
 432         kprintf("\n");
 433 }
 434
 435 static const char *cmd_status_names[] = {
 436         "Power on",
 437         "Success",
 438         "Not supported",
 439         "Invalid arg",
 440         "Pending",
 441         "Target not specified",
 442         "Scaling not supported"
 443 };
 444
 445 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 446                                  const void *args, int args_len)
 447 {
 448         u8 buf[args_len*2 + 2], status;
 449         struct iic_msg msgs[args_len + 3];
 450         int i, ret;
 451
 452         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 453
 454         for (i = 0; i < args_len; i++) {
 455                 msgs[i].slave = intel_sdvo->slave_addr << 1;
 456                 msgs[i].flags = 0;
 457                 msgs[i].len = 2;
 458                 msgs[i].buf = buf + 2 *i;
 459                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 460                 buf[2*i + 1] = ((const u8*)args)[i];
 461         }
 462         msgs[i].slave = intel_sdvo->slave_addr << 1;
 463         msgs[i].flags = 0;
 464         msgs[i].len = 2;
 465         msgs[i].buf = buf + 2*i;
 466         buf[2*i + 0] = SDVO_I2C_OPCODE;
 467         buf[2*i + 1] = cmd;
 468
 469         /* the following two are to read the response */
 470         status = SDVO_I2C_CMD_STATUS;
 471         msgs[i+1].slave = intel_sdvo->slave_addr << 1;
 472         msgs[i+1].flags = 0;
 473         msgs[i+1].len = 1;
 474         msgs[i+1].buf = &status;
 475
 476         msgs[i+2].slave = intel_sdvo->slave_addr << 1;
 477         msgs[i+2].flags = IIC_M_RD;
 478         msgs[i+2].len = 1;
 479         msgs[i+2].buf = &status;
 480
 481         ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3);
 482         if (ret != 0) {
 483                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 484                 return (false);
 485         }
 486 #if 0
 487         if (ret != i+3) {
 488                 /* failure in I2C transfer */
 489                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 490                 return false;
 491         }
 492 #endif
 493
 494         return true;
 495 }
 496
 497 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 498                                      void *response, int response_len)
 499 {
 500         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 501         u8 status;
 502         int i;
 503
 504         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
 505
 506         /*
 507          * The documentation states that all commands will be
 508          * processed within 15µs, and that we need only poll
 509          * the status byte a maximum of 3 times in order for the
 510          * command to be complete.
 511          *
 512          * Check 5 times in case the hardware failed to read the docs.
 513          *
 514          * Also beware that the first response by many devices is to
 515          * reply PENDING and stall for time. TVs are notorious for
 516          * requiring longer than specified to complete their replies.
 517          * Originally (in the DDX long ago), the delay was only ever 15ms
 518          * with an additional delay of 30ms applied for TVs added later after
 519          * many experiments. To accommodate both sets of delays, we do a
 520          * sequence of slow checks if the device is falling behind and fails
 521          * to reply within 5*15µs.
 522          */
 523         if (!intel_sdvo_read_byte(intel_sdvo,
 524                                   SDVO_I2C_CMD_STATUS,
 525                                   &status))
 526                 goto log_fail;
 527
 528         while (status == SDVO_CMD_STATUS_PENDING && --retry) {
 529                 if (retry < 10)
 530                         msleep(15);
 531                 else
 532                         udelay(15);
 533
 534                 if (!intel_sdvo_read_byte(intel_sdvo,
 535                                           SDVO_I2C_CMD_STATUS,
 536                                           &status))
 537                         goto log_fail;
 538         }
 539
 540         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 541                 DRM_DEBUG_KMS("(%s)", cmd_status_names[status]);
 542         else
 543                 DRM_DEBUG_KMS("(??? %d)", status);
 544
 545         if (status != SDVO_CMD_STATUS_SUCCESS)
 546                 goto log_fail;
 547
 548         /* Read the command response */
 549         for (i = 0; i < response_len; i++) {
 550                 if (!intel_sdvo_read_byte(intel_sdvo,
 551                                           SDVO_I2C_RETURN_0 + i,
 552                                           &((u8 *)response)[i]))
 553                         goto log_fail;
 554                 DRM_DEBUG_KMS(" %02X", ((u8 *)response)[i]);
 555         }
 556         DRM_DEBUG_KMS("\n");
 557         return true;
 558
 559 log_fail:
 560         DRM_DEBUG_KMS("... failed\n");
 561         return false;
 562 }
 563
 564 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 565 {
 566         if (mode->clock >= 100000)
 567                 return 1;
 568         else if (mode->clock >= 50000)
 569                 return 2;
 570         else
 571                 return 4;
 572 }
 573
 574 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 575                                               u8 ddc_bus)
 576 {
 577         /* This must be the immediately preceding write before the i2c xfer */
 578         return intel_sdvo_write_cmd(intel_sdvo,
 579                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 580                                     &ddc_bus, 1);
 581 }
 582
 583 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 584 {
 585         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 586                 return false;
 587
 588         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 589 }
 590
 591 static bool
 592 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 593 {
 594         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 595                 return false;
 596
 597         return intel_sdvo_read_response(intel_sdvo, value, len);
 598 }
 599
 600 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 601 {
 602         struct intel_sdvo_set_target_input_args targets = {0};
 603         return intel_sdvo_set_value(intel_sdvo,
 604                                     SDVO_CMD_SET_TARGET_INPUT,
 605                                     &targets, sizeof(targets));
 606 }
 607
 608 /**
 609  * Return whether each input is trained.
 610  *
 611  * This function is making an assumption about the layout of the response,
 612  * which should be checked against the docs.
 613  */
 614 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 615 {
 616         struct intel_sdvo_get_trained_inputs_response response;
 617
 618         CTASSERT(sizeof(response) == 1);
 619         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 620                                   &response, sizeof(response)))
 621                 return false;
 622
 623         *input_1 = response.input0_trained;
 624         *input_2 = response.input1_trained;
 625         return true;
 626 }
 627
 628 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 629                                           u16 outputs)
 630 {
 631         return intel_sdvo_set_value(intel_sdvo,
 632                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 633                                     &outputs, sizeof(outputs));
 634 }
 635
 636 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 637                                           u16 *outputs)
 638 {
 639         return intel_sdvo_get_value(intel_sdvo,
 640                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 641                                     outputs, sizeof(*outputs));
 642 }
 643
 644 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 645                                                int mode)
 646 {
 647         u8 state = SDVO_ENCODER_STATE_ON;
 648
 649         switch (mode) {
 650         case DRM_MODE_DPMS_ON:
 651                 state = SDVO_ENCODER_STATE_ON;
 652                 break;
 653         case DRM_MODE_DPMS_STANDBY:
 654                 state = SDVO_ENCODER_STATE_STANDBY;
 655                 break;
 656         case DRM_MODE_DPMS_SUSPEND:
 657                 state = SDVO_ENCODER_STATE_SUSPEND;
 658                 break;
 659         case DRM_MODE_DPMS_OFF:
 660                 state = SDVO_ENCODER_STATE_OFF;
 661                 break;
 662         }
 663
 664         return intel_sdvo_set_value(intel_sdvo,
 665                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 666 }
 667
 668 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 669                                                    int *clock_min,
 670                                                    int *clock_max)
 671 {
 672         struct intel_sdvo_pixel_clock_range clocks;
 673
 674         CTASSERT(sizeof(clocks) == 4);
 675         if (!intel_sdvo_get_value(intel_sdvo,
 676                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 677                                   &clocks, sizeof(clocks)))
 678                 return false;
 679
 680         /* Convert the values from units of 10 kHz to kHz. */
 681         *clock_min = clocks.min * 10;
 682         *clock_max = clocks.max * 10;
 683         return true;
 684 }
 685
 686 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 687                                          u16 outputs)
 688 {
 689         return intel_sdvo_set_value(intel_sdvo,
 690                                     SDVO_CMD_SET_TARGET_OUTPUT,
 691                                     &outputs, sizeof(outputs));
 692 }
 693
 694 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 695                                   struct intel_sdvo_dtd *dtd)
 696 {
 697         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 698                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 699 }
 700
 701 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 702                                          struct intel_sdvo_dtd *dtd)
 703 {
 704         return intel_sdvo_set_timing(intel_sdvo,
 705                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 706 }
 707
 708 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 709                                          struct intel_sdvo_dtd *dtd)
 710 {
 711         return intel_sdvo_set_timing(intel_sdvo,
 712                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 713 }
 714
 715 static bool
 716 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 717                                          uint16_t clock,
 718                                          uint16_t width,
 719                                          uint16_t height)
 720 {
 721         struct intel_sdvo_preferred_input_timing_args args;
 722
 723         memset(&args, 0, sizeof(args));
 724         args.clock = clock;
 725         args.width = width;
 726         args.height = height;
 727         args.interlace = 0;
 728
 729         if (intel_sdvo->is_lvds &&
 730            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 731             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 732                 args.scaled = 1;
 733
 734         return intel_sdvo_set_value(intel_sdvo,
 735                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 736                                     &args, sizeof(args));
 737 }
 738
 739 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 740                                                   struct intel_sdvo_dtd *dtd)
 741 {
 742         CTASSERT(sizeof(dtd->part1) == 8);
 743         CTASSERT(sizeof(dtd->part2) == 8);
 744         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 745                                     &dtd->part1, sizeof(dtd->part1)) &&
 746                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 747                                      &dtd->part2, sizeof(dtd->part2));
 748 }
 749
 750 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 751 {
 752         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 753 }
 754
 755 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 756                                          const struct drm_display_mode *mode)
 757 {
 758         uint16_t width, height;
 759         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 760         uint16_t h_sync_offset, v_sync_offset;
 761         int mode_clock;
 762
 763         width = mode->hdisplay;
 764         height = mode->vdisplay;
 765
 766         /* do some mode translations */
 767         h_blank_len = mode->htotal - mode->hdisplay;
 768         h_sync_len = mode->hsync_end - mode->hsync_start;
 769
 770         v_blank_len = mode->vtotal - mode->vdisplay;
 771         v_sync_len = mode->vsync_end - mode->vsync_start;
 772
 773         h_sync_offset = mode->hsync_start - mode->hdisplay;
 774         v_sync_offset = mode->vsync_start - mode->vdisplay;
 775
 776         mode_clock = mode->clock;
 777         mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
 778         mode_clock /= 10;
 779         dtd->part1.clock = mode_clock;
 780
 781         dtd->part1.h_active = width & 0xff;
 782         dtd->part1.h_blank = h_blank_len & 0xff;
 783         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 784                 ((h_blank_len >> 8) & 0xf);
 785         dtd->part1.v_active = height & 0xff;
 786         dtd->part1.v_blank = v_blank_len & 0xff;
 787         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 788                 ((v_blank_len >> 8) & 0xf);
 789
 790         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 791         dtd->part2.h_sync_width = h_sync_len & 0xff;
 792         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 793                 (v_sync_len & 0xf);
 794         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 795                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 796                 ((v_sync_len & 0x30) >> 4);
 797
 798         dtd->part2.dtd_flags = 0x18;
 799         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 800                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 801         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 802                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 803         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 804                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 805
 806         dtd->part2.sdvo_flags = 0;
 807         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 808         dtd->part2.reserved = 0;
 809 }
 810
 811 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 812                                          const struct intel_sdvo_dtd *dtd)
 813 {
 814         mode->hdisplay = dtd->part1.h_active;
 815         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 816         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 817         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 818         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 819         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 820         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 821         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 822
 823         mode->vdisplay = dtd->part1.v_active;
 824         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 825         mode->vsync_start = mode->vdisplay;
 826         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 827         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 828         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 829         mode->vsync_end = mode->vsync_start +
 830                 (dtd->part2.v_sync_off_width & 0xf);
 831         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 832         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 833         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 834
 835         mode->clock = dtd->part1.clock * 10;
 836
 837         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 838         if (dtd->part2.dtd_flags & 0x2)
 839                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 840         if (dtd->part2.dtd_flags & 0x4)
 841                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 842 }
 843
 844 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 845 {
 846         struct intel_sdvo_encode encode;
 847
 848         CTASSERT(sizeof(encode) == 2);
 849         return intel_sdvo_get_value(intel_sdvo,
 850                                   SDVO_CMD_GET_SUPP_ENCODE,
 851                                   &encode, sizeof(encode));
 852 }
 853
 854 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 855                                   uint8_t mode)
 856 {
 857         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 858 }
 859
 860 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 861                                        uint8_t mode)
 862 {
 863         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 864 }
 865
 866 #if 0
 867 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 868 {
 869         int i, j;
 870         uint8_t set_buf_index[2];
 871         uint8_t av_split;
 872         uint8_t buf_size;
 873         uint8_t buf[48];
 874         uint8_t *pos;
 875
 876         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 877
 878         for (i = 0; i <= av_split; i++) {
 879                 set_buf_index[0] = i; set_buf_index[1] = 0;
 880                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 881                                      set_buf_index, 2);
 882                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 883                 intel_sdvo_read_response(encoder, &buf_size, 1);
 884
 885                 pos = buf;
 886                 for (j = 0; j <= buf_size; j += 8) {
 887                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 888                                              NULL, 0);
 889                         intel_sdvo_read_response(encoder, pos, 8);
 890                         pos += 8;
 891                 }
 892         }
 893 }
 894 #endif
 895
 896 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 897                                        unsigned if_index, uint8_t tx_rate,
 898                                        uint8_t *data, unsigned length)
 899 {
 900         uint8_t set_buf_index[2] = { if_index, 0 };
 901         uint8_t hbuf_size, tmp[8];
 902         int i;
 903
 904         if (!intel_sdvo_set_value(intel_sdvo,
 905                                   SDVO_CMD_SET_HBUF_INDEX,
 906                                   set_buf_index, 2))
 907                 return false;
 908
 909         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 910                                   &hbuf_size, 1))
 911                 return false;
 912
 913         /* Buffer size is 0 based, hooray! */
 914         hbuf_size++;
 915
 916         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 917                       if_index, length, hbuf_size);
 918
 919         for (i = 0; i < hbuf_size; i += 8) {
 920                 memset(tmp, 0, 8);
 921                 if (i < length)
 922                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 923
 924                 if (!intel_sdvo_set_value(intel_sdvo,
 925                                           SDVO_CMD_SET_HBUF_DATA,
 926                                           tmp, 8))
 927                         return false;
 928         }
 929
 930         return intel_sdvo_set_value(intel_sdvo,
 931                                     SDVO_CMD_SET_HBUF_TXRATE,
 932                                     &tx_rate, 1);
 933 }
 934
 935 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
 936 {
 937         struct dip_infoframe avi_if = {
 938                 .type = DIP_TYPE_AVI,
 939                 .ver = DIP_VERSION_AVI,
 940                 .len = DIP_LEN_AVI,
 941         };
 942         uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
 943
 944         intel_dip_infoframe_csum(&avi_if);
 945
 946         /* sdvo spec says that the ecc is handled by the hw, and it looks like
 947          * we must not send the ecc field, either. */
 948         memcpy(sdvo_data, &avi_if, 3);
 949         sdvo_data[3] = avi_if.checksum;
 950         memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
 951
 952         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
 953                                           SDVO_HBUF_TX_VSYNC,
 954                                           sdvo_data, sizeof(sdvo_data));
 955 }
 956
 957 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
 958 {
 959         struct intel_sdvo_tv_format format;
 960         uint32_t format_map;
 961
 962         format_map = 1 << intel_sdvo->tv_format_index;
 963         memset(&format, 0, sizeof(format));
 964         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 965
 966         CTASSERT(sizeof(format) == 6);
 967         return intel_sdvo_set_value(intel_sdvo,
 968                                     SDVO_CMD_SET_TV_FORMAT,
 969                                     &format, sizeof(format));
 970 }
 971
 972 static bool
 973 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
 974                                         const struct drm_display_mode *mode)
 975 {
 976         struct intel_sdvo_dtd output_dtd;
 977
 978         if (!intel_sdvo_set_target_output(intel_sdvo,
 979                                           intel_sdvo->attached_output))
 980                 return false;
 981
 982         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
 983         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
 984                 return false;
 985
 986         return true;
 987 }
 988
 989 /* Asks the sdvo controller for the preferred input mode given the output mode.
 990  * Unfortunately we have to set up the full output mode to do that. */
 991 static bool
 992 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
 993                                     const struct drm_display_mode *mode,
 994                                     struct drm_display_mode *adjusted_mode)
 995 {
 996         struct intel_sdvo_dtd input_dtd;
 997
 998         /* Reset the input timing to the screen. Assume always input 0. */
 999         if (!intel_sdvo_set_target_input(intel_sdvo))
1000                 return false;
1001
1002         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1003                                                       mode->clock / 10,
1004                                                       mode->hdisplay,
1005                                                       mode->vdisplay))
1006                 return false;
1007
1008         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1009                                                    &input_dtd))
1010                 return false;
1011
1012         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1013         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1014
1015         return true;
1016 }
1017
1018 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1019                                   const struct drm_display_mode *mode,
1020                                   struct drm_display_mode *adjusted_mode)
1021 {
1022         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1023         int multiplier;
1024
1025         /* We need to construct preferred input timings based on our
1026          * output timings.  To do that, we have to set the output
1027          * timings, even though this isn't really the right place in
1028          * the sequence to do it. Oh well.
1029          */
1030         if (intel_sdvo->is_tv) {
1031                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1032                         return false;
1033
1034                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1035                                                            mode,
1036                                                            adjusted_mode);
1037         } else if (intel_sdvo->is_lvds) {
1038                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1039                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1040                         return false;
1041
1042                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1043                                                            mode,
1044                                                            adjusted_mode);
1045         }
1046
1047         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1048          * SDVO device will factor out the multiplier during mode_set.
1049          */
1050         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1051         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1052
1053         return true;
1054 }
1055
1056 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1057                                 struct drm_display_mode *mode,
1058                                 struct drm_display_mode *adjusted_mode)
1059 {
1060         struct drm_device *dev = encoder->dev;
1061         struct drm_i915_private *dev_priv = dev->dev_private;
1062         struct drm_crtc *crtc = encoder->crtc;
1063         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1064         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1065         u32 sdvox;
1066         struct intel_sdvo_in_out_map in_out;
1067         struct intel_sdvo_dtd input_dtd, output_dtd;
1068         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1069         int rate;
1070
1071         if (!mode)
1072                 return;
1073
1074         /* First, set the input mapping for the first input to our controlled
1075          * output. This is only correct if we're a single-input device, in
1076          * which case the first input is the output from the appropriate SDVO
1077          * channel on the motherboard.  In a two-input device, the first input
1078          * will be SDVOB and the second SDVOC.
1079          */
1080         in_out.in0 = intel_sdvo->attached_output;
1081         in_out.in1 = 0;
1082
1083         intel_sdvo_set_value(intel_sdvo,
1084                              SDVO_CMD_SET_IN_OUT_MAP,
1085                              &in_out, sizeof(in_out));
1086
1087         /* Set the output timings to the screen */
1088         if (!intel_sdvo_set_target_output(intel_sdvo,
1089                                           intel_sdvo->attached_output))
1090                 return;
1091
1092         /* lvds has a special fixed output timing. */
1093         if (intel_sdvo->is_lvds)
1094                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1095                                              intel_sdvo->sdvo_lvds_fixed_mode);
1096         else
1097                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1098         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1099                 DRM_INFO("Setting output timings on %s failed\n",
1100                          SDVO_NAME(intel_sdvo));
1101
1102         /* Set the input timing to the screen. Assume always input 0. */
1103         if (!intel_sdvo_set_target_input(intel_sdvo))
1104                 return;
1105
1106         if (intel_sdvo->has_hdmi_monitor) {
1107                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1108                 intel_sdvo_set_colorimetry(intel_sdvo,
1109                                            SDVO_COLORIMETRY_RGB256);
1110                 intel_sdvo_set_avi_infoframe(intel_sdvo);
1111         } else
1112                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1113
1114         if (intel_sdvo->is_tv &&
1115             !intel_sdvo_set_tv_format(intel_sdvo))
1116                 return;
1117
1118         /* We have tried to get input timing in mode_fixup, and filled into
1119          * adjusted_mode.
1120          */
1121         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1122         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1123                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1124         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1125                 DRM_INFO("Setting input timings on %s failed\n",
1126                          SDVO_NAME(intel_sdvo));
1127
1128         switch (pixel_multiplier) {
1129         default:
1130         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1131         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1132         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1133         }
1134         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1135                 return;
1136
1137         /* Set the SDVO control regs. */
1138         if (INTEL_INFO(dev)->gen >= 4) {
1139                 /* The real mode polarity is set by the SDVO commands, using
1140                  * struct intel_sdvo_dtd. */
1141                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1142                 if (intel_sdvo->is_hdmi)
1143                         sdvox |= intel_sdvo->color_range;
1144                 if (INTEL_INFO(dev)->gen < 5)
1145                         sdvox |= SDVO_BORDER_ENABLE;
1146         } else {
1147                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1148                 switch (intel_sdvo->sdvo_reg) {
1149                 case SDVOB:
1150                         sdvox &= SDVOB_PRESERVE_MASK;
1151                         break;
1152                 case SDVOC:
1153                         sdvox &= SDVOC_PRESERVE_MASK;
1154                         break;
1155                 }
1156                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1157         }
1158
1159         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1160                 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1161         else
1162                 sdvox |= TRANSCODER(intel_crtc->pipe);
1163
1164         if (intel_sdvo->has_hdmi_audio)
1165                 sdvox |= SDVO_AUDIO_ENABLE;
1166
1167         if (INTEL_INFO(dev)->gen >= 4) {
1168                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1169         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1170                 /* done in crtc_mode_set as it lives inside the dpll register */
1171         } else {
1172                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1173         }
1174
1175         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1176             INTEL_INFO(dev)->gen < 5)
1177                 sdvox |= SDVO_STALL_SELECT;
1178         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1179 }
1180
1181 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1182 {
1183         struct intel_sdvo_connector *intel_sdvo_connector =
1184                 to_intel_sdvo_connector(&connector->base);
1185         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1186         u16 active_outputs;
1187
1188         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1189
1190         if (active_outputs & intel_sdvo_connector->output_flag)
1191                 return true;
1192         else
1193                 return false;
1194 }
1195
1196 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1197                                     enum i915_pipe *pipe)
1198 {
1199         struct drm_device *dev = encoder->base.dev;
1200         struct drm_i915_private *dev_priv = dev->dev_private;
1201         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1202         u16 active_outputs;
1203         u32 tmp;
1204
1205         tmp = I915_READ(intel_sdvo->sdvo_reg);
1206         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1207
1208         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1209                 return false;
1210
1211         if (HAS_PCH_CPT(dev))
1212                 *pipe = PORT_TO_PIPE_CPT(tmp);
1213         else
1214                 *pipe = PORT_TO_PIPE(tmp);
1215
1216         return true;
1217 }
1218
1219 static void intel_disable_sdvo(struct intel_encoder *encoder)
1220 {
1221         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1222         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1223         u32 temp;
1224
1225         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1226         if (0)
1227                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1228                                                    DRM_MODE_DPMS_OFF);
1229
1230         temp = I915_READ(intel_sdvo->sdvo_reg);
1231         if ((temp & SDVO_ENABLE) != 0) {
1232                 /* HW workaround for IBX, we need to move the port to
1233                  * transcoder A before disabling it. */
1234                 if (HAS_PCH_IBX(encoder->base.dev)) {
1235                         struct drm_crtc *crtc = encoder->base.crtc;
1236                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1237
1238                         if (temp & SDVO_PIPE_B_SELECT) {
1239                                 temp &= ~SDVO_PIPE_B_SELECT;
1240                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1241                                 POSTING_READ(intel_sdvo->sdvo_reg);
1242
1243                                 /* Again we need to write this twice. */
1244                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1245                                 POSTING_READ(intel_sdvo->sdvo_reg);
1246
1247                                 /* Transcoder selection bits only update
1248                                  * effectively on vblank. */
1249                                 if (crtc)
1250                                         intel_wait_for_vblank(encoder->base.dev, pipe);
1251                                 else
1252                                         msleep(50);
1253                         }
1254                 }
1255
1256                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1257         }
1258 }
1259
1260 static void intel_enable_sdvo(struct intel_encoder *encoder)
1261 {
1262         struct drm_device *dev = encoder->base.dev;
1263         struct drm_i915_private *dev_priv = dev->dev_private;
1264         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1265         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1266         u32 temp;
1267         bool input1, input2;
1268         int i;
1269         u8 status;
1270
1271         temp = I915_READ(intel_sdvo->sdvo_reg);
1272         if ((temp & SDVO_ENABLE) == 0) {
1273                 /* HW workaround for IBX, we need to move the port
1274                  * to transcoder A before disabling it. */
1275                 if (HAS_PCH_IBX(dev)) {
1276                         struct drm_crtc *crtc = encoder->base.crtc;
1277                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1278
1279                         /* Restore the transcoder select bit. */
1280                         if (pipe == PIPE_B)
1281                                 temp |= SDVO_PIPE_B_SELECT;
1282                 }
1283
1284                 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1285         }
1286         for (i = 0; i < 2; i++)
1287                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1288
1289         status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1290         /* Warn if the device reported failure to sync.
1291          * A lot of SDVO devices fail to notify of sync, but it's
1292          * a given it the status is a success, we succeeded.
1293          */
1294         if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1295                 DRM_DEBUG_KMS("First %s output reported failure to "
1296                                 "sync\n", SDVO_NAME(intel_sdvo));
1297         }
1298
1299         if (0)
1300                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1301                                                    DRM_MODE_DPMS_ON);
1302         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1303 }
1304
1305 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1306 {
1307         struct drm_crtc *crtc;
1308         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1309
1310         /* dvo supports only 2 dpms states. */
1311         if (mode != DRM_MODE_DPMS_ON)
1312                 mode = DRM_MODE_DPMS_OFF;
1313
1314         if (mode == connector->dpms)
1315                 return;
1316
1317         connector->dpms = mode;
1318
1319         /* Only need to change hw state when actually enabled */
1320         crtc = intel_sdvo->base.base.crtc;
1321         if (!crtc) {
1322                 intel_sdvo->base.connectors_active = false;
1323                 return;
1324         }
1325
1326         if (mode != DRM_MODE_DPMS_ON) {
1327                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1328                 if (0)
1329                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1330
1331                 intel_sdvo->base.connectors_active = false;
1332
1333                 intel_crtc_update_dpms(crtc);
1334         } else {
1335                 intel_sdvo->base.connectors_active = true;
1336
1337                 intel_crtc_update_dpms(crtc);
1338
1339                 if (0)
1340                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1341                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1342         }
1343
1344         intel_modeset_check_state(connector->dev);
1345 }
1346
1347 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1348                                  struct drm_display_mode *mode)
1349 {
1350         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1351
1352         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1353                 return MODE_NO_DBLESCAN;
1354
1355         if (intel_sdvo->pixel_clock_min > mode->clock)
1356                 return MODE_CLOCK_LOW;
1357
1358         if (intel_sdvo->pixel_clock_max < mode->clock)
1359                 return MODE_CLOCK_HIGH;
1360
1361         if (intel_sdvo->is_lvds) {
1362                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1363                         return MODE_PANEL;
1364
1365                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1366                         return MODE_PANEL;
1367         }
1368
1369         return MODE_OK;
1370 }
1371
1372 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1373 {
1374         CTASSERT(sizeof(*caps) == 8);
1375         if (!intel_sdvo_get_value(intel_sdvo,
1376                                   SDVO_CMD_GET_DEVICE_CAPS,
1377                                   caps, sizeof(*caps)))
1378                 return false;
1379
1380         DRM_DEBUG_KMS("SDVO capabilities:\n"
1381                       "  vendor_id: %d\n"
1382                       "  device_id: %d\n"
1383                       "  device_rev_id: %d\n"
1384                       "  sdvo_version_major: %d\n"
1385                       "  sdvo_version_minor: %d\n"
1386                       "  sdvo_inputs_mask: %d\n"
1387                       "  smooth_scaling: %d\n"
1388                       "  sharp_scaling: %d\n"
1389                       "  up_scaling: %d\n"
1390                       "  down_scaling: %d\n"
1391                       "  stall_support: %d\n"
1392                       "  output_flags: %d\n",
1393                       caps->vendor_id,
1394                       caps->device_id,
1395                       caps->device_rev_id,
1396                       caps->sdvo_version_major,
1397                       caps->sdvo_version_minor,
1398                       caps->sdvo_inputs_mask,
1399                       caps->smooth_scaling,
1400                       caps->sharp_scaling,
1401                       caps->up_scaling,
1402                       caps->down_scaling,
1403                       caps->stall_support,
1404                       caps->output_flags);
1405
1406         return true;
1407 }
1408
1409 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1410 {
1411         struct drm_device *dev = intel_sdvo->base.base.dev;
1412         u8 response[2];
1413
1414         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1415          * on the line. */
1416         if (IS_I945G(dev) || IS_I945GM(dev))
1417                 return false;
1418
1419         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1420                                     &response, 2) && response[0];
1421 }
1422
1423 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1424 {
1425         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1426
1427         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1428                              &intel_sdvo->hotplug_active, 2);
1429 }
1430
1431 static bool
1432 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1433 {
1434         /* Is there more than one type of output? */
1435         return bitcount16(intel_sdvo->caps.output_flags) > 1;
1436 }
1437
1438 static struct edid *
1439 intel_sdvo_get_edid(struct drm_connector *connector)
1440 {
1441         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1442         return drm_get_edid(connector, sdvo->ddc);
1443 }
1444
1445 /* Mac mini hack -- use the same DDC as the analog connector */
1446 static struct edid *
1447 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1448 {
1449         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1450
1451         return drm_get_edid(connector,
1452                             intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin));
1453 }
1454
1455 static enum drm_connector_status
1456 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1457 {
1458         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1459         enum drm_connector_status status;
1460         struct edid *edid;
1461
1462         edid = intel_sdvo_get_edid(connector);
1463
1464         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1465                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1466
1467                 /*
1468                  * Don't use the 1 as the argument of DDC bus switch to get
1469                  * the EDID. It is used for SDVO SPD ROM.
1470                  */
1471                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1472                         intel_sdvo->ddc_bus = ddc;
1473                         edid = intel_sdvo_get_edid(connector);
1474                         if (edid)
1475                                 break;
1476                 }
1477                 /*
1478                  * If we found the EDID on the other bus,
1479                  * assume that is the correct DDC bus.
1480                  */
1481                 if (edid == NULL)
1482                         intel_sdvo->ddc_bus = saved_ddc;
1483         }
1484
1485         /*
1486          * When there is no edid and no monitor is connected with VGA
1487          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1488          */
1489         if (edid == NULL)
1490                 edid = intel_sdvo_get_analog_edid(connector);
1491
1492         status = connector_status_unknown;
1493         if (edid != NULL) {
1494                 /* DDC bus is shared, match EDID to connector type */
1495                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1496                         status = connector_status_connected;
1497                         if (intel_sdvo->is_hdmi) {
1498                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1499                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1500                         }
1501                 } else
1502                         status = connector_status_disconnected;
1503                 drm_free(edid, DRM_MEM_KMS);
1504         }
1505
1506         if (status == connector_status_connected) {
1507                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1508                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1509                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1510         }
1511
1512         return status;
1513 }
1514
1515 static bool
1516 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1517                                   struct edid *edid)
1518 {
1519         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1520         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1521
1522         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1523                       connector_is_digital, monitor_is_digital);
1524         return connector_is_digital == monitor_is_digital;
1525 }
1526
1527 static enum drm_connector_status
1528 intel_sdvo_detect(struct drm_connector *connector, bool force)
1529 {
1530         uint16_t response;
1531         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1532         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1533         enum drm_connector_status ret;
1534
1535         if (!intel_sdvo_get_value(intel_sdvo,
1536                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1537                                   &response, 2))
1538                 return connector_status_unknown;
1539
1540         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1541                       response & 0xff, response >> 8,
1542                       intel_sdvo_connector->output_flag);
1543
1544         if (response == 0)
1545                 return connector_status_disconnected;
1546
1547         intel_sdvo->attached_output = response;
1548
1549         intel_sdvo->has_hdmi_monitor = false;
1550         intel_sdvo->has_hdmi_audio = false;
1551
1552         if ((intel_sdvo_connector->output_flag & response) == 0)
1553                 ret = connector_status_disconnected;
1554         else if (IS_TMDS(intel_sdvo_connector))
1555                 ret = intel_sdvo_tmds_sink_detect(connector);
1556         else {
1557                 struct edid *edid;
1558
1559                 /* if we have an edid check it matches the connection */
1560                 edid = intel_sdvo_get_edid(connector);
1561                 if (edid == NULL)
1562                         edid = intel_sdvo_get_analog_edid(connector);
1563                 if (edid != NULL) {
1564                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1565                                                               edid))
1566                                 ret = connector_status_connected;
1567                         else
1568                                 ret = connector_status_disconnected;
1569
1570                         kfree(edid, DRM_MEM_KMS);
1571                 } else
1572                         ret = connector_status_connected;
1573         }
1574
1575         /* May update encoder flag for like clock for SDVO TV, etc.*/
1576         if (ret == connector_status_connected) {
1577                 intel_sdvo->is_tv = false;
1578                 intel_sdvo->is_lvds = false;
1579                 intel_sdvo->base.needs_tv_clock = false;
1580
1581                 if (response & SDVO_TV_MASK) {
1582                         intel_sdvo->is_tv = true;
1583                         intel_sdvo->base.needs_tv_clock = true;
1584                 }
1585                 if (response & SDVO_LVDS_MASK)
1586                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1587         }
1588
1589         return ret;
1590 }
1591
1592 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1593 {
1594         struct edid *edid;
1595
1596         /* set the bus switch and get the modes */
1597         edid = intel_sdvo_get_edid(connector);
1598
1599         /*
1600          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1601          * link between analog and digital outputs. So, if the regular SDVO
1602          * DDC fails, check to see if the analog output is disconnected, in
1603          * which case we'll look there for the digital DDC data.
1604          */
1605         if (edid == NULL)
1606                 edid = intel_sdvo_get_analog_edid(connector);
1607
1608         if (edid != NULL) {
1609                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1610                                                       edid)) {
1611                         drm_mode_connector_update_edid_property(connector, edid);
1612                         drm_add_edid_modes(connector, edid);
1613                 }
1614
1615                 drm_free(edid, DRM_MEM_KMS);
1616         }
1617 }
1618
1619 /*
1620  * Set of SDVO TV modes.
1621  * Note!  This is in reply order (see loop in get_tv_modes).
1622  * XXX: all 60Hz refresh?
1623  */
1624 static const struct drm_display_mode sdvo_tv_modes[] = {
1625         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1626                    416, 0, 200, 201, 232, 233, 0,
1627                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1628         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1629                    416, 0, 240, 241, 272, 273, 0,
1630                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1631         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1632                    496, 0, 300, 301, 332, 333, 0,
1633                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1634         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1635                    736, 0, 350, 351, 382, 383, 0,
1636                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1637         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1638                    736, 0, 400, 401, 432, 433, 0,
1639                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1640         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1641                    736, 0, 480, 481, 512, 513, 0,
1642                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1643         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1644                    800, 0, 480, 481, 512, 513, 0,
1645                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1646         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1647                    800, 0, 576, 577, 608, 609, 0,
1648                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1649         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1650                    816, 0, 350, 351, 382, 383, 0,
1651                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1652         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1653                    816, 0, 400, 401, 432, 433, 0,
1654                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1655         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1656                    816, 0, 480, 481, 512, 513, 0,
1657                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1658         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1659                    816, 0, 540, 541, 572, 573, 0,
1660                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1661         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1662                    816, 0, 576, 577, 608, 609, 0,
1663                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1664         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1665                    864, 0, 576, 577, 608, 609, 0,
1666                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1667         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1668                    896, 0, 600, 601, 632, 633, 0,
1669                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1670         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1671                    928, 0, 624, 625, 656, 657, 0,
1672                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1673         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1674                    1016, 0, 766, 767, 798, 799, 0,
1675                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1676         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1677                    1120, 0, 768, 769, 800, 801, 0,
1678                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1679         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1680                    1376, 0, 1024, 1025, 1056, 1057, 0,
1681                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1682 };
1683
1684 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1685 {
1686         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1687         struct intel_sdvo_sdtv_resolution_request tv_res;
1688         uint32_t reply = 0, format_map = 0;
1689         int i;
1690
1691         /* Read the list of supported input resolutions for the selected TV
1692          * format.
1693          */
1694         format_map = 1 << intel_sdvo->tv_format_index;
1695         memcpy(&tv_res, &format_map,
1696                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1697
1698         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1699                 return;
1700
1701         CTASSERT(sizeof(tv_res) == 3);
1702         if (!intel_sdvo_write_cmd(intel_sdvo,
1703                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1704                                   &tv_res, sizeof(tv_res)))
1705                 return;
1706         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1707                 return;
1708
1709         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1710                 if (reply & (1 << i)) {
1711                         struct drm_display_mode *nmode;
1712                         nmode = drm_mode_duplicate(connector->dev,
1713                                                    &sdvo_tv_modes[i]);
1714                         if (nmode)
1715                                 drm_mode_probed_add(connector, nmode);
1716                 }
1717 }
1718
1719 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1720 {
1721         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1722         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1723         struct drm_display_mode *newmode;
1724
1725         /*
1726          * Attempt to get the mode list from DDC.
1727          * Assume that the preferred modes are
1728          * arranged in priority order.
1729          */
1730         intel_ddc_get_modes(connector, intel_sdvo->i2c);
1731         if (!list_empty(&connector->probed_modes))
1732                 goto end;
1733
1734         /* Fetch modes from VBT */
1735         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1736                 newmode = drm_mode_duplicate(connector->dev,
1737                                              dev_priv->sdvo_lvds_vbt_mode);
1738                 if (newmode != NULL) {
1739                         /* Guarantee the mode is preferred */
1740                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1741                                          DRM_MODE_TYPE_DRIVER);
1742                         drm_mode_probed_add(connector, newmode);
1743                 }
1744         }
1745
1746 end:
1747         list_for_each_entry(newmode, &connector->probed_modes, head) {
1748                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1749                         intel_sdvo->sdvo_lvds_fixed_mode =
1750                                 drm_mode_duplicate(connector->dev, newmode);
1751
1752                         intel_sdvo->is_lvds = true;
1753                         break;
1754                 }
1755         }
1756
1757 }
1758
1759 static int intel_sdvo_get_modes(struct drm_connector *connector)
1760 {
1761         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1762
1763         if (IS_TV(intel_sdvo_connector))
1764                 intel_sdvo_get_tv_modes(connector);
1765         else if (IS_LVDS(intel_sdvo_connector))
1766                 intel_sdvo_get_lvds_modes(connector);
1767         else
1768                 intel_sdvo_get_ddc_modes(connector);
1769
1770         return !list_empty(&connector->probed_modes);
1771 }
1772
1773 static void
1774 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1775 {
1776         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1777         struct drm_device *dev = connector->dev;
1778
1779         if (intel_sdvo_connector->left)
1780                 drm_property_destroy(dev, intel_sdvo_connector->left);
1781         if (intel_sdvo_connector->right)
1782                 drm_property_destroy(dev, intel_sdvo_connector->right);
1783         if (intel_sdvo_connector->top)
1784                 drm_property_destroy(dev, intel_sdvo_connector->top);
1785         if (intel_sdvo_connector->bottom)
1786                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1787         if (intel_sdvo_connector->hpos)
1788                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1789         if (intel_sdvo_connector->vpos)
1790                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1791         if (intel_sdvo_connector->saturation)
1792                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1793         if (intel_sdvo_connector->contrast)
1794                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1795         if (intel_sdvo_connector->hue)
1796                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1797         if (intel_sdvo_connector->sharpness)
1798                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1799         if (intel_sdvo_connector->flicker_filter)
1800                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1801         if (intel_sdvo_connector->flicker_filter_2d)
1802                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1803         if (intel_sdvo_connector->flicker_filter_adaptive)
1804                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1805         if (intel_sdvo_connector->tv_luma_filter)
1806                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1807         if (intel_sdvo_connector->tv_chroma_filter)
1808                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1809         if (intel_sdvo_connector->dot_crawl)
1810                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1811         if (intel_sdvo_connector->brightness)
1812                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1813 }
1814
1815 static void intel_sdvo_destroy(struct drm_connector *connector)
1816 {
1817         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1818
1819         if (intel_sdvo_connector->tv_format)
1820                 drm_property_destroy(connector->dev,
1821                                      intel_sdvo_connector->tv_format);
1822
1823         intel_sdvo_destroy_enhance_property(connector);
1824 #if 0
1825         drm_sysfs_connector_remove(connector);
1826 #endif
1827         drm_connector_cleanup(connector);
1828         drm_free(intel_sdvo_connector, DRM_MEM_KMS);
1829 }
1830
1831 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1832 {
1833         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1834         struct edid *edid;
1835         bool has_audio = false;
1836
1837         if (!intel_sdvo->is_hdmi)
1838                 return false;
1839
1840         edid = intel_sdvo_get_edid(connector);
1841         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1842                 has_audio = drm_detect_monitor_audio(edid);
1843
1844         return has_audio;
1845 }
1846
1847 static int
1848 intel_sdvo_set_property(struct drm_connector *connector,
1849                         struct drm_property *property,
1850                         uint64_t val)
1851 {
1852         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1853         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1854         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1855         uint16_t temp_value;
1856         uint8_t cmd;
1857         int ret;
1858
1859         ret = drm_object_property_set_value(&connector->base, property, val);
1860         if (ret)
1861                 return ret;
1862
1863         if (property == dev_priv->force_audio_property) {
1864                 int i = val;
1865                 bool has_audio;
1866
1867                 if (i == intel_sdvo_connector->force_audio)
1868                         return 0;
1869
1870                 intel_sdvo_connector->force_audio = i;
1871
1872                 if (i == HDMI_AUDIO_AUTO)
1873                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
1874                 else
1875                         has_audio = (i == HDMI_AUDIO_ON);
1876
1877                 if (has_audio == intel_sdvo->has_hdmi_audio)
1878                         return 0;
1879
1880                 intel_sdvo->has_hdmi_audio = has_audio;
1881                 goto done;
1882         }
1883
1884         if (property == dev_priv->broadcast_rgb_property) {
1885                 if (val == !!intel_sdvo->color_range)
1886                         return 0;
1887
1888                 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1889                 goto done;
1890         }
1891
1892 #define CHECK_PROPERTY(name, NAME) \
1893         if (intel_sdvo_connector->name == property) { \
1894                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1895                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1896                 cmd = SDVO_CMD_SET_##NAME; \
1897                 intel_sdvo_connector->cur_##name = temp_value; \
1898                 goto set_value; \
1899         }
1900
1901         if (property == intel_sdvo_connector->tv_format) {
1902                 if (val >= TV_FORMAT_NUM)
1903                         return -EINVAL;
1904
1905                 if (intel_sdvo->tv_format_index ==
1906                     intel_sdvo_connector->tv_format_supported[val])
1907                         return 0;
1908
1909                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1910                 goto done;
1911         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1912                 temp_value = val;
1913                 if (intel_sdvo_connector->left == property) {
1914                         drm_object_property_set_value(&connector->base,
1915                                                          intel_sdvo_connector->right, val);
1916                         if (intel_sdvo_connector->left_margin == temp_value)
1917                                 return 0;
1918
1919                         intel_sdvo_connector->left_margin = temp_value;
1920                         intel_sdvo_connector->right_margin = temp_value;
1921                         temp_value = intel_sdvo_connector->max_hscan -
1922                                 intel_sdvo_connector->left_margin;
1923                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1924                         goto set_value;
1925                 } else if (intel_sdvo_connector->right == property) {
1926                         drm_object_property_set_value(&connector->base,
1927                                                          intel_sdvo_connector->left, val);
1928                         if (intel_sdvo_connector->right_margin == temp_value)
1929                                 return 0;
1930
1931                         intel_sdvo_connector->left_margin = temp_value;
1932                         intel_sdvo_connector->right_margin = temp_value;
1933                         temp_value = intel_sdvo_connector->max_hscan -
1934                                 intel_sdvo_connector->left_margin;
1935                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1936                         goto set_value;
1937                 } else if (intel_sdvo_connector->top == property) {
1938                         drm_object_property_set_value(&connector->base,
1939                                                          intel_sdvo_connector->bottom, val);
1940                         if (intel_sdvo_connector->top_margin == temp_value)
1941                                 return 0;
1942
1943                         intel_sdvo_connector->top_margin = temp_value;
1944                         intel_sdvo_connector->bottom_margin = temp_value;
1945                         temp_value = intel_sdvo_connector->max_vscan -
1946                                 intel_sdvo_connector->top_margin;
1947                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1948                         goto set_value;
1949                 } else if (intel_sdvo_connector->bottom == property) {
1950                         drm_object_property_set_value(&connector->base,
1951                                                          intel_sdvo_connector->top, val);
1952                         if (intel_sdvo_connector->bottom_margin == temp_value)
1953                                 return 0;
1954
1955                         intel_sdvo_connector->top_margin = temp_value;
1956                         intel_sdvo_connector->bottom_margin = temp_value;
1957                         temp_value = intel_sdvo_connector->max_vscan -
1958                                 intel_sdvo_connector->top_margin;
1959                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1960                         goto set_value;
1961                 }
1962                 CHECK_PROPERTY(hpos, HPOS)
1963                 CHECK_PROPERTY(vpos, VPOS)
1964                 CHECK_PROPERTY(saturation, SATURATION)
1965                 CHECK_PROPERTY(contrast, CONTRAST)
1966                 CHECK_PROPERTY(hue, HUE)
1967                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1968                 CHECK_PROPERTY(sharpness, SHARPNESS)
1969                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1970                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1971                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1972                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1973                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1974                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1975         }
1976
1977         return -EINVAL; /* unknown property */
1978
1979 set_value:
1980         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1981                 return -EIO;
1982
1983
1984 done:
1985         if (intel_sdvo->base.base.crtc) {
1986                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1987                 intel_set_mode(crtc, &crtc->mode,
1988                                crtc->x, crtc->y, crtc->fb);
1989         }
1990
1991         return 0;
1992 #undef CHECK_PROPERTY
1993 }
1994
1995 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1996         .mode_fixup = intel_sdvo_mode_fixup,
1997         .mode_set = intel_sdvo_mode_set,
1998         .disable = intel_encoder_noop,
1999 };
2000
2001 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2002         .dpms = intel_sdvo_dpms,
2003         .detect = intel_sdvo_detect,
2004         .fill_modes = drm_helper_probe_single_connector_modes,
2005         .set_property = intel_sdvo_set_property,
2006         .destroy = intel_sdvo_destroy,
2007 };
2008
2009 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2010         .get_modes = intel_sdvo_get_modes,
2011         .mode_valid = intel_sdvo_mode_valid,
2012         .best_encoder = intel_best_encoder,
2013 };
2014
2015 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2016 {
2017         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
2018
2019         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2020                 drm_mode_destroy(encoder->dev,
2021                                  intel_sdvo->sdvo_lvds_fixed_mode);
2022
2023         device_delete_child(intel_sdvo->base.base.dev->dev,
2024             intel_sdvo->ddc_iic_bus);
2025         intel_encoder_destroy(encoder);
2026 }
2027
2028 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2029         .destroy = intel_sdvo_enc_destroy,
2030 };
2031
2032 static void
2033 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2034 {
2035         uint16_t mask = 0;
2036         unsigned int num_bits;
2037
2038         /* Make a mask of outputs less than or equal to our own priority in the
2039          * list.
2040          */
2041         switch (sdvo->controlled_output) {
2042         case SDVO_OUTPUT_LVDS1:
2043                 mask |= SDVO_OUTPUT_LVDS1;
2044         case SDVO_OUTPUT_LVDS0:
2045                 mask |= SDVO_OUTPUT_LVDS0;
2046         case SDVO_OUTPUT_TMDS1:
2047                 mask |= SDVO_OUTPUT_TMDS1;
2048         case SDVO_OUTPUT_TMDS0:
2049                 mask |= SDVO_OUTPUT_TMDS0;
2050         case SDVO_OUTPUT_RGB1:
2051                 mask |= SDVO_OUTPUT_RGB1;
2052         case SDVO_OUTPUT_RGB0:
2053                 mask |= SDVO_OUTPUT_RGB0;
2054                 break;
2055         }
2056
2057         /* Count bits to find what number we are in the priority list. */
2058         mask &= sdvo->caps.output_flags;
2059         num_bits = bitcount16(mask);
2060         /* If more than 3 outputs, default to DDC bus 3 for now. */
2061         if (num_bits > 3)
2062                 num_bits = 3;
2063
2064         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2065         sdvo->ddc_bus = 1 << num_bits;
2066 }
2067
2068 /**
2069  * Choose the appropriate DDC bus for control bus switch command for this
2070  * SDVO output based on the controlled output.
2071  *
2072  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2073  * outputs, then LVDS outputs.
2074  */
2075 static void
2076 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2077                           struct intel_sdvo *sdvo, u32 reg)
2078 {
2079         struct sdvo_device_mapping *mapping;
2080
2081         if (sdvo->is_sdvob)
2082                 mapping = &(dev_priv->sdvo_mappings[0]);
2083         else
2084                 mapping = &(dev_priv->sdvo_mappings[1]);
2085
2086         if (mapping->initialized)
2087                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2088         else
2089                 intel_sdvo_guess_ddc_bus(sdvo);
2090 }
2091
2092 static void
2093 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2094                           struct intel_sdvo *sdvo, u32 reg)
2095 {
2096         struct sdvo_device_mapping *mapping;
2097         u8 pin;
2098
2099         if (sdvo->is_sdvob)
2100                 mapping = &dev_priv->sdvo_mappings[0];
2101         else
2102                 mapping = &dev_priv->sdvo_mappings[1];
2103
2104         if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2105                 pin = mapping->i2c_pin;
2106         else
2107                 pin = GMBUS_PORT_DPB;
2108
2109         sdvo->i2c = dev_priv->gmbus[pin];
2110
2111         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2112          * our code totally fails once we start using gmbus. Hence fall back to
2113          * bit banging for now. */
2114         intel_gmbus_force_bit(sdvo->i2c, true);
2115 }
2116
2117 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2118 static void
2119 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2120 {
2121         intel_gmbus_force_bit(sdvo->i2c, false);
2122 }
2123
2124 static bool
2125 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2126 {
2127         return intel_sdvo_check_supp_encode(intel_sdvo);
2128 }
2129
2130 static u8
2131 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2132 {
2133         struct drm_i915_private *dev_priv = dev->dev_private;
2134         struct sdvo_device_mapping *my_mapping, *other_mapping;
2135
2136         if (sdvo->is_sdvob) {
2137                 my_mapping = &dev_priv->sdvo_mappings[0];
2138                 other_mapping = &dev_priv->sdvo_mappings[1];
2139         } else {
2140                 my_mapping = &dev_priv->sdvo_mappings[1];
2141                 other_mapping = &dev_priv->sdvo_mappings[0];
2142         }
2143
2144         /* If the BIOS described our SDVO device, take advantage of it. */
2145         if (my_mapping->slave_addr)
2146                 return my_mapping->slave_addr;
2147
2148         /* If the BIOS only described a different SDVO device, use the
2149          * address that it isn't using.
2150          */
2151         if (other_mapping->slave_addr) {
2152                 if (other_mapping->slave_addr == 0x70)
2153                         return 0x72;
2154                 else
2155                         return 0x70;
2156         }
2157
2158         /* No SDVO device info is found for another DVO port,
2159          * so use mapping assumption we had before BIOS parsing.
2160          */
2161         if (sdvo->is_sdvob)
2162                 return 0x70;
2163         else
2164                 return 0x72;
2165 }
2166
2167 static void
2168 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2169                           struct intel_sdvo *encoder)
2170 {
2171         drm_connector_init(encoder->base.base.dev,
2172                            &connector->base.base,
2173                            &intel_sdvo_connector_funcs,
2174                            connector->base.base.connector_type);
2175
2176         drm_connector_helper_add(&connector->base.base,
2177                                  &intel_sdvo_connector_helper_funcs);
2178
2179         connector->base.base.interlace_allowed = 1;
2180         connector->base.base.doublescan_allowed = 0;
2181         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2182         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2183
2184         intel_connector_attach_encoder(&connector->base, &encoder->base);
2185 #if 0
2186         drm_sysfs_connector_add(&connector->base.base);
2187 #endif
2188 }
2189
2190 static void
2191 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2192 {
2193         struct drm_device *dev = connector->base.base.dev;
2194
2195         intel_attach_force_audio_property(&connector->base.base);
2196         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2197                 intel_attach_broadcast_rgb_property(&connector->base.base);
2198 }
2199
2200 static bool
2201 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2202 {
2203         struct drm_encoder *encoder = &intel_sdvo->base.base;
2204         struct drm_connector *connector;
2205         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2206         struct intel_connector *intel_connector;
2207         struct intel_sdvo_connector *intel_sdvo_connector;
2208
2209         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2210             DRM_MEM_KMS, M_WAITOK | M_ZERO);
2211
2212         if (device == 0) {
2213                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2214                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2215         } else if (device == 1) {
2216                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2217                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2218         }
2219
2220         intel_connector = &intel_sdvo_connector->base;
2221         connector = &intel_connector->base;
2222         if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2223                 connector->polled = DRM_CONNECTOR_POLL_HPD;
2224                 intel_sdvo->hotplug_active[0] |= 1 << device;
2225                 /* Some SDVO devices have one-shot hotplug interrupts.
2226                  * Ensure that they get re-enabled when an interrupt happens.
2227                  */
2228                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2229                 intel_sdvo_enable_hotplug(intel_encoder);
2230         } else {
2231                 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2232         }
2233         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2234         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2235
2236         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2237                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2238                 intel_sdvo->is_hdmi = true;
2239         }
2240
2241         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2242         if (intel_sdvo->is_hdmi)
2243                 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2244
2245         return true;
2246 }
2247
2248 static bool
2249 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2250 {
2251         struct drm_encoder *encoder = &intel_sdvo->base.base;
2252         struct drm_connector *connector;
2253         struct intel_connector *intel_connector;
2254         struct intel_sdvo_connector *intel_sdvo_connector;
2255
2256         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2257             DRM_MEM_KMS, M_WAITOK | M_ZERO);
2258         if (!intel_sdvo_connector)
2259                 return false;
2260
2261         intel_connector = &intel_sdvo_connector->base;
2262         connector = &intel_connector->base;
2263         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2264         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2265
2266         intel_sdvo->controlled_output |= type;
2267         intel_sdvo_connector->output_flag = type;
2268
2269         intel_sdvo->is_tv = true;
2270         intel_sdvo->base.needs_tv_clock = true;
2271
2272         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2273
2274         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2275                 goto err;
2276
2277         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2278                 goto err;
2279
2280         return true;
2281
2282 err:
2283         intel_sdvo_destroy(connector);
2284         return false;
2285 }
2286
2287 static bool
2288 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2289 {
2290         struct drm_encoder *encoder = &intel_sdvo->base.base;
2291         struct drm_connector *connector;
2292         struct intel_connector *intel_connector;
2293         struct intel_sdvo_connector *intel_sdvo_connector;
2294
2295         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2296             DRM_MEM_KMS, M_WAITOK | M_ZERO);
2297
2298         intel_connector = &intel_sdvo_connector->base;
2299         connector = &intel_connector->base;
2300         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2301         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2302         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2303
2304         if (device == 0) {
2305                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2306                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2307         } else if (device == 1) {
2308                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2309                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2310         }
2311
2312         intel_sdvo_connector_init(intel_sdvo_connector,
2313                                   intel_sdvo);
2314         return true;
2315 }
2316
2317 static bool
2318 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2319 {
2320         struct drm_encoder *encoder = &intel_sdvo->base.base;
2321         struct drm_connector *connector;
2322         struct intel_connector *intel_connector;
2323         struct intel_sdvo_connector *intel_sdvo_connector;
2324
2325         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2326             DRM_MEM_KMS, M_WAITOK | M_ZERO);
2327
2328         intel_connector = &intel_sdvo_connector->base;
2329         connector = &intel_connector->base;
2330         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2331         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2332
2333         if (device == 0) {
2334                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2335                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2336         } else if (device == 1) {
2337                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2338                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2339         }
2340
2341         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2342         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2343                 goto err;
2344
2345         return true;
2346
2347 err:
2348         intel_sdvo_destroy(connector);
2349         return false;
2350 }
2351
2352 static bool
2353 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2354 {
2355         intel_sdvo->is_tv = false;
2356         intel_sdvo->base.needs_tv_clock = false;
2357         intel_sdvo->is_lvds = false;
2358
2359         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2360
2361         if (flags & SDVO_OUTPUT_TMDS0)
2362                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2363                         return false;
2364
2365         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2366                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2367                         return false;
2368
2369         /* TV has no XXX1 function block */
2370         if (flags & SDVO_OUTPUT_SVID0)
2371                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2372                         return false;
2373
2374         if (flags & SDVO_OUTPUT_CVBS0)
2375                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2376                         return false;
2377
2378         if (flags & SDVO_OUTPUT_YPRPB0)
2379                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2380                         return false;
2381
2382         if (flags & SDVO_OUTPUT_RGB0)
2383                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2384                         return false;
2385
2386         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2387                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2388                         return false;
2389
2390         if (flags & SDVO_OUTPUT_LVDS0)
2391                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2392                         return false;
2393
2394         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2395                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2396                         return false;
2397
2398         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2399                 unsigned char bytes[2];
2400
2401                 intel_sdvo->controlled_output = 0;
2402                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2403                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2404                               SDVO_NAME(intel_sdvo),
2405                               bytes[0], bytes[1]);
2406                 return false;
2407         }
2408         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2409
2410         return true;
2411 }
2412
2413 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2414 {
2415         struct drm_device *dev = intel_sdvo->base.base.dev;
2416         struct drm_connector *connector, *tmp;
2417
2418         list_for_each_entry_safe(connector, tmp,
2419                                  &dev->mode_config.connector_list, head) {
2420                 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2421                         intel_sdvo_destroy(connector);
2422         }
2423 }
2424
2425 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2426                                           struct intel_sdvo_connector *intel_sdvo_connector,
2427                                           int type)
2428 {
2429         struct drm_device *dev = intel_sdvo->base.base.dev;
2430         struct intel_sdvo_tv_format format;
2431         uint32_t format_map, i;
2432
2433         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2434                 return false;
2435
2436         CTASSERT(sizeof(format) == 6);
2437         if (!intel_sdvo_get_value(intel_sdvo,
2438                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2439                                   &format, sizeof(format)))
2440                 return false;
2441
2442         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2443
2444         if (format_map == 0)
2445                 return false;
2446
2447         intel_sdvo_connector->format_supported_num = 0;
2448         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2449                 if (format_map & (1 << i))
2450                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2451
2452
2453         intel_sdvo_connector->tv_format =
2454                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2455                                             "mode", intel_sdvo_connector->format_supported_num);
2456         if (!intel_sdvo_connector->tv_format)
2457                 return false;
2458
2459         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2460                 drm_property_add_enum(
2461                                 intel_sdvo_connector->tv_format, i,
2462                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2463
2464         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2465         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2466                                       intel_sdvo_connector->tv_format, 0);
2467         return true;
2468
2469 }
2470
2471 #define ENHANCEMENT(name, NAME) do { \
2472         if (enhancements.name) { \
2473                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2474                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2475                         return false; \
2476                 intel_sdvo_connector->max_##name = data_value[0]; \
2477                 intel_sdvo_connector->cur_##name = response; \
2478                 intel_sdvo_connector->name = \
2479                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2480                 if (!intel_sdvo_connector->name) return false; \
2481                 drm_object_attach_property(&connector->base, \
2482                                               intel_sdvo_connector->name, \
2483                                               intel_sdvo_connector->cur_##name); \
2484                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2485                               data_value[0], data_value[1], response); \
2486         } \
2487 } while (0)
2488
2489 static bool
2490 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2491                                       struct intel_sdvo_connector *intel_sdvo_connector,
2492                                       struct intel_sdvo_enhancements_reply enhancements)
2493 {
2494         struct drm_device *dev = intel_sdvo->base.base.dev;
2495         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2496         uint16_t response, data_value[2];
2497
2498         /* when horizontal overscan is supported, Add the left/right  property */
2499         if (enhancements.overscan_h) {
2500                 if (!intel_sdvo_get_value(intel_sdvo,
2501                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2502                                           &data_value, 4))
2503                         return false;
2504
2505                 if (!intel_sdvo_get_value(intel_sdvo,
2506                                           SDVO_CMD_GET_OVERSCAN_H,
2507                                           &response, 2))
2508                         return false;
2509
2510                 intel_sdvo_connector->max_hscan = data_value[0];
2511                 intel_sdvo_connector->left_margin = data_value[0] - response;
2512                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2513                 intel_sdvo_connector->left =
2514                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2515                 if (!intel_sdvo_connector->left)
2516                         return false;
2517
2518                 drm_object_attach_property(&connector->base,
2519                                               intel_sdvo_connector->left,
2520                                               intel_sdvo_connector->left_margin);
2521
2522                 intel_sdvo_connector->right =
2523                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2524                 if (!intel_sdvo_connector->right)
2525                         return false;
2526
2527                 drm_object_attach_property(&connector->base,
2528                                               intel_sdvo_connector->right,
2529                                               intel_sdvo_connector->right_margin);
2530                 DRM_DEBUG_KMS("h_overscan: max %d, "
2531                               "default %d, current %d\n",
2532                               data_value[0], data_value[1], response);
2533         }
2534
2535         if (enhancements.overscan_v) {
2536                 if (!intel_sdvo_get_value(intel_sdvo,
2537                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2538                                           &data_value, 4))
2539                         return false;
2540
2541                 if (!intel_sdvo_get_value(intel_sdvo,
2542                                           SDVO_CMD_GET_OVERSCAN_V,
2543                                           &response, 2))
2544                         return false;
2545
2546                 intel_sdvo_connector->max_vscan = data_value[0];
2547                 intel_sdvo_connector->top_margin = data_value[0] - response;
2548                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2549                 intel_sdvo_connector->top =
2550                         drm_property_create_range(dev, 0,
2551                                             "top_margin", 0, data_value[0]);
2552                 if (!intel_sdvo_connector->top)
2553                         return false;
2554
2555                 drm_object_attach_property(&connector->base,
2556                                               intel_sdvo_connector->top,
2557                                               intel_sdvo_connector->top_margin);
2558
2559                 intel_sdvo_connector->bottom =
2560                         drm_property_create_range(dev, 0,
2561                                             "bottom_margin", 0, data_value[0]);
2562                 if (!intel_sdvo_connector->bottom)
2563                         return false;
2564
2565                 drm_object_attach_property(&connector->base,
2566                                               intel_sdvo_connector->bottom,
2567                                               intel_sdvo_connector->bottom_margin);
2568                 DRM_DEBUG_KMS("v_overscan: max %d, "
2569                               "default %d, current %d\n",
2570                               data_value[0], data_value[1], response);
2571         }
2572
2573         ENHANCEMENT(hpos, HPOS);
2574         ENHANCEMENT(vpos, VPOS);
2575         ENHANCEMENT(saturation, SATURATION);
2576         ENHANCEMENT(contrast, CONTRAST);
2577         ENHANCEMENT(hue, HUE);
2578         ENHANCEMENT(sharpness, SHARPNESS);
2579         ENHANCEMENT(brightness, BRIGHTNESS);
2580         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2581         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2582         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2583         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2584         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2585
2586         if (enhancements.dot_crawl) {
2587                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2588                         return false;
2589
2590                 intel_sdvo_connector->max_dot_crawl = 1;
2591                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2592                 intel_sdvo_connector->dot_crawl =
2593                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2594                 if (!intel_sdvo_connector->dot_crawl)
2595                         return false;
2596
2597                 drm_object_attach_property(&connector->base,
2598                                               intel_sdvo_connector->dot_crawl,
2599                                               intel_sdvo_connector->cur_dot_crawl);
2600                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2601         }
2602
2603         return true;
2604 }
2605
2606 static bool
2607 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2608                                         struct intel_sdvo_connector *intel_sdvo_connector,
2609                                         struct intel_sdvo_enhancements_reply enhancements)
2610 {
2611         struct drm_device *dev = intel_sdvo->base.base.dev;
2612         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2613         uint16_t response, data_value[2];
2614
2615         ENHANCEMENT(brightness, BRIGHTNESS);
2616
2617         return true;
2618 }
2619 #undef ENHANCEMENT
2620
2621 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2622                                                struct intel_sdvo_connector *intel_sdvo_connector)
2623 {
2624         union {
2625                 struct intel_sdvo_enhancements_reply reply;
2626                 uint16_t response;
2627         } enhancements;
2628
2629         CTASSERT(sizeof(enhancements) == 2);
2630
2631         enhancements.response = 0;
2632         intel_sdvo_get_value(intel_sdvo,
2633                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2634                              &enhancements, sizeof(enhancements));
2635         if (enhancements.response == 0) {
2636                 DRM_DEBUG_KMS("No enhancement is supported\n");
2637                 return true;
2638         }
2639
2640         if (IS_TV(intel_sdvo_connector))
2641                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2642         else if (IS_LVDS(intel_sdvo_connector))
2643                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2644         else
2645                 return true;
2646 }
2647
2648 struct intel_sdvo_ddc_proxy_sc {
2649         struct intel_sdvo *intel_sdvo;
2650         device_t port;
2651 };
2652
2653 static int
2654 intel_sdvo_ddc_proxy_probe(device_t idev)
2655 {
2656
2657         return (BUS_PROBE_DEFAULT);
2658 }
2659
2660 static int
2661 intel_sdvo_ddc_proxy_attach(device_t idev)
2662 {
2663         struct intel_sdvo_ddc_proxy_sc *sc;
2664
2665         sc = device_get_softc(idev);
2666         sc->port = device_add_child(idev, "iicbus", -1);
2667         if (sc->port == NULL)
2668                 return (ENXIO);
2669         device_quiet(sc->port);
2670         bus_generic_attach(idev);
2671         return (0);
2672 }
2673
2674 static int
2675 intel_sdvo_ddc_proxy_detach(device_t idev)
2676 {
2677         struct intel_sdvo_ddc_proxy_sc *sc;
2678         device_t port;
2679
2680         sc = device_get_softc(idev);
2681         port = sc->port;
2682         bus_generic_detach(idev);
2683         if (port != NULL)
2684                 device_delete_child(idev, port);
2685         return (0);
2686 }
2687
2688 static int
2689 intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr,
2690     u_char *oldaddr)
2691 {
2692         struct intel_sdvo_ddc_proxy_sc *sc;
2693         struct intel_sdvo *sdvo;
2694
2695         sc = device_get_softc(idev);
2696         sdvo = sc->intel_sdvo;
2697
2698         return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr,
2699             oldaddr));
2700 }
2701
2702 static int
2703 intel_sdvo_ddc_proxy_transfer(device_t idev, struct iic_msg *msgs, uint32_t num)
2704 {
2705         struct intel_sdvo_ddc_proxy_sc *sc;
2706         struct intel_sdvo *sdvo;
2707
2708         sc = device_get_softc(idev);
2709         sdvo = sc->intel_sdvo;
2710
2711         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2712                 return (EIO);
2713
2714         return (iicbus_transfer(sdvo->i2c, msgs, num));
2715 }
2716
2717 static bool
2718 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev,
2719     int sdvo_reg)
2720 {
2721         struct intel_sdvo_ddc_proxy_sc *sc;
2722         int ret;
2723
2724         sdvo->ddc_iic_bus = device_add_child(dev->dev,
2725             "intel_sdvo_ddc_proxy", sdvo_reg);
2726         if (sdvo->ddc_iic_bus == NULL) {
2727                 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg);
2728                 return (false);
2729         }
2730         device_quiet(sdvo->ddc_iic_bus);
2731         ret = device_probe_and_attach(sdvo->ddc_iic_bus);
2732         if (ret != 0) {
2733                 DRM_ERROR("cannot attach proxy bus %d error %d\n",
2734                     sdvo_reg, ret);
2735                 device_delete_child(dev->dev, sdvo->ddc_iic_bus);
2736                 return (false);
2737         }
2738         sc = device_get_softc(sdvo->ddc_iic_bus);
2739         sc->intel_sdvo = sdvo;
2740
2741         sdvo->ddc = sc->port;
2742         return (true);
2743 }
2744
2745 static device_method_t intel_sdvo_ddc_proxy_methods[] = {
2746         DEVMETHOD(device_probe,         intel_sdvo_ddc_proxy_probe),
2747         DEVMETHOD(device_attach,        intel_sdvo_ddc_proxy_attach),
2748         DEVMETHOD(device_detach,        intel_sdvo_ddc_proxy_detach),
2749         DEVMETHOD(iicbus_reset,         intel_sdvo_ddc_proxy_reset),
2750         DEVMETHOD(iicbus_transfer,      intel_sdvo_ddc_proxy_transfer),
2751         DEVMETHOD_END
2752 };
2753 static driver_t intel_sdvo_ddc_proxy_driver = {
2754         "intel_sdvo_ddc_proxy",
2755         intel_sdvo_ddc_proxy_methods,
2756         sizeof(struct intel_sdvo_ddc_proxy_sc)
2757 };
2758 static devclass_t intel_sdvo_devclass;
2759 DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drm, intel_sdvo_ddc_proxy_driver,
2760     intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST);
2761
2762 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2763 {
2764         struct drm_i915_private *dev_priv = dev->dev_private;
2765         struct intel_encoder *intel_encoder;
2766         struct intel_sdvo *intel_sdvo;
2767         u32 hotplug_mask;
2768         int i;
2769
2770         intel_sdvo = kmalloc(sizeof(struct intel_sdvo), DRM_MEM_KMS,
2771             M_WAITOK | M_ZERO);
2772         if (!intel_sdvo)
2773                 return false;
2774
2775         intel_sdvo->sdvo_reg = sdvo_reg;
2776         intel_sdvo->is_sdvob = is_sdvob;
2777         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2778         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2779         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) {
2780                 kfree(intel_sdvo, DRM_MEM_KMS);
2781                 return false;
2782         }
2783
2784         /* encoder type will be decided later */
2785         intel_encoder = &intel_sdvo->base;
2786         intel_encoder->type = INTEL_OUTPUT_SDVO;
2787         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2788
2789         /* Read the regs to test if we can talk to the device */
2790         for (i = 0; i < 0x40; i++) {
2791                 u8 byte;
2792
2793                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2794                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2795                                       SDVO_NAME(intel_sdvo));
2796                         goto err;
2797                 }
2798         }
2799
2800         hotplug_mask = 0;
2801         if (IS_G4X(dev)) {
2802                 hotplug_mask = intel_sdvo->is_sdvob ?
2803                         SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2804         } else if (IS_GEN4(dev)) {
2805                 hotplug_mask = intel_sdvo->is_sdvob ?
2806                         SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2807         } else {
2808                 hotplug_mask = intel_sdvo->is_sdvob ?
2809                         SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2810         }
2811
2812         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2813
2814         intel_encoder->disable = intel_disable_sdvo;
2815         intel_encoder->enable = intel_enable_sdvo;
2816         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2817
2818         /* In default case sdvo lvds is false */
2819         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2820                 goto err;
2821
2822         if (intel_sdvo_output_setup(intel_sdvo,
2823                                     intel_sdvo->caps.output_flags) != true) {
2824                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2825                               SDVO_NAME(intel_sdvo));
2826                 /* Output_setup can leave behind connectors! */
2827                 goto err_output;
2828         }
2829
2830         /*
2831          * Cloning SDVO with anything is often impossible, since the SDVO
2832          * encoder can request a special input timing mode. And even if that's
2833          * not the case we have evidence that cloning a plain unscaled mode with
2834          * VGA doesn't really work. Furthermore the cloning flags are way too
2835          * simplistic anyway to express such constraints, so just give up on
2836          * cloning for SDVO encoders.
2837          */
2838         intel_sdvo->base.cloneable = false;
2839
2840         /* Only enable the hotplug irq if we need it, to work around noisy
2841          * hotplug lines.
2842          */
2843         if (intel_sdvo->hotplug_active)
2844                 dev_priv->hotplug_supported_mask |= hotplug_mask;
2845
2846         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2847
2848         /* Set the input timing to the screen. Assume always input 0. */
2849         if (!intel_sdvo_set_target_input(intel_sdvo))
2850                 goto err_output;
2851
2852         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2853                                                     &intel_sdvo->pixel_clock_min,
2854                                                     &intel_sdvo->pixel_clock_max))
2855                 goto err_output;
2856
2857         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2858                         "clock range %dMHz - %dMHz, "
2859                         "input 1: %c, input 2: %c, "
2860                         "output 1: %c, output 2: %c\n",
2861                         SDVO_NAME(intel_sdvo),
2862                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2863                         intel_sdvo->caps.device_rev_id,
2864                         intel_sdvo->pixel_clock_min / 1000,
2865                         intel_sdvo->pixel_clock_max / 1000,
2866                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2867                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2868                         /* check currently supported outputs */
2869                         intel_sdvo->caps.output_flags &
2870                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2871                         intel_sdvo->caps.output_flags &
2872                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2873         return true;
2874
2875 err_output:
2876         intel_sdvo_output_cleanup(intel_sdvo);
2877
2878 err:
2879         drm_encoder_cleanup(&intel_encoder->base);
2880         intel_sdvo_unselect_i2c_bus(intel_sdvo);
2881         kfree(intel_sdvo, DRM_MEM_KMS);
2882
2883         return false;
2884 }