1 /**************************************************************************
3 Copyright (c) 2001-2005, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 ***************************************************************************/
34 /*$FreeBSD: src/sys/dev/em/if_em.h,v 1.1.2.13 2003/06/09 21:43:41 pdeuskar Exp $*/
35 /*$DragonFly: src/sys/dev/netif/em/if_em.h,v 1.14 2005/12/10 18:28:18 dillon Exp $*/
37 #ifndef _EM_H_DEFINED_
38 #define _EM_H_DEFINED_
40 #include <sys/param.h>
41 #include <sys/systm.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
47 #include <sys/sockio.h>
48 #include <sys/sysctl.h>
50 #include <sys/endian.h>
53 #include <net/if_arp.h>
54 #include <net/ethernet.h>
55 #include <net/if_dl.h>
56 #include <net/if_media.h>
59 #include <net/if_types.h>
60 #include <net/vlan/if_vlan_var.h>
62 #include <netinet/in_systm.h>
63 #include <netinet/in.h>
64 #include <netinet/ip.h>
65 #include <netinet/tcp.h>
66 #include <netinet/udp.h>
69 #include <machine/bus.h>
71 #include <machine/resource.h>
74 #include <machine/clock.h>
75 #include <bus/pci/pcivar.h>
76 #include <bus/pci/pcireg.h>
78 #include <sys/sysctl.h>
79 #include <sys/thread2.h>
80 #include <sys/serialize.h>
83 #include <dev/netif/em/if_em_hw.h>
88 * EM_MAX_TXD: Maximum number of Transmit Descriptors
89 * Valid Range: 80-256 for 82542 and 82543-based adapters
92 * This value is the number of transmit descriptors allocated by the driver.
93 * Increasing this value allows the driver to queue more transmits. Each
94 * descriptor is 16 bytes.
96 #define EM_MAX_TXD 256
99 * EM_MAX_RXD - Maximum number of receive Descriptors
100 * Valid Range: 80-256 for 82542 and 82543-based adapters
103 * This value is the number of receive descriptors allocated by the driver.
104 * Increasing this value allows the driver to buffer more incoming packets.
105 * Each descriptor is 16 bytes. A receive buffer is also allocated for each
106 * descriptor. The maximum MTU size is 16110.
109 #define EM_MAX_RXD 256
112 * EM_TIDV - Transmit Interrupt Delay Value
113 * Valid Range: 0-65535 (0=off)
115 * This value delays the generation of transmit interrupts in units of
116 * 1.024 microseconds. Transmit interrupt reduction can improve CPU
117 * efficiency if properly tuned for specific network traffic. If the
118 * system is reporting dropped transmits, this value may be set too high
119 * causing the driver to run out of available transmit descriptors.
124 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544)
125 * Valid Range: 0-65535 (0=off)
127 * This value, in units of 1.024 microseconds, limits the delay in which a
128 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
129 * this value ensures that an interrupt is generated after the initial
130 * packet is sent on the wire within the set amount of time. Proper tuning,
131 * along with EM_TIDV, may improve traffic throughput in specific
132 * network conditions.
137 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
138 * Valid Range: 0-65535 (0=off)
140 * This value delays the generation of receive interrupts in units of 1.024
141 * microseconds. Receive interrupt reduction can improve CPU efficiency if
142 * properly tuned for specific network traffic. Increasing this value adds
143 * extra latency to frame reception and can end up decreasing the throughput
144 * of TCP traffic. If the system is reporting dropped receives, this value
145 * may be set too high, causing the driver to run out of available receive
148 * CAUTION: When setting EM_RDTR to a value other than 0, adapters
149 * may hang (stop transmitting) under certain network conditions.
150 * If this occurs a WATCHDOG message is logged in the system event log.
151 * In addition, the controller is automatically reset, restoring the
152 * network connection. To eliminate the potential for the hang
153 * ensure that EM_RDTR is set to 0.
158 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
159 * Valid Range: 0-65535 (0=off)
161 * This value, in units of 1.024 microseconds, limits the delay in which a
162 * receive interrupt is generated. Useful only if EM_RDTR is non-zero,
163 * this value ensures that an interrupt is generated after the initial
164 * packet is received within the set amount of time. Proper tuning,
165 * along with EM_RDTR, may improve traffic throughput in specific network
172 * This parameter controls the maximum no of times the driver will loop
176 #define EM_MAX_INTR 3
179 * Inform the stack about transmit checksum offload capabilities.
181 #define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP)
184 * This parameter controls the duration of transmit watchdog timer.
186 #define EM_TX_TIMEOUT 5 /* set to 5 seconds */
189 * This parameter controls when the driver calls the routine to reclaim
190 * transmit descriptors.
192 #define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8
195 * This parameter controls whether or not autonegotation is enabled.
196 * 0 - Disable autonegotiation
197 * 1 - Enable autonegotiation
199 #define DO_AUTO_NEG 1
202 * This parameter control whether or not the driver will wait for
203 * autonegotiation to complete.
204 * 1 - Wait for autonegotiation to complete
205 * 0 - Don't wait for autonegotiation to complete
207 #define WAIT_FOR_AUTO_NEG_DEFAULT 0
210 * EM_MASTER_SLAVE is only defined to enable a workaround for a known
211 * compatibility issue with 82541/82547 devices and some switches.
212 * See the "Known Limitations" section of the README file for a complete
213 * description and a list of affected switches.
215 * 0 = Hardware default
218 * 3 = Auto master/slave
220 /* #define EM_MASTER_SLAVE 2 */
222 /* Tunables -- End */
224 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
225 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
228 #define EM_VENDOR_ID 0x8086
229 #define EM_MMBA 0x0010 /* Mem base address */
230 #define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
232 #define EM_JUMBO_PBA 0x00000028
233 #define EM_DEFAULT_PBA 0x00000030
234 #define EM_SMARTSPEED_DOWNSHIFT 3
235 #define EM_SMARTSPEED_MAX 15
238 #define MAX_NUM_MULTICAST_ADDRESSES 128
239 #define PCI_ANY_ID (~0U)
240 #define ETHER_ALIGN 2
242 /* Defines for printing debug information */
244 #define DEBUG_IOCTL 0
247 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
248 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
249 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
250 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
251 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
252 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
253 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
254 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
255 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
258 /* Supported RX Buffer Sizes */
259 #define EM_RXBUFFER_2048 2048
260 #define EM_RXBUFFER_4096 4096
261 #define EM_RXBUFFER_8192 8192
262 #define EM_RXBUFFER_16384 16384
264 #define EM_MAX_SCATTER 64
266 /* ******************************************************************************
269 * This array contains the list of Subvendor/Subdevice IDs on which the driver
272 * ******************************************************************************/
273 typedef struct _em_vendor_info_t {
274 unsigned int vendor_id;
275 unsigned int device_id;
276 unsigned int subvendor_id;
277 unsigned int subdevice_id;
284 bus_dmamap_t map; /* bus_dma map for packet */
288 bus_dmamap_t map; /* bus_dma map for packet */
289 int nsegs; /* # of segments/descriptors */
290 bus_dma_segment_t segs[EM_MAX_SCATTER];
294 * Bus dma allocation structure used by
295 * em_dma_malloc and em_dma_free.
297 struct em_dma_alloc {
298 bus_addr_t dma_paddr;
300 bus_dma_tag_t dma_tag;
301 bus_dmamap_t dma_map;
302 bus_dma_segment_t dma_seg;
307 typedef enum _XSUM_CONTEXT_T {
314 struct em_int_delay_info {
315 struct adapter *adapter; /* Back-pointer to the adapter struct */
316 int offset; /* Register offset to read/write */
317 int value; /* Current value in usecs */
320 /* For 82544 PCIX Workaround */
321 typedef struct _ADDRESS_LENGTH_PAIR
325 } ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
327 typedef struct _DESCRIPTOR_PAIR
329 ADDRESS_LENGTH_PAIR descriptor[4];
331 } DESC_ARRAY, *PDESC_ARRAY;
333 /* Our adapter structure */
335 struct arpcom interface_data;
338 /* Operating-system-specific structures */
339 struct em_osdep osdep;
341 struct resource *res_memory;
342 struct resource *res_ioport;
343 struct resource *res_interrupt;
344 void *int_handler_tag;
345 struct ifmedia media;
346 struct callout timer;
347 struct callout tx_fifo_timer;
350 /* Info about the board itself */
352 u_int8_t link_active;
353 u_int16_t link_speed;
354 u_int16_t link_duplex;
355 u_int32_t smartspeed;
356 struct em_int_delay_info tx_int_delay;
357 struct em_int_delay_info tx_abs_int_delay;
358 struct em_int_delay_info rx_int_delay;
359 struct em_int_delay_info rx_abs_int_delay;
361 XSUM_CONTEXT_T active_checksum_context;
364 * Transmit definitions
366 * We have an array of num_tx_desc descriptors (handled
367 * by the controller) paired with an array of tx_buffers
368 * (at tx_buffer_area).
369 * The index of the next available descriptor is next_avail_tx_desc.
370 * The number of remaining tx_desc is num_tx_desc_avail.
372 struct em_dma_alloc txdma; /* bus_dma glue for tx desc */
373 struct em_tx_desc *tx_desc_base;
374 u_int32_t next_avail_tx_desc;
375 u_int32_t oldest_used_tx_desc;
376 volatile u_int16_t num_tx_desc_avail;
377 u_int16_t num_tx_desc;
379 struct em_buffer *tx_buffer_area;
380 bus_dma_tag_t txtag; /* dma tag for tx */
383 * Receive definitions
385 * we have an array of num_rx_desc rx_desc (handled by the
386 * controller), and paired with an array of rx_buffers
387 * (at rx_buffer_area).
388 * The next pair to check on receive is at offset next_rx_desc_to_check
390 struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */
391 struct em_rx_desc *rx_desc_base;
392 u_int32_t next_rx_desc_to_check;
393 u_int16_t num_rx_desc;
394 u_int32_t rx_buffer_len;
395 struct em_buffer *rx_buffer_area;
402 struct sysctl_ctx_list sysctl_ctx;
403 struct sysctl_oid *sysctl_tree;
405 /* Misc stats maintained by the driver */
406 unsigned long dropped_pkts;
407 unsigned long mbuf_alloc_failed;
408 unsigned long mbuf_cluster_failed;
409 unsigned long no_tx_desc_avail1;
410 unsigned long no_tx_desc_avail2;
411 unsigned long no_tx_map_avail;
412 unsigned long no_tx_dma_setup;
414 /* Used in for 82547 10Mb Half workaround */
415 u_int32_t tx_fifo_size;
416 u_int32_t tx_fifo_head;
417 u_int32_t tx_fifo_head_addr;
418 u_int64_t tx_fifo_reset_cnt;
419 u_int64_t tx_fifo_wrk_cnt;
420 u_int32_t tx_head_addr;
422 #define EM_PBA_BYTES_SHIFT 0xA
423 #define EM_TX_HEAD_ADDR_SHIFT 7
424 #define EM_PBA_TX_MASK 0xFFFF0000
425 #define EM_FIFO_HDR 0x10
426 #define EM_82547_PKT_THRESH 0x3e0
428 /* For 82544 PCIX Workaround */
429 boolean_t pcix_82544;
432 struct em_hw_stats stats;
435 #endif /* !_EM_H_DEFINED_ */