sys/sys/ata.h

   1 /*-
   2  * Copyright (c) 2000,2001,2002 Søren Schmidt <sos@FreeBSD.org>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer,
  10  *    without modification, immediately at the beginning of the file.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. The name of the author may not be used to endorse or promote products
  15  *    derived from this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * $FreeBSD: src/sys/sys/ata.h,v 1.8.2.4 2002/04/02 14:47:35 sos Exp $
  29  * $DragonFly: src/sys/sys/ata.h,v 1.3 2006/05/20 02:42:13 dillon Exp $
  30  */
  31
  32 #ifndef _SYS_ATA_H_
  33 #define _SYS_ATA_H_
  34
  35 #ifndef _SYS_TYPES_H_
  36 #include <sys/types.h>
  37 #endif
  38 #ifndef _SYS_IOCCOMM_H_
  39 #include <sys/ioccom.h>
  40 #endif
  41
  42 /* ATA/ATAPI device parameter information */
  43 struct ata_params {
  44 /*000*/ u_int16_t       packet_size     :2;     /* packet command size */
  45 #define ATAPI_PSIZE_12                  0       /* 12 bytes */
  46 #define ATAPI_PSIZE_16                  1       /* 16 bytes */
  47
  48         u_int16_t       incomplete      :1;
  49         u_int16_t                       :2;
  50         u_int16_t       drq_type        :2;     /* DRQ type */
  51 #define ATAPI_DRQT_MPROC                0       /* cpu    3 ms delay */
  52 #define ATAPI_DRQT_INTR                 1       /* intr  10 ms delay */
  53 #define ATAPI_DRQT_ACCEL                2       /* accel 50 us delay */
  54
  55         u_int16_t       removable       :1;     /* device is removable */
  56         u_int16_t       type            :5;     /* device type */
  57 #define ATAPI_TYPE_DIRECT               0       /* disk/floppy */
  58 #define ATAPI_TYPE_TAPE                 1       /* streaming tape */
  59 #define ATAPI_TYPE_CDROM                5       /* CD-ROM device */
  60 #define ATAPI_TYPE_OPTICAL              7       /* optical disk */
  61
  62         u_int16_t                       :2;
  63         u_int16_t       cmd_protocol    :1;     /* command protocol */
  64 #define ATA_PROTO_ATA                   0
  65 #define ATA_PROTO_ATAPI                 1
  66
  67 /*001*/ u_int16_t       cylinders;              /* # of cylinders */
  68         u_int16_t       reserved2;
  69 /*003*/ u_int16_t       heads;                  /* # heads */
  70         u_int16_t       obsolete4;
  71         u_int16_t       obsolete5;
  72 /*006*/ u_int16_t       sectors;                /* # sectors/track */
  73 /*007*/ u_int16_t       vendor7[3];
  74 /*010*/ u_int8_t        serial[20];             /* serial number */
  75         u_int16_t       retired20;
  76         u_int16_t       retired21;
  77         u_int16_t       obsolete22;
  78 /*023*/ u_int8_t        revision[8];            /* firmware revision */
  79 /*027*/ u_int8_t        model[40];              /* model name */
  80 /*047*/ u_int16_t       sectors_intr:8;         /* sectors per interrupt */
  81         u_int16_t       :8;
  82
  83 /*048*/ u_int16_t       usedmovsd;              /* double word read/write? */
  84 /*049*/ u_int16_t       retired49:8;
  85         u_int16_t       support_dma     :1;     /* DMA supported */
  86         u_int16_t       support_lba     :1;     /* LBA supported */
  87         u_int16_t       disable_iordy   :1;     /* IORDY may be disabled */
  88         u_int16_t       support_iordy   :1;     /* IORDY supported */
  89         u_int16_t       softreset       :1;     /* needs softreset when busy */
  90         u_int16_t       stdby_ovlap     :1;     /* standby/overlap supported */
  91         u_int16_t       support_queueing:1;     /* supports queuing overlap */
  92         u_int16_t       support_idma    :1;     /* interleaved DMA supported */
  93
  94 /*050*/ u_int16_t       device_stdby_min:1;
  95         u_int16_t       :13;
  96         u_int16_t       capability_one:1;
  97         u_int16_t       capability_zero:1;
  98
  99 /*051*/ u_int16_t       vendor51:8;
 100         u_int16_t       retired_piomode:8;      /* PIO modes 0-2 */
 101 /*052*/ u_int16_t       vendor52:8;
 102         u_int16_t       retired_dmamode:8;      /* DMA modes, not ATA-3 */
 103 /*053*/ u_int16_t       atavalid;               /* fields valid */
 104 #define ATA_FLAG_54_58                  1       /* words 54-58 valid */
 105 #define ATA_FLAG_64_70                  2       /* words 64-70 valid */
 106 #define ATA_FLAG_88                     4       /* word 88 valid */
 107
 108         u_int16_t       obsolete54[5];
 109 /*059*/ u_int16_t       multi_count:8;
 110         u_int16_t       multi_valid:1;
 111         u_int16_t       :7;
 112
 113 /*060*/ u_int32_t       lba_size;
 114         u_int16_t       obsolete62;
 115 /*063*/ u_int16_t       mwdmamodes;             /* multiword DMA modes */
 116 /*064*/ u_int16_t       apiomodes;              /* advanced PIO modes */
 117
 118 /*065*/ u_int16_t       mwdmamin;               /* min. M/W DMA time/word ns */
 119 /*066*/ u_int16_t       mwdmarec;               /* rec. M/W DMA time ns */
 120 /*067*/ u_int16_t       pioblind;               /* min. PIO cycle w/o flow */
 121 /*068*/ u_int16_t       pioiordy;               /* min. PIO cycle IORDY flow */
 122         u_int16_t       reserved69;
 123         u_int16_t       reserved70;
 124 /*071*/ u_int16_t       rlsovlap;               /* rel time (us) for overlap */
 125 /*072*/ u_int16_t       rlsservice;             /* rel time (us) for service */
 126         u_int16_t       reserved73;
 127         u_int16_t       reserved74;
 128
 129 /*075*/ u_int16_t       queuelen:5;
 130         u_int16_t       :11;
 131
 132         u_int16_t       reserved76;
 133         u_int16_t       reserved77;
 134         u_int16_t       reserved78;
 135         u_int16_t       reserved79;
 136 /*080*/ u_int16_t       version_major;
 137 /*081*/ u_int16_t       version_minor;
 138         struct {
 139 /*082/085*/ u_int16_t   smart:1;
 140             u_int16_t   security:1;
 141             u_int16_t   removable:1;
 142             u_int16_t   power_mngt:1;
 143             u_int16_t   packet:1;
 144             u_int16_t   write_cache:1;
 145             u_int16_t   look_ahead:1;
 146             u_int16_t   release_irq:1;
 147             u_int16_t   service_irq:1;
 148             u_int16_t   reset:1;
 149             u_int16_t   protected:1;
 150             u_int16_t   :1;
 151             u_int16_t   write_buffer:1;
 152             u_int16_t   read_buffer:1;
 153             u_int16_t   nop:1;
 154             u_int16_t   :1;
 155
 156 /*083/086*/ u_int16_t   microcode:1;
 157             u_int16_t   queued:1;
 158             u_int16_t   cfa:1;
 159             u_int16_t   apm:1;
 160             u_int16_t   notify:1;
 161             u_int16_t   standby:1;
 162             u_int16_t   spinup:1;
 163             u_int16_t   :1;
 164             u_int16_t   max_security:1;
 165             u_int16_t   auto_acoustic:1;
 166             u_int16_t   address48:1;
 167             u_int16_t   config_overlay:1;
 168             u_int16_t   flush_cache:1;
 169             u_int16_t   flush_cache48:1;
 170             u_int16_t   support_one:1;
 171             u_int16_t   support_zero:1;
 172
 173 /*084/087*/ u_int16_t   smart_error_log:1;
 174             u_int16_t   smart_self_test:1;
 175             u_int16_t   media_serial_no:1;
 176             u_int16_t   media_card_pass:1;
 177             u_int16_t   streaming:1;
 178             u_int16_t   logging:1;
 179             u_int16_t   :8;
 180             u_int16_t   extended_one:1;
 181             u_int16_t   extended_zero:1;
 182         } support, enabled;
 183
 184 /*088*/ u_int16_t       udmamodes;              /* UltraDMA modes */
 185 /*089*/ u_int16_t       erase_time;
 186 /*090*/ u_int16_t       enhanced_erase_time;
 187 /*091*/ u_int16_t       apm_value;
 188 /*092*/ u_int16_t       master_passwd_revision;
 189
 190 /*093*/ u_int16_t       hwres_master    :8;
 191         u_int16_t       hwres_slave     :5;
 192         u_int16_t       hwres_cblid     :1;
 193         u_int16_t       hwres_valid:2;
 194
 195 /*094*/ u_int16_t       current_acoustic:8;
 196         u_int16_t       vendor_acoustic:8;
 197
 198 /*095*/ u_int16_t       stream_min_req_size;
 199 /*096*/ u_int16_t       stream_transfer_time;
 200 /*097*/ u_int16_t       stream_access_latency;
 201 /*098*/ u_int32_t       stream_granularity;
 202 /*100*/ u_int64_t       lba_size48;
 203         u_int16_t       reserved104[23];
 204 /*127*/ u_int16_t       removable_status;
 205 /*128*/ u_int16_t       security_status;
 206         u_int16_t       reserved129[31];
 207 /*160*/ u_int16_t       cfa_powermode1;
 208         u_int16_t       reserved161[14];
 209 /*176*/ u_int16_t       media_serial[30];
 210         u_int16_t       reserved206[49];
 211 /*255*/ u_int16_t       integrity;
 212 };
 213
 214 #define ATA_MODE_MASK           0x0f
 215 #define ATA_DMA_MASK            0xf0
 216 #define ATA_PIO                 0x00
 217 #define ATA_PIO0                0x08
 218 #define ATA_PIO1                0x09
 219 #define ATA_PIO2                0x0a
 220 #define ATA_PIO3                0x0b
 221 #define ATA_PIO4                0x0c
 222 #define ATA_DMA                 0x10
 223 #define ATA_WDMA                0x20
 224 #define ATA_WDMA2               0x22
 225 #define ATA_UDMA                0x40
 226 #define ATA_UDMA2               0x42
 227 #define ATA_UDMA4               0x44
 228 #define ATA_UDMA5               0x45
 229 #define ATA_UDMA6               0x46
 230
 231 struct ata_cmd {
 232     int                         channel;
 233     int                         device;
 234     int                         cmd;
 235 #define ATAGPARM                1
 236 #define ATAGMODE                2
 237 #define ATASMODE                3
 238 #define ATAREINIT               4
 239 #define ATAATTACH               5
 240 #define ATADETACH               6
 241 #define ATAPICMD                7
 242 #define ATARAIDREBUILD          8
 243 #define ATARAIDCREATE           9
 244 #define ATARAIDDELETE           10
 245 #define ATARAIDSTATUS           11
 246 #define ATAENCSTAT              12
 247
 248     union {
 249         struct {
 250             int                 mode[2];
 251         } mode;
 252         struct {
 253             int                 type[2];
 254             char                name[2][32];
 255             struct ata_params   params[2];
 256         } param;
 257         struct raid_setup {
 258             int                 type;
 259 #define AR_RAID0                        1
 260 #define AR_RAID1                        2
 261 #define AR_SPAN                         4
 262
 263             int                 total_disks;
 264             int                 disks[16];
 265             int                 interleave;
 266             int                 unit;
 267         } raid_setup;
 268         struct raid_status {
 269             int                 type;
 270             int                 total_disks;
 271             int                 disks[16];
 272             int                 interleave;
 273             int                 status;
 274 #define AR_READY                        1
 275 #define AR_DEGRADED                     2
 276 #define AR_REBUILDING                   4
 277
 278             int                 progress;
 279         } raid_status;
 280         struct {
 281             int                 fan;
 282             int                 temp;
 283             int                 v05;
 284             int                 v12;
 285         } enclosure;
 286         struct {
 287             char                ccb[16];
 288             caddr_t             data;
 289             int                 count;
 290             int                 flags;
 291 #define ATAPI_CMD_CTRL                  0x00
 292 #define ATAPI_CMD_READ                  0x01
 293 #define ATAPI_CMD_WRITE                 0x02
 294
 295             int                 timeout;
 296             int                 error;
 297             char                sense_data[18];
 298         } atapi;
 299     } u;
 300 };
 301
 302 #define IOCATA                  _IOWR('a',  1, struct ata_cmd)
 303
 304 #endif /* _SYS_ATA_H_ */