2 * Copyright (c) 2007-2009
3 * Damien Bergamini <damien.bergamini@free.fr>
5 * Benjamin Close <benjsc@FreeBSD.org>
6 * Copyright (c) 2008 Sam Leffler, Errno Consulting
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
28 #include <sys/param.h>
29 #include <sys/sockio.h>
30 #include <sys/sysctl.h>
32 #include <sys/kernel.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/malloc.h>
38 #include <sys/endian.h>
39 #include <sys/firmware.h>
40 #include <sys/limits.h>
41 #include <sys/module.h>
42 #include <sys/queue.h>
43 #include <sys/taskqueue.h>
44 #include <sys/libkern.h>
47 #include <sys/resource.h>
48 #include <machine/clock.h>
50 #include <bus/pci/pcireg.h>
51 #include <bus/pci/pcivar.h>
55 #include <net/if_arp.h>
56 #include <net/ifq_var.h>
57 #include <net/ethernet.h>
58 #include <net/if_dl.h>
59 #include <net/if_media.h>
60 #include <net/if_types.h>
62 #include <netinet/in.h>
63 #include <netinet/in_systm.h>
64 #include <netinet/in_var.h>
65 #include <netinet/if_ether.h>
66 #include <netinet/ip.h>
68 #include <netproto/802_11/ieee80211_var.h>
69 #include <netproto/802_11/ieee80211_radiotap.h>
70 #include <netproto/802_11/ieee80211_regdomain.h>
71 #include <netproto/802_11/ieee80211_ratectl.h>
73 #include "if_iwnreg.h"
74 #include "if_iwnvar.h"
76 static int iwn_pci_probe(device_t);
77 static int iwn_pci_attach(device_t);
78 static const struct iwn_hal *iwn_hal_attach(struct iwn_softc *);
79 static void iwn_radiotap_attach(struct iwn_softc *);
80 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
81 const char name[IFNAMSIZ], int unit, int opmode,
82 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
83 const uint8_t mac[IEEE80211_ADDR_LEN]);
84 static void iwn_vap_delete(struct ieee80211vap *);
85 static int iwn_cleanup(device_t);
86 static int iwn_pci_detach(device_t);
87 static int iwn_nic_lock(struct iwn_softc *);
88 static int iwn_eeprom_lock(struct iwn_softc *);
89 static int iwn_init_otprom(struct iwn_softc *);
90 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
91 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
92 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
93 void **, bus_size_t, bus_size_t, int);
94 static void iwn_dma_contig_free(struct iwn_dma_info *);
95 static int iwn_alloc_sched(struct iwn_softc *);
96 static void iwn_free_sched(struct iwn_softc *);
97 static int iwn_alloc_kw(struct iwn_softc *);
98 static void iwn_free_kw(struct iwn_softc *);
99 static int iwn_alloc_ict(struct iwn_softc *);
100 static void iwn_free_ict(struct iwn_softc *);
101 static int iwn_alloc_fwmem(struct iwn_softc *);
102 static void iwn_free_fwmem(struct iwn_softc *);
103 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
104 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
105 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
106 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
108 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
109 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
110 static void iwn5000_ict_reset(struct iwn_softc *);
111 static int iwn_read_eeprom(struct iwn_softc *,
112 uint8_t macaddr[IEEE80211_ADDR_LEN]);
113 static void iwn4965_read_eeprom(struct iwn_softc *);
114 static void iwn4965_print_power_group(struct iwn_softc *, int);
115 static void iwn5000_read_eeprom(struct iwn_softc *);
116 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
117 static void iwn_read_eeprom_band(struct iwn_softc *, int);
119 static void iwn_read_eeprom_ht40(struct iwn_softc *, int);
121 static void iwn_read_eeprom_channels(struct iwn_softc *, int,
123 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
124 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
125 const uint8_t mac[IEEE80211_ADDR_LEN]);
126 static void iwn_newassoc(struct ieee80211_node *, int);
127 static int iwn_media_change(struct ifnet *);
128 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
129 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
130 struct iwn_rx_data *);
131 static void iwn_timer_callout(void *);
132 static void iwn_calib_reset(struct iwn_softc *);
133 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
134 struct iwn_rx_data *);
136 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
137 struct iwn_rx_data *);
139 static void iwn5000_rx_calib_results(struct iwn_softc *,
140 struct iwn_rx_desc *, struct iwn_rx_data *);
141 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
142 struct iwn_rx_data *);
143 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
144 struct iwn_rx_data *);
145 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
146 struct iwn_rx_data *);
147 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int,
149 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
150 static void iwn_notif_intr(struct iwn_softc *);
151 static void iwn_wakeup_intr(struct iwn_softc *);
152 static void iwn_rftoggle_intr(struct iwn_softc *);
153 static void iwn_fatal_intr(struct iwn_softc *);
154 static void iwn_intr(void *);
155 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
157 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
160 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
162 static uint8_t iwn_plcp_signal(int);
163 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
164 struct ieee80211_node *, struct iwn_tx_ring *);
165 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
166 const struct ieee80211_bpf_params *);
167 static void iwn_start(struct ifnet *);
168 static void iwn_start_locked(struct ifnet *);
169 static void iwn_watchdog(struct iwn_softc *sc);
170 static int iwn_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
171 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
172 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
174 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
176 static int iwn_set_link_quality(struct iwn_softc *, uint8_t, int);
177 static int iwn_add_broadcast_node(struct iwn_softc *, int);
178 static int iwn_wme_update(struct ieee80211com *);
179 static void iwn_update_mcast(struct ifnet *);
180 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
181 static int iwn_set_critical_temp(struct iwn_softc *);
182 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
183 static void iwn4965_power_calibration(struct iwn_softc *, int);
184 static int iwn4965_set_txpower(struct iwn_softc *,
185 struct ieee80211_channel *, int);
186 static int iwn5000_set_txpower(struct iwn_softc *,
187 struct ieee80211_channel *, int);
188 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
189 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
190 static int iwn_get_noise(const struct iwn_rx_general_stats *);
191 static int iwn4965_get_temperature(struct iwn_softc *);
192 static int iwn5000_get_temperature(struct iwn_softc *);
193 static int iwn_init_sensitivity(struct iwn_softc *);
194 static void iwn_collect_noise(struct iwn_softc *,
195 const struct iwn_rx_general_stats *);
196 static int iwn4965_init_gains(struct iwn_softc *);
197 static int iwn5000_init_gains(struct iwn_softc *);
198 static int iwn4965_set_gains(struct iwn_softc *);
199 static int iwn5000_set_gains(struct iwn_softc *);
200 static void iwn_tune_sensitivity(struct iwn_softc *,
201 const struct iwn_rx_stats *);
202 static int iwn_send_sensitivity(struct iwn_softc *);
203 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
204 static int iwn_config(struct iwn_softc *);
205 static int iwn_scan(struct iwn_softc *);
206 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
207 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
209 static int iwn_ampdu_rx_start(struct ieee80211com *,
210 struct ieee80211_node *, uint8_t);
211 static void iwn_ampdu_rx_stop(struct ieee80211com *,
212 struct ieee80211_node *, uint8_t);
213 static int iwn_ampdu_tx_start(struct ieee80211com *,
214 struct ieee80211_node *, uint8_t);
215 static void iwn_ampdu_tx_stop(struct ieee80211com *,
216 struct ieee80211_node *, uint8_t);
217 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
218 struct ieee80211_node *, uint8_t, uint16_t);
219 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, uint8_t, uint16_t);
220 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
221 struct ieee80211_node *, uint8_t, uint16_t);
222 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, uint8_t, uint16_t);
224 static int iwn5000_query_calibration(struct iwn_softc *);
225 static int iwn5000_send_calibration(struct iwn_softc *);
226 static int iwn5000_send_wimax_coex(struct iwn_softc *);
227 static int iwn4965_post_alive(struct iwn_softc *);
228 static int iwn5000_post_alive(struct iwn_softc *);
229 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
231 static int iwn4965_load_firmware(struct iwn_softc *);
232 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
233 const uint8_t *, int);
234 static int iwn5000_load_firmware(struct iwn_softc *);
235 static int iwn_read_firmware(struct iwn_softc *);
236 static int iwn_clock_wait(struct iwn_softc *);
237 static int iwn_apm_init(struct iwn_softc *);
238 static void iwn_apm_stop_master(struct iwn_softc *);
239 static void iwn_apm_stop(struct iwn_softc *);
240 static int iwn4965_nic_config(struct iwn_softc *);
241 static int iwn5000_nic_config(struct iwn_softc *);
242 static int iwn_hw_prepare(struct iwn_softc *);
243 static int iwn_hw_init(struct iwn_softc *);
244 static void iwn_hw_stop(struct iwn_softc *);
245 static void iwn_init_locked(struct iwn_softc *);
246 static void iwn_init(void *);
247 static void iwn_stop_locked(struct iwn_softc *);
248 static void iwn_stop(struct iwn_softc *);
249 static void iwn_scan_start(struct ieee80211com *);
250 static void iwn_scan_end(struct ieee80211com *);
251 static void iwn_set_channel(struct ieee80211com *);
252 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
253 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
254 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
255 struct ieee80211_channel *);
256 static int iwn_setregdomain(struct ieee80211com *,
257 struct ieee80211_regdomain *, int,
258 struct ieee80211_channel []);
259 static void iwn_hw_reset_task(void *, int);
260 static void iwn_radio_on_task(void *, int);
261 static void iwn_radio_off_task(void *, int);
262 static void iwn_sysctlattach(struct iwn_softc *);
263 static int iwn_pci_shutdown(device_t);
264 static int iwn_pci_suspend(device_t);
265 static int iwn_pci_resume(device_t);
270 IWN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
271 IWN_DEBUG_RECV = 0x00000002, /* basic recv operation */
272 IWN_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */
273 IWN_DEBUG_TXPOW = 0x00000008, /* tx power processing */
274 IWN_DEBUG_RESET = 0x00000010, /* reset processing */
275 IWN_DEBUG_OPS = 0x00000020, /* iwn_ops processing */
276 IWN_DEBUG_BEACON = 0x00000040, /* beacon handling */
277 IWN_DEBUG_WATCHDOG = 0x00000080, /* watchdog timeout */
278 IWN_DEBUG_INTR = 0x00000100, /* ISR */
279 IWN_DEBUG_CALIBRATE = 0x00000200, /* periodic calibration */
280 IWN_DEBUG_NODE = 0x00000400, /* node management */
281 IWN_DEBUG_LED = 0x00000800, /* led management */
282 IWN_DEBUG_CMD = 0x00001000, /* cmd submission */
283 IWN_DEBUG_FATAL = 0x80000000, /* fatal errors */
284 IWN_DEBUG_ANY = 0xffffffff
287 #define DPRINTF(sc, m, fmt, ...) do { \
288 if (sc->sc_debug & (m)) \
289 kprintf(fmt, __VA_ARGS__); \
292 static const char *iwn_intr_str(uint8_t);
294 #define DPRINTF(sc, m, fmt, ...) do { (void) sc; } while (0)
303 static const struct iwn_ident iwn_ident_table [] = {
304 { 0x8086, 0x4229, "Intel(R) PRO/Wireless 4965BGN" },
305 { 0x8086, 0x422D, "Intel(R) PRO/Wireless 4965BGN" },
306 { 0x8086, 0x4230, "Intel(R) PRO/Wireless 4965BGN" },
307 { 0x8086, 0x4233, "Intel(R) PRO/Wireless 4965BGN" },
308 { 0x8086, 0x4232, "Intel(R) PRO/Wireless 5100" },
309 { 0x8086, 0x4237, "Intel(R) PRO/Wireless 5100" },
310 { 0x8086, 0x423C, "Intel(R) PRO/Wireless 5150" },
311 { 0x8086, 0x423D, "Intel(R) PRO/Wireless 5150" },
312 { 0x8086, 0x4235, "Intel(R) PRO/Wireless 5300" },
313 { 0x8086, 0x4236, "Intel(R) PRO/Wireless 5300" },
314 { 0x8086, 0x423A, "Intel(R) PRO/Wireless 5350" },
315 { 0x8086, 0x423B, "Intel(R) PRO/Wireless 5350" },
316 { 0x8086, 0x0083, "Intel(R) PRO/Wireless 1000" },
317 { 0x8086, 0x0084, "Intel(R) PRO/Wireless 1000" },
318 { 0x8086, 0x008D, "Intel(R) PRO/Wireless 6000" },
319 { 0x8086, 0x008E, "Intel(R) PRO/Wireless 6000" },
320 { 0x8086, 0x4238, "Intel(R) PRO/Wireless 6000" },
321 { 0x8086, 0x4239, "Intel(R) PRO/Wireless 6000" },
322 { 0x8086, 0x422B, "Intel(R) PRO/Wireless 6000" },
323 { 0x8086, 0x422C, "Intel(R) PRO/Wireless 6000" },
324 { 0x8086, 0x0086, "Intel(R) PRO/Wireless 6050" },
325 { 0x8086, 0x0087, "Intel(R) PRO/Wireless 6050" },
329 static const struct iwn_hal iwn4965_hal = {
330 iwn4965_load_firmware,
334 iwn4965_update_sched,
335 iwn4965_get_temperature,
343 iwn4965_ampdu_tx_start,
344 iwn4965_ampdu_tx_stop,
348 IWN4965_ID_BROADCAST,
351 IWN4965_FW_TEXT_MAXSZ,
352 IWN4965_FW_DATA_MAXSZ,
357 static const struct iwn_hal iwn5000_hal = {
358 iwn5000_load_firmware,
362 iwn5000_update_sched,
363 iwn5000_get_temperature,
371 iwn5000_ampdu_tx_start,
372 iwn5000_ampdu_tx_stop,
376 IWN5000_ID_BROADCAST,
379 IWN5000_FW_TEXT_MAXSZ,
380 IWN5000_FW_DATA_MAXSZ,
386 iwn_pci_probe(device_t dev)
388 const struct iwn_ident *ident;
390 /* no wlan serializer needed */
391 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
392 if (pci_get_vendor(dev) == ident->vendor &&
393 pci_get_device(dev) == ident->device) {
394 device_set_desc(dev, ident->name);
402 iwn_pci_attach(device_t dev)
404 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
405 struct ieee80211com *ic;
407 const struct iwn_hal *hal;
409 int i, error, result;
410 uint8_t macaddr[IEEE80211_ADDR_LEN];
412 wlan_serialize_enter();
417 if (bus_dma_tag_create(sc->sc_dmat,
419 BUS_SPACE_MAXADDR_32BIT,
427 device_printf(dev, "cannot allocate DMA tag\n");
434 /* prepare sysctl tree for use in sub modules */
435 sysctl_ctx_init(&sc->sc_sysctl_ctx);
436 sc->sc_sysctl_tree = SYSCTL_ADD_NODE(&sc->sc_sysctl_ctx,
437 SYSCTL_STATIC_CHILDREN(_hw),
439 device_get_nameunit(sc->sc_dev),
443 * Get the offset of the PCI Express Capability Structure in PCI
444 * Configuration Space.
446 error = pci_find_extcap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
448 device_printf(dev, "PCIe capability structure not found!\n");
452 /* Clear device-specific "PCI retry timeout" register (41h). */
453 pci_write_config(dev, 0x41, 0, 1);
455 /* Hardware bug workaround. */
456 tmp = pci_read_config(dev, PCIR_COMMAND, 1);
457 if (tmp & PCIM_CMD_INTxDIS) {
458 DPRINTF(sc, IWN_DEBUG_RESET, "%s: PCIe INTx Disable set\n",
460 tmp &= ~PCIM_CMD_INTxDIS;
461 pci_write_config(dev, PCIR_COMMAND, tmp, 1);
464 /* Enable bus-mastering. */
465 pci_enable_busmaster(dev);
467 sc->mem_rid = PCIR_BAR(0);
468 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
470 if (sc->mem == NULL ) {
471 device_printf(dev, "could not allocate memory resources\n");
476 sc->sc_st = rman_get_bustag(sc->mem);
477 sc->sc_sh = rman_get_bushandle(sc->mem);
479 if ((result = pci_msi_count(dev)) == 1 &&
480 pci_alloc_msi(dev, &result) == 0)
482 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
483 RF_ACTIVE | RF_SHAREABLE);
484 if (sc->irq == NULL) {
485 device_printf(dev, "could not allocate interrupt resource\n");
490 callout_init(&sc->sc_timer_to);
491 TASK_INIT(&sc->sc_reinit_task, 0, iwn_hw_reset_task, sc );
492 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on_task, sc );
493 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off_task, sc );
495 /* Attach Hardware Abstraction Layer. */
496 hal = iwn_hal_attach(sc);
498 error = ENXIO; /* XXX: Wrong error code? */
502 error = iwn_hw_prepare(sc);
504 device_printf(dev, "hardware not ready, error %d\n", error);
508 /* Allocate DMA memory for firmware transfers. */
509 error = iwn_alloc_fwmem(sc);
512 "could not allocate memory for firmware, error %d\n",
517 /* Allocate "Keep Warm" page. */
518 error = iwn_alloc_kw(sc);
521 "could not allocate \"Keep Warm\" page, error %d\n", error);
525 /* Allocate ICT table for 5000 Series. */
526 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
527 (error = iwn_alloc_ict(sc)) != 0) {
529 "%s: could not allocate ICT table, error %d\n",
534 /* Allocate TX scheduler "rings". */
535 error = iwn_alloc_sched(sc);
538 "could not allocate TX scheduler rings, error %d\n",
543 /* Allocate TX rings (16 on 4965AGN, 20 on 5000). */
544 for (i = 0; i < hal->ntxqs; i++) {
545 error = iwn_alloc_tx_ring(sc, &sc->txq[i], i);
548 "could not allocate Tx ring %d, error %d\n",
554 /* Allocate RX ring. */
555 error = iwn_alloc_rx_ring(sc, &sc->rxq);
558 "could not allocate Rx ring, error %d\n", error);
562 /* Clear pending interrupts. */
563 IWN_WRITE(sc, IWN_INT, 0xffffffff);
565 /* Count the number of available chains. */
567 ((sc->txchainmask >> 2) & 1) +
568 ((sc->txchainmask >> 1) & 1) +
569 ((sc->txchainmask >> 0) & 1);
571 ((sc->rxchainmask >> 2) & 1) +
572 ((sc->rxchainmask >> 1) & 1) +
573 ((sc->rxchainmask >> 0) & 1);
575 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
577 device_printf(dev, "can not allocate ifnet structure\n");
583 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
584 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
586 /* Set device capabilities. */
588 IEEE80211_C_STA /* station mode supported */
589 | IEEE80211_C_MONITOR /* monitor mode supported */
590 | IEEE80211_C_TXPMGT /* tx power management */
591 | IEEE80211_C_SHSLOT /* short slot time supported */
593 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
594 | IEEE80211_C_BGSCAN /* background scanning */
596 | IEEE80211_C_IBSS /* ibss/adhoc mode */
598 | IEEE80211_C_WME /* WME */
601 /* XXX disable until HT channel setup works */
603 IEEE80211_HTCAP_SMPS_ENA /* SM PS mode enabled */
604 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width */
605 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
606 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
607 | IEEE80211_HTCAP_RXSTBC_2STREAM/* 1-2 spatial streams */
608 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
609 /* s/w capabilities */
610 | IEEE80211_HTC_HT /* HT operation */
611 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
612 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
615 /* Set HT capabilities. */
617 #if IWN_RBUF_SIZE == 8192
618 IEEE80211_HTCAP_AMSDU7935 |
620 IEEE80211_HTCAP_CBW20_40 |
621 IEEE80211_HTCAP_SGI20 |
622 IEEE80211_HTCAP_SGI40;
623 if (sc->hw_type != IWN_HW_REV_TYPE_4965)
624 ic->ic_htcaps |= IEEE80211_HTCAP_GF;
625 if (sc->hw_type == IWN_HW_REV_TYPE_6050)
626 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DYN;
628 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DIS;
631 /* Read MAC address, channels, etc from EEPROM. */
632 error = iwn_read_eeprom(sc, macaddr);
634 device_printf(dev, "could not read EEPROM, error %d\n",
639 device_printf(sc->sc_dev, "MIMO %dT%dR, %.4s, address %6D\n",
640 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
644 /* Set supported HT rates. */
645 ic->ic_sup_mcs[0] = 0xff;
646 if (sc->nrxchains > 1)
647 ic->ic_sup_mcs[1] = 0xff;
648 if (sc->nrxchains > 2)
649 ic->ic_sup_mcs[2] = 0xff;
652 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
654 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
655 ifp->if_init = iwn_init;
656 ifp->if_ioctl = iwn_ioctl;
657 ifp->if_start = iwn_start;
658 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
659 ifq_set_ready(&ifp->if_snd);
661 ieee80211_ifattach(ic, macaddr);
662 ic->ic_vap_create = iwn_vap_create;
663 ic->ic_vap_delete = iwn_vap_delete;
664 ic->ic_raw_xmit = iwn_raw_xmit;
665 ic->ic_node_alloc = iwn_node_alloc;
666 ic->ic_newassoc = iwn_newassoc;
667 ic->ic_wme.wme_update = iwn_wme_update;
668 ic->ic_update_mcast = iwn_update_mcast;
669 ic->ic_scan_start = iwn_scan_start;
670 ic->ic_scan_end = iwn_scan_end;
671 ic->ic_set_channel = iwn_set_channel;
672 ic->ic_scan_curchan = iwn_scan_curchan;
673 ic->ic_scan_mindwell = iwn_scan_mindwell;
674 ic->ic_setregdomain = iwn_setregdomain;
676 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
677 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
678 ic->ic_ampdu_tx_start = iwn_ampdu_tx_start;
679 ic->ic_ampdu_tx_stop = iwn_ampdu_tx_stop;
682 iwn_radiotap_attach(sc);
683 iwn_sysctlattach(sc);
686 * Hook our interrupt after all initialization is complete.
688 error = bus_setup_intr(dev, sc->irq, INTR_MPSAFE,
689 iwn_intr, sc, &sc->sc_ih,
690 &wlan_global_serializer);
692 device_printf(dev, "could not set up interrupt, error %d\n",
697 ieee80211_announce(ic);
698 wlan_serialize_exit();
703 wlan_serialize_exit();
707 static const struct iwn_hal *
708 iwn_hal_attach(struct iwn_softc *sc)
710 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> 4) & 0xf;
712 switch (sc->hw_type) {
713 case IWN_HW_REV_TYPE_4965:
714 sc->sc_hal = &iwn4965_hal;
715 sc->limits = &iwn4965_sensitivity_limits;
716 sc->fwname = "iwn4965fw";
717 sc->txchainmask = IWN_ANT_AB;
718 sc->rxchainmask = IWN_ANT_ABC;
720 case IWN_HW_REV_TYPE_5100:
721 sc->sc_hal = &iwn5000_hal;
722 sc->limits = &iwn5000_sensitivity_limits;
723 sc->fwname = "iwn5000fw";
724 sc->txchainmask = IWN_ANT_B;
725 sc->rxchainmask = IWN_ANT_AB;
727 case IWN_HW_REV_TYPE_5150:
728 sc->sc_hal = &iwn5000_hal;
729 sc->limits = &iwn5150_sensitivity_limits;
730 sc->fwname = "iwn5150fw";
731 sc->txchainmask = IWN_ANT_A;
732 sc->rxchainmask = IWN_ANT_AB;
734 case IWN_HW_REV_TYPE_5300:
735 case IWN_HW_REV_TYPE_5350:
736 sc->sc_hal = &iwn5000_hal;
737 sc->limits = &iwn5000_sensitivity_limits;
738 sc->fwname = "iwn5000fw";
739 sc->txchainmask = IWN_ANT_ABC;
740 sc->rxchainmask = IWN_ANT_ABC;
742 case IWN_HW_REV_TYPE_1000:
743 sc->sc_hal = &iwn5000_hal;
744 sc->limits = &iwn1000_sensitivity_limits;
745 sc->fwname = "iwn1000fw";
746 sc->txchainmask = IWN_ANT_A;
747 sc->rxchainmask = IWN_ANT_AB;
749 case IWN_HW_REV_TYPE_6000:
750 sc->sc_hal = &iwn5000_hal;
751 sc->limits = &iwn6000_sensitivity_limits;
752 sc->fwname = "iwn6000fw";
753 switch (pci_get_device(sc->sc_dev)) {
756 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
757 sc->txchainmask = IWN_ANT_BC;
758 sc->rxchainmask = IWN_ANT_BC;
761 sc->txchainmask = IWN_ANT_ABC;
762 sc->rxchainmask = IWN_ANT_ABC;
766 case IWN_HW_REV_TYPE_6050:
767 sc->sc_hal = &iwn5000_hal;
768 sc->limits = &iwn6000_sensitivity_limits;
769 sc->fwname = "iwn6000fw";
770 sc->txchainmask = IWN_ANT_AB;
771 sc->rxchainmask = IWN_ANT_AB;
774 device_printf(sc->sc_dev, "adapter type %d not supported\n",
782 * Attach the interface to 802.11 radiotap.
785 iwn_radiotap_attach(struct iwn_softc *sc)
787 struct ifnet *ifp = sc->sc_ifp;
788 struct ieee80211com *ic = ifp->if_l2com;
790 ieee80211_radiotap_attach(ic,
791 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
792 IWN_TX_RADIOTAP_PRESENT,
793 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
794 IWN_RX_RADIOTAP_PRESENT);
797 static struct ieee80211vap *
798 iwn_vap_create(struct ieee80211com *ic,
799 const char name[IFNAMSIZ], int unit, int opmode, int flags,
800 const uint8_t bssid[IEEE80211_ADDR_LEN],
801 const uint8_t mac[IEEE80211_ADDR_LEN])
804 struct ieee80211vap *vap;
806 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
808 ivp = (struct iwn_vap *) kmalloc(sizeof(struct iwn_vap),
809 M_80211_VAP, M_INTWAIT | M_ZERO);
813 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
814 vap->iv_bmissthreshold = 10; /* override default */
815 /* Override with driver methods. */
816 ivp->iv_newstate = vap->iv_newstate;
817 vap->iv_newstate = iwn_newstate;
819 ieee80211_ratectl_init(vap);
820 /* Complete setup. */
821 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status);
822 ic->ic_opmode = opmode;
827 iwn_vap_delete(struct ieee80211vap *vap)
829 struct iwn_vap *ivp = IWN_VAP(vap);
831 ieee80211_ratectl_deinit(vap);
832 ieee80211_vap_detach(vap);
833 kfree(ivp, M_80211_VAP);
837 iwn_cleanup(device_t dev)
839 struct iwn_softc *sc = device_get_softc(dev);
840 struct ifnet *ifp = sc->sc_ifp;
841 struct ieee80211com *ic;
847 ieee80211_draintask(ic, &sc->sc_reinit_task);
848 ieee80211_draintask(ic, &sc->sc_radioon_task);
849 ieee80211_draintask(ic, &sc->sc_radiooff_task);
852 callout_stop(&sc->sc_timer_to);
853 ieee80211_ifdetach(ic);
856 /* cleanup sysctl nodes */
857 sysctl_ctx_free(&sc->sc_sysctl_ctx);
859 /* Free DMA resources. */
860 iwn_free_rx_ring(sc, &sc->rxq);
861 if (sc->sc_hal != NULL)
862 for (i = 0; i < sc->sc_hal->ntxqs; i++)
863 iwn_free_tx_ring(sc, &sc->txq[i]);
866 if (sc->ict != NULL) {
872 if (sc->irq != NULL) {
873 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
874 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
875 if (sc->irq_rid == 1)
876 pci_release_msi(dev);
880 if (sc->mem != NULL) {
881 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
894 iwn_pci_detach(device_t dev)
896 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
898 wlan_serialize_enter();
900 bus_dma_tag_destroy(sc->sc_dmat);
901 wlan_serialize_exit();
907 iwn_nic_lock(struct iwn_softc *sc)
911 /* Request exclusive access to NIC. */
912 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
914 /* Spin until we actually get the lock. */
915 for (ntries = 0; ntries < 1000; ntries++) {
916 if ((IWN_READ(sc, IWN_GP_CNTRL) &
917 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
918 IWN_GP_CNTRL_MAC_ACCESS_ENA)
926 iwn_nic_unlock(struct iwn_softc *sc)
928 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
931 static __inline uint32_t
932 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
934 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
935 IWN_BARRIER_READ_WRITE(sc);
936 return IWN_READ(sc, IWN_PRPH_RDATA);
940 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
942 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
943 IWN_BARRIER_WRITE(sc);
944 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
948 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
950 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
954 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
956 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
960 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
961 const uint32_t *data, int count)
963 for (; count > 0; count--, data++, addr += 4)
964 iwn_prph_write(sc, addr, *data);
967 static __inline uint32_t
968 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
970 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
971 IWN_BARRIER_READ_WRITE(sc);
972 return IWN_READ(sc, IWN_MEM_RDATA);
976 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
978 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
979 IWN_BARRIER_WRITE(sc);
980 IWN_WRITE(sc, IWN_MEM_WDATA, data);
984 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
988 tmp = iwn_mem_read(sc, addr & ~3);
990 tmp = (tmp & 0x0000ffff) | data << 16;
992 tmp = (tmp & 0xffff0000) | data;
993 iwn_mem_write(sc, addr & ~3, tmp);
997 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1000 for (; count > 0; count--, addr += 4)
1001 *data++ = iwn_mem_read(sc, addr);
1004 static __inline void
1005 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1008 for (; count > 0; count--, addr += 4)
1009 iwn_mem_write(sc, addr, val);
1013 iwn_eeprom_lock(struct iwn_softc *sc)
1017 for (i = 0; i < 100; i++) {
1018 /* Request exclusive access to EEPROM. */
1019 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1020 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1022 /* Spin until we actually get the lock. */
1023 for (ntries = 0; ntries < 100; ntries++) {
1024 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1025 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1033 static __inline void
1034 iwn_eeprom_unlock(struct iwn_softc *sc)
1036 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1040 * Initialize access by host to One Time Programmable ROM.
1041 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1044 iwn_init_otprom(struct iwn_softc *sc)
1046 uint16_t prev, base, next;
1049 /* Wait for clock stabilization before accessing prph. */
1050 error = iwn_clock_wait(sc);
1054 error = iwn_nic_lock(sc);
1057 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1059 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1062 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1063 if (sc->hw_type != IWN_HW_REV_TYPE_1000) {
1064 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1065 IWN_RESET_LINK_PWR_MGMT_DIS);
1067 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1068 /* Clear ECC status. */
1069 IWN_SETBITS(sc, IWN_OTP_GP,
1070 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1073 * Find the block before last block (contains the EEPROM image)
1074 * for HW without OTP shadow RAM.
1076 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
1077 /* Switch to absolute addressing mode. */
1078 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1080 for (count = 0; count < IWN1000_OTP_NBLOCKS; count++) {
1081 error = iwn_read_prom_data(sc, base, &next, 2);
1084 if (next == 0) /* End of linked-list. */
1087 base = le16toh(next);
1089 if (count == 0 || count == IWN1000_OTP_NBLOCKS)
1091 /* Skip "next" word. */
1092 sc->prom_base = prev + 1;
1098 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1102 uint8_t *out = data;
1104 addr += sc->prom_base;
1105 for (; count > 0; count -= 2, addr++) {
1106 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1107 for (ntries = 0; ntries < 10; ntries++) {
1108 val = IWN_READ(sc, IWN_EEPROM);
1109 if (val & IWN_EEPROM_READ_VALID)
1114 device_printf(sc->sc_dev,
1115 "timeout reading ROM at 0x%x\n", addr);
1118 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1119 /* OTPROM, check for ECC errors. */
1120 tmp = IWN_READ(sc, IWN_OTP_GP);
1121 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1122 device_printf(sc->sc_dev,
1123 "OTPROM ECC error at 0x%x\n", addr);
1126 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1127 /* Correctable ECC error, clear bit. */
1128 IWN_SETBITS(sc, IWN_OTP_GP,
1129 IWN_OTP_GP_ECC_CORR_STTS);
1140 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1144 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1145 *(bus_addr_t *)arg = segs[0].ds_addr;
1149 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1150 void **kvap, bus_size_t size, bus_size_t alignment, int flags)
1157 error = bus_dma_tag_create(sc->sc_dmat, alignment,
1158 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1159 1, size, flags, &dma->tag);
1161 device_printf(sc->sc_dev,
1162 "%s: bus_dma_tag_create failed, error %d\n",
1166 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1167 flags | BUS_DMA_ZERO, &dma->map);
1169 device_printf(sc->sc_dev,
1170 "%s: bus_dmamem_alloc failed, error %d\n", __func__, error);
1173 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr,
1174 size, iwn_dma_map_addr, &dma->paddr, flags);
1176 device_printf(sc->sc_dev,
1177 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1185 iwn_dma_contig_free(dma);
1190 iwn_dma_contig_free(struct iwn_dma_info *dma)
1192 if (dma->tag != NULL) {
1193 if (dma->map != NULL) {
1194 if (dma->paddr == 0) {
1195 bus_dmamap_sync(dma->tag, dma->map,
1196 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1197 bus_dmamap_unload(dma->tag, dma->map);
1199 bus_dmamap_destroy(dma->tag, dma->map);
1201 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1202 bus_dma_tag_destroy(dma->tag);
1207 iwn_alloc_sched(struct iwn_softc *sc)
1209 /* TX scheduler rings must be aligned on a 1KB boundary. */
1210 return iwn_dma_contig_alloc(sc, &sc->sched_dma,
1211 (void **)&sc->sched, sc->sc_hal->schedsz, 1024, BUS_DMA_NOWAIT);
1215 iwn_free_sched(struct iwn_softc *sc)
1217 iwn_dma_contig_free(&sc->sched_dma);
1221 iwn_alloc_kw(struct iwn_softc *sc)
1223 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1224 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096,
1229 iwn_free_kw(struct iwn_softc *sc)
1231 iwn_dma_contig_free(&sc->kw_dma);
1235 iwn_alloc_ict(struct iwn_softc *sc)
1237 /* ICT table must be aligned on a 4KB boundary. */
1238 return iwn_dma_contig_alloc(sc, &sc->ict_dma,
1239 (void **)&sc->ict, IWN_ICT_SIZE, 4096, BUS_DMA_NOWAIT);
1243 iwn_free_ict(struct iwn_softc *sc)
1245 iwn_dma_contig_free(&sc->ict_dma);
1249 iwn_alloc_fwmem(struct iwn_softc *sc)
1251 /* Must be aligned on a 16-byte boundary. */
1252 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL,
1253 sc->sc_hal->fwsz, 16, BUS_DMA_NOWAIT);
1257 iwn_free_fwmem(struct iwn_softc *sc)
1259 iwn_dma_contig_free(&sc->fw_dma);
1263 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1270 /* Allocate RX descriptors (256-byte aligned). */
1271 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1272 error = iwn_dma_contig_alloc(sc, &ring->desc_dma,
1273 (void **)&ring->desc, size, 256, BUS_DMA_NOWAIT);
1275 device_printf(sc->sc_dev,
1276 "%s: could not allocate Rx ring DMA memory, error %d\n",
1281 error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
1282 BUS_SPACE_MAXADDR_32BIT,
1283 BUS_SPACE_MAXADDR, NULL, NULL, MJUMPAGESIZE, 1,
1284 MJUMPAGESIZE, BUS_DMA_NOWAIT, &ring->data_dmat);
1286 device_printf(sc->sc_dev,
1287 "%s: bus_dma_tag_create_failed, error %d\n",
1292 /* Allocate RX status area (16-byte aligned). */
1293 error = iwn_dma_contig_alloc(sc, &ring->stat_dma,
1294 (void **)&ring->stat, sizeof (struct iwn_rx_status),
1295 16, BUS_DMA_NOWAIT);
1297 device_printf(sc->sc_dev,
1298 "%s: could not allocate Rx status DMA memory, error %d\n",
1304 * Allocate and map RX buffers.
1306 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1307 struct iwn_rx_data *data = &ring->data[i];
1310 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1312 device_printf(sc->sc_dev,
1313 "%s: bus_dmamap_create failed, error %d\n",
1318 data->m = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR,
1320 if (data->m == NULL) {
1321 device_printf(sc->sc_dev,
1322 "%s: could not allocate rx mbuf\n", __func__);
1328 error = bus_dmamap_load(ring->data_dmat, data->map,
1329 mtod(data->m, caddr_t), MJUMPAGESIZE,
1330 iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
1331 if (error != 0 && error != EFBIG) {
1332 device_printf(sc->sc_dev,
1333 "%s: bus_dmamap_load failed, error %d\n",
1336 error = ENOMEM; /* XXX unique code */
1339 bus_dmamap_sync(ring->data_dmat, data->map,
1340 BUS_DMASYNC_PREWRITE);
1342 /* Set physical address of RX buffer (256-byte aligned). */
1343 ring->desc[i] = htole32(paddr >> 8);
1345 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1346 BUS_DMASYNC_PREWRITE);
1349 iwn_free_rx_ring(sc, ring);
1354 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1358 if (iwn_nic_lock(sc) == 0) {
1359 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1360 for (ntries = 0; ntries < 1000; ntries++) {
1361 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1362 IWN_FH_RX_STATUS_IDLE)
1369 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
1370 "timeout resetting Rx ring");
1374 sc->last_rx_valid = 0;
1378 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1382 iwn_dma_contig_free(&ring->desc_dma);
1383 iwn_dma_contig_free(&ring->stat_dma);
1385 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1386 struct iwn_rx_data *data = &ring->data[i];
1388 if (data->m != NULL) {
1389 bus_dmamap_sync(ring->data_dmat, data->map,
1390 BUS_DMASYNC_POSTREAD);
1391 bus_dmamap_unload(ring->data_dmat, data->map);
1394 if (data->map != NULL)
1395 bus_dmamap_destroy(ring->data_dmat, data->map);
1400 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1410 /* Allocate TX descriptors (256-byte aligned.) */
1411 size = IWN_TX_RING_COUNT * sizeof(struct iwn_tx_desc);
1412 error = iwn_dma_contig_alloc(sc, &ring->desc_dma,
1413 (void **)&ring->desc, size, 256, BUS_DMA_NOWAIT);
1415 device_printf(sc->sc_dev,
1416 "%s: could not allocate TX ring DMA memory, error %d\n",
1422 * We only use rings 0 through 4 (4 EDCA + cmd) so there is no need
1423 * to allocate commands space for other rings.
1428 size = IWN_TX_RING_COUNT * sizeof(struct iwn_tx_cmd);
1429 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma,
1430 (void **)&ring->cmd, size, 4, BUS_DMA_NOWAIT);
1432 device_printf(sc->sc_dev,
1433 "%s: could not allocate TX cmd DMA memory, error %d\n",
1438 error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
1439 BUS_SPACE_MAXADDR_32BIT,
1440 BUS_SPACE_MAXADDR, NULL, NULL, MJUMPAGESIZE, IWN_MAX_SCATTER - 1,
1441 MJUMPAGESIZE, BUS_DMA_NOWAIT, &ring->data_dmat);
1443 device_printf(sc->sc_dev,
1444 "%s: bus_dma_tag_create_failed, error %d\n",
1449 paddr = ring->cmd_dma.paddr;
1450 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1451 struct iwn_tx_data *data = &ring->data[i];
1453 data->cmd_paddr = paddr;
1454 data->scratch_paddr = paddr + 12;
1455 paddr += sizeof (struct iwn_tx_cmd);
1457 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1459 device_printf(sc->sc_dev,
1460 "%s: bus_dmamap_create failed, error %d\n",
1464 bus_dmamap_sync(ring->data_dmat, data->map,
1465 BUS_DMASYNC_PREWRITE);
1469 iwn_free_tx_ring(sc, ring);
1474 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
1478 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1479 struct iwn_tx_data *data = &ring->data[i];
1481 if (data->m != NULL) {
1482 bus_dmamap_unload(ring->data_dmat, data->map);
1487 /* Clear TX descriptors. */
1488 memset(ring->desc, 0, ring->desc_dma.size);
1489 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1490 BUS_DMASYNC_PREWRITE);
1491 sc->qfullmsk &= ~(1 << ring->qid);
1497 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
1501 iwn_dma_contig_free(&ring->desc_dma);
1502 iwn_dma_contig_free(&ring->cmd_dma);
1504 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1505 struct iwn_tx_data *data = &ring->data[i];
1507 if (data->m != NULL) {
1508 bus_dmamap_sync(ring->data_dmat, data->map,
1509 BUS_DMASYNC_POSTWRITE);
1510 bus_dmamap_unload(ring->data_dmat, data->map);
1513 if (data->map != NULL)
1514 bus_dmamap_destroy(ring->data_dmat, data->map);
1519 iwn5000_ict_reset(struct iwn_softc *sc)
1521 /* Disable interrupts. */
1522 IWN_WRITE(sc, IWN_INT_MASK, 0);
1524 /* Reset ICT table. */
1525 memset(sc->ict, 0, IWN_ICT_SIZE);
1528 /* Set physical address of ICT table (4KB aligned.) */
1529 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
1530 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
1531 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
1533 /* Enable periodic RX interrupt. */
1534 sc->int_mask |= IWN_INT_RX_PERIODIC;
1535 /* Switch to ICT interrupt mode in driver. */
1536 sc->sc_flags |= IWN_FLAG_USE_ICT;
1538 /* Re-enable interrupts. */
1539 IWN_WRITE(sc, IWN_INT, 0xffffffff);
1540 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
1544 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
1546 const struct iwn_hal *hal = sc->sc_hal;
1550 /* Check whether adapter has an EEPROM or an OTPROM. */
1551 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
1552 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
1553 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
1554 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
1555 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
1557 /* Adapter has to be powered on for EEPROM access to work. */
1558 error = iwn_apm_init(sc);
1560 device_printf(sc->sc_dev,
1561 "%s: could not power ON adapter, error %d\n",
1566 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
1567 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
1570 error = iwn_eeprom_lock(sc);
1572 device_printf(sc->sc_dev,
1573 "%s: could not lock ROM, error %d\n",
1578 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1579 error = iwn_init_otprom(sc);
1581 device_printf(sc->sc_dev,
1582 "%s: could not initialize OTPROM, error %d\n",
1588 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
1589 sc->rfcfg = le16toh(val);
1590 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
1592 /* Read MAC address. */
1593 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
1595 /* Read adapter-specific information from EEPROM. */
1596 hal->read_eeprom(sc);
1598 iwn_apm_stop(sc); /* Power OFF adapter. */
1600 iwn_eeprom_unlock(sc);
1605 iwn4965_read_eeprom(struct iwn_softc *sc)
1611 /* Read regulatory domain (4 ASCII characters.) */
1612 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
1614 /* Read the list of authorized channels (20MHz ones only.) */
1615 for (i = 0; i < 5; i++) {
1616 addr = iwn4965_regulatory_bands[i];
1617 iwn_read_eeprom_channels(sc, i, addr);
1620 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
1621 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
1622 sc->maxpwr2GHz = val & 0xff;
1623 sc->maxpwr5GHz = val >> 8;
1624 /* Check that EEPROM values are within valid range. */
1625 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
1626 sc->maxpwr5GHz = 38;
1627 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
1628 sc->maxpwr2GHz = 38;
1629 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
1630 sc->maxpwr2GHz, sc->maxpwr5GHz);
1632 /* Read samples for each TX power group. */
1633 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
1636 /* Read voltage at which samples were taken. */
1637 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
1638 sc->eeprom_voltage = (int16_t)le16toh(val);
1639 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
1640 sc->eeprom_voltage);
1643 /* Print samples. */
1644 if (sc->sc_debug & IWN_DEBUG_ANY) {
1645 for (i = 0; i < IWN_NBANDS; i++)
1646 iwn4965_print_power_group(sc, i);
1653 iwn4965_print_power_group(struct iwn_softc *sc, int i)
1655 struct iwn4965_eeprom_band *band = &sc->bands[i];
1656 struct iwn4965_eeprom_chan_samples *chans = band->chans;
1659 kprintf("===band %d===\n", i);
1660 kprintf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
1661 kprintf("chan1 num=%d\n", chans[0].num);
1662 for (c = 0; c < 2; c++) {
1663 for (j = 0; j < IWN_NSAMPLES; j++) {
1664 kprintf("chain %d, sample %d: temp=%d gain=%d "
1665 "power=%d pa_det=%d\n", c, j,
1666 chans[0].samples[c][j].temp,
1667 chans[0].samples[c][j].gain,
1668 chans[0].samples[c][j].power,
1669 chans[0].samples[c][j].pa_det);
1672 kprintf("chan2 num=%d\n", chans[1].num);
1673 for (c = 0; c < 2; c++) {
1674 for (j = 0; j < IWN_NSAMPLES; j++) {
1675 kprintf("chain %d, sample %d: temp=%d gain=%d "
1676 "power=%d pa_det=%d\n", c, j,
1677 chans[1].samples[c][j].temp,
1678 chans[1].samples[c][j].gain,
1679 chans[1].samples[c][j].power,
1680 chans[1].samples[c][j].pa_det);
1687 iwn5000_read_eeprom(struct iwn_softc *sc)
1689 struct iwn5000_eeprom_calib_hdr hdr;
1691 uint32_t addr, base;
1695 /* Read regulatory domain (4 ASCII characters.) */
1696 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
1697 base = le16toh(val);
1698 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
1699 sc->eeprom_domain, 4);
1701 /* Read the list of authorized channels (20MHz ones only.) */
1702 for (i = 0; i < 5; i++) {
1703 addr = base + iwn5000_regulatory_bands[i];
1704 iwn_read_eeprom_channels(sc, i, addr);
1707 /* Read enhanced TX power information for 6000 Series. */
1708 if (sc->hw_type >= IWN_HW_REV_TYPE_6000)
1709 iwn_read_eeprom_enhinfo(sc);
1711 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
1712 base = le16toh(val);
1713 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
1714 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
1715 "%s: calib version=%u pa type=%u voltage=%u\n",
1716 __func__, hdr.version, hdr.pa_type, le16toh(hdr.volt));
1717 sc->calib_ver = hdr.version;
1719 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
1720 /* Compute temperature offset. */
1721 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
1722 temp = le16toh(val);
1723 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
1724 volt = le16toh(val);
1725 sc->temp_off = temp - (volt / -5);
1726 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
1727 temp, volt, sc->temp_off);
1729 /* Read crystal calibration. */
1730 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
1731 &sc->eeprom_crystal, sizeof (uint32_t));
1732 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
1733 le32toh(sc->eeprom_crystal));
1738 * Translate EEPROM flags to net80211.
1741 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
1746 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
1747 nflags |= IEEE80211_CHAN_PASSIVE;
1748 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
1749 nflags |= IEEE80211_CHAN_NOADHOC;
1750 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
1751 nflags |= IEEE80211_CHAN_DFS;
1752 /* XXX apparently IBSS may still be marked */
1753 nflags |= IEEE80211_CHAN_NOADHOC;
1760 iwn_read_eeprom_band(struct iwn_softc *sc, int n)
1762 struct ifnet *ifp = sc->sc_ifp;
1763 struct ieee80211com *ic = ifp->if_l2com;
1764 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
1765 const struct iwn_chan_band *band = &iwn_bands[n];
1766 struct ieee80211_channel *c;
1767 int i, chan, nflags;
1769 for (i = 0; i < band->nchan; i++) {
1770 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
1771 DPRINTF(sc, IWN_DEBUG_RESET,
1772 "skip chan %d flags 0x%x maxpwr %d\n",
1773 band->chan[i], channels[i].flags,
1774 channels[i].maxpwr);
1777 chan = band->chan[i];
1778 nflags = iwn_eeprom_channel_flags(&channels[i]);
1780 DPRINTF(sc, IWN_DEBUG_RESET,
1781 "add chan %d flags 0x%x maxpwr %d\n",
1782 chan, channels[i].flags, channels[i].maxpwr);
1784 c = &ic->ic_channels[ic->ic_nchans++];
1786 c->ic_maxregpower = channels[i].maxpwr;
1787 c->ic_maxpower = 2*c->ic_maxregpower;
1789 /* Save maximum allowed TX power for this channel. */
1790 sc->maxpwr[chan] = channels[i].maxpwr;
1792 if (n == 0) { /* 2GHz band */
1793 c->ic_freq = ieee80211_ieee2mhz(chan,
1796 /* G =>'s B is supported */
1797 c->ic_flags = IEEE80211_CHAN_B | nflags;
1799 c = &ic->ic_channels[ic->ic_nchans++];
1801 c->ic_flags = IEEE80211_CHAN_G | nflags;
1802 } else { /* 5GHz band */
1803 c->ic_freq = ieee80211_ieee2mhz(chan,
1805 c->ic_flags = IEEE80211_CHAN_A | nflags;
1806 sc->sc_flags |= IWN_FLAG_HAS_5GHZ;
1809 /* XXX no constraints on using HT20 */
1810 /* add HT20, HT40 added separately */
1811 c = &ic->ic_channels[ic->ic_nchans++];
1813 c->ic_flags |= IEEE80211_CHAN_HT20;
1814 /* XXX NARROW =>'s 1/2 and 1/4 width? */
1821 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n)
1823 struct ifnet *ifp = sc->sc_ifp;
1824 struct ieee80211com *ic = ifp->if_l2com;
1825 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
1826 const struct iwn_chan_band *band = &iwn_bands[n];
1827 struct ieee80211_channel *c, *cent, *extc;
1830 for (i = 0; i < band->nchan; i++) {
1831 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID) ||
1832 !(channels[i].flags & IWN_EEPROM_CHAN_WIDE)) {
1833 DPRINTF(sc, IWN_DEBUG_RESET,
1834 "skip chan %d flags 0x%x maxpwr %d\n",
1835 band->chan[i], channels[i].flags,
1836 channels[i].maxpwr);
1840 * Each entry defines an HT40 channel pair; find the
1841 * center channel, then the extension channel above.
1843 cent = ieee80211_find_channel_byieee(ic, band->chan[i],
1844 band->flags & ~IEEE80211_CHAN_HT);
1845 if (cent == NULL) { /* XXX shouldn't happen */
1846 device_printf(sc->sc_dev,
1847 "%s: no entry for channel %d\n",
1848 __func__, band->chan[i]);
1851 extc = ieee80211_find_channel(ic, cent->ic_freq+20,
1852 band->flags & ~IEEE80211_CHAN_HT);
1854 DPRINTF(sc, IWN_DEBUG_RESET,
1855 "skip chan %d, extension channel not found\n",
1860 DPRINTF(sc, IWN_DEBUG_RESET,
1861 "add ht40 chan %d flags 0x%x maxpwr %d\n",
1862 band->chan[i], channels[i].flags, channels[i].maxpwr);
1864 c = &ic->ic_channels[ic->ic_nchans++];
1866 c->ic_extieee = extc->ic_ieee;
1867 c->ic_flags &= ~IEEE80211_CHAN_HT;
1868 c->ic_flags |= IEEE80211_CHAN_HT40U;
1869 c = &ic->ic_channels[ic->ic_nchans++];
1871 c->ic_extieee = cent->ic_ieee;
1872 c->ic_flags &= ~IEEE80211_CHAN_HT;
1873 c->ic_flags |= IEEE80211_CHAN_HT40D;
1879 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
1881 struct ifnet *ifp = sc->sc_ifp;
1882 struct ieee80211com *ic = ifp->if_l2com;
1884 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
1885 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
1888 iwn_read_eeprom_band(sc, n);
1891 iwn_read_eeprom_ht40(sc, n);
1893 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
1897 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
1899 struct iwn_eeprom_enhinfo enhinfo[35];
1904 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
1905 base = le16toh(val);
1906 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
1907 enhinfo, sizeof enhinfo);
1909 memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr);
1910 for (i = 0; i < NELEM(enhinfo); i++) {
1911 if (enhinfo[i].chan == 0 || enhinfo[i].reserved != 0)
1912 continue; /* Skip invalid entries. */
1915 if (sc->txchainmask & IWN_ANT_A)
1916 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
1917 if (sc->txchainmask & IWN_ANT_B)
1918 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
1919 if (sc->txchainmask & IWN_ANT_C)
1920 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
1921 if (sc->ntxchains == 2)
1922 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
1923 else if (sc->ntxchains == 3)
1924 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
1925 maxpwr /= 2; /* Convert half-dBm to dBm. */
1927 DPRINTF(sc, IWN_DEBUG_RESET, "enhinfo %d, maxpwr=%d\n", i,
1929 sc->enh_maxpwr[i] = maxpwr;
1933 static struct ieee80211_node *
1934 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
1936 return kmalloc(sizeof (struct iwn_node), M_80211_NODE,M_INTWAIT | M_ZERO);
1940 iwn_newassoc(struct ieee80211_node *ni, int isnew)
1944 ieee80211_ratectl_node_deinit(ni);
1947 ieee80211_ratectl_node_init(ni);
1951 iwn_media_change(struct ifnet *ifp)
1953 int error = ieee80211_media_change(ifp);
1954 /* NB: only the fixed rate can change and that doesn't need a reset */
1955 return (error == ENETRESET ? 0 : error);
1959 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1961 struct iwn_vap *ivp = IWN_VAP(vap);
1962 struct ieee80211com *ic = vap->iv_ic;
1963 struct iwn_softc *sc = ic->ic_ifp->if_softc;
1966 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1967 ieee80211_state_name[vap->iv_state],
1968 ieee80211_state_name[nstate]);
1970 callout_stop(&sc->sc_timer_to);
1972 if (nstate == IEEE80211_S_AUTH && vap->iv_state != IEEE80211_S_AUTH) {
1973 /* !AUTH -> AUTH requires adapter config */
1974 /* Reset state to handle reassociations correctly. */
1975 sc->rxon.associd = 0;
1976 sc->rxon.filter &= ~htole32(IWN_FILTER_BSS);
1977 iwn_calib_reset(sc);
1978 error = iwn_auth(sc, vap);
1980 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1982 * !RUN -> RUN requires setting the association id
1983 * which is done with a firmware cmd. We also defer
1984 * starting the timers until that work is done.
1986 error = iwn_run(sc, vap);
1988 if (nstate == IEEE80211_S_RUN) {
1990 * RUN -> RUN transition; just restart the timers.
1992 iwn_calib_reset(sc);
1994 return ivp->iv_newstate(vap, nstate, arg);
1998 * Process an RX_PHY firmware notification. This is usually immediately
1999 * followed by an MPDU_RX_DONE notification.
2002 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2003 struct iwn_rx_data *data)
2005 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2007 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2008 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2010 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2011 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2012 sc->last_rx_valid = 1;
2016 iwn_timer_callout(void *arg)
2018 struct iwn_softc *sc = arg;
2021 wlan_serialize_enter();
2022 if (sc->calib_cnt && --sc->calib_cnt == 0) {
2023 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2024 "send statistics request");
2025 (void) iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2027 sc->calib_cnt = 60; /* do calibration every 60s */
2029 iwn_watchdog(sc); /* NB: piggyback tx watchdog */
2030 callout_reset(&sc->sc_timer_to, hz, iwn_timer_callout, sc);
2031 wlan_serialize_exit();
2035 iwn_calib_reset(struct iwn_softc *sc)
2037 callout_reset(&sc->sc_timer_to, hz, iwn_timer_callout, sc);
2038 sc->calib_cnt = 60; /* do calibration every 60s */
2042 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2043 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2046 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2047 struct iwn_rx_data *data)
2049 const struct iwn_hal *hal = sc->sc_hal;
2050 struct ifnet *ifp = sc->sc_ifp;
2051 struct ieee80211com *ic = ifp->if_l2com;
2052 struct iwn_rx_ring *ring = &sc->rxq;
2053 struct ieee80211_frame *wh;
2054 struct ieee80211_node *ni;
2055 struct mbuf *m, *m1;
2056 struct iwn_rx_stat *stat;
2060 int error, len, rssi, nf;
2062 if (desc->type == IWN_MPDU_RX_DONE) {
2063 /* Check for prior RX_PHY notification. */
2064 if (!sc->last_rx_valid) {
2065 DPRINTF(sc, IWN_DEBUG_ANY,
2066 "%s: missing RX_PHY\n", __func__);
2070 sc->last_rx_valid = 0;
2071 stat = &sc->last_rx_stat;
2073 stat = (struct iwn_rx_stat *)(desc + 1);
2075 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2077 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2078 device_printf(sc->sc_dev,
2079 "%s: invalid rx statistic header, len %d\n",
2080 __func__, stat->cfg_phy_len);
2084 if (desc->type == IWN_MPDU_RX_DONE) {
2085 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
2086 head = (caddr_t)(mpdu + 1);
2087 len = le16toh(mpdu->len);
2089 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
2090 len = le16toh(stat->len);
2093 flags = le32toh(*(uint32_t *)(head + len));
2095 /* Discard frames with a bad FCS early. */
2096 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
2097 DPRINTF(sc, IWN_DEBUG_RECV, "%s: rx flags error %x\n",
2102 /* Discard frames that are too short. */
2103 if (len < sizeof (*wh)) {
2104 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
2110 /* XXX don't need mbuf, just dma buffer */
2111 m1 = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
2113 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
2118 bus_dmamap_unload(ring->data_dmat, data->map);
2120 error = bus_dmamap_load(ring->data_dmat, data->map,
2121 mtod(m1, caddr_t), MJUMPAGESIZE,
2122 iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
2123 if (error != 0 && error != EFBIG) {
2124 device_printf(sc->sc_dev,
2125 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
2133 /* Update RX descriptor. */
2134 ring->desc[ring->cur] = htole32(paddr >> 8);
2135 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2136 BUS_DMASYNC_PREWRITE);
2138 /* Finalize mbuf. */
2139 m->m_pkthdr.rcvif = ifp;
2141 m->m_pkthdr.len = m->m_len = len;
2143 rssi = hal->get_rssi(sc, stat);
2145 /* Grab a reference to the source node. */
2146 wh = mtod(m, struct ieee80211_frame *);
2147 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
2148 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
2149 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
2151 if (ieee80211_radiotap_active(ic)) {
2152 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
2154 tap->wr_tsft = htole64(stat->tstamp);
2156 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
2157 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2158 switch (stat->rate) {
2160 case 10: tap->wr_rate = 2; break;
2161 case 20: tap->wr_rate = 4; break;
2162 case 55: tap->wr_rate = 11; break;
2163 case 110: tap->wr_rate = 22; break;
2165 case 0xd: tap->wr_rate = 12; break;
2166 case 0xf: tap->wr_rate = 18; break;
2167 case 0x5: tap->wr_rate = 24; break;
2168 case 0x7: tap->wr_rate = 36; break;
2169 case 0x9: tap->wr_rate = 48; break;
2170 case 0xb: tap->wr_rate = 72; break;
2171 case 0x1: tap->wr_rate = 96; break;
2172 case 0x3: tap->wr_rate = 108; break;
2173 /* Unknown rate: should not happen. */
2174 default: tap->wr_rate = 0;
2176 tap->wr_dbm_antsignal = rssi;
2177 tap->wr_dbm_antnoise = nf;
2180 /* Send the frame to the 802.11 layer. */
2182 (void) ieee80211_input(ni, m, rssi - nf, nf);
2183 /* Node is no longer needed. */
2184 ieee80211_free_node(ni);
2186 (void) ieee80211_input_all(ic, m, rssi - nf, nf);
2191 /* Process an incoming Compressed BlockAck. */
2193 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2194 struct iwn_rx_data *data)
2196 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
2197 struct iwn_tx_ring *txq;
2199 txq = &sc->txq[letoh16(ba->qid)];
2205 * Process a CALIBRATION_RESULT notification sent by the initialization
2206 * firmware on response to a CMD_CALIB_CONFIG command (5000 only.)
2209 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2210 struct iwn_rx_data *data)
2212 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
2215 /* Runtime firmware should not send such a notification. */
2216 if (sc->sc_flags & IWN_FLAG_CALIB_DONE)
2219 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2220 len = (le32toh(desc->len) & 0x3fff) - 4;
2222 switch (calib->code) {
2223 case IWN5000_PHY_CALIB_DC:
2224 if (sc->hw_type == IWN_HW_REV_TYPE_5150 ||
2225 sc->hw_type == IWN_HW_REV_TYPE_6050)
2228 case IWN5000_PHY_CALIB_LO:
2231 case IWN5000_PHY_CALIB_TX_IQ:
2234 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
2235 if (sc->hw_type < IWN_HW_REV_TYPE_6000 &&
2236 sc->hw_type != IWN_HW_REV_TYPE_5150)
2239 case IWN5000_PHY_CALIB_BASE_BAND:
2243 if (idx == -1) /* Ignore other results. */
2246 /* Save calibration result. */
2247 if (sc->calibcmd[idx].buf != NULL)
2248 kfree(sc->calibcmd[idx].buf, M_DEVBUF);
2249 sc->calibcmd[idx].buf = kmalloc(len, M_DEVBUF, M_INTWAIT);
2250 if (sc->calibcmd[idx].buf == NULL) {
2251 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2252 "not enough memory for calibration result %d\n",
2256 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2257 "saving calibration result code=%d len=%d\n", calib->code, len);
2258 sc->calibcmd[idx].len = len;
2259 memcpy(sc->calibcmd[idx].buf, calib, len);
2263 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
2264 * The latter is sent by the firmware after each received beacon.
2267 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2268 struct iwn_rx_data *data)
2270 const struct iwn_hal *hal = sc->sc_hal;
2271 struct ifnet *ifp = sc->sc_ifp;
2272 struct ieee80211com *ic = ifp->if_l2com;
2273 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2274 struct iwn_calib_state *calib = &sc->calib;
2275 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
2278 /* Beacon stats are meaningful only when associated and not scanning. */
2279 if (vap->iv_state != IEEE80211_S_RUN ||
2280 (ic->ic_flags & IEEE80211_F_SCAN))
2283 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2284 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: cmd %d\n", __func__, desc->type);
2285 iwn_calib_reset(sc); /* Reset TX power calibration timeout. */
2287 /* Test if temperature has changed. */
2288 if (stats->general.temp != sc->rawtemp) {
2289 /* Convert "raw" temperature to degC. */
2290 sc->rawtemp = stats->general.temp;
2291 temp = hal->get_temperature(sc);
2292 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
2295 /* Update TX power if need be (4965AGN only.) */
2296 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
2297 iwn4965_power_calibration(sc, temp);
2300 if (desc->type != IWN_BEACON_STATISTICS)
2301 return; /* Reply to a statistics request. */
2303 sc->noise = iwn_get_noise(&stats->rx.general);
2304 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
2306 /* Test that RSSI and noise are present in stats report. */
2307 if (le32toh(stats->rx.general.flags) != 1) {
2308 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
2309 "received statistics without RSSI");
2313 if (calib->state == IWN_CALIB_STATE_ASSOC)
2314 iwn_collect_noise(sc, &stats->rx.general);
2315 else if (calib->state == IWN_CALIB_STATE_RUN)
2316 iwn_tune_sensitivity(sc, &stats->rx);
2320 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
2321 * and 5000 adapters have different incompatible TX status formats.
2324 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2325 struct iwn_rx_data *data)
2327 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
2328 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2330 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
2331 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
2332 __func__, desc->qid, desc->idx, stat->ackfailcnt,
2333 stat->btkillcnt, stat->rate, le16toh(stat->duration),
2334 le32toh(stat->status));
2336 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2337 iwn_tx_done(sc, desc, stat->ackfailcnt, le32toh(stat->status) & 0xff);
2341 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2342 struct iwn_rx_data *data)
2344 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
2345 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2347 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
2348 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
2349 __func__, desc->qid, desc->idx, stat->ackfailcnt,
2350 stat->btkillcnt, stat->rate, le16toh(stat->duration),
2351 le32toh(stat->status));
2354 /* Reset TX scheduler slot. */
2355 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
2358 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2359 iwn_tx_done(sc, desc, stat->ackfailcnt, le16toh(stat->status) & 0xff);
2363 * Adapter-independent backend for TX_DONE firmware notifications.
2366 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,
2369 struct ifnet *ifp = sc->sc_ifp;
2370 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2371 struct iwn_tx_data *data = &ring->data[desc->idx];
2373 struct ieee80211_node *ni;
2374 struct ieee80211vap *vap;
2376 KASSERT(data->ni != NULL, ("no node"));
2378 /* Unmap and free mbuf. */
2379 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
2380 bus_dmamap_unload(ring->data_dmat, data->map);
2381 m = data->m, data->m = NULL;
2382 ni = data->ni, data->ni = NULL;
2385 if (m->m_flags & M_TXCB) {
2387 * Channels marked for "radar" require traffic to be received
2388 * to unlock before we can transmit. Until traffic is seen
2389 * any attempt to transmit is returned immediately with status
2390 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
2391 * happen on first authenticate after scanning. To workaround
2392 * this we ignore a failure of this sort in AUTH state so the
2393 * 802.11 layer will fall back to using a timeout to wait for
2394 * the AUTH reply. This allows the firmware time to see
2395 * traffic so a subsequent retry of AUTH succeeds. It's
2396 * unclear why the firmware does not maintain state for
2397 * channels recently visited as this would allow immediate
2398 * use of the channel after a scan (where we see traffic).
2400 if (status == IWN_TX_FAIL_TX_LOCKED &&
2401 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
2402 ieee80211_process_callback(ni, m, 0);
2404 ieee80211_process_callback(ni, m,
2405 (status & IWN_TX_FAIL) != 0);
2409 * Update rate control statistics for the node.
2411 if (status & 0x80) {
2413 ieee80211_ratectl_tx_complete(vap, ni,
2414 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
2416 ieee80211_ratectl_tx_complete(vap, ni,
2417 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
2420 ieee80211_free_node(ni);
2422 sc->sc_tx_timer = 0;
2423 if (--ring->queued < IWN_TX_RING_LOMARK) {
2424 sc->qfullmsk &= ~(1 << ring->qid);
2425 if (sc->qfullmsk == 0 &&
2426 (ifp->if_flags & IFF_OACTIVE)) {
2427 ifp->if_flags &= ~IFF_OACTIVE;
2428 iwn_start_locked(ifp);
2434 * Process a "command done" firmware notification. This is where we wakeup
2435 * processes waiting for a synchronous command completion.
2438 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
2440 struct iwn_tx_ring *ring = &sc->txq[4];
2441 struct iwn_tx_data *data;
2443 if ((desc->qid & 0xf) != 4)
2444 return; /* Not a command ack. */
2446 data = &ring->data[desc->idx];
2448 /* If the command was mapped in an mbuf, free it. */
2449 if (data->m != NULL) {
2450 bus_dmamap_unload(ring->data_dmat, data->map);
2454 wakeup(&ring->desc[desc->idx]);
2458 * Process an INT_FH_RX or INT_SW_RX interrupt.
2461 iwn_notif_intr(struct iwn_softc *sc)
2463 struct ifnet *ifp = sc->sc_ifp;
2464 struct ieee80211com *ic = ifp->if_l2com;
2465 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2468 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
2469 BUS_DMASYNC_POSTREAD);
2471 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
2472 while (sc->rxq.cur != hw) {
2473 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
2474 struct iwn_rx_desc *desc;
2476 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2477 BUS_DMASYNC_POSTREAD);
2478 desc = mtod(data->m, struct iwn_rx_desc *);
2480 DPRINTF(sc, IWN_DEBUG_RECV,
2481 "%s: qid %x idx %d flags %x type %d(%s) len %d\n",
2482 __func__, desc->qid & 0xf, desc->idx, desc->flags,
2483 desc->type, iwn_intr_str(desc->type),
2484 le16toh(desc->len));
2486 if (!(desc->qid & 0x80)) /* Reply to a command. */
2487 iwn_cmd_done(sc, desc);
2489 switch (desc->type) {
2491 iwn_rx_phy(sc, desc, data);
2494 case IWN_RX_DONE: /* 4965AGN only. */
2495 case IWN_MPDU_RX_DONE:
2496 /* An 802.11 frame has been received. */
2497 iwn_rx_done(sc, desc, data);
2501 case IWN_RX_COMPRESSED_BA:
2502 /* A Compressed BlockAck has been received. */
2503 iwn_rx_compressed_ba(sc, desc, data);
2508 /* An 802.11 frame has been transmitted. */
2509 sc->sc_hal->tx_done(sc, desc, data);
2512 case IWN_RX_STATISTICS:
2513 case IWN_BEACON_STATISTICS:
2514 iwn_rx_statistics(sc, desc, data);
2517 case IWN_BEACON_MISSED:
2519 struct iwn_beacon_missed *miss =
2520 (struct iwn_beacon_missed *)(desc + 1);
2523 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2524 BUS_DMASYNC_POSTREAD);
2525 misses = le32toh(miss->consecutive);
2527 /* XXX not sure why we're notified w/ zero */
2530 DPRINTF(sc, IWN_DEBUG_STATE,
2531 "%s: beacons missed %d/%d\n", __func__,
2532 misses, le32toh(miss->total));
2535 * If more than 5 consecutive beacons are missed,
2536 * reinitialize the sensitivity state machine.
2538 if (vap->iv_state == IEEE80211_S_RUN && misses > 5)
2539 (void) iwn_init_sensitivity(sc);
2540 if (misses >= vap->iv_bmissthreshold)
2541 ieee80211_beacon_miss(ic);
2546 struct iwn_ucode_info *uc =
2547 (struct iwn_ucode_info *)(desc + 1);
2549 /* The microcontroller is ready. */
2550 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2551 BUS_DMASYNC_POSTREAD);
2552 DPRINTF(sc, IWN_DEBUG_RESET,
2553 "microcode alive notification version=%d.%d "
2554 "subtype=%x alive=%x\n", uc->major, uc->minor,
2555 uc->subtype, le32toh(uc->valid));
2557 if (le32toh(uc->valid) != 1) {
2558 device_printf(sc->sc_dev,
2559 "microcontroller initialization failed");
2562 if (uc->subtype == IWN_UCODE_INIT) {
2563 /* Save microcontroller report. */
2564 memcpy(&sc->ucode_info, uc, sizeof (*uc));
2566 /* Save the address of the error log in SRAM. */
2567 sc->errptr = le32toh(uc->errptr);
2570 case IWN_STATE_CHANGED:
2572 uint32_t *status = (uint32_t *)(desc + 1);
2575 * State change allows hardware switch change to be
2576 * noted. However, we handle this in iwn_intr as we
2577 * get both the enable/disble intr.
2579 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2580 BUS_DMASYNC_POSTREAD);
2581 DPRINTF(sc, IWN_DEBUG_INTR, "state changed to %x\n",
2585 case IWN_START_SCAN:
2587 struct iwn_start_scan *scan =
2588 (struct iwn_start_scan *)(desc + 1);
2590 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2591 BUS_DMASYNC_POSTREAD);
2592 DPRINTF(sc, IWN_DEBUG_ANY,
2593 "%s: scanning channel %d status %x\n",
2594 __func__, scan->chan, le32toh(scan->status));
2599 struct iwn_stop_scan *scan =
2600 (struct iwn_stop_scan *)(desc + 1);
2602 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2603 BUS_DMASYNC_POSTREAD);
2604 DPRINTF(sc, IWN_DEBUG_STATE,
2605 "scan finished nchan=%d status=%d chan=%d\n",
2606 scan->nchan, scan->status, scan->chan);
2608 ieee80211_scan_next(vap);
2611 case IWN5000_CALIBRATION_RESULT:
2612 iwn5000_rx_calib_results(sc, desc, data);
2615 case IWN5000_CALIBRATION_DONE:
2616 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
2621 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
2624 /* Tell the firmware what we have processed. */
2625 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
2626 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
2630 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
2631 * from power-down sleep mode.
2634 iwn_wakeup_intr(struct iwn_softc *sc)
2638 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
2641 /* Wakeup RX and TX rings. */
2642 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
2643 for (qid = 0; qid < sc->sc_hal->ntxqs; qid++) {
2644 struct iwn_tx_ring *ring = &sc->txq[qid];
2645 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
2650 iwn_rftoggle_intr(struct iwn_softc *sc)
2652 struct ifnet *ifp = sc->sc_ifp;
2653 struct ieee80211com *ic = ifp->if_l2com;
2654 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
2656 device_printf(sc->sc_dev, "RF switch: radio %s\n",
2657 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
2658 if (tmp & IWN_GP_CNTRL_RFKILL)
2659 ieee80211_runtask(ic, &sc->sc_radioon_task);
2661 ieee80211_runtask(ic, &sc->sc_radiooff_task);
2665 * Dump the error log of the firmware when a firmware panic occurs. Although
2666 * we can't debug the firmware because it is neither open source nor free, it
2667 * can help us to identify certain classes of problems.
2670 iwn_fatal_intr(struct iwn_softc *sc)
2672 const struct iwn_hal *hal = sc->sc_hal;
2673 struct iwn_fw_dump dump;
2676 /* Force a complete recalibration on next init. */
2677 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
2679 /* Check that the error log address is valid. */
2680 if (sc->errptr < IWN_FW_DATA_BASE ||
2681 sc->errptr + sizeof (dump) >
2682 IWN_FW_DATA_BASE + hal->fw_data_maxsz) {
2683 kprintf("%s: bad firmware error log address 0x%08x\n",
2684 __func__, sc->errptr);
2687 if (iwn_nic_lock(sc) != 0) {
2688 kprintf("%s: could not read firmware error log\n",
2692 /* Read firmware error log from SRAM. */
2693 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
2694 sizeof (dump) / sizeof (uint32_t));
2697 if (dump.valid == 0) {
2698 kprintf("%s: firmware error log is empty\n",
2702 kprintf("firmware error log:\n");
2703 kprintf(" error type = \"%s\" (0x%08X)\n",
2704 (dump.id < NELEM(iwn_fw_errmsg)) ?
2705 iwn_fw_errmsg[dump.id] : "UNKNOWN",
2707 kprintf(" program counter = 0x%08X\n", dump.pc);
2708 kprintf(" source line = 0x%08X\n", dump.src_line);
2709 kprintf(" error data = 0x%08X%08X\n",
2710 dump.error_data[0], dump.error_data[1]);
2711 kprintf(" branch link = 0x%08X%08X\n",
2712 dump.branch_link[0], dump.branch_link[1]);
2713 kprintf(" interrupt link = 0x%08X%08X\n",
2714 dump.interrupt_link[0], dump.interrupt_link[1]);
2715 kprintf(" time = %u\n", dump.time[0]);
2717 /* Dump driver status (TX and RX rings) while we're here. */
2718 kprintf("driver status:\n");
2719 for (i = 0; i < hal->ntxqs; i++) {
2720 struct iwn_tx_ring *ring = &sc->txq[i];
2721 kprintf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
2722 i, ring->qid, ring->cur, ring->queued);
2724 kprintf(" rx ring: cur=%d\n", sc->rxq.cur);
2730 struct iwn_softc *sc = arg;
2731 struct ifnet *ifp = sc->sc_ifp;
2732 uint32_t r1, r2, tmp;
2734 /* Disable interrupts. */
2735 IWN_WRITE(sc, IWN_INT_MASK, 0);
2737 /* Read interrupts from ICT (fast) or from registers (slow). */
2738 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
2740 while (sc->ict[sc->ict_cur] != 0) {
2741 tmp |= sc->ict[sc->ict_cur];
2742 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
2743 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
2746 if (tmp == 0xffffffff) /* Shouldn't happen. */
2748 else if (tmp & 0xc0000) /* Workaround a HW bug. */
2750 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
2751 r2 = 0; /* Unused. */
2753 r1 = IWN_READ(sc, IWN_INT);
2754 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0)
2755 return; /* Hardware gone! */
2756 r2 = IWN_READ(sc, IWN_FH_INT);
2759 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=%x reg2=%x\n", r1, r2);
2761 if (r1 == 0 && r2 == 0)
2762 goto done; /* Interrupt not for us. */
2764 /* Acknowledge interrupts. */
2765 IWN_WRITE(sc, IWN_INT, r1);
2766 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
2767 IWN_WRITE(sc, IWN_FH_INT, r2);
2769 if (r1 & IWN_INT_RF_TOGGLED) {
2770 iwn_rftoggle_intr(sc);
2773 if (r1 & IWN_INT_CT_REACHED) {
2774 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
2777 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
2779 ifp->if_flags &= ~IFF_UP;
2780 iwn_stop_locked(sc);
2783 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
2784 (r2 & IWN_FH_INT_RX)) {
2785 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
2786 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
2787 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
2788 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
2789 IWN_INT_PERIODIC_DIS);
2791 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
2792 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
2793 IWN_INT_PERIODIC_ENA);
2799 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
2800 if (sc->sc_flags & IWN_FLAG_USE_ICT)
2801 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
2802 wakeup(sc); /* FH DMA transfer completed. */
2805 if (r1 & IWN_INT_ALIVE)
2806 wakeup(sc); /* Firmware is alive. */
2808 if (r1 & IWN_INT_WAKEUP)
2809 iwn_wakeup_intr(sc);
2812 /* Re-enable interrupts. */
2813 if (ifp->if_flags & IFF_UP)
2814 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2818 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
2819 * 5000 adapters use a slightly different format.)
2822 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
2825 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
2827 *w = htole16(len + 8);
2828 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2829 BUS_DMASYNC_PREWRITE);
2830 if (idx < IWN_SCHED_WINSZ) {
2831 *(w + IWN_TX_RING_COUNT) = *w;
2832 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2833 BUS_DMASYNC_PREWRITE);
2838 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
2841 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
2843 *w = htole16(id << 12 | (len + 8));
2845 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2846 BUS_DMASYNC_PREWRITE);
2847 if (idx < IWN_SCHED_WINSZ) {
2848 *(w + IWN_TX_RING_COUNT) = *w;
2849 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2850 BUS_DMASYNC_PREWRITE);
2856 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
2858 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
2860 *w = (*w & htole16(0xf000)) | htole16(1);
2861 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2862 BUS_DMASYNC_PREWRITE);
2863 if (idx < IWN_SCHED_WINSZ) {
2864 *(w + IWN_TX_RING_COUNT) = *w;
2865 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2866 BUS_DMASYNC_PREWRITE);
2872 iwn_plcp_signal(int rate) {
2875 for (i = 0; i < IWN_RIDX_MAX + 1; i++) {
2876 if (rate == iwn_rates[i].rate)
2884 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
2885 struct iwn_tx_ring *ring)
2887 const struct iwn_hal *hal = sc->sc_hal;
2888 const struct ieee80211_txparam *tp;
2889 const struct iwn_rate *rinfo;
2890 struct ieee80211vap *vap = ni->ni_vap;
2891 struct ieee80211com *ic = ni->ni_ic;
2892 struct iwn_node *wn = (void *)ni;
2893 struct iwn_tx_desc *desc;
2894 struct iwn_tx_data *data;
2895 struct iwn_tx_cmd *cmd;
2896 struct iwn_cmd_data *tx;
2897 struct ieee80211_frame *wh;
2898 struct ieee80211_key *k = NULL;
2900 bus_dma_segment_t segs[IWN_MAX_SCATTER];
2903 int totlen, error, pad, nsegs = 0, i, rate;
2904 uint8_t ridx, type, txant;
2906 wh = mtod(m, struct ieee80211_frame *);
2907 hdrlen = ieee80211_anyhdrsize(wh);
2908 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2910 desc = &ring->desc[ring->cur];
2911 data = &ring->data[ring->cur];
2913 /* Choose a TX rate index. */
2914 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
2915 if (type == IEEE80211_FC0_TYPE_MGT)
2916 rate = tp->mgmtrate;
2917 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
2918 rate = tp->mcastrate;
2919 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
2920 rate = tp->ucastrate;
2922 /* XXX pass pktlen */
2923 ieee80211_ratectl_rate(ni, NULL, 0);
2925 rate = ni->ni_txrate;
2927 ridx = iwn_plcp_signal(rate);
2928 rinfo = &iwn_rates[ridx];
2930 /* Encrypt the frame if need be. */
2931 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
2932 k = ieee80211_crypto_encap(ni, m);
2937 /* Packet header may have moved, reset our local pointer. */
2938 wh = mtod(m, struct ieee80211_frame *);
2940 totlen = m->m_pkthdr.len;
2942 if (ieee80211_radiotap_active_vap(vap)) {
2943 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
2946 tap->wt_rate = rinfo->rate;
2948 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2950 ieee80211_radiotap_tx(vap, m);
2953 /* Prepare TX firmware command. */
2954 cmd = &ring->cmd[ring->cur];
2955 cmd->code = IWN_CMD_TX_DATA;
2957 cmd->qid = ring->qid;
2958 cmd->idx = ring->cur;
2960 tx = (struct iwn_cmd_data *)cmd->data;
2961 /* NB: No need to clear tx, all fields are reinitialized here. */
2962 tx->scratch = 0; /* clear "scratch" area */
2965 if (!IEEE80211_IS_MULTICAST(wh->i_addr1))
2966 flags |= IWN_TX_NEED_ACK;
2968 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
2969 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
2970 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
2972 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
2973 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
2975 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
2976 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2977 /* NB: Group frames are sent using CCK in 802.11b/g. */
2978 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
2979 flags |= IWN_TX_NEED_RTS;
2980 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
2981 ridx >= IWN_RIDX_OFDM6) {
2982 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
2983 flags |= IWN_TX_NEED_CTS;
2984 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
2985 flags |= IWN_TX_NEED_RTS;
2987 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
2988 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
2989 /* 5000 autoselects RTS/CTS or CTS-to-self. */
2990 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
2991 flags |= IWN_TX_NEED_PROTECTION;
2993 flags |= IWN_TX_FULL_TXOP;
2997 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
2998 type != IEEE80211_FC0_TYPE_DATA)
2999 tx->id = hal->broadcast_id;
3003 if (type == IEEE80211_FC0_TYPE_MGT) {
3004 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3006 /* Tell HW to set timestamp in probe responses. */
3007 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
3008 flags |= IWN_TX_INSERT_TSTAMP;
3010 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
3011 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
3012 tx->timeout = htole16(3);
3014 tx->timeout = htole16(2);
3016 tx->timeout = htole16(0);
3019 /* First segment length must be a multiple of 4. */
3020 flags |= IWN_TX_NEED_PADDING;
3021 pad = 4 - (hdrlen & 3);
3025 tx->len = htole16(totlen);
3027 tx->rts_ntries = 60;
3028 tx->data_ntries = 15;
3029 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
3030 tx->plcp = rinfo->plcp;
3031 tx->rflags = rinfo->flags;
3032 if (tx->id == hal->broadcast_id) {
3033 /* Group or management frame. */
3035 /* XXX Alternate between antenna A and B? */
3036 txant = IWN_LSB(sc->txchainmask);
3037 tx->rflags |= IWN_RFLAG_ANT(txant);
3039 tx->linkq = IWN_RIDX_OFDM54 - ridx;
3040 flags |= IWN_TX_LINKQ; /* enable MRR */
3043 /* Set physical address of "scratch area". */
3044 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
3045 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
3047 /* Copy 802.11 header in TX command. */
3048 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
3050 /* Trim 802.11 header. */
3053 tx->flags = htole32(flags);
3056 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
3057 m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3058 if (error == EFBIG) {
3059 /* too many fragments, linearize */
3060 mnew = m_defrag(m, MB_DONTWAIT);
3062 device_printf(sc->sc_dev,
3063 "%s: could not defrag mbuf\n", __func__);
3068 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
3069 data->map, m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3072 device_printf(sc->sc_dev,
3073 "%s: bus_dmamap_load_mbuf_segment failed, error %d\n",
3083 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
3084 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
3086 /* Fill TX descriptor. */
3087 desc->nsegs = 1 + nsegs;
3088 /* First DMA segment is used by the TX command. */
3089 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
3090 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
3091 (4 + sizeof (*tx) + hdrlen + pad) << 4);
3092 /* Other DMA segments are for data payload. */
3093 for (i = 1; i <= nsegs; i++) {
3094 desc->segs[i].addr = htole32(IWN_LOADDR(segs[i - 1].ds_addr));
3095 desc->segs[i].len = htole16(IWN_HIADDR(segs[i - 1].ds_addr) |
3096 segs[i - 1].ds_len << 4);
3099 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
3100 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
3101 BUS_DMASYNC_PREWRITE);
3102 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3103 BUS_DMASYNC_PREWRITE);
3106 /* Update TX scheduler. */
3107 hal->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
3111 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
3112 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
3114 /* Mark TX ring as full if we reach a certain threshold. */
3115 if (++ring->queued > IWN_TX_RING_HIMARK)
3116 sc->qfullmsk |= 1 << ring->qid;
3122 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
3123 struct ieee80211_node *ni, struct iwn_tx_ring *ring,
3124 const struct ieee80211_bpf_params *params)
3126 const struct iwn_hal *hal = sc->sc_hal;
3127 const struct iwn_rate *rinfo;
3128 struct ifnet *ifp = sc->sc_ifp;
3129 struct ieee80211vap *vap = ni->ni_vap;
3130 struct ieee80211com *ic = ifp->if_l2com;
3131 struct iwn_tx_cmd *cmd;
3132 struct iwn_cmd_data *tx;
3133 struct ieee80211_frame *wh;
3134 struct iwn_tx_desc *desc;
3135 struct iwn_tx_data *data;
3138 bus_dma_segment_t segs[IWN_MAX_SCATTER];
3141 int totlen, error, pad, nsegs = 0, i, rate;
3142 uint8_t ridx, type, txant;
3144 wh = mtod(m, struct ieee80211_frame *);
3145 hdrlen = ieee80211_anyhdrsize(wh);
3146 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3148 desc = &ring->desc[ring->cur];
3149 data = &ring->data[ring->cur];
3151 /* Choose a TX rate index. */
3152 rate = params->ibp_rate0;
3153 if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
3154 /* XXX fall back to mcast/mgmt rate? */
3158 ridx = iwn_plcp_signal(rate);
3159 rinfo = &iwn_rates[ridx];
3161 totlen = m->m_pkthdr.len;
3163 /* Prepare TX firmware command. */
3164 cmd = &ring->cmd[ring->cur];
3165 cmd->code = IWN_CMD_TX_DATA;
3167 cmd->qid = ring->qid;
3168 cmd->idx = ring->cur;
3170 tx = (struct iwn_cmd_data *)cmd->data;
3171 /* NB: No need to clear tx, all fields are reinitialized here. */
3172 tx->scratch = 0; /* clear "scratch" area */
3175 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
3176 flags |= IWN_TX_NEED_ACK;
3177 if (params->ibp_flags & IEEE80211_BPF_RTS) {
3178 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
3179 /* 5000 autoselects RTS/CTS or CTS-to-self. */
3180 flags &= ~IWN_TX_NEED_RTS;
3181 flags |= IWN_TX_NEED_PROTECTION;
3183 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
3185 if (params->ibp_flags & IEEE80211_BPF_CTS) {
3186 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
3187 /* 5000 autoselects RTS/CTS or CTS-to-self. */
3188 flags &= ~IWN_TX_NEED_CTS;
3189 flags |= IWN_TX_NEED_PROTECTION;
3191 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
3193 if (type == IEEE80211_FC0_TYPE_MGT) {
3194 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3196 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
3197 flags |= IWN_TX_INSERT_TSTAMP;
3199 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
3200 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
3201 tx->timeout = htole16(3);
3203 tx->timeout = htole16(2);
3205 tx->timeout = htole16(0);
3208 /* First segment length must be a multiple of 4. */
3209 flags |= IWN_TX_NEED_PADDING;
3210 pad = 4 - (hdrlen & 3);
3214 if (ieee80211_radiotap_active_vap(vap)) {
3215 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
3218 tap->wt_rate = rate;
3220 ieee80211_radiotap_tx(vap, m);
3223 tx->len = htole16(totlen);
3225 tx->id = hal->broadcast_id;
3226 tx->rts_ntries = params->ibp_try1;
3227 tx->data_ntries = params->ibp_try0;
3228 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
3229 tx->plcp = rinfo->plcp;
3230 tx->rflags = rinfo->flags;
3231 /* Group or management frame. */
3233 txant = IWN_LSB(sc->txchainmask);
3234 tx->rflags |= IWN_RFLAG_ANT(txant);
3235 /* Set physical address of "scratch area". */
3236 paddr = ring->cmd_dma.paddr + ring->cur * sizeof (struct iwn_tx_cmd);
3237 tx->loaddr = htole32(IWN_LOADDR(paddr));
3238 tx->hiaddr = IWN_HIADDR(paddr);
3240 /* Copy 802.11 header in TX command. */
3241 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
3243 /* Trim 802.11 header. */
3246 tx->flags = htole32(flags);
3249 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
3250 m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3251 if (error == EFBIG) {
3252 /* Too many fragments, linearize. */
3253 mnew = m_defrag(m, MB_DONTWAIT);
3255 device_printf(sc->sc_dev,
3256 "%s: could not defrag mbuf\n", __func__);
3261 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
3262 data->map, m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3265 device_printf(sc->sc_dev,
3266 "%s: bus_dmamap_load_mbuf_segment failed, error %d\n",
3276 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
3277 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
3279 /* Fill TX descriptor. */
3280 desc->nsegs = 1 + nsegs;
3281 /* First DMA segment is used by the TX command. */
3282 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
3283 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
3284 (4 + sizeof (*tx) + hdrlen + pad) << 4);
3285 /* Other DMA segments are for data payload. */
3286 for (i = 1; i <= nsegs; i++) {
3287 desc->segs[i].addr = htole32(IWN_LOADDR(segs[i - 1].ds_addr));
3288 desc->segs[i].len = htole16(IWN_HIADDR(segs[i - 1].ds_addr) |
3289 segs[i - 1].ds_len << 4);
3292 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
3293 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
3294 BUS_DMASYNC_PREWRITE);
3295 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3296 BUS_DMASYNC_PREWRITE);
3299 /* Update TX scheduler. */
3300 hal->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
3304 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
3305 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
3307 /* Mark TX ring as full if we reach a certain threshold. */
3308 if (++ring->queued > IWN_TX_RING_HIMARK)
3309 sc->qfullmsk |= 1 << ring->qid;
3315 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
3316 const struct ieee80211_bpf_params *params)
3318 struct ieee80211com *ic = ni->ni_ic;
3319 struct ifnet *ifp = ic->ic_ifp;
3320 struct iwn_softc *sc = ifp->if_softc;
3321 struct iwn_tx_ring *txq;
3324 if ((ifp->if_flags & IFF_RUNNING) == 0) {
3325 ieee80211_free_node(ni);
3331 txq = &sc->txq[M_WME_GETAC(m)];
3333 txq = &sc->txq[params->ibp_pri & 3];
3335 if (params == NULL) {
3337 * Legacy path; interpret frame contents to decide
3338 * precisely how to send the frame.
3340 error = iwn_tx_data(sc, m, ni, txq);
3343 * Caller supplied explicit parameters to use in
3344 * sending the frame.
3346 error = iwn_tx_data_raw(sc, m, ni, txq, params);
3349 /* NB: m is reclaimed on tx failure */
3350 ieee80211_free_node(ni);
3357 iwn_start(struct ifnet *ifp)
3359 struct iwn_softc *sc;
3363 wlan_serialize_enter();
3364 iwn_start_locked(ifp);
3365 wlan_serialize_exit();
3369 iwn_start_locked(struct ifnet *ifp)
3371 struct iwn_softc *sc = ifp->if_softc;
3372 struct ieee80211_node *ni;
3373 struct iwn_tx_ring *txq;
3378 if (sc->qfullmsk != 0) {
3379 ifp->if_flags |= IFF_OACTIVE;
3382 m = ifq_dequeue(&ifp->if_snd, NULL);
3385 KKASSERT(M_TRAILINGSPACE(m) >= 0);
3386 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
3387 pri = M_WME_GETAC(m);
3388 txq = &sc->txq[pri];
3389 if (iwn_tx_data(sc, m, ni, txq) != 0) {
3391 ieee80211_free_node(ni);
3394 sc->sc_tx_timer = 5;
3399 iwn_watchdog(struct iwn_softc *sc)
3401 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
3402 struct ifnet *ifp = sc->sc_ifp;
3403 struct ieee80211com *ic = ifp->if_l2com;
3405 if_printf(ifp, "device timeout\n");
3406 ieee80211_runtask(ic, &sc->sc_reinit_task);
3411 iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred)
3413 struct iwn_softc *sc = ifp->if_softc;
3414 struct ieee80211com *ic = ifp->if_l2com;
3415 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3416 struct ifreq *ifr = (struct ifreq *) data;
3417 int error = 0, startall = 0, stop = 0;
3421 if (ifp->if_flags & IFF_UP) {
3422 if (!(ifp->if_flags & IFF_RUNNING)) {
3423 iwn_init_locked(sc);
3424 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
3430 if (ifp->if_flags & IFF_RUNNING)
3431 iwn_stop_locked(sc);
3434 ieee80211_start_all(ic);
3435 else if (vap != NULL && stop)
3436 ieee80211_stop(vap);
3439 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
3442 error = ether_ioctl(ifp, cmd, data);
3452 * Send a command to the firmware.
3455 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
3457 struct iwn_tx_ring *ring = &sc->txq[4];
3458 struct iwn_tx_desc *desc;
3459 struct iwn_tx_data *data;
3460 struct iwn_tx_cmd *cmd;
3465 desc = &ring->desc[ring->cur];
3466 data = &ring->data[ring->cur];
3469 if (size > sizeof cmd->data) {
3470 /* Command is too large to fit in a descriptor. */
3471 if (totlen > MJUMPAGESIZE)
3473 m = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
3476 cmd = mtod(m, struct iwn_tx_cmd *);
3477 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
3478 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3485 cmd = &ring->cmd[ring->cur];
3486 paddr = data->cmd_paddr;
3491 cmd->qid = ring->qid;
3492 cmd->idx = ring->cur;
3493 memcpy(cmd->data, buf, size);
3496 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
3497 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
3499 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
3500 __func__, iwn_intr_str(cmd->code), cmd->code,
3501 cmd->flags, cmd->qid, cmd->idx);
3503 if (size > sizeof cmd->data) {
3504 bus_dmamap_sync(ring->data_dmat, data->map,
3505 BUS_DMASYNC_PREWRITE);
3507 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
3508 BUS_DMASYNC_PREWRITE);
3510 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3511 BUS_DMASYNC_PREWRITE);
3514 /* Update TX scheduler. */
3515 sc->sc_hal->update_sched(sc, ring->qid, ring->cur, 0, 0);
3518 /* Kick command ring. */
3519 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
3520 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
3525 error = zsleep(desc, &wlan_global_serializer, 0, "iwncmd", hz);
3530 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
3532 struct iwn4965_node_info hnode;
3536 * We use the node structure for 5000 Series internally (it is
3537 * a superset of the one for 4965AGN). We thus copy the common
3538 * fields before sending the command.
3540 src = (caddr_t)node;
3541 dst = (caddr_t)&hnode;
3542 memcpy(dst, src, 48);
3543 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
3544 memcpy(dst + 48, src + 72, 20);
3545 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
3549 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
3551 /* Direct mapping. */
3552 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
3556 static const uint8_t iwn_ridx_to_plcp[] = {
3557 10, 20, 55, 110, /* CCK */
3558 0xd, 0xf, 0x5, 0x7, 0x9, 0xb, 0x1, 0x3, 0x3 /* OFDM R1-R4 */
3560 static const uint8_t iwn_siso_mcs_to_plcp[] = {
3561 0, 0, 0, 0, /* CCK */
3562 0, 0, 1, 2, 3, 4, 5, 6, 7 /* HT */
3564 static const uint8_t iwn_mimo_mcs_to_plcp[] = {
3565 0, 0, 0, 0, /* CCK */
3566 8, 8, 9, 10, 11, 12, 13, 14, 15 /* HT */
3569 static const uint8_t iwn_prev_ridx[] = {
3570 /* NB: allow fallback from CCK11 to OFDM9 and from OFDM6 to CCK5 */
3571 0, 0, 1, 5, /* CCK */
3572 2, 4, 3, 6, 7, 8, 9, 10, 10 /* OFDM */
3576 * Configure hardware link parameters for the specified
3577 * node operating on the specified channel.
3580 iwn_set_link_quality(struct iwn_softc *sc, uint8_t id, int async)
3582 struct ifnet *ifp = sc->sc_ifp;
3583 struct ieee80211com *ic = ifp->if_l2com;
3584 struct iwn_cmd_link_quality linkq;
3585 const struct iwn_rate *rinfo;
3587 uint8_t txant, ridx;
3589 /* Use the first valid TX antenna. */
3590 txant = IWN_LSB(sc->txchainmask);
3592 memset(&linkq, 0, sizeof linkq);
3594 linkq.antmsk_1stream = txant;
3595 linkq.antmsk_2stream = IWN_ANT_AB;
3596 linkq.ampdu_max = 31;
3597 linkq.ampdu_threshold = 3;
3598 linkq.ampdu_limit = htole16(4000); /* 4ms */
3601 if (IEEE80211_IS_CHAN_HT(c))
3605 if (id == IWN_ID_BSS)
3606 ridx = IWN_RIDX_OFDM54;
3607 else if (IEEE80211_IS_CHAN_A(ic->ic_curchan))
3608 ridx = IWN_RIDX_OFDM6;
3610 ridx = IWN_RIDX_CCK1;
3612 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
3613 rinfo = &iwn_rates[ridx];
3615 if (IEEE80211_IS_CHAN_HT40(c)) {
3616 linkq.retry[i].plcp = iwn_mimo_mcs_to_plcp[ridx]
3618 linkq.retry[i].rflags = IWN_RFLAG_HT
3621 } else if (IEEE80211_IS_CHAN_HT(c)) {
3622 linkq.retry[i].plcp = iwn_siso_mcs_to_plcp[ridx]
3624 linkq.retry[i].rflags = IWN_RFLAG_HT;
3629 linkq.retry[i].plcp = rinfo->plcp;
3630 linkq.retry[i].rflags = rinfo->flags;
3632 linkq.retry[i].rflags |= IWN_RFLAG_ANT(txant);
3633 ridx = iwn_prev_ridx[ridx];
3636 if (sc->sc_debug & IWN_DEBUG_STATE) {
3637 kprintf("%s: set link quality for node %d, mimo %d ssmask %d\n",
3638 __func__, id, linkq.mimo, linkq.antmsk_1stream);
3639 kprintf("%s:", __func__);
3640 for (i = 0; i < IWN_MAX_TX_RETRIES; i++)
3641 kprintf(" %d:%x", linkq.retry[i].plcp,
3642 linkq.retry[i].rflags);
3646 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
3650 * Broadcast node is used to send group-addressed and management frames.
3653 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
3655 const struct iwn_hal *hal = sc->sc_hal;
3656 struct ifnet *ifp = sc->sc_ifp;
3657 struct iwn_node_info node;
3660 memset(&node, 0, sizeof node);
3661 IEEE80211_ADDR_COPY(node.macaddr, ifp->if_broadcastaddr);
3662 node.id = hal->broadcast_id;
3663 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
3664 error = hal->add_node(sc, &node, async);
3668 error = iwn_set_link_quality(sc, hal->broadcast_id, async);
3673 iwn_wme_update(struct ieee80211com *ic)
3675 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
3676 #define IWN_TXOP_TO_US(v) (v<<5)
3677 struct iwn_softc *sc = ic->ic_ifp->if_softc;
3678 struct iwn_edca_params cmd;
3681 memset(&cmd, 0, sizeof cmd);
3682 cmd.flags = htole32(IWN_EDCA_UPDATE);
3683 for (i = 0; i < WME_NUM_AC; i++) {
3684 const struct wmeParams *wmep =
3685 &ic->ic_wme.wme_chanParams.cap_wmeParams[i];
3686 cmd.ac[i].aifsn = wmep->wmep_aifsn;
3687 cmd.ac[i].cwmin = htole16(IWN_EXP2(wmep->wmep_logcwmin));
3688 cmd.ac[i].cwmax = htole16(IWN_EXP2(wmep->wmep_logcwmax));
3689 cmd.ac[i].txoplimit =
3690 htole16(IWN_TXOP_TO_US(wmep->wmep_txopLimit));
3692 (void) iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1 /*async*/);
3694 #undef IWN_TXOP_TO_US
3699 iwn_update_mcast(struct ifnet *ifp)
3705 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
3707 struct iwn_cmd_led led;
3709 /* Clear microcode LED ownership. */
3710 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
3713 led.unit = htole32(10000); /* on/off in unit of 100ms */
3716 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
3720 * Set the critical temperature at which the firmware will stop the radio
3724 iwn_set_critical_temp(struct iwn_softc *sc)
3726 struct iwn_critical_temp crit;
3729 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
3731 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
3732 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
3733 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3734 temp = IWN_CTOK(110);
3737 memset(&crit, 0, sizeof crit);
3738 crit.tempR = htole32(temp);
3739 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n",
3741 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
3745 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
3747 struct iwn_cmd_timing cmd;
3750 memset(&cmd, 0, sizeof cmd);
3751 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
3752 cmd.bintval = htole16(ni->ni_intval);
3753 cmd.lintval = htole16(10);
3755 /* Compute remaining time until next beacon. */
3756 val = (uint64_t)ni->ni_intval * 1024; /* msecs -> usecs */
3757 mod = le64toh(cmd.tstamp) % val;
3758 cmd.binitval = htole32((uint32_t)(val - mod));
3760 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
3761 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
3763 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
3767 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
3769 struct ifnet *ifp = sc->sc_ifp;
3770 struct ieee80211com *ic = ifp->if_l2com;
3772 /* Adjust TX power if need be (delta >= 3 degC.) */
3773 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
3774 __func__, sc->temp, temp);
3775 if (abs(temp - sc->temp) >= 3) {
3776 /* Record temperature of last calibration. */
3778 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
3783 * Set TX power for current channel (each rate has its own power settings).
3784 * This function takes into account the regulatory information from EEPROM,
3785 * the current temperature and the current voltage.
3788 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
3791 /* Fixed-point arithmetic division using a n-bit fractional part. */
3792 #define fdivround(a, b, n) \
3793 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
3794 /* Linear interpolation. */
3795 #define interpolate(x, x1, y1, x2, y2, n) \
3796 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
3798 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
3799 struct ifnet *ifp = sc->sc_ifp;
3800 struct ieee80211com *ic = ifp->if_l2com;
3801 struct iwn_ucode_info *uc = &sc->ucode_info;
3802 struct iwn4965_cmd_txpower cmd;
3803 struct iwn4965_eeprom_chan_samples *chans;
3804 int32_t vdiff, tdiff;
3805 int i, c, grp, maxpwr;
3806 const uint8_t *rf_gain, *dsp_gain;
3809 /* Retrieve channel number. */
3810 chan = ieee80211_chan2ieee(ic, ch);
3811 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
3814 memset(&cmd, 0, sizeof cmd);
3815 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
3818 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
3819 maxpwr = sc->maxpwr5GHz;
3820 rf_gain = iwn4965_rf_gain_5ghz;
3821 dsp_gain = iwn4965_dsp_gain_5ghz;
3823 maxpwr = sc->maxpwr2GHz;
3824 rf_gain = iwn4965_rf_gain_2ghz;
3825 dsp_gain = iwn4965_dsp_gain_2ghz;
3828 /* Compute voltage compensation. */
3829 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
3834 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3835 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
3836 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
3838 /* Get channel attenuation group. */
3839 if (chan <= 20) /* 1-20 */
3841 else if (chan <= 43) /* 34-43 */
3843 else if (chan <= 70) /* 44-70 */
3845 else if (chan <= 124) /* 71-124 */
3849 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3850 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
3852 /* Get channel sub-band. */
3853 for (i = 0; i < IWN_NBANDS; i++)
3854 if (sc->bands[i].lo != 0 &&
3855 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
3857 if (i == IWN_NBANDS) /* Can't happen in real-life. */
3859 chans = sc->bands[i].chans;
3860 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3861 "%s: chan %d sub-band=%d\n", __func__, chan, i);
3863 for (c = 0; c < 2; c++) {
3864 uint8_t power, gain, temp;
3865 int maxchpwr, pwr, ridx, idx;
3867 power = interpolate(chan,
3868 chans[0].num, chans[0].samples[c][1].power,
3869 chans[1].num, chans[1].samples[c][1].power, 1);
3870 gain = interpolate(chan,
3871 chans[0].num, chans[0].samples[c][1].gain,
3872 chans[1].num, chans[1].samples[c][1].gain, 1);
3873 temp = interpolate(chan,
3874 chans[0].num, chans[0].samples[c][1].temp,
3875 chans[1].num, chans[1].samples[c][1].temp, 1);
3876 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3877 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
3878 __func__, c, power, gain, temp);
3880 /* Compute temperature compensation. */
3881 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
3882 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3883 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
3884 __func__, tdiff, sc->temp, temp);
3886 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
3887 /* Convert dBm to half-dBm. */
3888 maxchpwr = sc->maxpwr[chan] * 2;
3890 maxchpwr -= 6; /* MIMO 2T: -3dB */
3894 /* Adjust TX power based on rate. */
3895 if ((ridx % 8) == 5)
3896 pwr -= 15; /* OFDM48: -7.5dB */
3897 else if ((ridx % 8) == 6)
3898 pwr -= 17; /* OFDM54: -8.5dB */
3899 else if ((ridx % 8) == 7)
3900 pwr -= 20; /* OFDM60: -10dB */
3902 pwr -= 10; /* Others: -5dB */
3904 /* Do not exceed channel max TX power. */
3908 idx = gain - (pwr - power) - tdiff - vdiff;
3909 if ((ridx / 8) & 1) /* MIMO */
3910 idx += (int32_t)le32toh(uc->atten[grp][c]);
3913 idx += 9; /* 5GHz */
3914 if (ridx == IWN_RIDX_MAX)
3917 /* Make sure idx stays in a valid range. */
3920 else if (idx > IWN4965_MAX_PWR_INDEX)
3921 idx = IWN4965_MAX_PWR_INDEX;
3923 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3924 "%s: Tx chain %d, rate idx %d: power=%d\n",
3925 __func__, c, ridx, idx);
3926 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
3927 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
3931 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3932 "%s: set tx power for chan %d\n", __func__, chan);
3933 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
3940 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
3943 struct iwn5000_cmd_txpower cmd;
3946 * TX power calibration is handled automatically by the firmware
3949 memset(&cmd, 0, sizeof cmd);
3950 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
3951 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
3952 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
3953 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: setting TX power\n", __func__);
3954 return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async);
3958 * Retrieve the maximum RSSI (in dBm) among receivers.
3961 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
3963 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
3967 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
3968 agc = (le16toh(phy->agc) >> 7) & 0x7f;
3972 if (mask & IWN_ANT_A) /* Ant A */
3973 rssi = max(rssi, phy->rssi[0]);
3974 if (mask & IWN_ATH_B) /* Ant B */
3975 rssi = max(rssi, phy->rssi[2]);
3976 if (mask & IWN_ANT_C) /* Ant C */
3977 rssi = max(rssi, phy->rssi[4]);
3979 rssi = max(rssi, phy->rssi[0]);
3980 rssi = max(rssi, phy->rssi[2]);
3981 rssi = max(rssi, phy->rssi[4]);
3984 DPRINTF(sc, IWN_DEBUG_RECV, "%s: agc %d mask 0x%x rssi %d %d %d "
3985 "result %d\n", __func__, agc, mask,
3986 phy->rssi[0], phy->rssi[2], phy->rssi[4],
3987 rssi - agc - IWN_RSSI_TO_DBM);
3988 return rssi - agc - IWN_RSSI_TO_DBM;
3992 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
3994 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
3998 agc = (le32toh(phy->agc) >> 9) & 0x7f;
4000 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
4001 le16toh(phy->rssi[1]) & 0xff);
4002 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
4004 DPRINTF(sc, IWN_DEBUG_RECV, "%s: agc %d rssi %d %d %d "
4005 "result %d\n", __func__, agc,
4006 phy->rssi[0], phy->rssi[1], phy->rssi[2],
4007 rssi - agc - IWN_RSSI_TO_DBM);
4008 return rssi - agc - IWN_RSSI_TO_DBM;
4012 * Retrieve the average noise (in dBm) among receivers.
4015 iwn_get_noise(const struct iwn_rx_general_stats *stats)
4017 int i, total, nbant, noise;
4020 for (i = 0; i < 3; i++) {
4021 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
4026 /* There should be at least one antenna but check anyway. */
4027 return (nbant == 0) ? -127 : (total / nbant) - 107;
4031 * Compute temperature (in degC) from last received statistics.
4034 iwn4965_get_temperature(struct iwn_softc *sc)
4036 struct iwn_ucode_info *uc = &sc->ucode_info;
4037 int32_t r1, r2, r3, r4, temp;
4039 r1 = le32toh(uc->temp[0].chan20MHz);
4040 r2 = le32toh(uc->temp[1].chan20MHz);
4041 r3 = le32toh(uc->temp[2].chan20MHz);
4042 r4 = le32toh(sc->rawtemp);
4044 if (r1 == r3) /* Prevents division by 0 (should not happen.) */
4047 /* Sign-extend 23-bit R4 value to 32-bit. */
4048 r4 = (r4 << 8) >> 8;
4049 /* Compute temperature in Kelvin. */
4050 temp = (259 * (r4 - r2)) / (r3 - r1);
4051 temp = (temp * 97) / 100 + 8;
4053 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
4055 return IWN_KTOC(temp);
4059 iwn5000_get_temperature(struct iwn_softc *sc)
4064 * Temperature is not used by the driver for 5000 Series because
4065 * TX power calibration is handled by firmware. We export it to
4066 * users through the sensor framework though.
4068 temp = le32toh(sc->rawtemp);
4069 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
4070 temp = (temp / -5) + sc->temp_off;
4071 temp = IWN_KTOC(temp);
4077 * Initialize sensitivity calibration state machine.
4080 iwn_init_sensitivity(struct iwn_softc *sc)
4082 const struct iwn_hal *hal = sc->sc_hal;
4083 struct iwn_calib_state *calib = &sc->calib;
4087 /* Reset calibration state machine. */
4088 memset(calib, 0, sizeof (*calib));
4089 calib->state = IWN_CALIB_STATE_INIT;
4090 calib->cck_state = IWN_CCK_STATE_HIFA;
4091 /* Set initial correlation values. */
4092 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
4093 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
4094 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
4095 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
4096 calib->cck_x4 = 125;
4097 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
4098 calib->energy_cck = sc->limits->energy_cck;
4100 /* Write initial sensitivity. */
4101 error = iwn_send_sensitivity(sc);
4105 /* Write initial gains. */
4106 error = hal->init_gains(sc);
4110 /* Request statistics at each beacon interval. */
4112 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: calibrate phy\n", __func__);
4113 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
4117 * Collect noise and RSSI statistics for the first 20 beacons received
4118 * after association and use them to determine connected antennas and
4119 * to set differential gains.
4122 iwn_collect_noise(struct iwn_softc *sc,
4123 const struct iwn_rx_general_stats *stats)
4125 const struct iwn_hal *hal = sc->sc_hal;
4126 struct iwn_calib_state *calib = &sc->calib;
4130 /* Accumulate RSSI and noise for all 3 antennas. */
4131 for (i = 0; i < 3; i++) {
4132 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
4133 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
4135 /* NB: We update differential gains only once after 20 beacons. */
4136 if (++calib->nbeacons < 20)
4139 /* Determine highest average RSSI. */
4140 val = MAX(calib->rssi[0], calib->rssi[1]);
4141 val = MAX(calib->rssi[2], val);
4143 /* Determine which antennas are connected. */
4144 sc->chainmask = sc->rxchainmask;
4145 for (i = 0; i < 3; i++)
4146 if (val - calib->rssi[i] > 15 * 20)
4147 sc->chainmask &= ~(1 << i);
4149 /* If none of the TX antennas are connected, keep at least one. */
4150 if ((sc->chainmask & sc->txchainmask) == 0)
4151 sc->chainmask |= IWN_LSB(sc->txchainmask);
4153 (void)hal->set_gains(sc);
4154 calib->state = IWN_CALIB_STATE_RUN;
4157 /* XXX Disable RX chains with no antennas connected. */
4158 sc->rxon.rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
4159 (void)iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 1);
4164 /* Enable power-saving mode if requested by user. */
4165 if (sc->sc_ic.ic_flags & IEEE80211_F_PMGTON)
4166 (void)iwn_set_pslevel(sc, 0, 3, 1);
4171 iwn4965_init_gains(struct iwn_softc *sc)
4173 struct iwn_phy_calib_gain cmd;
4175 memset(&cmd, 0, sizeof cmd);
4176 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
4177 /* Differential gains initially set to 0 for all 3 antennas. */
4178 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4179 "%s: setting initial differential gains\n", __func__);
4180 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4184 iwn5000_init_gains(struct iwn_softc *sc)
4186 struct iwn_phy_calib cmd;
4188 memset(&cmd, 0, sizeof cmd);
4189 cmd.code = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
4192 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4193 "%s: setting initial differential gains\n", __func__);
4194 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4198 iwn4965_set_gains(struct iwn_softc *sc)
4200 struct iwn_calib_state *calib = &sc->calib;
4201 struct iwn_phy_calib_gain cmd;
4202 int i, delta, noise;
4204 /* Get minimal noise among connected antennas. */
4205 noise = INT_MAX; /* NB: There's at least one antenna. */
4206 for (i = 0; i < 3; i++)
4207 if (sc->chainmask & (1 << i))
4208 noise = MIN(calib->noise[i], noise);
4210 memset(&cmd, 0, sizeof cmd);
4211 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
4212 /* Set differential gains for connected antennas. */
4213 for (i = 0; i < 3; i++) {
4214 if (sc->chainmask & (1 << i)) {
4215 /* Compute attenuation (in unit of 1.5dB). */
4216 delta = (noise - (int32_t)calib->noise[i]) / 30;
4217 /* NB: delta <= 0 */
4218 /* Limit to [-4.5dB,0]. */
4219 cmd.gain[i] = MIN(abs(delta), 3);
4221 cmd.gain[i] |= 1 << 2; /* sign bit */
4224 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4225 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
4226 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
4227 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4231 iwn5000_set_gains(struct iwn_softc *sc)
4233 struct iwn_calib_state *calib = &sc->calib;
4234 struct iwn_phy_calib_gain cmd;
4235 int i, ant, delta, div;
4237 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
4238 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
4240 memset(&cmd, 0, sizeof cmd);
4241 cmd.code = IWN5000_PHY_CALIB_NOISE_GAIN;
4244 /* Get first available RX antenna as referential. */
4245 ant = IWN_LSB(sc->rxchainmask);
4246 /* Set differential gains for other antennas. */
4247 for (i = ant + 1; i < 3; i++) {
4248 if (sc->chainmask & (1 << i)) {
4249 /* The delta is relative to antenna "ant". */
4250 delta = ((int32_t)calib->noise[ant] -
4251 (int32_t)calib->noise[i]) / div;
4252 /* Limit to [-4.5dB,+4.5dB]. */
4253 cmd.gain[i - 1] = MIN(abs(delta), 3);
4255 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
4258 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4259 "setting differential gains Ant B/C: %x/%x (%x)\n",
4260 cmd.gain[0], cmd.gain[1], sc->chainmask);
4261 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4265 * Tune RF RX sensitivity based on the number of false alarms detected
4266 * during the last beacon period.
4269 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
4271 #define inc(val, inc, max) \
4272 if ((val) < (max)) { \
4273 if ((val) < (max) - (inc)) \
4279 #define dec(val, dec, min) \
4280 if ((val) > (min)) { \
4281 if ((val) > (min) + (dec)) \
4288 const struct iwn_sensitivity_limits *limits = sc->limits;
4289 struct iwn_calib_state *calib = &sc->calib;
4290 uint32_t val, rxena, fa;
4291 uint32_t energy[3], energy_min;
4292 uint8_t noise[3], noise_ref;
4293 int i, needs_update = 0;
4295 /* Check that we've been enabled long enough. */
4296 rxena = le32toh(stats->general.load);
4300 /* Compute number of false alarms since last call for OFDM. */
4301 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
4302 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
4303 fa *= 200 * 1024; /* 200TU */
4305 /* Save counters values for next call. */
4306 calib->bad_plcp_ofdm = le32toh(stats->ofdm.bad_plcp);
4307 calib->fa_ofdm = le32toh(stats->ofdm.fa);
4309 if (fa > 50 * rxena) {
4310 /* High false alarm count, decrease sensitivity. */
4311 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4312 "%s: OFDM high false alarm count: %u\n", __func__, fa);
4313 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
4314 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
4315 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
4316 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
4318 } else if (fa < 5 * rxena) {
4319 /* Low false alarm count, increase sensitivity. */
4320 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4321 "%s: OFDM low false alarm count: %u\n", __func__, fa);
4322 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
4323 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
4324 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
4325 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
4328 /* Compute maximum noise among 3 receivers. */
4329 for (i = 0; i < 3; i++)
4330 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
4331 val = MAX(noise[0], noise[1]);
4332 val = MAX(noise[2], val);
4333 /* Insert it into our samples table. */
4334 calib->noise_samples[calib->cur_noise_sample] = val;
4335 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
4337 /* Compute maximum noise among last 20 samples. */
4338 noise_ref = calib->noise_samples[0];
4339 for (i = 1; i < 20; i++)
4340 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
4342 /* Compute maximum energy among 3 receivers. */
4343 for (i = 0; i < 3; i++)
4344 energy[i] = le32toh(stats->general.energy[i]);
4345 val = MIN(energy[0], energy[1]);
4346 val = MIN(energy[2], val);
4347 /* Insert it into our samples table. */
4348 calib->energy_samples[calib->cur_energy_sample] = val;
4349 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
4351 /* Compute minimum energy among last 10 samples. */
4352 energy_min = calib->energy_samples[0];
4353 for (i = 1; i < 10; i++)
4354 energy_min = MAX(energy_min, calib->energy_samples[i]);
4357 /* Compute number of false alarms since last call for CCK. */
4358 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
4359 fa += le32toh(stats->cck.fa) - calib->fa_cck;
4360 fa *= 200 * 1024; /* 200TU */
4362 /* Save counters values for next call. */
4363 calib->bad_plcp_cck = le32toh(stats->cck.bad_plcp);
4364 calib->fa_cck = le32toh(stats->cck.fa);
4366 if (fa > 50 * rxena) {
4367 /* High false alarm count, decrease sensitivity. */
4368 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4369 "%s: CCK high false alarm count: %u\n", __func__, fa);
4370 calib->cck_state = IWN_CCK_STATE_HIFA;
4373 if (calib->cck_x4 > 160) {
4374 calib->noise_ref = noise_ref;
4375 if (calib->energy_cck > 2)
4376 dec(calib->energy_cck, 2, energy_min);
4378 if (calib->cck_x4 < 160) {
4379 calib->cck_x4 = 161;
4382 inc(calib->cck_x4, 3, limits->max_cck_x4);
4384 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
4386 } else if (fa < 5 * rxena) {
4387 /* Low false alarm count, increase sensitivity. */
4388 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4389 "%s: CCK low false alarm count: %u\n", __func__, fa);
4390 calib->cck_state = IWN_CCK_STATE_LOFA;
4393 if (calib->cck_state != IWN_CCK_STATE_INIT &&
4394 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
4395 calib->low_fa > 100)) {
4396 inc(calib->energy_cck, 2, limits->min_energy_cck);
4397 dec(calib->cck_x4, 3, limits->min_cck_x4);
4398 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
4401 /* Not worth to increase or decrease sensitivity. */
4402 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4403 "%s: CCK normal false alarm count: %u\n", __func__, fa);
4405 calib->noise_ref = noise_ref;
4407 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
4408 /* Previous interval had many false alarms. */
4409 dec(calib->energy_cck, 8, energy_min);
4411 calib->cck_state = IWN_CCK_STATE_INIT;
4415 (void)iwn_send_sensitivity(sc);
4421 iwn_send_sensitivity(struct iwn_softc *sc)
4423 struct iwn_calib_state *calib = &sc->calib;
4424 struct iwn_sensitivity_cmd cmd;
4426 memset(&cmd, 0, sizeof cmd);
4427 cmd.which = IWN_SENSITIVITY_WORKTBL;
4428 /* OFDM modulation. */
4429 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
4430 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
4431 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
4432 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
4433 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
4434 cmd.energy_ofdm_th = htole16(62);
4435 /* CCK modulation. */
4436 cmd.corr_cck_x4 = htole16(calib->cck_x4);
4437 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
4438 cmd.energy_cck = htole16(calib->energy_cck);
4439 /* Barker modulation: use default values. */
4440 cmd.corr_barker = htole16(190);
4441 cmd.corr_barker_mrc = htole16(390);
4443 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4444 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
4445 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
4446 calib->ofdm_mrc_x4, calib->cck_x4,
4447 calib->cck_mrc_x4, calib->energy_cck);
4448 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, sizeof cmd, 1);
4452 * Set STA mode power saving level (between 0 and 5).
4453 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
4456 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
4458 const struct iwn_pmgt *pmgt;
4459 struct iwn_pmgt_cmd cmd;
4460 uint32_t max, skip_dtim;
4464 /* Select which PS parameters to use. */
4466 pmgt = &iwn_pmgt[0][level];
4467 else if (dtim <= 10)
4468 pmgt = &iwn_pmgt[1][level];
4470 pmgt = &iwn_pmgt[2][level];
4472 memset(&cmd, 0, sizeof cmd);
4473 if (level != 0) /* not CAM */
4474 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
4476 cmd.flags |= htole16(IWN_PS_FAST_PD);
4477 /* Retrieve PCIe Active State Power Management (ASPM). */
4478 tmp = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
4479 if (!(tmp & 0x1)) /* L0s Entry disabled. */
4480 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
4481 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
4482 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
4488 skip_dtim = pmgt->skip_dtim;
4489 if (skip_dtim != 0) {
4490 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
4491 max = pmgt->intval[4];
4492 if (max == (uint32_t)-1)
4493 max = dtim * (skip_dtim + 1);
4494 else if (max > dtim)
4495 max = (max / dtim) * dtim;
4498 for (i = 0; i < 5; i++)
4499 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
4501 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
4503 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
4507 iwn_config(struct iwn_softc *sc)
4509 const struct iwn_hal *hal = sc->sc_hal;
4510 struct ifnet *ifp = sc->sc_ifp;
4511 struct ieee80211com *ic = ifp->if_l2com;
4512 struct iwn_bluetooth bluetooth;
4517 /* Configure valid TX chains for 5000 Series. */
4518 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4519 txmask = htole32(sc->txchainmask);
4520 DPRINTF(sc, IWN_DEBUG_RESET,
4521 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
4522 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
4525 device_printf(sc->sc_dev,
4526 "%s: could not configure valid TX chains, "
4527 "error %d\n", __func__, error);
4532 /* Configure bluetooth coexistence. */
4533 memset(&bluetooth, 0, sizeof bluetooth);
4534 bluetooth.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
4535 bluetooth.lead_time = IWN_BT_LEAD_TIME_DEF;
4536 bluetooth.max_kill = IWN_BT_MAX_KILL_DEF;
4537 DPRINTF(sc, IWN_DEBUG_RESET, "%s: config bluetooth coexistence\n",
4539 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &bluetooth, sizeof bluetooth, 0);
4541 device_printf(sc->sc_dev,
4542 "%s: could not configure bluetooth coexistence, error %d\n",
4547 /* Set mode, channel, RX filter and enable RX. */
4548 memset(&sc->rxon, 0, sizeof (struct iwn_rxon));
4549 IEEE80211_ADDR_COPY(sc->rxon.myaddr, IF_LLADDR(ifp));
4550 IEEE80211_ADDR_COPY(sc->rxon.wlap, IF_LLADDR(ifp));
4551 sc->rxon.chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
4552 sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
4553 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
4554 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4555 switch (ic->ic_opmode) {
4556 case IEEE80211_M_STA:
4557 sc->rxon.mode = IWN_MODE_STA;
4558 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);
4560 case IEEE80211_M_MONITOR:
4561 sc->rxon.mode = IWN_MODE_MONITOR;
4562 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST |
4563 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
4566 /* Should not get there. */
4569 sc->rxon.cck_mask = 0x0f; /* not yet negotiated */
4570 sc->rxon.ofdm_mask = 0xff; /* not yet negotiated */
4571 sc->rxon.ht_single_mask = 0xff;
4572 sc->rxon.ht_dual_mask = 0xff;
4573 sc->rxon.ht_triple_mask = 0xff;
4575 IWN_RXCHAIN_VALID(sc->rxchainmask) |
4576 IWN_RXCHAIN_MIMO_COUNT(2) |
4577 IWN_RXCHAIN_IDLE_COUNT(2);
4578 sc->rxon.rxchain = htole16(rxchain);
4579 DPRINTF(sc, IWN_DEBUG_RESET, "%s: setting configuration\n", __func__);
4580 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 0);
4582 device_printf(sc->sc_dev,
4583 "%s: RXON command failed\n", __func__);
4587 error = iwn_add_broadcast_node(sc, 0);
4589 device_printf(sc->sc_dev,
4590 "%s: could not add broadcast node\n", __func__);
4594 /* Configuration has changed, set TX power accordingly. */
4595 error = hal->set_txpower(sc, ic->ic_curchan, 0);
4597 device_printf(sc->sc_dev,
4598 "%s: could not set TX power\n", __func__);
4602 error = iwn_set_critical_temp(sc);
4604 device_printf(sc->sc_dev,
4605 "%s: ccould not set critical temperature\n", __func__);
4609 /* Set power saving level to CAM during initialization. */
4610 error = iwn_set_pslevel(sc, 0, 0, 0);
4612 device_printf(sc->sc_dev,
4613 "%s: could not set power saving level\n", __func__);
4620 iwn_scan(struct iwn_softc *sc)
4622 struct ifnet *ifp = sc->sc_ifp;
4623 struct ieee80211com *ic = ifp->if_l2com;
4624 struct ieee80211_scan_state *ss = ic->ic_scan; /*XXX*/
4625 struct iwn_scan_hdr *hdr;
4626 struct iwn_cmd_data *tx;
4627 struct iwn_scan_essid *essid;
4628 struct iwn_scan_chan *chan;
4629 struct ieee80211_frame *wh;
4630 struct ieee80211_rateset *rs;
4631 struct ieee80211_channel *c;
4632 int buflen, error, nrates;
4634 uint8_t *buf, *frm, txant;
4636 buf = kmalloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_INTWAIT | M_ZERO);
4638 device_printf(sc->sc_dev,
4639 "%s: could not allocate buffer for scan command\n",
4643 hdr = (struct iwn_scan_hdr *)buf;
4646 * Move to the next channel if no frames are received within 10ms
4647 * after sending the probe request.
4649 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
4650 hdr->quiet_threshold = htole16(1); /* min # of packets */
4652 /* Select antennas for scanning. */
4654 IWN_RXCHAIN_VALID(sc->rxchainmask) |
4655 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
4656 IWN_RXCHAIN_DRIVER_FORCE;
4657 if (IEEE80211_IS_CHAN_A(ic->ic_curchan) &&
4658 sc->hw_type == IWN_HW_REV_TYPE_4965) {
4659 /* Ant A must be avoided in 5GHz because of an HW bug. */
4660 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_BC);
4661 } else /* Use all available RX antennas. */
4662 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
4663 hdr->rxchain = htole16(rxchain);
4664 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
4666 tx = (struct iwn_cmd_data *)(hdr + 1);
4667 tx->flags = htole32(IWN_TX_AUTO_SEQ);
4668 tx->id = sc->sc_hal->broadcast_id;
4669 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4671 if (IEEE80211_IS_CHAN_A(ic->ic_curchan)) {
4672 /* Send probe requests at 6Mbps. */
4673 tx->plcp = iwn_rates[IWN_RIDX_OFDM6].plcp;
4674 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
4676 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
4677 /* Send probe requests at 1Mbps. */
4678 tx->plcp = iwn_rates[IWN_RIDX_CCK1].plcp;
4679 tx->rflags = IWN_RFLAG_CCK;
4680 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
4682 /* Use the first valid TX antenna. */
4683 txant = IWN_LSB(sc->txchainmask);
4684 tx->rflags |= IWN_RFLAG_ANT(txant);
4686 essid = (struct iwn_scan_essid *)(tx + 1);
4687 if (ss->ss_ssid[0].len != 0) {
4688 essid[0].id = IEEE80211_ELEMID_SSID;
4689 essid[0].len = ss->ss_ssid[0].len;
4690 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
4694 * Build a probe request frame. Most of the following code is a
4695 * copy & paste of what is done in net80211.
4697 wh = (struct ieee80211_frame *)(essid + 20);
4698 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
4699 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
4700 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
4701 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr);
4702 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(ifp));
4703 IEEE80211_ADDR_COPY(wh->i_addr3, ifp->if_broadcastaddr);
4704 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
4705 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
4707 frm = (uint8_t *)(wh + 1);
4710 *frm++ = IEEE80211_ELEMID_SSID;
4711 *frm++ = ss->ss_ssid[0].len;
4712 memcpy(frm, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
4713 frm += ss->ss_ssid[0].len;
4715 /* Add supported rates IE. */
4716 *frm++ = IEEE80211_ELEMID_RATES;
4717 nrates = rs->rs_nrates;
4718 if (nrates > IEEE80211_RATE_SIZE)
4719 nrates = IEEE80211_RATE_SIZE;
4721 memcpy(frm, rs->rs_rates, nrates);
4724 /* Add supported xrates IE. */
4725 if (rs->rs_nrates > IEEE80211_RATE_SIZE) {
4726 nrates = rs->rs_nrates - IEEE80211_RATE_SIZE;
4727 *frm++ = IEEE80211_ELEMID_XRATES;
4728 *frm++ = (uint8_t)nrates;
4729 memcpy(frm, rs->rs_rates + IEEE80211_RATE_SIZE, nrates);
4733 /* Set length of probe request. */
4734 tx->len = htole16(frm - (uint8_t *)wh);
4737 chan = (struct iwn_scan_chan *)frm;
4738 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
4740 if (ss->ss_nssid > 0)
4741 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
4742 chan->dsp_gain = 0x6e;
4743 if (IEEE80211_IS_CHAN_5GHZ(c) &&
4744 !(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
4745 chan->rf_gain = 0x3b;
4746 chan->active = htole16(24);
4747 chan->passive = htole16(110);
4748 chan->flags |= htole32(IWN_CHAN_ACTIVE);
4749 } else if (IEEE80211_IS_CHAN_5GHZ(c)) {
4750 chan->rf_gain = 0x3b;
4751 chan->active = htole16(24);
4752 if (sc->rxon.associd)
4753 chan->passive = htole16(78);
4755 chan->passive = htole16(110);
4756 hdr->crc_threshold = 0xffff;
4757 } else if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
4758 chan->rf_gain = 0x28;
4759 chan->active = htole16(36);
4760 chan->passive = htole16(120);
4761 chan->flags |= htole32(IWN_CHAN_ACTIVE);
4763 chan->rf_gain = 0x28;
4764 chan->active = htole16(36);
4765 if (sc->rxon.associd)
4766 chan->passive = htole16(88);
4768 chan->passive = htole16(120);
4769 hdr->crc_threshold = 0xffff;
4772 DPRINTF(sc, IWN_DEBUG_STATE,
4773 "%s: chan %u flags 0x%x rf_gain 0x%x "
4774 "dsp_gain 0x%x active 0x%x passive 0x%x\n", __func__,
4775 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
4776 chan->active, chan->passive);
4780 buflen = (uint8_t *)chan - buf;
4781 hdr->len = htole16(buflen);
4783 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
4785 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
4786 kfree(buf, M_DEVBUF);
4791 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
4793 const struct iwn_hal *hal = sc->sc_hal;
4794 struct ifnet *ifp = sc->sc_ifp;
4795 struct ieee80211com *ic = ifp->if_l2com;
4796 struct ieee80211_node *ni = vap->iv_bss;
4799 sc->calib.state = IWN_CALIB_STATE_INIT;
4801 /* Update adapter configuration. */
4802 IEEE80211_ADDR_COPY(sc->rxon.bssid, ni->ni_bssid);
4803 sc->rxon.chan = htole16(ieee80211_chan2ieee(ic, ni->ni_chan));
4804 sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
4805 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
4806 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4807 if (ic->ic_flags & IEEE80211_F_SHSLOT)
4808 sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);
4809 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
4810 sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);
4811 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
4812 sc->rxon.cck_mask = 0;
4813 sc->rxon.ofdm_mask = 0x15;
4814 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
4815 sc->rxon.cck_mask = 0x03;
4816 sc->rxon.ofdm_mask = 0;
4818 /* XXX assume 802.11b/g */
4819 sc->rxon.cck_mask = 0x0f;
4820 sc->rxon.ofdm_mask = 0x15;
4822 DPRINTF(sc, IWN_DEBUG_STATE,
4823 "%s: config chan %d mode %d flags 0x%x cck 0x%x ofdm 0x%x "
4824 "ht_single 0x%x ht_dual 0x%x rxchain 0x%x "
4825 "myaddr %6D wlap %6D bssid %6D associd %d filter 0x%x\n",
4827 le16toh(sc->rxon.chan), sc->rxon.mode, le32toh(sc->rxon.flags),
4828 sc->rxon.cck_mask, sc->rxon.ofdm_mask,
4829 sc->rxon.ht_single_mask, sc->rxon.ht_dual_mask,
4830 le16toh(sc->rxon.rxchain),
4831 sc->rxon.myaddr, ":", sc->rxon.wlap, ":", sc->rxon.bssid, ":",
4832 le16toh(sc->rxon.associd), le32toh(sc->rxon.filter));
4833 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 1);
4835 device_printf(sc->sc_dev,
4836 "%s: RXON command failed, error %d\n", __func__, error);
4840 /* Configuration has changed, set TX power accordingly. */
4841 error = hal->set_txpower(sc, ni->ni_chan, 1);
4843 device_printf(sc->sc_dev,
4844 "%s: could not set Tx power, error %d\n", __func__, error);
4848 * Reconfiguring RXON clears the firmware nodes table so we must
4849 * add the broadcast node again.
4851 error = iwn_add_broadcast_node(sc, 1);
4853 device_printf(sc->sc_dev,
4854 "%s: could not add broadcast node, error %d\n",
4862 * Configure the adapter for associated state.
4865 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
4867 #define MS(v,x) (((v) & x) >> x##_S)
4868 const struct iwn_hal *hal = sc->sc_hal;
4869 struct ifnet *ifp = sc->sc_ifp;
4870 struct ieee80211com *ic = ifp->if_l2com;
4871 struct ieee80211_node *ni = vap->iv_bss;
4872 struct iwn_node_info node;
4875 sc->calib.state = IWN_CALIB_STATE_INIT;
4877 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
4878 /* Link LED blinks while monitoring. */
4879 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
4882 error = iwn_set_timing(sc, ni);
4884 device_printf(sc->sc_dev,
4885 "%s: could not set timing, error %d\n", __func__, error);
4889 /* Update adapter configuration. */
4890 IEEE80211_ADDR_COPY(sc->rxon.bssid, ni->ni_bssid);
4891 sc->rxon.chan = htole16(ieee80211_chan2ieee(ic, ni->ni_chan));
4892 sc->rxon.associd = htole16(IEEE80211_AID(ni->ni_associd));
4893 /* Short preamble and slot time are negotiated when associating. */
4894 sc->rxon.flags &= ~htole32(IWN_RXON_SHPREAMBLE | IWN_RXON_SHSLOT);
4895 sc->rxon.flags |= htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
4896 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
4897 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4899 sc->rxon.flags &= ~htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4900 if (ic->ic_flags & IEEE80211_F_SHSLOT)
4901 sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);
4902 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
4903 sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);
4904 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
4905 sc->rxon.cck_mask = 0;
4906 sc->rxon.ofdm_mask = 0x15;
4907 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
4908 sc->rxon.cck_mask = 0x03;
4909 sc->rxon.ofdm_mask = 0;
4911 /* XXX assume 802.11b/g */
4912 sc->rxon.cck_mask = 0x0f;
4913 sc->rxon.ofdm_mask = 0x15;
4916 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
4917 sc->rxon.flags &= ~htole32(IWN_RXON_HT);
4918 if (IEEE80211_IS_CHAN_HT40U(ni->ni_chan))
4919 sc->rxon.flags |= htole32(IWN_RXON_HT40U);
4920 else if (IEEE80211_IS_CHAN_HT40D(ni->ni_chan))
4921 sc->rxon.flags |= htole32(IWN_RXON_HT40D);
4923 sc->rxon.flags |= htole32(IWN_RXON_HT20);
4924 sc->rxon.rxchain = htole16(
4925 IWN_RXCHAIN_VALID(3)
4926 | IWN_RXCHAIN_MIMO_COUNT(3)
4927 | IWN_RXCHAIN_IDLE_COUNT(1)
4928 | IWN_RXCHAIN_MIMO_FORCE);
4930 maxrxampdu = MS(ni->ni_htparam, IEEE80211_HTCAP_MAXRXAMPDU);
4931 ampdudensity = MS(ni->ni_htparam, IEEE80211_HTCAP_MPDUDENSITY);
4933 maxrxampdu = ampdudensity = 0;
4935 sc->rxon.filter |= htole32(IWN_FILTER_BSS);
4937 DPRINTF(sc, IWN_DEBUG_STATE,
4938 "%s: config chan %d mode %d flags 0x%x cck 0x%x ofdm 0x%x "
4939 "ht_single 0x%x ht_dual 0x%x rxchain 0x%x "
4940 "myaddr %6D wlap %6D bssid %6D associd %d filter 0x%x\n",
4942 le16toh(sc->rxon.chan), sc->rxon.mode, le32toh(sc->rxon.flags),
4943 sc->rxon.cck_mask, sc->rxon.ofdm_mask,
4944 sc->rxon.ht_single_mask, sc->rxon.ht_dual_mask,
4945 le16toh(sc->rxon.rxchain),
4946 sc->rxon.myaddr, ":", sc->rxon.wlap, ":", sc->rxon.bssid, ":",
4947 le16toh(sc->rxon.associd), le32toh(sc->rxon.filter));
4948 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 1);
4950 device_printf(sc->sc_dev,
4951 "%s: could not update configuration, error %d\n",
4956 /* Configuration has changed, set TX power accordingly. */
4957 error = hal->set_txpower(sc, ni->ni_chan, 1);
4959 device_printf(sc->sc_dev,
4960 "%s: could not set Tx power, error %d\n", __func__, error);
4965 memset(&node, 0, sizeof node);
4966 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
4967 node.id = IWN_ID_BSS;
4969 node.htflags = htole32(IWN_AMDPU_SIZE_FACTOR(3) |
4970 IWN_AMDPU_DENSITY(5)); /* 2us */
4972 DPRINTF(sc, IWN_DEBUG_STATE, "%s: add BSS node, id %d htflags 0x%x\n",
4973 __func__, node.id, le32toh(node.htflags));
4974 error = hal->add_node(sc, &node, 1);
4976 device_printf(sc->sc_dev, "could not add BSS node\n");
4979 DPRINTF(sc, IWN_DEBUG_STATE, "setting link quality for node %d\n",
4981 error = iwn_set_link_quality(sc, node.id, 1);
4983 device_printf(sc->sc_dev,
4984 "%s: could not setup MRR for node %d, error %d\n",
4985 __func__, node.id, error);
4989 error = iwn_init_sensitivity(sc);
4991 device_printf(sc->sc_dev,
4992 "%s: could not set sensitivity, error %d\n",
4997 /* Start periodic calibration timer. */
4998 sc->calib.state = IWN_CALIB_STATE_ASSOC;
4999 iwn_calib_reset(sc);
5001 /* Link LED always on while associated. */
5002 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
5010 * This function is called by upper layer when an ADDBA request is received
5011 * from another STA and before the ADDBA response is sent.
5014 iwn_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
5017 struct ieee80211_rx_ba *ba = &ni->ni_rx_ba[tid];
5018 struct iwn_softc *sc = ic->ic_softc;
5019 struct iwn_node *wn = (void *)ni;
5020 struct iwn_node_info node;
5022 memset(&node, 0, sizeof node);
5024 node.control = IWN_NODE_UPDATE;
5025 node.flags = IWN_FLAG_SET_ADDBA;
5026 node.addba_tid = tid;
5027 node.addba_ssn = htole16(ba->ba_winstart);
5028 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
5029 wn->id, tid, ba->ba_winstart));
5030 return sc->sc_hal->add_node(sc, &node, 1);
5034 * This function is called by upper layer on teardown of an HT-immediate
5035 * Block Ack agreement (eg. uppon receipt of a DELBA frame.)
5038 iwn_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
5041 struct iwn_softc *sc = ic->ic_softc;
5042 struct iwn_node *wn = (void *)ni;
5043 struct iwn_node_info node;
5045 memset(&node, 0, sizeof node);
5047 node.control = IWN_NODE_UPDATE;
5048 node.flags = IWN_FLAG_SET_DELBA;
5049 node.delba_tid = tid;
5050 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
5051 (void)sc->sc_hal->add_node(sc, &node, 1);
5055 * This function is called by upper layer when an ADDBA response is received
5059 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
5062 struct ieee80211_tx_ba *ba = &ni->ni_tx_ba[tid];
5063 struct iwn_softc *sc = ic->ic_softc;
5064 const struct iwn_hal *hal = sc->sc_hal;
5065 struct iwn_node *wn = (void *)ni;
5066 struct iwn_node_info node;
5069 /* Enable TX for the specified RA/TID. */
5070 wn->disable_tid &= ~(1 << tid);
5071 memset(&node, 0, sizeof node);
5073 node.control = IWN_NODE_UPDATE;
5074 node.flags = IWN_FLAG_SET_DISABLE_TID;
5075 node.disable_tid = htole16(wn->disable_tid);
5076 error = hal->add_node(sc, &node, 1);
5080 if ((error = iwn_nic_lock(sc)) != 0)
5082 hal->ampdu_tx_start(sc, ni, tid, ba->ba_winstart);
5088 iwn_ampdu_tx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
5091 struct ieee80211_tx_ba *ba = &ni->ni_tx_ba[tid];
5092 struct iwn_softc *sc = ic->ic_softc;
5095 error = iwn_nic_lock(sc);
5098 sc->sc_hal->ampdu_tx_stop(sc, tid, ba->ba_winstart);
5103 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
5104 uint8_t tid, uint16_t ssn)
5106 struct iwn_node *wn = (void *)ni;
5109 /* Stop TX scheduler while we're changing its configuration. */
5110 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5111 IWN4965_TXQ_STATUS_CHGACT);
5113 /* Assign RA/TID translation to the queue. */
5114 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
5117 /* Enable chain-building mode for the queue. */
5118 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
5120 /* Set starting sequence number from the ADDBA request. */
5121 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5122 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
5124 /* Set scheduler window size. */
5125 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
5127 /* Set scheduler frame limit. */
5128 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
5129 IWN_SCHED_LIMIT << 16);
5131 /* Enable interrupts for the queue. */
5132 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
5134 /* Mark the queue as active. */
5135 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5136 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
5137 iwn_tid2fifo[tid] << 1);
5141 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, uint8_t tid, uint16_t ssn)
5145 /* Stop TX scheduler while we're changing its configuration. */
5146 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5147 IWN4965_TXQ_STATUS_CHGACT);
5149 /* Set starting sequence number from the ADDBA request. */
5150 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5151 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
5153 /* Disable interrupts for the queue. */
5154 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
5156 /* Mark the queue as inactive. */
5157 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5158 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
5162 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
5163 uint8_t tid, uint16_t ssn)
5165 struct iwn_node *wn = (void *)ni;
5168 /* Stop TX scheduler while we're changing its configuration. */
5169 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5170 IWN5000_TXQ_STATUS_CHGACT);
5172 /* Assign RA/TID translation to the queue. */
5173 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
5176 /* Enable chain-building mode for the queue. */
5177 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
5179 /* Enable aggregation for the queue. */
5180 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
5182 /* Set starting sequence number from the ADDBA request. */
5183 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5184 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
5186 /* Set scheduler window size and frame limit. */
5187 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
5188 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
5190 /* Enable interrupts for the queue. */
5191 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
5193 /* Mark the queue as active. */
5194 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5195 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
5199 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, uint8_t tid, uint16_t ssn)
5203 /* Stop TX scheduler while we're changing its configuration. */
5204 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5205 IWN5000_TXQ_STATUS_CHGACT);
5207 /* Disable aggregation for the queue. */
5208 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
5210 /* Set starting sequence number from the ADDBA request. */
5211 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5212 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
5214 /* Disable interrupts for the queue. */
5215 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
5217 /* Mark the queue as inactive. */
5218 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5219 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
5224 * Query calibration tables from the initialization firmware. We do this
5225 * only once at first boot. Called from a process context.
5228 iwn5000_query_calibration(struct iwn_softc *sc)
5230 struct iwn5000_calib_config cmd;
5233 memset(&cmd, 0, sizeof cmd);
5234 cmd.ucode.once.enable = 0xffffffff;
5235 cmd.ucode.once.start = 0xffffffff;
5236 cmd.ucode.once.send = 0xffffffff;
5237 cmd.ucode.flags = 0xffffffff;
5238 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
5240 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
5244 /* Wait at most two seconds for calibration to complete. */
5245 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
5246 error = zsleep(sc, &wlan_global_serializer,
5247 0, "iwninit", 2 * hz);
5253 * Send calibration results to the runtime firmware. These results were
5254 * obtained on first boot from the initialization firmware.
5257 iwn5000_send_calibration(struct iwn_softc *sc)
5261 for (idx = 0; idx < 5; idx++) {
5262 if (sc->calibcmd[idx].buf == NULL)
5263 continue; /* No results available. */
5264 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5265 "send calibration result idx=%d len=%d\n",
5266 idx, sc->calibcmd[idx].len);
5267 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
5268 sc->calibcmd[idx].len, 0);
5270 device_printf(sc->sc_dev,
5271 "%s: could not send calibration result, error %d\n",
5280 iwn5000_send_wimax_coex(struct iwn_softc *sc)
5282 struct iwn5000_wimax_coex wimax;
5285 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
5286 /* Enable WiMAX coexistence for combo adapters. */
5288 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
5289 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
5290 IWN_WIMAX_COEX_STA_TABLE_VALID |
5291 IWN_WIMAX_COEX_ENABLE;
5292 memcpy(wimax.events, iwn6050_wimax_events,
5293 sizeof iwn6050_wimax_events);
5297 /* Disable WiMAX coexistence. */
5299 memset(wimax.events, 0, sizeof wimax.events);
5301 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
5303 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
5307 * This function is called after the runtime firmware notifies us of its
5308 * readiness (called in a process context.)
5311 iwn4965_post_alive(struct iwn_softc *sc)
5315 if ((error = iwn_nic_lock(sc)) != 0)
5318 /* Clear TX scheduler state in SRAM. */
5319 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
5320 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
5321 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
5323 /* Set physical address of TX scheduler rings (1KB aligned.) */
5324 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
5326 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
5328 /* Disable chain mode for all our 16 queues. */
5329 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
5331 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
5332 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
5333 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
5335 /* Set scheduler window size. */
5336 iwn_mem_write(sc, sc->sched_base +
5337 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
5338 /* Set scheduler frame limit. */
5339 iwn_mem_write(sc, sc->sched_base +
5340 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
5341 IWN_SCHED_LIMIT << 16);
5344 /* Enable interrupts for all our 16 queues. */
5345 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
5346 /* Identify TX FIFO rings (0-7). */
5347 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
5349 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
5350 for (qid = 0; qid < 7; qid++) {
5351 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
5352 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5353 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
5360 * This function is called after the initialization or runtime firmware
5361 * notifies us of its readiness (called in a process context.)
5364 iwn5000_post_alive(struct iwn_softc *sc)
5368 /* Switch to using ICT interrupt mode. */
5369 iwn5000_ict_reset(sc);
5371 error = iwn_nic_lock(sc);
5375 /* Clear TX scheduler state in SRAM. */
5376 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
5377 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
5378 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
5380 /* Set physical address of TX scheduler rings (1KB aligned.) */
5381 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
5383 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
5385 /* Enable chain mode for all queues, except command queue. */
5386 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
5387 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
5389 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
5390 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
5391 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
5393 iwn_mem_write(sc, sc->sched_base +
5394 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
5395 /* Set scheduler window size and frame limit. */
5396 iwn_mem_write(sc, sc->sched_base +
5397 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
5398 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
5401 /* Enable interrupts for all our 20 queues. */
5402 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
5403 /* Identify TX FIFO rings (0-7). */
5404 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
5406 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
5407 for (qid = 0; qid < 7; qid++) {
5408 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
5409 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5410 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
5414 /* Configure WiMAX coexistence for combo adapters. */
5415 error = iwn5000_send_wimax_coex(sc);
5417 device_printf(sc->sc_dev,
5418 "%s: could not configure WiMAX coexistence, error %d\n",
5422 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
5423 struct iwn5000_phy_calib_crystal cmd;
5425 /* Perform crystal calibration. */
5426 memset(&cmd, 0, sizeof cmd);
5427 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
5430 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
5431 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
5432 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5433 "sending crystal calibration %d, %d\n",
5434 cmd.cap_pin[0], cmd.cap_pin[1]);
5435 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
5437 device_printf(sc->sc_dev,
5438 "%s: crystal calibration failed, error %d\n",
5443 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
5444 /* Query calibration from the initialization firmware. */
5445 error = iwn5000_query_calibration(sc);
5447 device_printf(sc->sc_dev,
5448 "%s: could not query calibration, error %d\n",
5453 * We have the calibration results now, reboot with the
5454 * runtime firmware (call ourselves recursively!)
5457 error = iwn_hw_init(sc);
5459 /* Send calibration results to runtime firmware. */
5460 error = iwn5000_send_calibration(sc);
5466 * The firmware boot code is small and is intended to be copied directly into
5467 * the NIC internal memory (no DMA transfer.)
5470 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
5474 size /= sizeof (uint32_t);
5476 error = iwn_nic_lock(sc);
5480 /* Copy microcode image into NIC memory. */
5481 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
5482 (const uint32_t *)ucode, size);
5484 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
5485 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
5486 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
5488 /* Start boot load now. */
5489 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
5491 /* Wait for transfer to complete. */
5492 for (ntries = 0; ntries < 1000; ntries++) {
5493 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
5494 IWN_BSM_WR_CTRL_START))
5498 if (ntries == 1000) {
5499 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
5505 /* Enable boot after power up. */
5506 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
5513 iwn4965_load_firmware(struct iwn_softc *sc)
5515 struct iwn_fw_info *fw = &sc->fw;
5516 struct iwn_dma_info *dma = &sc->fw_dma;
5519 /* Copy initialization sections into pre-allocated DMA-safe memory. */
5520 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
5521 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5522 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
5523 fw->init.text, fw->init.textsz);
5524 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5526 /* Tell adapter where to find initialization sections. */
5527 error = iwn_nic_lock(sc);
5530 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
5531 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
5532 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
5533 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
5534 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
5537 /* Load firmware boot code. */
5538 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
5540 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
5544 /* Now press "execute". */
5545 IWN_WRITE(sc, IWN_RESET, 0);
5547 /* Wait at most one second for first alive notification. */
5548 error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz);
5550 device_printf(sc->sc_dev,
5551 "%s: timeout waiting for adapter to initialize, error %d\n",
5556 /* Retrieve current temperature for initial TX power calibration. */
5557 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
5558 sc->temp = iwn4965_get_temperature(sc);
5560 /* Copy runtime sections into pre-allocated DMA-safe memory. */
5561 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
5562 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5563 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
5564 fw->main.text, fw->main.textsz);
5565 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5567 /* Tell adapter where to find runtime sections. */
5568 error = iwn_nic_lock(sc);
5572 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
5573 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
5574 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
5575 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
5576 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
5577 IWN_FW_UPDATED | fw->main.textsz);
5584 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
5585 const uint8_t *section, int size)
5587 struct iwn_dma_info *dma = &sc->fw_dma;
5590 /* Copy firmware section into pre-allocated DMA-safe memory. */
5591 memcpy(dma->vaddr, section, size);
5592 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5594 error = iwn_nic_lock(sc);
5598 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
5599 IWN_FH_TX_CONFIG_DMA_PAUSE);
5601 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
5602 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
5603 IWN_LOADDR(dma->paddr));
5604 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
5605 IWN_HIADDR(dma->paddr) << 28 | size);
5606 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
5607 IWN_FH_TXBUF_STATUS_TBNUM(1) |
5608 IWN_FH_TXBUF_STATUS_TBIDX(1) |
5609 IWN_FH_TXBUF_STATUS_TFBD_VALID);
5611 /* Kick Flow Handler to start DMA transfer. */
5612 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
5613 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
5618 * Wait at most five seconds for FH DMA transfer to complete.
5620 error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz);
5625 iwn5000_load_firmware(struct iwn_softc *sc)
5627 struct iwn_fw_part *fw;
5630 /* Load the initialization firmware on first boot only. */
5631 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
5632 &sc->fw.main : &sc->fw.init;
5634 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
5635 fw->text, fw->textsz);
5637 device_printf(sc->sc_dev,
5638 "%s: could not load firmware %s section, error %d\n",
5639 __func__, ".text", error);
5642 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
5643 fw->data, fw->datasz);
5645 device_printf(sc->sc_dev,
5646 "%s: could not load firmware %s section, error %d\n",
5647 __func__, ".data", error);
5651 /* Now press "execute". */
5652 IWN_WRITE(sc, IWN_RESET, 0);
5657 iwn_read_firmware(struct iwn_softc *sc)
5659 const struct iwn_hal *hal = sc->sc_hal;
5660 struct iwn_fw_info *fw = &sc->fw;
5661 const uint32_t *ptr;
5666 * Read firmware image from filesystem. The firmware can block
5667 * in a taskq and deadlock against our serializer so unlock
5670 wlan_assert_serialized();
5671 wlan_serialize_exit();
5672 sc->fw_fp = firmware_get(sc->fwname);
5673 wlan_serialize_enter();
5674 if (sc->fw_fp == NULL) {
5675 device_printf(sc->sc_dev,
5676 "%s: could not load firmare image \"%s\"\n", __func__,
5681 size = sc->fw_fp->datasize;
5683 device_printf(sc->sc_dev,
5684 "%s: truncated firmware header: %zu bytes\n",
5689 /* Process firmware header. */
5690 ptr = (const uint32_t *)sc->fw_fp->data;
5691 rev = le32toh(*ptr++);
5692 /* Check firmware API version. */
5693 if (IWN_FW_API(rev) <= 1) {
5694 device_printf(sc->sc_dev,
5695 "%s: bad firmware, need API version >=2\n", __func__);
5698 if (IWN_FW_API(rev) >= 3) {
5699 /* Skip build number (version 2 header). */
5703 fw->main.textsz = le32toh(*ptr++);
5704 fw->main.datasz = le32toh(*ptr++);
5705 fw->init.textsz = le32toh(*ptr++);
5706 fw->init.datasz = le32toh(*ptr++);
5707 fw->boot.textsz = le32toh(*ptr++);
5710 /* Sanity-check firmware header. */
5711 if (fw->main.textsz > hal->fw_text_maxsz ||
5712 fw->main.datasz > hal->fw_data_maxsz ||
5713 fw->init.textsz > hal->fw_text_maxsz ||
5714 fw->init.datasz > hal->fw_data_maxsz ||
5715 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
5716 (fw->boot.textsz & 3) != 0) {
5717 device_printf(sc->sc_dev, "%s: invalid firmware header\n",
5722 /* Check that all firmware sections fit. */
5723 if (fw->main.textsz + fw->main.datasz + fw->init.textsz +
5724 fw->init.datasz + fw->boot.textsz > size) {
5725 device_printf(sc->sc_dev,
5726 "%s: firmware file too short: %zu bytes\n",
5731 /* Get pointers to firmware sections. */
5732 fw->main.text = (const uint8_t *)ptr;
5733 fw->main.data = fw->main.text + fw->main.textsz;
5734 fw->init.text = fw->main.data + fw->main.datasz;
5735 fw->init.data = fw->init.text + fw->init.textsz;
5736 fw->boot.text = fw->init.data + fw->init.datasz;
5742 iwn_clock_wait(struct iwn_softc *sc)
5746 /* Set "initialization complete" bit. */
5747 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
5749 /* Wait for clock stabilization. */
5750 for (ntries = 0; ntries < 2500; ntries++) {
5751 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
5755 device_printf(sc->sc_dev,
5756 "%s: timeout waiting for clock stabilization\n", __func__);
5761 iwn_apm_init(struct iwn_softc *sc)
5766 /* Disable L0s exit timer (NMI bug workaround.) */
5767 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
5768 /* Don't wait for ICH L0s (ICH bug workaround.) */
5769 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
5771 /* Set FH wait threshold to max (HW bug under stress workaround.) */
5772 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
5774 /* Enable HAP INTA to move adapter from L1a to L0s. */
5775 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
5777 /* Retrieve PCIe Active State Power Management (ASPM). */
5778 tmp = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
5779 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
5780 if (tmp & 0x02) /* L1 Entry enabled. */
5781 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
5783 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
5785 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
5786 sc->hw_type != IWN_HW_REV_TYPE_6000 &&
5787 sc->hw_type != IWN_HW_REV_TYPE_6050)
5788 IWN_SETBITS(sc, IWN_ANA_PLL, IWN_ANA_PLL_INIT);
5790 /* Wait for clock stabilization before accessing prph. */
5791 error = iwn_clock_wait(sc);
5795 error = iwn_nic_lock(sc);
5799 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
5800 /* Enable DMA and BSM (Bootstrap State Machine.) */
5801 iwn_prph_write(sc, IWN_APMG_CLK_EN,
5802 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
5803 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
5806 iwn_prph_write(sc, IWN_APMG_CLK_EN,
5807 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
5811 /* Disable L1-Active. */
5812 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
5819 iwn_apm_stop_master(struct iwn_softc *sc)
5823 /* Stop busmaster DMA activity. */
5824 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
5825 for (ntries = 0; ntries < 100; ntries++) {
5826 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
5830 device_printf(sc->sc_dev, "%s: timeout waiting for master\n",
5835 iwn_apm_stop(struct iwn_softc *sc)
5837 iwn_apm_stop_master(sc);
5839 /* Reset the entire device. */
5840 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
5842 /* Clear "initialization complete" bit. */
5843 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
5847 iwn4965_nic_config(struct iwn_softc *sc)
5849 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
5851 * I don't believe this to be correct but this is what the
5852 * vendor driver is doing. Probably the bits should not be
5853 * shifted in IWN_RFCFG_*.
5855 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5856 IWN_RFCFG_TYPE(sc->rfcfg) |
5857 IWN_RFCFG_STEP(sc->rfcfg) |
5858 IWN_RFCFG_DASH(sc->rfcfg));
5860 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5861 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
5866 iwn5000_nic_config(struct iwn_softc *sc)
5871 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
5872 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5873 IWN_RFCFG_TYPE(sc->rfcfg) |
5874 IWN_RFCFG_STEP(sc->rfcfg) |
5875 IWN_RFCFG_DASH(sc->rfcfg));
5877 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5878 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
5880 error = iwn_nic_lock(sc);
5883 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
5885 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
5887 * Select first Switching Voltage Regulator (1.32V) to
5888 * solve a stability issue related to noisy DC2DC line
5889 * in the silicon of 1000 Series.
5891 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
5892 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
5893 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
5894 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
5898 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
5899 /* Use internal power amplifier only. */
5900 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
5902 if (sc->hw_type == IWN_HW_REV_TYPE_6050 && sc->calib_ver >= 6) {
5903 /* Indicate that ROM calibration version is >=6. */
5904 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
5910 * Take NIC ownership over Intel Active Management Technology (AMT).
5913 iwn_hw_prepare(struct iwn_softc *sc)
5917 /* Check if hardware is ready. */
5918 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
5919 for (ntries = 0; ntries < 5; ntries++) {
5920 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
5921 IWN_HW_IF_CONFIG_NIC_READY)
5926 /* Hardware not ready, force into ready state. */
5927 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
5928 for (ntries = 0; ntries < 15000; ntries++) {
5929 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
5930 IWN_HW_IF_CONFIG_PREPARE_DONE))
5934 if (ntries == 15000)
5937 /* Hardware should be ready now. */
5938 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
5939 for (ntries = 0; ntries < 5; ntries++) {
5940 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
5941 IWN_HW_IF_CONFIG_NIC_READY)
5949 iwn_hw_init(struct iwn_softc *sc)
5951 const struct iwn_hal *hal = sc->sc_hal;
5952 int error, chnl, qid;
5954 /* Clear pending interrupts. */
5955 IWN_WRITE(sc, IWN_INT, 0xffffffff);
5957 error = iwn_apm_init(sc);
5959 device_printf(sc->sc_dev,
5960 "%s: could not power ON adapter, error %d\n",
5965 /* Select VMAIN power source. */
5966 error = iwn_nic_lock(sc);
5969 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
5972 /* Perform adapter-specific initialization. */
5973 error = hal->nic_config(sc);
5977 /* Initialize RX ring. */
5978 error = iwn_nic_lock(sc);
5981 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
5982 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
5983 /* Set physical address of RX ring (256-byte aligned.) */
5984 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
5985 /* Set physical address of RX status (16-byte aligned.) */
5986 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
5988 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
5989 IWN_FH_RX_CONFIG_ENA |
5990 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
5991 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
5992 IWN_FH_RX_CONFIG_SINGLE_FRAME |
5993 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
5994 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
5996 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
5998 error = iwn_nic_lock(sc);
6002 /* Initialize TX scheduler. */
6003 iwn_prph_write(sc, hal->sched_txfact_addr, 0);
6005 /* Set physical address of "keep warm" page (16-byte aligned.) */
6006 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
6008 /* Initialize TX rings. */
6009 for (qid = 0; qid < hal->ntxqs; qid++) {
6010 struct iwn_tx_ring *txq = &sc->txq[qid];
6012 /* Set physical address of TX ring (256-byte aligned.) */
6013 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
6014 txq->desc_dma.paddr >> 8);
6018 /* Enable DMA channels. */
6019 for (chnl = 0; chnl < hal->ndmachnls; chnl++) {
6020 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
6021 IWN_FH_TX_CONFIG_DMA_ENA |
6022 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
6025 /* Clear "radio off" and "commands blocked" bits. */
6026 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
6027 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
6029 /* Clear pending interrupts. */
6030 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6031 /* Enable interrupt coalescing. */
6032 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
6033 /* Enable interrupts. */
6034 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
6036 /* _Really_ make sure "radio off" bit is cleared! */
6037 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
6038 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
6040 error = hal->load_firmware(sc);
6042 device_printf(sc->sc_dev,
6043 "%s: could not load firmware, error %d\n",
6047 /* Wait at most one second for firmware alive notification. */
6048 error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz);
6050 device_printf(sc->sc_dev,
6051 "%s: timeout waiting for adapter to initialize, error %d\n",
6055 /* Do post-firmware initialization. */
6056 return hal->post_alive(sc);
6060 iwn_hw_stop(struct iwn_softc *sc)
6062 const struct iwn_hal *hal = sc->sc_hal;
6064 int chnl, qid, ntries;
6066 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
6068 /* Disable interrupts. */
6069 IWN_WRITE(sc, IWN_INT_MASK, 0);
6070 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6071 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
6072 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
6074 /* Make sure we no longer hold the NIC lock. */
6077 /* Stop TX scheduler. */
6078 iwn_prph_write(sc, hal->sched_txfact_addr, 0);
6080 /* Stop all DMA channels. */
6081 if (iwn_nic_lock(sc) == 0) {
6082 for (chnl = 0; chnl < hal->ndmachnls; chnl++) {
6083 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
6084 for (ntries = 0; ntries < 200; ntries++) {
6085 tmp = IWN_READ(sc, IWN_FH_TX_STATUS);
6086 if ((tmp & IWN_FH_TX_STATUS_IDLE(chnl)) ==
6087 IWN_FH_TX_STATUS_IDLE(chnl))
6096 iwn_reset_rx_ring(sc, &sc->rxq);
6098 /* Reset all TX rings. */
6099 for (qid = 0; qid < hal->ntxqs; qid++)
6100 iwn_reset_tx_ring(sc, &sc->txq[qid]);
6102 if (iwn_nic_lock(sc) == 0) {
6103 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
6104 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
6109 /* Power OFF adapter. */
6114 iwn_init_locked(struct iwn_softc *sc)
6116 struct ifnet *ifp = sc->sc_ifp;
6119 error = iwn_hw_prepare(sc);
6121 device_printf(sc->sc_dev, "%s: hardware not ready, eror %d\n",
6126 /* Initialize interrupt mask to default value. */
6127 sc->int_mask = IWN_INT_MASK_DEF;
6128 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
6130 /* Check that the radio is not disabled by hardware switch. */
6131 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
6132 device_printf(sc->sc_dev,
6133 "radio is disabled by hardware switch\n");
6135 /* Enable interrupts to get RF toggle notifications. */
6136 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6137 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
6141 /* Read firmware images from the filesystem. */
6142 error = iwn_read_firmware(sc);
6144 device_printf(sc->sc_dev,
6145 "%s: could not read firmware, error %d\n",
6150 /* Initialize hardware and upload firmware. */
6151 error = iwn_hw_init(sc);
6152 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
6155 device_printf(sc->sc_dev,
6156 "%s: could not initialize hardware, error %d\n",
6161 /* Configure adapter now that it is ready. */
6162 error = iwn_config(sc);
6164 device_printf(sc->sc_dev,
6165 "%s: could not configure device, error %d\n",
6170 ifp->if_flags &= ~IFF_OACTIVE;
6171 ifp->if_flags |= IFF_RUNNING;
6176 iwn_stop_locked(sc);
6182 struct iwn_softc *sc = arg;
6183 struct ifnet *ifp = sc->sc_ifp;
6184 struct ieee80211com *ic = ifp->if_l2com;
6186 wlan_serialize_enter();
6187 iwn_init_locked(sc);
6188 wlan_serialize_exit();
6190 if (ifp->if_flags & IFF_RUNNING)
6191 ieee80211_start_all(ic);
6195 iwn_stop_locked(struct iwn_softc *sc)
6197 struct ifnet *ifp = sc->sc_ifp;
6199 sc->sc_tx_timer = 0;
6200 callout_stop(&sc->sc_timer_to);
6201 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
6203 /* Power OFF hardware. */
6208 iwn_stop(struct iwn_softc *sc)
6210 wlan_serialize_enter();
6211 iwn_stop_locked(sc);
6212 wlan_serialize_exit();
6216 * Callback from net80211 to start a scan.
6219 iwn_scan_start(struct ieee80211com *ic)
6221 struct ifnet *ifp = ic->ic_ifp;
6222 struct iwn_softc *sc = ifp->if_softc;
6224 /* make the link LED blink while we're scanning */
6225 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
6229 * Callback from net80211 to terminate a scan.
6232 iwn_scan_end(struct ieee80211com *ic)
6234 struct ifnet *ifp = ic->ic_ifp;
6235 struct iwn_softc *sc = ifp->if_softc;
6236 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6238 if (vap->iv_state == IEEE80211_S_RUN) {
6239 /* Set link LED to ON status if we are associated */
6240 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
6245 * Callback from net80211 to force a channel change.
6248 iwn_set_channel(struct ieee80211com *ic)
6250 const struct ieee80211_channel *c = ic->ic_curchan;
6251 struct ifnet *ifp = ic->ic_ifp;
6252 struct iwn_softc *sc = ifp->if_softc;
6254 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
6255 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
6256 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
6257 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
6261 * Callback from net80211 to start scanning of the current channel.
6264 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
6266 struct ieee80211vap *vap = ss->ss_vap;
6267 struct iwn_softc *sc = vap->iv_ic->ic_ifp->if_softc;
6270 error = iwn_scan(sc);
6272 ieee80211_cancel_scan(vap);
6276 * Callback from net80211 to handle the minimum dwell time being met.
6277 * The intent is to terminate the scan but we just let the firmware
6278 * notify us when it's finished as we have no safe way to abort it.
6281 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
6283 /* NB: don't try to abort scan; wait for firmware to finish */
6286 static struct iwn_eeprom_chan *
6287 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
6291 for (j = 0; j < 7; j++) {
6292 for (i = 0; i < iwn_bands[j].nchan; i++) {
6293 if (iwn_bands[j].chan[i] == c->ic_ieee)
6294 return &sc->eeprom_channels[j][i];
6302 * Enforce flags read from EEPROM.
6305 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
6306 int nchan, struct ieee80211_channel chans[])
6308 struct iwn_softc *sc = ic->ic_ifp->if_softc;
6311 for (i = 0; i < nchan; i++) {
6312 struct ieee80211_channel *c = &chans[i];
6313 struct iwn_eeprom_chan *channel;
6315 channel = iwn_find_eeprom_channel(sc, c);
6316 if (channel == NULL) {
6317 if_printf(ic->ic_ifp,
6318 "%s: invalid channel %u freq %u/0x%x\n",
6319 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
6322 c->ic_flags |= iwn_eeprom_channel_flags(channel);
6329 iwn_hw_reset_task(void *arg0, int pending)
6331 struct iwn_softc *sc = arg0;
6333 struct ieee80211com *ic;
6335 wlan_serialize_enter();
6338 iwn_stop_locked(sc);
6339 iwn_init_locked(sc);
6340 ieee80211_notify_radio(ic, 1);
6341 wlan_serialize_exit();
6345 iwn_radio_on_task(void *arg0, int pending)
6347 struct iwn_softc *sc = arg0;
6349 struct ieee80211com *ic;
6350 struct ieee80211vap *vap;
6352 wlan_serialize_enter();
6355 vap = TAILQ_FIRST(&ic->ic_vaps);
6357 iwn_init_locked(sc);
6358 ieee80211_init(vap);
6360 wlan_serialize_exit();
6364 iwn_radio_off_task(void *arg0, int pending)
6366 struct iwn_softc *sc = arg0;
6368 struct ieee80211com *ic;
6369 struct ieee80211vap *vap;
6371 wlan_serialize_enter();
6374 vap = TAILQ_FIRST(&ic->ic_vaps);
6375 iwn_stop_locked(sc);
6377 ieee80211_stop(vap);
6379 /* Enable interrupts to get RF toggle notification. */
6380 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6381 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
6382 wlan_serialize_exit();
6386 iwn_sysctlattach(struct iwn_softc *sc)
6388 struct sysctl_ctx_list *ctx;
6389 struct sysctl_oid *tree;
6391 ctx = &sc->sc_sysctl_ctx;
6392 tree = sc->sc_sysctl_tree;
6394 device_printf(sc->sc_dev, "can't add sysctl node\n");
6400 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6401 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "control debugging printfs");
6406 iwn_pci_shutdown(device_t dev)
6408 struct iwn_softc *sc = device_get_softc(dev);
6410 wlan_serialize_enter();
6411 iwn_stop_locked(sc);
6412 wlan_serialize_exit();
6418 iwn_pci_suspend(device_t dev)
6420 struct iwn_softc *sc = device_get_softc(dev);
6421 struct ifnet *ifp = sc->sc_ifp;
6422 struct ieee80211com *ic = ifp->if_l2com;
6423 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6425 wlan_serialize_enter();
6426 iwn_stop_locked(sc);
6428 ieee80211_stop(vap);
6429 wlan_serialize_exit();
6435 iwn_pci_resume(device_t dev)
6437 struct iwn_softc *sc = device_get_softc(dev);
6439 struct ieee80211com *ic;
6440 struct ieee80211vap *vap;
6442 wlan_serialize_enter();
6445 vap = TAILQ_FIRST(&ic->ic_vaps);
6446 /* Clear device-specific "PCI retry timeout" register (41h). */
6447 pci_write_config(dev, 0x41, 0, 1);
6449 if (ifp->if_flags & IFF_UP) {
6450 iwn_init_locked(sc);
6452 ieee80211_init(vap);
6453 if (ifp->if_flags & IFF_RUNNING)
6454 iwn_start_locked(ifp);
6456 wlan_serialize_exit();
6463 iwn_intr_str(uint8_t cmd)
6467 case IWN_UC_READY: return "UC_READY";
6468 case IWN_ADD_NODE_DONE: return "ADD_NODE_DONE";
6469 case IWN_TX_DONE: return "TX_DONE";
6470 case IWN_START_SCAN: return "START_SCAN";
6471 case IWN_STOP_SCAN: return "STOP_SCAN";
6472 case IWN_RX_STATISTICS: return "RX_STATS";
6473 case IWN_BEACON_STATISTICS: return "BEACON_STATS";
6474 case IWN_STATE_CHANGED: return "STATE_CHANGED";
6475 case IWN_BEACON_MISSED: return "BEACON_MISSED";
6476 case IWN_RX_PHY: return "RX_PHY";
6477 case IWN_MPDU_RX_DONE: return "MPDU_RX_DONE";
6478 case IWN_RX_DONE: return "RX_DONE";
6480 /* Command Notifications */
6481 case IWN_CMD_RXON: return "IWN_CMD_RXON";
6482 case IWN_CMD_RXON_ASSOC: return "IWN_CMD_RXON_ASSOC";
6483 case IWN_CMD_EDCA_PARAMS: return "IWN_CMD_EDCA_PARAMS";
6484 case IWN_CMD_TIMING: return "IWN_CMD_TIMING";
6485 case IWN_CMD_LINK_QUALITY: return "IWN_CMD_LINK_QUALITY";
6486 case IWN_CMD_SET_LED: return "IWN_CMD_SET_LED";
6487 case IWN5000_CMD_WIMAX_COEX: return "IWN5000_CMD_WIMAX_COEX";
6488 case IWN5000_CMD_CALIB_CONFIG: return "IWN5000_CMD_CALIB_CONFIG";
6489 case IWN5000_CMD_CALIB_RESULT: return "IWN5000_CMD_CALIB_RESULT";
6490 case IWN5000_CMD_CALIB_COMPLETE: return "IWN5000_CMD_CALIB_COMPLETE";
6491 case IWN_CMD_SET_POWER_MODE: return "IWN_CMD_SET_POWER_MODE";
6492 case IWN_CMD_SCAN: return "IWN_CMD_SCAN";
6493 case IWN_CMD_SCAN_RESULTS: return "IWN_CMD_SCAN_RESULTS";
6494 case IWN_CMD_TXPOWER: return "IWN_CMD_TXPOWER";
6495 case IWN_CMD_TXPOWER_DBM: return "IWN_CMD_TXPOWER_DBM";
6496 case IWN5000_CMD_TX_ANT_CONFIG: return "IWN5000_CMD_TX_ANT_CONFIG";
6497 case IWN_CMD_BT_COEX: return "IWN_CMD_BT_COEX";
6498 case IWN_CMD_SET_CRITICAL_TEMP: return "IWN_CMD_SET_CRITICAL_TEMP";
6499 case IWN_CMD_SET_SENSITIVITY: return "IWN_CMD_SET_SENSITIVITY";
6500 case IWN_CMD_PHY_CALIB: return "IWN_CMD_PHY_CALIB";
6502 return "UNKNOWN INTR NOTIF/CMD";
6504 #endif /* IWN_DEBUG */
6506 static device_method_t iwn_methods[] = {
6507 /* Device interface */
6508 DEVMETHOD(device_probe, iwn_pci_probe),
6509 DEVMETHOD(device_attach, iwn_pci_attach),
6510 DEVMETHOD(device_detach, iwn_pci_detach),
6511 DEVMETHOD(device_shutdown, iwn_pci_shutdown),
6512 DEVMETHOD(device_suspend, iwn_pci_suspend),
6513 DEVMETHOD(device_resume, iwn_pci_resume),
6517 static driver_t iwn_driver = {
6520 sizeof (struct iwn_softc)
6522 static devclass_t iwn_devclass;
6524 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, 0, 0);
6525 MODULE_DEPEND(iwn, pci, 1, 1, 1);
6526 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
6527 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
6528 MODULE_DEPEND(iwn, wlan_amrr, 1, 1, 1);