sys/net/i4b/layer2/i4b_l2fsm.c

   1 /*
   2  * Copyright (c) 1997, 2000 Hellmuth Michaelis. All rights reserved.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions
   6  * are met:
   7  * 1. Redistributions of source code must retain the above copyright
   8  *    notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  *    notice, this list of conditions and the following disclaimer in the
  11  *    documentation and/or other materials provided with the distribution.
  12  *
  13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  23  * SUCH DAMAGE.
  24  *
  25  *---------------------------------------------------------------------------
  26  *
  27  *      i4b_l2fsm.c - layer 2 FSM
  28  *      -------------------------
  29  *
  30  *      $Id: i4b_l2fsm.c,v 1.22 2000/08/24 11:48:58 hm Exp $
  31  *
  32  * $FreeBSD: src/sys/i4b/layer2/i4b_l2fsm.c,v 1.6.2.1 2001/08/10 14:08:41 obrien Exp $
  33  * $DragonFly: src/sys/net/i4b/layer2/i4b_l2fsm.c,v 1.7 2006/01/14 11:05:18 swildner Exp $
  34  *
  35  *      last edit-date: [Tue May 30 15:48:20 2000]
  36  *
  37  *---------------------------------------------------------------------------*/
  38
  39 #include "use_i4bq921.h"
  40 #if NI4BQ921 > 0
  41
  42 #include <sys/param.h>
  43 #include <sys/systm.h>
  44 #include <sys/socket.h>
  45 #include <net/if.h>
  46
  47 #include <net/i4b/include/machine/i4b_debug.h>
  48 #include <net/i4b/include/machine/i4b_ioctl.h>
  49
  50 #include "../include/i4b_global.h"
  51 #include "../include/i4b_l2l3.h"
  52 #include "../include/i4b_mbuf.h"
  53
  54 #include "i4b_l2.h"
  55 #include "i4b_l2fsm.h"
  56
  57 l2_softc_t l2_softc[MAXL1UNITS];
  58
  59 #if DO_I4B_DEBUG
  60 static char *l2state_text[N_STATES] = {
  61         "ST_TEI_UNAS",
  62         "ST_ASG_AW_TEI",
  63         "ST_EST_AW_TEI",
  64         "ST_TEI_ASGD",
  65
  66         "ST_AW_EST",
  67         "ST_AW_REL",
  68         "ST_MULTIFR",
  69         "ST_TIMREC",
  70
  71         "ST_SUBSET",
  72         "Illegal State"
  73 };
  74
  75 static char *l2event_text[N_EVENTS] = {
  76         "EV_DLESTRQ",
  77         "EV_DLUDTRQ",
  78         "EV_MDASGRQ",
  79         "EV_MDERRRS",
  80         "EV_PSDEACT",
  81         "EV_MDREMRQ",
  82         "EV_RXSABME",
  83         "EV_RXDISC",
  84         "EV_RXUA",
  85         "EV_RXDM",
  86         "EV_T200EXP",
  87         "EV_DLDATRQ",
  88         "EV_DLRELRQ",
  89         "EV_T203EXP",
  90         "EV_OWNBUSY",
  91         "EV_OWNRDY",
  92         "EV_RXRR",
  93         "EV_RXREJ",
  94         "EV_RXRNR",
  95         "EV_RXFRMR",
  96         "Illegal Event"
  97 };
  98 #endif
  99
 100 static void F_TU01 (l2_softc_t *);
 101 static void F_TU03 (l2_softc_t *);
 102
 103 static void F_TA03 (l2_softc_t *);
 104 static void F_TA04 (l2_softc_t *);
 105 static void F_TA05 (l2_softc_t *);
 106
 107 static void F_TE03 (l2_softc_t *);
 108 static void F_TE04 (l2_softc_t *);
 109 static void F_TE05 (l2_softc_t *);
 110
 111 static void F_T01 (l2_softc_t *);
 112 static void F_T05 (l2_softc_t *);
 113 static void F_T06 (l2_softc_t *);
 114 static void F_T07 (l2_softc_t *);
 115 static void F_T08 (l2_softc_t *);
 116 static void F_T09 (l2_softc_t *);
 117 static void F_T10 (l2_softc_t *);
 118 static void F_T13 (l2_softc_t *);
 119
 120 static void F_AE01 (l2_softc_t *);
 121 static void F_AE05 (l2_softc_t *);
 122 static void F_AE06 (l2_softc_t *);
 123 static void F_AE07 (l2_softc_t *);
 124 static void F_AE08 (l2_softc_t *);
 125 static void F_AE09 (l2_softc_t *);
 126 static void F_AE10 (l2_softc_t *);
 127 static void F_AE11 (l2_softc_t *);
 128 static void F_AE12 (l2_softc_t *);
 129
 130 static void F_AR05 (l2_softc_t *);
 131 static void F_AR06 (l2_softc_t *);
 132 static void F_AR07 (l2_softc_t *);
 133 static void F_AR08 (l2_softc_t *);
 134 static void F_AR09 (l2_softc_t *);
 135 static void F_AR10 (l2_softc_t *);
 136 static void F_AR11 (l2_softc_t *);
 137
 138 static void F_MF01 (l2_softc_t *);
 139 static void F_MF05 (l2_softc_t *);
 140 static void F_MF06 (l2_softc_t *);
 141 static void F_MF07 (l2_softc_t *);
 142 static void F_MF08 (l2_softc_t *);
 143 static void F_MF09 (l2_softc_t *);
 144 static void F_MF10 (l2_softc_t *);
 145 static void F_MF11 (l2_softc_t *);
 146 static void F_MF12 (l2_softc_t *);
 147 static void F_MF13 (l2_softc_t *);
 148 static void F_MF14 (l2_softc_t *);
 149 static void F_MF15 (l2_softc_t *);
 150 static void F_MF16 (l2_softc_t *);
 151 static void F_MF17 (l2_softc_t *);
 152 static void F_MF18 (l2_softc_t *);
 153 static void F_MF19 (l2_softc_t *);
 154 static void F_MF20 (l2_softc_t *);
 155
 156 static void F_TR01 (l2_softc_t *);
 157 static void F_TR05 (l2_softc_t *);
 158 static void F_TR06 (l2_softc_t *);
 159 static void F_TR07 (l2_softc_t *);
 160 static void F_TR08 (l2_softc_t *);
 161 static void F_TR09 (l2_softc_t *);
 162 static void F_TR10 (l2_softc_t *);
 163 static void F_TR11 (l2_softc_t *);
 164 static void F_TR12 (l2_softc_t *);
 165 static void F_TR13 (l2_softc_t *);
 166 static void F_TR15 (l2_softc_t *);
 167 static void F_TR16 (l2_softc_t *);
 168 static void F_TR17 (l2_softc_t *);
 169 static void F_TR18 (l2_softc_t *);
 170 static void F_TR19 (l2_softc_t *);
 171 static void F_TR20 (l2_softc_t *);
 172 static void F_ILL (l2_softc_t *);
 173 static void F_NCNA (l2_softc_t *);
 174
 175 /*---------------------------------------------------------------------------*
 176  *      FSM illegal state default action
 177  *---------------------------------------------------------------------------*/
 178 static void
 179 F_ILL(l2_softc_t *l2sc)
 180 {
 181         NDBGL2(L2_F_ERR, "FSM function F_ILL executing");
 182 }
 183
 184 /*---------------------------------------------------------------------------*
 185  *      FSM No change, No action
 186  *---------------------------------------------------------------------------*/
 187 static void
 188 F_NCNA(l2_softc_t *l2sc)
 189 {
 190         NDBGL2(L2_F_MSG, "FSM function F_NCNA executing");
 191 }
 192
 193 /*---------------------------------------------------------------------------*
 194  *      layer 2 state transition table
 195  *---------------------------------------------------------------------------*/
 196 struct l2state_tab {
 197         void (*func) (l2_softc_t *);    /* function to execute */
 198         int newstate;                           /* next state */
 199 } l2state_tab[N_EVENTS][N_STATES] = {
 200
 201 /* STATE:       ST_TEI_UNAS,                    ST_ASG_AW_TEI,                  ST_EST_AW_TEI,                  ST_TEI_ASGD,            ST_AW_EST,              ST_AW_REL,              ST_MULTIFR,             ST_TIMREC,              ST_SUBSET,              ILLEGAL STATE   */
 202 /* -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
 203 /*EV_DLESTRQ*/{ {F_TU01, ST_EST_AW_TEI},        {F_NCNA, ST_EST_AW_TEI},        {F_ILL, ST_ILL},                {F_T01, ST_AW_EST},     {F_AE01, ST_AW_EST},    {F_ILL, ST_ILL},        {F_MF01, ST_AW_EST},    {F_TR01, ST_AW_EST},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 204 /*EV_DLUDTRQ*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 205 /*EV_MDASGRQ*/{ {F_TU03, ST_TEI_ASGD},          {F_TA03, ST_TEI_ASGD},          {F_TE03, ST_AW_EST},            {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 206 /*EV_MDERRRS*/{ {F_ILL, ST_ILL},                {F_TA04, ST_TEI_UNAS},          {F_TE04, ST_TEI_UNAS},          {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 207 /*EV_PSDEACT*/{ {F_ILL, ST_ILL},                {F_TA05, ST_TEI_UNAS},          {F_TE05, ST_TEI_UNAS},          {F_T05, ST_TEI_ASGD},   {F_AE05, ST_TEI_ASGD},  {F_AR05, ST_TEI_ASGD},  {F_MF05, ST_TEI_ASGD},  {F_TR05, ST_TEI_ASGD},  {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 208 /*EV_MDREMRQ*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T06, ST_TEI_UNAS},   {F_AE06, ST_TEI_UNAS},  {F_AR06, ST_TEI_UNAS},  {F_MF06, ST_TEI_UNAS},  {F_TR06, ST_TEI_UNAS},  {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 209 /*EV_RXSABME*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T07, ST_SUBSET},     {F_AE07, ST_AW_EST},    {F_AR07, ST_AW_REL},    {F_MF07, ST_MULTIFR},   {F_TR07, ST_MULTIFR},   {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 210 /*EV_RXDISC */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T08, ST_TEI_ASGD},   {F_AE08, ST_AW_EST},    {F_AR08, ST_AW_REL},    {F_MF08, ST_TEI_ASGD},  {F_TR08, ST_TEI_ASGD},  {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 211 /*EV_RXUA   */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T09, ST_TEI_ASGD},   {F_AE09, ST_SUBSET},    {F_AR09, ST_SUBSET},    {F_MF09, ST_MULTIFR},   {F_TR09, ST_TIMREC},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 212 /*EV_RXDM   */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T10, ST_SUBSET},     {F_AE10, ST_SUBSET},    {F_AR10, ST_SUBSET},    {F_MF10, ST_SUBSET},    {F_TR10, ST_AW_EST},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 213 /*EV_T200EXP*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_AE11, ST_SUBSET},    {F_AR11, ST_SUBSET},    {F_MF11, ST_TIMREC},    {F_TR11, ST_SUBSET},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 214 /*EV_DLDATRQ*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_AE12, ST_AW_EST},    {F_ILL, ST_ILL},        {F_MF12, ST_MULTIFR},   {F_TR12, ST_TIMREC},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 215 /*EV_DLRELRQ*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T13, ST_TEI_ASGD},   {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF13, ST_AW_REL},    {F_TR13, ST_AW_REL},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 216 /*EV_T203EXP*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF14, ST_TIMREC},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 217 /*EV_OWNBUSY*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF15, ST_MULTIFR},   {F_TR15, ST_TIMREC},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 218 /*EV_OWNRDY */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF16, ST_MULTIFR},   {F_TR16, ST_TIMREC},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 219 /*EV_RXRR   */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF17, ST_SUBSET},    {F_TR17, ST_SUBSET},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 220 /*EV_RXREJ  */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF18, ST_SUBSET},    {F_TR18, ST_SUBSET},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 221 /*EV_RXRNR  */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF19, ST_SUBSET},    {F_TR19, ST_SUBSET},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 222 /*EV_RXFRMR */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF20, ST_AW_EST},    {F_TR20, ST_AW_EST},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
 223 /*EV_ILL    */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL} }
 224 };
 225
 226 /*---------------------------------------------------------------------------*
 227  *      event handler, executes function and sets new state
 228  *---------------------------------------------------------------------------*/
 229 void
 230 i4b_next_l2state(l2_softc_t *l2sc, int event)
 231 {
 232         int currstate, newstate;
 233         int (*savpostfsmfunc)(int) = NULL;
 234
 235         /* check event number */
 236         if(event > N_EVENTS)
 237                 panic("i4b_l2fsm.c: event > N_EVENTS\n");
 238
 239         /* get current state and check it */
 240         if((currstate = l2sc->Q921_state) > N_STATES)   /* failsafe */
 241                 panic("i4b_l2fsm.c: currstate > N_STATES\n");
 242
 243         /* get new state and check it */
 244         if((newstate = l2state_tab[event][currstate].newstate) > N_STATES)
 245                 panic("i4b_l2fsm.c: newstate > N_STATES\n");
 246
 247
 248         if(newstate != ST_SUBSET)
 249         {       /* state function does NOT set new state */
 250                 NDBGL2(L2_F_MSG, "FSM event [%s]: [%s/%d => %s/%d]",
 251                                 l2event_text[event],
 252                                 l2state_text[currstate], currstate,
 253                                 l2state_text[newstate], newstate);
 254         }
 255
 256         /* execute state transition function */
 257         (*l2state_tab[event][currstate].func)(l2sc);
 258
 259         if(newstate == ST_SUBSET)
 260         {       /* state function DOES set new state */
 261                 NDBGL2(L2_F_MSG, "FSM S-event [%s]: [%s => %s]", l2event_text[event],
 262                                            l2state_text[currstate],
 263                                            l2state_text[l2sc->Q921_state]);
 264         }
 265
 266         /* check for illegal new state */
 267
 268         if(newstate == ST_ILL)
 269         {
 270                 newstate = currstate;
 271                 NDBGL2(L2_F_ERR, "FSM illegal state, state = %s, event = %s!",
 272                                 l2state_text[currstate],
 273                                 l2event_text[event]);
 274         }
 275
 276         /* check if state machine function has to set new state */
 277
 278         if(newstate != ST_SUBSET)
 279                 l2sc->Q921_state = newstate;        /* no, we set new state */
 280
 281         if(l2sc->postfsmfunc != NULL)
 282         {
 283                 NDBGL2(L2_F_MSG, "FSM executing postfsmfunc!");
 284                 /* try to avoid an endless loop */
 285                 savpostfsmfunc = l2sc->postfsmfunc;
 286                 l2sc->postfsmfunc = NULL;
 287                 (*savpostfsmfunc)(l2sc->postfsmarg);
 288         }
 289 }
 290
 291 #if DO_I4B_DEBUG
 292 /*---------------------------------------------------------------------------*
 293  *      return pointer to current state description
 294  *---------------------------------------------------------------------------*/
 295 char *
 296 i4b_print_l2state(l2_softc_t *l2sc)
 297 {
 298         return((char *) l2state_text[l2sc->Q921_state]);
 299 }
 300 #endif
 301
 302 /*---------------------------------------------------------------------------*
 303  *      FSM state ST_TEI_UNAS event dl establish request
 304  *---------------------------------------------------------------------------*/
 305 static void
 306 F_TU01(l2_softc_t *l2sc)
 307 {
 308         NDBGL2(L2_F_MSG, "FSM function F_TU01 executing");
 309         i4b_mdl_assign_ind(l2sc);
 310 }
 311
 312 /*---------------------------------------------------------------------------*
 313  *      FSM state ST_TEI_UNAS event mdl assign request
 314  *---------------------------------------------------------------------------*/
 315 static void
 316 F_TU03(l2_softc_t *l2sc)
 317 {
 318         NDBGL2(L2_F_MSG, "FSM function F_TU03 executing");
 319 }
 320
 321 /*---------------------------------------------------------------------------*
 322  *      FSM state ST_ASG_AW_TEI event mdl assign request
 323  *---------------------------------------------------------------------------*/
 324 static void
 325 F_TA03(l2_softc_t *l2sc)
 326 {
 327         NDBGL2(L2_F_MSG, "FSM function F_TA03 executing");
 328 }
 329
 330 /*---------------------------------------------------------------------------*
 331  *      FSM state ST_ASG_AW_TEI event mdl error response
 332  *---------------------------------------------------------------------------*/
 333 static void
 334 F_TA04(l2_softc_t *l2sc)
 335 {
 336         NDBGL2(L2_F_MSG, "FSM function F_TA04 executing");
 337 }
 338
 339 /*---------------------------------------------------------------------------*
 340  *      FSM state ST_ASG_AW_TEI event persistent deactivation
 341  *---------------------------------------------------------------------------*/
 342 static void
 343 F_TA05(l2_softc_t *l2sc)
 344 {
 345         NDBGL2(L2_F_MSG, "FSM function F_TA05 executing");
 346 }
 347
 348 /*---------------------------------------------------------------------------*
 349  *      FSM state ST_EST_AW_TEI event mdl assign request
 350  *---------------------------------------------------------------------------*/
 351 static void
 352 F_TE03(l2_softc_t *l2sc)
 353 {
 354         NDBGL2(L2_F_MSG, "FSM function F_TE03 executing");
 355         i4b_establish_data_link(l2sc);
 356         l2sc->l3initiated = 1;
 357 }
 358
 359 /*---------------------------------------------------------------------------*
 360  *      FSM state ST_EST_AW_TEI event mdl error response
 361  *---------------------------------------------------------------------------*/
 362 static void
 363 F_TE04(l2_softc_t *l2sc)
 364 {
 365         NDBGL2(L2_F_MSG, "FSM function F_TE04 executing");
 366         l2sc->postfsmarg = l2sc->unit;
 367         l2sc->postfsmfunc = DL_Rel_Ind_A;
 368 }
 369
 370 /*---------------------------------------------------------------------------*
 371  *      FSM state ST_EST_AW_TEI event persistent deactivation
 372  *---------------------------------------------------------------------------*/
 373 static void
 374 F_TE05(l2_softc_t *l2sc)
 375 {
 376         NDBGL2(L2_F_MSG, "FSM function F_TE05 executing");
 377         l2sc->postfsmarg = l2sc->unit;
 378         l2sc->postfsmfunc = DL_Rel_Ind_A;
 379 }
 380
 381 /*---------------------------------------------------------------------------*
 382  *      FSM state ST_TEI_ASGD event dl establish request
 383  *---------------------------------------------------------------------------*/
 384 static void
 385 F_T01(l2_softc_t *l2sc)
 386 {
 387         NDBGL2(L2_F_MSG, "FSM function F_T01 executing");
 388         i4b_establish_data_link(l2sc);
 389         l2sc->l3initiated = 1;
 390 }
 391
 392 /*---------------------------------------------------------------------------*
 393  *      FSM state ST_TEI_ASGD event persistent deactivation
 394  *---------------------------------------------------------------------------*/
 395 static void
 396 F_T05(l2_softc_t *l2sc)
 397 {
 398         NDBGL2(L2_F_MSG, "FSM function F_T05 executing");
 399 }
 400
 401 /*---------------------------------------------------------------------------*
 402  *      FSM state ST_TEI_ASGD event mdl remove request
 403  *---------------------------------------------------------------------------*/
 404 static void
 405 F_T06(l2_softc_t *l2sc)
 406 {
 407         NDBGL2(L2_F_MSG, "FSM function F_T06 executing");
 408 /*XXX*/ i4b_mdl_assign_ind(l2sc);
 409 }
 410
 411 /*---------------------------------------------------------------------------*
 412  *      FSM state ST_TEI_ASGD event rx'd SABME
 413  *---------------------------------------------------------------------------*/
 414 static void
 415 F_T07(l2_softc_t *l2sc)
 416 {
 417         NDBGL2(L2_F_MSG, "FSM function F_T07 executing");
 418
 419 /* XXX */
 420 #ifdef NOTDEF
 421         if(NOT able to establish)
 422         {
 423                 i4b_tx_dm(l2sc, l2sc->rxd_PF);
 424                 l2sc->Q921_state = ST_TEI_ASGD;
 425                 return;
 426         }
 427 #endif
 428
 429         i4b_clear_exception_conditions(l2sc);
 430
 431         MDL_Status_Ind(l2sc->unit, STI_L2STAT, LAYER_ACTIVE);
 432
 433         i4b_tx_ua(l2sc, l2sc->rxd_PF);
 434
 435         l2sc->vs = 0;
 436         l2sc->va = 0;
 437         l2sc->vr = 0;
 438
 439         l2sc->postfsmarg = l2sc->unit;
 440         l2sc->postfsmfunc = DL_Est_Ind_A;
 441
 442         i4b_T203_start(l2sc);
 443
 444         l2sc->Q921_state = ST_MULTIFR;
 445 }
 446
 447 /*---------------------------------------------------------------------------*
 448  *      FSM state ST_TEI_ASGD event rx'd DISC
 449  *---------------------------------------------------------------------------*/
 450 static void
 451 F_T08(l2_softc_t *l2sc)
 452 {
 453         NDBGL2(L2_F_MSG, "FSM function F_T08 executing");
 454         MDL_Status_Ind(l2sc->unit, STI_L2STAT, LAYER_IDLE);
 455         i4b_tx_ua(l2sc, l2sc->rxd_PF);
 456 }
 457
 458 /*---------------------------------------------------------------------------*
 459  *      FSM state ST_TEI_ASGD event rx'd UA
 460  *---------------------------------------------------------------------------*/
 461 static void
 462 F_T09(l2_softc_t *l2sc)
 463 {
 464         NDBGL2(L2_F_MSG, "FSM function F_T09 executing");
 465         i4b_mdl_error_ind(l2sc, "F_T09", MDL_ERR_C);
 466         i4b_mdl_error_ind(l2sc, "F_T09", MDL_ERR_D);
 467 }
 468
 469 /*---------------------------------------------------------------------------*
 470  *      FSM state ST_TEI_ASGD event rx'd DM
 471  *---------------------------------------------------------------------------*/
 472 static void
 473 F_T10(l2_softc_t *l2sc)
 474 {
 475         NDBGL2(L2_F_MSG, "FSM function F_T10 executing");
 476
 477         if(l2sc->rxd_PF)
 478         {
 479                 l2sc->Q921_state = ST_TEI_ASGD;
 480         }
 481         else
 482         {
 483 #ifdef NOTDEF
 484                 if(NOT able_to_etablish)
 485                 {
 486                         l2sc->Q921_state = ST_TEI_ASGD;
 487                         return;
 488                 }
 489 #endif
 490                 i4b_establish_data_link(l2sc);
 491
 492                 l2sc->l3initiated = 1;
 493
 494                 l2sc->Q921_state = ST_AW_EST;
 495         }
 496 }
 497
 498 /*---------------------------------------------------------------------------*
 499  *      FSM state ST_TEI_ASGD event dl release request
 500  *---------------------------------------------------------------------------*/
 501 static void
 502 F_T13(l2_softc_t *l2sc)
 503 {
 504         NDBGL2(L2_F_MSG, "FSM function F_T13 executing");
 505         l2sc->postfsmarg = l2sc->unit;
 506         l2sc->postfsmfunc = DL_Rel_Cnf_A;
 507 }
 508
 509 /*---------------------------------------------------------------------------*
 510  *      FSM state ST_AW_EST event dl establish request
 511  *---------------------------------------------------------------------------*/
 512 static void
 513 F_AE01(l2_softc_t *l2sc)
 514 {
 515         NDBGL2(L2_F_MSG, "FSM function F_AE01 executing");
 516
 517         i4b_Dcleanifq(&l2sc->i_queue);
 518
 519         l2sc->l3initiated = 1;
 520 }
 521
 522 /*---------------------------------------------------------------------------*
 523  *      FSM state ST_AW_EST event persistent deactivation
 524  *---------------------------------------------------------------------------*/
 525 static void
 526 F_AE05(l2_softc_t *l2sc)
 527 {
 528         NDBGL2(L2_F_MSG, "FSM function F_AE05 executing");
 529
 530         i4b_Dcleanifq(&l2sc->i_queue);
 531
 532         l2sc->postfsmarg = l2sc->unit;
 533         l2sc->postfsmfunc = DL_Rel_Ind_A;
 534
 535         i4b_T200_stop(l2sc);
 536 }
 537
 538 /*---------------------------------------------------------------------------*
 539  *      FSM state ST_AW_EST event mdl remove request
 540  *---------------------------------------------------------------------------*/
 541 static void
 542 F_AE06(l2_softc_t *l2sc)
 543 {
 544         NDBGL2(L2_F_MSG, "FSM function F_AE06 executing");
 545
 546         i4b_Dcleanifq(&l2sc->i_queue);
 547
 548         l2sc->postfsmarg = l2sc->unit;
 549         l2sc->postfsmfunc = DL_Rel_Ind_A;
 550
 551         i4b_T200_stop(l2sc);
 552
 553 /*XXX*/ i4b_mdl_assign_ind(l2sc);
 554 }
 555
 556 /*---------------------------------------------------------------------------*
 557  *      FSM state ST_AW_EST event rx'd SABME
 558  *---------------------------------------------------------------------------*/
 559 static void
 560 F_AE07(l2_softc_t *l2sc)
 561 {
 562         NDBGL2(L2_F_MSG, "FSM function F_AE07 executing");
 563         MDL_Status_Ind(l2sc->unit, STI_L2STAT, LAYER_ACTIVE);
 564         i4b_tx_ua(l2sc, l2sc->rxd_PF);
 565 }
 566
 567 /*---------------------------------------------------------------------------*
 568  *      FSM state ST_AW_EST event rx'd DISC
 569  *---------------------------------------------------------------------------*/
 570 static void
 571 F_AE08(l2_softc_t *l2sc)
 572 {
 573         NDBGL2(L2_F_MSG, "FSM function F_AE08 executing");
 574         i4b_tx_dm(l2sc, l2sc->rxd_PF);
 575 }
 576
 577 /*---------------------------------------------------------------------------*
 578  *      FSM state ST_AW_EST event rx'd UA
 579  *---------------------------------------------------------------------------*/
 580 static void
 581 F_AE09(l2_softc_t *l2sc)
 582 {
 583         NDBGL2(L2_F_MSG, "FSM function F_AE09 executing");
 584
 585         if(l2sc->rxd_PF == 0)
 586         {
 587                 i4b_mdl_error_ind(l2sc, "F_AE09", MDL_ERR_D);
 588                 l2sc->Q921_state = ST_AW_EST;
 589         }
 590         else
 591         {
 592                 if(l2sc->l3initiated)
 593                 {
 594                         l2sc->l3initiated = 0;
 595                         l2sc->vr = 0;
 596                         l2sc->postfsmarg = l2sc->unit;
 597                         l2sc->postfsmfunc = DL_Est_Cnf_A;
 598                 }
 599                 else
 600                 {
 601                         if(l2sc->vs != l2sc->va)
 602                         {
 603                                 i4b_Dcleanifq(&l2sc->i_queue);
 604                                 l2sc->postfsmarg = l2sc->unit;
 605                                 l2sc->postfsmfunc = DL_Est_Ind_A;
 606                         }
 607                 }
 608
 609                 MDL_Status_Ind(l2sc->unit, STI_L2STAT, LAYER_ACTIVE);
 610
 611                 i4b_T200_stop(l2sc);
 612                 i4b_T203_start(l2sc);
 613
 614                 l2sc->vs = 0;
 615                 l2sc->va = 0;
 616
 617                 l2sc->Q921_state = ST_MULTIFR;
 618         }
 619 }
 620
 621 /*---------------------------------------------------------------------------*
 622  *      FSM state ST_AW_EST event rx'd DM
 623  *---------------------------------------------------------------------------*/
 624 static void
 625 F_AE10(l2_softc_t *l2sc)
 626 {
 627         NDBGL2(L2_F_MSG, "FSM function F_AE10 executing");
 628
 629         if(l2sc->rxd_PF == 0)
 630         {
 631                 l2sc->Q921_state = ST_AW_EST;
 632         }
 633         else
 634         {
 635                 i4b_Dcleanifq(&l2sc->i_queue);
 636
 637                 l2sc->postfsmarg = l2sc->unit;
 638                 l2sc->postfsmfunc = DL_Rel_Ind_A;
 639
 640                 i4b_T200_stop(l2sc);
 641
 642                 l2sc->Q921_state = ST_TEI_ASGD;
 643         }
 644 }
 645
 646 /*---------------------------------------------------------------------------*
 647  *      FSM state ST_AW_EST event T200 expiry
 648  *---------------------------------------------------------------------------*/
 649 static void
 650 F_AE11(l2_softc_t *l2sc)
 651 {
 652         NDBGL2(L2_F_MSG, "FSM function F_AE11 executing");
 653
 654         if(l2sc->RC >= N200)
 655         {
 656                 i4b_Dcleanifq(&l2sc->i_queue);
 657
 658                 i4b_mdl_error_ind(l2sc, "F_AE11", MDL_ERR_G);
 659
 660                 l2sc->postfsmarg = l2sc->unit;
 661                 l2sc->postfsmfunc = DL_Rel_Ind_A;
 662
 663                 l2sc->Q921_state = ST_TEI_ASGD;
 664         }
 665         else
 666         {
 667                 l2sc->RC++;
 668
 669                 i4b_tx_sabme(l2sc, P1);
 670
 671                 i4b_T200_start(l2sc);
 672
 673                 l2sc->Q921_state = ST_AW_EST;
 674         }
 675 }
 676
 677 /*---------------------------------------------------------------------------*
 678  *      FSM state ST_AW_EST event dl data request
 679  *---------------------------------------------------------------------------*/
 680 static void
 681 F_AE12(l2_softc_t *l2sc)
 682 {
 683         NDBGL2(L2_F_MSG, "FSM function F_AE12 executing");
 684
 685         if(l2sc->l3initiated == 0)
 686         {
 687                 i4b_i_frame_queued_up(l2sc);
 688         }
 689 }
 690
 691 /*---------------------------------------------------------------------------*
 692  *      FSM state ST_AW_REL event persistent deactivation
 693  *---------------------------------------------------------------------------*/
 694 static void
 695 F_AR05(l2_softc_t *l2sc)
 696 {
 697         NDBGL2(L2_F_MSG, "FSM function F_AR05 executing");
 698
 699         l2sc->postfsmarg = l2sc->unit;
 700         l2sc->postfsmfunc = DL_Rel_Cnf_A;
 701
 702         i4b_T200_stop(l2sc);
 703 }
 704
 705 /*---------------------------------------------------------------------------*
 706  *      FSM state ST_AW_REL event mdl remove request
 707  *---------------------------------------------------------------------------*/
 708 static void
 709 F_AR06(l2_softc_t *l2sc)
 710 {
 711         NDBGL2(L2_F_MSG, "FSM function F_AR06 executing");
 712
 713         l2sc->postfsmarg = l2sc->unit;
 714         l2sc->postfsmfunc = DL_Rel_Cnf_A;
 715
 716         i4b_T200_stop(l2sc);
 717
 718 /*XXX*/ i4b_mdl_assign_ind(l2sc);
 719 }
 720
 721 /*---------------------------------------------------------------------------*
 722  *      FSM state ST_AW_REL event rx'd SABME
 723  *---------------------------------------------------------------------------*/
 724 static void
 725 F_AR07(l2_softc_t *l2sc)
 726 {
 727         NDBGL2(L2_F_MSG, "FSM function F_AR07 executing");
 728         i4b_tx_dm(l2sc, l2sc->rxd_PF);
 729 }
 730
 731 /*---------------------------------------------------------------------------*
 732  *      FSM state ST_AW_REL event rx'd DISC
 733  *---------------------------------------------------------------------------*/
 734 static void
 735 F_AR08(l2_softc_t *l2sc)
 736 {
 737         NDBGL2(L2_F_MSG, "FSM function F_AR08 executing");
 738         MDL_Status_Ind(l2sc->unit, STI_L2STAT, LAYER_IDLE);
 739         i4b_tx_ua(l2sc, l2sc->rxd_PF);
 740 }
 741
 742 /*---------------------------------------------------------------------------*
 743  *      FSM state ST_AW_REL event rx'd UA
 744  *---------------------------------------------------------------------------*/
 745 static void
 746 F_AR09(l2_softc_t *l2sc)
 747 {
 748         NDBGL2(L2_F_MSG, "FSM function F_AR09 executing");
 749
 750         if(l2sc->rxd_PF)
 751         {
 752                 l2sc->postfsmarg = l2sc->unit;
 753                 l2sc->postfsmfunc = DL_Rel_Cnf_A;
 754
 755                 i4b_T200_stop(l2sc);
 756
 757                 l2sc->Q921_state = ST_TEI_ASGD;
 758         }
 759         else
 760         {
 761                 i4b_mdl_error_ind(l2sc, "F_AR09", MDL_ERR_D);
 762
 763                 l2sc->Q921_state = ST_AW_REL;
 764         }
 765 }
 766
 767 /*---------------------------------------------------------------------------*
 768  *      FSM state ST_AW_REL event rx'd DM
 769  *---------------------------------------------------------------------------*/
 770 static void
 771 F_AR10(l2_softc_t *l2sc)
 772 {
 773         NDBGL2(L2_F_MSG, "FSM function F_AR10 executing");
 774
 775         if(l2sc->rxd_PF)
 776         {
 777                 l2sc->postfsmarg = l2sc->unit;
 778                 l2sc->postfsmfunc = DL_Rel_Cnf_A;
 779
 780                 i4b_T200_stop(l2sc);
 781
 782                 l2sc->Q921_state = ST_TEI_ASGD;
 783         }
 784         else
 785         {
 786                 l2sc->Q921_state = ST_AW_REL;
 787         }
 788 }
 789
 790 /*---------------------------------------------------------------------------*
 791  *      FSM state ST_AW_REL event T200 expiry
 792  *---------------------------------------------------------------------------*/
 793 static void
 794 F_AR11(l2_softc_t *l2sc)
 795 {
 796         NDBGL2(L2_F_MSG, "FSM function F_AR11 executing");
 797
 798         if(l2sc->RC >= N200)
 799         {
 800                 i4b_mdl_error_ind(l2sc, "F_AR11", MDL_ERR_H);
 801
 802                 l2sc->postfsmarg = l2sc->unit;
 803                 l2sc->postfsmfunc = DL_Rel_Cnf_A;
 804
 805                 l2sc->Q921_state = ST_TEI_ASGD;
 806         }
 807         else
 808         {
 809                 l2sc->RC++;
 810
 811                 i4b_tx_disc(l2sc, P1);
 812
 813                 i4b_T200_start(l2sc);
 814
 815                 l2sc->Q921_state = ST_AW_REL;
 816         }
 817 }
 818
 819 /*---------------------------------------------------------------------------*
 820  *      FSM state ST_MULTIFR event dl establish request
 821  *---------------------------------------------------------------------------*/
 822 static void
 823 F_MF01(l2_softc_t *l2sc)
 824 {
 825         NDBGL2(L2_F_MSG, "FSM function F_MF01 executing");
 826
 827         i4b_Dcleanifq(&l2sc->i_queue);
 828
 829         i4b_establish_data_link(l2sc);
 830
 831         l2sc->l3initiated = 1;
 832 }
 833
 834 /*---------------------------------------------------------------------------*
 835  *      FSM state ST_MULTIFR event persistent deactivation
 836  *---------------------------------------------------------------------------*/
 837 static void
 838 F_MF05(l2_softc_t *l2sc)
 839 {
 840         NDBGL2(L2_F_MSG, "FSM function F_MF05 executing");
 841
 842         i4b_Dcleanifq(&l2sc->i_queue);
 843
 844         l2sc->postfsmarg = l2sc->unit;
 845         l2sc->postfsmfunc = DL_Rel_Ind_A;
 846
 847         i4b_T200_stop(l2sc);
 848         i4b_T203_stop(l2sc);
 849 }
 850
 851 /*---------------------------------------------------------------------------*
 852  *      FSM state ST_MULTIFR event mdl remove request
 853  *---------------------------------------------------------------------------*/
 854 static void
 855 F_MF06(l2_softc_t *l2sc)
 856 {
 857         NDBGL2(L2_F_MSG, "FSM function F_MF06 executing");
 858
 859         i4b_Dcleanifq(&l2sc->i_queue);
 860
 861         l2sc->postfsmarg = l2sc->unit;
 862         l2sc->postfsmfunc = DL_Rel_Ind_A;
 863
 864         i4b_T200_stop(l2sc);
 865         i4b_T203_stop(l2sc);
 866
 867 /*XXX*/ i4b_mdl_assign_ind(l2sc);
 868 }
 869
 870 /*---------------------------------------------------------------------------*
 871  *      FSM state ST_MULTIFR event rx'd SABME
 872  *---------------------------------------------------------------------------*/
 873 static void
 874 F_MF07(l2_softc_t *l2sc)
 875 {
 876         NDBGL2(L2_F_MSG, "FSM function F_MF07 executing");
 877
 878         i4b_clear_exception_conditions(l2sc);
 879
 880         MDL_Status_Ind(l2sc->unit, STI_L2STAT, LAYER_ACTIVE);
 881
 882         i4b_tx_ua(l2sc, l2sc->rxd_PF);
 883
 884         i4b_mdl_error_ind(l2sc, "F_MF07", MDL_ERR_F);
 885
 886         if(l2sc->vs != l2sc->va)
 887         {
 888                 i4b_Dcleanifq(&l2sc->i_queue);
 889
 890                 l2sc->postfsmarg = l2sc->unit;
 891                 l2sc->postfsmfunc = DL_Est_Ind_A;
 892         }
 893
 894         i4b_T200_stop(l2sc);
 895         i4b_T203_start(l2sc);
 896
 897         l2sc->vs = 0;
 898         l2sc->va = 0;
 899         l2sc->vr = 0;
 900 }
 901
 902 /*---------------------------------------------------------------------------*
 903  *      FSM state ST_MULTIFR event rx'd DISC
 904  *---------------------------------------------------------------------------*/
 905 static void
 906 F_MF08(l2_softc_t *l2sc)
 907 {
 908         NDBGL2(L2_F_MSG, "FSM function F_MF08 executing");
 909
 910         i4b_Dcleanifq(&l2sc->i_queue);
 911         MDL_Status_Ind(l2sc->unit, STI_L2STAT, LAYER_IDLE);
 912         i4b_tx_ua(l2sc, l2sc->rxd_PF);
 913
 914         l2sc->postfsmarg = l2sc->unit;
 915         l2sc->postfsmfunc = DL_Rel_Ind_A;
 916
 917         i4b_T200_stop(l2sc);
 918         i4b_T203_stop(l2sc);
 919 }
 920
 921 /*---------------------------------------------------------------------------*
 922  *      FSM state ST_MULTIFR event rx'd UA
 923  *---------------------------------------------------------------------------*/
 924 static void
 925 F_MF09(l2_softc_t *l2sc)
 926 {
 927         NDBGL2(L2_F_MSG, "FSM function F_MF09 executing");
 928         if(l2sc->rxd_PF)
 929                 i4b_mdl_error_ind(l2sc, "F_MF09", MDL_ERR_C);
 930         else
 931                 i4b_mdl_error_ind(l2sc, "F_MF09", MDL_ERR_D);
 932 }
 933
 934 /*---------------------------------------------------------------------------*
 935  *      FSM state ST_MULTIFR event rx'd DM
 936  *---------------------------------------------------------------------------*/
 937 static void
 938 F_MF10(l2_softc_t *l2sc)
 939 {
 940         NDBGL2(L2_F_MSG, "FSM function F_MF10 executing");
 941
 942         if(l2sc->rxd_PF)
 943         {
 944                 i4b_mdl_error_ind(l2sc, "F_MF10", MDL_ERR_B);
 945
 946                 l2sc->Q921_state = ST_MULTIFR;
 947         }
 948         else
 949         {
 950                 i4b_mdl_error_ind(l2sc, "F_MF10", MDL_ERR_E);
 951
 952                 i4b_establish_data_link(l2sc);
 953
 954                 l2sc->l3initiated = 0;
 955
 956                 l2sc->Q921_state = ST_AW_EST;
 957         }
 958 }
 959
 960 /*---------------------------------------------------------------------------*
 961  *      FSM state ST_MULTIFR event T200 expiry
 962  *---------------------------------------------------------------------------*/
 963 static void
 964 F_MF11(l2_softc_t *l2sc)
 965 {
 966         NDBGL2(L2_F_MSG, "FSM function F_MF11 executing");
 967
 968         l2sc->RC = 0;
 969
 970         i4b_transmit_enquire(l2sc);
 971
 972         l2sc->RC++;
 973 }
 974
 975 /*---------------------------------------------------------------------------*
 976  *      FSM state ST_MULTIFR event dl data request
 977  *---------------------------------------------------------------------------*/
 978 static void
 979 F_MF12(l2_softc_t *l2sc)
 980 {
 981         NDBGL2(L2_F_MSG, "FSM function F_MF12 executing");
 982
 983         i4b_i_frame_queued_up(l2sc);
 984 }
 985
 986 /*---------------------------------------------------------------------------*
 987  *      FSM state ST_MULTIFR event dl release request
 988  *---------------------------------------------------------------------------*/
 989 static void
 990 F_MF13(l2_softc_t *l2sc)
 991 {
 992         NDBGL2(L2_F_MSG, "FSM function F_MF13 executing");
 993
 994         i4b_Dcleanifq(&l2sc->i_queue);
 995
 996         l2sc->RC = 0;
 997
 998         i4b_tx_disc(l2sc, P1);
 999
1000         i4b_T203_stop(l2sc);
1001         i4b_T200_restart(l2sc);
1002 }
1003
1004 /*---------------------------------------------------------------------------*
1005  *      FSM state ST_MULTIFR event T203 expiry
1006  *---------------------------------------------------------------------------*/
1007 static void
1008 F_MF14(l2_softc_t *l2sc)
1009 {
1010         NDBGL2(L2_F_MSG, "FSM function F_MF14 executing");
1011
1012         i4b_transmit_enquire(l2sc);
1013
1014         l2sc->RC = 0;
1015 }
1016
1017 /*---------------------------------------------------------------------------*
1018  *      FSM state ST_MULTIFR event set own rx busy
1019  *---------------------------------------------------------------------------*/
1020 static void
1021 F_MF15(l2_softc_t *l2sc)
1022 {
1023         NDBGL2(L2_F_MSG, "FSM function F_MF15 executing");
1024
1025         if(l2sc->own_busy == 0)
1026         {
1027                 l2sc->own_busy = 1;
1028
1029                 i4b_tx_rnr_response(l2sc, F0); /* wrong in Q.921 03/93 p 64 */
1030
1031                 l2sc->ack_pend = 0;
1032         }
1033 }
1034
1035 /*---------------------------------------------------------------------------*
1036  *      FSM state ST_MULTIFR event clear own rx busy
1037  *---------------------------------------------------------------------------*/
1038 static void
1039 F_MF16(l2_softc_t *l2sc)
1040 {
1041         NDBGL2(L2_F_MSG, "FSM function F_MF16 executing");
1042
1043         if(l2sc->own_busy != 0)
1044         {
1045                 l2sc->own_busy = 0;
1046
1047                 i4b_tx_rr_response(l2sc, F0); /* wrong in Q.921 03/93 p 64 */
1048
1049                 l2sc->ack_pend = 0;
1050         }
1051 }
1052
1053 /*---------------------------------------------------------------------------*
1054  *      FSM state ST_MULTIFR event rx'd RR
1055  *---------------------------------------------------------------------------*/
1056 static void
1057 F_MF17(l2_softc_t *l2sc)
1058 {
1059         NDBGL2(L2_F_MSG, "FSM function F_MF17 executing");
1060
1061         l2sc->peer_busy = 0;
1062
1063         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
1064         {
1065                 if(l2sc->rxd_PF == 1)
1066                 {
1067                         i4b_enquiry_response(l2sc);
1068                 }
1069         }
1070         else
1071         {
1072                 if(l2sc->rxd_PF == 1)
1073                 {
1074                         i4b_mdl_error_ind(l2sc, "F_MF17", MDL_ERR_A);
1075                 }
1076         }
1077
1078         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
1079         {
1080                 if(l2sc->rxd_NR == l2sc->vs)
1081                 {
1082                         l2sc->va = l2sc->rxd_NR;
1083                         i4b_T200_stop(l2sc);
1084                         i4b_T203_restart(l2sc);
1085                 }
1086                 else if(l2sc->rxd_NR != l2sc->va)
1087                 {
1088                         l2sc->va = l2sc->rxd_NR;
1089                         i4b_T200_restart(l2sc);
1090                 }
1091                 l2sc->Q921_state = ST_MULTIFR;
1092         }
1093         else
1094         {
1095                 i4b_nr_error_recovery(l2sc);
1096                 l2sc->Q921_state = ST_AW_EST;
1097         }
1098 }
1099
1100 /*---------------------------------------------------------------------------*
1101  *      FSM state ST_MULTIFR event rx'd REJ
1102  *---------------------------------------------------------------------------*/
1103 static void
1104 F_MF18(l2_softc_t *l2sc)
1105 {
1106         NDBGL2(L2_F_MSG, "FSM function F_MF18 executing");
1107
1108         l2sc->peer_busy = 0;
1109
1110         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
1111         {
1112                 if(l2sc->rxd_PF == 1)
1113                 {
1114                         i4b_enquiry_response(l2sc);
1115                 }
1116         }
1117         else
1118         {
1119                 if(l2sc->rxd_PF == 1)
1120                 {
1121                         i4b_mdl_error_ind(l2sc, "F_MF18", MDL_ERR_A);
1122                 }
1123         }
1124
1125         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
1126         {
1127                 l2sc->va = l2sc->rxd_NR;
1128                 i4b_T200_stop(l2sc);
1129                 i4b_T203_start(l2sc);
1130                 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR);
1131                 l2sc->Q921_state = ST_MULTIFR;
1132         }
1133         else
1134         {
1135                 i4b_nr_error_recovery(l2sc);
1136                 l2sc->Q921_state = ST_AW_EST;
1137         }
1138 }
1139
1140 /*---------------------------------------------------------------------------*
1141  *      FSM state ST_MULTIFR event rx'd RNR
1142  *---------------------------------------------------------------------------*/
1143 static void
1144 F_MF19(l2_softc_t *l2sc)
1145 {
1146         NDBGL2(L2_F_MSG, "FSM function F_MF19 executing");
1147
1148         l2sc->peer_busy = 1;
1149
1150         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
1151         {
1152                 if(l2sc->rxd_PF == 1)
1153                 {
1154                         i4b_enquiry_response(l2sc);
1155                 }
1156         }
1157         else
1158         {
1159                 if(l2sc->rxd_PF == 1)
1160                 {
1161                         i4b_mdl_error_ind(l2sc, "F_MF19", MDL_ERR_A);
1162                 }
1163         }
1164
1165         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
1166         {
1167                 l2sc->va = l2sc->rxd_NR;
1168                 i4b_T203_stop(l2sc);
1169                 i4b_T200_restart(l2sc);
1170                 l2sc->Q921_state = ST_MULTIFR;
1171         }
1172         else
1173         {
1174                 i4b_nr_error_recovery(l2sc);
1175                 l2sc->Q921_state = ST_AW_EST;
1176         }
1177 }
1178
1179 /*---------------------------------------------------------------------------*
1180  *      FSM state ST_MULTIFR event rx'd FRMR
1181  *---------------------------------------------------------------------------*/
1182 static void
1183 F_MF20(l2_softc_t *l2sc)
1184 {
1185         NDBGL2(L2_F_MSG, "FSM function F_MF20 executing");
1186
1187         i4b_mdl_error_ind(l2sc, "F_MF20", MDL_ERR_K);
1188
1189         i4b_establish_data_link(l2sc);
1190
1191         l2sc->l3initiated = 0;
1192 }
1193
1194 /*---------------------------------------------------------------------------*
1195  *      FSM state ST_TIMREC event dl establish request
1196  *---------------------------------------------------------------------------*/
1197 static void
1198 F_TR01(l2_softc_t *l2sc)
1199 {
1200         NDBGL2(L2_F_MSG, "FSM function F_TR01 executing");
1201
1202         i4b_Dcleanifq(&l2sc->i_queue);
1203
1204         i4b_establish_data_link(l2sc);
1205
1206         l2sc->l3initiated = 1;
1207 }
1208
1209 /*---------------------------------------------------------------------------*
1210  *      FSM state ST_TIMREC event persistent deactivation
1211  *---------------------------------------------------------------------------*/
1212 static void
1213 F_TR05(l2_softc_t *l2sc)
1214 {
1215         NDBGL2(L2_F_MSG, "FSM function F_TR05 executing");
1216
1217         i4b_Dcleanifq(&l2sc->i_queue);
1218
1219         l2sc->postfsmarg = l2sc->unit;
1220         l2sc->postfsmfunc = DL_Rel_Ind_A;
1221
1222         i4b_T200_stop(l2sc);
1223 }
1224
1225 /*---------------------------------------------------------------------------*
1226  *      FSM state ST_TIMREC event mdl remove request
1227  *---------------------------------------------------------------------------*/
1228 static void
1229 F_TR06(l2_softc_t *l2sc)
1230 {
1231         NDBGL2(L2_F_MSG, "FSM function F_TR06 executing");
1232
1233         i4b_Dcleanifq(&l2sc->i_queue);
1234
1235         l2sc->postfsmarg = l2sc->unit;
1236         l2sc->postfsmfunc = DL_Rel_Ind_A;
1237
1238         i4b_T200_stop(l2sc);
1239
1240 /*XXX*/ i4b_mdl_assign_ind(l2sc);
1241 }
1242
1243 /*---------------------------------------------------------------------------*
1244  *      FSM state ST_TIMREC event rx'd SABME
1245  *---------------------------------------------------------------------------*/
1246 static void
1247 F_TR07(l2_softc_t *l2sc)
1248 {
1249         NDBGL2(L2_F_MSG, "FSM function F_TR07 executing");
1250
1251         i4b_clear_exception_conditions(l2sc);
1252
1253         MDL_Status_Ind(l2sc->unit, STI_L2STAT, LAYER_ACTIVE);
1254
1255         i4b_tx_ua(l2sc, l2sc->rxd_PF);
1256
1257         i4b_mdl_error_ind(l2sc, "F_TR07", MDL_ERR_F);
1258
1259         if(l2sc->vs != l2sc->va)
1260         {
1261                 i4b_Dcleanifq(&l2sc->i_queue);
1262
1263                 l2sc->postfsmarg = l2sc->unit;
1264                 l2sc->postfsmfunc = DL_Est_Ind_A;
1265         }
1266
1267         i4b_T200_stop(l2sc);
1268         i4b_T203_start(l2sc);
1269
1270         l2sc->vs = 0;
1271         l2sc->va = 0;
1272         l2sc->vr = 0;
1273 }
1274
1275 /*---------------------------------------------------------------------------*
1276  *      FSM state ST_TIMREC event rx'd DISC
1277  *---------------------------------------------------------------------------*/
1278 static void
1279 F_TR08(l2_softc_t *l2sc)
1280 {
1281         NDBGL2(L2_F_MSG, "FSM function F_TR08 executing");
1282
1283         i4b_Dcleanifq(&l2sc->i_queue);
1284         MDL_Status_Ind(l2sc->unit, STI_L2STAT, LAYER_IDLE);
1285         i4b_tx_ua(l2sc, l2sc->rxd_PF);
1286
1287         l2sc->postfsmarg = l2sc->unit;
1288         l2sc->postfsmfunc = DL_Rel_Ind_A;
1289
1290         i4b_T200_stop(l2sc);
1291 }
1292
1293 /*---------------------------------------------------------------------------*
1294  *      FSM state ST_TIMREC event rx'd UA
1295  *---------------------------------------------------------------------------*/
1296 static void
1297 F_TR09(l2_softc_t *l2sc)
1298 {
1299         NDBGL2(L2_F_MSG, "FSM function F_TR09 executing");
1300         if(l2sc->rxd_PF)
1301                 i4b_mdl_error_ind(l2sc, "F_TR09", MDL_ERR_C);
1302         else
1303                 i4b_mdl_error_ind(l2sc, "F_TR09", MDL_ERR_D);
1304 }
1305
1306 /*---------------------------------------------------------------------------*
1307  *      FSM state ST_TIMREC event rx'd DM
1308  *---------------------------------------------------------------------------*/
1309 static void
1310 F_TR10(l2_softc_t *l2sc)
1311 {
1312         NDBGL2(L2_F_MSG, "FSM function F_TR10 executing");
1313
1314         if(l2sc->rxd_PF)
1315         {
1316                 i4b_mdl_error_ind(l2sc, "F_TR10", MDL_ERR_B);
1317         }
1318         else
1319         {
1320                 i4b_mdl_error_ind(l2sc, "F_TR10", MDL_ERR_E);
1321         }
1322
1323         i4b_establish_data_link(l2sc);
1324
1325         l2sc->l3initiated = 0;
1326 }
1327
1328 /*---------------------------------------------------------------------------*
1329  *      FSM state ST_TIMREC event T200 expiry
1330  *---------------------------------------------------------------------------*/
1331 static void
1332 F_TR11(l2_softc_t *l2sc)
1333 {
1334         NDBGL2(L2_F_MSG, "FSM function F_TR11 executing");
1335
1336         if(l2sc->RC >= N200)
1337         {
1338                 i4b_mdl_error_ind(l2sc, "F_TR11", MDL_ERR_I);
1339
1340                 i4b_establish_data_link(l2sc);
1341
1342                 l2sc->l3initiated = 0;
1343
1344                 l2sc->Q921_state = ST_AW_EST;
1345         }
1346         else
1347         {
1348                 i4b_transmit_enquire(l2sc);
1349
1350                 l2sc->RC++;
1351
1352                 l2sc->Q921_state = ST_TIMREC;
1353         }
1354 }
1355
1356 /*---------------------------------------------------------------------------*
1357  *      FSM state ST_TIMREC event dl data request
1358  *---------------------------------------------------------------------------*/
1359 static void
1360 F_TR12(l2_softc_t *l2sc)
1361 {
1362         NDBGL2(L2_F_MSG, "FSM function F_TR12 executing");
1363
1364         i4b_i_frame_queued_up(l2sc);
1365 }
1366
1367 /*---------------------------------------------------------------------------*
1368  *      FSM state ST_TIMREC event dl release request
1369  *---------------------------------------------------------------------------*/
1370 static void
1371 F_TR13(l2_softc_t *l2sc)
1372 {
1373         NDBGL2(L2_F_MSG, "FSM function F_TR13 executing");
1374
1375         i4b_Dcleanifq(&l2sc->i_queue);
1376
1377         l2sc->RC = 0;
1378
1379         i4b_tx_disc(l2sc, P1);
1380
1381         i4b_T200_restart(l2sc);
1382 }
1383
1384 /*---------------------------------------------------------------------------*
1385  *      FSM state ST_TIMREC event set own rx busy
1386  *---------------------------------------------------------------------------*/
1387 static void
1388 F_TR15(l2_softc_t *l2sc)
1389 {
1390         NDBGL2(L2_F_MSG, "FSM function F_TR15 executing");
1391
1392         if(l2sc->own_busy == 0)
1393         {
1394                 l2sc->own_busy = 1;
1395
1396                 i4b_tx_rnr_response(l2sc, F0);
1397
1398                 l2sc->ack_pend = 0;
1399         }
1400 }
1401
1402 /*---------------------------------------------------------------------------*
1403  *      FSM state ST_TIMREC event clear own rx busy
1404  *---------------------------------------------------------------------------*/
1405 static void
1406 F_TR16(l2_softc_t *l2sc)
1407 {
1408         NDBGL2(L2_F_MSG, "FSM function F_TR16 executing");
1409
1410         if(l2sc->own_busy != 0)
1411         {
1412                 l2sc->own_busy = 0;
1413
1414                 i4b_tx_rr_response(l2sc, F0);   /* this is wrong         */
1415                                                 /* in Q.921 03/93 p 74 ! */
1416                 l2sc->ack_pend = 0;
1417         }
1418 }
1419
1420 /*---------------------------------------------------------------------------*
1421  *      FSM state ST_TIMREC event rx'd RR
1422  *---------------------------------------------------------------------------*/
1423 static void
1424 F_TR17(l2_softc_t *l2sc)
1425 {
1426         NDBGL2(L2_F_MSG, "FSM function F_TR17 executing");
1427
1428         l2sc->peer_busy = 0;
1429
1430         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
1431         {
1432                 if(l2sc->rxd_PF == 1)
1433                 {
1434                         i4b_enquiry_response(l2sc);
1435                 }
1436         }
1437         else
1438         {
1439                 if(l2sc->rxd_PF == 1)
1440                 {
1441                         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
1442                         {
1443                                 l2sc->va = l2sc->rxd_NR;
1444                                 i4b_T200_stop(l2sc);
1445                                 i4b_T203_start(l2sc);
1446                                 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR);
1447                                 l2sc->Q921_state = ST_MULTIFR;
1448                                 return;
1449                         }
1450                         else
1451                         {
1452                                 i4b_nr_error_recovery(l2sc);
1453                                 l2sc->Q921_state = ST_AW_EST;
1454                                 return;
1455                         }
1456                 }
1457         }
1458
1459         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
1460         {
1461                 l2sc->va = l2sc->rxd_NR;
1462                 l2sc->Q921_state = ST_TIMREC;
1463         }
1464         else
1465         {
1466                 i4b_nr_error_recovery(l2sc);
1467                 l2sc->Q921_state = ST_AW_EST;
1468         }
1469 }
1470
1471 /*---------------------------------------------------------------------------*
1472  *      FSM state ST_TIMREC event
1473  *---------------------------------------------------------------------------*/
1474 static void
1475 F_TR18(l2_softc_t *l2sc)
1476 {
1477         NDBGL2(L2_F_MSG, "FSM function F_TR18 executing");
1478
1479         l2sc->peer_busy = 0;
1480
1481         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
1482         {
1483                 if(l2sc->rxd_PF == 1)
1484                 {
1485                         i4b_enquiry_response(l2sc);
1486                 }
1487         }
1488         else
1489         {
1490                 if(l2sc->rxd_PF == 1)
1491                 {
1492                         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
1493                         {
1494                                 l2sc->va = l2sc->rxd_NR;
1495                                 i4b_T200_stop(l2sc);
1496                                 i4b_T203_start(l2sc);
1497                                 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR);
1498                                 l2sc->Q921_state = ST_MULTIFR;
1499                                 return;
1500                         }
1501                         else
1502                         {
1503                                 i4b_nr_error_recovery(l2sc);
1504                                 l2sc->Q921_state = ST_AW_EST;
1505                                 return;
1506                         }
1507                 }
1508         }
1509
1510         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
1511         {
1512                 l2sc->va = l2sc->rxd_NR;
1513                 l2sc->Q921_state = ST_TIMREC;
1514         }
1515         else
1516         {
1517                 i4b_nr_error_recovery(l2sc);
1518                 l2sc->Q921_state = ST_AW_EST;
1519         }
1520 }
1521
1522 /*---------------------------------------------------------------------------*
1523  *      FSM state ST_TIMREC event rx'd RNR
1524  *---------------------------------------------------------------------------*/
1525 static void
1526 F_TR19(l2_softc_t *l2sc)
1527 {
1528         NDBGL2(L2_F_MSG, "FSM function F_TR19 executing");
1529
1530         l2sc->peer_busy = 0;
1531
1532         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
1533         {
1534                 if(l2sc->rxd_PF == 1)
1535                 {
1536                         i4b_enquiry_response(l2sc);
1537                 }
1538         }
1539         else
1540         {
1541                 if(l2sc->rxd_PF == 1)
1542                 {
1543                         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
1544                         {
1545                                 l2sc->va = l2sc->rxd_NR;
1546                                 i4b_T200_restart(l2sc);
1547                                 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR);
1548                                 l2sc->Q921_state = ST_MULTIFR;
1549                                 return;
1550                         }
1551                         else
1552                         {
1553                                 i4b_nr_error_recovery(l2sc);
1554                                 l2sc->Q921_state = ST_AW_EST;
1555                                 return;
1556                         }
1557                 }
1558         }
1559
1560         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
1561         {
1562                 l2sc->va = l2sc->rxd_NR;
1563                 l2sc->Q921_state = ST_TIMREC;
1564         }
1565         else
1566         {
1567                 i4b_nr_error_recovery(l2sc);
1568                 l2sc->Q921_state = ST_AW_EST;
1569         }
1570 }
1571
1572 /*---------------------------------------------------------------------------*
1573  *      FSM state ST_TIMREC event rx'd FRMR
1574  *---------------------------------------------------------------------------*/
1575 static void
1576 F_TR20(l2_softc_t *l2sc)
1577 {
1578         NDBGL2(L2_F_MSG, "FSM function F_TR20 executing");
1579
1580         i4b_mdl_error_ind(l2sc, "F_TR20", MDL_ERR_K);
1581
1582         i4b_establish_data_link(l2sc);
1583
1584         l2sc->l3initiated = 0;
1585 }
1586
1587 #endif /* NI4BQ921 > 0 */