2 * ----------------------------------------------------------------------------
3 * "THE BEER-WARE LICENSE" (Revision 42):
4 * <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
5 * can do whatever you want with this stuff. If we meet some day, and you think
6 * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
7 * ----------------------------------------------------------------------------
9 * $FreeBSD: src/sys/dev/musycc/musycc.c,v 1.17.2.3 2001/03/13 22:05:36 phk Exp $
16 * This is the state engine which drives the card "as such" which in reality
17 * means the MUSYCC chip.
21 * IDLE The card is in this state when no channels are configured.
22 * This is the state we leave the card in after _attach()
24 * INIT The card is being initialized
26 * RUNNING The card is running
28 * FAULT The card is hosed and being reset
33 * IDLE ---> INIT ---> RUNNING
41 #include <sys/param.h>
42 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/sysctl.h>
46 #include <sys/malloc.h>
49 #include <sys/queue.h>
52 #include <machine/clock.h>
54 #include <bus/pci/pcireg.h>
55 #include <bus/pci/pcivar.h>
59 #include <netgraph/ng_message.h>
60 #include <netgraph/netgraph.h>
65 static MALLOC_DEFINE(M_MUSYCC, "musycc", "MUSYCC related");
67 static int maxlatency = 250;
68 SYSCTL_INT(_debug, OID_AUTO, musycc_maxlatency, CTLFLAG_RW, &maxlatency, 0,
69 "The number of milliseconds a packet is allowed to spend in the output queue. "
70 "If the output queue is longer than this number of milliseconds when the packet "
71 "arrives for output, the packet will be dropped."
75 SYSCTL_INT(_debug, OID_AUTO, musycc_debug, CTLFLAG_RW, &debug, 0, "");
78 static void init_8370(struct softc *sc);
79 static u_int32_t parse_ts(const char *s, int *nbit);
82 * Device driver initialization stuff
85 static devclass_t musycc_devclass;
87 /* XXX: Notice, these babies must be aligned to 2k boundaries [5-7] */
89 u_int32_t thp[32]; /* Transmit Head Pointer [5-29] */
90 u_int32_t tmp[32]; /* Transmit Message Pointer [5-30] */
91 u_int32_t rhp[32]; /* Receive Head Pointer [5-29] */
92 u_int32_t rmp[32]; /* Receive Message Pointer [5-30] */
93 u_int8_t ttsm[128]; /* Time Slot Map [5-22] */
94 u_int8_t tscm[256]; /* Subchannel Map [5-24] */
95 u_int32_t tcct[32]; /* Channel Configuration [5-26] */
96 u_int8_t rtsm[128]; /* Time Slot Map [5-22] */
97 u_int8_t rscm[256]; /* Subchannel Map [5-24] */
98 u_int32_t rcct[32]; /* Channel Configuration [5-26] */
99 u_int32_t __glcd; /* Global Configuration Descriptor [5-10] */
100 u_int32_t __iqp; /* Interrupt Queue Pointer [5-36] */
101 u_int32_t __iql; /* Interrupt Queue Length [5-36] */
102 u_int32_t grcd; /* Group Configuration Descriptor [5-16] */
103 u_int32_t mpd; /* Memory Protection Descriptor [5-18] */
104 u_int32_t mld; /* Message Length Descriptor [5-20] */
105 u_int32_t pcd; /* Port Configuration Descriptor [5-19] */
106 u_int32_t __rbist; /* Receive BIST status [5-4] */
107 u_int32_t __tbist; /* Receive BIST status [5-4] */
111 u_int32_t gbp; /* Group Base Pointer */
112 u_int32_t dacbp; /* Dual Address Cycle Base Pointer */
113 u_int32_t srd; /* Service Request Descriptor */
114 u_int32_t isd; /* Interrupt Service Descriptor */
115 u_int32_t __thp[28]; /* Transmit Head Pointer [5-29] */
116 u_int32_t __tmp[32]; /* Transmit Message Pointer [5-30] */
117 u_int32_t __rhp[32]; /* Receive Head Pointer [5-29] */
118 u_int32_t __rmp[32]; /* Receive Message Pointer [5-30] */
119 u_int8_t ttsm[128]; /* Time Slot Map [5-22] */
120 u_int8_t tscm[256]; /* Subchannel Map [5-24] */
121 u_int32_t tcct[32]; /* Channel Configuration [5-26] */
122 u_int8_t rtsm[128]; /* Time Slot Map [5-22] */
123 u_int8_t rscm[256]; /* Subchannel Map [5-24] */
124 u_int32_t rcct[32]; /* Channel Configuration [5-26] */
125 u_int32_t glcd; /* Global Configuration Descriptor [5-10] */
126 u_int32_t iqp; /* Interrupt Queue Pointer [5-36] */
127 u_int32_t iql; /* Interrupt Queue Length [5-36] */
128 u_int32_t grcd; /* Group Configuration Descriptor [5-16] */
129 u_int32_t mpd; /* Memory Protection Descriptor [5-18] */
130 u_int32_t mld; /* Message Length Descriptor [5-20] */
131 u_int32_t pcd; /* Port Configuration Descriptor [5-19] */
132 u_int32_t rbist; /* Receive BIST status [5-4] */
133 u_int32_t tbist; /* Receive BIST status [5-4] */
137 * Because the chan_group must be 2k aligned we create this super
138 * structure so we can use the remaining 476 bytes for something useful
163 enum {DOWN, UP} state;
171 u_long rx_drop; /* mbuf allocation failures */
174 struct mdesc *tx_next_md; /* next MD */
175 struct mdesc *tx_last_md; /* last MD */
176 int rx_last_md; /* index to next MD */
177 int nmd; /* count of MD's. */
183 u_long dribble_error;
200 u_long overflow_error;
208 enum framing {WHOKNOWS, E1, E1U, T1, T1U};
209 enum clocksource {EXT, INT};
212 enum framing framing;
213 enum clocksource clocksource;
222 struct mdesc *mdt[NHDLC];
223 struct mdesc *mdr[NHDLC];
224 node_p node; /* NG node */
225 char nodename[NG_NODESIZ]; /* NG nodename */
226 struct schan *chan[NHDLC];
238 * SoftC for the entire card.
242 enum { C_IDLE, C_INIT, C_RUNNING, C_FAULT } state;
245 LIST_ENTRY(csoftc) list;
248 struct resource *irq[2];
250 vm_offset_t physbase[2];
255 struct softc serial[NPORT];
266 #define NG_NODETYPE "lmc1504"
268 static ng_constructor_t musycc_constructor;
269 static ng_rcvmsg_t musycc_rcvmsg;
270 static ng_shutdown_t musycc_shutdown;
271 static ng_newhook_t musycc_newhook;
272 static ng_connect_t musycc_connect;
273 static ng_rcvdata_t musycc_rcvdata;
274 static ng_disconnect_t musycc_disconnect;
276 static struct ng_type ngtypestruct = {
297 parse_ts(const char *s, int *nbit)
307 i = strtol(s, &p, 0);
310 while (j != -1 && j < i) {
320 } else if (*p == '-') {
338 static LIST_HEAD(, csoftc) sc_list = LIST_HEAD_INITIALIZER(&sc_list);
341 poke_847x(void *dummy)
347 timeout(poke_847x, NULL, 1);
348 LIST_FOREACH(csc, &sc_list, list) {
350 i = (csc->creg >> 24 & 0xf);
351 csc->creg &= ~0xf000000;
353 csc->creg |= (i & 0xf) << 24;
354 *csc->cregp = csc->creg;
356 for (i = 0; i < sc->nchan; i++) {
357 if (sc->serial[i].last == 0xffffffff) {
358 sc->serial[i].reg->srd = 0;
359 sc->serial[i].last = 0;
368 init_card(struct csoftc *csc)
371 kprintf("init_card(%p)\n", csc);
374 csc->reg->srd = 0x100;
375 tsleep(csc, PCATCH, "icard", hz / 10);
376 csc->reg->gbp = vtophys(csc->ram);
377 csc->ram->glcd = 0x3f30; /* XXX: designer magic */
379 csc->ram->iqp = vtophys(csc->iqd);
380 csc->ram->iql = NIQD - 1;
381 csc->ram->dacbp = 0; /* 32bit only */
383 csc->reg->srd = csc->serial[0].last = 0x400;
384 tsleep(&csc->serial[0].last, PCATCH, "con1", hz);
385 timeout(poke_847x, NULL, 1);
386 csc->state = C_RUNNING;
390 init_ctrl(struct softc *sc)
394 kprintf("init_ctrl(%p) [%s] [%08x]\n", sc, sc->nodename, sc->csc->reg->glcd);
396 tsleep(sc, PCATCH, "ds8370", hz);
397 kprintf("%s: glcd: [%08x]\n", sc->nodename, sc->csc->reg->glcd);
398 sc->reg->gbp = vtophys(sc->ram);
399 sc->ram->grcd = 0x00000001; /* RXENBL */
400 sc->ram->grcd |= 0x00000002; /* TXENBL */
401 sc->ram->grcd |= 0x00000004; /* SUBDSBL */
402 if (sc->framing == E1 || sc->framing == T1)
403 sc->ram->grcd |= 0x00000008; /* OOFABT */
405 sc->ram->grcd |= 0x00000000; /* !OOFABT */
407 sc->ram->grcd |= 0x00000020; /* MSKCOFA */
409 sc->ram->grcd |= 0x00000440; /* POLLTH=1 */
411 sc->ram->mpd = 0; /* Memory Protection NI [5-18] */
413 sc->ram->pcd = 0x0000001; /* PORTMD=1 (E1/32ts) */
414 sc->ram->pcd |= 1 << 5; /* TSYNC_EDGE */
415 sc->ram->pcd |= 1 << 9; /* TRITX */
417 /* Message length descriptor */
420 sc->ram->mld |= (1600 << 16);
422 for (i = 0; i < NHDLC; i++) {
423 sc->ram->ttsm[i] = 0;
424 sc->ram->rtsm[i] = 0;
426 sc->reg->srd = sc->last = 0x500;
427 tsleep(&sc->last, PCATCH, "con1", hz);
428 sc->reg->srd = sc->last = 0x520;
429 tsleep(&sc->last, PCATCH, "con1", hz);
437 status_chans(struct softc *sc, char *s)
443 for (i = 0; i < NHDLC; i++) {
447 ksprintf(s + strlen(s), "c%2d:", i);
448 ksprintf(s + strlen(s), " ts %08x", scp->ts);
449 ksprintf(s + strlen(s), " RX %lus/%lus",
450 time_second - scp->last_recv, time_second - scp->last_rxerr);
451 ksprintf(s + strlen(s), " TX %lus/%lus/%lus",
452 time_second - scp->last_xmit,
453 time_second - scp->last_txerr,
454 time_second - scp->last_txdrop);
455 ksprintf(s + strlen(s), " TXdrop %lu Pend %lu",
458 ksprintf(s + strlen(s), " CRC %lu Dribble %lu Long %lu Short %lu Abort %lu",
464 ksprintf(s + strlen(s), "\n TX: %lu RX: %lu\n",
475 status_8370(struct softc *sc, char *s)
477 u_int32_t *p = sc->ds8370;
480 ksprintf(s, "Framer: "); s += strlen(s);
481 switch (sc->framing) {
482 case WHOKNOWS: ksprintf(s, "(unconfigured)\n"); break;
483 case E1: ksprintf(s, "(e1)\n"); break;
484 case E1U: ksprintf(s, "(e1u)\n"); break;
485 case T1: ksprintf(s, "(t1)\n"); break;
486 case T1U: ksprintf(s, "(t1u)\n"); break;
487 default: ksprintf(s, "(mode %d XXX?)\n", sc->framing); break;
490 ksprintf(s, " Red alarms:"); s += strlen(s);
491 if (p[0x47] & 0x08) { ksprintf(s, " ALOS"); s += strlen(s); }
492 if (p[0x47] & 0x04) { ksprintf(s, " LOS"); s += strlen(s); }
493 if (sc->framing == E1 || sc->framing == T1) {
494 if (p[0x47] & 0x02) { ksprintf(s, " LOF"); s += strlen(s); }
496 ksprintf(s, "\n Yellow alarms:"); s += strlen(s);
497 if (p[0x47] & 0x80) { ksprintf(s, " RMYEL"); s += strlen(s); }
498 if (p[0x47] & 0x40) { ksprintf(s, " RYEL"); s += strlen(s); }
499 ksprintf(s, "\n Blue alarms:"); s += strlen(s);
500 if (p[0x47] & 0x10) { ksprintf(s, " AIS"); s += strlen(s); }
501 ksprintf(s, "\n"); s += strlen(s);
502 ksprintf(s, "\n Various alarms:"); s += strlen(s);
503 if (p[0x48] & 0x10) { ksprintf(s, " TSHORT"); s += strlen(s); }
504 ksprintf(s, "\n Counters:"); s += strlen(s);
505 if (sc->framing == E1) {
506 ksprintf(s, " FERR=%lu", sc->cnt_ferr); s += strlen(s);
508 ksprintf(s, " CERR=%lu", sc->cnt_cerr); s += strlen(s);
509 ksprintf(s, " LCV=%lu", sc->cnt_lcv); s += strlen(s);
510 ksprintf(s, " FEBE=%lu", sc->cnt_febe); s += strlen(s);
511 ksprintf(s, " BERR=%lu", sc->cnt_berr); s += strlen(s);
512 ksprintf(s, " FRED=%lu", sc->cnt_fred); s += strlen(s);
513 ksprintf(s, " COFA=%lu", sc->cnt_cofa); s += strlen(s);
514 ksprintf(s, " SEF=%lu", sc->cnt_sef); s += strlen(s);
515 ksprintf(s, "\n"); s += strlen(s);
519 dump_8370(struct softc *sc, char *s, int offset)
522 u_int32_t *p = sc->ds8370;
525 for (i = 0; i < 0x100; i += 16) {
526 ksprintf(s, "%03x: ", i + offset);
528 for (j = 0; j < 0x10; j ++) {
529 ksprintf(s, " %02x", p[i + j + offset] & 0xff);
538 init_8370(struct softc *sc)
541 u_int32_t *p = sc->ds8370;
543 p[0x001] = 0x80; /* CR0 - Reset */
545 p[0x001] = 0x00; /* CR0 - E1, RFRAME: FAS only */
547 if (sc->clocksource == INT)
548 p[0x002] = 0x40; /* JAT_CR - XXX */
550 p[0x002] = 0x20; /* JAT_CR - XXX */
551 p[0x00D] = 0x01; /* IER6 - ONESEC */
552 p[0x014] = 0x00; /* LOOP - */
553 p[0x015] = 0x00; /* DL3_TS - */
554 p[0x016] = 0x00; /* DL3_BIT - */
555 p[0x017] = 0x00; /* DL3_BIT - */
556 p[0x018] = 0xFF; /* PIO - XXX */
557 p[0x019] = 0x3c; /* POE - CLADO_OE|RCKO_OE */
558 if (sc->clocksource == INT)
559 p[0x01A] = 0x37; /* CMUX - RSBCKI(RSBCKI), TSBCKI(CLADO), CLADO(RCKO), TCKI(CLADO) */
561 p[0x01A] = 0x37; /* CMUX - RSBCKI(RSBCKI), TSBCKI(RSBCKI), CLADO(RCKO), TCKI(RCKO) */
564 p[0x020] = 0x41; /* LIU_CR - SQUELCH */
565 p[0x022] = 0xb1; /* RLIU_CR - */
566 p[0x024] = 0x1d; /* VGA_MAX - */
567 p[0x027] = 0xba; /* DSLICE - */
568 p[0x028] = 0xda; /* EQ_OUT - */
569 p[0x02a] = 0xa6; /* PRE_EQ - */
571 if (sc->framing == E1U || sc->framing == T1U)
572 p[0x040] = 0x49; /* RCRO - XXX */
574 p[0x040] = 0x09; /* RCRO - XXX */
576 p[0x041] = 0x00; /* RPATT - XXX */
577 p[0x045] = 0x00; /* RALM - XXX */
578 p[0x046] = 0x05; /* LATCH - LATCH_CNT|LATCH_ALM */
580 p[0x068] = 0x4c; /* TLIU_CR - TERM|Pulse=6 */
581 p[0x070] = 0x04; /* TCR0 - TFRAME=4 */
583 if (sc->framing == E1U || sc->framing == T1U)
584 p[0x071] = 0x41; /* TCR1 - TZCS */
586 p[0x071] = 0x51; /* TCR1 - TZCS */
588 if (sc->framing == E1U || sc->framing == T1U)
591 p[0x072] = 0x1b; /* TCR1 - INS_YEL|INS_MF|INS_CRC|INS_FBIT */
593 p[0x073] = 0x00; /* TERROR */
594 p[0x074] = 0x00; /* TMAN */
596 if (sc->framing == E1U || sc->framing == T1U)
597 p[0x075] = 0x0; /* TALM */
599 p[0x075] = 0x10; /* TALM - AUTO_YEL */
601 p[0x076] = 0x00; /* TPATT */
602 p[0x077] = 0x00; /* TLP */
604 p[0x090] = 0x05; /* CLAD_CR - XXX */
605 p[0x091] = 0x01; /* CSEL - 2048kHz */
607 if (sc->framing == E1U || sc->framing == T1U) {
613 p[0x0d0] = 0x46; /* SBI_CR - SBI=6 */
614 p[0x0d1] = 0x70; /* RSB_CR - XXX */
615 p[0x0d2] = 0x00; /* RSYNC_BIT - 0 */
616 p[0x0d3] = 0x00; /* RSYNC_TS - 0 */
617 p[0x0d4] = 0x30; /* TSB_CR - XXX */
618 p[0x0d5] = 0x00; /* TSYNC_BIT - 0 */
619 p[0x0d6] = 0x00; /* TSYNC_TS - 0 */
620 if (sc->framing == E1U || sc->framing == T1U)
621 p[0x0d7] = 0x05; /* RSIG_CR - 0 | FRZ_OFF*/
623 p[0x0d7] = 0x01; /* RSIG_CR - 0 */
624 p[0x0d8] = 0x00; /* RSIG_FRM - 0 */
625 for (i = 0; i < 32; i ++) {
626 p[0x0e0 + i] = 0x0d; /* SBC$i - RINDO|TINDO|ASSIGN */
627 p[0x100 + i] = 0x00; /* TPC$i - 0 */
628 p[0x180 + i] = 0x00; /* RPC$i - 0 */
637 musycc_intr0_tx_eom(struct softc *sc, int ch)
643 if (sch == NULL || sch->state != UP) {
644 /* XXX: this should not happen once the driver is done */
645 kprintf("Xmit packet on uninitialized channel %d\n", ch);
647 if (sc->mdt[ch] == NULL)
648 return; /* XXX: can this happen ? */
650 md = sch->tx_last_md;
653 if (md->status & 0x80000000)
654 break; /* Not our mdesc, done */
655 sch->tx_last_md = md->snext;
658 sch->tx_pending -= md->m->m_pkthdr.len;
667 * Receive interrupt on controller *sc, channel ch
669 * We perambulate the Rx descriptor ring until we hit
670 * a mdesc which isn't ours to take.
674 musycc_intr0_rx_eom(struct softc *sc, int ch)
676 u_int32_t status, error;
682 if (sch == NULL || sch->state != UP) {
683 /* XXX: this should not happen once the driver is done */
684 kprintf("Received packet on uninitialized channel %d\n", ch);
687 if (sc->mdr[ch] == NULL)
688 return; /* XXX: can this happen ? */
690 md = &sc->mdr[ch][sch->rx_last_md];
692 if (!(status & 0x80000000))
693 break; /* Not our mdesc, done */
695 m->m_len = m->m_pkthdr.len = status & 0x3fff;
696 error = (status >> 16) & 0xf;
698 MGETHDR(m2, MB_DONTWAIT, MT_DATA);
700 MCLGET(m2, MB_DONTWAIT);
701 if((m2->m_flags & M_EXT) != 0) {
702 /* Substitute the mbuf+cluster. */
704 md->data = vtophys(m2->m_data);
705 /* Pass the received mbuf upwards. */
706 sch->last_recv = time_second;
707 ng_queue_data(sch->hook, m, NULL);
710 * We didn't get a mbuf cluster,
711 * drop received packet, free the
712 * mbuf we cannot use and recycle
713 * the mbuf+cluster we already had.
716 sch->last_rdrop = time_second;
721 * We didn't get a mbuf, drop received packet
722 * and recycle the "old" mbuf+cluster.
724 sch->last_rdrop = time_second;
727 } else if (error == 9) {
728 sch->last_rxerr = time_second;
730 } else if (error == 10) {
731 sch->last_rxerr = time_second;
732 sch->dribble_error++;
733 } else if (error == 11) {
734 sch->last_rxerr = time_second;
736 } else if (error == 12) {
737 sch->last_rxerr = time_second;
740 sch->last_rxerr = time_second;
741 /* Receive error, print some useful info */
742 kprintf("%s %s: RX 0x%08x ", sch->sc->nodename,
743 sch->hookname, status);
744 /* Don't print a lot, just the begining will do */
746 m->m_len = m->m_pkthdr.len = 16;
750 md->status = 1600; /* XXX: MTU */
751 /* Check next mdesc in the ring */
752 if (++sch->rx_last_md >= sch->nmd)
758 musycc_intr0(void *arg)
760 int i, j, g, ch, ev, er;
762 u_int32_t u, u1, n, c;
774 kprintf("%s: IRQ: %08x n = %d c = %d\n", csc->serial[0].nodename, u, n, c);
775 for (i = 0; i < c; i++) {
778 g = (u1 >> 29) & 0x3;
779 g |= (u1 >> (14-2)) & 0x4;
780 ch = (u1 >> 24) & 0x1f;
781 ev = (u1 >> 20) & 0xf;
782 er = (u1 >> 16) & 0xf;
783 sc = &csc->serial[g];
784 if ((debug & 2) || er) {
785 kprintf("%08x %d", u1, g);
786 kprintf("/%s", u1 & 0x80000000 ? "T" : "R");
787 kprintf("/%02d", ch);
788 kprintf(" %02d", ev);
789 kprintf(":%02d", er);
793 case 1: /* SACK Service Request Acknowledge */
795 kprintf("%s: SACK: %08x group=%d", sc->nodename, csc->iqd[j], g);
796 kprintf("/%s", csc->iqd[j] & 0x80000000 ? "T" : "R");
797 kprintf(" cmd %08x (%08x) \n", sc->last, sc->reg->srd);
799 sc->last = 0xffffffff;
802 case 5: /* CHABT Change To Abort Code (0x7e -> 0xff) */
803 case 6: /* CHIC Change To Idle Code (0xff -> 0x7e) */
805 case 3: /* EOM End Of Message */
806 if (csc->iqd[j] & 0x80000000)
807 musycc_intr0_tx_eom(sc, ch);
809 musycc_intr0_rx_eom(sc, ch);
812 if (er == 13) { /* SHT */
813 sc->chan[ch]->last_rxerr = time_second;
814 sc->chan[ch]->short_error++;
818 musycc_intr0_tx_eom(sc, ch);
819 musycc_intr0_rx_eom(sc, ch);
821 kprintf("huh ? %08x %d", u1, g);
822 kprintf("/%s", u1 & 0x80000000 ? "T" : "R");
823 kprintf("/%02d", ch);
824 kprintf(" %02d", ev);
825 kprintf(":%02d", er);
829 csc->iqd[j] = 0xffffffff;
832 csc->reg->isd = j << 16;
838 musycc_intr1(void *arg)
848 for (i = 0; i < csc->nchan; i++) {
849 sc = &csc->serial[i];
854 if (u[0x5] & 1) { /* ONESEC */
855 sc->cnt_ferr += u[0x50] & 0xff;
856 sc->cnt_ferr += (u[0x51] & 0xff) << 8;
857 sc->cnt_cerr += u[0x52] & 0xff;
858 sc->cnt_cerr += (u[0x53] & 0xff) << 8;
859 sc->cnt_lcv += u[0x54] & 0xff;
860 sc->cnt_lcv += (u[0x55] & 0xff) << 8;
861 sc->cnt_febe += u[0x56] & 0xff;
862 sc->cnt_febe += (u[0x57] & 0xff) << 8;
863 sc->cnt_berr += u[0x58] & 0xff;
864 sc->cnt_berr += (u[0x59] & 0xff) << 8;
865 sc->cnt_fred += (u[0x5a] & 0xf0) >> 4;
866 sc->cnt_cofa += (u[0x5a] & 0x0c) >> 2;
867 sc->cnt_sef += u[0x5a] & 0x03;
872 kprintf("musycc_intr1:%d %02x", i, irr);
873 for (j = 4; j < 0x14; j++)
874 kprintf(" %02x", u[j] & 0xff);
885 musycc_constructor(node_p *nodep)
892 musycc_shutdown(node_p nodep)
899 musycc_config(node_p node, char *set, char *ret)
903 enum framing wframing;
908 if (csc->state == C_IDLE)
910 while (csc->state != C_RUNNING)
911 tsleep(&csc->state, PCATCH, "crun", hz/10);
913 if (!strncmp(set, "line ", 5)) {
914 wframing = sc->framing;
915 if (!strcmp(set, "line e1")) {
917 } else if (!strcmp(set, "line e1u")) {
920 strcat(ret, "ENOGROK\n");
923 if (wframing == sc->framing)
925 if (sc->nhooks > 0) {
926 ksprintf(ret, "Cannot change line when %d hooks open\n", sc->nhooks);
929 sc->framing = wframing;
933 if (!strcmp(set, "clock source internal")) {
934 sc->clocksource = INT;
936 } else if (!strcmp(set, "clock source line")) {
937 sc->clocksource = EXT;
939 } else if (!strcmp(set, "show 8370 0")) {
940 dump_8370(sc, ret, 0);
941 } else if (!strcmp(set, "show 8370 1")) {
942 dump_8370(sc, ret, 0x100);
943 } else if (!strncmp(set, "creg", 4)) {
944 i = strtol(set + 5, 0, 0);
945 kprintf("set creg %d\n", i);
946 csc->creg = 0xfe | (i << 24);
947 *csc->cregp = csc->creg;
949 } else if (!strcmp(set, "reset")) {
950 reset_group(sc, ret);
951 } else if (!strcmp(set, "reset all")) {
955 kprintf("%s CONFIG SET [%s]\n", sc->nodename, set);
961 if (sc->framing == E1)
962 strcat(ret, "line e1\n");
963 else if (sc->framing == E1U)
964 strcat(ret, "line e1u\n");
965 if (sc->clocksource == INT)
966 strcat(ret, "clock source internal\n");
968 strcat(ret, "clock source line\n");
971 strcpy(ret, "Syntax Error\n");
972 strcat(ret, "\tline {e1|e1u}\n");
973 strcat(ret, "\tshow 8370 {0|1}\n");
978 * Handle status and config enquiries.
979 * Respond with a synchronous response.
982 musycc_rcvmsg(node_p node, struct ng_mesg *msg, const char *retaddr, struct ng_mesg **resp)
989 if (msg->header.typecookie != NGM_GENERIC_COOKIE)
992 if (msg->header.cmd == NGM_TEXT_STATUS) {
993 NG_MKRESPONSE(*resp, msg,
994 sizeof(struct ng_mesg) + NG_TEXTRESPONSE, M_NOWAIT);
996 kfree(msg, M_NETGRAPH);
999 s = (char *)(*resp)->data;
1002 (*resp)->header.arglen = strlen(s) + 1;
1003 kfree(msg, M_NETGRAPH);
1005 } else if (msg->header.cmd == NGM_TEXT_CONFIG) {
1006 if (msg->header.arglen) {
1007 s = (char *)msg->data;
1012 NG_MKRESPONSE(*resp, msg,
1013 sizeof(struct ng_mesg) + NG_TEXTRESPONSE, M_NOWAIT);
1014 if (*resp == NULL) {
1015 kfree(msg, M_NETGRAPH);
1018 r = (char *)(*resp)->data;
1020 musycc_config(node, s, r);
1021 (*resp)->header.arglen = strlen(r) + 1;
1022 kfree(msg, M_NETGRAPH);
1029 kfree(msg, M_NETGRAPH);
1034 musycc_newhook(node_p node, hook_p hook, const char *name)
1045 while (csc->state != C_RUNNING)
1046 tsleep(&csc->state, PCATCH, "crun", hz/10);
1048 if (sc->framing == WHOKNOWS)
1051 if (name[0] != 't' || name[1] != 's')
1053 ts = parse_ts(name + 2, &nbit);
1058 if (sc->framing == E1U && nbit == 32)
1060 else if (sc->framing == T1U && nbit == 24)
1065 if (sc->chan[chan] == NULL) {
1066 sch = kmalloc(sizeof(*sch), M_MUSYCC, M_WAITOK | M_ZERO);
1070 ksprintf(sch->hookname, name); /* XXX overflow ? */
1071 sc->chan[chan] = sch;
1072 } else if (sc->chan[chan]->state == UP) {
1076 sch = sc->chan[chan];
1079 sch->tx_limit = nbit * 8;
1080 hook->private = sch;
1085 musycc_rcvdata(hook_p hook, struct mbuf *m, meta_p meta)
1091 struct mdesc *md, *md0;
1092 u_int32_t ch, u, u0, len;
1095 sch = hook->private;
1100 if (csc->state != C_RUNNING) {
1101 kprintf("csc->state = %d\n", csc->state);
1102 NG_FREE_DATA(m, meta);
1109 if (sch->state != UP) {
1110 kprintf("sch->state = %d\n", sch->state);
1111 NG_FREE_DATA(m, meta);
1114 if (sch->tx_pending + m->m_pkthdr.len > sch->tx_limit * maxlatency) {
1116 sch->last_txdrop = time_second;
1117 NG_FREE_DATA(m, meta);
1121 /* find out if we have enough txmd's */
1123 md = sch->tx_next_md;
1124 for (len = m2->m_pkthdr.len; len; m2 = m2->m_next) {
1127 if (md->status != 0) {
1129 sch->last_txdrop = time_second;
1130 NG_FREE_DATA(m, meta);
1138 md = md0 = sch->tx_next_md;
1140 for (len = m->m_pkthdr.len; len > 0; m = m->m_next) {
1143 if (md->status != 0) {
1144 kprintf("Out of tx md(2)\n");
1145 sch->last_txerr = time_second;
1147 sch->last_txdrop = time_second;
1148 NG_FREE_DATA(m, meta);
1152 md->data = vtophys(m->m_data);
1154 u = 0x00000000; /* OWNER = CPU */
1156 u = 0x80000000; /* OWNER = MUSYCC */
1168 u |= 0x20000000; /* EOM */
1170 sch->tx_pending += m2->m_pkthdr.len;
1172 u |= 0x80000000; /* OWNER = MUSYCC */
1176 md0->status = u0 | 0x80000000; /* OWNER = MUSYCC */
1178 sch->last_xmit = time_second;
1179 sch->tx_next_md = md->snext;
1186 musycc_connect(hook_p hook)
1191 int nts, nbuf, i, nmd, ch;
1194 sch = hook->private;
1199 while (csc->state != C_RUNNING)
1200 tsleep(&csc->state, PCATCH, "crun", hz/10);
1202 if (sch->state == UP)
1206 /* Setup the Time Slot Map */
1208 for (i = ch; i < 32; i++) {
1209 if (sch->ts & (1 << i)) {
1210 sc->ram->rtsm[i] = ch | (4 << 5);
1211 sc->ram->ttsm[i] = ch | (4 << 5);
1217 * Find the length of the first run of timeslots.
1218 * XXX: find the longest instead.
1221 for (i = ch; i < 32; i++) {
1222 if (sch->ts & (1 << i))
1228 kprintf("Connect ch= %d ts= %08x nts= %d nbuf = %d\n",
1229 ch, sch->ts, nts, nbuf);
1231 /* Reread the Time Slot Map */
1232 sc->reg->srd = sc->last = 0x1800;
1233 tsleep(&sc->last, PCATCH, "con1", hz);
1234 sc->reg->srd = sc->last = 0x1820;
1235 tsleep(&sc->last, PCATCH, "con2", hz);
1237 /* Set the channel mode */
1238 sc->ram->tcct[ch] = 0x2800; /* HDLC-FCS16 | MAXSEL[2] */
1239 sc->ram->rcct[ch] = 0x2800; /* HDLC-FCS16 | MAXSEL[2] */
1242 * Allocate the FIFO space
1243 * We don't do subchanneling so we can use 128 dwords [4-13]
1245 sc->ram->tcct[ch] |= (1 + 2 * (nbuf - 1)) << 16; /* BUFFLEN */
1246 sc->ram->rcct[ch] |= (1 + 2 * (nbuf - 1)) << 16; /* BUFFLEN */
1247 sc->ram->tcct[ch] |= ((ch * 2) << 24); /* BUFFLOC */
1248 sc->ram->rcct[ch] |= ((ch * 2) << 24); /* BUFFLOC */
1250 /* Reread the Channel Configuration Descriptor for this channel */
1251 sc->reg->srd = sc->last = 0x0b00 + ch;
1252 tsleep(&sc->last, PCATCH, "con3", hz);
1253 sc->reg->srd = sc->last = 0x0b20 + ch;
1254 tsleep(&sc->last, PCATCH, "con4", hz);
1257 * Figure out how many receive buffers we want: 10 + nts * 2
1258 * 1 timeslot, 50 bytes packets -> 68msec
1259 * 31 timeslots, 50 bytes packets -> 14msec
1261 sch->nmd = nmd = 200 + nts * 4;
1262 sch->rx_last_md = 0;
1263 sc->mdt[ch] = kmalloc(sizeof(struct mdesc) * nmd, M_MUSYCC, M_WAITOK);
1264 sc->mdr[ch] = kmalloc(sizeof(struct mdesc) * nmd, M_MUSYCC, M_WAITOK);
1265 for (i = 0; i < nmd; i++) {
1267 sc->mdt[ch][i].snext = &sc->mdt[ch][0];
1268 sc->mdt[ch][i].next = vtophys(sc->mdt[ch][i].snext);
1269 sc->mdr[ch][i].snext = &sc->mdr[ch][0];
1270 sc->mdr[ch][i].next = vtophys(sc->mdr[ch][i].snext);
1272 sc->mdt[ch][i].snext = &sc->mdt[ch][i + 1];
1273 sc->mdt[ch][i].next = vtophys(sc->mdt[ch][i].snext);
1274 sc->mdr[ch][i].snext = &sc->mdr[ch][i + 1];
1275 sc->mdr[ch][i].next = vtophys(sc->mdr[ch][i].snext);
1277 sc->mdt[ch][i].status = 0;
1278 sc->mdt[ch][i].m = NULL;
1279 sc->mdt[ch][i].data = 0;
1281 MGETHDR(m, MB_WAIT, MT_DATA);
1285 if ((m->m_flags & M_EXT) == 0) {
1286 /* We've waited mbuf_wait and still got nothing.
1287 We're calling with MB_TRYWAIT anyway - a little
1288 defensive programming costs us very little - if
1289 anything at all in the case of error. */
1293 sc->mdr[ch][i].m = m;
1294 sc->mdr[ch][i].data = vtophys(m->m_data);
1295 sc->mdr[ch][i].status = 1600; /* MTU */
1297 sch->tx_last_md = sch->tx_next_md = &sc->mdt[ch][0];
1299 /* Configure it into the chip */
1300 sc->ram->thp[ch] = vtophys(&sc->mdt[ch][0]);
1301 sc->ram->tmp[ch] = vtophys(&sc->mdt[ch][0]);
1302 sc->ram->rhp[ch] = vtophys(&sc->mdr[ch][0]);
1303 sc->ram->rmp[ch] = vtophys(&sc->mdr[ch][0]);
1305 /* Activate the Channel */
1306 sc->reg->srd = sc->last = 0x0800 + ch;
1307 tsleep(&sc->last, PCATCH, "con4", hz);
1308 sc->reg->srd = sc->last = 0x0820 + ch;
1309 tsleep(&sc->last, PCATCH, "con3", hz);
1315 /* Don't leak all the previously allocated mbufs in this loop */
1317 m_free(sc->mdr[ch][i].m);
1319 kfree(sc->mdt[ch], M_MUSYCC);
1320 kfree(sc->mdr[ch], M_MUSYCC);
1325 musycc_disconnect(hook_p hook)
1332 sch = hook->private;
1337 while (csc->state != C_RUNNING)
1338 tsleep(&csc->state, PCATCH, "crun", hz/10);
1340 /* Deactivate the channel */
1341 sc->reg->srd = sc->last = 0x0900 + sch->chan;
1342 tsleep(&sc->last, PCATCH, "con3", hz);
1343 sc->reg->srd = sc->last = 0x0920 + sch->chan;
1344 tsleep(&sc->last, PCATCH, "con4", hz);
1346 if (sch->state == DOWN)
1350 sc->ram->thp[ch] = 0;
1351 sc->ram->tmp[ch] = 0;
1352 sc->ram->rhp[ch] = 0;
1353 sc->ram->rmp[ch] = 0;
1354 for (i = 0; i < sch->nmd; i++) {
1355 if (sc->mdt[ch][i].m != NULL)
1356 m_freem(sc->mdt[ch][i].m);
1357 if (sc->mdr[ch][i].m != NULL)
1358 m_freem(sc->mdr[ch][i].m);
1360 kfree(sc->mdt[ch], M_MUSYCC);
1362 kfree(sc->mdr[ch], M_MUSYCC);
1365 for (i = 0; i < 32; i++) {
1366 if (sch->ts & (1 << i)) {
1367 sc->ram->rtsm[i] = 0;
1368 sc->ram->ttsm[i] = 0;
1372 sch->tx_pending = 0;
1380 * PCI initialization stuff
1384 musycc_probe(device_t self)
1388 if (sizeof(struct groupr) != 1572) {
1389 kprintf("sizeof(struct groupr) = %d, should be 1572\n",
1390 sizeof(struct groupr));
1394 if (sizeof(struct globalr) != 1572) {
1395 kprintf("sizeof(struct globalr) = %d, should be 1572\n",
1396 sizeof(struct globalr));
1400 if (sizeof(struct mycg) > 2048) {
1401 kprintf("sizeof(struct mycg) = %d, should be <= 2048\n",
1402 sizeof(struct mycg));
1406 switch (pci_get_devid(self)) {
1407 case 0x8471109e: strcpy(desc, "CN8471 MUSYCC"); break;
1408 case 0x8472109e: strcpy(desc, "CN8472 MUSYCC"); break;
1409 case 0x8474109e: strcpy(desc, "CN8474 MUSYCC"); break;
1410 case 0x8478109e: strcpy(desc, "CN8478 MUSYCC"); break;
1415 switch (pci_get_function(self)) {
1416 case 0: strcat(desc, " Network controller"); break;
1417 case 1: strcat(desc, " Ebus bridge"); break;
1422 device_set_desc_copy(self, desc);
1427 musycc_attach(device_t self)
1430 struct resource *res;
1439 error = ng_newtype(&ngtypestruct);
1441 kprintf("ng_newtype() failed %d\n", error);
1443 kprintf("We have %d pad bytes in mycg\n", 2048 - sizeof(struct mycg));
1445 f = pci_get_function(self);
1446 /* For function zero allocate a csoftc */
1448 csc = kmalloc(sizeof(*csc), M_MUSYCC, M_WAITOK | M_ZERO);
1449 csc->bus = pci_get_bus(self);
1450 csc->slot = pci_get_slot(self);
1451 LIST_INSERT_HEAD(&sc_list, csc, list);
1453 LIST_FOREACH(csc, &sc_list, list) {
1454 if (csc->bus != pci_get_bus(self))
1456 if (csc->slot != pci_get_slot(self))
1462 device_set_softc(self, csc);
1464 res = bus_alloc_resource(self, SYS_RES_MEMORY, &rid,
1465 0, ~0, 1, RF_ACTIVE);
1467 device_printf(self, "Could not map memory\n");
1470 csc->virbase[f] = (u_char *)rman_get_virtual(res);
1471 csc->physbase[f] = rman_get_start(res);
1473 /* Allocate interrupt */
1475 csc->irq[f] = bus_alloc_resource(self, SYS_RES_IRQ, &rid, 0, ~0,
1476 1, RF_SHAREABLE | RF_ACTIVE);
1478 if (csc->irq[f] == NULL) {
1479 kprintf("couldn't map interrupt\n");
1483 error = bus_setup_intr(self, csc->irq[f], 0,
1484 (f == 0 ? musycc_intr0 : musycc_intr1), csc,
1485 &csc->intrhand[f], NULL);
1488 kprintf("couldn't set up irq\n");
1495 for (i = 0; i < 2; i++)
1496 kprintf("f%d: device %p virtual %p physical %08x\n",
1497 i, csc->f[i], csc->virbase[i], csc->physbase[i]);
1499 csc->reg = (struct globalr *)csc->virbase[0];
1500 csc->reg->glcd = 0x3f30; /* XXX: designer magic */
1501 u32p = (u_int32_t *)csc->virbase[1];
1503 if ((u & 0xffff0000) != 0x13760000) {
1504 kprintf("Not a LMC1504 (ID is 0x%08x). Bailing out.\n", u);
1507 csc->nchan = (u >> 8) & 0xf;
1508 kprintf("Found <LanMedia LMC1504 Rev %d Chan %d>\n", (u >> 12) & 0xf, csc->nchan);
1511 csc->cregp = &u32p[0x1000];
1512 *csc->cregp = csc->creg;
1513 for (i = 0; i < csc->nchan; i++) {
1514 sc = &csc->serial[i];
1516 sc->last = 0xffffffff;
1517 sc->ds8370 = (u_int32_t *)
1518 (csc->virbase[1] + i * 0x800);
1519 sc->ds847x = csc->virbase[0] + i * 0x800;
1520 sc->reg = (struct globalr *)
1521 (csc->virbase[0] + i * 0x800);
1522 sc->mycg = kmalloc(sizeof(struct mycg), M_MUSYCC,
1524 sc->ram = &sc->mycg->cg;
1526 error = ng_make_node_common(&ngtypestruct, &sc->node);
1528 kprintf("ng_make_node_common() failed %d\n", error);
1531 sc->node->private = sc;
1532 ksprintf(sc->nodename, "sync-%d-%d-%d",
1536 error = ng_name_node(sc->node, sc->nodename);
1537 /* XXX Apparently failure isn't a problem */
1539 csc->ram = (struct globalr *)&csc->serial[0].mycg->cg;
1540 sc = &csc->serial[0];
1541 sc->reg->srd = sc->last = 0x100;
1542 csc->state = C_IDLE;
1547 static device_method_t musycc_methods[] = {
1548 /* Device interface */
1549 DEVMETHOD(device_probe, musycc_probe),
1550 DEVMETHOD(device_attach, musycc_attach),
1551 DEVMETHOD(device_suspend, bus_generic_suspend),
1552 DEVMETHOD(device_resume, bus_generic_resume),
1553 DEVMETHOD(device_shutdown, bus_generic_shutdown),
1558 static driver_t musycc_driver = {
1564 DRIVER_MODULE(musycc, pci, musycc_driver, musycc_devclass, NULL, NULL);