2 * Copyright (c) 2001-2003, Shunsuke Akiyama <akiyama@FreeBSD.org>.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #define RUE_CONFIG_IDX 0 /* config number 1 */
30 #define RUE_IFACE_IDX 0
32 #define RUE_INTR_PKTLEN 0x8
34 #define RUE_TIMEOUT 50
35 #define RUE_MIN_FRAMELEN 60
38 #define RUE_IDR0 0x0120
39 #define RUE_IDR1 0x0121
40 #define RUE_IDR2 0x0122
41 #define RUE_IDR3 0x0123
42 #define RUE_IDR4 0x0124
43 #define RUE_IDR5 0x0125
45 #define RUE_MAR0 0x0126
46 #define RUE_MAR1 0x0127
47 #define RUE_MAR2 0x0128
48 #define RUE_MAR3 0x0129
49 #define RUE_MAR4 0x012A
50 #define RUE_MAR5 0x012B
51 #define RUE_MAR6 0x012C
52 #define RUE_MAR7 0x012D
54 #define RUE_CR 0x012E /* B, R/W */
55 #define RUE_CR_SOFT_RST 0x10
56 #define RUE_CR_RE 0x08
57 #define RUE_CR_TE 0x04
58 #define RUE_CR_EP3CLREN 0x02
60 #define RUE_TCR 0x012F /* B, R/W */
61 #define RUE_TCR_TXRR1 0x80
62 #define RUE_TCR_TXRR0 0x40
63 #define RUE_TCR_IFG1 0x10
64 #define RUE_TCR_IFG0 0x08
65 #define RUE_TCR_NOCRC 0x01
66 #define RUE_TCR_CONFIG (RUE_TCR_TXRR1 | RUE_TCR_TXRR0 | \
67 RUE_TCR_IFG1 | RUE_TCR_IFG0)
69 #define RUE_RCR 0x0130 /* W, R/W */
70 #define RUE_RCR_TAIL 0x80
71 #define RUE_RCR_AER 0x40
72 #define RUE_RCR_AR 0x20
73 #define RUE_RCR_AM 0x10
74 #define RUE_RCR_AB 0x08
75 #define RUE_RCR_AD 0x04
76 #define RUE_RCR_AAM 0x02
77 #define RUE_RCR_AAP 0x01
78 #define RUE_RCR_CONFIG (RUE_RCR_TAIL | RUE_RCR_AD)
80 #define RUE_TSR 0x0132
81 #define RUE_RSR 0x0133
82 #define RUE_CON0 0x0135
83 #define RUE_CON1 0x0136
84 #define RUE_MSR 0x0137
85 #define RUE_PHYADD 0x0138
86 #define RUE_PHYDAT 0x0139
88 #define RUE_PHYCNT 0x013B /* B, R/W */
89 #define RUE_PHYCNT_PHYOWN 0x40
90 #define RUE_PHYCNT_RWCR 0x20
92 #define RUE_GPPC 0x013D
93 #define RUE_WAKECNT 0x013E
95 #define RUE_BMCR 0x0140
96 #define RUE_BMCR_SPD_SET 0x2000
97 #define RUE_BMCR_DUPLEX 0x0100
99 #define RUE_BMSR 0x0142
101 #define RUE_ANAR 0x0144 /* W, R/W */
102 #define RUE_ANAR_PAUSE 0x0400
104 #define RUE_ANLP 0x0146 /* W, R/O */
105 #define RUE_ANLP_PAUSE 0x0400
107 #define RUE_AER 0x0148
109 #define RUE_NWAYT 0x014A
110 #define RUE_CSCR 0x014C
112 #define RUE_CRC0 0x014E
113 #define RUE_CRC1 0x0150
114 #define RUE_CRC2 0x0152
115 #define RUE_CRC3 0x0154
116 #define RUE_CRC4 0x0156
118 #define RUE_BYTEMASK0 0x0158
119 #define RUE_BYTEMASK1 0x0160
120 #define RUE_BYTEMASK2 0x0168
121 #define RUE_BYTEMASK3 0x0170
122 #define RUE_BYTEMASK4 0x0178
124 #define RUE_PHY1 0x0180
125 #define RUE_PHY2 0x0184
127 #define RUE_TW1 0x0186
129 #define RUE_REG_MIN 0x0120
130 #define RUE_REG_MAX 0x0189
132 /* EEPROM address declarations. */
133 #define RUE_EEPROM_BASE 0x1200
134 #define RUE_EEPROM_IDR0 (RUE_EEPROM_BASE + 0x02)
135 #define RUE_EEPROM_IDR1 (RUE_EEPROM_BASE + 0x03)
136 #define RUE_EEPROM_IDR2 (RUE_EEPROM_BASE + 0x03)
137 #define RUE_EEPROM_IDR3 (RUE_EEPROM_BASE + 0x03)
138 #define RUE_EEPROM_IDR4 (RUE_EEPROM_BASE + 0x03)
139 #define RUE_EEPROM_IDR5 (RUE_EEPROM_BASE + 0x03)
140 #define RUE_EEPROM_INTERVAL (RUE_EEPROM_BASE + 0x17)
142 #define RUE_RXSTAT_VALID (0x01 << 12)
143 #define RUE_RXSTAT_RUNT (0x02 << 12)
144 #define RUE_RXSTAT_PMATCH (0x04 << 12)
145 #define RUE_RXSTAT_MCAST (0x08 << 12)
147 #define GET_MII(sc) uether_getmii(&(sc)->sc_ue)
154 uint8_t rue_txok_cnt;
155 uint8_t rue_rxlost_cnt;
156 uint8_t rue_crcerr_cnt;
168 struct usb_ether sc_ue;
170 struct usb_xfer *sc_xfer[RUE_N_TRANSFER];
173 #define RUE_FLAG_LINK 0x0001
176 #define RUE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
177 #define RUE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
178 #define RUE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t)