kernel - Add MONITOR/MWAIT support to the LWKT scheduler
[dragonfly.git] / sys / platform / pc64 / x86_64 / machdep.c
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1/*-
2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * William Jolitz.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * SUCH DAMAGE.
38 *
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
41 */
42
43//#include "use_npx.h"
44#include "use_isa.h"
45#include "opt_atalk.h"
46#include "opt_compat.h"
47#include "opt_cpu.h"
48#include "opt_ddb.h"
49#include "opt_directio.h"
50#include "opt_inet.h"
51#include "opt_ipx.h"
52#include "opt_msgbuf.h"
53#include "opt_swap.h"
54#include "opt_apic.h"
55
56#include <sys/param.h>
57#include <sys/systm.h>
58#include <sys/sysproto.h>
59#include <sys/signalvar.h>
60#include <sys/kernel.h>
61#include <sys/linker.h>
62#include <sys/malloc.h>
63#include <sys/proc.h>
64#include <sys/priv.h>
65#include <sys/buf.h>
66#include <sys/reboot.h>
67#include <sys/mbuf.h>
68#include <sys/msgbuf.h>
69#include <sys/sysent.h>
70#include <sys/sysctl.h>
71#include <sys/vmmeter.h>
72#include <sys/bus.h>
73#include <sys/upcall.h>
74#include <sys/usched.h>
75#include <sys/reg.h>
76
77#include <vm/vm.h>
78#include <vm/vm_param.h>
79#include <sys/lock.h>
80#include <vm/vm_kern.h>
81#include <vm/vm_object.h>
82#include <vm/vm_page.h>
83#include <vm/vm_map.h>
84#include <vm/vm_pager.h>
85#include <vm/vm_extern.h>
86
87#include <sys/thread2.h>
88#include <sys/mplock2.h>
89
90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
96#include <machine/cpu.h>
97#include <machine/clock.h>
98#include <machine/specialreg.h>
99#if JG
100#include <machine/bootinfo.h>
101#endif
102#include <machine/md_var.h>
103#include <machine/metadata.h>
104#include <machine/pc/bios.h>
105#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
106#include <machine/globaldata.h> /* CPU_prvspace */
107#include <machine/smp.h>
108#ifdef PERFMON
109#include <machine/perfmon.h>
110#endif
111#include <machine/cputypes.h>
112
113#ifdef OLD_BUS_ARCH
114#include <bus/isa/isa_device.h>
115#endif
116#include <machine_base/isa/intr_machdep.h>
117#include <bus/isa/rtc.h>
118#include <sys/random.h>
119#include <sys/ptrace.h>
120#include <machine/sigframe.h>
121
122#include <sys/machintr.h>
123
124#define PHYSMAP_ENTRIES 10
125
126extern void init386(int first);
127extern void dblfault_handler(void);
128extern u_int64_t hammer_time(u_int64_t, u_int64_t);
129
130extern void printcpuinfo(void); /* XXX header file */
131extern void identify_cpu(void);
132#if JG
133extern void finishidentcpu(void);
134#endif
135extern void panicifcpuunsupported(void);
136
137static void cpu_startup(void *);
138#ifndef CPU_DISABLE_SSE
139static void set_fpregs_xmm(struct save87 *, struct savexmm *);
140static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
141#endif /* CPU_DISABLE_SSE */
142#ifdef DIRECTIO
143extern void ffs_rawread_setup(void);
144#endif /* DIRECTIO */
145static void init_locks(void);
146
147SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
148
149#ifdef DDB
150extern vm_offset_t ksym_start, ksym_end;
151#endif
152
153struct privatespace CPU_prvspace[MAXCPU] __aligned(4096); /* XXX */
154
155int _udatasel, _ucodesel, _ucode32sel;
156u_long atdevbase;
157#ifdef SMP
158int64_t tsc_offsets[MAXCPU];
159#else
160int64_t tsc_offsets[1];
161#endif
162
163#if defined(SWTCH_OPTIM_STATS)
164extern int swtch_optim_stats;
165SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
166 CTLFLAG_RD, &swtch_optim_stats, 0, "");
167SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
168 CTLFLAG_RD, &tlb_flush_count, 0, "");
169#endif
170
171int physmem = 0;
172
173u_long ebda_addr = 0;
174
175static int
176sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
177{
178 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
179 return (error);
180}
181
182SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
183 0, 0, sysctl_hw_physmem, "IU", "");
184
185static int
186sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
187{
188 int error = sysctl_handle_int(oidp, 0,
189 ctob(physmem - vmstats.v_wire_count), req);
190 return (error);
191}
192
193SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
194 0, 0, sysctl_hw_usermem, "IU", "");
195
196static int
197sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
198{
199 int error = sysctl_handle_int(oidp, 0,
200 x86_64_btop(avail_end - avail_start), req);
201 return (error);
202}
203
204SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
205 0, 0, sysctl_hw_availpages, "I", "");
206
207vm_paddr_t Maxmem;
208vm_paddr_t Realmem;
209
210/*
211 * The number of PHYSMAP entries must be one less than the number of
212 * PHYSSEG entries because the PHYSMAP entry that spans the largest
213 * physical address that is accessible by ISA DMA is split into two
214 * PHYSSEG entries.
215 */
216#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
217
218vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
219vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
220
221/* must be 2 less so 0 0 can signal end of chunks */
222#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
223#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
224
225static vm_offset_t buffer_sva, buffer_eva;
226vm_offset_t clean_sva, clean_eva;
227static vm_offset_t pager_sva, pager_eva;
228static struct trapframe proc0_tf;
229
230static void
231cpu_startup(void *dummy)
232{
233 caddr_t v;
234 vm_size_t size = 0;
235 vm_offset_t firstaddr;
236
237 if (boothowto & RB_VERBOSE)
238 bootverbose++;
239
240 /*
241 * Good {morning,afternoon,evening,night}.
242 */
243 kprintf("%s", version);
244 startrtclock();
245 printcpuinfo();
246 panicifcpuunsupported();
247#ifdef PERFMON
248 perfmon_init();
249#endif
250 kprintf("real memory = %ju (%ju MB)\n",
251 (intmax_t)Realmem,
252 (intmax_t)Realmem / 1024 / 1024);
253 /*
254 * Display any holes after the first chunk of extended memory.
255 */
256 if (bootverbose) {
257 int indx;
258
259 kprintf("Physical memory chunk(s):\n");
260 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
261 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
262
263 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
264 (intmax_t)phys_avail[indx],
265 (intmax_t)phys_avail[indx + 1] - 1,
266 (intmax_t)size1,
267 (intmax_t)(size1 / PAGE_SIZE));
268 }
269 }
270
271 /*
272 * Allocate space for system data structures.
273 * The first available kernel virtual address is in "v".
274 * As pages of kernel virtual memory are allocated, "v" is incremented.
275 * As pages of memory are allocated and cleared,
276 * "firstaddr" is incremented.
277 * An index into the kernel page table corresponding to the
278 * virtual memory address maintained in "v" is kept in "mapaddr".
279 */
280
281 /*
282 * Make two passes. The first pass calculates how much memory is
283 * needed and allocates it. The second pass assigns virtual
284 * addresses to the various data structures.
285 */
286 firstaddr = 0;
287again:
288 v = (caddr_t)firstaddr;
289
290#define valloc(name, type, num) \
291 (name) = (type *)v; v = (caddr_t)((name)+(num))
292#define valloclim(name, type, num, lim) \
293 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
294
295 /*
296 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
297 * For the first 64MB of ram nominally allocate sufficient buffers to
298 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
299 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
300 * the buffer cache we limit the eventual kva reservation to
301 * maxbcache bytes.
302 *
303 * factor represents the 1/4 x ram conversion.
304 */
305 if (nbuf == 0) {
306 int factor = 4 * BKVASIZE / 1024;
307 int kbytes = physmem * (PAGE_SIZE / 1024);
308
309 nbuf = 50;
310 if (kbytes > 4096)
311 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
312 if (kbytes > 65536)
313 nbuf += (kbytes - 65536) * 2 / (factor * 5);
314 if (maxbcache && nbuf > maxbcache / BKVASIZE)
315 nbuf = maxbcache / BKVASIZE;
316 }
317
318 /*
319 * Do not allow the buffer_map to be more then 1/2 the size of the
320 * kernel_map.
321 */
322 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
323 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
324 kprintf("Warning: nbufs capped at %d\n", nbuf);
325 }
326
327 nswbuf = max(min(nbuf/4, 256), 16);
328#ifdef NSWBUF_MIN
329 if (nswbuf < NSWBUF_MIN)
330 nswbuf = NSWBUF_MIN;
331#endif
332#ifdef DIRECTIO
333 ffs_rawread_setup();
334#endif
335
336 valloc(swbuf, struct buf, nswbuf);
337 valloc(buf, struct buf, nbuf);
338
339 /*
340 * End of first pass, size has been calculated so allocate memory
341 */
342 if (firstaddr == 0) {
343 size = (vm_size_t)(v - firstaddr);
344 firstaddr = kmem_alloc(&kernel_map, round_page(size));
345 if (firstaddr == 0)
346 panic("startup: no room for tables");
347 goto again;
348 }
349
350 /*
351 * End of second pass, addresses have been assigned
352 */
353 if ((vm_size_t)(v - firstaddr) != size)
354 panic("startup: table size inconsistency");
355
356 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
357 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
358 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
359 (nbuf*BKVASIZE));
360 buffer_map.system_map = 1;
361 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
362 (nswbuf*MAXPHYS) + pager_map_size);
363 pager_map.system_map = 1;
364
365#if defined(USERCONFIG)
366 userconfig();
367 cninit(); /* the preferred console may have changed */
368#endif
369
370 kprintf("avail memory = %ju (%ju MB)\n",
371 (uintmax_t)ptoa(vmstats.v_free_count),
372 (uintmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
373
374 /*
375 * Set up buffers, so they can be used to read disk labels.
376 */
377 bufinit();
378 vm_pager_bufferinit();
379
380#ifdef SMP
381 /*
382 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
383 */
384 mp_start(); /* fire up the APs and APICs */
385 mp_announce();
386#endif /* SMP */
387 cpu_setregs();
388}
389
390/*
391 * Send an interrupt to process.
392 *
393 * Stack is set up to allow sigcode stored
394 * at top to call routine, followed by kcall
395 * to sigreturn routine below. After sigreturn
396 * resets the signal mask, the stack, and the
397 * frame pointer, it returns to the user
398 * specified pc, psl.
399 */
400void
401sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
402{
403 struct lwp *lp = curthread->td_lwp;
404 struct proc *p = lp->lwp_proc;
405 struct trapframe *regs;
406 struct sigacts *psp = p->p_sigacts;
407 struct sigframe sf, *sfp;
408 int oonstack;
409 char *sp;
410
411 regs = lp->lwp_md.md_regs;
412 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
413
414 /* Save user context */
415 bzero(&sf, sizeof(struct sigframe));
416 sf.sf_uc.uc_sigmask = *mask;
417 sf.sf_uc.uc_stack = lp->lwp_sigstk;
418 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
419 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
420 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
421
422 /* Make the size of the saved context visible to userland */
423 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
424
425 /* Save mailbox pending state for syscall interlock semantics */
426 if (p->p_flag & P_MAILBOX)
427 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
428
429 /* Allocate and validate space for the signal handler context. */
430 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
431 SIGISMEMBER(psp->ps_sigonstack, sig)) {
432 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
433 sizeof(struct sigframe));
434 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
435 } else {
436 /* We take red zone into account */
437 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
438 }
439
440 /* Align to 16 bytes */
441 sfp = (struct sigframe *)((intptr_t)sp & ~(intptr_t)0xF);
442
443 /* Translate the signal is appropriate */
444 if (p->p_sysent->sv_sigtbl) {
445 if (sig <= p->p_sysent->sv_sigsize)
446 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
447 }
448
449 /*
450 * Build the argument list for the signal handler.
451 *
452 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
453 */
454 regs->tf_rdi = sig; /* argument 1 */
455 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
456
457 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
458 /*
459 * Signal handler installed with SA_SIGINFO.
460 *
461 * action(signo, siginfo, ucontext)
462 */
463 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
464 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
465 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
466
467 /* fill siginfo structure */
468 sf.sf_si.si_signo = sig;
469 sf.sf_si.si_code = code;
470 sf.sf_si.si_addr = (void *)regs->tf_addr;
471 } else {
472 /*
473 * Old FreeBSD-style arguments.
474 *
475 * handler (signo, code, [uc], addr)
476 */
477 regs->tf_rsi = (register_t)code; /* argument 2 */
478 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
479 sf.sf_ahu.sf_handler = catcher;
480 }
481
482 /*
483 * If we're a vm86 process, we want to save the segment registers.
484 * We also change eflags to be our emulated eflags, not the actual
485 * eflags.
486 */
487#if JG
488 if (regs->tf_eflags & PSL_VM) {
489 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
490 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
491
492 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
493 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
494 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
495 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
496
497 if (vm86->vm86_has_vme == 0)
498 sf.sf_uc.uc_mcontext.mc_eflags =
499 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
500 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
501
502 /*
503 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
504 * syscalls made by the signal handler. This just avoids
505 * wasting time for our lazy fixup of such faults. PSL_NT
506 * does nothing in vm86 mode, but vm86 programs can set it
507 * almost legitimately in probes for old cpu types.
508 */
509 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
510 }
511#endif
512
513 /*
514 * Save the FPU state and reinit the FP unit
515 */
516 npxpush(&sf.sf_uc.uc_mcontext);
517
518 /*
519 * Copy the sigframe out to the user's stack.
520 */
521 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
522 /*
523 * Something is wrong with the stack pointer.
524 * ...Kill the process.
525 */
526 sigexit(lp, SIGILL);
527 }
528
529 regs->tf_rsp = (register_t)sfp;
530 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
531
532 /*
533 * i386 abi specifies that the direction flag must be cleared
534 * on function entry
535 */
536 regs->tf_rflags &= ~(PSL_T|PSL_D);
537
538 /*
539 * 64 bit mode has a code and stack selector but
540 * no data or extra selector. %fs and %gs are not
541 * stored in-context.
542 */
543 regs->tf_cs = _ucodesel;
544 regs->tf_ss = _udatasel;
545}
546
547/*
548 * Sanitize the trapframe for a virtual kernel passing control to a custom
549 * VM context. Remove any items that would otherwise create a privilage
550 * issue.
551 *
552 * XXX at the moment we allow userland to set the resume flag. Is this a
553 * bad idea?
554 */
555int
556cpu_sanitize_frame(struct trapframe *frame)
557{
558 frame->tf_cs = _ucodesel;
559 frame->tf_ss = _udatasel;
560 /* XXX VM (8086) mode not supported? */
561 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
562 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
563
564 return(0);
565}
566
567/*
568 * Sanitize the tls so loading the descriptor does not blow up
569 * on us. For x86_64 we don't have to do anything.
570 */
571int
572cpu_sanitize_tls(struct savetls *tls)
573{
574 return(0);
575}
576
577/*
578 * sigreturn(ucontext_t *sigcntxp)
579 *
580 * System call to cleanup state after a signal
581 * has been taken. Reset signal mask and
582 * stack state from context left by sendsig (above).
583 * Return to previous pc and psl as specified by
584 * context left by sendsig. Check carefully to
585 * make sure that the user has not modified the
586 * state to gain improper privileges.
587 *
588 * MPSAFE
589 */
590#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
591#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
592
593int
594sys_sigreturn(struct sigreturn_args *uap)
595{
596 struct lwp *lp = curthread->td_lwp;
597 struct proc *p = lp->lwp_proc;
598 struct trapframe *regs;
599 ucontext_t uc;
600 ucontext_t *ucp;
601 register_t rflags;
602 int cs;
603 int error;
604
605 /*
606 * We have to copy the information into kernel space so userland
607 * can't modify it while we are sniffing it.
608 */
609 regs = lp->lwp_md.md_regs;
610 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
611 if (error)
612 return (error);
613 ucp = &uc;
614 rflags = ucp->uc_mcontext.mc_rflags;
615
616 /* VM (8086) mode not supported */
617 rflags &= ~PSL_VM_UNSUPP;
618
619#if JG
620 if (eflags & PSL_VM) {
621 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
622 struct vm86_kernel *vm86;
623
624 /*
625 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
626 * set up the vm86 area, and we can't enter vm86 mode.
627 */
628 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
629 return (EINVAL);
630 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
631 if (vm86->vm86_inited == 0)
632 return (EINVAL);
633
634 /* go back to user mode if both flags are set */
635 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
636 trapsignal(lp, SIGBUS, 0);
637
638 if (vm86->vm86_has_vme) {
639 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
640 (eflags & VME_USERCHANGE) | PSL_VM;
641 } else {
642 vm86->vm86_eflags = eflags; /* save VIF, VIP */
643 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
644 (eflags & VM_USERCHANGE) | PSL_VM;
645 }
646 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
647 tf->tf_eflags = eflags;
648 tf->tf_vm86_ds = tf->tf_ds;
649 tf->tf_vm86_es = tf->tf_es;
650 tf->tf_vm86_fs = tf->tf_fs;
651 tf->tf_vm86_gs = tf->tf_gs;
652 tf->tf_ds = _udatasel;
653 tf->tf_es = _udatasel;
654 tf->tf_fs = _udatasel;
655 tf->tf_gs = _udatasel;
656 } else
657#endif
658 {
659 /*
660 * Don't allow users to change privileged or reserved flags.
661 */
662 /*
663 * XXX do allow users to change the privileged flag PSL_RF.
664 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
665 * should sometimes set it there too. tf_eflags is kept in
666 * the signal context during signal handling and there is no
667 * other place to remember it, so the PSL_RF bit may be
668 * corrupted by the signal handler without us knowing.
669 * Corruption of the PSL_RF bit at worst causes one more or
670 * one less debugger trap, so allowing it is fairly harmless.
671 */
672 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
673 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
674 return(EINVAL);
675 }
676
677 /*
678 * Don't allow users to load a valid privileged %cs. Let the
679 * hardware check for invalid selectors, excess privilege in
680 * other selectors, invalid %eip's and invalid %esp's.
681 */
682 cs = ucp->uc_mcontext.mc_cs;
683 if (!CS_SECURE(cs)) {
684 kprintf("sigreturn: cs = 0x%x\n", cs);
685 trapsignal(lp, SIGBUS, T_PROTFLT);
686 return(EINVAL);
687 }
688 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
689 }
690
691 /*
692 * Restore the FPU state from the frame
693 */
694 crit_enter();
695 npxpop(&ucp->uc_mcontext);
696
697 /*
698 * Merge saved signal mailbox pending flag to maintain interlock
699 * semantics against system calls.
700 */
701 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
702 p->p_flag |= P_MAILBOX;
703
704 if (ucp->uc_mcontext.mc_onstack & 1)
705 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
706 else
707 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
708
709 lp->lwp_sigmask = ucp->uc_sigmask;
710 SIG_CANTMASK(lp->lwp_sigmask);
711 crit_exit();
712 return(EJUSTRETURN);
713}
714
715/*
716 * Stack frame on entry to function. %rax will contain the function vector,
717 * %rcx will contain the function data. flags, rcx, and rax will have
718 * already been pushed on the stack.
719 */
720struct upc_frame {
721 register_t rax;
722 register_t rcx;
723 register_t rdx;
724 register_t flags;
725 register_t oldip;
726};
727
728void
729sendupcall(struct vmupcall *vu, int morepending)
730{
731 struct lwp *lp = curthread->td_lwp;
732 struct trapframe *regs;
733 struct upcall upcall;
734 struct upc_frame upc_frame;
735 int crit_count = 0;
736
737 /*
738 * If we are a virtual kernel running an emulated user process
739 * context, switch back to the virtual kernel context before
740 * trying to post the signal.
741 */
742 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
743 lp->lwp_md.md_regs->tf_trapno = 0;
744 vkernel_trap(lp, lp->lwp_md.md_regs);
745 }
746
747 /*
748 * Get the upcall data structure
749 */
750 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
751 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
752 ) {
753 vu->vu_pending = 0;
754 kprintf("bad upcall address\n");
755 return;
756 }
757
758 /*
759 * If the data structure is already marked pending or has a critical
760 * section count, mark the data structure as pending and return
761 * without doing an upcall. vu_pending is left set.
762 */
763 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
764 if (upcall.upc_pending < vu->vu_pending) {
765 upcall.upc_pending = vu->vu_pending;
766 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
767 sizeof(upcall.upc_pending));
768 }
769 return;
770 }
771
772 /*
773 * We can run this upcall now, clear vu_pending.
774 *
775 * Bump our critical section count and set or clear the
776 * user pending flag depending on whether more upcalls are
777 * pending. The user will be responsible for calling
778 * upc_dispatch(-1) to process remaining upcalls.
779 */
780 vu->vu_pending = 0;
781 upcall.upc_pending = morepending;
782 ++crit_count;
783 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
784 sizeof(upcall.upc_pending));
785 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
786 sizeof(int));
787
788 /*
789 * Construct a stack frame and issue the upcall
790 */
791 regs = lp->lwp_md.md_regs;
792 upc_frame.rax = regs->tf_rax;
793 upc_frame.rcx = regs->tf_rcx;
794 upc_frame.rdx = regs->tf_rdx;
795 upc_frame.flags = regs->tf_rflags;
796 upc_frame.oldip = regs->tf_rip;
797 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
798 sizeof(upc_frame)) != 0) {
799 kprintf("bad stack on upcall\n");
800 } else {
801 regs->tf_rax = (register_t)vu->vu_func;
802 regs->tf_rcx = (register_t)vu->vu_data;
803 regs->tf_rdx = (register_t)lp->lwp_upcall;
804 regs->tf_rip = (register_t)vu->vu_ctx;
805 regs->tf_rsp -= sizeof(upc_frame);
806 }
807}
808
809/*
810 * fetchupcall occurs in the context of a system call, which means that
811 * we have to return EJUSTRETURN in order to prevent eax and edx from
812 * being overwritten by the syscall return value.
813 *
814 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
815 * and the function pointer in %eax.
816 */
817int
818fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
819{
820 struct upc_frame upc_frame;
821 struct lwp *lp = curthread->td_lwp;
822 struct trapframe *regs;
823 int error;
824 struct upcall upcall;
825 int crit_count;
826
827 regs = lp->lwp_md.md_regs;
828
829 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
830 if (error == 0) {
831 if (vu) {
832 /*
833 * This jumps us to the next ready context.
834 */
835 vu->vu_pending = 0;
836 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
837 crit_count = 0;
838 if (error == 0)
839 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
840 ++crit_count;
841 if (error == 0)
842 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
843 regs->tf_rax = (register_t)vu->vu_func;
844 regs->tf_rcx = (register_t)vu->vu_data;
845 regs->tf_rdx = (register_t)lp->lwp_upcall;
846 regs->tf_rip = (register_t)vu->vu_ctx;
847 regs->tf_rsp = (register_t)rsp;
848 } else {
849 /*
850 * This returns us to the originally interrupted code.
851 */
852 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
853 regs->tf_rax = upc_frame.rax;
854 regs->tf_rcx = upc_frame.rcx;
855 regs->tf_rdx = upc_frame.rdx;
856 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
857 (upc_frame.flags & PSL_USERCHANGE);
858 regs->tf_rip = upc_frame.oldip;
859 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
860 }
861 }
862 if (error == 0)
863 error = EJUSTRETURN;
864 return(error);
865}
866
867/*
868 * Machine dependent boot() routine
869 *
870 * I haven't seen anything to put here yet
871 * Possibly some stuff might be grafted back here from boot()
872 */
873void
874cpu_boot(int howto)
875{
876}
877
878/*
879 * Shutdown the CPU as much as possible
880 */
881void
882cpu_halt(void)
883{
884 for (;;)
885 __asm__ __volatile("hlt");
886}
887
888/*
889 * cpu_idle() represents the idle LWKT. You cannot return from this function
890 * (unless you want to blow things up!). Instead we look for runnable threads
891 * and loop or halt as appropriate. Giant is not held on entry to the thread.
892 *
893 * The main loop is entered with a critical section held, we must release
894 * the critical section before doing anything else. lwkt_switch() will
895 * check for pending interrupts due to entering and exiting its own
896 * critical section.
897 *
898 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
899 * However, there are cases where the idlethread will be entered with
900 * the possibility that no IPI will occur and in such cases
901 * lwkt_switch() sets TDF_IDLE_NOHLT.
902 *
903 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
904 * 1 to just use hlt and for debugging purposes.
905 */
906static int cpu_idle_hlt = 2;
907static int cpu_idle_hltcnt;
908static int cpu_idle_spincnt;
909SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
910 &cpu_idle_hlt, 0, "Idle loop HLT enable");
911SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
912 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
913SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
914 &cpu_idle_spincnt, 0, "Idle loop entry spins");
915
916static void
917cpu_idle_default_hook(void)
918{
919 /*
920 * We must guarentee that hlt is exactly the instruction
921 * following the sti.
922 */
923 __asm __volatile("sti; hlt");
924}
925
926/* Other subsystems (e.g., ACPI) can hook this later. */
927void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
928
929void
930cpu_idle(void)
931{
0f0466c0
MD
932 globaldata_t gd = mycpu;
933 struct thread *td = gd->gd_curthread;
934 int reqflags;
e130cdcb
MD
935
936 crit_exit();
937 KKASSERT(td->td_critcount == 0);
938 for (;;) {
939 /*
940 * See if there are any LWKTs ready to go.
941 */
942 lwkt_switch();
943
944 /*
945 * If we are going to halt call splz unconditionally after
946 * CLIing to catch any interrupt races. Note that we are
947 * at SPL0 and interrupts are enabled.
948 */
0f0466c0
MD
949 reqflags = gd->gd_reqflags;
950 if (cpu_idle_hlt == 1 &&
951 (cpu_mi_feature & CPU_MI_MONITOR) &&
952 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
953 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
954 } else if (cpu_idle_hlt) {
e130cdcb
MD
955 __asm __volatile("cli");
956 splz();
0f0466c0 957 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
e130cdcb
MD
958 if (cpu_idle_hlt == 1)
959 cpu_idle_default_hook();
960 else
961 cpu_idle_hook();
962 }
963 __asm __volatile("sti");
964 ++cpu_idle_hltcnt;
965 } else {
966 splz();
967 __asm __volatile("sti");
968 ++cpu_idle_spincnt;
969 }
970 }
971}
972
973#ifdef SMP
974
975/*
976 * This routine is called if a spinlock has been held through the
977 * exponential backoff period and is seriously contested. On a real cpu
978 * we let it spin.
979 */
980void
981cpu_spinlock_contested(void)
982{
983 cpu_pause();
984}
985
986#endif
987
988/*
989 * Clear registers on exec
990 */
991void
992exec_setregs(u_long entry, u_long stack, u_long ps_strings)
993{
994 struct thread *td = curthread;
995 struct lwp *lp = td->td_lwp;
996 struct pcb *pcb = td->td_pcb;
997 struct trapframe *regs = lp->lwp_md.md_regs;
998
999 /* was i386_user_cleanup() in NetBSD */
1000 user_ldt_free(pcb);
1001
1002 bzero((char *)regs, sizeof(struct trapframe));
1003 regs->tf_rip = entry;
1004 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1005 regs->tf_rdi = stack; /* argv */
1006 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1007 regs->tf_ss = _udatasel;
1008 regs->tf_cs = _ucodesel;
1009 regs->tf_rbx = ps_strings;
1010
1011 /*
1012 * Reset the hardware debug registers if they were in use.
1013 * They won't have any meaning for the newly exec'd process.
1014 */
1015 if (pcb->pcb_flags & PCB_DBREGS) {
1016 pcb->pcb_dr0 = 0;
1017 pcb->pcb_dr1 = 0;
1018 pcb->pcb_dr2 = 0;
1019 pcb->pcb_dr3 = 0;
1020 pcb->pcb_dr6 = 0;
1021 pcb->pcb_dr7 = 0; /* JG set bit 10? */
1022 if (pcb == td->td_pcb) {
1023 /*
1024 * Clear the debug registers on the running
1025 * CPU, otherwise they will end up affecting
1026 * the next process we switch to.
1027 */
1028 reset_dbregs();
1029 }
1030 pcb->pcb_flags &= ~PCB_DBREGS;
1031 }
1032
1033 /*
1034 * Initialize the math emulator (if any) for the current process.
1035 * Actually, just clear the bit that says that the emulator has
1036 * been initialized. Initialization is delayed until the process
1037 * traps to the emulator (if it is done at all) mainly because
1038 * emulators don't provide an entry point for initialization.
1039 */
1040 pcb->pcb_flags &= ~FP_SOFTFP;
1041
1042 /*
1043 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1044 * gd_npxthread. Otherwise a preemptive interrupt thread
1045 * may panic in npxdna().
1046 */
1047 crit_enter();
1048 load_cr0(rcr0() | CR0_MP);
1049
1050 /*
1051 * NOTE: The MSR values must be correct so we can return to
1052 * userland. gd_user_fs/gs must be correct so the switch
1053 * code knows what the current MSR values are.
1054 */
1055 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
1056 pcb->pcb_gsbase = 0;
1057 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1058 mdcpu->gd_user_gs = 0;
1059 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1060 wrmsr(MSR_KGSBASE, 0);
1061
1062 /* Initialize the npx (if any) for the current process. */
1063 npxinit(__INITIAL_NPXCW__);
1064 crit_exit();
1065
1066 pcb->pcb_ds = _udatasel;
1067 pcb->pcb_es = _udatasel;
1068 pcb->pcb_fs = _udatasel;
1069 pcb->pcb_gs = _udatasel;
1070}
1071
1072void
1073cpu_setregs(void)
1074{
1075 register_t cr0;
1076
1077 cr0 = rcr0();
1078 cr0 |= CR0_NE; /* Done by npxinit() */
1079 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1080 cr0 |= CR0_WP | CR0_AM;
1081 load_cr0(cr0);
1082 load_gs(_udatasel);
1083}
1084
1085static int
1086sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1087{
1088 int error;
1089 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1090 req);
1091 if (!error && req->newptr)
1092 resettodr();
1093 return (error);
1094}
1095
1096SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1097 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1098
1099SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1100 CTLFLAG_RW, &disable_rtc_set, 0, "");
1101
1102#if JG
1103SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1104 CTLFLAG_RD, &bootinfo, bootinfo, "");
1105#endif
1106
1107SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1108 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1109
1110extern u_long bootdev; /* not a cdev_t - encoding is different */
1111SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1112 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1113
1114/*
1115 * Initialize 386 and configure to run kernel
1116 */
1117
1118/*
1119 * Initialize segments & interrupt table
1120 */
1121
1122int _default_ldt;
1123struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1124static struct gate_descriptor idt0[NIDT];
1125struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1126#if JG
1127union descriptor ldt[NLDT]; /* local descriptor table */
1128#endif
1129
1130/* table descriptors - used to load tables by cpu */
1131struct region_descriptor r_gdt, r_idt;
1132
1133#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1134extern int has_f00f_bug;
1135#endif
1136
1137/* JG proc0paddr is a virtual address */
1138void *proc0paddr;
1139/* JG alignment? */
1140char proc0paddr_buff[LWKT_THREAD_STACK];
1141
1142
1143/* software prototypes -- in more palatable form */
1144struct soft_segment_descriptor gdt_segs[] = {
1145/* GNULL_SEL 0 Null Descriptor */
1146{ 0x0, /* segment base address */
1147 0x0, /* length */
1148 0, /* segment type */
1149 0, /* segment descriptor priority level */
1150 0, /* segment descriptor present */
1151 0, /* long */
1152 0, /* default 32 vs 16 bit size */
1153 0 /* limit granularity (byte/page units)*/ },
1154/* GCODE_SEL 1 Code Descriptor for kernel */
1155{ 0x0, /* segment base address */
1156 0xfffff, /* length - all address space */
1157 SDT_MEMERA, /* segment type */
1158 SEL_KPL, /* segment descriptor priority level */
1159 1, /* segment descriptor present */
1160 1, /* long */
1161 0, /* default 32 vs 16 bit size */
1162 1 /* limit granularity (byte/page units)*/ },
1163/* GDATA_SEL 2 Data Descriptor for kernel */
1164{ 0x0, /* segment base address */
1165 0xfffff, /* length - all address space */
1166 SDT_MEMRWA, /* segment type */
1167 SEL_KPL, /* segment descriptor priority level */
1168 1, /* segment descriptor present */
1169 1, /* long */
1170 0, /* default 32 vs 16 bit size */
1171 1 /* limit granularity (byte/page units)*/ },
1172/* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1173{ 0x0, /* segment base address */
1174 0xfffff, /* length - all address space */
1175 SDT_MEMERA, /* segment type */
1176 SEL_UPL, /* segment descriptor priority level */
1177 1, /* segment descriptor present */
1178 0, /* long */
1179 1, /* default 32 vs 16 bit size */
1180 1 /* limit granularity (byte/page units)*/ },
1181/* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1182{ 0x0, /* segment base address */
1183 0xfffff, /* length - all address space */
1184 SDT_MEMRWA, /* segment type */
1185 SEL_UPL, /* segment descriptor priority level */
1186 1, /* segment descriptor present */
1187 0, /* long */
1188 1, /* default 32 vs 16 bit size */
1189 1 /* limit granularity (byte/page units)*/ },
1190/* GUCODE_SEL 5 64 bit Code Descriptor for user */
1191{ 0x0, /* segment base address */
1192 0xfffff, /* length - all address space */
1193 SDT_MEMERA, /* segment type */
1194 SEL_UPL, /* segment descriptor priority level */
1195 1, /* segment descriptor present */
1196 1, /* long */
1197 0, /* default 32 vs 16 bit size */
1198 1 /* limit granularity (byte/page units)*/ },
1199/* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1200{
1201 0x0, /* segment base address */
1202 sizeof(struct x86_64tss)-1,/* length - all address space */
1203 SDT_SYSTSS, /* segment type */
1204 SEL_KPL, /* segment descriptor priority level */
1205 1, /* segment descriptor present */
1206 0, /* long */
1207 0, /* unused - default 32 vs 16 bit size */
1208 0 /* limit granularity (byte/page units)*/ },
1209/* Actually, the TSS is a system descriptor which is double size */
1210{ 0x0, /* segment base address */
1211 0x0, /* length */
1212 0, /* segment type */
1213 0, /* segment descriptor priority level */
1214 0, /* segment descriptor present */
1215 0, /* long */
1216 0, /* default 32 vs 16 bit size */
1217 0 /* limit granularity (byte/page units)*/ },
1218/* GUGS32_SEL 8 32 bit GS Descriptor for user */
1219{ 0x0, /* segment base address */
1220 0xfffff, /* length - all address space */
1221 SDT_MEMRWA, /* segment type */
1222 SEL_UPL, /* segment descriptor priority level */
1223 1, /* segment descriptor present */
1224 0, /* long */
1225 1, /* default 32 vs 16 bit size */
1226 1 /* limit granularity (byte/page units)*/ },
1227};
1228
1229void
1230setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1231{
1232 struct gate_descriptor *ip;
1233
1234 ip = idt + idx;
1235 ip->gd_looffset = (uintptr_t)func;
1236 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1237 ip->gd_ist = ist;
1238 ip->gd_xx = 0;
1239 ip->gd_type = typ;
1240 ip->gd_dpl = dpl;
1241 ip->gd_p = 1;
1242 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1243}
1244
1245#define IDTVEC(name) __CONCAT(X,name)
1246
1247extern inthand_t
1248 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1249 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1250 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1251 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1252 IDTVEC(xmm), IDTVEC(dblfault),
1253 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1254
1255#ifdef DEBUG_INTERRUPTS
1256extern inthand_t *Xrsvdary[256];
1257#endif
1258
1259void
1260sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1261{
1262 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1263 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1264 ssd->ssd_type = sd->sd_type;
1265 ssd->ssd_dpl = sd->sd_dpl;
1266 ssd->ssd_p = sd->sd_p;
1267 ssd->ssd_def32 = sd->sd_def32;
1268 ssd->ssd_gran = sd->sd_gran;
1269}
1270
1271void
1272ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1273{
1274
1275 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1276 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1277 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1278 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1279 sd->sd_type = ssd->ssd_type;
1280 sd->sd_dpl = ssd->ssd_dpl;
1281 sd->sd_p = ssd->ssd_p;
1282 sd->sd_long = ssd->ssd_long;
1283 sd->sd_def32 = ssd->ssd_def32;
1284 sd->sd_gran = ssd->ssd_gran;
1285}
1286
1287void
1288ssdtosyssd(struct soft_segment_descriptor *ssd,
1289 struct system_segment_descriptor *sd)
1290{
1291
1292 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1293 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1294 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1295 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1296 sd->sd_type = ssd->ssd_type;
1297 sd->sd_dpl = ssd->ssd_dpl;
1298 sd->sd_p = ssd->ssd_p;
1299 sd->sd_gran = ssd->ssd_gran;
1300}
1301
1302u_int basemem;
1303
1304/*
1305 * Populate the (physmap) array with base/bound pairs describing the
1306 * available physical memory in the system, then test this memory and
1307 * build the phys_avail array describing the actually-available memory.
1308 *
1309 * If we cannot accurately determine the physical memory map, then use
1310 * value from the 0xE801 call, and failing that, the RTC.
1311 *
1312 * Total memory size may be set by the kernel environment variable
1313 * hw.physmem or the compile-time define MAXMEM.
1314 *
1315 * XXX first should be vm_paddr_t.
1316 */
1317static void
1318getmemsize(caddr_t kmdp, u_int64_t first)
1319{
1320 int i, off, physmap_idx, pa_indx, da_indx;
1321 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1322 u_long physmem_tunable;
1323 pt_entry_t *pte;
1324 struct bios_smap *smapbase, *smap, *smapend;
1325 u_int32_t smapsize;
1326 quad_t dcons_addr, dcons_size;
1327
1328 bzero(physmap, sizeof(physmap));
1329 basemem = 0;
1330 physmap_idx = 0;
1331
1332 /*
1333 * get memory map from INT 15:E820, kindly supplied by the loader.
1334 *
1335 * subr_module.c says:
1336 * "Consumer may safely assume that size value precedes data."
1337 * ie: an int32_t immediately precedes smap.
1338 */
1339 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1340 MODINFO_METADATA | MODINFOMD_SMAP);
1341 if (smapbase == NULL)
1342 panic("No BIOS smap info from loader!");
1343
1344 smapsize = *((u_int32_t *)smapbase - 1);
1345 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1346
1347 for (smap = smapbase; smap < smapend; smap++) {
1348 if (boothowto & RB_VERBOSE)
1349 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1350 smap->type, smap->base, smap->length);
1351
1352 if (smap->type != SMAP_TYPE_MEMORY)
1353 continue;
1354
1355 if (smap->length == 0)
1356 continue;
1357
1358 for (i = 0; i <= physmap_idx; i += 2) {
1359 if (smap->base < physmap[i + 1]) {
1360 if (boothowto & RB_VERBOSE) {
1361 kprintf("Overlapping or non-monotonic "
1362 "memory region, ignoring "
1363 "second region\n");
1364 }
1365 continue;
1366 }
1367 }
1368 Realmem += smap->length;
1369
1370 if (smap->base == physmap[physmap_idx + 1]) {
1371 physmap[physmap_idx + 1] += smap->length;
1372 continue;
1373 }
1374
1375 physmap_idx += 2;
1376 if (physmap_idx == PHYSMAP_SIZE) {
1377 kprintf("Too many segments in the physical "
1378 "address map, giving up\n");
1379 break;
1380 }
1381 physmap[physmap_idx] = smap->base;
1382 physmap[physmap_idx + 1] = smap->base + smap->length;
1383 }
1384
1385 /*
1386 * Find the 'base memory' segment for SMP
1387 */
1388 basemem = 0;
1389 for (i = 0; i <= physmap_idx; i += 2) {
1390 if (physmap[i] == 0x00000000) {
1391 basemem = physmap[i + 1] / 1024;
1392 break;
1393 }
1394 }
1395 if (basemem == 0)
1396 panic("BIOS smap did not include a basemem segment!");
1397
1398#ifdef SMP
1399 /* make hole for AP bootstrap code */
1400 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1401
1402 /* Save EBDA address, if any */
1403 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1404 ebda_addr <<= 4;
1405#endif
1406
1407 /*
1408 * Maxmem isn't the "maximum memory", it's one larger than the
1409 * highest page of the physical address space. It should be
1410 * called something like "Maxphyspage". We may adjust this
1411 * based on ``hw.physmem'' and the results of the memory test.
1412 */
1413 Maxmem = atop(physmap[physmap_idx + 1]);
1414
1415#ifdef MAXMEM
1416 Maxmem = MAXMEM / 4;
1417#endif
1418
1419 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1420 Maxmem = atop(physmem_tunable);
1421
1422 /*
1423 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1424 * in the system.
1425 */
1426 if (Maxmem > atop(physmap[physmap_idx + 1]))
1427 Maxmem = atop(physmap[physmap_idx + 1]);
1428
1429 /*
1430 *
1431 */
1432 if (Maxmem > atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS)) {
1433 kprintf("Limiting Maxmem due to DMAP size\n");
1434 Maxmem = atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS);
1435 }
1436
1437 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1438 (boothowto & RB_VERBOSE))
1439 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1440
1441 /* call pmap initialization to make new kernel address space */
1442 pmap_bootstrap(&first);
1443
1444 /*
1445 * Size up each available chunk of physical memory.
1446 */
1447 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1448 pa_indx = 0;
1449 da_indx = 1;
1450 phys_avail[pa_indx++] = physmap[0];
1451 phys_avail[pa_indx] = physmap[0];
1452 dump_avail[da_indx] = physmap[0];
1453 pte = CMAP1;
1454
1455 /*
1456 * Get dcons buffer address
1457 */
1458 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1459 kgetenv_quad("dcons.size", &dcons_size) == 0)
1460 dcons_addr = 0;
1461
1462 /*
1463 * physmap is in bytes, so when converting to page boundaries,
1464 * round up the start address and round down the end address.
1465 */
1466 for (i = 0; i <= physmap_idx; i += 2) {
1467 vm_paddr_t end;
1468
1469 end = ptoa((vm_paddr_t)Maxmem);
1470 if (physmap[i + 1] < end)
1471 end = trunc_page(physmap[i + 1]);
1472 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1473 int tmp, page_bad, full;
1474 int *ptr = (int *)CADDR1;
1475
1476 full = FALSE;
1477 /*
1478 * block out kernel memory as not available.
1479 */
1480 if (pa >= 0x100000 && pa < first)
1481 goto do_dump_avail;
1482
1483 /*
1484 * block out dcons buffer
1485 */
1486 if (dcons_addr > 0
1487 && pa >= trunc_page(dcons_addr)
1488 && pa < dcons_addr + dcons_size)
1489 goto do_dump_avail;
1490
1491 page_bad = FALSE;
1492
1493 /*
1494 * map page into kernel: valid, read/write,non-cacheable
1495 */
1496 *pte = pa | PG_V | PG_RW | PG_N;
1497 cpu_invltlb();
1498
1499 tmp = *(int *)ptr;
1500 /*
1501 * Test for alternating 1's and 0's
1502 */
1503 *(volatile int *)ptr = 0xaaaaaaaa;
1504 if (*(volatile int *)ptr != 0xaaaaaaaa)
1505 page_bad = TRUE;
1506 /*
1507 * Test for alternating 0's and 1's
1508 */
1509 *(volatile int *)ptr = 0x55555555;
1510 if (*(volatile int *)ptr != 0x55555555)
1511 page_bad = TRUE;
1512 /*
1513 * Test for all 1's
1514 */
1515 *(volatile int *)ptr = 0xffffffff;
1516 if (*(volatile int *)ptr != 0xffffffff)
1517 page_bad = TRUE;
1518 /*
1519 * Test for all 0's
1520 */
1521 *(volatile int *)ptr = 0x0;
1522 if (*(volatile int *)ptr != 0x0)
1523 page_bad = TRUE;
1524 /*
1525 * Restore original value.
1526 */
1527 *(int *)ptr = tmp;
1528
1529 /*
1530 * Adjust array of valid/good pages.
1531 */
1532 if (page_bad == TRUE)
1533 continue;
1534 /*
1535 * If this good page is a continuation of the
1536 * previous set of good pages, then just increase
1537 * the end pointer. Otherwise start a new chunk.
1538 * Note that "end" points one higher than end,
1539 * making the range >= start and < end.
1540 * If we're also doing a speculative memory
1541 * test and we at or past the end, bump up Maxmem
1542 * so that we keep going. The first bad page
1543 * will terminate the loop.
1544 */
1545 if (phys_avail[pa_indx] == pa) {
1546 phys_avail[pa_indx] += PAGE_SIZE;
1547 } else {
1548 pa_indx++;
1549 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1550 kprintf(
1551 "Too many holes in the physical address space, giving up\n");
1552 pa_indx--;
1553 full = TRUE;
1554 goto do_dump_avail;
1555 }
1556 phys_avail[pa_indx++] = pa; /* start */
1557 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1558 }
1559 physmem++;
1560do_dump_avail:
1561 if (dump_avail[da_indx] == pa) {
1562 dump_avail[da_indx] += PAGE_SIZE;
1563 } else {
1564 da_indx++;
1565 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1566 da_indx--;
1567 goto do_next;
1568 }
1569 dump_avail[da_indx++] = pa; /* start */
1570 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1571 }
1572do_next:
1573 if (full)
1574 break;
1575 }
1576 }
1577 *pte = 0;
1578 cpu_invltlb();
1579
1580 /*
1581 * XXX
1582 * The last chunk must contain at least one page plus the message
1583 * buffer to avoid complicating other code (message buffer address
1584 * calculation, etc.).
1585 */
1586 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1587 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1588 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1589 phys_avail[pa_indx--] = 0;
1590 phys_avail[pa_indx--] = 0;
1591 }
1592
1593 Maxmem = atop(phys_avail[pa_indx]);
1594
1595 /* Trim off space for the message buffer. */
1596 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1597
1598 avail_end = phys_avail[pa_indx];
1599
1600 /* Map the message buffer. */
1601 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1602 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1603 off);
1604}
1605
1606#ifdef SMP
1607#ifdef APIC_IO
1608int apic_io_enable = 1; /* Enabled by default for kernels compiled w/APIC_IO */
1609#else
1610int apic_io_enable = 0; /* Disabled by default for kernels compiled without */
1611#endif
1612TUNABLE_INT("hw.apic_io_enable", &apic_io_enable);
1613extern struct machintr_abi MachIntrABI_APIC;
1614#endif
1615
1616extern struct machintr_abi MachIntrABI_ICU;
1617struct machintr_abi MachIntrABI;
1618
1619/*
1620 * IDT VECTORS:
1621 * 0 Divide by zero
1622 * 1 Debug
1623 * 2 NMI
1624 * 3 BreakPoint
1625 * 4 OverFlow
1626 * 5 Bound-Range
1627 * 6 Invalid OpCode
1628 * 7 Device Not Available (x87)
1629 * 8 Double-Fault
1630 * 9 Coprocessor Segment overrun (unsupported, reserved)
1631 * 10 Invalid-TSS
1632 * 11 Segment not present
1633 * 12 Stack
1634 * 13 General Protection
1635 * 14 Page Fault
1636 * 15 Reserved
1637 * 16 x87 FP Exception pending
1638 * 17 Alignment Check
1639 * 18 Machine Check
1640 * 19 SIMD floating point
1641 * 20-31 reserved
1642 * 32-255 INTn/external sources
1643 */
1644u_int64_t
1645hammer_time(u_int64_t modulep, u_int64_t physfree)
1646{
1647 caddr_t kmdp;
1648 int gsel_tss, x;
1649#if JG
1650 int metadata_missing, off;
1651#endif
1652 struct mdglobaldata *gd;
1653 u_int64_t msr;
1654
1655 /*
1656 * Prevent lowering of the ipl if we call tsleep() early.
1657 */
1658 gd = &CPU_prvspace[0].mdglobaldata;
1659 bzero(gd, sizeof(*gd));
1660
1661 /*
1662 * Note: on both UP and SMP curthread must be set non-NULL
1663 * early in the boot sequence because the system assumes
1664 * that 'curthread' is never NULL.
1665 */
1666
1667 gd->mi.gd_curthread = &thread0;
1668 thread0.td_gd = &gd->mi;
1669
1670 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1671
1672#if JG
1673 metadata_missing = 0;
1674 if (bootinfo.bi_modulep) {
1675 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1676 preload_bootstrap_relocate(KERNBASE);
1677 } else {
1678 metadata_missing = 1;
1679 }
1680 if (bootinfo.bi_envp)
1681 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1682#endif
1683
1684 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1685 preload_bootstrap_relocate(PTOV_OFFSET);
1686 kmdp = preload_search_by_type("elf kernel");
1687 if (kmdp == NULL)
1688 kmdp = preload_search_by_type("elf64 kernel");
1689 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1690 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1691#ifdef DDB
1692 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1693 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1694#endif
1695
1696 /*
1697 * Setup MachIntrABI
1698 * XXX: Where is the correct place for it?
1699 */
1700 MachIntrABI = MachIntrABI_ICU;
1701#ifdef SMP
1702 TUNABLE_INT_FETCH("hw.apic_io_enable", &apic_io_enable);
1703 if (apic_io_enable)
1704 MachIntrABI = MachIntrABI_APIC;
1705#endif
1706
1707 /*
1708 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1709 * and ncpus_fit_mask remain 0.
1710 */
1711 ncpus = 1;
1712 ncpus2 = 1;
1713 ncpus_fit = 1;
1714 /* Init basic tunables, hz etc */
1715 init_param1();
1716
1717 /*
1718 * make gdt memory segments
1719 */
1720 gdt_segs[GPROC0_SEL].ssd_base =
1721 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1722
1723 gd->mi.gd_prvspace = &CPU_prvspace[0];
1724
1725 for (x = 0; x < NGDT; x++) {
1726 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1727 ssdtosd(&gdt_segs[x], &gdt[x]);
1728 }
1729 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1730 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1731
1732 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1733 r_gdt.rd_base = (long) gdt;
1734 lgdt(&r_gdt);
1735
1736 wrmsr(MSR_FSBASE, 0); /* User value */
1737 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1738 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1739
1740 mi_gdinit(&gd->mi, 0);
1741 cpu_gdinit(gd, 0);
1742 proc0paddr = proc0paddr_buff;
1743 mi_proc0init(&gd->mi, proc0paddr);
1744 safepri = TDPRI_MAX;
1745
1746 /* spinlocks and the BGL */
1747 init_locks();
1748
1749 /* exceptions */
1750 for (x = 0; x < NIDT; x++)
1751 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1752 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1753 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1754 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1755 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1756 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1757 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1758 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1759 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1760 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1761 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1762 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1763 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1764 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1765 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1766 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1767 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1768 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1769 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1770 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1771
1772 r_idt.rd_limit = sizeof(idt0) - 1;
1773 r_idt.rd_base = (long) idt;
1774 lidt(&r_idt);
1775
1776 /*
1777 * Initialize the console before we print anything out.
1778 */
1779 cninit();
1780
1781#if JG
1782 if (metadata_missing)
1783 kprintf("WARNING: loader(8) metadata is missing!\n");
1784#endif
1785
1786#if NISA >0
1787 isa_defaultirq();
1788#endif
1789 rand_initialize();
1790
1791#ifdef DDB
1792 kdb_init();
1793 if (boothowto & RB_KDB)
1794 Debugger("Boot flags requested debugger");
1795#endif
1796
1797#if JG
1798 finishidentcpu(); /* Final stage of CPU initialization */
1799 setidt(6, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1800 setidt(13, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1801#endif
1802 identify_cpu(); /* Final stage of CPU initialization */
1803 initializecpu(); /* Initialize CPU registers */
1804
1805 /* make an initial tss so cpu can get interrupt stack on syscall! */
1806 gd->gd_common_tss.tss_rsp0 =
1807 (register_t)(thread0.td_kstack +
1808 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1809 /* Ensure the stack is aligned to 16 bytes */
1810 gd->gd_common_tss.tss_rsp0 &= ~(register_t)0xF;
1811
1812 /* double fault stack */
1813 gd->gd_common_tss.tss_ist1 =
1814 (long)&gd->mi.gd_prvspace->idlestack[
1815 sizeof(gd->mi.gd_prvspace->idlestack)];
1816
1817 /* Set the IO permission bitmap (empty due to tss seg limit) */
1818 gd->gd_common_tss.tss_iobase = sizeof(struct x86_64tss);
1819
1820 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1821 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1822 gd->gd_common_tssd = *gd->gd_tss_gdt;
1823 ltr(gsel_tss);
1824
1825 /* Set up the fast syscall stuff */
1826 msr = rdmsr(MSR_EFER) | EFER_SCE;
1827 wrmsr(MSR_EFER, msr);
1828 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1829 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1830 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1831 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1832 wrmsr(MSR_STAR, msr);
1833 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1834
1835 getmemsize(kmdp, physfree);
1836 init_param2(physmem);
1837
1838 /* now running on new page tables, configured,and u/iom is accessible */
1839
1840 /* Map the message buffer. */
1841#if JG
1842 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1843 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1844#endif
1845
1846 msgbufinit(msgbufp, MSGBUF_SIZE);
1847
1848
1849 /* transfer to user mode */
1850
1851 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1852 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1853 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1854
1855 load_ds(_udatasel);
1856 load_es(_udatasel);
1857 load_fs(_udatasel);
1858
1859 /* setup proc 0's pcb */
1860 thread0.td_pcb->pcb_flags = 0;
1861 thread0.td_pcb->pcb_cr3 = KPML4phys;
1862 thread0.td_pcb->pcb_ext = 0;
1863 lwp0.lwp_md.md_regs = &proc0_tf; /* XXX needed? */
1864
1865 /* Location of kernel stack for locore */
1866 return ((u_int64_t)thread0.td_pcb);
1867}
1868
1869/*
1870 * Initialize machine-dependant portions of the global data structure.
1871 * Note that the global data area and cpu0's idlestack in the private
1872 * data space were allocated in locore.
1873 *
1874 * Note: the idlethread's cpl is 0
1875 *
1876 * WARNING! Called from early boot, 'mycpu' may not work yet.
1877 */
1878void
1879cpu_gdinit(struct mdglobaldata *gd, int cpu)
1880{
1881 if (cpu)
1882 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1883
1884 lwkt_init_thread(&gd->mi.gd_idlethread,
1885 gd->mi.gd_prvspace->idlestack,
1886 sizeof(gd->mi.gd_prvspace->idlestack),
1887 0, &gd->mi);
1888 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1889 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1890 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1891 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1892}
1893
1894int
1895is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1896{
1897 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1898 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1899 return (TRUE);
1900 }
1901 return (FALSE);
1902}
1903
1904struct globaldata *
1905globaldata_find(int cpu)
1906{
1907 KKASSERT(cpu >= 0 && cpu < ncpus);
1908 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1909}
1910
1911#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1912static void f00f_hack(void *unused);
1913SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
1914
1915static void
1916f00f_hack(void *unused)
1917{
1918 struct gate_descriptor *new_idt;
1919 vm_offset_t tmp;
1920
1921 if (!has_f00f_bug)
1922 return;
1923
1924 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
1925
1926 r_idt.rd_limit = sizeof(idt0) - 1;
1927
1928 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
1929 if (tmp == 0)
1930 panic("kmem_alloc returned 0");
1931 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1932 panic("kmem_alloc returned non-page-aligned memory");
1933 /* Put the first seven entries in the lower page */
1934 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1935 bcopy(idt, new_idt, sizeof(idt0));
1936 r_idt.rd_base = (int)new_idt;
1937 lidt(&r_idt);
1938 idt = new_idt;
1939 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
1940 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1941 panic("vm_map_protect failed");
1942 return;
1943}
1944#endif /* defined(I586_CPU) && !NO_F00F_HACK */
1945
1946int
1947ptrace_set_pc(struct lwp *lp, unsigned long addr)
1948{
1949 lp->lwp_md.md_regs->tf_rip = addr;
1950 return (0);
1951}
1952
1953int
1954ptrace_single_step(struct lwp *lp)
1955{
1956 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
1957 return (0);
1958}
1959
1960int
1961fill_regs(struct lwp *lp, struct reg *regs)
1962{
1963 struct trapframe *tp;
1964
1965 tp = lp->lwp_md.md_regs;
1966 bcopy(&tp->tf_rdi, &regs->r_rdi, sizeof(*regs));
1967 return (0);
1968}
1969
1970int
1971set_regs(struct lwp *lp, struct reg *regs)
1972{
1973 struct trapframe *tp;
1974
1975 tp = lp->lwp_md.md_regs;
1976 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
1977 !CS_SECURE(regs->r_cs))
1978 return (EINVAL);
1979 bcopy(&regs->r_rdi, &tp->tf_rdi, sizeof(*regs));
1980 return (0);
1981}
1982
1983#ifndef CPU_DISABLE_SSE
1984static void
1985fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
1986{
1987 struct env87 *penv_87 = &sv_87->sv_env;
1988 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1989 int i;
1990
1991 /* FPU control/status */
1992 penv_87->en_cw = penv_xmm->en_cw;
1993 penv_87->en_sw = penv_xmm->en_sw;
1994 penv_87->en_tw = penv_xmm->en_tw;
1995 penv_87->en_fip = penv_xmm->en_fip;
1996 penv_87->en_fcs = penv_xmm->en_fcs;
1997 penv_87->en_opcode = penv_xmm->en_opcode;
1998 penv_87->en_foo = penv_xmm->en_foo;
1999 penv_87->en_fos = penv_xmm->en_fos;
2000
2001 /* FPU registers */
2002 for (i = 0; i < 8; ++i)
2003 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2004
2005 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2006}
2007
2008static void
2009set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2010{
2011 struct env87 *penv_87 = &sv_87->sv_env;
2012 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2013 int i;
2014
2015 /* FPU control/status */
2016 penv_xmm->en_cw = penv_87->en_cw;
2017 penv_xmm->en_sw = penv_87->en_sw;
2018 penv_xmm->en_tw = penv_87->en_tw;
2019 penv_xmm->en_fip = penv_87->en_fip;
2020 penv_xmm->en_fcs = penv_87->en_fcs;
2021 penv_xmm->en_opcode = penv_87->en_opcode;
2022 penv_xmm->en_foo = penv_87->en_foo;
2023 penv_xmm->en_fos = penv_87->en_fos;
2024
2025 /* FPU registers */
2026 for (i = 0; i < 8; ++i)
2027 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2028
2029 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2030}
2031#endif /* CPU_DISABLE_SSE */
2032
2033int
2034fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2035{
2036#ifndef CPU_DISABLE_SSE
2037 if (cpu_fxsr) {
2038 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2039 (struct save87 *)fpregs);
2040 return (0);
2041 }
2042#endif /* CPU_DISABLE_SSE */
2043 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2044 return (0);
2045}
2046
2047int
2048set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2049{
2050#ifndef CPU_DISABLE_SSE
2051 if (cpu_fxsr) {
2052 set_fpregs_xmm((struct save87 *)fpregs,
2053 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2054 return (0);
2055 }
2056#endif /* CPU_DISABLE_SSE */
2057 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2058 return (0);
2059}
2060
2061int
2062fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2063{
2064 if (lp == NULL) {
2065 dbregs->dr[0] = rdr0();
2066 dbregs->dr[1] = rdr1();
2067 dbregs->dr[2] = rdr2();
2068 dbregs->dr[3] = rdr3();
2069 dbregs->dr[4] = rdr4();
2070 dbregs->dr[5] = rdr5();
2071 dbregs->dr[6] = rdr6();
2072 dbregs->dr[7] = rdr7();
2073 } else {
2074 struct pcb *pcb;
2075
2076 pcb = lp->lwp_thread->td_pcb;
2077 dbregs->dr[0] = pcb->pcb_dr0;
2078 dbregs->dr[1] = pcb->pcb_dr1;
2079 dbregs->dr[2] = pcb->pcb_dr2;
2080 dbregs->dr[3] = pcb->pcb_dr3;
2081 dbregs->dr[4] = 0;
2082 dbregs->dr[5] = 0;
2083 dbregs->dr[6] = pcb->pcb_dr6;
2084 dbregs->dr[7] = pcb->pcb_dr7;
2085 }
2086 return (0);
2087}
2088
2089int
2090set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2091{
2092 if (lp == NULL) {
2093 load_dr0(dbregs->dr[0]);
2094 load_dr1(dbregs->dr[1]);
2095 load_dr2(dbregs->dr[2]);
2096 load_dr3(dbregs->dr[3]);
2097 load_dr4(dbregs->dr[4]);
2098 load_dr5(dbregs->dr[5]);
2099 load_dr6(dbregs->dr[6]);
2100 load_dr7(dbregs->dr[7]);
2101 } else {
2102 struct pcb *pcb;
2103 struct ucred *ucred;
2104 int i;
2105 uint64_t mask1, mask2;
2106
2107 /*
2108 * Don't let an illegal value for dr7 get set. Specifically,
2109 * check for undefined settings. Setting these bit patterns
2110 * result in undefined behaviour and can lead to an unexpected
2111 * TRCTRAP.
2112 */
2113 /* JG this loop looks unreadable */
2114 /* Check 4 2-bit fields for invalid patterns.
2115 * These fields are R/Wi, for i = 0..3
2116 */
2117 /* Is 10 in LENi allowed when running in compatibility mode? */
2118 /* Pattern 10 in R/Wi might be used to indicate
2119 * breakpoint on I/O. Further analysis should be
2120 * carried to decide if it is safe and useful to
2121 * provide access to that capability
2122 */
2123 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2124 i++, mask1 <<= 4, mask2 <<= 4)
2125 if ((dbregs->dr[7] & mask1) == mask2)
2126 return (EINVAL);
2127
2128 pcb = lp->lwp_thread->td_pcb;
2129 ucred = lp->lwp_proc->p_ucred;
2130
2131 /*
2132 * Don't let a process set a breakpoint that is not within the
2133 * process's address space. If a process could do this, it
2134 * could halt the system by setting a breakpoint in the kernel
2135 * (if ddb was enabled). Thus, we need to check to make sure
2136 * that no breakpoints are being enabled for addresses outside
2137 * process's address space, unless, perhaps, we were called by
2138 * uid 0.
2139 *
2140 * XXX - what about when the watched area of the user's
2141 * address space is written into from within the kernel
2142 * ... wouldn't that still cause a breakpoint to be generated
2143 * from within kernel mode?
2144 */
2145
2146 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2147 if (dbregs->dr[7] & 0x3) {
2148 /* dr0 is enabled */
2149 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2150 return (EINVAL);
2151 }
2152
2153 if (dbregs->dr[7] & (0x3<<2)) {
2154 /* dr1 is enabled */
2155 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2156 return (EINVAL);
2157 }
2158
2159 if (dbregs->dr[7] & (0x3<<4)) {
2160 /* dr2 is enabled */
2161 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2162 return (EINVAL);
2163 }
2164
2165 if (dbregs->dr[7] & (0x3<<6)) {
2166 /* dr3 is enabled */
2167 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2168 return (EINVAL);
2169 }
2170 }
2171
2172 pcb->pcb_dr0 = dbregs->dr[0];
2173 pcb->pcb_dr1 = dbregs->dr[1];
2174 pcb->pcb_dr2 = dbregs->dr[2];
2175 pcb->pcb_dr3 = dbregs->dr[3];
2176 pcb->pcb_dr6 = dbregs->dr[6];
2177 pcb->pcb_dr7 = dbregs->dr[7];
2178
2179 pcb->pcb_flags |= PCB_DBREGS;
2180 }
2181
2182 return (0);
2183}
2184
2185/*
2186 * Return > 0 if a hardware breakpoint has been hit, and the
2187 * breakpoint was in user space. Return 0, otherwise.
2188 */
2189int
2190user_dbreg_trap(void)
2191{
2192 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2193 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2194 int nbp; /* number of breakpoints that triggered */
2195 caddr_t addr[4]; /* breakpoint addresses */
2196 int i;
2197
2198 dr7 = rdr7();
2199 if ((dr7 & 0xff) == 0) {
2200 /*
2201 * all GE and LE bits in the dr7 register are zero,
2202 * thus the trap couldn't have been caused by the
2203 * hardware debug registers
2204 */
2205 return 0;
2206 }
2207
2208 nbp = 0;
2209 dr6 = rdr6();
2210 bp = dr6 & 0xf;
2211
2212 if (bp == 0) {
2213 /*
2214 * None of the breakpoint bits are set meaning this
2215 * trap was not caused by any of the debug registers
2216 */
2217 return 0;
2218 }
2219
2220 /*
2221 * at least one of the breakpoints were hit, check to see
2222 * which ones and if any of them are user space addresses
2223 */
2224
2225 if (bp & 0x01) {
2226 addr[nbp++] = (caddr_t)rdr0();
2227 }
2228 if (bp & 0x02) {
2229 addr[nbp++] = (caddr_t)rdr1();
2230 }
2231 if (bp & 0x04) {
2232 addr[nbp++] = (caddr_t)rdr2();
2233 }
2234 if (bp & 0x08) {
2235 addr[nbp++] = (caddr_t)rdr3();
2236 }
2237
2238 for (i=0; i<nbp; i++) {
2239 if (addr[i] <
2240 (caddr_t)VM_MAX_USER_ADDRESS) {
2241 /*
2242 * addr[i] is in user space
2243 */
2244 return nbp;
2245 }
2246 }
2247
2248 /*
2249 * None of the breakpoints are in user space.
2250 */
2251 return 0;
2252}
2253
2254
2255#ifndef DDB
2256void
2257Debugger(const char *msg)
2258{
2259 kprintf("Debugger(\"%s\") called.\n", msg);
2260}
2261#endif /* no DDB */
2262
2263#ifdef DDB
2264
2265/*
2266 * Provide inb() and outb() as functions. They are normally only
2267 * available as macros calling inlined functions, thus cannot be
2268 * called inside DDB.
2269 *
2270 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2271 */
2272
2273#undef inb
2274#undef outb
2275
2276/* silence compiler warnings */
2277u_char inb(u_int);
2278void outb(u_int, u_char);
2279
2280u_char
2281inb(u_int port)
2282{
2283 u_char data;
2284 /*
2285 * We use %%dx and not %1 here because i/o is done at %dx and not at
2286 * %edx, while gcc generates inferior code (movw instead of movl)
2287 * if we tell it to load (u_short) port.
2288 */
2289 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2290 return (data);
2291}
2292
2293void
2294outb(u_int port, u_char data)
2295{
2296 u_char al;
2297 /*
2298 * Use an unnecessary assignment to help gcc's register allocator.
2299 * This make a large difference for gcc-1.40 and a tiny difference
2300 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2301 * best results. gcc-2.6.0 can't handle this.
2302 */
2303 al = data;
2304 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2305}
2306
2307#endif /* DDB */
2308
2309
2310
2311#include "opt_cpu.h"
2312
2313
2314/*
2315 * initialize all the SMP locks
2316 */
2317
2318/* critical region when masking or unmasking interupts */
2319struct spinlock_deprecated imen_spinlock;
2320
2321/* critical region for old style disable_intr/enable_intr */
2322struct spinlock_deprecated mpintr_spinlock;
2323
2324/* critical region around INTR() routines */
2325struct spinlock_deprecated intr_spinlock;
2326
2327/* lock region used by kernel profiling */
2328struct spinlock_deprecated mcount_spinlock;
2329
2330/* locks com (tty) data/hardware accesses: a FASTINTR() */
2331struct spinlock_deprecated com_spinlock;
2332
2333/* lock regions around the clock hardware */
2334struct spinlock_deprecated clock_spinlock;
2335
2336static void
2337init_locks(void)
2338{
2339#ifdef SMP
2340 /*
2341 * Get the initial mplock with a count of 1 for the BSP.
2342 * This uses a LOGICAL cpu ID, ie BSP == 0.
2343 */
2344 cpu_get_initial_mplock();
2345#endif
2346 /* DEPRECATED */
2347 spin_lock_init(&mcount_spinlock);
2348 spin_lock_init(&intr_spinlock);
2349 spin_lock_init(&mpintr_spinlock);
2350 spin_lock_init(&imen_spinlock);
2351 spin_lock_init(&com_spinlock);
2352 spin_lock_init(&clock_spinlock);
2353
2354 /* our token pool needs to work early */
2355 lwkt_token_pool_init();
2356}
2357