sys/i386/icu/icu_vector.s

   1 /*
   2  *      from: vector.s, 386BSD 0.1 unknown origin
   3  * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $
   4  * $DragonFly: src/sys/i386/icu/Attic/icu_vector.s,v 1.20 2005/11/02 17:20:00 dillon Exp $
   5  */
   6
   7 #include "use_npx.h"
   8 #include "opt_auto_eoi.h"
   9
  10 #include <machine/asmacros.h>
  11 #include <machine/ipl.h>
  12 #include <machine/lock.h>
  13 #include <machine/psl.h>
  14 #include <machine/trap.h>
  15 #include <machine/smptests.h>           /** various SMP options */
  16
  17 #include <i386/icu/icu.h>
  18 #include <bus/isa/i386/isa.h>
  19
  20 #include "assym.s"
  21
  22 #ifndef APIC_IO
  23
  24 #define ICU_IMR_OFFSET          1       /* IO_ICU{1,2} + 1 */
  25
  26 #define ICU_EOI                 0x20    /* XXX - define elsewhere */
  27
  28 #define IRQ_LBIT(irq_num)       (1 << (irq_num))
  29 #define IRQ_BIT(irq_num)        (1 << ((irq_num) % 8))
  30 #define IRQ_BYTE(irq_num)       ((irq_num) >> 3)
  31
  32 #ifdef AUTO_EOI_1
  33 #define ENABLE_ICU1             /* use auto-EOI to reduce i/o */
  34 #define OUTB_ICU1
  35 #else
  36 #define ENABLE_ICU1                                                     \
  37         movb    $ICU_EOI,%al ;  /* as soon as possible send EOI ... */  \
  38         OUTB_ICU1 ;             /* ... to clear in service bit */       \
  39
  40 #define OUTB_ICU1                                                       \
  41         outb    %al,$IO_ICU1 ;                                          \
  42
  43 #endif
  44
  45 #ifdef AUTO_EOI_2
  46 /*
  47  * The data sheet says no auto-EOI on slave, but it sometimes works.
  48  */
  49 #define ENABLE_ICU1_AND_2       ENABLE_ICU1
  50 #else
  51 #define ENABLE_ICU1_AND_2                                               \
  52         movb    $ICU_EOI,%al ;  /* as above */                          \
  53         outb    %al,$IO_ICU2 ;  /* but do second icu first ... */       \
  54         OUTB_ICU1 ;     /* ... then first icu (if !AUTO_EOI_1) */       \
  55
  56 #endif
  57
  58 /*
  59  * Macro helpers
  60  */
  61 #define PUSH_FRAME                                                      \
  62         pushl   $0 ;            /* dummy error code */                  \
  63         pushl   $0 ;            /* dummy trap type */                   \
  64         pushal ;                /* 8 registers */                       \
  65         pushl   %ds ;                                                   \
  66         pushl   %es ;                                                   \
  67         pushl   %fs ;                                                   \
  68         mov     $KDSEL,%ax ;                                            \
  69         mov     %ax,%ds ;                                               \
  70         mov     %ax,%es ;                                               \
  71         mov     $KPSEL,%ax ;                                            \
  72         mov     %ax,%fs ;                                               \
  73
  74 #define PUSH_DUMMY                                                      \
  75         pushfl ;                /* phys int frame / flags */            \
  76         pushl %cs ;             /* phys int frame / cs */               \
  77         pushl   12(%esp) ;      /* original caller eip */               \
  78         pushl   $0 ;            /* dummy error code */                  \
  79         pushl   $0 ;            /* dummy trap type */                   \
  80         subl    $12*4,%esp ;    /* pushal + 3 seg regs (dummy) + CPL */ \
  81
  82 /*
  83  * Warning: POP_FRAME can only be used if there is no chance of a
  84  * segment register being changed (e.g. by procfs), which is why syscalls
  85  * have to use doreti.
  86  */
  87 #define POP_FRAME                                                       \
  88         popl    %fs ;                                                   \
  89         popl    %es ;                                                   \
  90         popl    %ds ;                                                   \
  91         popal ;                                                         \
  92         addl    $2*4,%esp ;     /* dummy trap & error codes */          \
  93
  94 #define POP_DUMMY                                                       \
  95         addl    $17*4,%esp ;                                            \
  96
  97 #define MASK_IRQ(icu, irq_num)                                          \
  98         movb    icu_imen + IRQ_BYTE(irq_num),%al ;                      \
  99         orb     $IRQ_BIT(irq_num),%al ;                                 \
 100         movb    %al,icu_imen + IRQ_BYTE(irq_num) ;                      \
 101         outb    %al,$icu+ICU_IMR_OFFSET ;                               \
 102
 103 #define UNMASK_IRQ(icu, irq_num)                                        \
 104         cmpl    $0,%eax ;                                               \
 105         jnz     8f ;                                                    \
 106         movb    icu_imen + IRQ_BYTE(irq_num),%al ;                      \
 107         andb    $~IRQ_BIT(irq_num),%al ;                                \
 108         movb    %al,icu_imen + IRQ_BYTE(irq_num) ;                      \
 109         outb    %al,$icu+ICU_IMR_OFFSET ;                               \
 110 8: ;                                                                    \
 111
 112 /*
 113  * Fast interrupt call handlers run in the following sequence:
 114  *
 115  *      - Push the trap frame required by doreti.
 116  *      - Mask the interrupt and reenable its source.
 117  *      - If we cannot take the interrupt set its fpending bit and
 118  *        doreti.
 119  *      - If we can take the interrupt clear its fpending bit,
 120  *        call the handler, then unmask the interrupt and doreti.
 121  *
 122  *      YYY can cache gd base pointer instead of using hidden %fs
 123  *      prefixes.
 124  */
 125
 126 #define FAST_INTR(irq_num, vec_name, icu, enable_icus, maybe_extra_ipending) \
 127         .text ;                                                         \
 128         SUPERALIGN_TEXT ;                                               \
 129 IDTVEC(vec_name) ;                                                      \
 130         PUSH_FRAME ;                                                    \
 131         FAKE_MCOUNT(13*4(%esp)) ;                                       \
 132         maybe_extra_ipending ;                                          \
 133         MASK_IRQ(icu, irq_num) ;                                        \
 134         enable_icus ;                                                   \
 135         movl    PCPU(curthread),%ebx ;                                  \
 136         pushl   $0 ;                    /* DUMMY CPL FOR DORETI */      \
 137         cmpl    $TDPRI_CRIT,TD_PRI(%ebx) ;                              \
 138         jl      2f ;                                                    \
 139 1: ;                                                                    \
 140         /* set pending bit and return, leave interrupt masked */        \
 141         orl     $IRQ_LBIT(irq_num),PCPU(fpending) ;                     \
 142         orl     $RQF_INTPEND, PCPU(reqflags) ;                          \
 143         jmp     5f ;                                                    \
 144 2: ;                                                                    \
 145         /* clear pending bit, run handler */                            \
 146         andl    $~IRQ_LBIT(irq_num),PCPU(fpending) ;                    \
 147         pushl   $irq_num ;                                              \
 148         call    ithread_fast_handler ;  /* returns 0 to unmask int */   \
 149         addl    $4,%esp ;                                               \
 150         UNMASK_IRQ(icu, irq_num) ;                                      \
 151 5: ;                                                                    \
 152         MEXITCOUNT ;                                                    \
 153         jmp     doreti ;                                                \
 154
 155 /*
 156  * Restart fast interrupt held up by critical section.
 157  *
 158  *      - Push a dummy trap frame as required by doreti.
 159  *      - The interrupt source is already masked.
 160  *      - Clear the fpending bit
 161  *      - Run the handler
 162  *      - Unmask the interrupt
 163  *      - Pop the dummy frame and do a normal return
 164  *
 165  *      YYY can cache gd base pointer instead of using hidden %fs
 166  *      prefixes.
 167  */
 168 #define FAST_UNPEND(irq_num, vec_name, icu)                             \
 169         .text ;                                                         \
 170         SUPERALIGN_TEXT ;                                               \
 171 IDTVEC(vec_name) ;                                                      \
 172         pushl   %ebp ;                                                  \
 173         movl    %esp,%ebp ;                                             \
 174         PUSH_DUMMY ;                                                    \
 175         pushl   $irq_num ;                                              \
 176         call    ithread_fast_handler ;  /* returns 0 to unmask int */   \
 177         addl    $4, %esp ;                                              \
 178         UNMASK_IRQ(icu, irq_num) ;                                      \
 179         POP_DUMMY ;                                                     \
 180         popl %ebp ;                                                     \
 181         ret ;                                                           \
 182
 183 /*
 184  * Slow interrupt call handlers run in the following sequence:
 185  *
 186  *      - Push the trap frame required by doreti.
 187  *      - Mask the interrupt and reenable its source.
 188  *      - If we cannot take the interrupt set its ipending bit and
 189  *        doreti.  In addition to checking for a critical section
 190  *        and cpl mask we also check to see if the thread is still
 191  *        running.
 192  *      - If we can take the interrupt clear its ipending bit
 193  *        and schedule its thread.  Leave interrupts masked and doreti.
 194  *
 195  *      sched_ithd() is called with interrupts enabled and outside of a
 196  *      critical section (so it can preempt us).
 197  *
 198  *      YYY sched_ithd may preempt us synchronously (fix interrupt stacking)
 199  *
 200  *      Note that intr_nesting_level is not bumped during sched_ithd because
 201  *      blocking allocations are allowed in the preemption case.
 202  *
 203  *      YYY can cache gd base pointer instead of using hidden %fs
 204  *      prefixes.
 205  */
 206
 207 #define INTR(irq_num, vec_name, icu, enable_icus, reg, maybe_extra_ipending) \
 208         .text ;                                                         \
 209         SUPERALIGN_TEXT ;                                               \
 210 IDTVEC(vec_name) ;                                                      \
 211         PUSH_FRAME ;                                                    \
 212         FAKE_MCOUNT(13*4(%esp)) ;                                       \
 213         maybe_extra_ipending ;                                          \
 214         MASK_IRQ(icu, irq_num) ;                                        \
 215         enable_icus ;                                                   \
 216         movl    PCPU(curthread),%ebx ;                                  \
 217         pushl   $0 ;                    /* DUMMY CPL FOR DORETI */      \
 218         cmpl    $TDPRI_CRIT,TD_PRI(%ebx) ;                              \
 219         jl      2f ;                                                    \
 220 1: ;                                                                    \
 221         /* set the pending bit and return, leave interrupt masked */    \
 222         orl     $IRQ_LBIT(irq_num), PCPU(ipending) ;                    \
 223         orl     $RQF_INTPEND, PCPU(reqflags) ;                          \
 224         jmp     5f ;                                                    \
 225 2: ;                                                                    \
 226         /* set running bit, clear pending bit, run handler */           \
 227         andl    $~IRQ_LBIT(irq_num), PCPU(ipending) ;                   \
 228         sti ;                                                           \
 229         pushl   $irq_num ;                                              \
 230         call    sched_ithd ;                                            \
 231         addl    $4,%esp ;                                               \
 232 5: ;                                                                    \
 233         MEXITCOUNT ;                                                    \
 234         jmp     doreti ;                                                \
 235
 236 /*
 237  * Unmask a slow interrupt.  This function is used by interrupt threads
 238  * after they have descheduled themselves to reenable interrupts and
 239  * possibly cause a reschedule to occur.
 240  */
 241
 242 #define INTR_UNMASK(irq_num, vec_name, icu)                             \
 243         .text ;                                                         \
 244         SUPERALIGN_TEXT ;                                               \
 245 IDTVEC(vec_name) ;                                                      \
 246         pushl %ebp ;     /* frame for ddb backtrace */                  \
 247         movl    %esp, %ebp ;                                            \
 248         subl    %eax, %eax ;                                            \
 249         UNMASK_IRQ(icu, irq_num) ;                                      \
 250         popl %ebp ;                                                     \
 251         ret ;                                                           \
 252
 253 MCOUNT_LABEL(bintr)
 254         FAST_INTR(0,fastintr0, IO_ICU1, ENABLE_ICU1,)
 255         FAST_INTR(1,fastintr1, IO_ICU1, ENABLE_ICU1,)
 256         FAST_INTR(2,fastintr2, IO_ICU1, ENABLE_ICU1,)
 257         FAST_INTR(3,fastintr3, IO_ICU1, ENABLE_ICU1,)
 258         FAST_INTR(4,fastintr4, IO_ICU1, ENABLE_ICU1,)
 259         FAST_INTR(5,fastintr5, IO_ICU1, ENABLE_ICU1,)
 260         FAST_INTR(6,fastintr6, IO_ICU1, ENABLE_ICU1,)
 261         FAST_INTR(7,fastintr7, IO_ICU1, ENABLE_ICU1,)
 262         FAST_INTR(8,fastintr8, IO_ICU2, ENABLE_ICU1_AND_2,)
 263         FAST_INTR(9,fastintr9, IO_ICU2, ENABLE_ICU1_AND_2,)
 264         FAST_INTR(10,fastintr10, IO_ICU2, ENABLE_ICU1_AND_2,)
 265         FAST_INTR(11,fastintr11, IO_ICU2, ENABLE_ICU1_AND_2,)
 266         FAST_INTR(12,fastintr12, IO_ICU2, ENABLE_ICU1_AND_2,)
 267         FAST_INTR(13,fastintr13, IO_ICU2, ENABLE_ICU1_AND_2,)
 268         FAST_INTR(14,fastintr14, IO_ICU2, ENABLE_ICU1_AND_2,)
 269         FAST_INTR(15,fastintr15, IO_ICU2, ENABLE_ICU1_AND_2,)
 270
 271         INTR(0,intr0, IO_ICU1, ENABLE_ICU1, al,)
 272         INTR(1,intr1, IO_ICU1, ENABLE_ICU1, al,)
 273         INTR(2,intr2, IO_ICU1, ENABLE_ICU1, al,)
 274         INTR(3,intr3, IO_ICU1, ENABLE_ICU1, al,)
 275         INTR(4,intr4, IO_ICU1, ENABLE_ICU1, al,)
 276         INTR(5,intr5, IO_ICU1, ENABLE_ICU1, al,)
 277         INTR(6,intr6, IO_ICU1, ENABLE_ICU1, al,)
 278         INTR(7,intr7, IO_ICU1, ENABLE_ICU1, al,)
 279         INTR(8,intr8, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 280         INTR(9,intr9, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 281         INTR(10,intr10, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 282         INTR(11,intr11, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 283         INTR(12,intr12, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 284         INTR(13,intr13, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 285         INTR(14,intr14, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 286         INTR(15,intr15, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 287
 288         FAST_UNPEND(0,fastunpend0, IO_ICU1)
 289         FAST_UNPEND(1,fastunpend1, IO_ICU1)
 290         FAST_UNPEND(2,fastunpend2, IO_ICU1)
 291         FAST_UNPEND(3,fastunpend3, IO_ICU1)
 292         FAST_UNPEND(4,fastunpend4, IO_ICU1)
 293         FAST_UNPEND(5,fastunpend5, IO_ICU1)
 294         FAST_UNPEND(6,fastunpend6, IO_ICU1)
 295         FAST_UNPEND(7,fastunpend7, IO_ICU1)
 296         FAST_UNPEND(8,fastunpend8, IO_ICU2)
 297         FAST_UNPEND(9,fastunpend9, IO_ICU2)
 298         FAST_UNPEND(10,fastunpend10, IO_ICU2)
 299         FAST_UNPEND(11,fastunpend11, IO_ICU2)
 300         FAST_UNPEND(12,fastunpend12, IO_ICU2)
 301         FAST_UNPEND(13,fastunpend13, IO_ICU2)
 302         FAST_UNPEND(14,fastunpend14, IO_ICU2)
 303         FAST_UNPEND(15,fastunpend15, IO_ICU2)
 304 MCOUNT_LABEL(eintr)
 305
 306         .data
 307
 308         .text
 309
 310 #endif