5 * \author Gareth Hughes <gareth@valinux.com>
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
31 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_drv.c 254885 2013-08-25 19:37:15Z dumbbell $
35 #include <uapi_drm/radeon_drm.h>
36 #include "radeon_drv.h"
37 #include "radeon_gem.h"
38 #include "radeon_kms.h"
39 #include "radeon_irq_kms.h"
41 #include <drm/drm_pciids.h>
42 #include <linux/module.h>
46 * - 2.0.0 - initial interface
47 * - 2.1.0 - add square tiling interface
48 * - 2.2.0 - add r6xx/r7xx const buffer support
49 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
50 * - 2.4.0 - add crtc id query
51 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
52 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
53 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
54 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
55 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
56 * 2.10.0 - fusion 2D tiling
57 * 2.11.0 - backend map, initial compute support for the CS checker
58 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
59 * 2.13.0 - virtual memory support, streamout
60 * 2.14.0 - add evergreen tiling informations
61 * 2.15.0 - add max_pipes query
62 * 2.16.0 - fix evergreen 2D tiled surface calculation
63 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
64 * 2.18.0 - r600-eg: allow "invalid" DB formats
65 * 2.19.0 - r600-eg: MSAA textures
66 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
67 * 2.21.0 - r600-r700: FMASK and CMASK
68 * 2.22.0 - r600 only: RESOLVE_BOX allowed
69 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
70 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
71 * 2.25.0 - eg+: new info request for num SE and num SH
72 * 2.26.0 - r600-eg: fix htile size computation
73 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
74 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
75 * 2.29.0 - R500 FP16 color clear registers
76 * 2.30.0 - fix for FMASK texturing
77 * 2.31.0 - Add fastfb support for rs690
78 * 2.32.0 - new info request for rings working
79 * 2.33.0 - Add SI tiling mode array query
80 * 2.34.0 - Add CIK tiling mode array query
82 #define KMS_DRIVER_MAJOR 2
83 #define KMS_DRIVER_MINOR 34
84 #define KMS_DRIVER_PATCHLEVEL 0
85 int radeon_suspend_kms(struct drm_device *dev);
86 int radeon_resume_kms(struct drm_device *dev);
87 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
89 int *vpos, int *hpos, ktime_t *stime,
91 extern struct drm_ioctl_desc radeon_ioctls_kms[];
92 extern int radeon_max_kms_ioctl;
94 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
95 #endif /* DUMBBELL_WIP */
96 int radeon_mode_dumb_mmap(struct drm_file *filp,
97 struct drm_device *dev,
98 uint32_t handle, uint64_t *offset_p);
99 int radeon_mode_dumb_create(struct drm_file *file_priv,
100 struct drm_device *dev,
101 struct drm_mode_create_dumb *args);
102 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
103 struct drm_device *dev,
105 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
106 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
108 struct sg_table *sg);
109 int radeon_gem_prime_pin(struct drm_gem_object *obj);
110 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
111 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
112 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
114 #if defined(CONFIG_DEBUG_FS)
115 int radeon_debugfs_init(struct drm_minor *minor);
116 void radeon_debugfs_cleanup(struct drm_minor *minor);
120 #if defined(CONFIG_VGA_SWITCHEROO)
121 void radeon_register_atpx_handler(void);
122 void radeon_unregister_atpx_handler(void);
124 static inline void radeon_register_atpx_handler(void) {}
125 static inline void radeon_unregister_atpx_handler(void) {}
129 int radeon_modeset = 1;
130 int radeon_dynclks = -1;
131 int radeon_r4xx_atom = 0;
132 int radeon_agpmode = 0;
133 int radeon_vram_limit = 0;
134 int radeon_gart_size = 512; /* default gart size */
135 int radeon_benchmarking = 0;
136 int radeon_testing = 0;
137 int radeon_connector_table = 0;
139 int radeon_audio = 0;
140 int radeon_disp_priority = 0;
141 int radeon_hw_i2c = 0;
142 int radeon_pcie_gen2 = -1;
144 int radeon_lockup_timeout = 10000;
145 int radeon_fastfb = 0;
147 int radeon_aspm = -1;
149 TUNABLE_INT("drm.radeon.no_wb", &radeon_no_wb);
150 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
151 module_param_named(no_wb, radeon_no_wb, int, 0444);
153 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
154 module_param_named(modeset, radeon_modeset, int, 0400);
156 TUNABLE_INT("drm.radeon.dynclks", &radeon_dynclks);
157 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
158 module_param_named(dynclks, radeon_dynclks, int, 0444);
160 TUNABLE_INT("drm.radeon.r4xx_atom", &radeon_r4xx_atom);
161 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
162 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
164 TUNABLE_INT("drm.radeon.vram_limit", &radeon_vram_limit);
165 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
166 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
168 TUNABLE_INT("drm.radeon.agpmode", &radeon_agpmode);
169 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
170 module_param_named(agpmode, radeon_agpmode, int, 0444);
172 TUNABLE_INT("drm.radeon.gart_size", &radeon_gart_size);
173 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
174 module_param_named(gartsize, radeon_gart_size, int, 0600);
176 TUNABLE_INT("drm.radeon.benchmarking", &radeon_benchmarking);
177 MODULE_PARM_DESC(benchmark, "Run benchmark");
178 module_param_named(benchmark, radeon_benchmarking, int, 0444);
180 TUNABLE_INT("drm.radeon.testing", &radeon_testing);
181 MODULE_PARM_DESC(test, "Run tests");
182 module_param_named(test, radeon_testing, int, 0444);
184 TUNABLE_INT("drm.radeon.connector_table", &radeon_connector_table);
185 MODULE_PARM_DESC(connector_table, "Force connector table");
186 module_param_named(connector_table, radeon_connector_table, int, 0444);
188 TUNABLE_INT("drm.radeon.tv", &radeon_tv);
189 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
190 module_param_named(tv, radeon_tv, int, 0444);
192 TUNABLE_INT("drm.radeon.audio", &radeon_audio);
193 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
194 module_param_named(audio, radeon_audio, int, 0444);
196 TUNABLE_INT("drm.radeon.disp_priority", &radeon_disp_priority);
197 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
198 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
200 TUNABLE_INT("drm.radeon.hw_i2c", &radeon_hw_i2c);
201 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
202 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
204 TUNABLE_INT("drm.radeon.pcie_gen2", &radeon_pcie_gen2);
205 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
206 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
208 TUNABLE_INT("drm.radeon.msi", &radeon_msi);
209 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
210 module_param_named(msi, radeon_msi, int, 0444);
212 TUNABLE_INT("drm.radeon.lockup_timeout", &radeon_lockup_timeout);
213 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
214 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
216 TUNABLE_INT("drm.radeon.fastfb", &radeon_fastfb);
217 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
218 module_param_named(fastfb, radeon_fastfb, int, 0444);
220 TUNABLE_INT("drm.radeon.dpm", &radeon_dpm);
221 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
222 module_param_named(dpm, radeon_dpm, int, 0444);
224 TUNABLE_INT("drm.radeon.aspm", &radeon_aspm);
225 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
226 module_param_named(aspm, radeon_aspm, int, 0444);
228 static drm_pci_id_list_t pciidlist[] = {
232 #ifdef CONFIG_DRM_RADEON_UMS
236 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
238 drm_radeon_private_t *dev_priv = dev->dev_private;
240 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
243 /* Disable *all* interrupts */
244 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
245 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
246 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
250 static int radeon_resume(struct drm_device *dev)
252 drm_radeon_private_t *dev_priv = dev->dev_private;
254 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
257 /* Restore interrupt registers */
258 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
259 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
260 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
263 #endif /* DUMBBELL_WIP */
266 static const struct file_operations radeon_driver_old_fops = {
267 .owner = THIS_MODULE,
269 .release = drm_release,
270 .unlocked_ioctl = drm_ioctl,
273 .fasync = drm_fasync,
276 .compat_ioctl = radeon_compat_ioctl,
278 .llseek = noop_llseek,
281 static struct drm_driver driver_old = {
283 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
284 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
285 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
286 .load = radeon_driver_load,
287 .firstopen = radeon_driver_firstopen,
288 .open = radeon_driver_open,
289 .preclose = radeon_driver_preclose,
290 .postclose = radeon_driver_postclose,
291 .lastclose = radeon_driver_lastclose,
292 .unload = radeon_driver_unload,
294 .suspend = radeon_suspend,
295 .resume = radeon_resume,
296 #endif /* DUMBBELL_WIP */
297 .get_vblank_counter = radeon_get_vblank_counter,
298 .enable_vblank = radeon_enable_vblank,
299 .disable_vblank = radeon_disable_vblank,
300 .master_create = radeon_master_create,
301 .master_destroy = radeon_master_destroy,
302 .irq_preinstall = radeon_driver_irq_preinstall,
303 .irq_postinstall = radeon_driver_irq_postinstall,
304 .irq_uninstall = radeon_driver_irq_uninstall,
305 .irq_handler = radeon_driver_irq_handler,
306 .ioctls = radeon_ioctls,
307 .dma_ioctl = radeon_cp_buffers,
308 .fops = &radeon_driver_old_fops,
312 .major = DRIVER_MAJOR,
313 .minor = DRIVER_MINOR,
314 .patchlevel = DRIVER_PATCHLEVEL,
316 #endif /* DUMBBELL_WIP */
320 static struct drm_driver kms_driver;
323 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
325 struct apertures_struct *ap;
326 bool primary = false;
328 ap = alloc_apertures(1);
332 ap->ranges[0].base = pci_resource_start(pdev, 0);
333 ap->ranges[0].size = pci_resource_len(pdev, 0);
336 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
338 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
344 static int radeon_pci_probe(struct pci_dev *pdev,
345 const struct pci_device_id *ent)
349 /* Get rid of things like offb */
350 ret = radeon_kick_out_firmware_fb(pdev);
354 return drm_get_pci_dev(pdev, ent, &kms_driver);
358 radeon_pci_remove(struct pci_dev *pdev)
360 struct drm_device *dev = pci_get_drvdata(pdev);
366 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
368 struct drm_device *dev = pci_get_drvdata(pdev);
369 return radeon_suspend_kms(dev, state);
373 radeon_pci_resume(struct pci_dev *pdev)
375 struct drm_device *dev = pci_get_drvdata(pdev);
376 return radeon_resume_kms(dev);
379 static const struct file_operations radeon_driver_kms_fops = {
380 .owner = THIS_MODULE,
382 .release = drm_release,
383 .unlocked_ioctl = drm_ioctl,
386 .fasync = drm_fasync,
389 .compat_ioctl = radeon_kms_compat_ioctl,
392 #endif /* DUMBBELL_WIP */
394 static struct drm_driver kms_driver = {
396 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
397 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
398 DRIVER_PRIME /* | DRIVE_MODESET */,
401 #endif /* DUMBBELL_WIP */
402 .load = radeon_driver_load_kms,
403 .use_msi = radeon_msi_ok,
404 .firstopen = radeon_driver_firstopen_kms,
405 .open = radeon_driver_open_kms,
406 .preclose = radeon_driver_preclose_kms,
407 .postclose = radeon_driver_postclose_kms,
408 .lastclose = radeon_driver_lastclose_kms,
409 .unload = radeon_driver_unload_kms,
411 .suspend = radeon_suspend_kms,
412 .resume = radeon_resume_kms,
413 #endif /* DUMBBELL_WIP */
414 .get_vblank_counter = radeon_get_vblank_counter_kms,
415 .enable_vblank = radeon_enable_vblank_kms,
416 .disable_vblank = radeon_disable_vblank_kms,
417 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
418 .get_scanout_position = radeon_get_crtc_scanoutpos,
419 .irq_preinstall = radeon_driver_irq_preinstall_kms,
420 .irq_postinstall = radeon_driver_irq_postinstall_kms,
421 .irq_uninstall = radeon_driver_irq_uninstall_kms,
422 .irq_handler = radeon_driver_irq_handler_kms,
423 .ioctls = radeon_ioctls_kms,
424 .gem_free_object = radeon_gem_object_free,
425 .gem_open_object = radeon_gem_object_open,
426 .gem_close_object = radeon_gem_object_close,
427 .dma_ioctl = radeon_dma_ioctl_kms,
428 .dumb_create = radeon_mode_dumb_create,
429 .dumb_map_offset = radeon_mode_dumb_mmap,
430 .dumb_destroy = radeon_mode_dumb_destroy,
432 .fops = &radeon_driver_kms_fops,
433 #endif /* DUMBBELL_WIP */
436 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
437 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
438 .gem_prime_export = drm_gem_prime_export,
439 .gem_prime_import = drm_gem_prime_import,
440 .gem_prime_pin = radeon_gem_prime_pin,
441 .gem_prime_unpin = radeon_gem_prime_unpin,
442 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
443 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
444 .gem_prime_vmap = radeon_gem_prime_vmap,
445 .gem_prime_vunmap = radeon_gem_prime_vunmap,
446 #endif /* DUMBBELL_WIP */
451 .major = KMS_DRIVER_MAJOR,
452 .minor = KMS_DRIVER_MINOR,
453 .patchlevel = KMS_DRIVER_PATCHLEVEL,
457 static int __init radeon_init(void)
459 if (radeon_modeset == 1) {
460 DRM_INFO("radeon kernel modesetting enabled.\n");
461 driver = &kms_driver;
462 pdriver = &radeon_kms_pci_driver;
463 driver->driver_features |= DRIVER_MODESET;
464 driver->num_ioctls = radeon_max_kms_ioctl;
465 radeon_register_atpx_handler();
468 #ifdef CONFIG_DRM_RADEON_UMS
469 DRM_INFO("radeon userspace modesetting enabled.\n");
470 driver = &driver_old;
471 pdriver = &radeon_pci_driver;
472 driver->driver_features &= ~DRIVER_MODESET;
473 driver->num_ioctls = radeon_max_ioctl;
475 DRM_ERROR("No UMS support in radeon module!\n");
480 /* let modprobe override vga console setting */
481 return drm_pci_init(driver, pdriver);
484 static void __exit radeon_exit(void)
486 drm_pci_exit(driver, pdriver);
487 radeon_unregister_atpx_handler();
489 #endif /* DUMBBELL_WIP */
491 /* =================================================================== */
494 radeon_probe(device_t kdev)
497 return drm_probe(kdev, pciidlist);
501 radeon_attach(device_t kdev)
503 struct drm_device *dev;
505 dev = device_get_softc(kdev);
506 if (radeon_modeset == 1) {
507 kms_driver.driver_features |= DRIVER_MODESET;
508 kms_driver.num_ioctls = radeon_max_kms_ioctl;
509 radeon_register_atpx_handler();
511 dev->driver = &kms_driver;
512 return (drm_attach(kdev, pciidlist));
516 radeon_suspend(device_t kdev)
518 struct drm_device *dev;
521 dev = device_get_softc(kdev);
522 ret = radeon_suspend_kms(dev);
528 radeon_resume(device_t kdev)
530 struct drm_device *dev;
533 dev = device_get_softc(kdev);
534 ret = radeon_resume_kms(dev);
539 static device_method_t radeon_methods[] = {
540 /* Device interface */
541 DEVMETHOD(device_probe, radeon_probe),
542 DEVMETHOD(device_attach, radeon_attach),
543 DEVMETHOD(device_suspend, radeon_suspend),
544 DEVMETHOD(device_resume, radeon_resume),
545 DEVMETHOD(device_detach, drm_release),
549 static driver_t radeon_driver = {
552 sizeof(struct drm_device)
555 extern devclass_t drm_devclass;
556 DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass,
557 NULL, NULL, SI_ORDER_ANY);
558 MODULE_DEPEND(radeonkms, drm, 1, 1, 1);
559 MODULE_DEPEND(radeonkms, agp, 1, 1, 1);
560 MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1);
561 MODULE_DEPEND(radeonkms, iic, 1, 1, 1);
562 MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1);