2 * Copyright (c) 1996, by Steve Passe
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the developer may NOT be used to endorse or promote products
11 * derived from this software without specific prior written permission.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * $FreeBSD: src/sys/i386/i386/mp_machdep.c,v 1.115.2.15 2003/03/14 21:22:35 jhb Exp $
26 * $DragonFly: src/sys/platform/pc32/i386/mp_machdep.c,v 1.60 2008/06/07 12:03:52 mneumann Exp $
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/sysctl.h>
35 #include <sys/malloc.h>
36 #include <sys/memrange.h>
37 #include <sys/cons.h> /* cngetc() */
38 #include <sys/machintr.h>
41 #include <vm/vm_param.h>
43 #include <vm/vm_kern.h>
44 #include <vm/vm_extern.h>
46 #include <vm/vm_map.h>
52 #include <sys/mplock2.h>
54 #include <machine/smp.h>
55 #include <machine_base/apic/apicreg.h>
56 #include <machine/atomic.h>
57 #include <machine/cpufunc.h>
58 #include <machine/cputypes.h>
59 #include <machine_base/apic/ioapic_abi.h>
60 #include <machine_base/apic/lapic.h>
61 #include <machine_base/apic/ioapic.h>
62 #include <machine/psl.h>
63 #include <machine/segments.h>
64 #include <machine/tss.h>
65 #include <machine/specialreg.h>
66 #include <machine/globaldata.h>
67 #include <machine/pmap_inval.h>
68 #include <machine/mptable.h>
70 #include <machine/md_var.h> /* setidt() */
71 #include <machine_base/icu/icu.h> /* IPIs */
72 #include <machine/intr_machdep.h> /* IPIs */
74 extern u_long ebda_addr;
75 extern u_int base_memory;
76 extern int imcr_present;
78 #define BIOS_BASE (0xf0000)
79 #define BIOS_BASE2 (0xe0000)
80 #define BIOS_SIZE (0x10000)
81 #define BIOS_COUNT (BIOS_SIZE/4)
83 #define PROCENTRY_FLAG_EN 0x01
84 #define PROCENTRY_FLAG_BP 0x02
85 #define IOAPICENTRY_FLAG_EN 0x01
87 /* MP Floating Pointer Structure */
88 typedef struct MPFPS {
101 /* MP Configuration Table Header */
102 typedef struct MPCTH {
104 u_short base_table_length;
108 u_char product_id[12];
109 void *oem_table_pointer;
110 u_short oem_table_size;
113 u_short extended_table_length;
114 u_char extended_table_checksum;
119 typedef struct PROCENTRY {
124 u_long cpu_signature;
125 u_long feature_flags;
130 typedef struct BUSENTRY {
136 typedef struct IOAPICENTRY {
142 } *io_apic_entry_ptr;
144 typedef struct INTENTRY {
154 /* descriptions of MP basetable entries */
155 typedef struct BASETABLE_ENTRY {
164 vm_size_t mp_cth_mapsz;
167 #define MPTABLE_POS_USE_DEFAULT(mpt) \
168 ((mpt)->mp_fps->mpfb1 != 0 || (mpt)->mp_cth == NULL)
172 int mb_type; /* MPTABLE_BUS_ */
173 TAILQ_ENTRY(mptable_bus) mb_link;
176 #define MPTABLE_BUS_ISA 0
177 #define MPTABLE_BUS_PCI 1
179 struct mptable_bus_info {
180 TAILQ_HEAD(, mptable_bus) mbi_list;
183 struct mptable_pci_int {
190 TAILQ_ENTRY(mptable_pci_int) mpci_link;
193 struct mptable_ioapic {
199 TAILQ_ENTRY(mptable_ioapic) mio_link;
202 typedef int (*mptable_iter_func)(void *, const void *, int);
204 static int mptable_iterate_entries(const mpcth_t,
205 mptable_iter_func, void *);
206 static int mptable_search(void);
207 static int mptable_search_sig(u_int32_t target, int count);
208 static int mptable_hyperthread_fixup(cpumask_t, int);
209 static int mptable_map(struct mptable_pos *);
210 static void mptable_unmap(struct mptable_pos *);
211 static void mptable_bus_info_alloc(const mpcth_t,
212 struct mptable_bus_info *);
213 static void mptable_bus_info_free(struct mptable_bus_info *);
215 static int mptable_lapic_probe(struct lapic_enumerator *);
216 static void mptable_lapic_enumerate(struct lapic_enumerator *);
217 static void mptable_lapic_default(void);
219 static int mptable_ioapic_probe(struct ioapic_enumerator *);
220 static void mptable_ioapic_enumerate(struct ioapic_enumerator *);
222 static basetable_entry basetable_entry_types[] =
224 {0, 20, "Processor"},
231 static vm_paddr_t mptable_fps_phyaddr;
232 static int mptable_use_default;
233 static TAILQ_HEAD(mptable_pci_int_list, mptable_pci_int) mptable_pci_int_list =
234 TAILQ_HEAD_INITIALIZER(mptable_pci_int_list);
235 static TAILQ_HEAD(mptable_ioapic_list, mptable_ioapic) mptable_ioapic_list =
236 TAILQ_HEAD_INITIALIZER(mptable_ioapic_list);
241 struct mptable_pos mpt;
244 KKASSERT(mptable_fps_phyaddr == 0);
246 mptable_fps_phyaddr = mptable_search();
247 if (mptable_fps_phyaddr == 0)
250 error = mptable_map(&mpt);
252 mptable_fps_phyaddr = 0;
256 if (MPTABLE_POS_USE_DEFAULT(&mpt)) {
257 kprintf("MPTABLE: use default configuration\n");
258 mptable_use_default = 1;
260 if (mpt.mp_fps->mpfb2 & 0x80)
265 SYSINIT(mptable_probe, SI_BOOT2_PRESMP, SI_ORDER_FIRST, mptable_probe, 0);
268 * Look for an Intel MP spec table (ie, SMP capable hardware).
276 /* see if EBDA exists */
277 if (ebda_addr != 0) {
278 /* search first 1K of EBDA */
279 target = (u_int32_t)ebda_addr;
280 if ((x = mptable_search_sig(target, 1024 / 4)) > 0)
283 /* last 1K of base memory, effective 'top of base' passed in */
284 target = (u_int32_t)(base_memory - 0x400);
285 if ((x = mptable_search_sig(target, 1024 / 4)) > 0)
289 /* search the BIOS */
290 target = (u_int32_t)BIOS_BASE;
291 if ((x = mptable_search_sig(target, BIOS_COUNT)) > 0)
294 /* search the extended BIOS */
295 target = (u_int32_t)BIOS_BASE2;
296 if ((x = mptable_search_sig(target, BIOS_COUNT)) > 0)
304 mptable_iterate_entries(const mpcth_t cth, mptable_iter_func func, void *arg)
306 int count, total_size;
307 const void *position;
309 KKASSERT(cth->base_table_length >= sizeof(struct MPCTH));
310 total_size = cth->base_table_length - sizeof(struct MPCTH);
311 position = (const uint8_t *)cth + sizeof(struct MPCTH);
312 count = cth->entry_count;
317 KKASSERT(total_size >= 0);
318 if (total_size == 0) {
319 kprintf("invalid base MP table, "
320 "entry count and length mismatch\n");
324 type = *(const uint8_t *)position;
326 case 0: /* processor_entry */
327 case 1: /* bus_entry */
328 case 2: /* io_apic_entry */
329 case 3: /* int_entry */
330 case 4: /* int_entry */
333 kprintf("unknown base MP table entry type %d\n", type);
337 if (total_size < basetable_entry_types[type].length) {
338 kprintf("invalid base MP table length, "
339 "does not contain all entries\n");
342 total_size -= basetable_entry_types[type].length;
344 error = func(arg, position, type);
348 position = (const uint8_t *)position +
349 basetable_entry_types[type].length;
355 * look for the MP spec signature
358 /* string defined by the Intel MP Spec as identifying the MP table */
359 #define MP_SIG 0x5f504d5f /* _MP_ */
360 #define NEXT(X) ((X) += 4)
362 mptable_search_sig(u_int32_t target, int count)
368 KKASSERT(target != 0);
370 map_size = count * sizeof(u_int32_t);
371 addr = pmap_mapdev((vm_paddr_t)target, map_size);
374 for (x = 0; x < count; NEXT(x)) {
375 if (addr[x] == MP_SIG) {
376 /* make array index a byte index */
377 ret = target + (x * sizeof(u_int32_t));
382 pmap_unmapdev((vm_offset_t)addr, map_size);
386 static int processor_entry (const struct PROCENTRY *entry, int cpu);
389 * Check if we should perform a hyperthreading "fix-up" to
390 * enumerate any logical CPU's that aren't already listed
393 * XXX: We assume that all of the physical CPUs in the
394 * system have the same number of logical CPUs.
396 * XXX: We assume that APIC ID's are allocated such that
397 * the APIC ID's for a physical processor are aligned
398 * with the number of logical CPU's in the processor.
401 mptable_hyperthread_fixup(cpumask_t id_mask, int cpu_count)
403 int i, id, lcpus_max, logical_cpus;
405 if ((cpu_feature & CPUID_HTT) == 0)
408 lcpus_max = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
412 if (cpu_vendor_id == CPU_VENDOR_INTEL) {
414 * INSTRUCTION SET REFERENCE, A-M (#253666)
415 * Page 3-181, Table 3-20
416 * "The nearest power-of-2 integer that is not smaller
417 * than EBX[23:16] is the number of unique initial APIC
418 * IDs reserved for addressing different logical
419 * processors in a physical package."
422 if ((1 << i) >= lcpus_max) {
429 KKASSERT(cpu_count != 0);
430 if (cpu_count == lcpus_max) {
431 /* We have nothing to fix */
433 } else if (cpu_count == 1) {
434 /* XXX this may be incorrect */
435 logical_cpus = lcpus_max;
440 * Calculate the distances between two nearest
441 * APIC IDs. If all such distances are same,
442 * then it is the number of missing cpus that
443 * we are going to fill later.
445 dist = cur = prev = -1;
446 for (id = 0; id < MAXCPU; ++id) {
447 if ((id_mask & CPUMASK(id)) == 0)
452 int new_dist = cur - prev;
458 * Make sure that all distances
459 * between two nearest APIC IDs
462 if (dist != new_dist)
470 /* Must be power of 2 */
471 if (dist & (dist - 1))
474 /* Can't exceed CPU package capacity */
475 if (dist > lcpus_max)
476 logical_cpus = lcpus_max;
482 * For each APIC ID of a CPU that is set in the mask,
483 * scan the other candidate APIC ID's for this
484 * physical processor. If any of those ID's are
485 * already in the table, then kill the fixup.
487 for (id = 0; id < MAXCPU; id++) {
488 if ((id_mask & CPUMASK(id)) == 0)
490 /* First, make sure we are on a logical_cpus boundary. */
491 if (id % logical_cpus != 0)
493 for (i = id + 1; i < id + logical_cpus; i++)
494 if ((id_mask & CPUMASK(i)) != 0)
501 mptable_map(struct mptable_pos *mpt)
505 vm_size_t cth_mapsz = 0;
507 KKASSERT(mptable_fps_phyaddr != 0);
509 bzero(mpt, sizeof(*mpt));
511 fps = pmap_mapdev(mptable_fps_phyaddr, sizeof(*fps));
514 * Map configuration table header to get
515 * the base table size
517 cth = pmap_mapdev(fps->pap, sizeof(*cth));
518 cth_mapsz = cth->base_table_length;
519 pmap_unmapdev((vm_offset_t)cth, sizeof(*cth));
521 if (cth_mapsz < sizeof(*cth)) {
522 kprintf("invalid base MP table length %d\n",
524 pmap_unmapdev((vm_offset_t)fps, sizeof(*fps));
531 cth = pmap_mapdev(fps->pap, cth_mapsz);
536 mpt->mp_cth_mapsz = cth_mapsz;
542 mptable_unmap(struct mptable_pos *mpt)
544 if (mpt->mp_cth != NULL) {
545 pmap_unmapdev((vm_offset_t)mpt->mp_cth, mpt->mp_cth_mapsz);
547 mpt->mp_cth_mapsz = 0;
549 if (mpt->mp_fps != NULL) {
550 pmap_unmapdev((vm_offset_t)mpt->mp_fps, sizeof(*mpt->mp_fps));
556 processor_entry(const struct PROCENTRY *entry, int cpu)
560 /* check for usability */
561 if (!(entry->cpu_flags & PROCENTRY_FLAG_EN))
564 /* check for BSP flag */
565 if (entry->cpu_flags & PROCENTRY_FLAG_BP) {
566 lapic_set_cpuid(0, entry->apic_id);
567 return 0; /* its already been counted */
570 /* add another AP to list, if less than max number of CPUs */
571 else if (cpu < MAXCPU) {
572 lapic_set_cpuid(cpu, entry->apic_id);
580 mptable_bus_info_callback(void *xarg, const void *pos, int type)
582 struct mptable_bus_info *bus_info = xarg;
583 const struct BUSENTRY *ent;
584 struct mptable_bus *bus;
590 TAILQ_FOREACH(bus, &bus_info->mbi_list, mb_link) {
591 if (bus->mb_id == ent->bus_id) {
592 kprintf("mptable_bus_info_alloc: duplicated bus id "
593 "(%d)\n", bus->mb_id);
599 if (strncmp(ent->bus_type, "PCI", 3) == 0) {
600 bus = kmalloc(sizeof(*bus), M_TEMP, M_WAITOK | M_ZERO);
601 bus->mb_type = MPTABLE_BUS_PCI;
602 } else if (strncmp(ent->bus_type, "ISA", 3) == 0) {
603 bus = kmalloc(sizeof(*bus), M_TEMP, M_WAITOK | M_ZERO);
604 bus->mb_type = MPTABLE_BUS_ISA;
608 bus->mb_id = ent->bus_id;
609 TAILQ_INSERT_TAIL(&bus_info->mbi_list, bus, mb_link);
615 mptable_bus_info_alloc(const mpcth_t cth, struct mptable_bus_info *bus_info)
619 bzero(bus_info, sizeof(*bus_info));
620 TAILQ_INIT(&bus_info->mbi_list);
622 error = mptable_iterate_entries(cth, mptable_bus_info_callback, bus_info);
624 mptable_bus_info_free(bus_info);
628 mptable_bus_info_free(struct mptable_bus_info *bus_info)
630 struct mptable_bus *bus;
632 while ((bus = TAILQ_FIRST(&bus_info->mbi_list)) != NULL) {
633 TAILQ_REMOVE(&bus_info->mbi_list, bus, mb_link);
638 struct mptable_lapic_cbarg1 {
641 u_int ht_apicid_mask;
645 mptable_lapic_pass1_callback(void *xarg, const void *pos, int type)
647 const struct PROCENTRY *ent;
648 struct mptable_lapic_cbarg1 *arg = xarg;
654 if ((ent->cpu_flags & PROCENTRY_FLAG_EN) == 0)
658 if (ent->apic_id < 32) {
659 arg->ht_apicid_mask |= 1 << ent->apic_id;
660 } else if (arg->ht_fixup) {
661 kprintf("MPTABLE: lapic id > 32, disable HTT fixup\n");
667 struct mptable_lapic_cbarg2 {
674 mptable_lapic_pass2_callback(void *xarg, const void *pos, int type)
676 const struct PROCENTRY *ent;
677 struct mptable_lapic_cbarg2 *arg = xarg;
683 if (ent->cpu_flags & PROCENTRY_FLAG_BP) {
684 KKASSERT(!arg->found_bsp);
688 if (processor_entry(ent, arg->cpu))
691 if (arg->logical_cpus) {
692 struct PROCENTRY proc;
696 * Create fake mptable processor entries
697 * and feed them to processor_entry() to
698 * enumerate the logical CPUs.
700 bzero(&proc, sizeof(proc));
702 proc.cpu_flags = PROCENTRY_FLAG_EN;
703 proc.apic_id = ent->apic_id;
705 for (i = 1; i < arg->logical_cpus; i++) {
707 processor_entry(&proc, arg->cpu);
715 mptable_lapic_default(void)
717 int ap_apicid, bsp_apicid;
719 mp_naps = 1; /* exclude BSP */
721 /* Map local apic before the id field is accessed */
722 lapic_map(DEFAULT_APIC_BASE);
724 bsp_apicid = APIC_ID(lapic->id);
725 ap_apicid = (bsp_apicid == 0) ? 1 : 0;
728 lapic_set_cpuid(0, bsp_apicid);
729 /* one and only AP */
730 lapic_set_cpuid(1, ap_apicid);
736 * APIC ID <-> CPU ID mappings
739 mptable_lapic_enumerate(struct lapic_enumerator *e)
741 struct mptable_pos mpt;
742 struct mptable_lapic_cbarg1 arg1;
743 struct mptable_lapic_cbarg2 arg2;
745 int error, logical_cpus = 0;
746 vm_offset_t lapic_addr;
748 if (mptable_use_default) {
749 mptable_lapic_default();
753 error = mptable_map(&mpt);
755 panic("mptable_lapic_enumerate mptable_map failed\n");
756 KKASSERT(!MPTABLE_POS_USE_DEFAULT(&mpt));
760 /* Save local apic address */
761 lapic_addr = (vm_offset_t)cth->apic_address;
762 KKASSERT(lapic_addr != 0);
765 * Find out how many CPUs do we have
767 bzero(&arg1, sizeof(arg1));
768 arg1.ht_fixup = 1; /* Apply ht fixup by default */
770 error = mptable_iterate_entries(cth,
771 mptable_lapic_pass1_callback, &arg1);
773 panic("mptable_iterate_entries(lapic_pass1) failed\n");
774 KKASSERT(arg1.cpu_count != 0);
776 /* See if we need to fixup HT logical CPUs. */
778 logical_cpus = mptable_hyperthread_fixup(arg1.ht_apicid_mask,
780 if (logical_cpus != 0)
781 arg1.cpu_count *= logical_cpus;
783 mp_naps = arg1.cpu_count - 1; /* subtract the BSP */
786 * Link logical CPU id to local apic id
788 bzero(&arg2, sizeof(arg2));
790 arg2.logical_cpus = logical_cpus;
792 error = mptable_iterate_entries(cth,
793 mptable_lapic_pass2_callback, &arg2);
795 panic("mptable_iterate_entries(lapic_pass2) failed\n");
796 KKASSERT(arg2.found_bsp);
799 lapic_map(lapic_addr);
804 struct mptable_lapic_probe_cbarg {
810 mptable_lapic_probe_callback(void *xarg, const void *pos, int type)
812 const struct PROCENTRY *ent;
813 struct mptable_lapic_probe_cbarg *arg = xarg;
819 if ((ent->cpu_flags & PROCENTRY_FLAG_EN) == 0)
823 if (ent->cpu_flags & PROCENTRY_FLAG_BP) {
824 if (arg->found_bsp) {
825 kprintf("more than one BSP in base MP table\n");
834 mptable_lapic_probe(struct lapic_enumerator *e)
836 struct mptable_pos mpt;
837 struct mptable_lapic_probe_cbarg arg;
841 if (mptable_fps_phyaddr == 0)
844 if (mptable_use_default)
847 error = mptable_map(&mpt);
850 KKASSERT(!MPTABLE_POS_USE_DEFAULT(&mpt));
855 if (cth->apic_address == 0)
858 bzero(&arg, sizeof(arg));
859 error = mptable_iterate_entries(cth,
860 mptable_lapic_probe_callback, &arg);
862 if (arg.cpu_count == 0) {
863 kprintf("MP table contains no processor entries\n");
865 } else if (!arg.found_bsp) {
866 kprintf("MP table does not contains BSP entry\n");
875 static struct lapic_enumerator mptable_lapic_enumerator = {
876 .lapic_prio = LAPIC_ENUM_PRIO_MPTABLE,
877 .lapic_probe = mptable_lapic_probe,
878 .lapic_enumerate = mptable_lapic_enumerate
882 mptable_lapic_enum_register(void)
884 lapic_enumerator_register(&mptable_lapic_enumerator);
886 SYSINIT(mptable_lapic, SI_BOOT2_PRESMP, SI_ORDER_ANY,
887 mptable_lapic_enum_register, 0);
890 mptable_ioapic_list_callback(void *xarg, const void *pos, int type)
892 const struct IOAPICENTRY *ent;
893 struct mptable_ioapic *nioapic, *ioapic;
899 if ((ent->apic_flags & IOAPICENTRY_FLAG_EN) == 0)
902 if (ent->apic_address == 0) {
903 kprintf("mptable_ioapic_create_list: zero IOAPIC addr\n");
907 TAILQ_FOREACH(ioapic, &mptable_ioapic_list, mio_link) {
908 if (ioapic->mio_apic_id == ent->apic_id) {
909 kprintf("mptable_ioapic_create_list: duplicated "
910 "apic id %d\n", ioapic->mio_apic_id);
913 if (ioapic->mio_addr == (uint32_t)ent->apic_address) {
914 kprintf("mptable_ioapic_create_list: overlapped "
915 "IOAPIC addr 0x%08x", ioapic->mio_addr);
920 nioapic = kmalloc(sizeof(*nioapic), M_DEVBUF, M_WAITOK | M_ZERO);
921 nioapic->mio_apic_id = ent->apic_id;
922 nioapic->mio_addr = (uint32_t)ent->apic_address;
925 * Create IOAPIC list in ascending order of APIC ID
927 TAILQ_FOREACH_REVERSE(ioapic, &mptable_ioapic_list,
928 mptable_ioapic_list, mio_link) {
929 if (nioapic->mio_apic_id > ioapic->mio_apic_id) {
930 TAILQ_INSERT_AFTER(&mptable_ioapic_list,
931 ioapic, nioapic, mio_link);
936 TAILQ_INSERT_HEAD(&mptable_ioapic_list, nioapic, mio_link);
942 mptable_ioapic_create_list(void)
944 struct mptable_ioapic *ioapic;
945 struct mptable_pos mpt;
948 if (mptable_fps_phyaddr == 0)
951 if (mptable_use_default) {
952 ioapic = kmalloc(sizeof(*ioapic), M_DEVBUF, M_WAITOK | M_ZERO);
954 ioapic->mio_apic_id = 0; /* NOTE: any value is ok here */
955 ioapic->mio_addr = 0xfec00000; /* XXX magic number */
957 TAILQ_INSERT_HEAD(&mptable_ioapic_list, ioapic, mio_link);
961 error = mptable_map(&mpt);
963 panic("mptable_ioapic_create_list: mptable_map failed\n");
964 KKASSERT(!MPTABLE_POS_USE_DEFAULT(&mpt));
966 error = mptable_iterate_entries(mpt.mp_cth,
967 mptable_ioapic_list_callback, NULL);
969 while ((ioapic = TAILQ_FIRST(&mptable_ioapic_list)) != NULL) {
970 TAILQ_REMOVE(&mptable_ioapic_list, ioapic, mio_link);
971 kfree(ioapic, M_DEVBUF);
977 * Assign index number for each IOAPIC
980 TAILQ_FOREACH(ioapic, &mptable_ioapic_list, mio_link) {
981 ioapic->mio_idx = idx;
987 SYSINIT(mptable_ioapic_list, SI_BOOT2_PRESMP, SI_ORDER_SECOND,
988 mptable_ioapic_create_list, 0);
991 mptable_pci_int_callback(void *xarg, const void *pos, int type)
993 const struct mptable_bus_info *bus_info = xarg;
994 const struct mptable_ioapic *ioapic;
995 const struct mptable_bus *bus;
996 struct mptable_pci_int *pci_int;
997 const struct INTENTRY *ent;
998 int pci_pin, pci_dev;
1004 if (ent->int_type != 0)
1007 TAILQ_FOREACH(bus, &bus_info->mbi_list, mb_link) {
1008 if (bus->mb_type == MPTABLE_BUS_PCI &&
1009 bus->mb_id == ent->src_bus_id)
1015 TAILQ_FOREACH(ioapic, &mptable_ioapic_list, mio_link) {
1016 if (ioapic->mio_apic_id == ent->dst_apic_id)
1019 if (ioapic == NULL) {
1020 kprintf("MPTABLE: warning PCI int dst apic id %d "
1021 "does not exist\n", ent->dst_apic_id);
1025 pci_pin = ent->src_bus_irq & 0x3;
1026 pci_dev = (ent->src_bus_irq >> 2) & 0x1f;
1028 TAILQ_FOREACH(pci_int, &mptable_pci_int_list, mpci_link) {
1029 if (pci_int->mpci_bus == ent->src_bus_id &&
1030 pci_int->mpci_dev == pci_dev &&
1031 pci_int->mpci_pin == pci_pin) {
1032 if (pci_int->mpci_ioapic_idx == ioapic->mio_idx &&
1033 pci_int->mpci_ioapic_pin == ent->dst_apic_int) {
1034 kprintf("MPTABLE: warning duplicated "
1035 "PCI int entry for "
1036 "bus %d, dev %d, pin %d\n",
1042 kprintf("mptable_pci_int_register: "
1043 "conflict PCI int entry for "
1044 "bus %d, dev %d, pin %d, "
1045 "IOAPIC %d.%d -> %d.%d\n",
1049 pci_int->mpci_ioapic_idx,
1050 pci_int->mpci_ioapic_pin,
1058 pci_int = kmalloc(sizeof(*pci_int), M_DEVBUF, M_WAITOK | M_ZERO);
1060 pci_int->mpci_bus = ent->src_bus_id;
1061 pci_int->mpci_dev = pci_dev;
1062 pci_int->mpci_pin = pci_pin;
1063 pci_int->mpci_ioapic_idx = ioapic->mio_idx;
1064 pci_int->mpci_ioapic_pin = ent->dst_apic_int;
1066 TAILQ_INSERT_TAIL(&mptable_pci_int_list, pci_int, mpci_link);
1072 mptable_pci_int_register(void)
1074 struct mptable_bus_info bus_info;
1075 const struct mptable_bus *bus;
1076 struct mptable_pci_int *pci_int;
1077 struct mptable_pos mpt;
1078 int error, force_pci0, npcibus;
1081 if (mptable_fps_phyaddr == 0)
1084 if (mptable_use_default)
1087 if (TAILQ_EMPTY(&mptable_ioapic_list))
1090 error = mptable_map(&mpt);
1092 panic("mptable_pci_int_register: mptable_map failed\n");
1093 KKASSERT(!MPTABLE_POS_USE_DEFAULT(&mpt));
1097 mptable_bus_info_alloc(cth, &bus_info);
1098 if (TAILQ_EMPTY(&bus_info.mbi_list))
1103 TAILQ_FOREACH(bus, &bus_info.mbi_list, mb_link) {
1104 if (bus->mb_type == MPTABLE_BUS_PCI)
1108 mptable_bus_info_free(&bus_info);
1110 } else if (npcibus == 1) {
1114 error = mptable_iterate_entries(cth,
1115 mptable_pci_int_callback, &bus_info);
1117 mptable_bus_info_free(&bus_info);
1120 while ((pci_int = TAILQ_FIRST(&mptable_pci_int_list)) != NULL) {
1121 TAILQ_REMOVE(&mptable_pci_int_list, pci_int, mpci_link);
1122 kfree(pci_int, M_DEVBUF);
1128 TAILQ_FOREACH(pci_int, &mptable_pci_int_list, mpci_link)
1129 pci_int->mpci_bus = 0;
1132 mptable_unmap(&mpt);
1134 SYSINIT(mptable_pci, SI_BOOT2_PRESMP, SI_ORDER_ANY,
1135 mptable_pci_int_register, 0);
1137 struct mptable_ioapic_probe_cbarg {
1138 const struct mptable_bus_info *bus_info;
1142 mptable_ioapic_probe_callback(void *xarg, const void *pos, int type)
1144 struct mptable_ioapic_probe_cbarg *arg = xarg;
1145 const struct mptable_ioapic *ioapic;
1146 const struct mptable_bus *bus;
1147 const struct INTENTRY *ent;
1153 if (ent->int_type != 0)
1156 TAILQ_FOREACH(bus, &arg->bus_info->mbi_list, mb_link) {
1157 if (bus->mb_type == MPTABLE_BUS_ISA &&
1158 bus->mb_id == ent->src_bus_id)
1164 TAILQ_FOREACH(ioapic, &mptable_ioapic_list, mio_link) {
1165 if (ioapic->mio_apic_id == ent->dst_apic_id)
1168 if (ioapic == NULL) {
1169 kprintf("MPTABLE: warning ISA int dst apic id %d "
1170 "does not exist\n", ent->dst_apic_id);
1174 /* XXX magic number */
1175 if (ent->src_bus_irq >= 16) {
1176 kprintf("mptable_ioapic_probe: invalid ISA irq (%d)\n",
1184 mptable_ioapic_probe(struct ioapic_enumerator *e)
1186 struct mptable_ioapic_probe_cbarg arg;
1187 struct mptable_bus_info bus_info;
1188 struct mptable_pos mpt;
1192 if (mptable_fps_phyaddr == 0)
1195 if (mptable_use_default)
1198 if (TAILQ_EMPTY(&mptable_ioapic_list))
1201 error = mptable_map(&mpt);
1203 panic("mptable_ioapic_probe: mptable_map failed\n");
1204 KKASSERT(!MPTABLE_POS_USE_DEFAULT(&mpt));
1208 mptable_bus_info_alloc(cth, &bus_info);
1210 bzero(&arg, sizeof(arg));
1211 arg.bus_info = &bus_info;
1213 error = mptable_iterate_entries(cth,
1214 mptable_ioapic_probe_callback, &arg);
1216 mptable_bus_info_free(&bus_info);
1217 mptable_unmap(&mpt);
1222 struct mptable_ioapic_int_cbarg {
1223 const struct mptable_bus_info *bus_info;
1228 mptable_ioapic_int_callback(void *xarg, const void *pos, int type)
1230 struct mptable_ioapic_int_cbarg *arg = xarg;
1231 const struct mptable_ioapic *ioapic;
1232 const struct mptable_bus *bus;
1233 const struct INTENTRY *ent;
1242 if (ent->int_type != 0)
1245 TAILQ_FOREACH(bus, &arg->bus_info->mbi_list, mb_link) {
1246 if (bus->mb_type == MPTABLE_BUS_ISA &&
1247 bus->mb_id == ent->src_bus_id)
1253 TAILQ_FOREACH(ioapic, &mptable_ioapic_list, mio_link) {
1254 if (ioapic->mio_apic_id == ent->dst_apic_id)
1257 if (ioapic == NULL) {
1258 kprintf("MPTABLE: warning ISA int dst apic id %d "
1259 "does not exist\n", ent->dst_apic_id);
1263 if (ent->dst_apic_int >= ioapic->mio_npin) {
1264 panic("mptable_ioapic_enumerate: invalid I/O APIC "
1265 "pin %d, should be < %d",
1266 ent->dst_apic_int, ioapic->mio_npin);
1268 gsi = ioapic->mio_gsi_base + ent->dst_apic_int;
1270 if (ent->src_bus_irq != gsi) {
1272 kprintf("MPTABLE: INTSRC irq %d -> GSI %d\n",
1273 ent->src_bus_irq, gsi);
1275 ioapic_intsrc(ent->src_bus_irq, gsi,
1276 INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH);
1282 mptable_ioapic_enumerate(struct ioapic_enumerator *e)
1284 struct mptable_bus_info bus_info;
1285 struct mptable_ioapic *ioapic;
1286 struct mptable_pos mpt;
1290 KKASSERT(mptable_fps_phyaddr != 0);
1291 KKASSERT(!TAILQ_EMPTY(&mptable_ioapic_list));
1293 TAILQ_FOREACH(ioapic, &mptable_ioapic_list, mio_link) {
1294 const struct mptable_ioapic *prev_ioapic;
1298 addr = ioapic_map(ioapic->mio_addr);
1300 ver = ioapic_read(addr, IOAPIC_VER);
1301 ioapic->mio_npin = ((ver & IOART_VER_MAXREDIR)
1302 >> MAXREDIRSHIFT) + 1;
1304 prev_ioapic = TAILQ_PREV(ioapic,
1305 mptable_ioapic_list, mio_link);
1306 if (prev_ioapic == NULL) {
1307 ioapic->mio_gsi_base = 0;
1309 ioapic->mio_gsi_base =
1310 prev_ioapic->mio_gsi_base +
1311 prev_ioapic->mio_npin;
1313 ioapic_add(addr, ioapic->mio_gsi_base,
1317 kprintf("MPTABLE: IOAPIC addr 0x%08x, "
1318 "apic id %d, idx %d, gsi base %d, npin %d\n",
1320 ioapic->mio_apic_id,
1322 ioapic->mio_gsi_base,
1327 if (mptable_use_default) {
1329 kprintf("MPTABLE: INTSRC irq 0 -> GSI 2 (default)\n");
1330 ioapic_intsrc(0, 2, INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH);
1334 error = mptable_map(&mpt);
1336 panic("mptable_ioapic_probe: mptable_map failed\n");
1337 KKASSERT(!MPTABLE_POS_USE_DEFAULT(&mpt));
1341 mptable_bus_info_alloc(cth, &bus_info);
1343 if (TAILQ_EMPTY(&bus_info.mbi_list)) {
1345 kprintf("MPTABLE: INTSRC irq 0 -> GSI 2 (no bus)\n");
1346 ioapic_intsrc(0, 2, INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH);
1348 struct mptable_ioapic_int_cbarg arg;
1350 bzero(&arg, sizeof(arg));
1351 arg.bus_info = &bus_info;
1353 error = mptable_iterate_entries(cth,
1354 mptable_ioapic_int_callback, &arg);
1356 panic("mptable_ioapic_int failed\n");
1358 if (arg.ioapic_nint == 0) {
1360 kprintf("MPTABLE: INTSRC irq 0 -> GSI 2 "
1363 ioapic_intsrc(0, 2, INTR_TRIGGER_EDGE,
1364 INTR_POLARITY_HIGH);
1368 mptable_bus_info_free(&bus_info);
1370 mptable_unmap(&mpt);
1373 static struct ioapic_enumerator mptable_ioapic_enumerator = {
1374 .ioapic_prio = IOAPIC_ENUM_PRIO_MPTABLE,
1375 .ioapic_probe = mptable_ioapic_probe,
1376 .ioapic_enumerate = mptable_ioapic_enumerate
1380 mptable_ioapic_enum_register(void)
1382 ioapic_enumerator_register(&mptable_ioapic_enumerator);
1384 SYSINIT(mptable_ioapic, SI_BOOT2_PRESMP, SI_ORDER_ANY,
1385 mptable_ioapic_enum_register, 0);
1388 mptable_pci_int_dump(void)
1390 const struct mptable_pci_int *pci_int;
1392 TAILQ_FOREACH(pci_int, &mptable_pci_int_list, mpci_link) {
1393 kprintf("MPTABLE: %d:%d INT%c -> IOAPIC %d.%d\n",
1396 pci_int->mpci_pin + 'A',
1397 pci_int->mpci_ioapic_idx,
1398 pci_int->mpci_ioapic_pin);
1403 mptable_pci_int_route(int bus, int dev, int pin, int intline)
1405 const struct mptable_pci_int *pci_int;
1409 --pin; /* zero based */
1411 TAILQ_FOREACH(pci_int, &mptable_pci_int_list, mpci_link) {
1412 if (pci_int->mpci_bus == bus &&
1413 pci_int->mpci_dev == dev &&
1414 pci_int->mpci_pin == pin)
1417 if (pci_int != NULL) {
1420 gsi = ioapic_gsi(pci_int->mpci_ioapic_idx,
1421 pci_int->mpci_ioapic_pin);
1423 irq = ioapic_abi_find_gsi(gsi,
1424 INTR_TRIGGER_LEVEL, INTR_POLARITY_LOW);
1430 kprintf("MPTABLE: fixed interrupt routing "
1431 "for %d:%d INT%c\n", bus, dev, pin + 'A');
1434 irq = ioapic_abi_find_irq(intline,
1435 INTR_TRIGGER_LEVEL, INTR_POLARITY_LOW);
1438 if (irq >= 0 && bootverbose) {
1439 kprintf("MPTABLE: %d:%d INT%c routed to irq %d\n",
1440 bus, dev, pin + 'A', irq);