2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
41 * $DragonFly: src/sys/platform/pc64/amd64/machdep.c,v 1.1 2008/08/29 17:07:10 dillon Exp $
44 #include "use_ether.h"
45 //#include "use_npx.h"
47 #include "opt_atalk.h"
48 #include "opt_compat.h"
51 #include "opt_directio.h"
54 #include "opt_msgbuf.h"
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/sysproto.h>
60 #include <sys/signalvar.h>
61 #include <sys/kernel.h>
62 #include <sys/linker.h>
63 #include <sys/malloc.h>
67 #include <sys/reboot.h>
69 #include <sys/msgbuf.h>
70 #include <sys/sysent.h>
71 #include <sys/sysctl.h>
72 #include <sys/vmmeter.h>
74 #include <sys/upcall.h>
75 #include <sys/usched.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
102 #include <machine/md_var.h>
103 #include <machine/metadata.h>
104 #include <machine/pc/bios.h>
105 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
106 #include <machine/globaldata.h> /* CPU_prvspace */
107 #include <machine/smp.h>
109 #include <machine/perfmon.h>
111 #include <machine/cputypes.h>
114 #include <bus/isa/isa_device.h>
116 #include <machine_base/isa/intr_machdep.h>
117 #include <bus/isa/rtc.h>
118 #include <sys/random.h>
119 #include <sys/ptrace.h>
120 #include <machine/sigframe.h>
122 #define PHYSMAP_ENTRIES 10
124 extern void init386(int first);
125 extern void dblfault_handler(void);
126 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
128 extern void printcpuinfo(void); /* XXX header file */
129 extern void identify_cpu(void);
131 extern void finishidentcpu(void);
133 extern void panicifcpuunsupported(void);
135 static void cpu_startup(void *);
136 #ifndef CPU_DISABLE_SSE
137 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
138 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
139 #endif /* CPU_DISABLE_SSE */
141 extern void ffs_rawread_setup(void);
142 #endif /* DIRECTIO */
143 static void init_locks(void);
145 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
148 extern vm_offset_t ksym_start, ksym_end;
156 struct privatespace CPU_prvspace[MAXCPU];
158 int _udatasel, _ucodesel, _ucode32sel;
161 int64_t tsc_offsets[MAXCPU];
163 int64_t tsc_offsets[1];
166 #if defined(SWTCH_OPTIM_STATS)
167 extern int swtch_optim_stats;
168 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
169 CTLFLAG_RD, &swtch_optim_stats, 0, "");
170 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
171 CTLFLAG_RD, &tlb_flush_count, 0, "");
177 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
179 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
183 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
184 0, 0, sysctl_hw_physmem, "IU", "");
187 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
189 int error = sysctl_handle_int(oidp, 0,
190 ctob(physmem - vmstats.v_wire_count), req);
194 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
195 0, 0, sysctl_hw_usermem, "IU", "");
198 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
200 int error = sysctl_handle_int(oidp, 0,
201 amd64_btop(avail_end - avail_start), req);
205 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
206 0, 0, sysctl_hw_availpages, "I", "");
208 vm_paddr_t Maxmem = 0;
211 * The number of PHYSMAP entries must be one less than the number of
212 * PHYSSEG entries because the PHYSMAP entry that spans the largest
213 * physical address that is accessible by ISA DMA is split into two
216 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
218 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
219 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
221 /* must be 2 less so 0 0 can signal end of chunks */
222 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
223 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
225 static vm_offset_t buffer_sva, buffer_eva;
226 vm_offset_t clean_sva, clean_eva;
227 static vm_offset_t pager_sva, pager_eva;
228 static struct trapframe proc0_tf;
231 cpu_startup(void *dummy)
235 vm_offset_t firstaddr;
237 if (boothowto & RB_VERBOSE)
241 * Good {morning,afternoon,evening,night}.
243 kprintf("%s", version);
246 panicifcpuunsupported();
250 kprintf("real memory = %ju (%juK bytes)\n",
251 (intmax_t)ptoa(Maxmem),
252 (intmax_t)ptoa(Maxmem) / 1024);
254 * Display any holes after the first chunk of extended memory.
259 kprintf("Physical memory chunk(s):\n");
260 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
261 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
263 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
264 (intmax_t)phys_avail[indx],
265 (intmax_t)phys_avail[indx + 1] - 1,
267 (intmax_t)(size1 / PAGE_SIZE));
272 * Allocate space for system data structures.
273 * The first available kernel virtual address is in "v".
274 * As pages of kernel virtual memory are allocated, "v" is incremented.
275 * As pages of memory are allocated and cleared,
276 * "firstaddr" is incremented.
277 * An index into the kernel page table corresponding to the
278 * virtual memory address maintained in "v" is kept in "mapaddr".
282 * Make two passes. The first pass calculates how much memory is
283 * needed and allocates it. The second pass assigns virtual
284 * addresses to the various data structures.
288 v = (caddr_t)firstaddr;
290 #define valloc(name, type, num) \
291 (name) = (type *)v; v = (caddr_t)((name)+(num))
292 #define valloclim(name, type, num, lim) \
293 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
296 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
297 * For the first 64MB of ram nominally allocate sufficient buffers to
298 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
299 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
300 * the buffer cache we limit the eventual kva reservation to
303 * factor represents the 1/4 x ram conversion.
306 int factor = 4 * BKVASIZE / 1024;
307 int kbytes = physmem * (PAGE_SIZE / 1024);
311 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
313 nbuf += (kbytes - 65536) * 2 / (factor * 5);
314 if (maxbcache && nbuf > maxbcache / BKVASIZE)
315 nbuf = maxbcache / BKVASIZE;
319 * Do not allow the buffer_map to be more then 1/2 the size of the
322 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
323 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
324 kprintf("Warning: nbufs capped at %d\n", nbuf);
327 nswbuf = max(min(nbuf/4, 256), 16);
329 if (nswbuf < NSWBUF_MIN)
336 valloc(swbuf, struct buf, nswbuf);
337 valloc(buf, struct buf, nbuf);
340 * End of first pass, size has been calculated so allocate memory
342 if (firstaddr == 0) {
343 size = (vm_size_t)(v - firstaddr);
344 firstaddr = kmem_alloc(&kernel_map, round_page(size));
346 panic("startup: no room for tables");
351 * End of second pass, addresses have been assigned
353 if ((vm_size_t)(v - firstaddr) != size)
354 panic("startup: table size inconsistency");
356 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
357 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
358 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
360 buffer_map.system_map = 1;
361 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
362 (nswbuf*MAXPHYS) + pager_map_size);
363 pager_map.system_map = 1;
365 #if defined(USERCONFIG)
367 cninit(); /* the preferred console may have changed */
370 kprintf("avail memory = %lu (%luK bytes)\n",
371 ptoa(vmstats.v_free_count),
372 ptoa(vmstats.v_free_count) / 1024);
375 * Set up buffers, so they can be used to read disk labels.
378 vm_pager_bufferinit();
382 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
384 mp_start(); /* fire up the APs and APICs */
391 * Send an interrupt to process.
393 * Stack is set up to allow sigcode stored
394 * at top to call routine, followed by kcall
395 * to sigreturn routine below. After sigreturn
396 * resets the signal mask, the stack, and the
397 * frame pointer, it returns to the user
401 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
403 struct lwp *lp = curthread->td_lwp;
404 struct proc *p = lp->lwp_proc;
405 struct trapframe *regs;
406 struct sigacts *psp = p->p_sigacts;
407 struct sigframe sf, *sfp;
411 regs = lp->lwp_md.md_regs;
412 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
414 /* Save user context */
415 bzero(&sf, sizeof(struct sigframe));
416 sf.sf_uc.uc_sigmask = *mask;
417 sf.sf_uc.uc_stack = lp->lwp_sigstk;
418 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
419 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
420 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
422 /* Make the size of the saved context visible to userland */
423 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
425 /* Save mailbox pending state for syscall interlock semantics */
426 if (p->p_flag & P_MAILBOX)
427 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
429 /* Allocate and validate space for the signal handler context. */
430 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
431 SIGISMEMBER(psp->ps_sigonstack, sig)) {
432 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
433 sizeof(struct sigframe));
434 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
436 /* We take red zone into account */
437 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
440 /* Align to 16 bytes */
441 sfp = (struct sigframe *)((intptr_t)sp & ~0xFUL);
443 /* Translate the signal is appropriate */
444 if (p->p_sysent->sv_sigtbl) {
445 if (sig <= p->p_sysent->sv_sigsize)
446 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
450 * Build the argument list for the signal handler.
452 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
454 regs->tf_rdi = sig; /* argument 1 */
455 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
457 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
459 * Signal handler installed with SA_SIGINFO.
461 * action(signo, siginfo, ucontext)
463 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
464 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */
465 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
467 /* fill siginfo structure */
468 sf.sf_si.si_signo = sig;
469 sf.sf_si.si_code = code;
470 sf.sf_si.si_addr = (void *)regs->tf_err;
473 * Old FreeBSD-style arguments.
475 * handler (signo, code, [uc], addr)
477 regs->tf_rsi = (register_t)code; /* argument 2 */
478 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */
479 sf.sf_ahu.sf_handler = catcher;
483 * If we're a vm86 process, we want to save the segment registers.
484 * We also change eflags to be our emulated eflags, not the actual
488 if (regs->tf_eflags & PSL_VM) {
489 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
490 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
492 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
493 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
494 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
495 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
497 if (vm86->vm86_has_vme == 0)
498 sf.sf_uc.uc_mcontext.mc_eflags =
499 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
500 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
503 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
504 * syscalls made by the signal handler. This just avoids
505 * wasting time for our lazy fixup of such faults. PSL_NT
506 * does nothing in vm86 mode, but vm86 programs can set it
507 * almost legitimately in probes for old cpu types.
509 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
514 * Save the FPU state and reinit the FP unit
516 npxpush(&sf.sf_uc.uc_mcontext);
519 * Copy the sigframe out to the user's stack.
521 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
523 * Something is wrong with the stack pointer.
524 * ...Kill the process.
529 regs->tf_rsp = (register_t)sfp;
530 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
533 * i386 abi specifies that the direction flag must be cleared
536 regs->tf_rflags &= ~(PSL_T|PSL_D);
539 * 64 bit mode has a code and stack selector but
540 * no data or extra selector. %fs and %gs are not
543 regs->tf_cs = _ucodesel;
544 regs->tf_ss = _udatasel;
548 * Sanitize the trapframe for a virtual kernel passing control to a custom
549 * VM context. Remove any items that would otherwise create a privilage
552 * XXX at the moment we allow userland to set the resume flag. Is this a
556 cpu_sanitize_frame(struct trapframe *frame)
558 frame->tf_cs = _ucodesel;
559 frame->tf_ss = _udatasel;
560 /* XXX VM (8086) mode not supported? */
561 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
562 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
568 * Sanitize the tls so loading the descriptor does not blow up
569 * on us. For AMD64 we don't have to do anything.
572 cpu_sanitize_tls(struct savetls *tls)
578 * sigreturn(ucontext_t *sigcntxp)
580 * System call to cleanup state after a signal
581 * has been taken. Reset signal mask and
582 * stack state from context left by sendsig (above).
583 * Return to previous pc and psl as specified by
584 * context left by sendsig. Check carefully to
585 * make sure that the user has not modified the
586 * state to gain improper privileges.
588 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
589 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
592 sys_sigreturn(struct sigreturn_args *uap)
594 struct lwp *lp = curthread->td_lwp;
595 struct proc *p = lp->lwp_proc;
596 struct trapframe *regs;
604 * We have to copy the information into kernel space so userland
605 * can't modify it while we are sniffing it.
607 regs = lp->lwp_md.md_regs;
608 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
612 rflags = ucp->uc_mcontext.mc_rflags;
614 /* VM (8086) mode not supported */
615 rflags &= ~PSL_VM_UNSUPP;
618 if (eflags & PSL_VM) {
619 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
620 struct vm86_kernel *vm86;
623 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
624 * set up the vm86 area, and we can't enter vm86 mode.
626 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
628 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
629 if (vm86->vm86_inited == 0)
632 /* go back to user mode if both flags are set */
633 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
634 trapsignal(lp, SIGBUS, 0);
636 if (vm86->vm86_has_vme) {
637 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
638 (eflags & VME_USERCHANGE) | PSL_VM;
640 vm86->vm86_eflags = eflags; /* save VIF, VIP */
641 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
642 (eflags & VM_USERCHANGE) | PSL_VM;
644 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
645 tf->tf_eflags = eflags;
646 tf->tf_vm86_ds = tf->tf_ds;
647 tf->tf_vm86_es = tf->tf_es;
648 tf->tf_vm86_fs = tf->tf_fs;
649 tf->tf_vm86_gs = tf->tf_gs;
650 tf->tf_ds = _udatasel;
651 tf->tf_es = _udatasel;
652 tf->tf_fs = _udatasel;
653 tf->tf_gs = _udatasel;
658 * Don't allow users to change privileged or reserved flags.
661 * XXX do allow users to change the privileged flag PSL_RF.
662 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
663 * should sometimes set it there too. tf_eflags is kept in
664 * the signal context during signal handling and there is no
665 * other place to remember it, so the PSL_RF bit may be
666 * corrupted by the signal handler without us knowing.
667 * Corruption of the PSL_RF bit at worst causes one more or
668 * one less debugger trap, so allowing it is fairly harmless.
670 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
671 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
676 * Don't allow users to load a valid privileged %cs. Let the
677 * hardware check for invalid selectors, excess privilege in
678 * other selectors, invalid %eip's and invalid %esp's.
680 cs = ucp->uc_mcontext.mc_cs;
681 if (!CS_SECURE(cs)) {
682 kprintf("sigreturn: cs = 0x%x\n", cs);
683 trapsignal(lp, SIGBUS, T_PROTFLT);
686 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
690 * Restore the FPU state from the frame
692 npxpop(&ucp->uc_mcontext);
695 * Merge saved signal mailbox pending flag to maintain interlock
696 * semantics against system calls.
698 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
699 p->p_flag |= P_MAILBOX;
701 if (ucp->uc_mcontext.mc_onstack & 1)
702 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
704 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
706 lp->lwp_sigmask = ucp->uc_sigmask;
707 SIG_CANTMASK(lp->lwp_sigmask);
712 * Stack frame on entry to function. %rax will contain the function vector,
713 * %rcx will contain the function data. flags, rcx, and rax will have
714 * already been pushed on the stack.
725 sendupcall(struct vmupcall *vu, int morepending)
727 struct lwp *lp = curthread->td_lwp;
728 struct trapframe *regs;
729 struct upcall upcall;
730 struct upc_frame upc_frame;
734 * If we are a virtual kernel running an emulated user process
735 * context, switch back to the virtual kernel context before
736 * trying to post the signal.
738 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
739 lp->lwp_md.md_regs->tf_trapno = 0;
740 vkernel_trap(lp, lp->lwp_md.md_regs);
744 * Get the upcall data structure
746 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
747 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
750 kprintf("bad upcall address\n");
755 * If the data structure is already marked pending or has a critical
756 * section count, mark the data structure as pending and return
757 * without doing an upcall. vu_pending is left set.
759 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
760 if (upcall.upc_pending < vu->vu_pending) {
761 upcall.upc_pending = vu->vu_pending;
762 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
763 sizeof(upcall.upc_pending));
769 * We can run this upcall now, clear vu_pending.
771 * Bump our critical section count and set or clear the
772 * user pending flag depending on whether more upcalls are
773 * pending. The user will be responsible for calling
774 * upc_dispatch(-1) to process remaining upcalls.
777 upcall.upc_pending = morepending;
778 crit_count += TDPRI_CRIT;
779 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
780 sizeof(upcall.upc_pending));
781 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
785 * Construct a stack frame and issue the upcall
787 regs = lp->lwp_md.md_regs;
788 upc_frame.rax = regs->tf_rax;
789 upc_frame.rcx = regs->tf_rcx;
790 upc_frame.rdx = regs->tf_rdx;
791 upc_frame.flags = regs->tf_rflags;
792 upc_frame.oldip = regs->tf_rip;
793 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
794 sizeof(upc_frame)) != 0) {
795 kprintf("bad stack on upcall\n");
797 regs->tf_rax = (register_t)vu->vu_func;
798 regs->tf_rcx = (register_t)vu->vu_data;
799 regs->tf_rdx = (register_t)lp->lwp_upcall;
800 regs->tf_rip = (register_t)vu->vu_ctx;
801 regs->tf_rsp -= sizeof(upc_frame);
806 * fetchupcall occurs in the context of a system call, which means that
807 * we have to return EJUSTRETURN in order to prevent eax and edx from
808 * being overwritten by the syscall return value.
810 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
811 * and the function pointer in %eax.
814 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
816 struct upc_frame upc_frame;
817 struct lwp *lp = curthread->td_lwp;
818 struct trapframe *regs;
820 struct upcall upcall;
823 regs = lp->lwp_md.md_regs;
825 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
829 * This jumps us to the next ready context.
832 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
835 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
836 crit_count += TDPRI_CRIT;
838 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
839 regs->tf_rax = (register_t)vu->vu_func;
840 regs->tf_rcx = (register_t)vu->vu_data;
841 regs->tf_rdx = (register_t)lp->lwp_upcall;
842 regs->tf_rip = (register_t)vu->vu_ctx;
843 regs->tf_rsp = (register_t)rsp;
846 * This returns us to the originally interrupted code.
848 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
849 regs->tf_rax = upc_frame.rax;
850 regs->tf_rcx = upc_frame.rcx;
851 regs->tf_rdx = upc_frame.rdx;
852 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
853 (upc_frame.flags & PSL_USERCHANGE);
854 regs->tf_rip = upc_frame.oldip;
855 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
864 * Machine dependent boot() routine
866 * I haven't seen anything to put here yet
867 * Possibly some stuff might be grafted back here from boot()
875 * Shutdown the CPU as much as possible
881 __asm__ __volatile("hlt");
885 * cpu_idle() represents the idle LWKT. You cannot return from this function
886 * (unless you want to blow things up!). Instead we look for runnable threads
887 * and loop or halt as appropriate. Giant is not held on entry to the thread.
889 * The main loop is entered with a critical section held, we must release
890 * the critical section before doing anything else. lwkt_switch() will
891 * check for pending interrupts due to entering and exiting its own
894 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
895 * to wake a HLTed cpu up. However, there are cases where the idlethread
896 * will be entered with the possibility that no IPI will occur and in such
897 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
899 static int cpu_idle_hlt = 1;
900 static int cpu_idle_hltcnt;
901 static int cpu_idle_spincnt;
902 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
903 &cpu_idle_hlt, 0, "Idle loop HLT enable");
904 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
905 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
906 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
907 &cpu_idle_spincnt, 0, "Idle loop entry spins");
910 cpu_idle_default_hook(void)
913 * We must guarentee that hlt is exactly the instruction
916 __asm __volatile("sti; hlt");
919 /* Other subsystems (e.g., ACPI) can hook this later. */
920 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
925 struct thread *td = curthread;
928 KKASSERT(td->td_pri < TDPRI_CRIT);
931 * See if there are any LWKTs ready to go.
936 * If we are going to halt call splz unconditionally after
937 * CLIing to catch any interrupt races. Note that we are
938 * at SPL0 and interrupts are enabled.
940 if (cpu_idle_hlt && !lwkt_runnable() &&
941 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
942 __asm __volatile("cli");
944 if (!lwkt_runnable())
948 __asm __volatile("pause");
952 td->td_flags &= ~TDF_IDLE_NOHLT;
955 __asm __volatile("sti; pause");
957 __asm __volatile("sti");
965 * This routine is called when the only runnable threads require
966 * the MP lock, and the scheduler couldn't get it. On a real cpu
967 * we let the scheduler spin.
970 cpu_mplock_contested(void)
976 * This routine is called if a spinlock has been held through the
977 * exponential backoff period and is seriously contested. On a real cpu
981 cpu_spinlock_contested(void)
987 * Clear registers on exec
990 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
992 struct thread *td = curthread;
993 struct lwp *lp = td->td_lwp;
994 struct pcb *pcb = td->td_pcb;
995 struct trapframe *regs = lp->lwp_md.md_regs;
997 /* was i386_user_cleanup() in NetBSD */
1000 bzero((char *)regs, sizeof(struct trapframe));
1001 regs->tf_rip = entry;
1002 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1003 regs->tf_rdi = stack; /* argv */
1004 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1005 regs->tf_ss = _udatasel;
1006 regs->tf_cs = _ucodesel;
1007 regs->tf_rbx = ps_strings;
1010 * Reset the hardware debug registers if they were in use.
1011 * They won't have any meaning for the newly exec'd process.
1013 if (pcb->pcb_flags & PCB_DBREGS) {
1019 pcb->pcb_dr7 = 0; /* JG set bit 10? */
1020 if (pcb == td->td_pcb) {
1022 * Clear the debug registers on the running
1023 * CPU, otherwise they will end up affecting
1024 * the next process we switch to.
1028 pcb->pcb_flags &= ~PCB_DBREGS;
1032 * Initialize the math emulator (if any) for the current process.
1033 * Actually, just clear the bit that says that the emulator has
1034 * been initialized. Initialization is delayed until the process
1035 * traps to the emulator (if it is done at all) mainly because
1036 * emulators don't provide an entry point for initialization.
1038 pcb->pcb_flags &= ~FP_SOFTFP;
1041 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1042 * gd_npxthread. Otherwise a preemptive interrupt thread
1043 * may panic in npxdna().
1046 load_cr0(rcr0() | CR0_MP);
1049 * NOTE: The MSR values must be correct so we can return to
1050 * userland. gd_user_fs/gs must be correct so the switch
1051 * code knows what the current MSR values are.
1053 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
1054 pcb->pcb_gsbase = 0;
1055 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1056 mdcpu->gd_user_gs = 0;
1057 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1058 wrmsr(MSR_KGSBASE, 0);
1060 /* Initialize the npx (if any) for the current process. */
1061 npxinit(__INITIAL_NPXCW__);
1064 pcb->pcb_ds = _udatasel;
1065 pcb->pcb_es = _udatasel;
1066 pcb->pcb_fs = _udatasel;
1067 pcb->pcb_gs = _udatasel;
1076 cr0 |= CR0_NE; /* Done by npxinit() */
1077 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1078 cr0 |= CR0_WP | CR0_AM;
1084 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1087 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1089 if (!error && req->newptr)
1094 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1095 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1098 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1099 CTLFLAG_RW, &disable_rtc_set, 0, "");
1103 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1104 CTLFLAG_RD, &bootinfo, bootinfo, "");
1107 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1108 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1110 extern u_long bootdev; /* not a cdev_t - encoding is different */
1111 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1112 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1115 * Initialize 386 and configure to run kernel
1119 * Initialize segments & interrupt table
1123 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1124 static struct gate_descriptor idt0[NIDT];
1125 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1127 union descriptor ldt[NLDT]; /* local descriptor table */
1130 /* table descriptors - used to load tables by cpu */
1131 struct region_descriptor r_gdt, r_idt;
1133 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1134 extern int has_f00f_bug;
1137 static char dblfault_stack[PAGE_SIZE] __aligned(16);
1139 /* JG proc0paddr is a virtual address */
1142 char proc0paddr_buff[LWKT_THREAD_STACK];
1145 /* software prototypes -- in more palatable form */
1146 struct soft_segment_descriptor gdt_segs[] = {
1147 /* GNULL_SEL 0 Null Descriptor */
1148 { 0x0, /* segment base address */
1150 0, /* segment type */
1151 0, /* segment descriptor priority level */
1152 0, /* segment descriptor present */
1154 0, /* default 32 vs 16 bit size */
1155 0 /* limit granularity (byte/page units)*/ },
1156 /* GCODE_SEL 1 Code Descriptor for kernel */
1157 { 0x0, /* segment base address */
1158 0xfffff, /* length - all address space */
1159 SDT_MEMERA, /* segment type */
1160 SEL_KPL, /* segment descriptor priority level */
1161 1, /* segment descriptor present */
1163 0, /* default 32 vs 16 bit size */
1164 1 /* limit granularity (byte/page units)*/ },
1165 /* GDATA_SEL 2 Data Descriptor for kernel */
1166 { 0x0, /* segment base address */
1167 0xfffff, /* length - all address space */
1168 SDT_MEMRWA, /* segment type */
1169 SEL_KPL, /* segment descriptor priority level */
1170 1, /* segment descriptor present */
1172 0, /* default 32 vs 16 bit size */
1173 1 /* limit granularity (byte/page units)*/ },
1174 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1175 { 0x0, /* segment base address */
1176 0xfffff, /* length - all address space */
1177 SDT_MEMERA, /* segment type */
1178 SEL_UPL, /* segment descriptor priority level */
1179 1, /* segment descriptor present */
1181 1, /* default 32 vs 16 bit size */
1182 1 /* limit granularity (byte/page units)*/ },
1183 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1184 { 0x0, /* segment base address */
1185 0xfffff, /* length - all address space */
1186 SDT_MEMRWA, /* segment type */
1187 SEL_UPL, /* segment descriptor priority level */
1188 1, /* segment descriptor present */
1190 1, /* default 32 vs 16 bit size */
1191 1 /* limit granularity (byte/page units)*/ },
1192 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1193 { 0x0, /* segment base address */
1194 0xfffff, /* length - all address space */
1195 SDT_MEMERA, /* segment type */
1196 SEL_UPL, /* segment descriptor priority level */
1197 1, /* segment descriptor present */
1199 0, /* default 32 vs 16 bit size */
1200 1 /* limit granularity (byte/page units)*/ },
1201 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1203 0x0, /* segment base address */
1204 sizeof(struct amd64tss)-1,/* length - all address space */
1205 SDT_SYSTSS, /* segment type */
1206 SEL_KPL, /* segment descriptor priority level */
1207 1, /* segment descriptor present */
1209 0, /* unused - default 32 vs 16 bit size */
1210 0 /* limit granularity (byte/page units)*/ },
1211 /* Actually, the TSS is a system descriptor which is double size */
1212 { 0x0, /* segment base address */
1214 0, /* segment type */
1215 0, /* segment descriptor priority level */
1216 0, /* segment descriptor present */
1218 0, /* default 32 vs 16 bit size */
1219 0 /* limit granularity (byte/page units)*/ },
1220 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1221 { 0x0, /* segment base address */
1222 0xfffff, /* length - all address space */
1223 SDT_MEMRWA, /* segment type */
1224 SEL_UPL, /* segment descriptor priority level */
1225 1, /* segment descriptor present */
1227 1, /* default 32 vs 16 bit size */
1228 1 /* limit granularity (byte/page units)*/ },
1232 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1234 struct gate_descriptor *ip;
1237 ip->gd_looffset = (uintptr_t)func;
1238 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1244 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1247 #define IDTVEC(name) __CONCAT(X,name)
1250 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1251 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1252 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1253 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1254 IDTVEC(xmm), IDTVEC(dblfault),
1255 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1257 #ifdef DEBUG_INTERRUPTS
1258 extern inthand_t *Xrsvdary[256];
1262 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1264 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1265 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1266 ssd->ssd_type = sd->sd_type;
1267 ssd->ssd_dpl = sd->sd_dpl;
1268 ssd->ssd_p = sd->sd_p;
1269 ssd->ssd_def32 = sd->sd_def32;
1270 ssd->ssd_gran = sd->sd_gran;
1274 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1277 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1278 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1279 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1280 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1281 sd->sd_type = ssd->ssd_type;
1282 sd->sd_dpl = ssd->ssd_dpl;
1283 sd->sd_p = ssd->ssd_p;
1284 sd->sd_long = ssd->ssd_long;
1285 sd->sd_def32 = ssd->ssd_def32;
1286 sd->sd_gran = ssd->ssd_gran;
1290 ssdtosyssd(struct soft_segment_descriptor *ssd,
1291 struct system_segment_descriptor *sd)
1294 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1295 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1296 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1297 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1298 sd->sd_type = ssd->ssd_type;
1299 sd->sd_dpl = ssd->ssd_dpl;
1300 sd->sd_p = ssd->ssd_p;
1301 sd->sd_gran = ssd->ssd_gran;
1307 * Populate the (physmap) array with base/bound pairs describing the
1308 * available physical memory in the system, then test this memory and
1309 * build the phys_avail array describing the actually-available memory.
1311 * If we cannot accurately determine the physical memory map, then use
1312 * value from the 0xE801 call, and failing that, the RTC.
1314 * Total memory size may be set by the kernel environment variable
1315 * hw.physmem or the compile-time define MAXMEM.
1317 * XXX first should be vm_paddr_t.
1320 getmemsize(caddr_t kmdp, u_int64_t first)
1322 int i, off, physmap_idx, pa_indx, da_indx;
1323 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1324 u_long physmem_tunable;
1326 struct bios_smap *smapbase, *smap, *smapend;
1328 quad_t dcons_addr, dcons_size;
1330 bzero(physmap, sizeof(physmap));
1335 * get memory map from INT 15:E820, kindly supplied by the loader.
1337 * subr_module.c says:
1338 * "Consumer may safely assume that size value precedes data."
1339 * ie: an int32_t immediately precedes smap.
1341 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1342 MODINFO_METADATA | MODINFOMD_SMAP);
1343 if (smapbase == NULL)
1344 panic("No BIOS smap info from loader!");
1346 smapsize = *((u_int32_t *)smapbase - 1);
1347 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1349 for (smap = smapbase; smap < smapend; smap++) {
1350 if (boothowto & RB_VERBOSE)
1351 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1352 smap->type, smap->base, smap->length);
1354 if (smap->type != SMAP_TYPE_MEMORY)
1357 if (smap->length == 0)
1360 for (i = 0; i <= physmap_idx; i += 2) {
1361 if (smap->base < physmap[i + 1]) {
1362 if (boothowto & RB_VERBOSE)
1364 "Overlapping or non-monotonic memory region, ignoring second region\n");
1369 if (smap->base == physmap[physmap_idx + 1]) {
1370 physmap[physmap_idx + 1] += smap->length;
1375 if (physmap_idx == PHYSMAP_SIZE) {
1377 "Too many segments in the physical address map, giving up\n");
1380 physmap[physmap_idx] = smap->base;
1381 physmap[physmap_idx + 1] = smap->base + smap->length;
1385 * Find the 'base memory' segment for SMP
1388 for (i = 0; i <= physmap_idx; i += 2) {
1389 if (physmap[i] == 0x00000000) {
1390 basemem = physmap[i + 1] / 1024;
1395 panic("BIOS smap did not include a basemem segment!");
1398 /* make hole for AP bootstrap code */
1399 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1401 /* look for the MP hardware - needed for apic addresses */
1406 * Maxmem isn't the "maximum memory", it's one larger than the
1407 * highest page of the physical address space. It should be
1408 * called something like "Maxphyspage". We may adjust this
1409 * based on ``hw.physmem'' and the results of the memory test.
1411 Maxmem = atop(physmap[physmap_idx + 1]);
1414 Maxmem = MAXMEM / 4;
1417 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1418 Maxmem = atop(physmem_tunable);
1421 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1424 if (Maxmem > atop(physmap[physmap_idx + 1]))
1425 Maxmem = atop(physmap[physmap_idx + 1]);
1427 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1428 (boothowto & RB_VERBOSE))
1429 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1431 /* call pmap initialization to make new kernel address space */
1432 pmap_bootstrap(&first);
1435 * Size up each available chunk of physical memory.
1437 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1440 phys_avail[pa_indx++] = physmap[0];
1441 phys_avail[pa_indx] = physmap[0];
1442 dump_avail[da_indx] = physmap[0];
1446 * Get dcons buffer address
1448 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1449 kgetenv_quad("dcons.size", &dcons_size) == 0)
1453 * physmap is in bytes, so when converting to page boundaries,
1454 * round up the start address and round down the end address.
1456 for (i = 0; i <= physmap_idx; i += 2) {
1459 end = ptoa((vm_paddr_t)Maxmem);
1460 if (physmap[i + 1] < end)
1461 end = trunc_page(physmap[i + 1]);
1462 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1463 int tmp, page_bad, full;
1464 int *ptr = (int *)CADDR1;
1468 * block out kernel memory as not available.
1470 if (pa >= 0x100000 && pa < first)
1474 * block out dcons buffer
1477 && pa >= trunc_page(dcons_addr)
1478 && pa < dcons_addr + dcons_size)
1484 * map page into kernel: valid, read/write,non-cacheable
1486 *pte = pa | PG_V | PG_RW | PG_N;
1491 * Test for alternating 1's and 0's
1493 *(volatile int *)ptr = 0xaaaaaaaa;
1494 if (*(volatile int *)ptr != 0xaaaaaaaa)
1497 * Test for alternating 0's and 1's
1499 *(volatile int *)ptr = 0x55555555;
1500 if (*(volatile int *)ptr != 0x55555555)
1505 *(volatile int *)ptr = 0xffffffff;
1506 if (*(volatile int *)ptr != 0xffffffff)
1511 *(volatile int *)ptr = 0x0;
1512 if (*(volatile int *)ptr != 0x0)
1515 * Restore original value.
1520 * Adjust array of valid/good pages.
1522 if (page_bad == TRUE)
1525 * If this good page is a continuation of the
1526 * previous set of good pages, then just increase
1527 * the end pointer. Otherwise start a new chunk.
1528 * Note that "end" points one higher than end,
1529 * making the range >= start and < end.
1530 * If we're also doing a speculative memory
1531 * test and we at or past the end, bump up Maxmem
1532 * so that we keep going. The first bad page
1533 * will terminate the loop.
1535 if (phys_avail[pa_indx] == pa) {
1536 phys_avail[pa_indx] += PAGE_SIZE;
1539 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1541 "Too many holes in the physical address space, giving up\n");
1546 phys_avail[pa_indx++] = pa; /* start */
1547 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1551 if (dump_avail[da_indx] == pa) {
1552 dump_avail[da_indx] += PAGE_SIZE;
1555 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1559 dump_avail[da_indx++] = pa; /* start */
1560 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1572 * The last chunk must contain at least one page plus the message
1573 * buffer to avoid complicating other code (message buffer address
1574 * calculation, etc.).
1576 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1577 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1578 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1579 phys_avail[pa_indx--] = 0;
1580 phys_avail[pa_indx--] = 0;
1583 Maxmem = atop(phys_avail[pa_indx]);
1585 /* Trim off space for the message buffer. */
1586 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1588 avail_end = phys_avail[pa_indx];
1590 /* Map the message buffer. */
1591 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1592 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1605 * 7 Device Not Available (x87)
1607 * 9 Coprocessor Segment overrun (unsupported, reserved)
1609 * 11 Segment not present
1611 * 13 General Protection
1614 * 16 x87 FP Exception pending
1615 * 17 Alignment Check
1617 * 19 SIMD floating point
1619 * 32-255 INTn/external sources
1622 hammer_time(u_int64_t modulep, u_int64_t physfree)
1627 int metadata_missing, off;
1629 struct mdglobaldata *gd;
1635 * This must be done before the first references
1636 * to CPU_prvspace[0] are made.
1638 init_paging(&physfree);
1642 * Prevent lowering of the ipl if we call tsleep() early.
1644 gd = &CPU_prvspace[0].mdglobaldata;
1645 bzero(gd, sizeof(*gd));
1648 * Note: on both UP and SMP curthread must be set non-NULL
1649 * early in the boot sequence because the system assumes
1650 * that 'curthread' is never NULL.
1653 gd->mi.gd_curthread = &thread0;
1654 thread0.td_gd = &gd->mi;
1656 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1659 metadata_missing = 0;
1660 if (bootinfo.bi_modulep) {
1661 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1662 preload_bootstrap_relocate(KERNBASE);
1664 metadata_missing = 1;
1666 if (bootinfo.bi_envp)
1667 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1670 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1671 preload_bootstrap_relocate(PTOV_OFFSET);
1672 kmdp = preload_search_by_type("elf kernel");
1674 kmdp = preload_search_by_type("elf64 kernel");
1675 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1676 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1678 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1679 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1683 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1684 * and ncpus_fit_mask remain 0.
1689 /* Init basic tunables, hz etc */
1693 * make gdt memory segments
1695 gdt_segs[GPROC0_SEL].ssd_base =
1696 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1698 gd->mi.gd_prvspace = &CPU_prvspace[0];
1700 for (x = 0; x < NGDT; x++) {
1701 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1702 ssdtosd(&gdt_segs[x], &gdt[x]);
1704 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1705 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1707 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1708 r_gdt.rd_base = (long) gdt;
1711 wrmsr(MSR_FSBASE, 0); /* User value */
1712 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1713 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1715 mi_gdinit(&gd->mi, 0);
1717 proc0paddr = proc0paddr_buff;
1718 mi_proc0init(&gd->mi, proc0paddr);
1719 safepri = TDPRI_MAX;
1721 /* spinlocks and the BGL */
1725 for (x = 0; x < NIDT; x++)
1726 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1727 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1728 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1729 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1730 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1731 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1732 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1733 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1734 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1735 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1736 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1737 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1738 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1739 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1740 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1741 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1742 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1743 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1744 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1745 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1747 r_idt.rd_limit = sizeof(idt0) - 1;
1748 r_idt.rd_base = (long) idt;
1752 * Initialize the console before we print anything out.
1757 if (metadata_missing)
1758 kprintf("WARNING: loader(8) metadata is missing!\n");
1768 if (boothowto & RB_KDB)
1769 Debugger("Boot flags requested debugger");
1773 finishidentcpu(); /* Final stage of CPU initialization */
1774 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1775 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1777 identify_cpu(); /* Final stage of CPU initialization */
1778 initializecpu(); /* Initialize CPU registers */
1780 /* make an initial tss so cpu can get interrupt stack on syscall! */
1781 gd->gd_common_tss.tss_rsp0 =
1782 (register_t)(thread0.td_kstack +
1783 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1784 /* Ensure the stack is aligned to 16 bytes */
1785 gd->gd_common_tss.tss_rsp0 &= ~0xFul;
1786 gd->gd_rsp0 = gd->gd_common_tss.tss_rsp0;
1788 /* doublefault stack space, runs on ist1 */
1789 gd->gd_common_tss.tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1791 /* Set the IO permission bitmap (empty due to tss seg limit) */
1792 gd->gd_common_tss.tss_iobase = sizeof(struct amd64tss);
1794 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1795 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1796 gd->gd_common_tssd = *gd->gd_tss_gdt;
1799 /* Set up the fast syscall stuff */
1800 msr = rdmsr(MSR_EFER) | EFER_SCE;
1801 wrmsr(MSR_EFER, msr);
1802 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1803 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1804 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1805 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1806 wrmsr(MSR_STAR, msr);
1807 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1809 getmemsize(kmdp, physfree);
1810 init_param2(physmem);
1812 /* now running on new page tables, configured,and u/iom is accessible */
1814 /* Map the message buffer. */
1816 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1817 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1820 msgbufinit(msgbufp, MSGBUF_SIZE);
1823 /* transfer to user mode */
1825 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1826 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1827 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1833 /* setup proc 0's pcb */
1834 thread0.td_pcb->pcb_flags = 0;
1835 thread0.td_pcb->pcb_cr3 = KPML4phys;
1836 thread0.td_pcb->pcb_ext = 0;
1837 lwp0.lwp_md.md_regs = &proc0_tf;
1838 env = kgetenv("kernelname");
1840 strlcpy(kernelname, env, sizeof(kernelname));
1842 /* Location of kernel stack for locore */
1843 return ((u_int64_t)thread0.td_pcb);
1847 * Initialize machine-dependant portions of the global data structure.
1848 * Note that the global data area and cpu0's idlestack in the private
1849 * data space were allocated in locore.
1851 * Note: the idlethread's cpl is 0
1853 * WARNING! Called from early boot, 'mycpu' may not work yet.
1856 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1859 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1861 lwkt_init_thread(&gd->mi.gd_idlethread,
1862 gd->mi.gd_prvspace->idlestack,
1863 sizeof(gd->mi.gd_prvspace->idlestack),
1864 TDF_MPSAFE, &gd->mi);
1865 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1866 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1867 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1868 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1872 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1874 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1875 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1882 globaldata_find(int cpu)
1884 KKASSERT(cpu >= 0 && cpu < ncpus);
1885 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1888 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1889 static void f00f_hack(void *unused);
1890 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
1893 f00f_hack(void *unused)
1895 struct gate_descriptor *new_idt;
1901 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
1903 r_idt.rd_limit = sizeof(idt0) - 1;
1905 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
1907 panic("kmem_alloc returned 0");
1908 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1909 panic("kmem_alloc returned non-page-aligned memory");
1910 /* Put the first seven entries in the lower page */
1911 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1912 bcopy(idt, new_idt, sizeof(idt0));
1913 r_idt.rd_base = (int)new_idt;
1916 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
1917 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1918 panic("vm_map_protect failed");
1921 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
1924 ptrace_set_pc(struct lwp *lp, unsigned long addr)
1926 lp->lwp_md.md_regs->tf_rip = addr;
1931 ptrace_single_step(struct lwp *lp)
1933 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
1938 fill_regs(struct lwp *lp, struct reg *regs)
1941 struct trapframe *tp;
1943 tp = lp->lwp_md.md_regs;
1944 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs));
1946 pcb = lp->lwp_thread->td_pcb;
1951 set_regs(struct lwp *lp, struct reg *regs)
1954 struct trapframe *tp;
1956 tp = lp->lwp_md.md_regs;
1957 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
1958 !CS_SECURE(regs->r_cs))
1960 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs));
1961 pcb = lp->lwp_thread->td_pcb;
1965 #ifndef CPU_DISABLE_SSE
1967 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
1969 struct env87 *penv_87 = &sv_87->sv_env;
1970 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1973 /* FPU control/status */
1974 penv_87->en_cw = penv_xmm->en_cw;
1975 penv_87->en_sw = penv_xmm->en_sw;
1976 penv_87->en_tw = penv_xmm->en_tw;
1977 penv_87->en_fip = penv_xmm->en_fip;
1978 penv_87->en_fcs = penv_xmm->en_fcs;
1979 penv_87->en_opcode = penv_xmm->en_opcode;
1980 penv_87->en_foo = penv_xmm->en_foo;
1981 penv_87->en_fos = penv_xmm->en_fos;
1984 for (i = 0; i < 8; ++i)
1985 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
1987 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
1991 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
1993 struct env87 *penv_87 = &sv_87->sv_env;
1994 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1997 /* FPU control/status */
1998 penv_xmm->en_cw = penv_87->en_cw;
1999 penv_xmm->en_sw = penv_87->en_sw;
2000 penv_xmm->en_tw = penv_87->en_tw;
2001 penv_xmm->en_fip = penv_87->en_fip;
2002 penv_xmm->en_fcs = penv_87->en_fcs;
2003 penv_xmm->en_opcode = penv_87->en_opcode;
2004 penv_xmm->en_foo = penv_87->en_foo;
2005 penv_xmm->en_fos = penv_87->en_fos;
2008 for (i = 0; i < 8; ++i)
2009 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2011 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2013 #endif /* CPU_DISABLE_SSE */
2016 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2018 #ifndef CPU_DISABLE_SSE
2020 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2021 (struct save87 *)fpregs);
2024 #endif /* CPU_DISABLE_SSE */
2025 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2030 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2032 #ifndef CPU_DISABLE_SSE
2034 set_fpregs_xmm((struct save87 *)fpregs,
2035 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2038 #endif /* CPU_DISABLE_SSE */
2039 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2044 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2047 dbregs->dr[0] = rdr0();
2048 dbregs->dr[1] = rdr1();
2049 dbregs->dr[2] = rdr2();
2050 dbregs->dr[3] = rdr3();
2051 dbregs->dr[4] = rdr4();
2052 dbregs->dr[5] = rdr5();
2053 dbregs->dr[6] = rdr6();
2054 dbregs->dr[7] = rdr7();
2058 pcb = lp->lwp_thread->td_pcb;
2059 dbregs->dr[0] = pcb->pcb_dr0;
2060 dbregs->dr[1] = pcb->pcb_dr1;
2061 dbregs->dr[2] = pcb->pcb_dr2;
2062 dbregs->dr[3] = pcb->pcb_dr3;
2065 dbregs->dr[6] = pcb->pcb_dr6;
2066 dbregs->dr[7] = pcb->pcb_dr7;
2072 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2075 load_dr0(dbregs->dr[0]);
2076 load_dr1(dbregs->dr[1]);
2077 load_dr2(dbregs->dr[2]);
2078 load_dr3(dbregs->dr[3]);
2079 load_dr4(dbregs->dr[4]);
2080 load_dr5(dbregs->dr[5]);
2081 load_dr6(dbregs->dr[6]);
2082 load_dr7(dbregs->dr[7]);
2085 struct ucred *ucred;
2087 uint64_t mask1, mask2;
2090 * Don't let an illegal value for dr7 get set. Specifically,
2091 * check for undefined settings. Setting these bit patterns
2092 * result in undefined behaviour and can lead to an unexpected
2095 /* JG this loop looks unreadable */
2096 /* Check 4 2-bit fields for invalid patterns.
2097 * These fields are R/Wi, for i = 0..3
2099 /* Is 10 in LENi allowed when running in compatibility mode? */
2100 /* Pattern 10 in R/Wi might be used to indicate
2101 * breakpoint on I/O. Further analysis should be
2102 * carried to decide if it is safe and useful to
2103 * provide access to that capability
2105 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2106 i++, mask1 <<= 4, mask2 <<= 4)
2107 if ((dbregs->dr[7] & mask1) == mask2)
2110 pcb = lp->lwp_thread->td_pcb;
2111 ucred = lp->lwp_proc->p_ucred;
2114 * Don't let a process set a breakpoint that is not within the
2115 * process's address space. If a process could do this, it
2116 * could halt the system by setting a breakpoint in the kernel
2117 * (if ddb was enabled). Thus, we need to check to make sure
2118 * that no breakpoints are being enabled for addresses outside
2119 * process's address space, unless, perhaps, we were called by
2122 * XXX - what about when the watched area of the user's
2123 * address space is written into from within the kernel
2124 * ... wouldn't that still cause a breakpoint to be generated
2125 * from within kernel mode?
2128 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2129 if (dbregs->dr[7] & 0x3) {
2130 /* dr0 is enabled */
2131 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2135 if (dbregs->dr[7] & (0x3<<2)) {
2136 /* dr1 is enabled */
2137 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2141 if (dbregs->dr[7] & (0x3<<4)) {
2142 /* dr2 is enabled */
2143 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2147 if (dbregs->dr[7] & (0x3<<6)) {
2148 /* dr3 is enabled */
2149 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2154 pcb->pcb_dr0 = dbregs->dr[0];
2155 pcb->pcb_dr1 = dbregs->dr[1];
2156 pcb->pcb_dr2 = dbregs->dr[2];
2157 pcb->pcb_dr3 = dbregs->dr[3];
2158 pcb->pcb_dr6 = dbregs->dr[6];
2159 pcb->pcb_dr7 = dbregs->dr[7];
2161 pcb->pcb_flags |= PCB_DBREGS;
2168 * Return > 0 if a hardware breakpoint has been hit, and the
2169 * breakpoint was in user space. Return 0, otherwise.
2172 user_dbreg_trap(void)
2174 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2175 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2176 int nbp; /* number of breakpoints that triggered */
2177 caddr_t addr[4]; /* breakpoint addresses */
2181 if ((dr7 & 0xff) == 0) {
2183 * all GE and LE bits in the dr7 register are zero,
2184 * thus the trap couldn't have been caused by the
2185 * hardware debug registers
2196 * None of the breakpoint bits are set meaning this
2197 * trap was not caused by any of the debug registers
2203 * at least one of the breakpoints were hit, check to see
2204 * which ones and if any of them are user space addresses
2208 addr[nbp++] = (caddr_t)rdr0();
2211 addr[nbp++] = (caddr_t)rdr1();
2214 addr[nbp++] = (caddr_t)rdr2();
2217 addr[nbp++] = (caddr_t)rdr3();
2220 for (i=0; i<nbp; i++) {
2222 (caddr_t)VM_MAX_USER_ADDRESS) {
2224 * addr[i] is in user space
2231 * None of the breakpoints are in user space.
2239 Debugger(const char *msg)
2241 kprintf("Debugger(\"%s\") called.\n", msg);
2248 * Provide inb() and outb() as functions. They are normally only
2249 * available as macros calling inlined functions, thus cannot be
2250 * called inside DDB.
2252 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2258 /* silence compiler warnings */
2260 void outb(u_int, u_char);
2267 * We use %%dx and not %1 here because i/o is done at %dx and not at
2268 * %edx, while gcc generates inferior code (movw instead of movl)
2269 * if we tell it to load (u_short) port.
2271 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2276 outb(u_int port, u_char data)
2280 * Use an unnecessary assignment to help gcc's register allocator.
2281 * This make a large difference for gcc-1.40 and a tiny difference
2282 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2283 * best results. gcc-2.6.0 can't handle this.
2286 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2293 #include "opt_cpu.h"
2297 * initialize all the SMP locks
2300 /* critical region when masking or unmasking interupts */
2301 struct spinlock_deprecated imen_spinlock;
2303 /* Make FAST_INTR() routines sequential */
2304 struct spinlock_deprecated fast_intr_spinlock;
2306 /* critical region for old style disable_intr/enable_intr */
2307 struct spinlock_deprecated mpintr_spinlock;
2309 /* critical region around INTR() routines */
2310 struct spinlock_deprecated intr_spinlock;
2312 /* lock region used by kernel profiling */
2313 struct spinlock_deprecated mcount_spinlock;
2315 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2316 struct spinlock_deprecated com_spinlock;
2318 /* locks kernel kprintfs */
2319 struct spinlock_deprecated cons_spinlock;
2321 /* lock regions around the clock hardware */
2322 struct spinlock_deprecated clock_spinlock;
2324 /* lock around the MP rendezvous */
2325 struct spinlock_deprecated smp_rv_spinlock;
2331 * mp_lock = 0; BSP already owns the MP lock
2334 * Get the initial mp_lock with a count of 1 for the BSP.
2335 * This uses a LOGICAL cpu ID, ie BSP == 0.
2338 cpu_get_initial_mplock();
2341 spin_lock_init(&mcount_spinlock);
2342 spin_lock_init(&fast_intr_spinlock);
2343 spin_lock_init(&intr_spinlock);
2344 spin_lock_init(&mpintr_spinlock);
2345 spin_lock_init(&imen_spinlock);
2346 spin_lock_init(&smp_rv_spinlock);
2347 spin_lock_init(&com_spinlock);
2348 spin_lock_init(&clock_spinlock);
2349 spin_lock_init(&cons_spinlock);
2351 /* our token pool needs to work early */
2352 lwkt_token_pool_init();