1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
31 #include "basic-block.h"
34 #include "insn-config.h"
45 #include "rtlhooks-def.h"
46 #include "tree-pass.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `REG_QTY (N)' records what quantity register N is currently thought
87 All real quantity numbers are greater than or equal to zero.
88 If register N has not been assigned a quantity, `REG_QTY (N)' will
89 equal -N - 1, which is always negative.
91 Quantity numbers below zero do not exist and none of the `qty_table'
92 entries should be referenced with a negative index.
94 We also maintain a bidirectional chain of registers for each
95 quantity number. The `qty_table` members `first_reg' and `last_reg',
96 and `reg_eqv_table' members `next' and `prev' hold these chains.
98 The first register in a chain is the one whose lifespan is least local.
99 Among equals, it is the one that was seen first.
100 We replace any equivalent register with that one.
102 If two registers have the same quantity number, it must be true that
103 REG expressions with qty_table `mode' must be in the hash table for both
104 registers and must be in the same class.
106 The converse is not true. Since hard registers may be referenced in
107 any mode, two REG expressions might be equivalent in the hash table
108 but not have the same quantity number if the quantity number of one
109 of the registers is not the same mode as those expressions.
111 Constants and quantity numbers
113 When a quantity has a known constant value, that value is stored
114 in the appropriate qty_table `const_rtx'. This is in addition to
115 putting the constant in the hash table as is usual for non-regs.
117 Whether a reg or a constant is preferred is determined by the configuration
118 macro CONST_COSTS and will often depend on the constant value. In any
119 event, expressions containing constants can be simplified, by fold_rtx.
121 When a quantity has a known nearly constant value (such as an address
122 of a stack slot), that value is stored in the appropriate qty_table
125 Integer constants don't have a machine mode. However, cse
126 determines the intended machine mode from the destination
127 of the instruction that moves the constant. The machine mode
128 is recorded in the hash table along with the actual RTL
129 constant expression so that different modes are kept separate.
133 To record known equivalences among expressions in general
134 we use a hash table called `table'. It has a fixed number of buckets
135 that contain chains of `struct table_elt' elements for expressions.
136 These chains connect the elements whose expressions have the same
139 Other chains through the same elements connect the elements which
140 currently have equivalent values.
142 Register references in an expression are canonicalized before hashing
143 the expression. This is done using `reg_qty' and qty_table `first_reg'.
144 The hash code of a register reference is computed using the quantity
145 number, not the register number.
147 When the value of an expression changes, it is necessary to remove from the
148 hash table not just that expression but all expressions whose values
149 could be different as a result.
151 1. If the value changing is in memory, except in special cases
152 ANYTHING referring to memory could be changed. That is because
153 nobody knows where a pointer does not point.
154 The function `invalidate_memory' removes what is necessary.
156 The special cases are when the address is constant or is
157 a constant plus a fixed register such as the frame pointer
158 or a static chain pointer. When such addresses are stored in,
159 we can tell exactly which other such addresses must be invalidated
160 due to overlap. `invalidate' does this.
161 All expressions that refer to non-constant
162 memory addresses are also invalidated. `invalidate_memory' does this.
164 2. If the value changing is a register, all expressions
165 containing references to that register, and only those,
168 Because searching the entire hash table for expressions that contain
169 a register is very slow, we try to figure out when it isn't necessary.
170 Precisely, this is necessary only when expressions have been
171 entered in the hash table using this register, and then the value has
172 changed, and then another expression wants to be added to refer to
173 the register's new value. This sequence of circumstances is rare
174 within any one basic block.
176 `REG_TICK' and `REG_IN_TABLE', accessors for members of
177 cse_reg_info, are used to detect this case. REG_TICK (i) is
178 incremented whenever a value is stored in register i.
179 REG_IN_TABLE (i) holds -1 if no references to register i have been
180 entered in the table; otherwise, it contains the value REG_TICK (i)
181 had when the references were entered. If we want to enter a
182 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
183 remove old references. Until we want to enter a new entry, the
184 mere fact that the two vectors don't match makes the entries be
185 ignored if anyone tries to match them.
187 Registers themselves are entered in the hash table as well as in
188 the equivalent-register chains. However, `REG_TICK' and
189 `REG_IN_TABLE' do not apply to expressions which are simple
190 register references. These expressions are removed from the table
191 immediately when they become invalid, and this can be done even if
192 we do not immediately search for all the expressions that refer to
195 A CLOBBER rtx in an instruction invalidates its operand for further
196 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
197 invalidates everything that resides in memory.
201 Constant expressions that differ only by an additive integer
202 are called related. When a constant expression is put in
203 the table, the related expression with no constant term
204 is also entered. These are made to point at each other
205 so that it is possible to find out if there exists any
206 register equivalent to an expression related to a given expression. */
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
247 rtx comparison_const;
249 unsigned int first_reg, last_reg;
250 /* The sizes of these fields should match the sizes of the
251 code and mode fields of struct rtx_def (see rtl.h). */
252 ENUM_BITFIELD(rtx_code) comparison_code : 16;
253 ENUM_BITFIELD(machine_mode) mode : 8;
256 /* The table of all qtys, indexed by qty number. */
257 static struct qty_table_elem *qty_table;
259 /* Structure used to pass arguments via for_each_rtx to function
260 cse_change_cc_mode. */
261 struct change_cc_mode_args
268 /* For machines that have a CC0, we do not record its value in the hash
269 table since its use is guaranteed to be the insn immediately following
270 its definition and any other insn is presumed to invalidate it.
272 Instead, we store below the value last assigned to CC0. If it should
273 happen to be a constant, it is stored in preference to the actual
274 assigned value. In case it is a constant, we store the mode in which
275 the constant should be interpreted. */
277 static rtx prev_insn_cc0;
278 static enum machine_mode prev_insn_cc0_mode;
280 /* Previous actual insn. 0 if at first insn of basic block. */
282 static rtx prev_insn;
285 /* Insn being scanned. */
287 static rtx this_insn;
289 /* Index by register number, gives the number of the next (or
290 previous) register in the chain of registers sharing the same
293 Or -1 if this register is at the end of the chain.
295 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
297 /* Per-register equivalence chain. */
303 /* The table of all register equivalence chains. */
304 static struct reg_eqv_elem *reg_eqv_table;
308 /* The timestamp at which this register is initialized. */
309 unsigned int timestamp;
311 /* The quantity number of the register's current contents. */
314 /* The number of times the register has been altered in the current
318 /* The REG_TICK value at which rtx's containing this register are
319 valid in the hash table. If this does not equal the current
320 reg_tick value, such expressions existing in the hash table are
324 /* The SUBREG that was set when REG_TICK was last incremented. Set
325 to -1 if the last store was to the whole register, not a subreg. */
326 unsigned int subreg_ticked;
329 /* A table of cse_reg_info indexed by register numbers. */
330 static struct cse_reg_info *cse_reg_info_table;
332 /* The size of the above table. */
333 static unsigned int cse_reg_info_table_size;
335 /* The index of the first entry that has not been initialized. */
336 static unsigned int cse_reg_info_table_first_uninitialized;
338 /* The timestamp at the beginning of the current run of
339 cse_basic_block. We increment this variable at the beginning of
340 the current run of cse_basic_block. The timestamp field of a
341 cse_reg_info entry matches the value of this variable if and only
342 if the entry has been initialized during the current run of
344 static unsigned int cse_reg_info_timestamp;
346 /* A HARD_REG_SET containing all the hard registers for which there is
347 currently a REG expression in the hash table. Note the difference
348 from the above variables, which indicate if the REG is mentioned in some
349 expression in the table. */
351 static HARD_REG_SET hard_regs_in_table;
353 /* CUID of insn that starts the basic block currently being cse-processed. */
355 static int cse_basic_block_start;
357 /* CUID of insn that ends the basic block currently being cse-processed. */
359 static int cse_basic_block_end;
361 /* Vector mapping INSN_UIDs to cuids.
362 The cuids are like uids but increase monotonically always.
363 We use them to see whether a reg is used outside a given basic block. */
365 static int *uid_cuid;
367 /* Highest UID in UID_CUID. */
370 /* Get the cuid of an insn. */
372 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
374 /* Nonzero if this pass has made changes, and therefore it's
375 worthwhile to run the garbage collector. */
377 static int cse_altered;
379 /* Nonzero if cse has altered conditional jump insns
380 in such a way that jump optimization should be redone. */
382 static int cse_jumps_altered;
384 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
385 REG_LABEL, we have to rerun jump after CSE to put in the note. */
386 static int recorded_label_ref;
388 /* canon_hash stores 1 in do_not_record
389 if it notices a reference to CC0, PC, or some other volatile
392 static int do_not_record;
394 /* canon_hash stores 1 in hash_arg_in_memory
395 if it notices a reference to memory within the expression being hashed. */
397 static int hash_arg_in_memory;
399 /* The hash table contains buckets which are chains of `struct table_elt's,
400 each recording one expression's information.
401 That expression is in the `exp' field.
403 The canon_exp field contains a canonical (from the point of view of
404 alias analysis) version of the `exp' field.
406 Those elements with the same hash code are chained in both directions
407 through the `next_same_hash' and `prev_same_hash' fields.
409 Each set of expressions with equivalent values
410 are on a two-way chain through the `next_same_value'
411 and `prev_same_value' fields, and all point with
412 the `first_same_value' field at the first element in
413 that chain. The chain is in order of increasing cost.
414 Each element's cost value is in its `cost' field.
416 The `in_memory' field is nonzero for elements that
417 involve any reference to memory. These elements are removed
418 whenever a write is done to an unidentified location in memory.
419 To be safe, we assume that a memory address is unidentified unless
420 the address is either a symbol constant or a constant plus
421 the frame pointer or argument pointer.
423 The `related_value' field is used to connect related expressions
424 (that differ by adding an integer).
425 The related expressions are chained in a circular fashion.
426 `related_value' is zero for expressions for which this
429 The `cost' field stores the cost of this element's expression.
430 The `regcost' field stores the value returned by approx_reg_cost for
431 this element's expression.
433 The `is_const' flag is set if the element is a constant (including
436 The `flag' field is used as a temporary during some search routines.
438 The `mode' field is usually the same as GET_MODE (`exp'), but
439 if `exp' is a CONST_INT and has no machine mode then the `mode'
440 field is the mode it was being used as. Each constant is
441 recorded separately for each mode it is used with. */
447 struct table_elt *next_same_hash;
448 struct table_elt *prev_same_hash;
449 struct table_elt *next_same_value;
450 struct table_elt *prev_same_value;
451 struct table_elt *first_same_value;
452 struct table_elt *related_value;
455 /* The size of this field should match the size
456 of the mode field of struct rtx_def (see rtl.h). */
457 ENUM_BITFIELD(machine_mode) mode : 8;
463 /* We don't want a lot of buckets, because we rarely have very many
464 things stored in the hash table, and a lot of buckets slows
465 down a lot of loops that happen frequently. */
467 #define HASH_SIZE (1 << HASH_SHIFT)
468 #define HASH_MASK (HASH_SIZE - 1)
470 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
471 register (hard registers may require `do_not_record' to be set). */
474 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
475 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
476 : canon_hash (X, M)) & HASH_MASK)
478 /* Like HASH, but without side-effects. */
479 #define SAFE_HASH(X, M) \
480 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
481 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
482 : safe_hash (X, M)) & HASH_MASK)
484 /* Determine whether register number N is considered a fixed register for the
485 purpose of approximating register costs.
486 It is desirable to replace other regs with fixed regs, to reduce need for
488 A reg wins if it is either the frame pointer or designated as fixed. */
489 #define FIXED_REGNO_P(N) \
490 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
491 || fixed_regs[N] || global_regs[N])
493 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
494 hard registers and pointers into the frame are the cheapest with a cost
495 of 0. Next come pseudos with a cost of one and other hard registers with
496 a cost of 2. Aside from these special cases, call `rtx_cost'. */
498 #define CHEAP_REGNO(N) \
499 (REGNO_PTR_FRAME_P(N) \
500 || (HARD_REGISTER_NUM_P (N) \
501 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
503 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
504 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
506 /* Get the number of times this register has been updated in this
509 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
511 /* Get the point at which REG was recorded in the table. */
513 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
515 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
518 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
520 /* Get the quantity number for REG. */
522 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
524 /* Determine if the quantity number for register X represents a valid index
525 into the qty_table. */
527 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
529 static struct table_elt *table[HASH_SIZE];
531 /* Number of elements in the hash table. */
533 static unsigned int table_size;
535 /* Chain of `struct table_elt's made so far for this function
536 but currently removed from the table. */
538 static struct table_elt *free_element_chain;
540 /* Set to the cost of a constant pool reference if one was found for a
541 symbolic constant. If this was found, it means we should try to
542 convert constants into constant pool entries if they don't fit in
545 static int constant_pool_entries_cost;
546 static int constant_pool_entries_regcost;
548 /* This data describes a block that will be processed by cse_basic_block. */
550 struct cse_basic_block_data
552 /* Lowest CUID value of insns in block. */
554 /* Highest CUID value of insns in block. */
556 /* Total number of SETs in block. */
558 /* Last insn in the block. */
560 /* Size of current branch path, if any. */
562 /* Current branch path, indicating which branches will be taken. */
565 /* The branch insn. */
567 /* Whether it should be taken or not. AROUND is the same as taken
568 except that it is used when the destination label is not preceded
570 enum taken {PATH_TAKEN, PATH_NOT_TAKEN, PATH_AROUND} status;
574 static bool fixed_base_plus_p (rtx x);
575 static int notreg_cost (rtx, enum rtx_code);
576 static int approx_reg_cost_1 (rtx *, void *);
577 static int approx_reg_cost (rtx);
578 static int preferable (int, int, int, int);
579 static void new_basic_block (void);
580 static void make_new_qty (unsigned int, enum machine_mode);
581 static void make_regs_eqv (unsigned int, unsigned int);
582 static void delete_reg_equiv (unsigned int);
583 static int mention_regs (rtx);
584 static int insert_regs (rtx, struct table_elt *, int);
585 static void remove_from_table (struct table_elt *, unsigned);
586 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
587 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
588 static rtx lookup_as_function (rtx, enum rtx_code);
589 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
591 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
592 static void invalidate (rtx, enum machine_mode);
593 static int cse_rtx_varies_p (rtx, int);
594 static void remove_invalid_refs (unsigned int);
595 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
597 static void rehash_using_reg (rtx);
598 static void invalidate_memory (void);
599 static void invalidate_for_call (void);
600 static rtx use_related_value (rtx, struct table_elt *);
602 static inline unsigned canon_hash (rtx, enum machine_mode);
603 static inline unsigned safe_hash (rtx, enum machine_mode);
604 static unsigned hash_rtx_string (const char *);
606 static rtx canon_reg (rtx, rtx);
607 static void find_best_addr (rtx, rtx *, enum machine_mode);
608 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
610 enum machine_mode *);
611 static rtx fold_rtx (rtx, rtx);
612 static rtx equiv_constant (rtx);
613 static void record_jump_equiv (rtx, int);
614 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
616 static void cse_insn (rtx, rtx);
617 static void cse_end_of_basic_block (rtx, struct cse_basic_block_data *,
619 static int addr_affects_sp_p (rtx);
620 static void invalidate_from_clobbers (rtx);
621 static rtx cse_process_notes (rtx, rtx);
622 static void invalidate_skipped_set (rtx, rtx, void *);
623 static void invalidate_skipped_block (rtx);
624 static rtx cse_basic_block (rtx, rtx, struct branch_path *);
625 static void count_reg_usage (rtx, int *, rtx, int);
626 static int check_for_label_ref (rtx *, void *);
627 extern void dump_class (struct table_elt*);
628 static void get_cse_reg_info_1 (unsigned int regno);
629 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
630 static int check_dependence (rtx *, void *);
632 static void flush_hash_table (void);
633 static bool insn_live_p (rtx, int *);
634 static bool set_live_p (rtx, rtx, int *);
635 static bool dead_libcall_p (rtx, int *);
636 static int cse_change_cc_mode (rtx *, void *);
637 static void cse_change_cc_mode_insn (rtx, rtx);
638 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
639 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
642 #undef RTL_HOOKS_GEN_LOWPART
643 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
645 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
647 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
648 virtual regs here because the simplify_*_operation routines are called
649 by integrate.c, which is called before virtual register instantiation. */
652 fixed_base_plus_p (rtx x)
654 switch (GET_CODE (x))
657 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
659 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
661 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
662 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
667 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
669 return fixed_base_plus_p (XEXP (x, 0));
676 /* Dump the expressions in the equivalence class indicated by CLASSP.
677 This function is used only for debugging. */
679 dump_class (struct table_elt *classp)
681 struct table_elt *elt;
683 fprintf (stderr, "Equivalence chain for ");
684 print_rtl (stderr, classp->exp);
685 fprintf (stderr, ": \n");
687 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
689 print_rtl (stderr, elt->exp);
690 fprintf (stderr, "\n");
694 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
697 approx_reg_cost_1 (rtx *xp, void *data)
704 unsigned int regno = REGNO (x);
706 if (! CHEAP_REGNO (regno))
708 if (regno < FIRST_PSEUDO_REGISTER)
710 if (SMALL_REGISTER_CLASSES)
722 /* Return an estimate of the cost of the registers used in an rtx.
723 This is mostly the number of different REG expressions in the rtx;
724 however for some exceptions like fixed registers we use a cost of
725 0. If any other hard register reference occurs, return MAX_COST. */
728 approx_reg_cost (rtx x)
732 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
738 /* Returns a canonical version of X for the address, from the point of view,
739 that all multiplications are represented as MULT instead of the multiply
740 by a power of 2 being represented as ASHIFT. */
743 canon_for_address (rtx x)
746 enum machine_mode mode;
760 if (GET_CODE (XEXP (x, 1)) == CONST_INT
761 && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (mode)
762 && INTVAL (XEXP (x, 1)) >= 0)
764 new = canon_for_address (XEXP (x, 0));
765 new = gen_rtx_MULT (mode, new,
766 gen_int_mode ((HOST_WIDE_INT) 1
767 << INTVAL (XEXP (x, 1)),
778 /* Now recursively process each operand of this operation. */
779 fmt = GET_RTX_FORMAT (code);
780 for (i = 0; i < GET_RTX_LENGTH (code); i++)
783 new = canon_for_address (XEXP (x, i));
789 /* Return a negative value if an rtx A, whose costs are given by COST_A
790 and REGCOST_A, is more desirable than an rtx B.
791 Return a positive value if A is less desirable, or 0 if the two are
794 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
796 /* First, get rid of cases involving expressions that are entirely
798 if (cost_a != cost_b)
800 if (cost_a == MAX_COST)
802 if (cost_b == MAX_COST)
806 /* Avoid extending lifetimes of hardregs. */
807 if (regcost_a != regcost_b)
809 if (regcost_a == MAX_COST)
811 if (regcost_b == MAX_COST)
815 /* Normal operation costs take precedence. */
816 if (cost_a != cost_b)
817 return cost_a - cost_b;
818 /* Only if these are identical consider effects on register pressure. */
819 if (regcost_a != regcost_b)
820 return regcost_a - regcost_b;
824 /* Internal function, to compute cost when X is not a register; called
825 from COST macro to keep it simple. */
828 notreg_cost (rtx x, enum rtx_code outer)
830 return ((GET_CODE (x) == SUBREG
831 && REG_P (SUBREG_REG (x))
832 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
833 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
834 && (GET_MODE_SIZE (GET_MODE (x))
835 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
836 && subreg_lowpart_p (x)
837 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
838 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
840 : rtx_cost (x, outer) * 2);
844 /* Initialize CSE_REG_INFO_TABLE. */
847 init_cse_reg_info (unsigned int nregs)
849 /* Do we need to grow the table? */
850 if (nregs > cse_reg_info_table_size)
852 unsigned int new_size;
854 if (cse_reg_info_table_size < 2048)
856 /* Compute a new size that is a power of 2 and no smaller
857 than the large of NREGS and 64. */
858 new_size = (cse_reg_info_table_size
859 ? cse_reg_info_table_size : 64);
861 while (new_size < nregs)
866 /* If we need a big table, allocate just enough to hold
871 /* Reallocate the table with NEW_SIZE entries. */
872 if (cse_reg_info_table)
873 free (cse_reg_info_table);
874 cse_reg_info_table = xmalloc (sizeof (struct cse_reg_info)
876 cse_reg_info_table_size = new_size;
877 cse_reg_info_table_first_uninitialized = 0;
880 /* Do we have all of the first NREGS entries initialized? */
881 if (cse_reg_info_table_first_uninitialized < nregs)
883 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
886 /* Put the old timestamp on newly allocated entries so that they
887 will all be considered out of date. We do not touch those
888 entries beyond the first NREGS entries to be nice to the
890 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
891 cse_reg_info_table[i].timestamp = old_timestamp;
893 cse_reg_info_table_first_uninitialized = nregs;
897 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
900 get_cse_reg_info_1 (unsigned int regno)
902 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
903 entry will be considered to have been initialized. */
904 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
906 /* Initialize the rest of the entry. */
907 cse_reg_info_table[regno].reg_tick = 1;
908 cse_reg_info_table[regno].reg_in_table = -1;
909 cse_reg_info_table[regno].subreg_ticked = -1;
910 cse_reg_info_table[regno].reg_qty = -regno - 1;
913 /* Find a cse_reg_info entry for REGNO. */
915 static inline struct cse_reg_info *
916 get_cse_reg_info (unsigned int regno)
918 struct cse_reg_info *p = &cse_reg_info_table[regno];
920 /* If this entry has not been initialized, go ahead and initialize
922 if (p->timestamp != cse_reg_info_timestamp)
923 get_cse_reg_info_1 (regno);
928 /* Clear the hash table and initialize each register with its own quantity,
929 for a new basic block. */
932 new_basic_block (void)
938 /* Invalidate cse_reg_info_table. */
939 cse_reg_info_timestamp++;
941 /* Clear out hash table state for this pass. */
942 CLEAR_HARD_REG_SET (hard_regs_in_table);
944 /* The per-quantity values used to be initialized here, but it is
945 much faster to initialize each as it is made in `make_new_qty'. */
947 for (i = 0; i < HASH_SIZE; i++)
949 struct table_elt *first;
954 struct table_elt *last = first;
958 while (last->next_same_hash != NULL)
959 last = last->next_same_hash;
961 /* Now relink this hash entire chain into
962 the free element list. */
964 last->next_same_hash = free_element_chain;
965 free_element_chain = first;
977 /* Say that register REG contains a quantity in mode MODE not in any
978 register before and initialize that quantity. */
981 make_new_qty (unsigned int reg, enum machine_mode mode)
984 struct qty_table_elem *ent;
985 struct reg_eqv_elem *eqv;
987 gcc_assert (next_qty < max_qty);
989 q = REG_QTY (reg) = next_qty++;
991 ent->first_reg = reg;
994 ent->const_rtx = ent->const_insn = NULL_RTX;
995 ent->comparison_code = UNKNOWN;
997 eqv = ®_eqv_table[reg];
998 eqv->next = eqv->prev = -1;
1001 /* Make reg NEW equivalent to reg OLD.
1002 OLD is not changing; NEW is. */
1005 make_regs_eqv (unsigned int new, unsigned int old)
1007 unsigned int lastr, firstr;
1008 int q = REG_QTY (old);
1009 struct qty_table_elem *ent;
1011 ent = &qty_table[q];
1013 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1014 gcc_assert (REGNO_QTY_VALID_P (old));
1017 firstr = ent->first_reg;
1018 lastr = ent->last_reg;
1020 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1021 hard regs. Among pseudos, if NEW will live longer than any other reg
1022 of the same qty, and that is beyond the current basic block,
1023 make it the new canonical replacement for this qty. */
1024 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1025 /* Certain fixed registers might be of the class NO_REGS. This means
1026 that not only can they not be allocated by the compiler, but
1027 they cannot be used in substitutions or canonicalizations
1029 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1030 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1031 || (new >= FIRST_PSEUDO_REGISTER
1032 && (firstr < FIRST_PSEUDO_REGISTER
1033 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1034 || (uid_cuid[REGNO_FIRST_UID (new)]
1035 < cse_basic_block_start))
1036 && (uid_cuid[REGNO_LAST_UID (new)]
1037 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1039 reg_eqv_table[firstr].prev = new;
1040 reg_eqv_table[new].next = firstr;
1041 reg_eqv_table[new].prev = -1;
1042 ent->first_reg = new;
1046 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1047 Otherwise, insert before any non-fixed hard regs that are at the
1048 end. Registers of class NO_REGS cannot be used as an
1049 equivalent for anything. */
1050 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1051 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1052 && new >= FIRST_PSEUDO_REGISTER)
1053 lastr = reg_eqv_table[lastr].prev;
1054 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1055 if (reg_eqv_table[lastr].next >= 0)
1056 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1058 qty_table[q].last_reg = new;
1059 reg_eqv_table[lastr].next = new;
1060 reg_eqv_table[new].prev = lastr;
1064 /* Remove REG from its equivalence class. */
1067 delete_reg_equiv (unsigned int reg)
1069 struct qty_table_elem *ent;
1070 int q = REG_QTY (reg);
1073 /* If invalid, do nothing. */
1074 if (! REGNO_QTY_VALID_P (reg))
1077 ent = &qty_table[q];
1079 p = reg_eqv_table[reg].prev;
1080 n = reg_eqv_table[reg].next;
1083 reg_eqv_table[n].prev = p;
1087 reg_eqv_table[p].next = n;
1091 REG_QTY (reg) = -reg - 1;
1094 /* Remove any invalid expressions from the hash table
1095 that refer to any of the registers contained in expression X.
1097 Make sure that newly inserted references to those registers
1098 as subexpressions will be considered valid.
1100 mention_regs is not called when a register itself
1101 is being stored in the table.
1103 Return 1 if we have done something that may have changed the hash code
1107 mention_regs (rtx x)
1117 code = GET_CODE (x);
1120 unsigned int regno = REGNO (x);
1121 unsigned int endregno
1122 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1123 : hard_regno_nregs[regno][GET_MODE (x)]);
1126 for (i = regno; i < endregno; i++)
1128 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1129 remove_invalid_refs (i);
1131 REG_IN_TABLE (i) = REG_TICK (i);
1132 SUBREG_TICKED (i) = -1;
1138 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1139 pseudo if they don't use overlapping words. We handle only pseudos
1140 here for simplicity. */
1141 if (code == SUBREG && REG_P (SUBREG_REG (x))
1142 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1144 unsigned int i = REGNO (SUBREG_REG (x));
1146 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1148 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1149 the last store to this register really stored into this
1150 subreg, then remove the memory of this subreg.
1151 Otherwise, remove any memory of the entire register and
1152 all its subregs from the table. */
1153 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1154 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1155 remove_invalid_refs (i);
1157 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1160 REG_IN_TABLE (i) = REG_TICK (i);
1161 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1165 /* If X is a comparison or a COMPARE and either operand is a register
1166 that does not have a quantity, give it one. This is so that a later
1167 call to record_jump_equiv won't cause X to be assigned a different
1168 hash code and not found in the table after that call.
1170 It is not necessary to do this here, since rehash_using_reg can
1171 fix up the table later, but doing this here eliminates the need to
1172 call that expensive function in the most common case where the only
1173 use of the register is in the comparison. */
1175 if (code == COMPARE || COMPARISON_P (x))
1177 if (REG_P (XEXP (x, 0))
1178 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1179 if (insert_regs (XEXP (x, 0), NULL, 0))
1181 rehash_using_reg (XEXP (x, 0));
1185 if (REG_P (XEXP (x, 1))
1186 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1187 if (insert_regs (XEXP (x, 1), NULL, 0))
1189 rehash_using_reg (XEXP (x, 1));
1194 fmt = GET_RTX_FORMAT (code);
1195 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1197 changed |= mention_regs (XEXP (x, i));
1198 else if (fmt[i] == 'E')
1199 for (j = 0; j < XVECLEN (x, i); j++)
1200 changed |= mention_regs (XVECEXP (x, i, j));
1205 /* Update the register quantities for inserting X into the hash table
1206 with a value equivalent to CLASSP.
1207 (If the class does not contain a REG, it is irrelevant.)
1208 If MODIFIED is nonzero, X is a destination; it is being modified.
1209 Note that delete_reg_equiv should be called on a register
1210 before insert_regs is done on that register with MODIFIED != 0.
1212 Nonzero value means that elements of reg_qty have changed
1213 so X's hash code may be different. */
1216 insert_regs (rtx x, struct table_elt *classp, int modified)
1220 unsigned int regno = REGNO (x);
1223 /* If REGNO is in the equivalence table already but is of the
1224 wrong mode for that equivalence, don't do anything here. */
1226 qty_valid = REGNO_QTY_VALID_P (regno);
1229 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1231 if (ent->mode != GET_MODE (x))
1235 if (modified || ! qty_valid)
1238 for (classp = classp->first_same_value;
1240 classp = classp->next_same_value)
1241 if (REG_P (classp->exp)
1242 && GET_MODE (classp->exp) == GET_MODE (x))
1244 unsigned c_regno = REGNO (classp->exp);
1246 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1248 /* Suppose that 5 is hard reg and 100 and 101 are
1251 (set (reg:si 100) (reg:si 5))
1252 (set (reg:si 5) (reg:si 100))
1253 (set (reg:di 101) (reg:di 5))
1255 We would now set REG_QTY (101) = REG_QTY (5), but the
1256 entry for 5 is in SImode. When we use this later in
1257 copy propagation, we get the register in wrong mode. */
1258 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1261 make_regs_eqv (regno, c_regno);
1265 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1266 than REG_IN_TABLE to find out if there was only a single preceding
1267 invalidation - for the SUBREG - or another one, which would be
1268 for the full register. However, if we find here that REG_TICK
1269 indicates that the register is invalid, it means that it has
1270 been invalidated in a separate operation. The SUBREG might be used
1271 now (then this is a recursive call), or we might use the full REG
1272 now and a SUBREG of it later. So bump up REG_TICK so that
1273 mention_regs will do the right thing. */
1275 && REG_IN_TABLE (regno) >= 0
1276 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1278 make_new_qty (regno, GET_MODE (x));
1285 /* If X is a SUBREG, we will likely be inserting the inner register in the
1286 table. If that register doesn't have an assigned quantity number at
1287 this point but does later, the insertion that we will be doing now will
1288 not be accessible because its hash code will have changed. So assign
1289 a quantity number now. */
1291 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1292 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1294 insert_regs (SUBREG_REG (x), NULL, 0);
1299 return mention_regs (x);
1302 /* Look in or update the hash table. */
1304 /* Remove table element ELT from use in the table.
1305 HASH is its hash code, made using the HASH macro.
1306 It's an argument because often that is known in advance
1307 and we save much time not recomputing it. */
1310 remove_from_table (struct table_elt *elt, unsigned int hash)
1315 /* Mark this element as removed. See cse_insn. */
1316 elt->first_same_value = 0;
1318 /* Remove the table element from its equivalence class. */
1321 struct table_elt *prev = elt->prev_same_value;
1322 struct table_elt *next = elt->next_same_value;
1325 next->prev_same_value = prev;
1328 prev->next_same_value = next;
1331 struct table_elt *newfirst = next;
1334 next->first_same_value = newfirst;
1335 next = next->next_same_value;
1340 /* Remove the table element from its hash bucket. */
1343 struct table_elt *prev = elt->prev_same_hash;
1344 struct table_elt *next = elt->next_same_hash;
1347 next->prev_same_hash = prev;
1350 prev->next_same_hash = next;
1351 else if (table[hash] == elt)
1355 /* This entry is not in the proper hash bucket. This can happen
1356 when two classes were merged by `merge_equiv_classes'. Search
1357 for the hash bucket that it heads. This happens only very
1358 rarely, so the cost is acceptable. */
1359 for (hash = 0; hash < HASH_SIZE; hash++)
1360 if (table[hash] == elt)
1365 /* Remove the table element from its related-value circular chain. */
1367 if (elt->related_value != 0 && elt->related_value != elt)
1369 struct table_elt *p = elt->related_value;
1371 while (p->related_value != elt)
1372 p = p->related_value;
1373 p->related_value = elt->related_value;
1374 if (p->related_value == p)
1375 p->related_value = 0;
1378 /* Now add it to the free element chain. */
1379 elt->next_same_hash = free_element_chain;
1380 free_element_chain = elt;
1385 /* Look up X in the hash table and return its table element,
1386 or 0 if X is not in the table.
1388 MODE is the machine-mode of X, or if X is an integer constant
1389 with VOIDmode then MODE is the mode with which X will be used.
1391 Here we are satisfied to find an expression whose tree structure
1394 static struct table_elt *
1395 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1397 struct table_elt *p;
1399 for (p = table[hash]; p; p = p->next_same_hash)
1400 if (mode == p->mode && ((x == p->exp && REG_P (x))
1401 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1407 /* Like `lookup' but don't care whether the table element uses invalid regs.
1408 Also ignore discrepancies in the machine mode of a register. */
1410 static struct table_elt *
1411 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1413 struct table_elt *p;
1417 unsigned int regno = REGNO (x);
1419 /* Don't check the machine mode when comparing registers;
1420 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1421 for (p = table[hash]; p; p = p->next_same_hash)
1423 && REGNO (p->exp) == regno)
1428 for (p = table[hash]; p; p = p->next_same_hash)
1430 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1437 /* Look for an expression equivalent to X and with code CODE.
1438 If one is found, return that expression. */
1441 lookup_as_function (rtx x, enum rtx_code code)
1444 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1446 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1447 long as we are narrowing. So if we looked in vain for a mode narrower
1448 than word_mode before, look for word_mode now. */
1449 if (p == 0 && code == CONST_INT
1450 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1453 PUT_MODE (x, word_mode);
1454 p = lookup (x, SAFE_HASH (x, VOIDmode), word_mode);
1460 for (p = p->first_same_value; p; p = p->next_same_value)
1461 if (GET_CODE (p->exp) == code
1462 /* Make sure this is a valid entry in the table. */
1463 && exp_equiv_p (p->exp, p->exp, 1, false))
1469 /* Insert X in the hash table, assuming HASH is its hash code
1470 and CLASSP is an element of the class it should go in
1471 (or 0 if a new class should be made).
1472 It is inserted at the proper position to keep the class in
1473 the order cheapest first.
1475 MODE is the machine-mode of X, or if X is an integer constant
1476 with VOIDmode then MODE is the mode with which X will be used.
1478 For elements of equal cheapness, the most recent one
1479 goes in front, except that the first element in the list
1480 remains first unless a cheaper element is added. The order of
1481 pseudo-registers does not matter, as canon_reg will be called to
1482 find the cheapest when a register is retrieved from the table.
1484 The in_memory field in the hash table element is set to 0.
1485 The caller must set it nonzero if appropriate.
1487 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1488 and if insert_regs returns a nonzero value
1489 you must then recompute its hash code before calling here.
1491 If necessary, update table showing constant values of quantities. */
1493 #define CHEAPER(X, Y) \
1494 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1496 static struct table_elt *
1497 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1499 struct table_elt *elt;
1501 /* If X is a register and we haven't made a quantity for it,
1502 something is wrong. */
1503 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1505 /* If X is a hard register, show it is being put in the table. */
1506 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1508 unsigned int regno = REGNO (x);
1509 unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)];
1512 for (i = regno; i < endregno; i++)
1513 SET_HARD_REG_BIT (hard_regs_in_table, i);
1516 /* Put an element for X into the right hash bucket. */
1518 elt = free_element_chain;
1520 free_element_chain = elt->next_same_hash;
1522 elt = xmalloc (sizeof (struct table_elt));
1525 elt->canon_exp = NULL_RTX;
1526 elt->cost = COST (x);
1527 elt->regcost = approx_reg_cost (x);
1528 elt->next_same_value = 0;
1529 elt->prev_same_value = 0;
1530 elt->next_same_hash = table[hash];
1531 elt->prev_same_hash = 0;
1532 elt->related_value = 0;
1535 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1538 table[hash]->prev_same_hash = elt;
1541 /* Put it into the proper value-class. */
1544 classp = classp->first_same_value;
1545 if (CHEAPER (elt, classp))
1546 /* Insert at the head of the class. */
1548 struct table_elt *p;
1549 elt->next_same_value = classp;
1550 classp->prev_same_value = elt;
1551 elt->first_same_value = elt;
1553 for (p = classp; p; p = p->next_same_value)
1554 p->first_same_value = elt;
1558 /* Insert not at head of the class. */
1559 /* Put it after the last element cheaper than X. */
1560 struct table_elt *p, *next;
1562 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1565 /* Put it after P and before NEXT. */
1566 elt->next_same_value = next;
1568 next->prev_same_value = elt;
1570 elt->prev_same_value = p;
1571 p->next_same_value = elt;
1572 elt->first_same_value = classp;
1576 elt->first_same_value = elt;
1578 /* If this is a constant being set equivalent to a register or a register
1579 being set equivalent to a constant, note the constant equivalence.
1581 If this is a constant, it cannot be equivalent to a different constant,
1582 and a constant is the only thing that can be cheaper than a register. So
1583 we know the register is the head of the class (before the constant was
1586 If this is a register that is not already known equivalent to a
1587 constant, we must check the entire class.
1589 If this is a register that is already known equivalent to an insn,
1590 update the qtys `const_insn' to show that `this_insn' is the latest
1591 insn making that quantity equivalent to the constant. */
1593 if (elt->is_const && classp && REG_P (classp->exp)
1596 int exp_q = REG_QTY (REGNO (classp->exp));
1597 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1599 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1600 exp_ent->const_insn = this_insn;
1605 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1608 struct table_elt *p;
1610 for (p = classp; p != 0; p = p->next_same_value)
1612 if (p->is_const && !REG_P (p->exp))
1614 int x_q = REG_QTY (REGNO (x));
1615 struct qty_table_elem *x_ent = &qty_table[x_q];
1618 = gen_lowpart (GET_MODE (x), p->exp);
1619 x_ent->const_insn = this_insn;
1626 && qty_table[REG_QTY (REGNO (x))].const_rtx
1627 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1628 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1630 /* If this is a constant with symbolic value,
1631 and it has a term with an explicit integer value,
1632 link it up with related expressions. */
1633 if (GET_CODE (x) == CONST)
1635 rtx subexp = get_related_value (x);
1637 struct table_elt *subelt, *subelt_prev;
1641 /* Get the integer-free subexpression in the hash table. */
1642 subhash = SAFE_HASH (subexp, mode);
1643 subelt = lookup (subexp, subhash, mode);
1645 subelt = insert (subexp, NULL, subhash, mode);
1646 /* Initialize SUBELT's circular chain if it has none. */
1647 if (subelt->related_value == 0)
1648 subelt->related_value = subelt;
1649 /* Find the element in the circular chain that precedes SUBELT. */
1650 subelt_prev = subelt;
1651 while (subelt_prev->related_value != subelt)
1652 subelt_prev = subelt_prev->related_value;
1653 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1654 This way the element that follows SUBELT is the oldest one. */
1655 elt->related_value = subelt_prev->related_value;
1656 subelt_prev->related_value = elt;
1665 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1666 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1667 the two classes equivalent.
1669 CLASS1 will be the surviving class; CLASS2 should not be used after this
1672 Any invalid entries in CLASS2 will not be copied. */
1675 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1677 struct table_elt *elt, *next, *new;
1679 /* Ensure we start with the head of the classes. */
1680 class1 = class1->first_same_value;
1681 class2 = class2->first_same_value;
1683 /* If they were already equal, forget it. */
1684 if (class1 == class2)
1687 for (elt = class2; elt; elt = next)
1691 enum machine_mode mode = elt->mode;
1693 next = elt->next_same_value;
1695 /* Remove old entry, make a new one in CLASS1's class.
1696 Don't do this for invalid entries as we cannot find their
1697 hash code (it also isn't necessary). */
1698 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1700 bool need_rehash = false;
1702 hash_arg_in_memory = 0;
1703 hash = HASH (exp, mode);
1707 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1708 delete_reg_equiv (REGNO (exp));
1711 remove_from_table (elt, hash);
1713 if (insert_regs (exp, class1, 0) || need_rehash)
1715 rehash_using_reg (exp);
1716 hash = HASH (exp, mode);
1718 new = insert (exp, class1, hash, mode);
1719 new->in_memory = hash_arg_in_memory;
1724 /* Flush the entire hash table. */
1727 flush_hash_table (void)
1730 struct table_elt *p;
1732 for (i = 0; i < HASH_SIZE; i++)
1733 for (p = table[i]; p; p = table[i])
1735 /* Note that invalidate can remove elements
1736 after P in the current hash chain. */
1738 invalidate (p->exp, p->mode);
1740 remove_from_table (p, i);
1744 /* Function called for each rtx to check whether true dependence exist. */
1745 struct check_dependence_data
1747 enum machine_mode mode;
1753 check_dependence (rtx *x, void *data)
1755 struct check_dependence_data *d = (struct check_dependence_data *) data;
1756 if (*x && MEM_P (*x))
1757 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1763 /* Remove from the hash table, or mark as invalid, all expressions whose
1764 values could be altered by storing in X. X is a register, a subreg, or
1765 a memory reference with nonvarying address (because, when a memory
1766 reference with a varying address is stored in, all memory references are
1767 removed by invalidate_memory so specific invalidation is superfluous).
1768 FULL_MODE, if not VOIDmode, indicates that this much should be
1769 invalidated instead of just the amount indicated by the mode of X. This
1770 is only used for bitfield stores into memory.
1772 A nonvarying address may be just a register or just a symbol reference,
1773 or it may be either of those plus a numeric offset. */
1776 invalidate (rtx x, enum machine_mode full_mode)
1779 struct table_elt *p;
1782 switch (GET_CODE (x))
1786 /* If X is a register, dependencies on its contents are recorded
1787 through the qty number mechanism. Just change the qty number of
1788 the register, mark it as invalid for expressions that refer to it,
1789 and remove it itself. */
1790 unsigned int regno = REGNO (x);
1791 unsigned int hash = HASH (x, GET_MODE (x));
1793 /* Remove REGNO from any quantity list it might be on and indicate
1794 that its value might have changed. If it is a pseudo, remove its
1795 entry from the hash table.
1797 For a hard register, we do the first two actions above for any
1798 additional hard registers corresponding to X. Then, if any of these
1799 registers are in the table, we must remove any REG entries that
1800 overlap these registers. */
1802 delete_reg_equiv (regno);
1804 SUBREG_TICKED (regno) = -1;
1806 if (regno >= FIRST_PSEUDO_REGISTER)
1808 /* Because a register can be referenced in more than one mode,
1809 we might have to remove more than one table entry. */
1810 struct table_elt *elt;
1812 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1813 remove_from_table (elt, hash);
1817 HOST_WIDE_INT in_table
1818 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1819 unsigned int endregno
1820 = regno + hard_regno_nregs[regno][GET_MODE (x)];
1821 unsigned int tregno, tendregno, rn;
1822 struct table_elt *p, *next;
1824 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1826 for (rn = regno + 1; rn < endregno; rn++)
1828 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1829 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1830 delete_reg_equiv (rn);
1832 SUBREG_TICKED (rn) = -1;
1836 for (hash = 0; hash < HASH_SIZE; hash++)
1837 for (p = table[hash]; p; p = next)
1839 next = p->next_same_hash;
1842 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1845 tregno = REGNO (p->exp);
1847 = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)];
1848 if (tendregno > regno && tregno < endregno)
1849 remove_from_table (p, hash);
1856 invalidate (SUBREG_REG (x), VOIDmode);
1860 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1861 invalidate (XVECEXP (x, 0, i), VOIDmode);
1865 /* This is part of a disjoint return value; extract the location in
1866 question ignoring the offset. */
1867 invalidate (XEXP (x, 0), VOIDmode);
1871 addr = canon_rtx (get_addr (XEXP (x, 0)));
1872 /* Calculate the canonical version of X here so that
1873 true_dependence doesn't generate new RTL for X on each call. */
1876 /* Remove all hash table elements that refer to overlapping pieces of
1878 if (full_mode == VOIDmode)
1879 full_mode = GET_MODE (x);
1881 for (i = 0; i < HASH_SIZE; i++)
1883 struct table_elt *next;
1885 for (p = table[i]; p; p = next)
1887 next = p->next_same_hash;
1890 struct check_dependence_data d;
1892 /* Just canonicalize the expression once;
1893 otherwise each time we call invalidate
1894 true_dependence will canonicalize the
1895 expression again. */
1897 p->canon_exp = canon_rtx (p->exp);
1901 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1902 remove_from_table (p, i);
1913 /* Remove all expressions that refer to register REGNO,
1914 since they are already invalid, and we are about to
1915 mark that register valid again and don't want the old
1916 expressions to reappear as valid. */
1919 remove_invalid_refs (unsigned int regno)
1922 struct table_elt *p, *next;
1924 for (i = 0; i < HASH_SIZE; i++)
1925 for (p = table[i]; p; p = next)
1927 next = p->next_same_hash;
1929 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1930 remove_from_table (p, i);
1934 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1937 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1938 enum machine_mode mode)
1941 struct table_elt *p, *next;
1942 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1944 for (i = 0; i < HASH_SIZE; i++)
1945 for (p = table[i]; p; p = next)
1948 next = p->next_same_hash;
1951 && (GET_CODE (exp) != SUBREG
1952 || !REG_P (SUBREG_REG (exp))
1953 || REGNO (SUBREG_REG (exp)) != regno
1954 || (((SUBREG_BYTE (exp)
1955 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1956 && SUBREG_BYTE (exp) <= end))
1957 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1958 remove_from_table (p, i);
1962 /* Recompute the hash codes of any valid entries in the hash table that
1963 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1965 This is called when we make a jump equivalence. */
1968 rehash_using_reg (rtx x)
1971 struct table_elt *p, *next;
1974 if (GET_CODE (x) == SUBREG)
1977 /* If X is not a register or if the register is known not to be in any
1978 valid entries in the table, we have no work to do. */
1981 || REG_IN_TABLE (REGNO (x)) < 0
1982 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1985 /* Scan all hash chains looking for valid entries that mention X.
1986 If we find one and it is in the wrong hash chain, move it. */
1988 for (i = 0; i < HASH_SIZE; i++)
1989 for (p = table[i]; p; p = next)
1991 next = p->next_same_hash;
1992 if (reg_mentioned_p (x, p->exp)
1993 && exp_equiv_p (p->exp, p->exp, 1, false)
1994 && i != (hash = SAFE_HASH (p->exp, p->mode)))
1996 if (p->next_same_hash)
1997 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1999 if (p->prev_same_hash)
2000 p->prev_same_hash->next_same_hash = p->next_same_hash;
2002 table[i] = p->next_same_hash;
2004 p->next_same_hash = table[hash];
2005 p->prev_same_hash = 0;
2007 table[hash]->prev_same_hash = p;
2013 /* Remove from the hash table any expression that is a call-clobbered
2014 register. Also update their TICK values. */
2017 invalidate_for_call (void)
2019 unsigned int regno, endregno;
2022 struct table_elt *p, *next;
2025 /* Go through all the hard registers. For each that is clobbered in
2026 a CALL_INSN, remove the register from quantity chains and update
2027 reg_tick if defined. Also see if any of these registers is currently
2030 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2031 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2033 delete_reg_equiv (regno);
2034 if (REG_TICK (regno) >= 0)
2037 SUBREG_TICKED (regno) = -1;
2040 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2043 /* In the case where we have no call-clobbered hard registers in the
2044 table, we are done. Otherwise, scan the table and remove any
2045 entry that overlaps a call-clobbered register. */
2048 for (hash = 0; hash < HASH_SIZE; hash++)
2049 for (p = table[hash]; p; p = next)
2051 next = p->next_same_hash;
2054 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2057 regno = REGNO (p->exp);
2058 endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)];
2060 for (i = regno; i < endregno; i++)
2061 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2063 remove_from_table (p, hash);
2069 /* Given an expression X of type CONST,
2070 and ELT which is its table entry (or 0 if it
2071 is not in the hash table),
2072 return an alternate expression for X as a register plus integer.
2073 If none can be found, return 0. */
2076 use_related_value (rtx x, struct table_elt *elt)
2078 struct table_elt *relt = 0;
2079 struct table_elt *p, *q;
2080 HOST_WIDE_INT offset;
2082 /* First, is there anything related known?
2083 If we have a table element, we can tell from that.
2084 Otherwise, must look it up. */
2086 if (elt != 0 && elt->related_value != 0)
2088 else if (elt == 0 && GET_CODE (x) == CONST)
2090 rtx subexp = get_related_value (x);
2092 relt = lookup (subexp,
2093 SAFE_HASH (subexp, GET_MODE (subexp)),
2100 /* Search all related table entries for one that has an
2101 equivalent register. */
2106 /* This loop is strange in that it is executed in two different cases.
2107 The first is when X is already in the table. Then it is searching
2108 the RELATED_VALUE list of X's class (RELT). The second case is when
2109 X is not in the table. Then RELT points to a class for the related
2112 Ensure that, whatever case we are in, that we ignore classes that have
2113 the same value as X. */
2115 if (rtx_equal_p (x, p->exp))
2118 for (q = p->first_same_value; q; q = q->next_same_value)
2125 p = p->related_value;
2127 /* We went all the way around, so there is nothing to be found.
2128 Alternatively, perhaps RELT was in the table for some other reason
2129 and it has no related values recorded. */
2130 if (p == relt || p == 0)
2137 offset = (get_integer_term (x) - get_integer_term (p->exp));
2138 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2139 return plus_constant (q->exp, offset);
2142 /* Hash a string. Just add its bytes up. */
2143 static inline unsigned
2144 hash_rtx_string (const char *ps)
2147 const unsigned char *p = (const unsigned char *) ps;
2156 /* Hash an rtx. We are careful to make sure the value is never negative.
2157 Equivalent registers hash identically.
2158 MODE is used in hashing for CONST_INTs only;
2159 otherwise the mode of X is used.
2161 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2163 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2164 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2166 Note that cse_insn knows that the hash code of a MEM expression
2167 is just (int) MEM plus the hash code of the address. */
2170 hash_rtx (rtx x, enum machine_mode mode, int *do_not_record_p,
2171 int *hash_arg_in_memory_p, bool have_reg_qty)
2178 /* Used to turn recursion into iteration. We can't rely on GCC's
2179 tail-recursion elimination since we need to keep accumulating values
2185 code = GET_CODE (x);
2190 unsigned int regno = REGNO (x);
2192 if (!reload_completed)
2194 /* On some machines, we can't record any non-fixed hard register,
2195 because extending its life will cause reload problems. We
2196 consider ap, fp, sp, gp to be fixed for this purpose.
2198 We also consider CCmode registers to be fixed for this purpose;
2199 failure to do so leads to failure to simplify 0<100 type of
2202 On all machines, we can't record any global registers.
2203 Nor should we record any register that is in a small
2204 class, as defined by CLASS_LIKELY_SPILLED_P. */
2207 if (regno >= FIRST_PSEUDO_REGISTER)
2209 else if (x == frame_pointer_rtx
2210 || x == hard_frame_pointer_rtx
2211 || x == arg_pointer_rtx
2212 || x == stack_pointer_rtx
2213 || x == pic_offset_table_rtx)
2215 else if (global_regs[regno])
2217 else if (fixed_regs[regno])
2219 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2221 else if (SMALL_REGISTER_CLASSES)
2223 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2230 *do_not_record_p = 1;
2235 hash += ((unsigned int) REG << 7);
2236 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2240 /* We handle SUBREG of a REG specially because the underlying
2241 reg changes its hash value with every value change; we don't
2242 want to have to forget unrelated subregs when one subreg changes. */
2245 if (REG_P (SUBREG_REG (x)))
2247 hash += (((unsigned int) SUBREG << 7)
2248 + REGNO (SUBREG_REG (x))
2249 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2256 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2257 + (unsigned int) INTVAL (x));
2261 /* This is like the general case, except that it only counts
2262 the integers representing the constant. */
2263 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2264 if (GET_MODE (x) != VOIDmode)
2265 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2267 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2268 + (unsigned int) CONST_DOUBLE_HIGH (x));
2276 units = CONST_VECTOR_NUNITS (x);
2278 for (i = 0; i < units; ++i)
2280 elt = CONST_VECTOR_ELT (x, i);
2281 hash += hash_rtx (elt, GET_MODE (elt), do_not_record_p,
2282 hash_arg_in_memory_p, have_reg_qty);
2288 /* Assume there is only one rtx object for any given label. */
2290 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2291 differences and differences between each stage's debugging dumps. */
2292 hash += (((unsigned int) LABEL_REF << 7)
2293 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2298 /* Don't hash on the symbol's address to avoid bootstrap differences.
2299 Different hash values may cause expressions to be recorded in
2300 different orders and thus different registers to be used in the
2301 final assembler. This also avoids differences in the dump files
2302 between various stages. */
2304 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2307 h += (h << 7) + *p++; /* ??? revisit */
2309 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2314 /* We don't record if marked volatile or if BLKmode since we don't
2315 know the size of the move. */
2316 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2318 *do_not_record_p = 1;
2321 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2322 *hash_arg_in_memory_p = 1;
2324 /* Now that we have already found this special case,
2325 might as well speed it up as much as possible. */
2326 hash += (unsigned) MEM;
2331 /* A USE that mentions non-volatile memory needs special
2332 handling since the MEM may be BLKmode which normally
2333 prevents an entry from being made. Pure calls are
2334 marked by a USE which mentions BLKmode memory.
2335 See calls.c:emit_call_1. */
2336 if (MEM_P (XEXP (x, 0))
2337 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2339 hash += (unsigned) USE;
2342 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2343 *hash_arg_in_memory_p = 1;
2345 /* Now that we have already found this special case,
2346 might as well speed it up as much as possible. */
2347 hash += (unsigned) MEM;
2362 case UNSPEC_VOLATILE:
2363 *do_not_record_p = 1;
2367 if (MEM_VOLATILE_P (x))
2369 *do_not_record_p = 1;
2374 /* We don't want to take the filename and line into account. */
2375 hash += (unsigned) code + (unsigned) GET_MODE (x)
2376 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2377 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2378 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2380 if (ASM_OPERANDS_INPUT_LENGTH (x))
2382 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2384 hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2385 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2386 do_not_record_p, hash_arg_in_memory_p,
2389 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2392 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2393 x = ASM_OPERANDS_INPUT (x, 0);
2394 mode = GET_MODE (x);
2406 i = GET_RTX_LENGTH (code) - 1;
2407 hash += (unsigned) code + (unsigned) GET_MODE (x);
2408 fmt = GET_RTX_FORMAT (code);
2414 /* If we are about to do the last recursive call
2415 needed at this level, change it into iteration.
2416 This function is called enough to be worth it. */
2423 hash += hash_rtx (XEXP (x, i), 0, do_not_record_p,
2424 hash_arg_in_memory_p, have_reg_qty);
2428 for (j = 0; j < XVECLEN (x, i); j++)
2429 hash += hash_rtx (XVECEXP (x, i, j), 0, do_not_record_p,
2430 hash_arg_in_memory_p, have_reg_qty);
2434 hash += hash_rtx_string (XSTR (x, i));
2438 hash += (unsigned int) XINT (x, i);
2453 /* Hash an rtx X for cse via hash_rtx.
2454 Stores 1 in do_not_record if any subexpression is volatile.
2455 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2456 does not have the RTX_UNCHANGING_P bit set. */
2458 static inline unsigned
2459 canon_hash (rtx x, enum machine_mode mode)
2461 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2464 /* Like canon_hash but with no side effects, i.e. do_not_record
2465 and hash_arg_in_memory are not changed. */
2467 static inline unsigned
2468 safe_hash (rtx x, enum machine_mode mode)
2470 int dummy_do_not_record;
2471 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2474 /* Return 1 iff X and Y would canonicalize into the same thing,
2475 without actually constructing the canonicalization of either one.
2476 If VALIDATE is nonzero,
2477 we assume X is an expression being processed from the rtl
2478 and Y was found in the hash table. We check register refs
2479 in Y for being marked as valid.
2481 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2484 exp_equiv_p (rtx x, rtx y, int validate, bool for_gcse)
2490 /* Note: it is incorrect to assume an expression is equivalent to itself
2491 if VALIDATE is nonzero. */
2492 if (x == y && !validate)
2495 if (x == 0 || y == 0)
2498 code = GET_CODE (x);
2499 if (code != GET_CODE (y))
2502 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2503 if (GET_MODE (x) != GET_MODE (y))
2515 return XEXP (x, 0) == XEXP (y, 0);
2518 return XSTR (x, 0) == XSTR (y, 0);
2522 return REGNO (x) == REGNO (y);
2525 unsigned int regno = REGNO (y);
2527 unsigned int endregno
2528 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2529 : hard_regno_nregs[regno][GET_MODE (y)]);
2531 /* If the quantities are not the same, the expressions are not
2532 equivalent. If there are and we are not to validate, they
2533 are equivalent. Otherwise, ensure all regs are up-to-date. */
2535 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2541 for (i = regno; i < endregno; i++)
2542 if (REG_IN_TABLE (i) != REG_TICK (i))
2551 /* A volatile mem should not be considered equivalent to any
2553 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2556 /* Can't merge two expressions in different alias sets, since we
2557 can decide that the expression is transparent in a block when
2558 it isn't, due to it being set with the different alias set.
2560 Also, can't merge two expressions with different MEM_ATTRS.
2561 They could e.g. be two different entities allocated into the
2562 same space on the stack (see e.g. PR25130). In that case, the
2563 MEM addresses can be the same, even though the two MEMs are
2564 absolutely not equivalent.
2566 But because really all MEM attributes should be the same for
2567 equivalent MEMs, we just use the invariant that MEMs that have
2568 the same attributes share the same mem_attrs data structure. */
2569 if (MEM_ATTRS (x) != MEM_ATTRS (y))
2574 /* For commutative operations, check both orders. */
2582 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2584 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2585 validate, for_gcse))
2586 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2588 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2589 validate, for_gcse)));
2592 /* We don't use the generic code below because we want to
2593 disregard filename and line numbers. */
2595 /* A volatile asm isn't equivalent to any other. */
2596 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2599 if (GET_MODE (x) != GET_MODE (y)
2600 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2601 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2602 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2603 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2604 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2607 if (ASM_OPERANDS_INPUT_LENGTH (x))
2609 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2610 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2611 ASM_OPERANDS_INPUT (y, i),
2613 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2614 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2624 /* Compare the elements. If any pair of corresponding elements
2625 fail to match, return 0 for the whole thing. */
2627 fmt = GET_RTX_FORMAT (code);
2628 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2633 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2634 validate, for_gcse))
2639 if (XVECLEN (x, i) != XVECLEN (y, i))
2641 for (j = 0; j < XVECLEN (x, i); j++)
2642 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2643 validate, for_gcse))
2648 if (strcmp (XSTR (x, i), XSTR (y, i)))
2653 if (XINT (x, i) != XINT (y, i))
2658 if (XWINT (x, i) != XWINT (y, i))
2674 /* Return 1 if X has a value that can vary even between two
2675 executions of the program. 0 means X can be compared reliably
2676 against certain constants or near-constants. */
2679 cse_rtx_varies_p (rtx x, int from_alias)
2681 /* We need not check for X and the equivalence class being of the same
2682 mode because if X is equivalent to a constant in some mode, it
2683 doesn't vary in any mode. */
2686 && REGNO_QTY_VALID_P (REGNO (x)))
2688 int x_q = REG_QTY (REGNO (x));
2689 struct qty_table_elem *x_ent = &qty_table[x_q];
2691 if (GET_MODE (x) == x_ent->mode
2692 && x_ent->const_rtx != NULL_RTX)
2696 if (GET_CODE (x) == PLUS
2697 && GET_CODE (XEXP (x, 1)) == CONST_INT
2698 && REG_P (XEXP (x, 0))
2699 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2701 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2702 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2704 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2705 && x0_ent->const_rtx != NULL_RTX)
2709 /* This can happen as the result of virtual register instantiation, if
2710 the initial constant is too large to be a valid address. This gives
2711 us a three instruction sequence, load large offset into a register,
2712 load fp minus a constant into a register, then a MEM which is the
2713 sum of the two `constant' registers. */
2714 if (GET_CODE (x) == PLUS
2715 && REG_P (XEXP (x, 0))
2716 && REG_P (XEXP (x, 1))
2717 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2718 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2720 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2721 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2722 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2723 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2725 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2726 && x0_ent->const_rtx != NULL_RTX
2727 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2728 && x1_ent->const_rtx != NULL_RTX)
2732 return rtx_varies_p (x, from_alias);
2735 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2736 the result if necessary. INSN is as for canon_reg. */
2739 validate_canon_reg (rtx *xloc, rtx insn)
2741 rtx new = canon_reg (*xloc, insn);
2744 /* If replacing pseudo with hard reg or vice versa, ensure the
2745 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2746 if (insn != 0 && new != 0
2747 && REG_P (new) && REG_P (*xloc)
2748 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2749 != (REGNO (*xloc) < FIRST_PSEUDO_REGISTER))
2750 || GET_MODE (new) != GET_MODE (*xloc)
2751 || (insn_code = recog_memoized (insn)) < 0
2752 || insn_data[insn_code].n_dups > 0))
2753 validate_change (insn, xloc, new, 1);
2758 /* Canonicalize an expression:
2759 replace each register reference inside it
2760 with the "oldest" equivalent register.
2762 If INSN is nonzero and we are replacing a pseudo with a hard register
2763 or vice versa, validate_change is used to ensure that INSN remains valid
2764 after we make our substitution. The calls are made with IN_GROUP nonzero
2765 so apply_change_group must be called upon the outermost return from this
2766 function (unless INSN is zero). The result of apply_change_group can
2767 generally be discarded since the changes we are making are optional. */
2770 canon_reg (rtx x, rtx insn)
2779 code = GET_CODE (x);
2798 struct qty_table_elem *ent;
2800 /* Never replace a hard reg, because hard regs can appear
2801 in more than one machine mode, and we must preserve the mode
2802 of each occurrence. Also, some hard regs appear in
2803 MEMs that are shared and mustn't be altered. Don't try to
2804 replace any reg that maps to a reg of class NO_REGS. */
2805 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2806 || ! REGNO_QTY_VALID_P (REGNO (x)))
2809 q = REG_QTY (REGNO (x));
2810 ent = &qty_table[q];
2811 first = ent->first_reg;
2812 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2813 : REGNO_REG_CLASS (first) == NO_REGS ? x
2814 : gen_rtx_REG (ent->mode, first));
2821 fmt = GET_RTX_FORMAT (code);
2822 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2827 validate_canon_reg (&XEXP (x, i), insn);
2828 else if (fmt[i] == 'E')
2829 for (j = 0; j < XVECLEN (x, i); j++)
2830 validate_canon_reg (&XVECEXP (x, i, j), insn);
2836 /* LOC is a location within INSN that is an operand address (the contents of
2837 a MEM). Find the best equivalent address to use that is valid for this
2840 On most CISC machines, complicated address modes are costly, and rtx_cost
2841 is a good approximation for that cost. However, most RISC machines have
2842 only a few (usually only one) memory reference formats. If an address is
2843 valid at all, it is often just as cheap as any other address. Hence, for
2844 RISC machines, we use `address_cost' to compare the costs of various
2845 addresses. For two addresses of equal cost, choose the one with the
2846 highest `rtx_cost' value as that has the potential of eliminating the
2847 most insns. For equal costs, we choose the first in the equivalence
2848 class. Note that we ignore the fact that pseudo registers are cheaper than
2849 hard registers here because we would also prefer the pseudo registers. */
2852 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2854 struct table_elt *elt;
2856 struct table_elt *p;
2857 int found_better = 1;
2858 int save_do_not_record = do_not_record;
2859 int save_hash_arg_in_memory = hash_arg_in_memory;
2864 /* Do not try to replace constant addresses or addresses of local and
2865 argument slots. These MEM expressions are made only once and inserted
2866 in many instructions, as well as being used to control symbol table
2867 output. It is not safe to clobber them.
2869 There are some uncommon cases where the address is already in a register
2870 for some reason, but we cannot take advantage of that because we have
2871 no easy way to unshare the MEM. In addition, looking up all stack
2872 addresses is costly. */
2873 if ((GET_CODE (addr) == PLUS
2874 && REG_P (XEXP (addr, 0))
2875 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2876 && (regno = REGNO (XEXP (addr, 0)),
2877 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2878 || regno == ARG_POINTER_REGNUM))
2880 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2881 || regno == HARD_FRAME_POINTER_REGNUM
2882 || regno == ARG_POINTER_REGNUM))
2883 || CONSTANT_ADDRESS_P (addr))
2886 /* If this address is not simply a register, try to fold it. This will
2887 sometimes simplify the expression. Many simplifications
2888 will not be valid, but some, usually applying the associative rule, will
2889 be valid and produce better code. */
2892 rtx folded = canon_for_address (fold_rtx (addr, NULL_RTX));
2896 int addr_folded_cost = address_cost (folded, mode);
2897 int addr_cost = address_cost (addr, mode);
2899 if ((addr_folded_cost < addr_cost
2900 || (addr_folded_cost == addr_cost
2901 /* ??? The rtx_cost comparison is left over from an older
2902 version of this code. It is probably no longer helpful.*/
2903 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2904 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2905 && validate_change (insn, loc, folded, 0))
2910 /* If this address is not in the hash table, we can't look for equivalences
2911 of the whole address. Also, ignore if volatile. */
2914 hash = HASH (addr, Pmode);
2915 addr_volatile = do_not_record;
2916 do_not_record = save_do_not_record;
2917 hash_arg_in_memory = save_hash_arg_in_memory;
2922 elt = lookup (addr, hash, Pmode);
2926 /* We need to find the best (under the criteria documented above) entry
2927 in the class that is valid. We use the `flag' field to indicate
2928 choices that were invalid and iterate until we can't find a better
2929 one that hasn't already been tried. */
2931 for (p = elt->first_same_value; p; p = p->next_same_value)
2934 while (found_better)
2936 int best_addr_cost = address_cost (*loc, mode);
2937 int best_rtx_cost = (elt->cost + 1) >> 1;
2939 struct table_elt *best_elt = elt;
2942 for (p = elt->first_same_value; p; p = p->next_same_value)
2946 || exp_equiv_p (p->exp, p->exp, 1, false))
2947 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2948 || (exp_cost == best_addr_cost
2949 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2952 best_addr_cost = exp_cost;
2953 best_rtx_cost = (p->cost + 1) >> 1;
2960 if (validate_change (insn, loc,
2961 canon_reg (copy_rtx (best_elt->exp),
2970 /* If the address is a binary operation with the first operand a register
2971 and the second a constant, do the same as above, but looking for
2972 equivalences of the register. Then try to simplify before checking for
2973 the best address to use. This catches a few cases: First is when we
2974 have REG+const and the register is another REG+const. We can often merge
2975 the constants and eliminate one insn and one register. It may also be
2976 that a machine has a cheap REG+REG+const. Finally, this improves the
2977 code on the Alpha for unaligned byte stores. */
2979 if (flag_expensive_optimizations
2980 && ARITHMETIC_P (*loc)
2981 && REG_P (XEXP (*loc, 0)))
2983 rtx op1 = XEXP (*loc, 1);
2986 hash = HASH (XEXP (*loc, 0), Pmode);
2987 do_not_record = save_do_not_record;
2988 hash_arg_in_memory = save_hash_arg_in_memory;
2990 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2994 /* We need to find the best (under the criteria documented above) entry
2995 in the class that is valid. We use the `flag' field to indicate
2996 choices that were invalid and iterate until we can't find a better
2997 one that hasn't already been tried. */
2999 for (p = elt->first_same_value; p; p = p->next_same_value)
3002 while (found_better)
3004 int best_addr_cost = address_cost (*loc, mode);
3005 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3006 struct table_elt *best_elt = elt;
3007 rtx best_rtx = *loc;
3010 /* This is at worst case an O(n^2) algorithm, so limit our search
3011 to the first 32 elements on the list. This avoids trouble
3012 compiling code with very long basic blocks that can easily
3013 call simplify_gen_binary so many times that we run out of
3017 for (p = elt->first_same_value, count = 0;
3019 p = p->next_same_value, count++)
3022 || (GET_CODE (p->exp) != EXPR_LIST
3023 && exp_equiv_p (p->exp, p->exp, 1, false))))
3026 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3030 /* Get the canonical version of the address so we can accept
3032 new = canon_for_address (new);
3034 new_cost = address_cost (new, mode);
3036 if (new_cost < best_addr_cost
3037 || (new_cost == best_addr_cost
3038 && (COST (new) + 1) >> 1 > best_rtx_cost))
3041 best_addr_cost = new_cost;
3042 best_rtx_cost = (COST (new) + 1) >> 1;
3050 if (validate_change (insn, loc,
3051 canon_reg (copy_rtx (best_rtx),
3061 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3062 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3063 what values are being compared.
3065 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3066 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3067 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3068 compared to produce cc0.
3070 The return value is the comparison operator and is either the code of
3071 A or the code corresponding to the inverse of the comparison. */
3073 static enum rtx_code
3074 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
3075 enum machine_mode *pmode1, enum machine_mode *pmode2)
3079 arg1 = *parg1, arg2 = *parg2;
3081 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3083 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3085 /* Set nonzero when we find something of interest. */
3087 int reverse_code = 0;
3088 struct table_elt *p = 0;
3090 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3091 On machines with CC0, this is the only case that can occur, since
3092 fold_rtx will return the COMPARE or item being compared with zero
3095 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3098 /* If ARG1 is a comparison operator and CODE is testing for
3099 STORE_FLAG_VALUE, get the inner arguments. */
3101 else if (COMPARISON_P (arg1))
3103 #ifdef FLOAT_STORE_FLAG_VALUE
3104 REAL_VALUE_TYPE fsfv;
3108 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3109 && code == LT && STORE_FLAG_VALUE == -1)
3110 #ifdef FLOAT_STORE_FLAG_VALUE
3111 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3112 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3113 REAL_VALUE_NEGATIVE (fsfv)))
3118 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3119 && code == GE && STORE_FLAG_VALUE == -1)
3120 #ifdef FLOAT_STORE_FLAG_VALUE
3121 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3122 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3123 REAL_VALUE_NEGATIVE (fsfv)))
3126 x = arg1, reverse_code = 1;
3129 /* ??? We could also check for
3131 (ne (and (eq (...) (const_int 1))) (const_int 0))
3133 and related forms, but let's wait until we see them occurring. */
3136 /* Look up ARG1 in the hash table and see if it has an equivalence
3137 that lets us see what is being compared. */
3138 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
3141 p = p->first_same_value;
3143 /* If what we compare is already known to be constant, that is as
3145 We need to break the loop in this case, because otherwise we
3146 can have an infinite loop when looking at a reg that is known
3147 to be a constant which is the same as a comparison of a reg
3148 against zero which appears later in the insn stream, which in
3149 turn is constant and the same as the comparison of the first reg
3155 for (; p; p = p->next_same_value)
3157 enum machine_mode inner_mode = GET_MODE (p->exp);
3158 #ifdef FLOAT_STORE_FLAG_VALUE
3159 REAL_VALUE_TYPE fsfv;
3162 /* If the entry isn't valid, skip it. */
3163 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3166 if (GET_CODE (p->exp) == COMPARE
3167 /* Another possibility is that this machine has a compare insn
3168 that includes the comparison code. In that case, ARG1 would
3169 be equivalent to a comparison operation that would set ARG1 to
3170 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3171 ORIG_CODE is the actual comparison being done; if it is an EQ,
3172 we must reverse ORIG_CODE. On machine with a negative value
3173 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3176 && GET_MODE_CLASS (inner_mode) == MODE_INT
3177 && (GET_MODE_BITSIZE (inner_mode)
3178 <= HOST_BITS_PER_WIDE_INT)
3179 && (STORE_FLAG_VALUE
3180 & ((HOST_WIDE_INT) 1
3181 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3182 #ifdef FLOAT_STORE_FLAG_VALUE
3184 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3185 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3186 REAL_VALUE_NEGATIVE (fsfv)))
3189 && COMPARISON_P (p->exp)))
3194 else if ((code == EQ
3196 && GET_MODE_CLASS (inner_mode) == MODE_INT
3197 && (GET_MODE_BITSIZE (inner_mode)
3198 <= HOST_BITS_PER_WIDE_INT)
3199 && (STORE_FLAG_VALUE
3200 & ((HOST_WIDE_INT) 1
3201 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3202 #ifdef FLOAT_STORE_FLAG_VALUE
3204 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3205 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3206 REAL_VALUE_NEGATIVE (fsfv)))
3209 && COMPARISON_P (p->exp))
3216 /* If this non-trapping address, e.g. fp + constant, the
3217 equivalent is a better operand since it may let us predict
3218 the value of the comparison. */
3219 else if (!rtx_addr_can_trap_p (p->exp))
3226 /* If we didn't find a useful equivalence for ARG1, we are done.
3227 Otherwise, set up for the next iteration. */
3231 /* If we need to reverse the comparison, make sure that that is
3232 possible -- we can't necessarily infer the value of GE from LT
3233 with floating-point operands. */
3236 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3237 if (reversed == UNKNOWN)
3242 else if (COMPARISON_P (x))
3243 code = GET_CODE (x);
3244 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3247 /* Return our results. Return the modes from before fold_rtx
3248 because fold_rtx might produce const_int, and then it's too late. */
3249 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3250 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3258 fold_rtx_subreg (rtx x, rtx insn)
3260 enum machine_mode mode = GET_MODE (x);
3265 /* See if we previously assigned a constant value to this SUBREG. */
3266 if ((new = lookup_as_function (x, CONST_INT)) != 0
3267 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3270 /* If this is a paradoxical SUBREG, we have no idea what value the
3271 extra bits would have. However, if the operand is equivalent to
3272 a SUBREG whose operand is the same as our mode, and all the modes
3273 are within a word, we can just use the inner operand because
3274 these SUBREGs just say how to treat the register.
3276 Similarly if we find an integer constant. */
3278 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3280 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3281 struct table_elt *elt;
3283 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3284 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3285 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3287 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3289 if (CONSTANT_P (elt->exp)
3290 && GET_MODE (elt->exp) == VOIDmode)
3293 if (GET_CODE (elt->exp) == SUBREG
3294 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3295 && exp_equiv_p (elt->exp, elt->exp, 1, false))
3296 return copy_rtx (SUBREG_REG (elt->exp));
3302 /* Fold SUBREG_REG. If it changed, see if we can simplify the
3303 SUBREG. We might be able to if the SUBREG is extracting a single
3304 word in an integral mode or extracting the low part. */
3306 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3307 const_arg0 = equiv_constant (folded_arg0);
3309 folded_arg0 = const_arg0;
3311 if (folded_arg0 != SUBREG_REG (x))
3313 new = simplify_subreg (mode, folded_arg0,
3314 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3319 if (REG_P (folded_arg0)
3320 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)))
3322 struct table_elt *elt;
3324 elt = lookup (folded_arg0,
3325 HASH (folded_arg0, GET_MODE (folded_arg0)),
3326 GET_MODE (folded_arg0));
3329 elt = elt->first_same_value;
3331 if (subreg_lowpart_p (x))
3332 /* If this is a narrowing SUBREG and our operand is a REG, see
3333 if we can find an equivalence for REG that is an arithmetic
3334 operation in a wider mode where both operands are
3335 paradoxical SUBREGs from objects of our result mode. In
3336 that case, we couldn-t report an equivalent value for that
3337 operation, since we don't know what the extra bits will be.
3338 But we can find an equivalence for this SUBREG by folding
3339 that operation in the narrow mode. This allows us to fold
3340 arithmetic in narrow modes when the machine only supports
3341 word-sized arithmetic.
3343 Also look for a case where we have a SUBREG whose operand
3344 is the same as our result. If both modes are smaller than
3345 a word, we are simply interpreting a register in different
3346 modes and we can use the inner value. */
3348 for (; elt; elt = elt->next_same_value)
3350 enum rtx_code eltcode = GET_CODE (elt->exp);
3352 /* Just check for unary and binary operations. */
3353 if (UNARY_P (elt->exp)
3354 && eltcode != SIGN_EXTEND
3355 && eltcode != ZERO_EXTEND
3356 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3357 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3358 && (GET_MODE_CLASS (mode)
3359 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3361 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3363 if (!REG_P (op0) && ! CONSTANT_P (op0))
3364 op0 = fold_rtx (op0, NULL_RTX);
3366 op0 = equiv_constant (op0);
3368 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3371 else if (ARITHMETIC_P (elt->exp)
3372 && eltcode != DIV && eltcode != MOD
3373 && eltcode != UDIV && eltcode != UMOD
3374 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3375 && eltcode != ROTATE && eltcode != ROTATERT
3376 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3377 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3379 || CONSTANT_P (XEXP (elt->exp, 0)))
3380 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3381 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3383 || CONSTANT_P (XEXP (elt->exp, 1))))
3385 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3386 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3388 if (op0 && !REG_P (op0) && ! CONSTANT_P (op0))
3389 op0 = fold_rtx (op0, NULL_RTX);
3392 op0 = equiv_constant (op0);
3394 if (op1 && !REG_P (op1) && ! CONSTANT_P (op1))
3395 op1 = fold_rtx (op1, NULL_RTX);
3398 op1 = equiv_constant (op1);
3400 /* If we are looking for the low SImode part of
3401 (ashift:DI c (const_int 32)), it doesn't work to
3402 compute that in SImode, because a 32-bit shift in
3403 SImode is unpredictable. We know the value is
3406 && GET_CODE (elt->exp) == ASHIFT
3407 && GET_CODE (op1) == CONST_INT
3408 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3411 < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3412 /* If the count fits in the inner mode's width,
3413 but exceeds the outer mode's width, the value
3414 will get truncated to 0 by the subreg. */
3415 new = CONST0_RTX (mode);
3417 /* If the count exceeds even the inner mode's width,
3418 don't fold this expression. */
3421 else if (op0 && op1)
3422 new = simplify_binary_operation (GET_CODE (elt->exp),
3426 else if (GET_CODE (elt->exp) == SUBREG
3427 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3428 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3430 && exp_equiv_p (elt->exp, elt->exp, 1, false))
3431 new = copy_rtx (SUBREG_REG (elt->exp));
3437 /* A SUBREG resulting from a zero extension may fold to zero
3438 if it extracts higher bits than the ZERO_EXTEND's source
3439 bits. FIXME: if combine tried to, er, combine these
3440 instructions, this transformation may be moved to
3442 for (; elt; elt = elt->next_same_value)
3444 if (GET_CODE (elt->exp) == ZERO_EXTEND
3446 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt->exp, 0))))
3447 return CONST0_RTX (mode);
3454 /* Fold MEM. Not to be called directly, see fold_rtx_mem instead. */
3457 fold_rtx_mem_1 (rtx x, rtx insn)
3459 enum machine_mode mode = GET_MODE (x);
3462 /* If we are not actually processing an insn, don't try to find the
3463 best address. Not only don't we care, but we could modify the
3464 MEM in an invalid way since we have no insn to validate
3467 find_best_addr (insn, &XEXP (x, 0), mode);
3470 /* Even if we don't fold in the insn itself, we can safely do so
3471 here, in hopes of getting a constant. */
3472 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3474 HOST_WIDE_INT offset = 0;
3477 && REGNO_QTY_VALID_P (REGNO (addr)))
3479 int addr_q = REG_QTY (REGNO (addr));
3480 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3482 if (GET_MODE (addr) == addr_ent->mode
3483 && addr_ent->const_rtx != NULL_RTX)
3484 addr = addr_ent->const_rtx;
3487 /* Call target hook to avoid the effects of -fpic etc.... */
3488 addr = targetm.delegitimize_address (addr);
3490 /* If address is constant, split it into a base and integer
3492 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3494 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3495 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3497 base = XEXP (XEXP (addr, 0), 0);
3498 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3500 else if (GET_CODE (addr) == LO_SUM
3501 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3502 base = XEXP (addr, 1);
3504 /* If this is a constant pool reference, we can fold it into its
3505 constant to allow better value tracking. */
3506 if (base && GET_CODE (base) == SYMBOL_REF
3507 && CONSTANT_POOL_ADDRESS_P (base))
3509 rtx constant = get_pool_constant (base);
3510 enum machine_mode const_mode = get_pool_mode (base);
3513 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3515 constant_pool_entries_cost = COST (constant);
3516 constant_pool_entries_regcost = approx_reg_cost (constant);
3519 /* If we are loading the full constant, we have an
3521 if (offset == 0 && mode == const_mode)
3524 /* If this actually isn't a constant (weird!), we can't do
3525 anything. Otherwise, handle the two most common cases:
3526 extracting a word from a multi-word constant, and
3527 extracting the low-order bits. Other cases don't seem
3528 common enough to worry about. */
3529 if (! CONSTANT_P (constant))
3532 if (GET_MODE_CLASS (mode) == MODE_INT
3533 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3534 && offset % UNITS_PER_WORD == 0
3535 && (new = operand_subword (constant,
3536 offset / UNITS_PER_WORD,
3537 0, const_mode)) != 0)
3540 if (((BYTES_BIG_ENDIAN
3541 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3542 || (! BYTES_BIG_ENDIAN && offset == 0))
3543 && (new = gen_lowpart (mode, constant)) != 0)
3547 /* If this is a reference to a label at a known position in a jump
3548 table, we also know its value. */
3549 if (base && GET_CODE (base) == LABEL_REF)
3551 rtx label = XEXP (base, 0);
3552 rtx table_insn = NEXT_INSN (label);
3554 if (table_insn && JUMP_P (table_insn)
3555 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3557 rtx table = PATTERN (table_insn);
3560 && (offset / GET_MODE_SIZE (GET_MODE (table))
3561 < XVECLEN (table, 0)))
3564 (table, 0, offset / GET_MODE_SIZE (GET_MODE (table)));
3567 /* If we have an insn that loads the label from the
3568 jumptable into a reg, we don't want to set the reg
3569 to the label, because this may cause a reference to
3570 the label to remain after the label is removed in
3571 some very obscure cases (PR middle-end/18628). */
3575 set = single_set (insn);
3577 if (! set || SET_SRC (set) != x)
3580 /* If it's a jump, it's safe to reference the label. */
3581 if (SET_DEST (set) == pc_rtx)
3587 if (table_insn && JUMP_P (table_insn)
3588 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3590 rtx table = PATTERN (table_insn);
3593 && (offset / GET_MODE_SIZE (GET_MODE (table))
3594 < XVECLEN (table, 1)))
3596 offset /= GET_MODE_SIZE (GET_MODE (table));
3597 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3600 if (GET_MODE (table) != Pmode)
3601 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3603 /* Indicate this is a constant. This isn't a valid
3604 form of CONST, but it will only be used to fold the
3605 next insns and then discarded, so it should be
3608 Note this expression must be explicitly discarded,
3609 by cse_insn, else it may end up in a REG_EQUAL note
3610 and "escape" to cause problems elsewhere. */
3611 return gen_rtx_CONST (GET_MODE (new), new);
3623 fold_rtx_mem (rtx x, rtx insn)
3625 /* To avoid infinite oscillations between fold_rtx and fold_rtx_mem,
3626 refuse to allow recursion of the latter past n levels. This can
3627 happen because fold_rtx_mem will try to fold the address of the
3628 memory reference it is passed, i.e. conceptually throwing away
3629 the MEM and reinjecting the bare address into fold_rtx. As a
3630 result, patterns like
3634 (mem (plus (reg2) (const_int))))
3638 (mem (plus (reg1) (const_int))))
3640 will defeat any "first-order" short-circuit put in either
3641 function to prevent these infinite oscillations.
3643 The heuristics for determining n is as follows: since each time
3644 it is invoked fold_rtx_mem throws away a MEM, and since MEMs
3645 are generically not nested, we assume that each invocation of
3646 fold_rtx_mem corresponds to a new "top-level" operand, i.e.
3647 the source or the destination of a SET. So fold_rtx_mem is
3648 bound to stop or cycle before n recursions, n being the number
3649 of expressions recorded in the hash table. We also leave some
3650 play to account for the initial steps. */
3652 static unsigned int depth;
3655 if (depth > 3 + table_size)
3659 ret = fold_rtx_mem_1 (x, insn);
3665 /* If X is a nontrivial arithmetic operation on an argument
3666 for which a constant value can be determined, return
3667 the result of operating on that value, as a constant.
3668 Otherwise, return X, possibly with one or more operands
3669 modified by recursive calls to this function.
3671 If X is a register whose contents are known, we do NOT
3672 return those contents here. equiv_constant is called to
3675 INSN is the insn that we may be modifying. If it is 0, make a copy
3676 of X before modifying it. */
3679 fold_rtx (rtx x, rtx insn)
3682 enum machine_mode mode;
3689 /* Folded equivalents of first two operands of X. */
3693 /* Constant equivalents of first three operands of X;
3694 0 when no such equivalent is known. */
3699 /* The mode of the first operand of X. We need this for sign and zero
3701 enum machine_mode mode_arg0;
3706 mode = GET_MODE (x);
3707 code = GET_CODE (x);
3718 /* No use simplifying an EXPR_LIST
3719 since they are used only for lists of args
3720 in a function call's REG_EQUAL note. */
3726 return prev_insn_cc0;
3730 return fold_rtx_subreg (x, insn);
3734 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3735 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3736 new = lookup_as_function (XEXP (x, 0), code);
3738 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3742 return fold_rtx_mem (x, insn);
3744 #ifdef NO_FUNCTION_CSE
3746 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3754 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3755 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3756 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3767 mode_arg0 = VOIDmode;
3769 /* Try folding our operands.
3770 Then see which ones have constant values known. */
3772 fmt = GET_RTX_FORMAT (code);
3773 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3776 rtx arg = XEXP (x, i);
3777 rtx folded_arg = arg, const_arg = 0;
3778 enum machine_mode mode_arg = GET_MODE (arg);
3779 rtx cheap_arg, expensive_arg;
3780 rtx replacements[2];
3782 int old_cost = COST_IN (XEXP (x, i), code);
3784 /* Most arguments are cheap, so handle them specially. */
3785 switch (GET_CODE (arg))
3788 /* This is the same as calling equiv_constant; it is duplicated
3790 if (REGNO_QTY_VALID_P (REGNO (arg)))
3792 int arg_q = REG_QTY (REGNO (arg));
3793 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3795 if (arg_ent->const_rtx != NULL_RTX
3796 && !REG_P (arg_ent->const_rtx)
3797 && GET_CODE (arg_ent->const_rtx) != PLUS)
3799 = gen_lowpart (GET_MODE (arg),
3800 arg_ent->const_rtx);
3815 folded_arg = prev_insn_cc0;
3816 mode_arg = prev_insn_cc0_mode;
3817 const_arg = equiv_constant (folded_arg);
3822 folded_arg = fold_rtx (arg, insn);
3823 const_arg = equiv_constant (folded_arg);
3826 /* For the first three operands, see if the operand
3827 is constant or equivalent to a constant. */
3831 folded_arg0 = folded_arg;
3832 const_arg0 = const_arg;
3833 mode_arg0 = mode_arg;
3836 folded_arg1 = folded_arg;
3837 const_arg1 = const_arg;
3840 const_arg2 = const_arg;
3844 /* Pick the least expensive of the folded argument and an
3845 equivalent constant argument. */
3846 if (const_arg == 0 || const_arg == folded_arg
3847 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3848 cheap_arg = folded_arg, expensive_arg = const_arg;
3850 cheap_arg = const_arg, expensive_arg = folded_arg;
3852 /* Try to replace the operand with the cheapest of the two
3853 possibilities. If it doesn't work and this is either of the first
3854 two operands of a commutative operation, try swapping them.
3855 If THAT fails, try the more expensive, provided it is cheaper
3856 than what is already there. */
3858 if (cheap_arg == XEXP (x, i))
3861 if (insn == 0 && ! copied)
3867 /* Order the replacements from cheapest to most expensive. */
3868 replacements[0] = cheap_arg;
3869 replacements[1] = expensive_arg;
3871 for (j = 0; j < 2 && replacements[j]; j++)
3873 int new_cost = COST_IN (replacements[j], code);
3875 /* Stop if what existed before was cheaper. Prefer constants
3876 in the case of a tie. */
3877 if (new_cost > old_cost
3878 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3881 /* It's not safe to substitute the operand of a conversion
3882 operator with a constant, as the conversion's identity
3883 depends upon the mode of its operand. This optimization
3884 is handled by the call to simplify_unary_operation. */
3885 if (GET_RTX_CLASS (code) == RTX_UNARY
3886 && GET_MODE (replacements[j]) != mode_arg0
3887 && (code == ZERO_EXTEND
3888 || code == SIGN_EXTEND
3890 || code == FLOAT_TRUNCATE
3891 || code == FLOAT_EXTEND
3894 || code == UNSIGNED_FLOAT
3895 || code == UNSIGNED_FIX))
3898 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3901 if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE
3902 || GET_RTX_CLASS (code) == RTX_COMM_ARITH)
3904 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3905 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3907 if (apply_change_group ())
3909 /* Swap them back to be invalid so that this loop can
3910 continue and flag them to be swapped back later. */
3913 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3925 /* Don't try to fold inside of a vector of expressions.
3926 Doing nothing is harmless. */
3930 /* If a commutative operation, place a constant integer as the second
3931 operand unless the first operand is also a constant integer. Otherwise,
3932 place any constant second unless the first operand is also a constant. */
3934 if (COMMUTATIVE_P (x))
3937 || swap_commutative_operands_p (const_arg0 ? const_arg0
3939 const_arg1 ? const_arg1
3942 rtx tem = XEXP (x, 0);
3944 if (insn == 0 && ! copied)
3950 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3951 validate_change (insn, &XEXP (x, 1), tem, 1);
3952 if (apply_change_group ())
3954 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3955 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3960 /* If X is an arithmetic operation, see if we can simplify it. */
3962 switch (GET_RTX_CLASS (code))
3968 /* We can't simplify extension ops unless we know the
3970 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3971 && mode_arg0 == VOIDmode)
3974 /* If we had a CONST, strip it off and put it back later if we
3976 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3977 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3979 new = simplify_unary_operation (code, mode,
3980 const_arg0 ? const_arg0 : folded_arg0,
3982 /* NEG of PLUS could be converted into MINUS, but that causes
3983 expressions of the form
3984 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3985 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3986 FIXME: those ports should be fixed. */
3987 if (new != 0 && is_const
3988 && GET_CODE (new) == PLUS
3989 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3990 || GET_CODE (XEXP (new, 0)) == LABEL_REF)
3991 && GET_CODE (XEXP (new, 1)) == CONST_INT)
3992 new = gen_rtx_CONST (mode, new);
3997 case RTX_COMM_COMPARE:
3998 /* See what items are actually being compared and set FOLDED_ARG[01]
3999 to those values and CODE to the actual comparison code. If any are
4000 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
4001 do anything if both operands are already known to be constant. */
4003 /* ??? Vector mode comparisons are not supported yet. */
4004 if (VECTOR_MODE_P (mode))
4007 if (const_arg0 == 0 || const_arg1 == 0)
4009 struct table_elt *p0, *p1;
4010 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
4011 enum machine_mode mode_arg1;
4013 #ifdef FLOAT_STORE_FLAG_VALUE
4014 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4016 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
4017 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4018 false_rtx = CONST0_RTX (mode);
4022 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
4023 &mode_arg0, &mode_arg1);
4025 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
4026 what kinds of things are being compared, so we can't do
4027 anything with this comparison. */
4029 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
4032 const_arg0 = equiv_constant (folded_arg0);
4033 const_arg1 = equiv_constant (folded_arg1);
4035 /* If we do not now have two constants being compared, see
4036 if we can nevertheless deduce some things about the
4038 if (const_arg0 == 0 || const_arg1 == 0)
4040 /* Some addresses are known to be nonzero. We don't know
4041 their sign, but equality comparisons are known. */
4042 if (const_arg1 == const0_rtx
4043 && nonzero_address_p (folded_arg0))
4047 else if (code == NE)
4051 /* See if the two operands are the same. */
4053 if (folded_arg0 == folded_arg1
4054 || (REG_P (folded_arg0)
4055 && REG_P (folded_arg1)
4056 && (REG_QTY (REGNO (folded_arg0))
4057 == REG_QTY (REGNO (folded_arg1))))
4058 || ((p0 = lookup (folded_arg0,
4059 SAFE_HASH (folded_arg0, mode_arg0),
4061 && (p1 = lookup (folded_arg1,
4062 SAFE_HASH (folded_arg1, mode_arg0),
4064 && p0->first_same_value == p1->first_same_value))
4066 /* Sadly two equal NaNs are not equivalent. */
4067 if (!HONOR_NANS (mode_arg0))
4068 return ((code == EQ || code == LE || code == GE
4069 || code == LEU || code == GEU || code == UNEQ
4070 || code == UNLE || code == UNGE
4072 ? true_rtx : false_rtx);
4073 /* Take care for the FP compares we can resolve. */
4074 if (code == UNEQ || code == UNLE || code == UNGE)
4076 if (code == LTGT || code == LT || code == GT)
4080 /* If FOLDED_ARG0 is a register, see if the comparison we are
4081 doing now is either the same as we did before or the reverse
4082 (we only check the reverse if not floating-point). */
4083 else if (REG_P (folded_arg0))
4085 int qty = REG_QTY (REGNO (folded_arg0));
4087 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
4089 struct qty_table_elem *ent = &qty_table[qty];
4091 if ((comparison_dominates_p (ent->comparison_code, code)
4092 || (! FLOAT_MODE_P (mode_arg0)
4093 && comparison_dominates_p (ent->comparison_code,
4094 reverse_condition (code))))
4095 && (rtx_equal_p (ent->comparison_const, folded_arg1)
4097 && rtx_equal_p (ent->comparison_const,
4099 || (REG_P (folded_arg1)
4100 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
4101 return (comparison_dominates_p (ent->comparison_code, code)
4102 ? true_rtx : false_rtx);
4108 /* If we are comparing against zero, see if the first operand is
4109 equivalent to an IOR with a constant. If so, we may be able to
4110 determine the result of this comparison. */
4112 if (const_arg1 == const0_rtx)
4114 rtx y = lookup_as_function (folded_arg0, IOR);
4118 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4119 && GET_CODE (inner_const) == CONST_INT
4120 && INTVAL (inner_const) != 0)
4122 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4123 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4124 && (INTVAL (inner_const)
4125 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4126 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
4128 #ifdef FLOAT_STORE_FLAG_VALUE
4129 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4131 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
4132 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4133 false_rtx = CONST0_RTX (mode);
4158 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
4159 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
4160 new = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
4165 case RTX_COMM_ARITH:
4169 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4170 with that LABEL_REF as its second operand. If so, the result is
4171 the first operand of that MINUS. This handles switches with an
4172 ADDR_DIFF_VEC table. */
4173 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4176 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4177 : lookup_as_function (folded_arg0, MINUS);
4179 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4180 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4183 /* Now try for a CONST of a MINUS like the above. */
4184 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4185 : lookup_as_function (folded_arg0, CONST))) != 0
4186 && GET_CODE (XEXP (y, 0)) == MINUS
4187 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4188 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4189 return XEXP (XEXP (y, 0), 0);
4192 /* Likewise if the operands are in the other order. */
4193 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4196 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4197 : lookup_as_function (folded_arg1, MINUS);
4199 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4200 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4203 /* Now try for a CONST of a MINUS like the above. */
4204 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4205 : lookup_as_function (folded_arg1, CONST))) != 0
4206 && GET_CODE (XEXP (y, 0)) == MINUS
4207 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4208 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4209 return XEXP (XEXP (y, 0), 0);
4212 /* If second operand is a register equivalent to a negative
4213 CONST_INT, see if we can find a register equivalent to the
4214 positive constant. Make a MINUS if so. Don't do this for
4215 a non-negative constant since we might then alternate between
4216 choosing positive and negative constants. Having the positive
4217 constant previously-used is the more common case. Be sure
4218 the resulting constant is non-negative; if const_arg1 were
4219 the smallest negative number this would overflow: depending
4220 on the mode, this would either just be the same value (and
4221 hence not save anything) or be incorrect. */
4222 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4223 && INTVAL (const_arg1) < 0
4224 /* This used to test
4226 -INTVAL (const_arg1) >= 0
4228 But The Sun V5.0 compilers mis-compiled that test. So
4229 instead we test for the problematic value in a more direct
4230 manner and hope the Sun compilers get it correct. */
4231 && INTVAL (const_arg1) !=
4232 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4233 && REG_P (folded_arg1))
4235 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4237 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
4240 for (p = p->first_same_value; p; p = p->next_same_value)
4242 return simplify_gen_binary (MINUS, mode, folded_arg0,
4243 canon_reg (p->exp, NULL_RTX));
4248 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4249 If so, produce (PLUS Z C2-C). */
4250 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4252 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4253 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4254 return fold_rtx (plus_constant (copy_rtx (y),
4255 -INTVAL (const_arg1)),
4262 case SMIN: case SMAX: case UMIN: case UMAX:
4263 case IOR: case AND: case XOR:
4265 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4266 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4267 is known to be of similar form, we may be able to replace the
4268 operation with a combined operation. This may eliminate the
4269 intermediate operation if every use is simplified in this way.
4270 Note that the similar optimization done by combine.c only works
4271 if the intermediate operation's result has only one reference. */
4273 if (REG_P (folded_arg0)
4274 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4277 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4278 rtx y, inner_const, new_const;
4279 enum rtx_code associate_code;
4281 y = lookup_as_function (folded_arg0, code);
4285 /* If we have compiled a statement like
4286 "if (x == (x & mask1))", and now are looking at
4287 "x & mask2", we will have a case where the first operand
4288 of Y is the same as our first operand. Unless we detect
4289 this case, an infinite loop will result. */
4290 if (XEXP (y, 0) == folded_arg0)
4293 inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
4294 if (!inner_const || GET_CODE (inner_const) != CONST_INT)
4297 /* Don't associate these operations if they are a PLUS with the
4298 same constant and it is a power of two. These might be doable
4299 with a pre- or post-increment. Similarly for two subtracts of
4300 identical powers of two with post decrement. */
4302 if (code == PLUS && const_arg1 == inner_const
4303 && ((HAVE_PRE_INCREMENT
4304 && exact_log2 (INTVAL (const_arg1)) >= 0)
4305 || (HAVE_POST_INCREMENT
4306 && exact_log2 (INTVAL (const_arg1)) >= 0)
4307 || (HAVE_PRE_DECREMENT
4308 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4309 || (HAVE_POST_DECREMENT
4310 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4313 /* Compute the code used to compose the constants. For example,
4314 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4316 associate_code = (is_shift || code == MINUS ? PLUS : code);
4318 new_const = simplify_binary_operation (associate_code, mode,
4319 const_arg1, inner_const);
4324 /* If we are associating shift operations, don't let this
4325 produce a shift of the size of the object or larger.
4326 This could occur when we follow a sign-extend by a right
4327 shift on a machine that does a sign-extend as a pair
4330 if (is_shift && GET_CODE (new_const) == CONST_INT
4331 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4333 /* As an exception, we can turn an ASHIFTRT of this
4334 form into a shift of the number of bits - 1. */
4335 if (code == ASHIFTRT)
4336 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4341 y = copy_rtx (XEXP (y, 0));
4343 /* If Y contains our first operand (the most common way this
4344 can happen is if Y is a MEM), we would do into an infinite
4345 loop if we tried to fold it. So don't in that case. */
4347 if (! reg_mentioned_p (folded_arg0, y))
4348 y = fold_rtx (y, insn);
4350 return simplify_gen_binary (code, mode, y, new_const);
4354 case DIV: case UDIV:
4355 /* ??? The associative optimization performed immediately above is
4356 also possible for DIV and UDIV using associate_code of MULT.
4357 However, we would need extra code to verify that the
4358 multiplication does not overflow, that is, there is no overflow
4359 in the calculation of new_const. */
4366 new = simplify_binary_operation (code, mode,
4367 const_arg0 ? const_arg0 : folded_arg0,
4368 const_arg1 ? const_arg1 : folded_arg1);
4372 /* (lo_sum (high X) X) is simply X. */
4373 if (code == LO_SUM && const_arg0 != 0
4374 && GET_CODE (const_arg0) == HIGH
4375 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4380 case RTX_BITFIELD_OPS:
4381 new = simplify_ternary_operation (code, mode, mode_arg0,
4382 const_arg0 ? const_arg0 : folded_arg0,
4383 const_arg1 ? const_arg1 : folded_arg1,
4384 const_arg2 ? const_arg2 : XEXP (x, 2));
4391 return new ? new : x;
4394 /* Return a constant value currently equivalent to X.
4395 Return 0 if we don't know one. */
4398 equiv_constant (rtx x)
4401 && REGNO_QTY_VALID_P (REGNO (x)))
4403 int x_q = REG_QTY (REGNO (x));
4404 struct qty_table_elem *x_ent = &qty_table[x_q];
4406 if (x_ent->const_rtx)
4407 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
4410 if (x == 0 || CONSTANT_P (x))
4413 /* If X is a MEM, try to fold it outside the context of any insn to see if
4414 it might be equivalent to a constant. That handles the case where it
4415 is a constant-pool reference. Then try to look it up in the hash table
4416 in case it is something whose value we have seen before. */
4420 struct table_elt *elt;
4422 x = fold_rtx (x, NULL_RTX);
4426 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
4430 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4431 if (elt->is_const && CONSTANT_P (elt->exp))
4438 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4439 branch. It will be zero if not.
4441 In certain cases, this can cause us to add an equivalence. For example,
4442 if we are following the taken case of
4444 we can add the fact that `i' and '2' are now equivalent.
4446 In any case, we can record that this comparison was passed. If the same
4447 comparison is seen later, we will know its value. */
4450 record_jump_equiv (rtx insn, int taken)
4452 int cond_known_true;
4455 enum machine_mode mode, mode0, mode1;
4456 int reversed_nonequality = 0;
4459 /* Ensure this is the right kind of insn. */
4460 if (! any_condjump_p (insn))
4462 set = pc_set (insn);
4464 /* See if this jump condition is known true or false. */
4466 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4468 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4470 /* Get the type of comparison being done and the operands being compared.
4471 If we had to reverse a non-equality condition, record that fact so we
4472 know that it isn't valid for floating-point. */
4473 code = GET_CODE (XEXP (SET_SRC (set), 0));
4474 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4475 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4477 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4478 if (! cond_known_true)
4480 code = reversed_comparison_code_parts (code, op0, op1, insn);
4482 /* Don't remember if we can't find the inverse. */
4483 if (code == UNKNOWN)
4487 /* The mode is the mode of the non-constant. */
4489 if (mode1 != VOIDmode)
4492 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4495 /* Yet another form of subreg creation. In this case, we want something in
4496 MODE, and we should assume OP has MODE iff it is naturally modeless. */
4499 record_jump_cond_subreg (enum machine_mode mode, rtx op)
4501 enum machine_mode op_mode = GET_MODE (op);
4502 if (op_mode == mode || op_mode == VOIDmode)
4504 return lowpart_subreg (mode, op, op_mode);
4507 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4508 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4509 Make any useful entries we can with that information. Called from
4510 above function and called recursively. */
4513 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4514 rtx op1, int reversed_nonequality)
4516 unsigned op0_hash, op1_hash;
4517 int op0_in_memory, op1_in_memory;
4518 struct table_elt *op0_elt, *op1_elt;
4520 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4521 we know that they are also equal in the smaller mode (this is also
4522 true for all smaller modes whether or not there is a SUBREG, but
4523 is not worth testing for with no SUBREG). */
4525 /* Note that GET_MODE (op0) may not equal MODE. */
4526 if (code == EQ && GET_CODE (op0) == SUBREG
4527 && (GET_MODE_SIZE (GET_MODE (op0))
4528 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4530 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4531 rtx tem = record_jump_cond_subreg (inner_mode, op1);
4533 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
4534 reversed_nonequality);
4537 if (code == EQ && GET_CODE (op1) == SUBREG
4538 && (GET_MODE_SIZE (GET_MODE (op1))
4539 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4541 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4542 rtx tem = record_jump_cond_subreg (inner_mode, op0);
4544 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
4545 reversed_nonequality);
4548 /* Similarly, if this is an NE comparison, and either is a SUBREG
4549 making a smaller mode, we know the whole thing is also NE. */
4551 /* Note that GET_MODE (op0) may not equal MODE;
4552 if we test MODE instead, we can get an infinite recursion
4553 alternating between two modes each wider than MODE. */
4555 if (code == NE && GET_CODE (op0) == SUBREG
4556 && subreg_lowpart_p (op0)
4557 && (GET_MODE_SIZE (GET_MODE (op0))
4558 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4560 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4561 rtx tem = record_jump_cond_subreg (inner_mode, op1);
4563 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
4564 reversed_nonequality);
4567 if (code == NE && GET_CODE (op1) == SUBREG
4568 && subreg_lowpart_p (op1)
4569 && (GET_MODE_SIZE (GET_MODE (op1))
4570 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4572 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4573 rtx tem = record_jump_cond_subreg (inner_mode, op0);
4575 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
4576 reversed_nonequality);
4579 /* Hash both operands. */
4582 hash_arg_in_memory = 0;
4583 op0_hash = HASH (op0, mode);
4584 op0_in_memory = hash_arg_in_memory;
4590 hash_arg_in_memory = 0;
4591 op1_hash = HASH (op1, mode);
4592 op1_in_memory = hash_arg_in_memory;
4597 /* Look up both operands. */
4598 op0_elt = lookup (op0, op0_hash, mode);
4599 op1_elt = lookup (op1, op1_hash, mode);
4601 /* If both operands are already equivalent or if they are not in the
4602 table but are identical, do nothing. */
4603 if ((op0_elt != 0 && op1_elt != 0
4604 && op0_elt->first_same_value == op1_elt->first_same_value)
4605 || op0 == op1 || rtx_equal_p (op0, op1))
4608 /* If we aren't setting two things equal all we can do is save this
4609 comparison. Similarly if this is floating-point. In the latter
4610 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4611 If we record the equality, we might inadvertently delete code
4612 whose intent was to change -0 to +0. */
4614 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4616 struct qty_table_elem *ent;
4619 /* If we reversed a floating-point comparison, if OP0 is not a
4620 register, or if OP1 is neither a register or constant, we can't
4624 op1 = equiv_constant (op1);
4626 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4627 || !REG_P (op0) || op1 == 0)
4630 /* Put OP0 in the hash table if it isn't already. This gives it a
4631 new quantity number. */
4634 if (insert_regs (op0, NULL, 0))
4636 rehash_using_reg (op0);
4637 op0_hash = HASH (op0, mode);
4639 /* If OP0 is contained in OP1, this changes its hash code
4640 as well. Faster to rehash than to check, except
4641 for the simple case of a constant. */
4642 if (! CONSTANT_P (op1))
4643 op1_hash = HASH (op1,mode);
4646 op0_elt = insert (op0, NULL, op0_hash, mode);
4647 op0_elt->in_memory = op0_in_memory;
4650 qty = REG_QTY (REGNO (op0));
4651 ent = &qty_table[qty];
4653 ent->comparison_code = code;
4656 /* Look it up again--in case op0 and op1 are the same. */
4657 op1_elt = lookup (op1, op1_hash, mode);
4659 /* Put OP1 in the hash table so it gets a new quantity number. */
4662 if (insert_regs (op1, NULL, 0))
4664 rehash_using_reg (op1);
4665 op1_hash = HASH (op1, mode);
4668 op1_elt = insert (op1, NULL, op1_hash, mode);
4669 op1_elt->in_memory = op1_in_memory;
4672 ent->comparison_const = NULL_RTX;
4673 ent->comparison_qty = REG_QTY (REGNO (op1));
4677 ent->comparison_const = op1;
4678 ent->comparison_qty = -1;
4684 /* If either side is still missing an equivalence, make it now,
4685 then merge the equivalences. */
4689 if (insert_regs (op0, NULL, 0))
4691 rehash_using_reg (op0);
4692 op0_hash = HASH (op0, mode);
4695 op0_elt = insert (op0, NULL, op0_hash, mode);
4696 op0_elt->in_memory = op0_in_memory;
4701 if (insert_regs (op1, NULL, 0))
4703 rehash_using_reg (op1);
4704 op1_hash = HASH (op1, mode);
4707 op1_elt = insert (op1, NULL, op1_hash, mode);
4708 op1_elt->in_memory = op1_in_memory;
4711 merge_equiv_classes (op0_elt, op1_elt);
4714 /* CSE processing for one instruction.
4715 First simplify sources and addresses of all assignments
4716 in the instruction, using previously-computed equivalents values.
4717 Then install the new sources and destinations in the table
4718 of available values.
4720 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4721 the insn. It means that INSN is inside libcall block. In this
4722 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4724 /* Data on one SET contained in the instruction. */
4728 /* The SET rtx itself. */
4730 /* The SET_SRC of the rtx (the original value, if it is changing). */
4732 /* The hash-table element for the SET_SRC of the SET. */
4733 struct table_elt *src_elt;
4734 /* Hash value for the SET_SRC. */
4736 /* Hash value for the SET_DEST. */
4738 /* The SET_DEST, with SUBREG, etc., stripped. */
4740 /* Nonzero if the SET_SRC is in memory. */
4742 /* Nonzero if the SET_SRC contains something
4743 whose value cannot be predicted and understood. */
4745 /* Original machine mode, in case it becomes a CONST_INT.
4746 The size of this field should match the size of the mode
4747 field of struct rtx_def (see rtl.h). */
4748 ENUM_BITFIELD(machine_mode) mode : 8;
4749 /* A constant equivalent for SET_SRC, if any. */
4751 /* Original SET_SRC value used for libcall notes. */
4753 /* Hash value of constant equivalent for SET_SRC. */
4754 unsigned src_const_hash;
4755 /* Table entry for constant equivalent for SET_SRC, if any. */
4756 struct table_elt *src_const_elt;
4757 /* Table entry for the destination address. */
4758 struct table_elt *dest_addr_elt;
4762 cse_insn (rtx insn, rtx libcall_insn)
4764 rtx x = PATTERN (insn);
4770 /* Records what this insn does to set CC0. */
4771 rtx this_insn_cc0 = 0;
4772 enum machine_mode this_insn_cc0_mode = VOIDmode;
4776 struct table_elt *src_eqv_elt = 0;
4777 int src_eqv_volatile = 0;
4778 int src_eqv_in_memory = 0;
4779 unsigned src_eqv_hash = 0;
4781 struct set *sets = (struct set *) 0;
4785 /* Find all the SETs and CLOBBERs in this instruction.
4786 Record all the SETs in the array `set' and count them.
4787 Also determine whether there is a CLOBBER that invalidates
4788 all memory references, or all references at varying addresses. */
4792 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4794 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4795 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4796 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4800 if (GET_CODE (x) == SET)
4802 sets = alloca (sizeof (struct set));
4805 /* Ignore SETs that are unconditional jumps.
4806 They never need cse processing, so this does not hurt.
4807 The reason is not efficiency but rather
4808 so that we can test at the end for instructions
4809 that have been simplified to unconditional jumps
4810 and not be misled by unchanged instructions
4811 that were unconditional jumps to begin with. */
4812 if (SET_DEST (x) == pc_rtx
4813 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4816 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4817 The hard function value register is used only once, to copy to
4818 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4819 Ensure we invalidate the destination register. On the 80386 no
4820 other code would invalidate it since it is a fixed_reg.
4821 We need not check the return of apply_change_group; see canon_reg. */
4823 else if (GET_CODE (SET_SRC (x)) == CALL)
4825 canon_reg (SET_SRC (x), insn);
4826 apply_change_group ();
4827 fold_rtx (SET_SRC (x), insn);
4828 invalidate (SET_DEST (x), VOIDmode);
4833 else if (GET_CODE (x) == PARALLEL)
4835 int lim = XVECLEN (x, 0);
4837 sets = alloca (lim * sizeof (struct set));
4839 /* Find all regs explicitly clobbered in this insn,
4840 and ensure they are not replaced with any other regs
4841 elsewhere in this insn.
4842 When a reg that is clobbered is also used for input,
4843 we should presume that that is for a reason,
4844 and we should not substitute some other register
4845 which is not supposed to be clobbered.
4846 Therefore, this loop cannot be merged into the one below
4847 because a CALL may precede a CLOBBER and refer to the
4848 value clobbered. We must not let a canonicalization do
4849 anything in that case. */
4850 for (i = 0; i < lim; i++)
4852 rtx y = XVECEXP (x, 0, i);
4853 if (GET_CODE (y) == CLOBBER)
4855 rtx clobbered = XEXP (y, 0);
4857 if (REG_P (clobbered)
4858 || GET_CODE (clobbered) == SUBREG)
4859 invalidate (clobbered, VOIDmode);
4860 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4861 || GET_CODE (clobbered) == ZERO_EXTRACT)
4862 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4866 for (i = 0; i < lim; i++)
4868 rtx y = XVECEXP (x, 0, i);
4869 if (GET_CODE (y) == SET)
4871 /* As above, we ignore unconditional jumps and call-insns and
4872 ignore the result of apply_change_group. */
4873 if (GET_CODE (SET_SRC (y)) == CALL)
4875 canon_reg (SET_SRC (y), insn);
4876 apply_change_group ();
4877 fold_rtx (SET_SRC (y), insn);
4878 invalidate (SET_DEST (y), VOIDmode);
4880 else if (SET_DEST (y) == pc_rtx
4881 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4884 sets[n_sets++].rtl = y;
4886 else if (GET_CODE (y) == CLOBBER)
4888 /* If we clobber memory, canon the address.
4889 This does nothing when a register is clobbered
4890 because we have already invalidated the reg. */
4891 if (MEM_P (XEXP (y, 0)))
4892 canon_reg (XEXP (y, 0), NULL_RTX);
4894 else if (GET_CODE (y) == USE
4895 && ! (REG_P (XEXP (y, 0))
4896 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4897 canon_reg (y, NULL_RTX);
4898 else if (GET_CODE (y) == CALL)
4900 /* The result of apply_change_group can be ignored; see
4902 canon_reg (y, insn);
4903 apply_change_group ();
4908 else if (GET_CODE (x) == CLOBBER)
4910 if (MEM_P (XEXP (x, 0)))
4911 canon_reg (XEXP (x, 0), NULL_RTX);
4914 /* Canonicalize a USE of a pseudo register or memory location. */
4915 else if (GET_CODE (x) == USE
4916 && ! (REG_P (XEXP (x, 0))
4917 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4918 canon_reg (XEXP (x, 0), NULL_RTX);
4919 else if (GET_CODE (x) == CALL)
4921 /* The result of apply_change_group can be ignored; see canon_reg. */
4922 canon_reg (x, insn);
4923 apply_change_group ();
4927 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4928 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4929 is handled specially for this case, and if it isn't set, then there will
4930 be no equivalence for the destination. */
4931 if (n_sets == 1 && REG_NOTES (insn) != 0
4932 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4933 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4934 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4936 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4937 XEXP (tem, 0) = src_eqv;
4940 /* Canonicalize sources and addresses of destinations.
4941 We do this in a separate pass to avoid problems when a MATCH_DUP is
4942 present in the insn pattern. In that case, we want to ensure that
4943 we don't break the duplicate nature of the pattern. So we will replace
4944 both operands at the same time. Otherwise, we would fail to find an
4945 equivalent substitution in the loop calling validate_change below.
4947 We used to suppress canonicalization of DEST if it appears in SRC,
4948 but we don't do this any more. */
4950 for (i = 0; i < n_sets; i++)
4952 rtx dest = SET_DEST (sets[i].rtl);
4953 rtx src = SET_SRC (sets[i].rtl);
4954 rtx new = canon_reg (src, insn);
4957 sets[i].orig_src = src;
4958 if ((REG_P (new) && REG_P (src)
4959 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4960 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4961 || (insn_code = recog_memoized (insn)) < 0
4962 || insn_data[insn_code].n_dups > 0)
4963 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4965 SET_SRC (sets[i].rtl) = new;
4967 if (GET_CODE (dest) == ZERO_EXTRACT)
4969 validate_change (insn, &XEXP (dest, 1),
4970 canon_reg (XEXP (dest, 1), insn), 1);
4971 validate_change (insn, &XEXP (dest, 2),
4972 canon_reg (XEXP (dest, 2), insn), 1);
4975 while (GET_CODE (dest) == SUBREG
4976 || GET_CODE (dest) == ZERO_EXTRACT
4977 || GET_CODE (dest) == STRICT_LOW_PART)
4978 dest = XEXP (dest, 0);
4981 canon_reg (dest, insn);
4984 /* Now that we have done all the replacements, we can apply the change
4985 group and see if they all work. Note that this will cause some
4986 canonicalizations that would have worked individually not to be applied
4987 because some other canonicalization didn't work, but this should not
4990 The result of apply_change_group can be ignored; see canon_reg. */
4992 apply_change_group ();
4994 /* Set sets[i].src_elt to the class each source belongs to.
4995 Detect assignments from or to volatile things
4996 and set set[i] to zero so they will be ignored
4997 in the rest of this function.
4999 Nothing in this loop changes the hash table or the register chains. */
5001 for (i = 0; i < n_sets; i++)
5005 struct table_elt *elt = 0, *p;
5006 enum machine_mode mode;
5009 rtx src_related = 0;
5010 struct table_elt *src_const_elt = 0;
5011 int src_cost = MAX_COST;
5012 int src_eqv_cost = MAX_COST;
5013 int src_folded_cost = MAX_COST;
5014 int src_related_cost = MAX_COST;
5015 int src_elt_cost = MAX_COST;
5016 int src_regcost = MAX_COST;
5017 int src_eqv_regcost = MAX_COST;
5018 int src_folded_regcost = MAX_COST;
5019 int src_related_regcost = MAX_COST;
5020 int src_elt_regcost = MAX_COST;
5021 /* Set nonzero if we need to call force_const_mem on with the
5022 contents of src_folded before using it. */
5023 int src_folded_force_flag = 0;
5025 dest = SET_DEST (sets[i].rtl);
5026 src = SET_SRC (sets[i].rtl);
5028 /* If SRC is a constant that has no machine mode,
5029 hash it with the destination's machine mode.
5030 This way we can keep different modes separate. */
5032 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5033 sets[i].mode = mode;
5037 enum machine_mode eqvmode = mode;
5038 if (GET_CODE (dest) == STRICT_LOW_PART)
5039 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5041 hash_arg_in_memory = 0;
5042 src_eqv_hash = HASH (src_eqv, eqvmode);
5044 /* Find the equivalence class for the equivalent expression. */
5047 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
5049 src_eqv_volatile = do_not_record;
5050 src_eqv_in_memory = hash_arg_in_memory;
5053 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5054 value of the INNER register, not the destination. So it is not
5055 a valid substitution for the source. But save it for later. */
5056 if (GET_CODE (dest) == STRICT_LOW_PART)
5059 src_eqv_here = src_eqv;
5061 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5062 simplified result, which may not necessarily be valid. */
5063 src_folded = fold_rtx (src, insn);
5066 /* ??? This caused bad code to be generated for the m68k port with -O2.
5067 Suppose src is (CONST_INT -1), and that after truncation src_folded
5068 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5069 At the end we will add src and src_const to the same equivalence
5070 class. We now have 3 and -1 on the same equivalence class. This
5071 causes later instructions to be mis-optimized. */
5072 /* If storing a constant in a bitfield, pre-truncate the constant
5073 so we will be able to record it later. */
5074 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5076 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5078 if (GET_CODE (src) == CONST_INT
5079 && GET_CODE (width) == CONST_INT
5080 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5081 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5083 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5084 << INTVAL (width)) - 1));
5088 /* Compute SRC's hash code, and also notice if it
5089 should not be recorded at all. In that case,
5090 prevent any further processing of this assignment. */
5092 hash_arg_in_memory = 0;
5095 sets[i].src_hash = HASH (src, mode);
5096 sets[i].src_volatile = do_not_record;
5097 sets[i].src_in_memory = hash_arg_in_memory;
5099 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5100 a pseudo, do not record SRC. Using SRC as a replacement for
5101 anything else will be incorrect in that situation. Note that
5102 this usually occurs only for stack slots, in which case all the
5103 RTL would be referring to SRC, so we don't lose any optimization
5104 opportunities by not having SRC in the hash table. */
5107 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5109 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5110 sets[i].src_volatile = 1;
5113 /* It is no longer clear why we used to do this, but it doesn't
5114 appear to still be needed. So let's try without it since this
5115 code hurts cse'ing widened ops. */
5116 /* If source is a paradoxical subreg (such as QI treated as an SI),
5117 treat it as volatile. It may do the work of an SI in one context
5118 where the extra bits are not being used, but cannot replace an SI
5120 if (GET_CODE (src) == SUBREG
5121 && (GET_MODE_SIZE (GET_MODE (src))
5122 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5123 sets[i].src_volatile = 1;
5126 /* Locate all possible equivalent forms for SRC. Try to replace
5127 SRC in the insn with each cheaper equivalent.
5129 We have the following types of equivalents: SRC itself, a folded
5130 version, a value given in a REG_EQUAL note, or a value related
5133 Each of these equivalents may be part of an additional class
5134 of equivalents (if more than one is in the table, they must be in
5135 the same class; we check for this).
5137 If the source is volatile, we don't do any table lookups.
5139 We note any constant equivalent for possible later use in a
5142 if (!sets[i].src_volatile)
5143 elt = lookup (src, sets[i].src_hash, mode);
5145 sets[i].src_elt = elt;
5147 if (elt && src_eqv_here && src_eqv_elt)
5149 if (elt->first_same_value != src_eqv_elt->first_same_value)
5151 /* The REG_EQUAL is indicating that two formerly distinct
5152 classes are now equivalent. So merge them. */
5153 merge_equiv_classes (elt, src_eqv_elt);
5154 src_eqv_hash = HASH (src_eqv, elt->mode);
5155 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5161 else if (src_eqv_elt)
5164 /* Try to find a constant somewhere and record it in `src_const'.
5165 Record its table element, if any, in `src_const_elt'. Look in
5166 any known equivalences first. (If the constant is not in the
5167 table, also set `sets[i].src_const_hash'). */
5169 for (p = elt->first_same_value; p; p = p->next_same_value)
5173 src_const_elt = elt;
5178 && (CONSTANT_P (src_folded)
5179 /* Consider (minus (label_ref L1) (label_ref L2)) as
5180 "constant" here so we will record it. This allows us
5181 to fold switch statements when an ADDR_DIFF_VEC is used. */
5182 || (GET_CODE (src_folded) == MINUS
5183 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5184 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5185 src_const = src_folded, src_const_elt = elt;
5186 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5187 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5189 /* If we don't know if the constant is in the table, get its
5190 hash code and look it up. */
5191 if (src_const && src_const_elt == 0)
5193 sets[i].src_const_hash = HASH (src_const, mode);
5194 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5197 sets[i].src_const = src_const;
5198 sets[i].src_const_elt = src_const_elt;
5200 /* If the constant and our source are both in the table, mark them as
5201 equivalent. Otherwise, if a constant is in the table but the source
5202 isn't, set ELT to it. */
5203 if (src_const_elt && elt
5204 && src_const_elt->first_same_value != elt->first_same_value)
5205 merge_equiv_classes (elt, src_const_elt);
5206 else if (src_const_elt && elt == 0)
5207 elt = src_const_elt;
5209 /* See if there is a register linearly related to a constant
5210 equivalent of SRC. */
5212 && (GET_CODE (src_const) == CONST
5213 || (src_const_elt && src_const_elt->related_value != 0)))
5215 src_related = use_related_value (src_const, src_const_elt);
5218 struct table_elt *src_related_elt
5219 = lookup (src_related, HASH (src_related, mode), mode);
5220 if (src_related_elt && elt)
5222 if (elt->first_same_value
5223 != src_related_elt->first_same_value)
5224 /* This can occur when we previously saw a CONST
5225 involving a SYMBOL_REF and then see the SYMBOL_REF
5226 twice. Merge the involved classes. */
5227 merge_equiv_classes (elt, src_related_elt);
5230 src_related_elt = 0;
5232 else if (src_related_elt && elt == 0)
5233 elt = src_related_elt;
5237 /* See if we have a CONST_INT that is already in a register in a
5240 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5241 && GET_MODE_CLASS (mode) == MODE_INT
5242 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5244 enum machine_mode wider_mode;
5246 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5247 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5248 && src_related == 0;
5249 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5251 struct table_elt *const_elt
5252 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5257 for (const_elt = const_elt->first_same_value;
5258 const_elt; const_elt = const_elt->next_same_value)
5259 if (REG_P (const_elt->exp))
5261 src_related = gen_lowpart (mode,
5268 /* Another possibility is that we have an AND with a constant in
5269 a mode narrower than a word. If so, it might have been generated
5270 as part of an "if" which would narrow the AND. If we already
5271 have done the AND in a wider mode, we can use a SUBREG of that
5274 if (flag_expensive_optimizations && ! src_related
5275 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5276 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5278 enum machine_mode tmode;
5279 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5281 for (tmode = GET_MODE_WIDER_MODE (mode);
5282 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5283 tmode = GET_MODE_WIDER_MODE (tmode))
5285 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
5286 struct table_elt *larger_elt;
5290 PUT_MODE (new_and, tmode);
5291 XEXP (new_and, 0) = inner;
5292 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5293 if (larger_elt == 0)
5296 for (larger_elt = larger_elt->first_same_value;
5297 larger_elt; larger_elt = larger_elt->next_same_value)
5298 if (REG_P (larger_elt->exp))
5301 = gen_lowpart (mode, larger_elt->exp);
5311 #ifdef LOAD_EXTEND_OP
5312 /* See if a MEM has already been loaded with a widening operation;
5313 if it has, we can use a subreg of that. Many CISC machines
5314 also have such operations, but this is only likely to be
5315 beneficial on these machines. */
5317 if (flag_expensive_optimizations && src_related == 0
5318 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5319 && GET_MODE_CLASS (mode) == MODE_INT
5320 && MEM_P (src) && ! do_not_record
5321 && LOAD_EXTEND_OP (mode) != UNKNOWN)
5323 struct rtx_def memory_extend_buf;
5324 rtx memory_extend_rtx = &memory_extend_buf;
5325 enum machine_mode tmode;
5327 /* Set what we are trying to extend and the operation it might
5328 have been extended with. */
5329 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
5330 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5331 XEXP (memory_extend_rtx, 0) = src;
5333 for (tmode = GET_MODE_WIDER_MODE (mode);
5334 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5335 tmode = GET_MODE_WIDER_MODE (tmode))
5337 struct table_elt *larger_elt;
5339 PUT_MODE (memory_extend_rtx, tmode);
5340 larger_elt = lookup (memory_extend_rtx,
5341 HASH (memory_extend_rtx, tmode), tmode);
5342 if (larger_elt == 0)
5345 for (larger_elt = larger_elt->first_same_value;
5346 larger_elt; larger_elt = larger_elt->next_same_value)
5347 if (REG_P (larger_elt->exp))
5349 src_related = gen_lowpart (mode,
5358 #endif /* LOAD_EXTEND_OP */
5360 if (src == src_folded)
5363 /* At this point, ELT, if nonzero, points to a class of expressions
5364 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5365 and SRC_RELATED, if nonzero, each contain additional equivalent
5366 expressions. Prune these latter expressions by deleting expressions
5367 already in the equivalence class.
5369 Check for an equivalent identical to the destination. If found,
5370 this is the preferred equivalent since it will likely lead to
5371 elimination of the insn. Indicate this by placing it in
5375 elt = elt->first_same_value;
5376 for (p = elt; p; p = p->next_same_value)
5378 enum rtx_code code = GET_CODE (p->exp);
5380 /* If the expression is not valid, ignore it. Then we do not
5381 have to check for validity below. In most cases, we can use
5382 `rtx_equal_p', since canonicalization has already been done. */
5383 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
5386 /* Also skip paradoxical subregs, unless that's what we're
5389 && (GET_MODE_SIZE (GET_MODE (p->exp))
5390 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5392 && GET_CODE (src) == SUBREG
5393 && GET_MODE (src) == GET_MODE (p->exp)
5394 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5395 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5398 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5400 else if (src_folded && GET_CODE (src_folded) == code
5401 && rtx_equal_p (src_folded, p->exp))
5403 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5404 && rtx_equal_p (src_eqv_here, p->exp))
5406 else if (src_related && GET_CODE (src_related) == code
5407 && rtx_equal_p (src_related, p->exp))
5410 /* This is the same as the destination of the insns, we want
5411 to prefer it. Copy it to src_related. The code below will
5412 then give it a negative cost. */
5413 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5417 /* Find the cheapest valid equivalent, trying all the available
5418 possibilities. Prefer items not in the hash table to ones
5419 that are when they are equal cost. Note that we can never
5420 worsen an insn as the current contents will also succeed.
5421 If we find an equivalent identical to the destination, use it as best,
5422 since this insn will probably be eliminated in that case. */
5425 if (rtx_equal_p (src, dest))
5426 src_cost = src_regcost = -1;
5429 src_cost = COST (src);
5430 src_regcost = approx_reg_cost (src);
5436 if (rtx_equal_p (src_eqv_here, dest))
5437 src_eqv_cost = src_eqv_regcost = -1;
5440 src_eqv_cost = COST (src_eqv_here);
5441 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5447 if (rtx_equal_p (src_folded, dest))
5448 src_folded_cost = src_folded_regcost = -1;
5451 src_folded_cost = COST (src_folded);
5452 src_folded_regcost = approx_reg_cost (src_folded);
5458 if (rtx_equal_p (src_related, dest))
5459 src_related_cost = src_related_regcost = -1;
5462 src_related_cost = COST (src_related);
5463 src_related_regcost = approx_reg_cost (src_related);
5467 /* If this was an indirect jump insn, a known label will really be
5468 cheaper even though it looks more expensive. */
5469 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5470 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5472 /* Terminate loop when replacement made. This must terminate since
5473 the current contents will be tested and will always be valid. */
5478 /* Skip invalid entries. */
5479 while (elt && !REG_P (elt->exp)
5480 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5481 elt = elt->next_same_value;
5483 /* A paradoxical subreg would be bad here: it'll be the right
5484 size, but later may be adjusted so that the upper bits aren't
5485 what we want. So reject it. */
5487 && GET_CODE (elt->exp) == SUBREG
5488 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5489 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5490 /* It is okay, though, if the rtx we're trying to match
5491 will ignore any of the bits we can't predict. */
5493 && GET_CODE (src) == SUBREG
5494 && GET_MODE (src) == GET_MODE (elt->exp)
5495 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5496 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5498 elt = elt->next_same_value;
5504 src_elt_cost = elt->cost;
5505 src_elt_regcost = elt->regcost;
5508 /* Find cheapest and skip it for the next time. For items
5509 of equal cost, use this order:
5510 src_folded, src, src_eqv, src_related and hash table entry. */
5512 && preferable (src_folded_cost, src_folded_regcost,
5513 src_cost, src_regcost) <= 0
5514 && preferable (src_folded_cost, src_folded_regcost,
5515 src_eqv_cost, src_eqv_regcost) <= 0
5516 && preferable (src_folded_cost, src_folded_regcost,
5517 src_related_cost, src_related_regcost) <= 0
5518 && preferable (src_folded_cost, src_folded_regcost,
5519 src_elt_cost, src_elt_regcost) <= 0)
5521 trial = src_folded, src_folded_cost = MAX_COST;
5522 if (src_folded_force_flag)
5524 rtx forced = force_const_mem (mode, trial);
5530 && preferable (src_cost, src_regcost,
5531 src_eqv_cost, src_eqv_regcost) <= 0
5532 && preferable (src_cost, src_regcost,
5533 src_related_cost, src_related_regcost) <= 0
5534 && preferable (src_cost, src_regcost,
5535 src_elt_cost, src_elt_regcost) <= 0)
5536 trial = src, src_cost = MAX_COST;
5537 else if (src_eqv_here
5538 && preferable (src_eqv_cost, src_eqv_regcost,
5539 src_related_cost, src_related_regcost) <= 0
5540 && preferable (src_eqv_cost, src_eqv_regcost,
5541 src_elt_cost, src_elt_regcost) <= 0)
5542 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5543 else if (src_related
5544 && preferable (src_related_cost, src_related_regcost,
5545 src_elt_cost, src_elt_regcost) <= 0)
5546 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5549 trial = copy_rtx (elt->exp);
5550 elt = elt->next_same_value;
5551 src_elt_cost = MAX_COST;
5554 /* We don't normally have an insn matching (set (pc) (pc)), so
5555 check for this separately here. We will delete such an
5558 For other cases such as a table jump or conditional jump
5559 where we know the ultimate target, go ahead and replace the
5560 operand. While that may not make a valid insn, we will
5561 reemit the jump below (and also insert any necessary
5563 if (n_sets == 1 && dest == pc_rtx
5565 || (GET_CODE (trial) == LABEL_REF
5566 && ! condjump_p (insn))))
5568 /* Don't substitute non-local labels, this confuses CFG. */
5569 if (GET_CODE (trial) == LABEL_REF
5570 && LABEL_REF_NONLOCAL_P (trial))
5573 SET_SRC (sets[i].rtl) = trial;
5574 cse_jumps_altered = 1;
5578 /* Reject certain invalid forms of CONST that we create. */
5579 else if (CONSTANT_P (trial)
5580 && GET_CODE (trial) == CONST
5581 /* Reject cases that will cause decode_rtx_const to
5582 die. On the alpha when simplifying a switch, we
5583 get (const (truncate (minus (label_ref)
5585 && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5586 /* Likewise on IA-64, except without the
5588 || (GET_CODE (XEXP (trial, 0)) == MINUS
5589 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5590 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5591 /* Do nothing for this case. */
5594 /* Look for a substitution that makes a valid insn. */
5595 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5597 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5599 /* If we just made a substitution inside a libcall, then we
5600 need to make the same substitution in any notes attached
5601 to the RETVAL insn. */
5603 && (REG_P (sets[i].orig_src)
5604 || GET_CODE (sets[i].orig_src) == SUBREG
5605 || MEM_P (sets[i].orig_src)))
5607 rtx note = find_reg_equal_equiv_note (libcall_insn);
5609 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0),
5614 /* The result of apply_change_group can be ignored; see
5617 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5618 apply_change_group ();
5622 /* If we previously found constant pool entries for
5623 constants and this is a constant, try making a
5624 pool entry. Put it in src_folded unless we already have done
5625 this since that is where it likely came from. */
5627 else if (constant_pool_entries_cost
5628 && CONSTANT_P (trial)
5630 || (!MEM_P (src_folded)
5631 && ! src_folded_force_flag))
5632 && GET_MODE_CLASS (mode) != MODE_CC
5633 && mode != VOIDmode)
5635 src_folded_force_flag = 1;
5637 src_folded_cost = constant_pool_entries_cost;
5638 src_folded_regcost = constant_pool_entries_regcost;
5642 src = SET_SRC (sets[i].rtl);
5644 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5645 However, there is an important exception: If both are registers
5646 that are not the head of their equivalence class, replace SET_SRC
5647 with the head of the class. If we do not do this, we will have
5648 both registers live over a portion of the basic block. This way,
5649 their lifetimes will likely abut instead of overlapping. */
5651 && REGNO_QTY_VALID_P (REGNO (dest)))
5653 int dest_q = REG_QTY (REGNO (dest));
5654 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5656 if (dest_ent->mode == GET_MODE (dest)
5657 && dest_ent->first_reg != REGNO (dest)
5658 && REG_P (src) && REGNO (src) == REGNO (dest)
5659 /* Don't do this if the original insn had a hard reg as
5660 SET_SRC or SET_DEST. */
5661 && (!REG_P (sets[i].src)
5662 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5663 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5664 /* We can't call canon_reg here because it won't do anything if
5665 SRC is a hard register. */
5667 int src_q = REG_QTY (REGNO (src));
5668 struct qty_table_elem *src_ent = &qty_table[src_q];
5669 int first = src_ent->first_reg;
5671 = (first >= FIRST_PSEUDO_REGISTER
5672 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5674 /* We must use validate-change even for this, because this
5675 might be a special no-op instruction, suitable only to
5677 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5680 /* If we had a constant that is cheaper than what we are now
5681 setting SRC to, use that constant. We ignored it when we
5682 thought we could make this into a no-op. */
5683 if (src_const && COST (src_const) < COST (src)
5684 && validate_change (insn, &SET_SRC (sets[i].rtl),
5691 /* If we made a change, recompute SRC values. */
5692 if (src != sets[i].src)
5696 hash_arg_in_memory = 0;
5698 sets[i].src_hash = HASH (src, mode);
5699 sets[i].src_volatile = do_not_record;
5700 sets[i].src_in_memory = hash_arg_in_memory;
5701 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5704 /* If this is a single SET, we are setting a register, and we have an
5705 equivalent constant, we want to add a REG_NOTE. We don't want
5706 to write a REG_EQUAL note for a constant pseudo since verifying that
5707 that pseudo hasn't been eliminated is a pain. Such a note also
5708 won't help anything.
5710 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5711 which can be created for a reference to a compile time computable
5712 entry in a jump table. */
5714 if (n_sets == 1 && src_const && REG_P (dest)
5715 && !REG_P (src_const)
5716 && ! (GET_CODE (src_const) == CONST
5717 && GET_CODE (XEXP (src_const, 0)) == MINUS
5718 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5719 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5721 /* We only want a REG_EQUAL note if src_const != src. */
5722 if (! rtx_equal_p (src, src_const))
5724 /* Make sure that the rtx is not shared. */
5725 src_const = copy_rtx (src_const);
5727 /* Record the actual constant value in a REG_EQUAL note,
5728 making a new one if one does not already exist. */
5729 set_unique_reg_note (insn, REG_EQUAL, src_const);
5733 /* Now deal with the destination. */
5736 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5737 while (GET_CODE (dest) == SUBREG
5738 || GET_CODE (dest) == ZERO_EXTRACT
5739 || GET_CODE (dest) == STRICT_LOW_PART)
5740 dest = XEXP (dest, 0);
5742 sets[i].inner_dest = dest;
5746 #ifdef PUSH_ROUNDING
5747 /* Stack pushes invalidate the stack pointer. */
5748 rtx addr = XEXP (dest, 0);
5749 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5750 && XEXP (addr, 0) == stack_pointer_rtx)
5751 invalidate (stack_pointer_rtx, Pmode);
5753 dest = fold_rtx (dest, insn);
5756 /* Compute the hash code of the destination now,
5757 before the effects of this instruction are recorded,
5758 since the register values used in the address computation
5759 are those before this instruction. */
5760 sets[i].dest_hash = HASH (dest, mode);
5762 /* Don't enter a bit-field in the hash table
5763 because the value in it after the store
5764 may not equal what was stored, due to truncation. */
5766 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5768 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5770 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5771 && GET_CODE (width) == CONST_INT
5772 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5773 && ! (INTVAL (src_const)
5774 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5775 /* Exception: if the value is constant,
5776 and it won't be truncated, record it. */
5780 /* This is chosen so that the destination will be invalidated
5781 but no new value will be recorded.
5782 We must invalidate because sometimes constant
5783 values can be recorded for bitfields. */
5784 sets[i].src_elt = 0;
5785 sets[i].src_volatile = 1;
5791 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5793 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5795 /* One less use of the label this insn used to jump to. */
5797 cse_jumps_altered = 1;
5798 /* No more processing for this set. */
5802 /* If this SET is now setting PC to a label, we know it used to
5803 be a conditional or computed branch. */
5804 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5805 && !LABEL_REF_NONLOCAL_P (src))
5807 /* Now emit a BARRIER after the unconditional jump. */
5808 if (NEXT_INSN (insn) == 0
5809 || !BARRIER_P (NEXT_INSN (insn)))
5810 emit_barrier_after (insn);
5812 /* We reemit the jump in as many cases as possible just in
5813 case the form of an unconditional jump is significantly
5814 different than a computed jump or conditional jump.
5816 If this insn has multiple sets, then reemitting the
5817 jump is nontrivial. So instead we just force rerecognition
5818 and hope for the best. */
5823 new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5824 JUMP_LABEL (new) = XEXP (src, 0);
5825 LABEL_NUSES (XEXP (src, 0))++;
5827 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5828 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5831 XEXP (note, 1) = NULL_RTX;
5832 REG_NOTES (new) = note;
5838 /* Now emit a BARRIER after the unconditional jump. */
5839 if (NEXT_INSN (insn) == 0
5840 || !BARRIER_P (NEXT_INSN (insn)))
5841 emit_barrier_after (insn);
5844 INSN_CODE (insn) = -1;
5846 /* Do not bother deleting any unreachable code,
5847 let jump/flow do that. */
5849 cse_jumps_altered = 1;
5853 /* If destination is volatile, invalidate it and then do no further
5854 processing for this assignment. */
5856 else if (do_not_record)
5858 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5859 invalidate (dest, VOIDmode);
5860 else if (MEM_P (dest))
5861 invalidate (dest, VOIDmode);
5862 else if (GET_CODE (dest) == STRICT_LOW_PART
5863 || GET_CODE (dest) == ZERO_EXTRACT)
5864 invalidate (XEXP (dest, 0), GET_MODE (dest));
5868 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5869 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5872 /* If setting CC0, record what it was set to, or a constant, if it
5873 is equivalent to a constant. If it is being set to a floating-point
5874 value, make a COMPARE with the appropriate constant of 0. If we
5875 don't do this, later code can interpret this as a test against
5876 const0_rtx, which can cause problems if we try to put it into an
5877 insn as a floating-point operand. */
5878 if (dest == cc0_rtx)
5880 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5881 this_insn_cc0_mode = mode;
5882 if (FLOAT_MODE_P (mode))
5883 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5889 /* Now enter all non-volatile source expressions in the hash table
5890 if they are not already present.
5891 Record their equivalence classes in src_elt.
5892 This way we can insert the corresponding destinations into
5893 the same classes even if the actual sources are no longer in them
5894 (having been invalidated). */
5896 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5897 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5899 struct table_elt *elt;
5900 struct table_elt *classp = sets[0].src_elt;
5901 rtx dest = SET_DEST (sets[0].rtl);
5902 enum machine_mode eqvmode = GET_MODE (dest);
5904 if (GET_CODE (dest) == STRICT_LOW_PART)
5906 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5909 if (insert_regs (src_eqv, classp, 0))
5911 rehash_using_reg (src_eqv);
5912 src_eqv_hash = HASH (src_eqv, eqvmode);
5914 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5915 elt->in_memory = src_eqv_in_memory;
5918 /* Check to see if src_eqv_elt is the same as a set source which
5919 does not yet have an elt, and if so set the elt of the set source
5921 for (i = 0; i < n_sets; i++)
5922 if (sets[i].rtl && sets[i].src_elt == 0
5923 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5924 sets[i].src_elt = src_eqv_elt;
5927 for (i = 0; i < n_sets; i++)
5928 if (sets[i].rtl && ! sets[i].src_volatile
5929 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5931 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5933 /* REG_EQUAL in setting a STRICT_LOW_PART
5934 gives an equivalent for the entire destination register,
5935 not just for the subreg being stored in now.
5936 This is a more interesting equivalence, so we arrange later
5937 to treat the entire reg as the destination. */
5938 sets[i].src_elt = src_eqv_elt;
5939 sets[i].src_hash = src_eqv_hash;
5943 /* Insert source and constant equivalent into hash table, if not
5945 struct table_elt *classp = src_eqv_elt;
5946 rtx src = sets[i].src;
5947 rtx dest = SET_DEST (sets[i].rtl);
5948 enum machine_mode mode
5949 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5951 /* It's possible that we have a source value known to be
5952 constant but don't have a REG_EQUAL note on the insn.
5953 Lack of a note will mean src_eqv_elt will be NULL. This
5954 can happen where we've generated a SUBREG to access a
5955 CONST_INT that is already in a register in a wider mode.
5956 Ensure that the source expression is put in the proper
5959 classp = sets[i].src_const_elt;
5961 if (sets[i].src_elt == 0)
5963 /* Don't put a hard register source into the table if this is
5964 the last insn of a libcall. In this case, we only need
5965 to put src_eqv_elt in src_elt. */
5966 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5968 struct table_elt *elt;
5970 /* Note that these insert_regs calls cannot remove
5971 any of the src_elt's, because they would have failed to
5972 match if not still valid. */
5973 if (insert_regs (src, classp, 0))
5975 rehash_using_reg (src);
5976 sets[i].src_hash = HASH (src, mode);
5978 elt = insert (src, classp, sets[i].src_hash, mode);
5979 elt->in_memory = sets[i].src_in_memory;
5980 sets[i].src_elt = classp = elt;
5983 sets[i].src_elt = classp;
5985 if (sets[i].src_const && sets[i].src_const_elt == 0
5986 && src != sets[i].src_const
5987 && ! rtx_equal_p (sets[i].src_const, src))
5988 sets[i].src_elt = insert (sets[i].src_const, classp,
5989 sets[i].src_const_hash, mode);
5992 else if (sets[i].src_elt == 0)
5993 /* If we did not insert the source into the hash table (e.g., it was
5994 volatile), note the equivalence class for the REG_EQUAL value, if any,
5995 so that the destination goes into that class. */
5996 sets[i].src_elt = src_eqv_elt;
5998 /* Record destination addresses in the hash table. This allows us to
5999 check if they are invalidated by other sets. */
6000 for (i = 0; i < n_sets; i++)
6004 rtx x = sets[i].inner_dest;
6005 struct table_elt *elt;
6006 enum machine_mode mode;
6012 mode = GET_MODE (x);
6013 hash = HASH (x, mode);
6014 elt = lookup (x, hash, mode);
6017 if (insert_regs (x, NULL, 0))
6019 rehash_using_reg (x);
6020 hash = HASH (x, mode);
6022 elt = insert (x, NULL, hash, mode);
6025 sets[i].dest_addr_elt = elt;
6028 sets[i].dest_addr_elt = NULL;
6032 invalidate_from_clobbers (x);
6034 /* Some registers are invalidated by subroutine calls. Memory is
6035 invalidated by non-constant calls. */
6039 if (! CONST_OR_PURE_CALL_P (insn))
6040 invalidate_memory ();
6041 invalidate_for_call ();
6044 /* Now invalidate everything set by this instruction.
6045 If a SUBREG or other funny destination is being set,
6046 sets[i].rtl is still nonzero, so here we invalidate the reg
6047 a part of which is being set. */
6049 for (i = 0; i < n_sets; i++)
6052 /* We can't use the inner dest, because the mode associated with
6053 a ZERO_EXTRACT is significant. */
6054 rtx dest = SET_DEST (sets[i].rtl);
6056 /* Needed for registers to remove the register from its
6057 previous quantity's chain.
6058 Needed for memory if this is a nonvarying address, unless
6059 we have just done an invalidate_memory that covers even those. */
6060 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
6061 invalidate (dest, VOIDmode);
6062 else if (MEM_P (dest))
6063 invalidate (dest, VOIDmode);
6064 else if (GET_CODE (dest) == STRICT_LOW_PART
6065 || GET_CODE (dest) == ZERO_EXTRACT)
6066 invalidate (XEXP (dest, 0), GET_MODE (dest));
6069 /* A volatile ASM invalidates everything. */
6070 if (NONJUMP_INSN_P (insn)
6071 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
6072 && MEM_VOLATILE_P (PATTERN (insn)))
6073 flush_hash_table ();
6075 /* Make sure registers mentioned in destinations
6076 are safe for use in an expression to be inserted.
6077 This removes from the hash table
6078 any invalid entry that refers to one of these registers.
6080 We don't care about the return value from mention_regs because
6081 we are going to hash the SET_DEST values unconditionally. */
6083 for (i = 0; i < n_sets; i++)
6087 rtx x = SET_DEST (sets[i].rtl);
6093 /* We used to rely on all references to a register becoming
6094 inaccessible when a register changes to a new quantity,
6095 since that changes the hash code. However, that is not
6096 safe, since after HASH_SIZE new quantities we get a
6097 hash 'collision' of a register with its own invalid
6098 entries. And since SUBREGs have been changed not to
6099 change their hash code with the hash code of the register,
6100 it wouldn't work any longer at all. So we have to check
6101 for any invalid references lying around now.
6102 This code is similar to the REG case in mention_regs,
6103 but it knows that reg_tick has been incremented, and
6104 it leaves reg_in_table as -1 . */
6105 unsigned int regno = REGNO (x);
6106 unsigned int endregno
6107 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
6108 : hard_regno_nregs[regno][GET_MODE (x)]);
6111 for (i = regno; i < endregno; i++)
6113 if (REG_IN_TABLE (i) >= 0)
6115 remove_invalid_refs (i);
6116 REG_IN_TABLE (i) = -1;
6123 /* We may have just removed some of the src_elt's from the hash table.
6124 So replace each one with the current head of the same class.
6125 Also check if destination addresses have been removed. */
6127 for (i = 0; i < n_sets; i++)
6130 if (sets[i].dest_addr_elt
6131 && sets[i].dest_addr_elt->first_same_value == 0)
6133 /* The elt was removed, which means this destination s not
6134 valid after this instruction. */
6135 sets[i].rtl = NULL_RTX;
6137 else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6138 /* If elt was removed, find current head of same class,
6139 or 0 if nothing remains of that class. */
6141 struct table_elt *elt = sets[i].src_elt;
6143 while (elt && elt->prev_same_value)
6144 elt = elt->prev_same_value;
6146 while (elt && elt->first_same_value == 0)
6147 elt = elt->next_same_value;
6148 sets[i].src_elt = elt ? elt->first_same_value : 0;
6152 /* Now insert the destinations into their equivalence classes. */
6154 for (i = 0; i < n_sets; i++)
6157 rtx dest = SET_DEST (sets[i].rtl);
6158 struct table_elt *elt;
6160 /* Don't record value if we are not supposed to risk allocating
6161 floating-point values in registers that might be wider than
6163 if ((flag_float_store
6165 && FLOAT_MODE_P (GET_MODE (dest)))
6166 /* Don't record BLKmode values, because we don't know the
6167 size of it, and can't be sure that other BLKmode values
6168 have the same or smaller size. */
6169 || GET_MODE (dest) == BLKmode
6170 /* Don't record values of destinations set inside a libcall block
6171 since we might delete the libcall. Things should have been set
6172 up so we won't want to reuse such a value, but we play it safe
6175 /* If we didn't put a REG_EQUAL value or a source into the hash
6176 table, there is no point is recording DEST. */
6177 || sets[i].src_elt == 0
6178 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6179 or SIGN_EXTEND, don't record DEST since it can cause
6180 some tracking to be wrong.
6182 ??? Think about this more later. */
6183 || (GET_CODE (dest) == SUBREG
6184 && (GET_MODE_SIZE (GET_MODE (dest))
6185 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6186 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6187 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6190 /* STRICT_LOW_PART isn't part of the value BEING set,
6191 and neither is the SUBREG inside it.
6192 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6193 if (GET_CODE (dest) == STRICT_LOW_PART)
6194 dest = SUBREG_REG (XEXP (dest, 0));
6196 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
6197 /* Registers must also be inserted into chains for quantities. */
6198 if (insert_regs (dest, sets[i].src_elt, 1))
6200 /* If `insert_regs' changes something, the hash code must be
6202 rehash_using_reg (dest);
6203 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6206 elt = insert (dest, sets[i].src_elt,
6207 sets[i].dest_hash, GET_MODE (dest));
6209 elt->in_memory = (MEM_P (sets[i].inner_dest)
6210 && !MEM_READONLY_P (sets[i].inner_dest));
6212 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6213 narrower than M2, and both M1 and M2 are the same number of words,
6214 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6215 make that equivalence as well.
6217 However, BAR may have equivalences for which gen_lowpart
6218 will produce a simpler value than gen_lowpart applied to
6219 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6220 BAR's equivalences. If we don't get a simplified form, make
6221 the SUBREG. It will not be used in an equivalence, but will
6222 cause two similar assignments to be detected.
6224 Note the loop below will find SUBREG_REG (DEST) since we have
6225 already entered SRC and DEST of the SET in the table. */
6227 if (GET_CODE (dest) == SUBREG
6228 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6230 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6231 && (GET_MODE_SIZE (GET_MODE (dest))
6232 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6233 && sets[i].src_elt != 0)
6235 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6236 struct table_elt *elt, *classp = 0;
6238 for (elt = sets[i].src_elt->first_same_value; elt;
6239 elt = elt->next_same_value)
6243 struct table_elt *src_elt;
6246 /* Ignore invalid entries. */
6247 if (!REG_P (elt->exp)
6248 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
6251 /* We may have already been playing subreg games. If the
6252 mode is already correct for the destination, use it. */
6253 if (GET_MODE (elt->exp) == new_mode)
6257 /* Calculate big endian correction for the SUBREG_BYTE.
6258 We have already checked that M1 (GET_MODE (dest))
6259 is not narrower than M2 (new_mode). */
6260 if (BYTES_BIG_ENDIAN)
6261 byte = (GET_MODE_SIZE (GET_MODE (dest))
6262 - GET_MODE_SIZE (new_mode));
6264 new_src = simplify_gen_subreg (new_mode, elt->exp,
6265 GET_MODE (dest), byte);
6268 /* The call to simplify_gen_subreg fails if the value
6269 is VOIDmode, yet we can't do any simplification, e.g.
6270 for EXPR_LISTs denoting function call results.
6271 It is invalid to construct a SUBREG with a VOIDmode
6272 SUBREG_REG, hence a zero new_src means we can't do
6273 this substitution. */
6277 src_hash = HASH (new_src, new_mode);
6278 src_elt = lookup (new_src, src_hash, new_mode);
6280 /* Put the new source in the hash table is if isn't
6284 if (insert_regs (new_src, classp, 0))
6286 rehash_using_reg (new_src);
6287 src_hash = HASH (new_src, new_mode);
6289 src_elt = insert (new_src, classp, src_hash, new_mode);
6290 src_elt->in_memory = elt->in_memory;
6292 else if (classp && classp != src_elt->first_same_value)
6293 /* Show that two things that we've seen before are
6294 actually the same. */
6295 merge_equiv_classes (src_elt, classp);
6297 classp = src_elt->first_same_value;
6298 /* Ignore invalid entries. */
6300 && !REG_P (classp->exp)
6301 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
6302 classp = classp->next_same_value;
6307 /* Special handling for (set REG0 REG1) where REG0 is the
6308 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6309 be used in the sequel, so (if easily done) change this insn to
6310 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6311 that computed their value. Then REG1 will become a dead store
6312 and won't cloud the situation for later optimizations.
6314 Do not make this change if REG1 is a hard register, because it will
6315 then be used in the sequel and we may be changing a two-operand insn
6316 into a three-operand insn.
6318 Also do not do this if we are operating on a copy of INSN.
6320 Also don't do this if INSN ends a libcall; this would cause an unrelated
6321 register to be set in the middle of a libcall, and we then get bad code
6322 if the libcall is deleted. */
6324 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
6325 && NEXT_INSN (PREV_INSN (insn)) == insn
6326 && REG_P (SET_SRC (sets[0].rtl))
6327 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6328 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6330 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6331 struct qty_table_elem *src_ent = &qty_table[src_q];
6333 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6334 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6337 /* Scan for the previous nonnote insn, but stop at a basic
6341 prev = PREV_INSN (prev);
6343 while (prev && NOTE_P (prev)
6344 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6346 /* Do not swap the registers around if the previous instruction
6347 attaches a REG_EQUIV note to REG1.
6349 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6350 from the pseudo that originally shadowed an incoming argument
6351 to another register. Some uses of REG_EQUIV might rely on it
6352 being attached to REG1 rather than REG2.
6354 This section previously turned the REG_EQUIV into a REG_EQUAL
6355 note. We cannot do that because REG_EQUIV may provide an
6356 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6358 if (prev != 0 && NONJUMP_INSN_P (prev)
6359 && GET_CODE (PATTERN (prev)) == SET
6360 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6361 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6363 rtx dest = SET_DEST (sets[0].rtl);
6364 rtx src = SET_SRC (sets[0].rtl);
6367 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6368 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6369 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6370 apply_change_group ();
6372 /* If INSN has a REG_EQUAL note, and this note mentions
6373 REG0, then we must delete it, because the value in
6374 REG0 has changed. If the note's value is REG1, we must
6375 also delete it because that is now this insn's dest. */
6376 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6378 && (reg_mentioned_p (dest, XEXP (note, 0))
6379 || rtx_equal_p (src, XEXP (note, 0))))
6380 remove_note (insn, note);
6385 /* If this is a conditional jump insn, record any known equivalences due to
6386 the condition being tested. */
6389 && n_sets == 1 && GET_CODE (x) == SET
6390 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6391 record_jump_equiv (insn, 0);
6394 /* If the previous insn set CC0 and this insn no longer references CC0,
6395 delete the previous insn. Here we use the fact that nothing expects CC0
6396 to be valid over an insn, which is true until the final pass. */
6397 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6398 && (tem = single_set (prev_insn)) != 0
6399 && SET_DEST (tem) == cc0_rtx
6400 && ! reg_mentioned_p (cc0_rtx, x))
6401 delete_insn (prev_insn);
6403 prev_insn_cc0 = this_insn_cc0;
6404 prev_insn_cc0_mode = this_insn_cc0_mode;
6409 /* Remove from the hash table all expressions that reference memory. */
6412 invalidate_memory (void)
6415 struct table_elt *p, *next;
6417 for (i = 0; i < HASH_SIZE; i++)
6418 for (p = table[i]; p; p = next)
6420 next = p->next_same_hash;
6422 remove_from_table (p, i);
6426 /* If ADDR is an address that implicitly affects the stack pointer, return
6427 1 and update the register tables to show the effect. Else, return 0. */
6430 addr_affects_sp_p (rtx addr)
6432 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
6433 && REG_P (XEXP (addr, 0))
6434 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6436 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6438 REG_TICK (STACK_POINTER_REGNUM)++;
6439 /* Is it possible to use a subreg of SP? */
6440 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6443 /* This should be *very* rare. */
6444 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6445 invalidate (stack_pointer_rtx, VOIDmode);
6453 /* Perform invalidation on the basis of everything about an insn
6454 except for invalidating the actual places that are SET in it.
6455 This includes the places CLOBBERed, and anything that might
6456 alias with something that is SET or CLOBBERed.
6458 X is the pattern of the insn. */
6461 invalidate_from_clobbers (rtx x)
6463 if (GET_CODE (x) == CLOBBER)
6465 rtx ref = XEXP (x, 0);
6468 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6470 invalidate (ref, VOIDmode);
6471 else if (GET_CODE (ref) == STRICT_LOW_PART
6472 || GET_CODE (ref) == ZERO_EXTRACT)
6473 invalidate (XEXP (ref, 0), GET_MODE (ref));
6476 else if (GET_CODE (x) == PARALLEL)
6479 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6481 rtx y = XVECEXP (x, 0, i);
6482 if (GET_CODE (y) == CLOBBER)
6484 rtx ref = XEXP (y, 0);
6485 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6487 invalidate (ref, VOIDmode);
6488 else if (GET_CODE (ref) == STRICT_LOW_PART
6489 || GET_CODE (ref) == ZERO_EXTRACT)
6490 invalidate (XEXP (ref, 0), GET_MODE (ref));
6496 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6497 and replace any registers in them with either an equivalent constant
6498 or the canonical form of the register. If we are inside an address,
6499 only do this if the address remains valid.
6501 OBJECT is 0 except when within a MEM in which case it is the MEM.
6503 Return the replacement for X. */
6506 cse_process_notes (rtx x, rtx object)
6508 enum rtx_code code = GET_CODE (x);
6509 const char *fmt = GET_RTX_FORMAT (code);
6526 validate_change (x, &XEXP (x, 0),
6527 cse_process_notes (XEXP (x, 0), x), 0);
6532 if (REG_NOTE_KIND (x) == REG_EQUAL)
6533 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6535 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6542 rtx new = cse_process_notes (XEXP (x, 0), object);
6543 /* We don't substitute VOIDmode constants into these rtx,
6544 since they would impede folding. */
6545 if (GET_MODE (new) != VOIDmode)
6546 validate_change (object, &XEXP (x, 0), new, 0);
6551 i = REG_QTY (REGNO (x));
6553 /* Return a constant or a constant register. */
6554 if (REGNO_QTY_VALID_P (REGNO (x)))
6556 struct qty_table_elem *ent = &qty_table[i];
6558 if (ent->const_rtx != NULL_RTX
6559 && (CONSTANT_P (ent->const_rtx)
6560 || REG_P (ent->const_rtx)))
6562 rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx);
6568 /* Otherwise, canonicalize this register. */
6569 return canon_reg (x, NULL_RTX);
6575 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6577 validate_change (object, &XEXP (x, i),
6578 cse_process_notes (XEXP (x, i), object), 0);
6583 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6584 since they are done elsewhere. This function is called via note_stores. */
6587 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6589 enum rtx_code code = GET_CODE (dest);
6592 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6593 /* There are times when an address can appear varying and be a PLUS
6594 during this scan when it would be a fixed address were we to know
6595 the proper equivalences. So invalidate all memory if there is
6596 a BLKmode or nonscalar memory reference or a reference to a
6597 variable address. */
6598 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6599 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6601 invalidate_memory ();
6605 if (GET_CODE (set) == CLOBBER
6610 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6611 invalidate (XEXP (dest, 0), GET_MODE (dest));
6612 else if (code == REG || code == SUBREG || code == MEM)
6613 invalidate (dest, VOIDmode);
6616 /* Invalidate all insns from START up to the end of the function or the
6617 next label. This called when we wish to CSE around a block that is
6618 conditionally executed. */
6621 invalidate_skipped_block (rtx start)
6625 for (insn = start; insn && !LABEL_P (insn);
6626 insn = NEXT_INSN (insn))
6628 if (! INSN_P (insn))
6633 if (! CONST_OR_PURE_CALL_P (insn))
6634 invalidate_memory ();
6635 invalidate_for_call ();
6638 invalidate_from_clobbers (PATTERN (insn));
6639 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6643 /* Find the end of INSN's basic block and return its range,
6644 the total number of SETs in all the insns of the block, the last insn of the
6645 block, and the branch path.
6647 The branch path indicates which branches should be followed. If a nonzero
6648 path size is specified, the block should be rescanned and a different set
6649 of branches will be taken. The branch path is only used if
6650 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6652 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6653 used to describe the block. It is filled in with the information about
6654 the current block. The incoming structure's branch path, if any, is used
6655 to construct the output branch path. */
6658 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6659 int follow_jumps, int skip_blocks)
6663 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6664 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6665 int path_size = data->path_size;
6669 /* Update the previous branch path, if any. If the last branch was
6670 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6671 If it was previously PATH_NOT_TAKEN,
6672 shorten the path by one and look at the previous branch. We know that
6673 at least one branch must have been taken if PATH_SIZE is nonzero. */
6674 while (path_size > 0)
6676 if (data->path[path_size - 1].status != PATH_NOT_TAKEN)
6678 data->path[path_size - 1].status = PATH_NOT_TAKEN;
6685 /* If the first instruction is marked with QImode, that means we've
6686 already processed this block. Our caller will look at DATA->LAST
6687 to figure out where to go next. We want to return the next block
6688 in the instruction stream, not some branched-to block somewhere
6689 else. We accomplish this by pretending our called forbid us to
6690 follow jumps, or skip blocks. */
6691 if (GET_MODE (insn) == QImode)
6692 follow_jumps = skip_blocks = 0;
6694 /* Scan to end of this basic block. */
6695 while (p && !LABEL_P (p))
6697 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6698 the regs restored by the longjmp come from
6699 a later time than the setjmp. */
6700 if (PREV_INSN (p) && CALL_P (PREV_INSN (p))
6701 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6704 /* A PARALLEL can have lots of SETs in it,
6705 especially if it is really an ASM_OPERANDS. */
6706 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6707 nsets += XVECLEN (PATTERN (p), 0);
6708 else if (!NOTE_P (p))
6711 /* Ignore insns made by CSE; they cannot affect the boundaries of
6714 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6715 high_cuid = INSN_CUID (p);
6716 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6717 low_cuid = INSN_CUID (p);
6719 /* See if this insn is in our branch path. If it is and we are to
6721 if (path_entry < path_size && data->path[path_entry].branch == p)
6723 if (data->path[path_entry].status != PATH_NOT_TAKEN)
6726 /* Point to next entry in path, if any. */
6730 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6731 was specified, we haven't reached our maximum path length, there are
6732 insns following the target of the jump, this is the only use of the
6733 jump label, and the target label is preceded by a BARRIER.
6735 Alternatively, we can follow the jump if it branches around a
6736 block of code and there are no other branches into the block.
6737 In this case invalidate_skipped_block will be called to invalidate any
6738 registers set in the block when following the jump. */
6740 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6742 && GET_CODE (PATTERN (p)) == SET
6743 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6744 && JUMP_LABEL (p) != 0
6745 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6746 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6748 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6750 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6751 || (PREV_INSN (q) && CALL_P (PREV_INSN (q))
6752 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6753 && (!LABEL_P (q) || LABEL_NUSES (q) != 0))
6756 /* If we ran into a BARRIER, this code is an extension of the
6757 basic block when the branch is taken. */
6758 if (follow_jumps && q != 0 && BARRIER_P (q))
6760 /* Don't allow ourself to keep walking around an
6761 always-executed loop. */
6762 if (next_real_insn (q) == next)
6768 /* Similarly, don't put a branch in our path more than once. */
6769 for (i = 0; i < path_entry; i++)
6770 if (data->path[i].branch == p)
6773 if (i != path_entry)
6776 data->path[path_entry].branch = p;
6777 data->path[path_entry++].status = PATH_TAKEN;
6779 /* This branch now ends our path. It was possible that we
6780 didn't see this branch the last time around (when the
6781 insn in front of the target was a JUMP_INSN that was
6782 turned into a no-op). */
6783 path_size = path_entry;
6786 /* Mark block so we won't scan it again later. */
6787 PUT_MODE (NEXT_INSN (p), QImode);
6789 /* Detect a branch around a block of code. */
6790 else if (skip_blocks && q != 0 && !LABEL_P (q))
6794 if (next_real_insn (q) == next)
6800 for (i = 0; i < path_entry; i++)
6801 if (data->path[i].branch == p)
6804 if (i != path_entry)
6807 /* This is no_labels_between_p (p, q) with an added check for
6808 reaching the end of a function (in case Q precedes P). */
6809 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6815 data->path[path_entry].branch = p;
6816 data->path[path_entry++].status = PATH_AROUND;
6818 path_size = path_entry;
6821 /* Mark block so we won't scan it again later. */
6822 PUT_MODE (NEXT_INSN (p), QImode);
6829 data->low_cuid = low_cuid;
6830 data->high_cuid = high_cuid;
6831 data->nsets = nsets;
6834 /* If all jumps in the path are not taken, set our path length to zero
6835 so a rescan won't be done. */
6836 for (i = path_size - 1; i >= 0; i--)
6837 if (data->path[i].status != PATH_NOT_TAKEN)
6841 data->path_size = 0;
6843 data->path_size = path_size;
6845 /* End the current branch path. */
6846 data->path[path_size].branch = 0;
6849 /* Perform cse on the instructions of a function.
6850 F is the first instruction.
6851 NREGS is one plus the highest pseudo-reg number used in the instruction.
6853 Returns 1 if jump_optimize should be redone due to simplifications
6854 in conditional jump instructions. */
6857 cse_main (rtx f, int nregs, FILE *file)
6859 struct cse_basic_block_data val;
6863 init_cse_reg_info (nregs);
6865 val.path = xmalloc (sizeof (struct branch_path)
6866 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6868 cse_jumps_altered = 0;
6869 recorded_label_ref = 0;
6870 constant_pool_entries_cost = 0;
6871 constant_pool_entries_regcost = 0;
6873 rtl_hooks = cse_rtl_hooks;
6876 init_alias_analysis ();
6878 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
6880 /* Find the largest uid. */
6882 max_uid = get_max_uid ();
6883 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
6885 /* Compute the mapping from uids to cuids.
6886 CUIDs are numbers assigned to insns, like uids,
6887 except that cuids increase monotonically through the code.
6888 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6889 between two insns is not affected by -g. */
6891 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6894 || NOTE_LINE_NUMBER (insn) < 0)
6895 INSN_CUID (insn) = ++i;
6897 /* Give a line number note the same cuid as preceding insn. */
6898 INSN_CUID (insn) = i;
6901 /* Loop over basic blocks.
6902 Compute the maximum number of qty's needed for each basic block
6903 (which is 2 for each SET). */
6908 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps,
6909 flag_cse_skip_blocks);
6911 /* If this basic block was already processed or has no sets, skip it. */
6912 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6914 PUT_MODE (insn, VOIDmode);
6915 insn = (val.last ? NEXT_INSN (val.last) : 0);
6920 cse_basic_block_start = val.low_cuid;
6921 cse_basic_block_end = val.high_cuid;
6922 max_qty = val.nsets * 2;
6925 fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
6926 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6929 /* Make MAX_QTY bigger to give us room to optimize
6930 past the end of this basic block, if that should prove useful. */
6934 /* If this basic block is being extended by following certain jumps,
6935 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6936 Otherwise, we start after this basic block. */
6937 if (val.path_size > 0)
6938 cse_basic_block (insn, val.last, val.path);
6941 int old_cse_jumps_altered = cse_jumps_altered;
6944 /* When cse changes a conditional jump to an unconditional
6945 jump, we want to reprocess the block, since it will give
6946 us a new branch path to investigate. */
6947 cse_jumps_altered = 0;
6948 temp = cse_basic_block (insn, val.last, val.path);
6949 if (cse_jumps_altered == 0
6950 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6953 cse_jumps_altered |= old_cse_jumps_altered;
6965 end_alias_analysis ();
6967 free (reg_eqv_table);
6969 rtl_hooks = general_rtl_hooks;
6971 return cse_jumps_altered || recorded_label_ref;
6974 /* Process a single basic block. FROM and TO and the limits of the basic
6975 block. NEXT_BRANCH points to the branch path when following jumps or
6976 a null path when not following jumps. */
6979 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch)
6983 rtx libcall_insn = NULL_RTX;
6985 int no_conflict = 0;
6987 /* Allocate the space needed by qty_table. */
6988 qty_table = xmalloc (max_qty * sizeof (struct qty_table_elem));
6992 /* TO might be a label. If so, protect it from being deleted. */
6993 if (to != 0 && LABEL_P (to))
6996 for (insn = from; insn != to; insn = NEXT_INSN (insn))
6998 enum rtx_code code = GET_CODE (insn);
7000 /* If we have processed 1,000 insns, flush the hash table to
7001 avoid extreme quadratic behavior. We must not include NOTEs
7002 in the count since there may be more of them when generating
7003 debugging information. If we clear the table at different
7004 times, code generated with -g -O might be different than code
7005 generated with -O but not -g.
7007 ??? This is a real kludge and needs to be done some other way.
7009 if (code != NOTE && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS))
7011 flush_hash_table ();
7015 /* See if this is a branch that is part of the path. If so, and it is
7016 to be taken, do so. */
7017 if (next_branch->branch == insn)
7019 enum taken status = next_branch++->status;
7020 if (status != PATH_NOT_TAKEN)
7022 if (status == PATH_TAKEN)
7023 record_jump_equiv (insn, 1);
7025 invalidate_skipped_block (NEXT_INSN (insn));
7027 /* Set the last insn as the jump insn; it doesn't affect cc0.
7028 Then follow this branch. */
7033 insn = JUMP_LABEL (insn);
7038 if (GET_MODE (insn) == QImode)
7039 PUT_MODE (insn, VOIDmode);
7041 if (GET_RTX_CLASS (code) == RTX_INSN)
7045 /* Process notes first so we have all notes in canonical forms when
7046 looking for duplicate operations. */
7048 if (REG_NOTES (insn))
7049 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7051 /* Track when we are inside in LIBCALL block. Inside such a block,
7052 we do not want to record destinations. The last insn of a
7053 LIBCALL block is not considered to be part of the block, since
7054 its destination is the result of the block and hence should be
7057 if (REG_NOTES (insn) != 0)
7059 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7060 libcall_insn = XEXP (p, 0);
7061 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7063 /* Keep libcall_insn for the last SET insn of a no-conflict
7064 block to prevent changing the destination. */
7070 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
7074 cse_insn (insn, libcall_insn);
7076 if (no_conflict == -1)
7082 /* If we haven't already found an insn where we added a LABEL_REF,
7084 if (NONJUMP_INSN_P (insn) && ! recorded_label_ref
7085 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7087 recorded_label_ref = 1;
7090 /* If INSN is now an unconditional jump, skip to the end of our
7091 basic block by pretending that we just did the last insn in the
7092 basic block. If we are jumping to the end of our block, show
7093 that we can have one usage of TO. */
7095 if (any_uncondjump_p (insn))
7103 if (JUMP_LABEL (insn) == to)
7106 /* Maybe TO was deleted because the jump is unconditional.
7107 If so, there is nothing left in this basic block. */
7108 /* ??? Perhaps it would be smarter to set TO
7109 to whatever follows this insn,
7110 and pretend the basic block had always ended here. */
7111 if (INSN_DELETED_P (to))
7114 insn = PREV_INSN (to);
7117 /* See if it is ok to keep on going past the label
7118 which used to end our basic block. Remember that we incremented
7119 the count of that label, so we decrement it here. If we made
7120 a jump unconditional, TO_USAGE will be one; in that case, we don't
7121 want to count the use in that jump. */
7123 if (to != 0 && NEXT_INSN (insn) == to
7124 && LABEL_P (to) && --LABEL_NUSES (to) == to_usage)
7126 struct cse_basic_block_data val;
7129 insn = NEXT_INSN (to);
7131 /* If TO was the last insn in the function, we are done. */
7138 /* If TO was preceded by a BARRIER we are done with this block
7139 because it has no continuation. */
7140 prev = prev_nonnote_insn (to);
7141 if (prev && BARRIER_P (prev))
7147 /* Find the end of the following block. Note that we won't be
7148 following branches in this case. */
7151 val.path = xmalloc (sizeof (struct branch_path)
7152 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7153 cse_end_of_basic_block (insn, &val, 0, 0);
7156 /* If the tables we allocated have enough space left
7157 to handle all the SETs in the next basic block,
7158 continue through it. Otherwise, return,
7159 and that block will be scanned individually. */
7160 if (val.nsets * 2 + next_qty > max_qty)
7163 cse_basic_block_start = val.low_cuid;
7164 cse_basic_block_end = val.high_cuid;
7167 /* Prevent TO from being deleted if it is a label. */
7168 if (to != 0 && LABEL_P (to))
7171 /* Back up so we process the first insn in the extension. */
7172 insn = PREV_INSN (insn);
7176 gcc_assert (next_qty <= max_qty);
7180 return to ? NEXT_INSN (to) : 0;
7183 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7184 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7187 check_for_label_ref (rtx *rtl, void *data)
7189 rtx insn = (rtx) data;
7191 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7192 we must rerun jump since it needs to place the note. If this is a
7193 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7194 since no REG_LABEL will be added. */
7195 return (GET_CODE (*rtl) == LABEL_REF
7196 && ! LABEL_REF_NONLOCAL_P (*rtl)
7197 && LABEL_P (XEXP (*rtl, 0))
7198 && INSN_UID (XEXP (*rtl, 0)) != 0
7199 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7202 /* Count the number of times registers are used (not set) in X.
7203 COUNTS is an array in which we accumulate the count, INCR is how much
7204 we count each register usage.
7206 Don't count a usage of DEST, which is the SET_DEST of a SET which
7207 contains X in its SET_SRC. This is because such a SET does not
7208 modify the liveness of DEST.
7209 DEST is set to pc_rtx for a trapping insn, which means that we must count
7210 uses of a SET_DEST regardless because the insn can't be deleted here. */
7213 count_reg_usage (rtx x, int *counts, rtx dest, int incr)
7223 switch (code = GET_CODE (x))
7227 counts[REGNO (x)] += incr;
7241 /* If we are clobbering a MEM, mark any registers inside the address
7243 if (MEM_P (XEXP (x, 0)))
7244 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7248 /* Unless we are setting a REG, count everything in SET_DEST. */
7249 if (!REG_P (SET_DEST (x)))
7250 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7251 count_reg_usage (SET_SRC (x), counts,
7252 dest ? dest : SET_DEST (x),
7259 /* We expect dest to be NULL_RTX here. If the insn may trap, mark
7260 this fact by setting DEST to pc_rtx. */
7261 if (flag_non_call_exceptions && may_trap_p (PATTERN (x)))
7263 if (code == CALL_INSN)
7264 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
7265 count_reg_usage (PATTERN (x), counts, dest, incr);
7267 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7270 note = find_reg_equal_equiv_note (x);
7273 rtx eqv = XEXP (note, 0);
7275 if (GET_CODE (eqv) == EXPR_LIST)
7276 /* This REG_EQUAL note describes the result of a function call.
7277 Process all the arguments. */
7280 count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
7281 eqv = XEXP (eqv, 1);
7283 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7285 count_reg_usage (eqv, counts, dest, incr);
7290 if (REG_NOTE_KIND (x) == REG_EQUAL
7291 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7292 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7293 involving registers in the address. */
7294 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7295 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7297 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7301 /* If the asm is volatile, then this insn cannot be deleted,
7302 and so the inputs *must* be live. */
7303 if (MEM_VOLATILE_P (x))
7305 /* Iterate over just the inputs, not the constraints as well. */
7306 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7307 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
7317 fmt = GET_RTX_FORMAT (code);
7318 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7321 count_reg_usage (XEXP (x, i), counts, dest, incr);
7322 else if (fmt[i] == 'E')
7323 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7324 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7328 /* Return true if set is live. */
7330 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7337 if (set_noop_p (set))
7341 else if (GET_CODE (SET_DEST (set)) == CC0
7342 && !side_effects_p (SET_SRC (set))
7343 && ((tem = next_nonnote_insn (insn)) == 0
7345 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7348 else if (!REG_P (SET_DEST (set))
7349 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7350 || counts[REGNO (SET_DEST (set))] != 0
7351 || side_effects_p (SET_SRC (set)))
7356 /* Return true if insn is live. */
7359 insn_live_p (rtx insn, int *counts)
7362 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7364 else if (GET_CODE (PATTERN (insn)) == SET)
7365 return set_live_p (PATTERN (insn), insn, counts);
7366 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7368 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7370 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7372 if (GET_CODE (elt) == SET)
7374 if (set_live_p (elt, insn, counts))
7377 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7386 /* Return true if libcall is dead as a whole. */
7389 dead_libcall_p (rtx insn, int *counts)
7393 /* See if there's a REG_EQUAL note on this insn and try to
7394 replace the source with the REG_EQUAL expression.
7396 We assume that insns with REG_RETVALs can only be reg->reg
7397 copies at this point. */
7398 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7402 set = single_set (insn);
7406 new = simplify_rtx (XEXP (note, 0));
7408 new = XEXP (note, 0);
7410 /* While changing insn, we must update the counts accordingly. */
7411 count_reg_usage (insn, counts, NULL_RTX, -1);
7413 if (validate_change (insn, &SET_SRC (set), new, 0))
7415 count_reg_usage (insn, counts, NULL_RTX, 1);
7416 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7417 remove_note (insn, note);
7421 if (CONSTANT_P (new))
7423 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7424 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7426 count_reg_usage (insn, counts, NULL_RTX, 1);
7427 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7428 remove_note (insn, note);
7433 count_reg_usage (insn, counts, NULL_RTX, 1);
7437 /* Scan all the insns and delete any that are dead; i.e., they store a register
7438 that is never used or they copy a register to itself.
7440 This is used to remove insns made obviously dead by cse, loop or other
7441 optimizations. It improves the heuristics in loop since it won't try to
7442 move dead invariants out of loops or make givs for dead quantities. The
7443 remaining passes of the compilation are also sped up. */
7446 delete_trivially_dead_insns (rtx insns, int nreg)
7450 int in_libcall = 0, dead_libcall = 0;
7453 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7454 /* First count the number of times each register is used. */
7455 counts = xcalloc (nreg, sizeof (int));
7456 for (insn = insns; insn; insn = NEXT_INSN (insn))
7458 count_reg_usage (insn, counts, NULL_RTX, 1);
7460 /* Go from the last insn to the first and delete insns that only set unused
7461 registers or copy a register to itself. As we delete an insn, remove
7462 usage counts for registers it uses.
7464 The first jump optimization pass may leave a real insn as the last
7465 insn in the function. We must not skip that insn or we may end
7466 up deleting code that is not really dead. */
7467 for (insn = get_last_insn (); insn; insn = prev)
7471 prev = PREV_INSN (insn);
7475 /* Don't delete any insns that are part of a libcall block unless
7476 we can delete the whole libcall block.
7478 Flow or loop might get confused if we did that. Remember
7479 that we are scanning backwards. */
7480 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7484 dead_libcall = dead_libcall_p (insn, counts);
7486 else if (in_libcall)
7487 live_insn = ! dead_libcall;
7489 live_insn = insn_live_p (insn, counts);
7491 /* If this is a dead insn, delete it and show registers in it aren't
7496 count_reg_usage (insn, counts, NULL_RTX, -1);
7497 delete_insn_and_edges (insn);
7501 if (in_libcall && find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7508 if (dump_file && ndead)
7509 fprintf (dump_file, "Deleted %i trivially dead insns\n",
7513 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7517 /* This function is called via for_each_rtx. The argument, NEWREG, is
7518 a condition code register with the desired mode. If we are looking
7519 at the same register in a different mode, replace it with
7523 cse_change_cc_mode (rtx *loc, void *data)
7525 struct change_cc_mode_args* args = (struct change_cc_mode_args*)data;
7529 && REGNO (*loc) == REGNO (args->newreg)
7530 && GET_MODE (*loc) != GET_MODE (args->newreg))
7532 validate_change (args->insn, loc, args->newreg, 1);
7539 /* Change the mode of any reference to the register REGNO (NEWREG) to
7540 GET_MODE (NEWREG) in INSN. */
7543 cse_change_cc_mode_insn (rtx insn, rtx newreg)
7545 struct change_cc_mode_args args;
7552 args.newreg = newreg;
7554 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args);
7555 for_each_rtx (®_NOTES (insn), cse_change_cc_mode, &args);
7557 /* If the following assertion was triggered, there is most probably
7558 something wrong with the cc_modes_compatible back end function.
7559 CC modes only can be considered compatible if the insn - with the mode
7560 replaced by any of the compatible modes - can still be recognized. */
7561 success = apply_change_group ();
7562 gcc_assert (success);
7565 /* Change the mode of any reference to the register REGNO (NEWREG) to
7566 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7567 any instruction which modifies NEWREG. */
7570 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7574 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7576 if (! INSN_P (insn))
7579 if (reg_set_p (newreg, insn))
7582 cse_change_cc_mode_insn (insn, newreg);
7586 /* BB is a basic block which finishes with CC_REG as a condition code
7587 register which is set to CC_SRC. Look through the successors of BB
7588 to find blocks which have a single predecessor (i.e., this one),
7589 and look through those blocks for an assignment to CC_REG which is
7590 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7591 permitted to change the mode of CC_SRC to a compatible mode. This
7592 returns VOIDmode if no equivalent assignments were found.
7593 Otherwise it returns the mode which CC_SRC should wind up with.
7595 The main complexity in this function is handling the mode issues.
7596 We may have more than one duplicate which we can eliminate, and we
7597 try to find a mode which will work for multiple duplicates. */
7599 static enum machine_mode
7600 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
7603 enum machine_mode mode;
7604 unsigned int insn_count;
7607 enum machine_mode modes[2];
7613 /* We expect to have two successors. Look at both before picking
7614 the final mode for the comparison. If we have more successors
7615 (i.e., some sort of table jump, although that seems unlikely),
7616 then we require all beyond the first two to use the same
7619 found_equiv = false;
7620 mode = GET_MODE (cc_src);
7622 FOR_EACH_EDGE (e, ei, bb->succs)
7627 if (e->flags & EDGE_COMPLEX)
7630 if (EDGE_COUNT (e->dest->preds) != 1
7631 || e->dest == EXIT_BLOCK_PTR)
7634 end = NEXT_INSN (BB_END (e->dest));
7635 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7639 if (! INSN_P (insn))
7642 /* If CC_SRC is modified, we have to stop looking for
7643 something which uses it. */
7644 if (modified_in_p (cc_src, insn))
7647 /* Check whether INSN sets CC_REG to CC_SRC. */
7648 set = single_set (insn);
7650 && REG_P (SET_DEST (set))
7651 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7654 enum machine_mode set_mode;
7655 enum machine_mode comp_mode;
7658 set_mode = GET_MODE (SET_SRC (set));
7659 comp_mode = set_mode;
7660 if (rtx_equal_p (cc_src, SET_SRC (set)))
7662 else if (GET_CODE (cc_src) == COMPARE
7663 && GET_CODE (SET_SRC (set)) == COMPARE
7665 && rtx_equal_p (XEXP (cc_src, 0),
7666 XEXP (SET_SRC (set), 0))
7667 && rtx_equal_p (XEXP (cc_src, 1),
7668 XEXP (SET_SRC (set), 1)))
7671 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7672 if (comp_mode != VOIDmode
7673 && (can_change_mode || comp_mode == mode))
7680 if (insn_count < ARRAY_SIZE (insns))
7682 insns[insn_count] = insn;
7683 modes[insn_count] = set_mode;
7684 last_insns[insn_count] = end;
7687 if (mode != comp_mode)
7689 gcc_assert (can_change_mode);
7692 /* The modified insn will be re-recognized later. */
7693 PUT_MODE (cc_src, mode);
7698 if (set_mode != mode)
7700 /* We found a matching expression in the
7701 wrong mode, but we don't have room to
7702 store it in the array. Punt. This case
7706 /* INSN sets CC_REG to a value equal to CC_SRC
7707 with the right mode. We can simply delete
7712 /* We found an instruction to delete. Keep looking,
7713 in the hopes of finding a three-way jump. */
7717 /* We found an instruction which sets the condition
7718 code, so don't look any farther. */
7722 /* If INSN sets CC_REG in some other way, don't look any
7724 if (reg_set_p (cc_reg, insn))
7728 /* If we fell off the bottom of the block, we can keep looking
7729 through successors. We pass CAN_CHANGE_MODE as false because
7730 we aren't prepared to handle compatibility between the
7731 further blocks and this block. */
7734 enum machine_mode submode;
7736 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
7737 if (submode != VOIDmode)
7739 gcc_assert (submode == mode);
7741 can_change_mode = false;
7749 /* Now INSN_COUNT is the number of instructions we found which set
7750 CC_REG to a value equivalent to CC_SRC. The instructions are in
7751 INSNS. The modes used by those instructions are in MODES. */
7754 for (i = 0; i < insn_count; ++i)
7756 if (modes[i] != mode)
7758 /* We need to change the mode of CC_REG in INSNS[i] and
7759 subsequent instructions. */
7762 if (GET_MODE (cc_reg) == mode)
7765 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7767 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7771 delete_insn (insns[i]);
7777 /* If we have a fixed condition code register (or two), walk through
7778 the instructions and try to eliminate duplicate assignments. */
7781 cse_condition_code_reg (void)
7783 unsigned int cc_regno_1;
7784 unsigned int cc_regno_2;
7789 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7792 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7793 if (cc_regno_2 != INVALID_REGNUM)
7794 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7796 cc_reg_2 = NULL_RTX;
7805 enum machine_mode mode;
7806 enum machine_mode orig_mode;
7808 /* Look for blocks which end with a conditional jump based on a
7809 condition code register. Then look for the instruction which
7810 sets the condition code register. Then look through the
7811 successor blocks for instructions which set the condition
7812 code register to the same value. There are other possible
7813 uses of the condition code register, but these are by far the
7814 most common and the ones which we are most likely to be able
7817 last_insn = BB_END (bb);
7818 if (!JUMP_P (last_insn))
7821 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7823 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7828 cc_src_insn = NULL_RTX;
7830 for (insn = PREV_INSN (last_insn);
7831 insn && insn != PREV_INSN (BB_HEAD (bb));
7832 insn = PREV_INSN (insn))
7836 if (! INSN_P (insn))
7838 set = single_set (insn);
7840 && REG_P (SET_DEST (set))
7841 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7844 cc_src = SET_SRC (set);
7847 else if (reg_set_p (cc_reg, insn))
7854 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7857 /* Now CC_REG is a condition code register used for a
7858 conditional jump at the end of the block, and CC_SRC, in
7859 CC_SRC_INSN, is the value to which that condition code
7860 register is set, and CC_SRC is still meaningful at the end of
7863 orig_mode = GET_MODE (cc_src);
7864 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
7865 if (mode != VOIDmode)
7867 gcc_assert (mode == GET_MODE (cc_src));
7868 if (mode != orig_mode)
7870 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7872 cse_change_cc_mode_insn (cc_src_insn, newreg);
7874 /* Do the same in the following insns that use the
7875 current value of CC_REG within BB. */
7876 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7877 NEXT_INSN (last_insn),
7885 /* Perform common subexpression elimination. Nonzero value from
7886 `cse_main' means that jumps were simplified and some code may now
7887 be unreachable, so do jump optimization again. */
7889 gate_handle_cse (void)
7891 return optimize > 0;
7895 rest_of_handle_cse (void)
7900 dump_flow_info (dump_file);
7902 reg_scan (get_insns (), max_reg_num ());
7904 tem = cse_main (get_insns (), max_reg_num (), dump_file);
7906 rebuild_jump_labels (get_insns ());
7907 if (purge_all_dead_edges ())
7908 delete_unreachable_blocks ();
7910 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7912 /* If we are not running more CSE passes, then we are no longer
7913 expecting CSE to be run. But always rerun it in a cheap mode. */
7914 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7917 delete_dead_jumptables ();
7919 if (tem || optimize > 1)
7920 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_PRE_LOOP);
7923 struct tree_opt_pass pass_cse =
7926 gate_handle_cse, /* gate */
7927 rest_of_handle_cse, /* execute */
7930 0, /* static_pass_number */
7932 0, /* properties_required */
7933 0, /* properties_provided */
7934 0, /* properties_destroyed */
7935 0, /* todo_flags_start */
7937 TODO_ggc_collect, /* todo_flags_finish */
7943 gate_handle_cse2 (void)
7945 return optimize > 0 && flag_rerun_cse_after_loop;
7948 /* Run second CSE pass after loop optimizations. */
7950 rest_of_handle_cse2 (void)
7955 dump_flow_info (dump_file);
7957 tem = cse_main (get_insns (), max_reg_num (), dump_file);
7959 /* Run a pass to eliminate duplicated assignments to condition code
7960 registers. We have to run this after bypass_jumps, because it
7961 makes it harder for that pass to determine whether a jump can be
7963 cse_condition_code_reg ();
7965 purge_all_dead_edges ();
7966 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7970 timevar_push (TV_JUMP);
7971 rebuild_jump_labels (get_insns ());
7972 delete_dead_jumptables ();
7973 cleanup_cfg (CLEANUP_EXPENSIVE);
7974 timevar_pop (TV_JUMP);
7976 reg_scan (get_insns (), max_reg_num ());
7977 cse_not_expected = 1;
7981 struct tree_opt_pass pass_cse2 =
7984 gate_handle_cse2, /* gate */
7985 rest_of_handle_cse2, /* execute */
7988 0, /* static_pass_number */
7989 TV_CSE2, /* tv_id */
7990 0, /* properties_required */
7991 0, /* properties_provided */
7992 0, /* properties_destroyed */
7993 0, /* todo_flags_start */
7995 TODO_ggc_collect, /* todo_flags_finish */