1 /* $NetBSD: ehci.c,v 1.91 2005/02/27 00:27:51 perry Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/ehci.c,v 1.36.2.3 2006/09/24 13:39:04 iedowse Exp $ */
3 /* $DragonFly: src/sys/bus/usb/ehci.c,v 1.36 2008/08/14 20:55:53 hasso Exp $ */
6 * Copyright (c) 2004 The NetBSD Foundation, Inc.
9 * This code is derived from software contributed to The NetBSD Foundation
10 * by Lennart Augustsson (lennart@augustsson.net) and by Charles M. Hannum.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the NetBSD
23 * Foundation, Inc. and its contributors.
24 * 4. Neither the name of The NetBSD Foundation nor the names of its
25 * contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
42 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
44 * The EHCI 1.0 spec can be found at
45 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
46 * and the USB 2.0 spec at
47 * http://www.usb.org/developers/docs/usb_20.zip
53 * 1) The EHCI driver lacks support for isochronous transfers, so
54 * devices using them don't work.
56 * 2) Interrupt transfer scheduling does not manage the time available
57 * in each frame, so it is possible for the transfers to overrun
58 * the end of the frame.
60 * 3) Command failures are not recovered correctly.
63 #include <sys/param.h>
64 #include <sys/systm.h>
65 #include <sys/malloc.h>
66 #include <sys/kernel.h>
67 #include <sys/endian.h>
68 #include <sys/module.h>
72 #include <sys/queue.h>
73 #include <sys/sysctl.h>
74 #include <sys/thread2.h>
76 #include <machine/cpu.h>
77 #include <machine/endian.h>
79 #include <bus/usb/usb.h>
80 #include <bus/usb/usbdi.h>
81 #include <bus/usb/usbdivar.h>
82 #include <bus/usb/usb_mem.h>
83 #include <bus/usb/usb_quirks.h>
85 #include <bus/usb/ehcireg.h>
86 #include <bus/usb/ehcivar.h>
89 #define EHCI_DEBUG USB_DEBUG
90 #define DPRINTF(x) do { if (ehcidebug) kprintf x; } while (0)
91 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) kprintf x; } while (0)
93 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
94 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
95 &ehcidebug, 0, "ehci debug level");
96 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
103 struct usbd_pipe pipe;
107 ehci_soft_qtd_t *qtd;
108 /* ehci_soft_itd_t *itd; */
115 /*ehci_soft_qtd_t *setup, *data, *stat;*/
130 static usbd_status ehci_open(usbd_pipe_handle);
131 static void ehci_poll(struct usbd_bus *);
132 static void ehci_softintr(void *);
133 static int ehci_intr1(ehci_softc_t *);
134 static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
135 static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
136 static void ehci_idone(struct ehci_xfer *);
137 static void ehci_timeout(void *);
138 static void ehci_timeout_task(void *);
139 static void ehci_intrlist_timeout(void *);
141 static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
142 static void ehci_freem(struct usbd_bus *, usb_dma_t *);
144 static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
145 static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
147 static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
148 static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
149 static void ehci_root_ctrl_abort(usbd_xfer_handle);
150 static void ehci_root_ctrl_close(usbd_pipe_handle);
151 static void ehci_root_ctrl_done(usbd_xfer_handle);
153 static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
154 static usbd_status ehci_root_intr_start(usbd_xfer_handle);
155 static void ehci_root_intr_abort(usbd_xfer_handle);
156 static void ehci_root_intr_close(usbd_pipe_handle);
157 static void ehci_root_intr_done(usbd_xfer_handle);
159 static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
160 static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
161 static void ehci_device_ctrl_abort(usbd_xfer_handle);
162 static void ehci_device_ctrl_close(usbd_pipe_handle);
163 static void ehci_device_ctrl_done(usbd_xfer_handle);
165 static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
166 static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
167 static void ehci_device_bulk_abort(usbd_xfer_handle);
168 static void ehci_device_bulk_close(usbd_pipe_handle);
169 static void ehci_device_bulk_done(usbd_xfer_handle);
171 static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
172 static usbd_status ehci_device_intr_start(usbd_xfer_handle);
173 static void ehci_device_intr_abort(usbd_xfer_handle);
174 static void ehci_device_intr_close(usbd_pipe_handle);
175 static void ehci_device_intr_done(usbd_xfer_handle);
177 static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
178 static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
179 static void ehci_device_isoc_abort(usbd_xfer_handle);
180 static void ehci_device_isoc_close(usbd_pipe_handle);
181 static void ehci_device_isoc_done(usbd_xfer_handle);
183 static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
184 static void ehci_noop(usbd_pipe_handle pipe);
186 static int ehci_str(usb_string_descriptor_t *, int, char *);
187 static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
188 static void ehci_disown(ehci_softc_t *, int, int);
190 static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
191 static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
193 static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
194 static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
195 static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *,
196 ehci_softc_t *, int, int, usbd_xfer_handle,
197 ehci_soft_qtd_t **, ehci_soft_qtd_t **);
198 static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
201 static usbd_status ehci_device_request(usbd_xfer_handle xfer);
203 static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
206 static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
207 static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
209 static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
210 static void ehci_sync_hc(ehci_softc_t *);
212 static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
213 static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
216 static void ehci_dump_regs(ehci_softc_t *);
217 void ehci_dump(void);
218 static ehci_softc_t *theehci;
219 static void ehci_dump_link(ehci_link_t, int);
220 static void ehci_dump_sqtds(ehci_soft_qtd_t *);
221 static void ehci_dump_sqtd(ehci_soft_qtd_t *);
222 static void ehci_dump_qtd(ehci_qtd_t *);
223 static void ehci_dump_sqh(ehci_soft_qh_t *);
225 static void ehci_dump_exfer(struct ehci_xfer *);
229 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
231 #define EHCI_INTR_ENDPT 1
233 #define ehci_add_intr_list(sc, ex) \
234 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
235 #define ehci_del_intr_list(ex) \
237 LIST_REMOVE((ex), inext); \
238 (ex)->inext.le_prev = NULL; \
240 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
242 static struct usbd_bus_methods ehci_bus_methods = {
252 static struct usbd_pipe_methods ehci_root_ctrl_methods = {
253 ehci_root_ctrl_transfer,
254 ehci_root_ctrl_start,
255 ehci_root_ctrl_abort,
256 ehci_root_ctrl_close,
261 static struct usbd_pipe_methods ehci_root_intr_methods = {
262 ehci_root_intr_transfer,
263 ehci_root_intr_start,
264 ehci_root_intr_abort,
265 ehci_root_intr_close,
270 static struct usbd_pipe_methods ehci_device_ctrl_methods = {
271 ehci_device_ctrl_transfer,
272 ehci_device_ctrl_start,
273 ehci_device_ctrl_abort,
274 ehci_device_ctrl_close,
276 ehci_device_ctrl_done,
279 static struct usbd_pipe_methods ehci_device_intr_methods = {
280 ehci_device_intr_transfer,
281 ehci_device_intr_start,
282 ehci_device_intr_abort,
283 ehci_device_intr_close,
284 ehci_device_clear_toggle,
285 ehci_device_intr_done,
288 static struct usbd_pipe_methods ehci_device_bulk_methods = {
289 ehci_device_bulk_transfer,
290 ehci_device_bulk_start,
291 ehci_device_bulk_abort,
292 ehci_device_bulk_close,
293 ehci_device_clear_toggle,
294 ehci_device_bulk_done,
297 static struct usbd_pipe_methods ehci_device_isoc_methods = {
298 ehci_device_isoc_transfer,
299 ehci_device_isoc_start,
300 ehci_device_isoc_abort,
301 ehci_device_isoc_close,
303 ehci_device_isoc_done,
307 ehci_init(ehci_softc_t *sc)
309 u_int32_t vers, sparams, cparams, hcr;
316 DPRINTF(("ehci_init: start\n"));
321 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
323 vers = EREAD2(sc, EHCI_HCIVERSION);
324 device_printf(sc->sc_bus.bdev,
325 "EHCI version %x.%x\n", vers >> 8, vers & 0xff);
326 /* Disable all interrupts */
327 EOWRITE4(sc, EHCI_USBINTR, 0);
329 sparams = EREAD4(sc, EHCI_HCSPARAMS);
330 DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
331 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
332 ncomp = EHCI_HCS_N_CC(sparams);
333 if (ncomp != sc->sc_ncomp) {
334 device_printf(sc->sc_bus.bdev,
335 "wrong number of companions (%d != %d)\n",
336 ncomp, sc->sc_ncomp);
337 if (ncomp < sc->sc_ncomp)
338 sc->sc_ncomp = ncomp;
340 if (sc->sc_ncomp > 0) {
341 device_printf(sc->sc_bus.bdev,
342 "companion controller%s, %d port%s each:",
343 sc->sc_ncomp!=1 ? "s" : "",
344 EHCI_HCS_N_PCC(sparams),
345 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
346 for (i = 0; i < sc->sc_ncomp; i++)
347 kprintf(" %s", device_get_nameunit(sc->sc_comps[i]->bdev));
350 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
351 cparams = EREAD4(sc, EHCI_HCCPARAMS);
352 DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
354 if (EHCI_HCC_64BIT(cparams)) {
355 /* MUST clear segment register if 64 bit capable. */
356 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
359 sc->sc_bus.usbrev = USBREV_2_0;
361 /* Reset the controller */
362 DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev)));
363 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
364 usb_delay_ms(&sc->sc_bus, 1);
365 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
366 for (i = 0; i < 100; i++) {
367 usb_delay_ms(&sc->sc_bus, 1);
368 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
373 device_printf(sc->sc_bus.bdev, "reset timeout\n");
374 return (USBD_IOERROR);
377 /* frame list size at default, read back what we got and use that */
378 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
379 case 0: sc->sc_flsize = 1024; break;
380 case 1: sc->sc_flsize = 512; break;
381 case 2: sc->sc_flsize = 256; break;
382 case 3: return (USBD_IOERROR);
384 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
385 EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
388 DPRINTF(("%s: flsize=%d\n", device_get_nameunit(sc->sc_bus.bdev),sc->sc_flsize));
389 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
390 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
392 /* Set up the bus struct. */
393 sc->sc_bus.methods = &ehci_bus_methods;
394 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
396 sc->sc_eintrs = EHCI_NORMAL_INTRS;
399 * Allocate the interrupt dummy QHs. These are arranged to give
400 * poll intervals that are powers of 2 times 1ms.
402 for (i = 0; i < EHCI_INTRQHS; i++) {
403 sqh = ehci_alloc_sqh(sc);
408 sc->sc_islots[i].sqh = sqh;
411 for (i = 0; i < EHCI_INTRQHS; i++) {
412 if (i == EHCI_IQHIDX(lev + 1, 0))
414 sqh = sc->sc_islots[i].sqh;
416 /* The last (1ms) QH terminates. */
417 sqh->qh.qh_link = EHCI_NULL;
420 /* Otherwise the next QH has half the poll interval */
422 sc->sc_islots[EHCI_IQHIDX(lev - 1, i + 1)].sqh;
423 sqh->qh.qh_link = htole32(sqh->next->physaddr |
426 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
427 sqh->qh.qh_endphub = htole32(EHCI_QH_SET_MULT(1));
428 sqh->qh.qh_curqtd = EHCI_NULL;
429 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
430 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
431 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
434 /* Point the frame list at the last level (128ms). */
435 for (i = 0; i < sc->sc_flsize; i++) {
436 sc->sc_flist[i] = htole32(EHCI_LINK_QH |
437 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
441 /* Allocate dummy QH that starts the async list. */
442 sqh = ehci_alloc_sqh(sc);
449 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
451 htole32(sqh->physaddr | EHCI_LINK_QH);
452 sqh->qh.qh_curqtd = EHCI_NULL;
453 sqh->prev = sqh; /*It's a circular list.. */
455 /* Fill the overlay qTD */
456 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
457 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
458 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
466 /* Point to async list */
467 sc->sc_async_head = sqh;
468 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
470 callout_init(&sc->sc_tmo_intrlist);
472 lockinit(&sc->sc_doorbell_lock, "ehcidb", 0, 0);
474 /* Turn on controller */
475 EOWRITE4(sc, EHCI_USBCMD,
476 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
477 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
482 /* Take over port ownership */
483 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
485 for (i = 0; i < 100; i++) {
486 usb_delay_ms(&sc->sc_bus, 1);
487 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
492 device_printf(sc->sc_bus.bdev, "run timeout\n");
493 return (USBD_IOERROR);
497 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
498 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
502 return (USBD_NORMAL_COMPLETION);
506 ehci_free_sqh(sc, sc->sc_async_head);
509 usb_freemem(&sc->sc_bus, &sc->sc_fldma);
516 ehci_softc_t *sc = v;
518 if (sc->sc_dying || (sc->sc_flags & EHCI_SCFLG_DONEINIT) == 0)
521 /* If we get an interrupt while polling, then just ignore it. */
522 if (sc->sc_bus.use_polling) {
523 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
526 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
528 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
533 return (ehci_intr1(sc));
537 ehci_intr1(ehci_softc_t *sc)
539 u_int32_t intrs, eintrs;
541 DPRINTFN(20,("ehci_intr1: enter\n"));
543 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
547 eintrs = intrs & sc->sc_eintrs;
548 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
549 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
554 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
555 sc->sc_bus.intr_context++;
556 sc->sc_bus.no_intrs++;
557 if (eintrs & EHCI_STS_IAA) {
558 DPRINTF(("ehci_intr1: door bell\n"));
559 wakeup(&sc->sc_async_head);
560 eintrs &= ~EHCI_STS_IAA;
562 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
563 DPRINTFN(5,("ehci_intr1: %s %s\n",
564 eintrs & EHCI_STS_INT ? "INT" : "",
565 eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
566 usb_schedsoftintr(&sc->sc_bus);
567 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
569 if (eintrs & EHCI_STS_HSE) {
570 device_printf(sc->sc_bus.bdev,
571 "unrecoverable error, controller halted\n");
574 if (eintrs & EHCI_STS_PCD) {
575 ehci_pcd(sc, sc->sc_intrxfer);
576 eintrs &= ~EHCI_STS_PCD;
579 sc->sc_bus.intr_context--;
582 /* Block unprocessed interrupts. */
583 sc->sc_eintrs &= ~eintrs;
584 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
585 device_printf(sc->sc_bus.bdev,
586 "blocking intrs 0x%x\n", eintrs);
593 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
599 /* Just ignore the change. */
603 p = KERNADDR(&xfer->dmabuf, 0);
604 m = min(sc->sc_noport, xfer->length * 8 - 1);
605 memset(p, 0, xfer->length);
606 for (i = 1; i <= m; i++) {
607 /* Pick out CHANGE bits from the status reg. */
608 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
609 p[i/8] |= 1 << (i%8);
611 DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
612 xfer->actlen = xfer->length;
613 xfer->status = USBD_NORMAL_COMPLETION;
615 usb_transfer_complete(xfer);
619 ehci_softintr(void *v)
621 ehci_softc_t *sc = v;
622 struct ehci_xfer *ex, *nextex;
624 DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_get_nameunit(sc->sc_bus.bdev),
625 sc->sc_bus.intr_context));
627 sc->sc_bus.intr_context++;
630 * The only explanation I can think of for why EHCI is as brain dead
631 * as UHCI interrupt-wise is that Intel was involved in both.
632 * An interrupt just tells us that something is done, we have no
633 * clue what, so we need to scan through all active transfers. :-(
635 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
636 nextex = LIST_NEXT(ex, inext);
637 ehci_check_intr(sc, ex);
640 /* Schedule a callout to catch any dropped transactions. */
641 if ((sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) &&
642 !LIST_EMPTY(&sc->sc_intrhead))
643 callout_reset(&sc->sc_tmo_intrlist, hz / 5, ehci_intrlist_timeout,
646 #ifdef USB_USE_SOFTINTR
647 if (sc->sc_softwake) {
649 wakeup(&sc->sc_softwake);
651 #endif /* USB_USE_SOFTINTR */
653 sc->sc_bus.intr_context--;
656 /* Check for an interrupt. */
658 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
660 ehci_soft_qtd_t *sqtd, *lsqtd;
663 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
665 if (ex->sqtdstart == NULL) {
666 kprintf("ehci_check_intr: sqtdstart=NULL\n");
672 kprintf("ehci_check_intr: lsqtd==0\n");
677 * If the last TD is still active we need to check whether there
678 * is a an error somewhere in the middle, or whether there was a
679 * short packet (SPD and not ACTIVE).
681 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
682 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
683 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
684 status = le32toh(sqtd->qtd.qtd_status);
685 /* If there's an active QTD the xfer isn't done. */
686 if (status & EHCI_QTD_ACTIVE)
688 /* Any kind of error makes the xfer done. */
689 if (status & EHCI_QTD_HALTED)
691 /* We want short packets, and it is short: it's done */
692 if (EHCI_QTD_GET_BYTES(status) != 0)
695 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
700 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
701 callout_stop(&ex->xfer.timeout_handle);
702 usb_rem_task(ex->xfer.pipe->device, &ex->abort_task);
707 ehci_idone(struct ehci_xfer *ex)
709 usbd_xfer_handle xfer = &ex->xfer;
711 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
713 ehci_soft_qtd_t *sqtd, *lsqtd;
714 u_int32_t status = 0, nstatus = 0;
717 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
724 kprintf("ehci_idone: ex is done!\n ");
727 kprintf("ehci_idone: ex=%p is done!\n", ex);
736 if (xfer->status == USBD_CANCELLED ||
737 xfer->status == USBD_TIMEOUT) {
738 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
743 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
745 ehci_dump_sqtds(ex->sqtdstart);
748 /* The transfer is done, compute actual length and status. */
751 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
752 nstatus = le32toh(sqtd->qtd.qtd_status);
753 if (nstatus & EHCI_QTD_ACTIVE)
757 /* halt is ok if descriptor is last, and complete */
758 if (sqtd->qtd.qtd_next == EHCI_NULL &&
759 EHCI_QTD_GET_BYTES(status) == 0)
760 status &= ~EHCI_QTD_HALTED;
761 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
762 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
765 cerr = EHCI_QTD_GET_CERR(status);
766 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, cerr=%d, "
767 "status=0x%x\n", xfer->length, actlen, cerr, status));
768 xfer->actlen = actlen;
769 if ((status & EHCI_QTD_HALTED) != 0) {
773 bitmask_snprintf((u_int32_t)status,
774 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
775 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
778 ("ehci_idone: error, addr=%d, endpt=0x%02x, "
780 xfer->pipe->device->address,
781 xfer->pipe->endpoint->edesc->bEndpointAddress,
784 ehci_dump_sqh(epipe->sqh);
785 ehci_dump_sqtds(ex->sqtdstart);
788 if ((status & EHCI_QTD_BABBLE) == 0 && cerr > 0)
789 xfer->status = USBD_STALLED;
791 xfer->status = USBD_IOERROR; /* more info XXX */
793 xfer->status = USBD_NORMAL_COMPLETION;
796 usb_transfer_complete(xfer);
797 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
801 * Wait here until controller claims to have an interrupt.
802 * Then call ehci_intr and return. Use timeout to avoid waiting
806 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
808 int timo = xfer->timeout;
812 xfer->status = USBD_IN_PROGRESS;
813 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
814 usb_delay_ms(&sc->sc_bus, 1);
817 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
819 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
826 if (xfer->status != USBD_IN_PROGRESS)
832 DPRINTF(("ehci_waitintr: timeout\n"));
833 xfer->status = USBD_TIMEOUT;
834 usb_transfer_complete(xfer);
835 /* XXX should free TD */
839 ehci_poll(struct usbd_bus *bus)
841 ehci_softc_t *sc = (ehci_softc_t *)bus;
845 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
847 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
858 ehci_detach(struct ehci_softc *sc, int flags)
864 EOWRITE4(sc, EHCI_USBINTR, 0);
865 EOWRITE4(sc, EHCI_USBCMD, 0);
866 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
868 callout_stop(&sc->sc_tmo_intrlist);
870 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
872 usb_freemem(&sc->sc_bus, &sc->sc_fldma);
873 /* XXX free other data structures XXX */
879 * Handle suspend/resume.
881 * We need to switch to polling mode here, because this routine is
882 * called from an interrupt context. This is all right since we
883 * are almost suspended anyway.
886 ehci_power(int why, void *v)
888 ehci_softc_t *sc = v;
893 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
902 sc->sc_bus.use_polling++;
904 for (i = 1; i <= sc->sc_noport; i++) {
905 cmd = EOREAD4(sc, EHCI_PORTSC(i));
906 if ((cmd & EHCI_PS_PO) == 0 &&
907 (cmd & EHCI_PS_PE) == EHCI_PS_PE)
908 EOWRITE4(sc, EHCI_PORTSC(i),
912 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
914 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
915 EOWRITE4(sc, EHCI_USBCMD, cmd);
917 for (i = 0; i < 100; i++) {
918 hcr = EOREAD4(sc, EHCI_USBSTS) &
919 (EHCI_STS_ASS | EHCI_STS_PSS);
923 usb_delay_ms(&sc->sc_bus, 1);
926 device_printf(sc->sc_bus.bdev, "reset timeout\n");
930 EOWRITE4(sc, EHCI_USBCMD, cmd);
932 for (i = 0; i < 100; i++) {
933 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
934 if (hcr == EHCI_STS_HCH)
937 usb_delay_ms(&sc->sc_bus, 1);
939 if (hcr != EHCI_STS_HCH) {
940 device_printf(sc->sc_bus.bdev, "config timeout\n");
943 sc->sc_bus.use_polling--;
947 sc->sc_bus.use_polling++;
949 /* restore things in case the bios sucks */
950 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
951 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
952 EOWRITE4(sc, EHCI_ASYNCLISTADDR,
953 sc->sc_async_head->physaddr | EHCI_LINK_QH);
954 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
957 for (i = 1; i <= sc->sc_noport; i++) {
958 cmd = EOREAD4(sc, EHCI_PORTSC(i));
959 if ((cmd & EHCI_PS_PO) == 0 &&
960 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) {
961 EOWRITE4(sc, EHCI_PORTSC(i),
968 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
970 for (i = 1; i <= sc->sc_noport; i++) {
971 cmd = EOREAD4(sc, EHCI_PORTSC(i));
972 if ((cmd & EHCI_PS_PO) == 0 &&
973 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)
974 EOWRITE4(sc, EHCI_PORTSC(i),
979 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
981 for (i = 0; i < 100; i++) {
982 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
983 if (hcr != EHCI_STS_HCH)
986 usb_delay_ms(&sc->sc_bus, 1);
988 if (hcr == EHCI_STS_HCH) {
989 device_printf(sc->sc_bus.bdev, "config timeout\n");
992 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
994 sc->sc_bus.use_polling--;
1000 DPRINTF(("ehci_power: sc=%p\n", sc));
1007 * Shut down the controller when the system is going down.
1010 ehci_shutdown(void *v)
1012 ehci_softc_t *sc = v;
1014 DPRINTF(("ehci_shutdown: stopping the HC\n"));
1015 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
1016 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
1020 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
1024 err = usb_allocmem(bus, size, 0, dma);
1027 kprintf("ehci_allocm: usb_allocmem()=%d\n", err);
1033 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1035 usb_freemem(bus, dma);
1039 ehci_allocx(struct usbd_bus *bus)
1041 struct ehci_softc *sc = (struct ehci_softc *)bus;
1042 usbd_xfer_handle xfer;
1044 xfer = STAILQ_FIRST(&sc->sc_free_xfers);
1046 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1048 if (xfer->busy_free != XFER_FREE) {
1049 kprintf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1054 xfer = kmalloc(sizeof(struct ehci_xfer), M_USB, M_INTWAIT);
1057 memset(xfer, 0, sizeof(struct ehci_xfer));
1058 usb_init_task(&EXFER(xfer)->abort_task, ehci_timeout_task,
1060 EXFER(xfer)->ehci_xfer_flags = 0;
1062 EXFER(xfer)->isdone = 1;
1063 xfer->busy_free = XFER_BUSY;
1070 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1072 struct ehci_softc *sc = (struct ehci_softc *)bus;
1075 if (xfer->busy_free != XFER_BUSY) {
1076 kprintf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1080 xfer->busy_free = XFER_FREE;
1081 if (!EXFER(xfer)->isdone) {
1082 kprintf("ehci_freex: !isdone\n");
1086 STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1090 ehci_device_clear_toggle(usbd_pipe_handle pipe)
1092 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1094 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1095 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1098 usbd_dump_pipe(pipe);
1100 KASSERT((epipe->sqh->qh.qh_qtd.qtd_status &
1101 htole32(EHCI_QTD_ACTIVE)) == 0,
1102 ("ehci_device_clear_toggle: queue active"));
1103 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE_MASK);
1107 ehci_noop(usbd_pipe_handle pipe)
1113 ehci_dump_regs(ehci_softc_t *sc)
1116 kprintf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1117 EOREAD4(sc, EHCI_USBCMD),
1118 EOREAD4(sc, EHCI_USBSTS),
1119 EOREAD4(sc, EHCI_USBINTR));
1120 kprintf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1121 EOREAD4(sc, EHCI_FRINDEX),
1122 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1123 EOREAD4(sc, EHCI_PERIODICLISTBASE),
1124 EOREAD4(sc, EHCI_ASYNCLISTADDR));
1125 for (i = 1; i <= sc->sc_noport; i++)
1126 kprintf("port %d status=0x%08x\n", i,
1127 EOREAD4(sc, EHCI_PORTSC(i)));
1131 * Unused function - this is meant to be called from a kernel
1137 ehci_dump_regs(theehci);
1141 ehci_dump_link(ehci_link_t link, int type)
1143 link = le32toh(link);
1144 kprintf("0x%08x", link);
1145 if (link & EHCI_LINK_TERMINATE)
1150 switch (EHCI_LINK_TYPE(link)) {
1151 case EHCI_LINK_ITD: kprintf("ITD"); break;
1152 case EHCI_LINK_QH: kprintf("QH"); break;
1153 case EHCI_LINK_SITD: kprintf("SITD"); break;
1154 case EHCI_LINK_FSTN: kprintf("FSTN"); break;
1162 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1168 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1169 ehci_dump_sqtd(sqtd);
1170 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
1173 kprintf("dump aborted, too many TDs\n");
1177 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1179 kprintf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1180 ehci_dump_qtd(&sqtd->qtd);
1184 ehci_dump_qtd(ehci_qtd_t *qtd)
1189 kprintf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1190 kprintf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1192 s = le32toh(qtd->qtd_status);
1193 bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1194 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1195 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1196 kprintf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1197 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1198 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1199 kprintf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1200 EHCI_QTD_GET_PID(s), sbuf);
1201 for (s = 0; s < 5; s++)
1202 kprintf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1206 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1208 ehci_qh_t *qh = &sqh->qh;
1209 u_int32_t endp, endphub;
1211 kprintf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1212 kprintf(" link="); ehci_dump_link(qh->qh_link, 1); kprintf("\n");
1213 endp = le32toh(qh->qh_endp);
1214 kprintf(" endp=0x%08x\n", endp);
1215 kprintf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1216 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1217 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1218 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1219 kprintf(" mpl=0x%x ctl=%d nrl=%d\n",
1220 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1221 EHCI_QH_GET_NRL(endp));
1222 endphub = le32toh(qh->qh_endphub);
1223 kprintf(" endphub=0x%08x\n", endphub);
1224 kprintf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1225 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1226 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1227 EHCI_QH_GET_MULT(endphub));
1228 kprintf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); kprintf("\n");
1229 kprintf("Overlay qTD:\n");
1230 ehci_dump_qtd(&qh->qh_qtd);
1235 ehci_dump_exfer(struct ehci_xfer *ex)
1237 kprintf("ehci_dump_exfer: ex=%p\n", ex);
1243 ehci_open(usbd_pipe_handle pipe)
1245 usbd_device_handle dev = pipe->device;
1246 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1247 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1248 u_int8_t addr = dev->address;
1249 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1250 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1251 ehci_soft_qh_t *sqh;
1253 int ival, speed, naks;
1254 int hshubaddr, hshubport;
1256 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1257 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1259 if (dev->myhsport) {
1260 hshubaddr = dev->myhsport->parent->address;
1261 hshubport = dev->myhsport->portno;
1268 return (USBD_IOERROR);
1270 if (addr == sc->sc_addr) {
1271 switch (ed->bEndpointAddress) {
1272 case USB_CONTROL_ENDPOINT:
1273 pipe->methods = &ehci_root_ctrl_methods;
1275 case UE_DIR_IN | EHCI_INTR_ENDPT:
1276 pipe->methods = &ehci_root_intr_methods;
1279 return (USBD_INVAL);
1281 return (USBD_NORMAL_COMPLETION);
1284 /* XXX All this stuff is only valid for async. */
1285 switch (dev->speed) {
1286 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1287 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1288 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1289 default: panic("ehci_open: bad device speed %d", dev->speed);
1291 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
1292 device_printf(sc->sc_bus.bdev,
1293 "*** WARNING: opening low/full speed device, this "
1294 "does not work yet.\n");
1295 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
1296 hshubaddr, hshubport));
1301 sqh = ehci_alloc_sqh(sc);
1304 /* qh_link filled when the QH is added */
1305 sqh->qh.qh_endp = htole32(
1306 EHCI_QH_SET_ADDR(addr) |
1307 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
1308 EHCI_QH_SET_EPS(speed) |
1309 (xfertype == UE_CONTROL ? EHCI_QH_DTC : 0) |
1310 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1311 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1313 EHCI_QH_SET_NRL(naks)
1315 sqh->qh.qh_endphub = htole32(
1316 EHCI_QH_SET_MULT(1) |
1317 EHCI_QH_SET_HUBA(hshubaddr) |
1318 EHCI_QH_SET_PORT(hshubport) |
1319 EHCI_QH_SET_CMASK(0x1c) |
1320 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
1322 sqh->qh.qh_curqtd = EHCI_NULL;
1323 /* Fill the overlay qTD */
1324 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1325 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1326 sqh->qh.qh_qtd.qtd_status =
1327 htole32(EHCI_QTD_SET_TOGGLE(pipe->endpoint->savedtoggle));
1333 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1334 0, &epipe->u.ctl.reqdma);
1337 kprintf("ehci_open: usb_allocmem()=%d\n", err);
1341 pipe->methods = &ehci_device_ctrl_methods;
1343 ehci_add_qh(sqh, sc->sc_async_head);
1347 pipe->methods = &ehci_device_bulk_methods;
1349 ehci_add_qh(sqh, sc->sc_async_head);
1353 pipe->methods = &ehci_device_intr_methods;
1354 ival = pipe->interval;
1355 if (ival == USBD_DEFAULT_INTERVAL)
1356 ival = ed->bInterval;
1357 return (ehci_device_setintr(sc, sqh, ival));
1358 case UE_ISOCHRONOUS:
1359 pipe->methods = &ehci_device_isoc_methods;
1360 return (USBD_INVAL);
1362 return (USBD_INVAL);
1364 return (USBD_NORMAL_COMPLETION);
1367 ehci_free_sqh(sc, sqh);
1369 return (USBD_NOMEM);
1373 * Add an ED to the schedule. Called while in a critical section.
1374 * If in the async schedule, it will always have a next.
1375 * If in the intr schedule it may not.
1378 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1380 sqh->next = head->next;
1382 sqh->qh.qh_link = head->qh.qh_link;
1385 sqh->next->prev = sqh;
1386 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1389 if (ehcidebug > 5) {
1390 kprintf("ehci_add_qh:\n");
1397 * Remove an ED from the schedule. Called while in a critical section.
1398 * Will always have a 'next' if it's in the async list as it's circular.
1401 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1404 sqh->prev->qh.qh_link = sqh->qh.qh_link;
1405 sqh->prev->next = sqh->next;
1407 sqh->next->prev = sqh->prev;
1412 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1417 /* Save toggle bit and ping status. */
1418 status = sqh->qh.qh_qtd.qtd_status &
1419 htole32(EHCI_QTD_TOGGLE_MASK |
1420 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
1421 /* Set HALTED to make hw leave it alone. */
1422 sqh->qh.qh_qtd.qtd_status =
1423 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
1424 sqh->qh.qh_curqtd = 0;
1425 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1426 sqh->qh.qh_qtd.qtd_altnext = 0;
1427 for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
1428 sqh->qh.qh_qtd.qtd_buffer[i] = 0;
1430 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */
1431 sqh->qh.qh_qtd.qtd_status = status;
1435 * Ensure that the HC has released all references to the QH. We do this
1436 * by asking for a Async Advance Doorbell interrupt and then we wait for
1438 * To make this easier we first obtain exclusive use of the doorbell.
1441 ehci_sync_hc(ehci_softc_t *sc)
1446 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1449 DPRINTFN(2,("ehci_sync_hc: enter\n"));
1451 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE);
1453 /* ask for doorbell */
1454 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1455 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1456 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1457 error = tsleep(&sc->sc_async_head, 0, "ehcidi", hz); /* bell wait */
1458 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1459 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1461 /* release doorbell */
1462 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE);
1465 kprintf("ehci_sync_hc: tsleep() = %d\n", error);
1467 DPRINTFN(2,("ehci_sync_hc: exit\n"));
1473 * Data structures and routines to emulate the root hub.
1475 static usb_device_descriptor_t ehci_devd = {
1476 USB_DEVICE_DESCRIPTOR_SIZE,
1477 UDESC_DEVICE, /* type */
1478 {0x00, 0x02}, /* USB version */
1479 UDCLASS_HUB, /* class */
1480 UDSUBCLASS_HUB, /* subclass */
1481 UDPROTO_HSHUBSTT, /* protocol */
1482 64, /* max packet */
1483 {0},{0},{0x00,0x01}, /* device id */
1484 1,2,0, /* string indicies */
1485 1 /* # of configurations */
1488 static usb_device_qualifier_t ehci_odevd = {
1489 USB_DEVICE_DESCRIPTOR_SIZE,
1490 UDESC_DEVICE_QUALIFIER, /* type */
1491 {0x00, 0x02}, /* USB version */
1492 UDCLASS_HUB, /* class */
1493 UDSUBCLASS_HUB, /* subclass */
1494 UDPROTO_FSHUB, /* protocol */
1495 64, /* max packet */
1496 1, /* # of configurations */
1500 static usb_config_descriptor_t ehci_confd = {
1501 USB_CONFIG_DESCRIPTOR_SIZE,
1503 {USB_CONFIG_DESCRIPTOR_SIZE +
1504 USB_INTERFACE_DESCRIPTOR_SIZE +
1505 USB_ENDPOINT_DESCRIPTOR_SIZE},
1513 static usb_interface_descriptor_t ehci_ifcd = {
1514 USB_INTERFACE_DESCRIPTOR_SIZE,
1525 static usb_endpoint_descriptor_t ehci_endpd = {
1526 USB_ENDPOINT_DESCRIPTOR_SIZE,
1528 UE_DIR_IN | EHCI_INTR_ENDPT,
1530 {8, 0}, /* max packet */
1534 static usb_hub_descriptor_t ehci_hubd = {
1535 USB_HUB_DESCRIPTOR_SIZE,
1545 ehci_str(usb_string_descriptor_t *p, int l, char *s)
1551 p->bLength = 2 * strlen(s) + 2;
1554 p->bDescriptorType = UDESC_STRING;
1556 for (i = 0; s[i] && l > 1; i++, l -= 2)
1557 USETW2(p->bString[i], 0, s[i]);
1562 * Simulate a hardware hub by handling all the necessary requests.
1565 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1569 /* Insert last in queue. */
1570 err = usb_insert_transfer(xfer);
1574 /* Pipe isn't running, start first */
1575 return (ehci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
1579 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1581 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1582 usb_device_request_t *req;
1585 int len, value, index, l, totlen = 0;
1586 usb_port_status_t ps;
1587 usb_hub_descriptor_t hubd;
1592 return (USBD_IOERROR);
1595 if (!(xfer->rqflags & URQ_REQUEST))
1597 return (USBD_INVAL);
1599 req = &xfer->request;
1601 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
1602 req->bmRequestType, req->bRequest));
1604 len = UGETW(req->wLength);
1605 value = UGETW(req->wValue);
1606 index = UGETW(req->wIndex);
1609 buf = KERNADDR(&xfer->dmabuf, 0);
1611 #define C(x,y) ((x) | ((y) << 8))
1612 switch(C(req->bRequest, req->bmRequestType)) {
1613 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1614 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1615 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1617 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1618 * for the integrated root hub.
1621 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1623 *(u_int8_t *)buf = sc->sc_conf;
1627 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1628 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
1629 switch(value >> 8) {
1631 if ((value & 0xff) != 0) {
1635 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1636 USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1637 memcpy(buf, &ehci_devd, l);
1640 * We can't really operate at another speed, but the spec says
1641 * we need this descriptor.
1643 case UDESC_DEVICE_QUALIFIER:
1644 if ((value & 0xff) != 0) {
1648 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1649 memcpy(buf, &ehci_odevd, l);
1652 * We can't really operate at another speed, but the spec says
1653 * we need this descriptor.
1655 case UDESC_OTHER_SPEED_CONFIGURATION:
1657 if ((value & 0xff) != 0) {
1661 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1662 memcpy(buf, &ehci_confd, l);
1663 ((usb_config_descriptor_t *)buf)->bDescriptorType =
1665 buf = (char *)buf + l;
1667 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1669 memcpy(buf, &ehci_ifcd, l);
1670 buf = (char *)buf + l;
1672 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1674 memcpy(buf, &ehci_endpd, l);
1679 *(u_int8_t *)buf = 0;
1681 switch (value & 0xff) {
1682 case 0: /* Language table */
1683 totlen = ehci_str(buf, len, "\001");
1685 case 1: /* Vendor */
1686 totlen = ehci_str(buf, len, sc->sc_vendor);
1688 case 2: /* Product */
1689 totlen = ehci_str(buf, len, "EHCI root hub");
1698 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1700 *(u_int8_t *)buf = 0;
1704 case C(UR_GET_STATUS, UT_READ_DEVICE):
1706 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1710 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1711 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1713 USETW(((usb_status_t *)buf)->wStatus, 0);
1717 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1718 if (value >= USB_MAX_DEVICES) {
1722 sc->sc_addr = value;
1724 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1725 if (value != 0 && value != 1) {
1729 sc->sc_conf = value;
1731 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1733 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1734 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1735 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1738 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1740 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1743 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1745 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1746 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
1747 "port=%d feature=%d\n",
1749 if (index < 1 || index > sc->sc_noport) {
1753 port = EHCI_PORTSC(index);
1754 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1756 case UHF_PORT_ENABLE:
1757 EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1759 case UHF_PORT_SUSPEND:
1760 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1762 case UHF_PORT_POWER:
1763 EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1766 DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
1769 case UHF_PORT_INDICATOR:
1770 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
1772 EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1774 case UHF_C_PORT_CONNECTION:
1775 EOWRITE4(sc, port, v | EHCI_PS_CSC);
1777 case UHF_C_PORT_ENABLE:
1778 EOWRITE4(sc, port, v | EHCI_PS_PEC);
1780 case UHF_C_PORT_SUSPEND:
1783 case UHF_C_PORT_OVER_CURRENT:
1784 EOWRITE4(sc, port, v | EHCI_PS_OCC);
1786 case UHF_C_PORT_RESET:
1794 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1795 if ((value & 0xff) != 0) {
1800 hubd.bNbrPorts = sc->sc_noport;
1801 v = EOREAD4(sc, EHCI_HCSPARAMS);
1802 USETW(hubd.wHubCharacteristics,
1803 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1804 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1805 ? UHD_PORT_IND : 0);
1806 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1807 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1808 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1809 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1810 l = min(len, hubd.bDescLength);
1812 memcpy(buf, &hubd, l);
1814 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1819 memset(buf, 0, len); /* ? XXX */
1822 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1823 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
1825 if (index < 1 || index > sc->sc_noport) {
1833 v = EOREAD4(sc, EHCI_PORTSC(index));
1834 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", v));
1836 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1837 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1838 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1839 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1840 if (v & EHCI_PS_PR) i |= UPS_RESET;
1841 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1842 USETW(ps.wPortStatus, i);
1844 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1845 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1846 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1847 if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1848 USETW(ps.wPortChange, i);
1849 l = min(len, sizeof ps);
1850 memcpy(buf, &ps, l);
1853 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1856 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1858 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1859 if (index < 1 || index > sc->sc_noport) {
1863 port = EHCI_PORTSC(index);
1864 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1866 case UHF_PORT_ENABLE:
1867 EOWRITE4(sc, port, v | EHCI_PS_PE);
1869 case UHF_PORT_SUSPEND:
1870 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1872 case UHF_PORT_RESET:
1873 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
1875 if (EHCI_PS_IS_LOWSPEED(v)) {
1876 /* Low speed device, give up ownership. */
1877 ehci_disown(sc, index, 1);
1880 /* Start reset sequence. */
1881 v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1882 EOWRITE4(sc, port, v | EHCI_PS_PR);
1883 /* Wait for reset to complete. */
1884 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1889 /* Terminate reset sequence. */
1890 EOWRITE4(sc, port, v);
1891 /* Wait for HC to complete reset. */
1892 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1897 v = EOREAD4(sc, port);
1898 DPRINTF(("ehci after reset, status=0x%08x\n", v));
1899 if (v & EHCI_PS_PR) {
1900 device_printf(sc->sc_bus.bdev,
1901 "port reset timeout\n");
1902 return (USBD_TIMEOUT);
1904 if (!(v & EHCI_PS_PE)) {
1905 /* Not a high speed device, give up ownership.*/
1906 ehci_disown(sc, index, 0);
1910 DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1913 case UHF_PORT_POWER:
1914 DPRINTFN(2,("ehci_root_ctrl_start: set port power "
1916 EOWRITE4(sc, port, v | EHCI_PS_PP);
1919 DPRINTFN(2,("ehci_root_ctrl_start: set port test "
1922 case UHF_PORT_INDICATOR:
1923 DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
1925 EOWRITE4(sc, port, v | EHCI_PS_PIC);
1932 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1933 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1934 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1935 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1941 xfer->actlen = totlen;
1942 err = USBD_NORMAL_COMPLETION;
1946 usb_transfer_complete(xfer);
1948 return (USBD_IN_PROGRESS);
1952 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1957 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1959 if (sc->sc_npcomp != 0) {
1960 int i = (index-1) / sc->sc_npcomp;
1961 if (i >= sc->sc_ncomp)
1962 device_printf(sc->sc_bus.bdev, "strange port\n");
1964 device_printf(sc->sc_bus.bdev,
1965 "handing over %s speed device on port %d to %s\n",
1966 (lowspeed ? "low" : "full"),
1967 index, device_get_nameunit(sc->sc_comps[i]->bdev));
1969 device_printf(sc->sc_bus.bdev, "npcomp == 0\n");
1972 port = EHCI_PORTSC(index);
1973 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1974 EOWRITE4(sc, port, v | EHCI_PS_PO);
1977 /* Abort a root control request. */
1979 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1981 /* Nothing to do, all transfers are synchronous. */
1984 /* Close the root pipe. */
1986 ehci_root_ctrl_close(usbd_pipe_handle pipe)
1988 DPRINTF(("ehci_root_ctrl_close\n"));
1989 /* Nothing to do. */
1993 ehci_root_intr_done(usbd_xfer_handle xfer)
1998 ehci_root_intr_transfer(usbd_xfer_handle xfer)
2002 /* Insert last in queue. */
2003 err = usb_insert_transfer(xfer);
2007 /* Pipe isn't running, start first */
2008 return (ehci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2012 ehci_root_intr_start(usbd_xfer_handle xfer)
2014 usbd_pipe_handle pipe = xfer->pipe;
2015 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2018 return (USBD_IOERROR);
2020 sc->sc_intrxfer = xfer;
2022 return (USBD_IN_PROGRESS);
2025 /* Abort a root interrupt request. */
2027 ehci_root_intr_abort(usbd_xfer_handle xfer)
2029 if (xfer->pipe->intrxfer == xfer) {
2030 DPRINTF(("ehci_root_intr_abort: remove\n"));
2031 xfer->pipe->intrxfer = NULL;
2033 xfer->status = USBD_CANCELLED;
2035 usb_transfer_complete(xfer);
2039 /* Close the root pipe. */
2041 ehci_root_intr_close(usbd_pipe_handle pipe)
2043 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2045 DPRINTF(("ehci_root_intr_close\n"));
2047 sc->sc_intrxfer = NULL;
2051 ehci_root_ctrl_done(usbd_xfer_handle xfer)
2055 /************************/
2058 ehci_alloc_sqh(ehci_softc_t *sc)
2060 ehci_soft_qh_t *sqh;
2065 if (sc->sc_freeqhs == NULL) {
2066 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2067 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2068 EHCI_PAGE_SIZE, &dma);
2071 kprintf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2075 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2076 offs = i * EHCI_SQH_SIZE;
2077 sqh = KERNADDR(&dma, offs);
2078 sqh->physaddr = DMAADDR(&dma, offs);
2079 sqh->next = sc->sc_freeqhs;
2080 sc->sc_freeqhs = sqh;
2083 sqh = sc->sc_freeqhs;
2084 sc->sc_freeqhs = sqh->next;
2085 memset(&sqh->qh, 0, sizeof(ehci_qh_t));
2092 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2094 sqh->next = sc->sc_freeqhs;
2095 sc->sc_freeqhs = sqh;
2099 ehci_alloc_sqtd(ehci_softc_t *sc)
2101 ehci_soft_qtd_t *sqtd;
2106 if (sc->sc_freeqtds == NULL) {
2107 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2108 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2109 EHCI_PAGE_SIZE, &dma);
2112 kprintf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2117 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2118 offs = i * EHCI_SQTD_SIZE;
2119 sqtd = KERNADDR(&dma, offs);
2120 sqtd->physaddr = DMAADDR(&dma, offs);
2121 sqtd->nextqtd = sc->sc_freeqtds;
2122 sc->sc_freeqtds = sqtd;
2128 sqtd = sc->sc_freeqtds;
2129 sc->sc_freeqtds = sqtd->nextqtd;
2130 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2131 sqtd->nextqtd = NULL;
2139 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2142 sqtd->nextqtd = sc->sc_freeqtds;
2143 sc->sc_freeqtds = sqtd;
2148 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2149 int alen, int rd, usbd_xfer_handle xfer,
2150 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2152 ehci_soft_qtd_t *next, *cur;
2153 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2154 u_int32_t qtdstatus;
2155 int len, curlen, mps, offset;
2157 usb_dma_t *dma = &xfer->dmabuf;
2159 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2163 iscontrol = (epipe->pipe.endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
2165 dataphys = DMAADDR(dma, 0);
2166 dataphyslastpage = EHCI_PAGE(DMAADDR(dma, len - 1));
2167 qtdstatus = EHCI_QTD_ACTIVE |
2168 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2169 EHCI_QTD_SET_CERR(3)
2171 /* BYTES set below */
2173 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2175 * The control transfer data stage always starts with a toggle of 1.
2176 * For other transfers we let the hardware track the toggle state.
2179 qtdstatus |= EHCI_QTD_SET_TOGGLE(1);
2181 cur = ehci_alloc_sqtd(sc);
2186 dataphyspage = EHCI_PAGE(dataphys);
2187 /* XXX This is pretty broken: Because we do not allocate
2188 * a contiguous buffer (contiguous in physical pages) we
2189 * can only transfer one page in one go.
2190 * So check whether the start and end of the buffer are on
2193 if (dataphyspage == dataphyslastpage) {
2197 /* See comment above (XXX) */
2198 curlen = EHCI_PAGE_SIZE -
2199 EHCI_PAGE_MASK(dataphys);
2200 /* the length must be a multiple of the max size */
2201 curlen -= curlen % mps;
2202 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2203 "curlen=%d\n", curlen));
2204 KASSERT(curlen != 0, ("ehci_alloc_std: curlen == 0"));
2206 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2207 "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2208 dataphys, dataphyslastpage,
2213 next = ehci_alloc_sqtd(sc);
2216 nextphys = htole32(next->physaddr);
2219 nextphys = EHCI_NULL;
2222 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2223 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2224 if (i != 0) /* use offset only in first buffer */
2226 cur->qtd.qtd_buffer[i] = htole32(a);
2227 cur->qtd.qtd_buffer_hi[i] = 0;
2229 if (i >= EHCI_QTD_NBUFFERS) {
2230 kprintf("ehci_alloc_sqtd_chain: i=%d\n", i);
2235 cur->nextqtd = next;
2236 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
2237 cur->qtd.qtd_status =
2238 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
2241 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2242 dataphys, dataphys + curlen));
2245 * adjust the toggle based on the number of packets
2248 if (((curlen + mps - 1) / mps) & 1)
2249 qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
2253 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2255 dataphys = DMAADDR(dma, offset);
2258 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2261 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2264 return (USBD_NORMAL_COMPLETION);
2267 /* XXX free chain */
2268 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2269 return (USBD_NOMEM);
2273 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2274 ehci_soft_qtd_t *sqtdend)
2279 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2282 for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2284 ehci_free_sqtd(sc, sqtd);
2291 * Close a reqular pipe.
2292 * Assumes that there are no pending transactions.
2295 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2297 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2298 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2299 ehci_soft_qh_t *sqh = epipe->sqh;
2302 ehci_rem_qh(sc, sqh, head);
2304 pipe->endpoint->savedtoggle =
2305 EHCI_QTD_GET_TOGGLE(le32toh(sqh->qh.qh_qtd.qtd_status));
2306 ehci_free_sqh(sc, epipe->sqh);
2310 * Abort a device request.
2311 * If this routine is called from a critical section it guarantees that the
2312 * request will be removed from the hardware scheduling and that the callback
2313 * for it will be called with USBD_CANCELLED status.
2314 * It's impossible to guarantee that the requested transfer will not
2315 * have happened since the hardware runs concurrently.
2316 * If the transaction has already happened we rely on the ordinary
2317 * interrupt processing to process it.
2318 * XXX This is most probably wrong.
2321 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2323 #define exfer EXFER(xfer)
2324 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2325 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2326 ehci_soft_qh_t *sqh = epipe->sqh;
2327 ehci_soft_qtd_t *sqtd, *snext, **psqtd;
2328 ehci_physaddr_t cur, us, next;
2330 /* int count = 0; */
2331 ehci_soft_qh_t *psqh;
2333 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2336 /* If we're dying, just do the software part. */
2338 xfer->status = status; /* make software ignore it */
2339 callout_stop(&xfer->timeout_handle);
2340 usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2341 usb_transfer_complete(xfer);
2346 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2347 panic("ehci_abort_xfer: not in process context");
2350 * If an abort is already in progress then just wait for it to
2351 * complete and return.
2353 if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING) {
2354 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
2355 /* No need to wait if we're aborting from a timeout. */
2356 if (status == USBD_TIMEOUT)
2358 /* Override the status which might be USBD_TIMEOUT. */
2359 xfer->status = status;
2360 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
2361 exfer->ehci_xfer_flags |= EHCI_XFER_ABORTWAIT;
2362 while (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING)
2363 tsleep(&exfer->ehci_xfer_flags, 0, "ehciaw", 0);
2368 * Step 1: Make interrupt routine and timeouts ignore xfer.
2371 exfer->ehci_xfer_flags |= EHCI_XFER_ABORTING;
2372 xfer->status = status; /* make software ignore it */
2373 callout_stop(&xfer->timeout_handle);
2374 usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2378 * Step 2: Wait until we know hardware has finished any possible
2379 * use of the xfer. We do this by removing the entire
2380 * queue from the async schedule and waiting for the doorbell.
2381 * Nothing else should be touching the queue now.
2384 ehci_rem_qh(sc, sqh, psqh);
2387 * Step 3: make sure the soft interrupt routine
2388 * has run. This should remove any completed items off the queue.
2389 * The hardware has no reference to completed items (TDs).
2390 * It's safe to remove them at any time.
2393 #ifdef USB_USE_SOFTINTR
2394 sc->sc_softwake = 1;
2395 #endif /* USB_USE_SOFTINTR */
2396 usb_schedsoftintr(&sc->sc_bus);
2397 #ifdef USB_USE_SOFTINTR
2398 tsleep(&sc->sc_softwake, 0, "ehciab", 0);
2399 #endif /* USB_USE_SOFTINTR */
2402 * Step 4: Remove any vestiges of the xfer from the hardware.
2403 * The complication here is that the hardware may have executed
2404 * into or even beyond the xfer we're trying to abort.
2405 * So as we're scanning the TDs of this xfer we check if
2406 * the hardware points to any of them.
2408 * first we need to see if there are any transfers
2409 * on this queue before the xfer we are aborting.. we need
2410 * to update any pointers that point to us to point past
2411 * the aborting xfer. (If there is something past us).
2412 * Hardware and software.
2414 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2417 /* If they initially point here. */
2418 us = exfer->sqtdstart->physaddr;
2420 /* We will change them to point here */
2421 snext = exfer->sqtdend->nextqtd;
2422 next = snext ? htole32(snext->physaddr) : EHCI_NULL;
2425 * Now loop through any qTDs before us and keep track of the pointer
2426 * that points to us for the end.
2430 while (sqtd && sqtd != exfer->sqtdstart) {
2431 hit |= (cur == sqtd->physaddr);
2432 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_next)) == us)
2433 sqtd->qtd.qtd_next = next;
2434 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_altnext)) == us)
2435 sqtd->qtd.qtd_altnext = next;
2436 psqtd = &sqtd->nextqtd;
2437 sqtd = sqtd->nextqtd;
2439 /* make the software pointer bypass us too */
2440 *psqtd = exfer->sqtdend->nextqtd;
2443 * If we already saw the active one then we are pretty much done.
2444 * We've done all the relinking we need to do.
2449 * Now reinitialise the QH to point to the next qTD
2450 * (if there is one). We only need to do this if
2451 * it was previously pointing to us.
2453 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2454 if (cur == sqtd->physaddr) {
2457 if (sqtd == exfer->sqtdend)
2460 sqtd = sqtd->nextqtd;
2462 * Only need to alter the QH if it was pointing at a qTD
2463 * that we are removing.
2467 ehci_set_qh_qtd(sqh, snext);
2470 sqh->qh.qh_curqtd = 0; /* unlink qTDs */
2471 sqh->qh.qh_qtd.qtd_status &=
2472 htole32(EHCI_QTD_TOGGLE_MASK);
2473 sqh->qh.qh_qtd.qtd_next =
2474 sqh->qh.qh_qtd.qtd_altnext
2476 DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2480 ehci_add_qh(sqh, psqh);
2482 * Step 5: Execute callback.
2487 /* Do the wakeup first to avoid touching the xfer after the callback. */
2488 exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTING;
2489 if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTWAIT) {
2490 exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTWAIT;
2491 wakeup(&exfer->ehci_xfer_flags);
2493 usb_transfer_complete(xfer);
2495 /* kprintf("%s: %d TDs aborted\n", __func__, count); */
2501 ehci_timeout(void *addr)
2503 struct ehci_xfer *exfer = addr;
2504 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2505 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2507 DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2510 usbd_dump_pipe(exfer->xfer.pipe);
2514 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2518 /* Execute the abort in a process context. */
2519 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
2524 ehci_timeout_task(void *addr)
2526 usbd_xfer_handle xfer = addr;
2528 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2530 ehci_abort_xfer(xfer, USBD_TIMEOUT);
2535 * Some EHCI chips from VIA / ATI seem to trigger interrupts before writing
2536 * back the qTD status, or miss signalling occasionally under heavy load.
2537 * If the host machine is too fast, we can miss transaction completion - when
2538 * we scan the active list the transaction still seems to be active. This
2539 * generally exhibits itself as a umass stall that never recovers.
2541 * We work around this behaviour by setting up this callback after any softintr
2542 * that completes with transactions still pending, giving us another chance to
2543 * check for completion after the writeback has taken place.
2546 ehci_intrlist_timeout(void *arg)
2548 ehci_softc_t *sc = arg;
2550 DPRINTFN(3, ("ehci_intrlist_timeout\n"));
2551 usb_schedsoftintr(&sc->sc_bus);
2554 /************************/
2557 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2561 /* Insert last in queue. */
2562 err = usb_insert_transfer(xfer);
2566 /* Pipe isn't running, start first */
2567 return (ehci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
2571 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2573 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2577 return (USBD_IOERROR);
2580 if (!(xfer->rqflags & URQ_REQUEST)) {
2582 kprintf("ehci_device_ctrl_transfer: not a request\n");
2583 return (USBD_INVAL);
2587 err = ehci_device_request(xfer);
2591 if (sc->sc_bus.use_polling)
2592 ehci_waitintr(sc, xfer);
2593 return (USBD_IN_PROGRESS);
2597 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2599 struct ehci_xfer *ex = EXFER(xfer);
2600 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2601 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2603 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2606 if (!(xfer->rqflags & URQ_REQUEST)) {
2607 panic("ehci_ctrl_done: not a request");
2611 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2612 ehci_del_intr_list(ex); /* remove from active list */
2613 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2616 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2619 /* Abort a device control request. */
2621 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2623 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2624 ehci_abort_xfer(xfer, USBD_CANCELLED);
2627 /* Close a device control pipe. */
2629 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2631 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2632 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2634 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2635 ehci_close_pipe(pipe, sc->sc_async_head);
2639 ehci_device_request(usbd_xfer_handle xfer)
2641 #define exfer EXFER(xfer)
2642 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2643 usb_device_request_t *req = &xfer->request;
2644 usbd_device_handle dev = epipe->pipe.device;
2645 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2646 int addr = dev->address;
2647 ehci_soft_qtd_t *setup, *stat, *next;
2648 ehci_soft_qh_t *sqh;
2653 isread = req->bmRequestType & UT_READ;
2654 len = UGETW(req->wLength);
2656 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
2657 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2658 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2659 UGETW(req->wIndex), len, addr,
2660 epipe->pipe.endpoint->edesc->bEndpointAddress));
2662 setup = ehci_alloc_sqtd(sc);
2663 if (setup == NULL) {
2667 stat = ehci_alloc_sqtd(sc);
2674 epipe->u.ctl.length = len;
2676 /* Update device address and length since they may have changed
2677 during the setup of the control pipe in usbd_new_device(). */
2678 /* XXX This only needs to be done once, but it's too early in open. */
2679 /* XXXX Should not touch ED here! */
2681 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
2683 EHCI_QH_SET_ADDR(addr) |
2684 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2687 /* Set up data transaction */
2689 ehci_soft_qtd_t *end;
2691 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2695 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
2696 end->nextqtd = stat;
2698 end->qtd.qtd_altnext = htole32(stat->physaddr);
2703 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2706 setup->qtd.qtd_status = htole32(
2708 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2709 EHCI_QTD_SET_CERR(3) |
2710 EHCI_QTD_SET_TOGGLE(0) |
2711 EHCI_QTD_SET_BYTES(sizeof *req)
2713 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
2714 setup->qtd.qtd_buffer_hi[0] = 0;
2715 setup->nextqtd = next;
2716 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2718 setup->len = sizeof *req;
2720 stat->qtd.qtd_status = htole32(
2722 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2723 EHCI_QTD_SET_CERR(3) |
2724 EHCI_QTD_SET_TOGGLE(1) |
2727 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2728 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
2729 stat->nextqtd = NULL;
2730 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2735 if (ehcidebug > 5) {
2736 DPRINTF(("ehci_device_request:\n"));
2738 ehci_dump_sqtds(setup);
2742 exfer->sqtdstart = setup;
2743 exfer->sqtdend = stat;
2745 if (!exfer->isdone) {
2746 kprintf("ehci_device_request: not done, exfer=%p\n", exfer);
2751 /* Insert qTD in QH list. */
2753 ehci_set_qh_qtd(sqh, setup);
2754 if (xfer->timeout && !sc->sc_bus.use_polling) {
2755 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2756 ehci_timeout, xfer);
2758 ehci_add_intr_list(sc, exfer);
2759 xfer->status = USBD_IN_PROGRESS;
2763 if (ehcidebug > 10) {
2764 DPRINTF(("ehci_device_request: status=%x\n",
2765 EOREAD4(sc, EHCI_USBSTS)));
2768 ehci_dump_sqh(sc->sc_async_head);
2770 ehci_dump_sqtds(setup);
2774 return (USBD_NORMAL_COMPLETION);
2777 ehci_free_sqtd(sc, stat);
2779 ehci_free_sqtd(sc, setup);
2781 DPRINTFN(-1,("ehci_device_request: no memory\n"));
2783 usb_transfer_complete(xfer);
2788 /************************/
2791 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2795 /* Insert last in queue. */
2796 err = usb_insert_transfer(xfer);
2800 /* Pipe isn't running, start first */
2801 return (ehci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
2805 ehci_device_bulk_start(usbd_xfer_handle xfer)
2807 #define exfer EXFER(xfer)
2808 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2809 usbd_device_handle dev = epipe->pipe.device;
2810 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2811 ehci_soft_qtd_t *data, *dataend;
2812 ehci_soft_qh_t *sqh;
2814 int len, isread, endpt;
2816 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
2817 xfer, xfer->length, xfer->flags));
2820 return (USBD_IOERROR);
2823 if (xfer->rqflags & URQ_REQUEST)
2824 panic("ehci_device_bulk_start: a request");
2828 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2829 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2832 epipe->u.bulk.length = len;
2834 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2837 DPRINTFN(-1,("ehci_device_bulk_start: no memory\n"));
2839 usb_transfer_complete(xfer);
2844 if (ehcidebug > 5) {
2845 DPRINTF(("ehci_device_bulk_start: data(1)\n"));
2847 ehci_dump_sqtds(data);
2851 /* Set up interrupt info. */
2852 exfer->sqtdstart = data;
2853 exfer->sqtdend = dataend;
2855 if (!exfer->isdone) {
2856 kprintf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
2862 ehci_set_qh_qtd(sqh, data);
2863 if (xfer->timeout && !sc->sc_bus.use_polling) {
2864 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2865 ehci_timeout, xfer);
2867 ehci_add_intr_list(sc, exfer);
2868 xfer->status = USBD_IN_PROGRESS;
2872 if (ehcidebug > 10) {
2873 DPRINTF(("ehci_device_bulk_start: data(2)\n"));
2875 DPRINTF(("ehci_device_bulk_start: data(3)\n"));
2878 kprintf("async_head:\n");
2879 ehci_dump_sqh(sc->sc_async_head);
2883 ehci_dump_sqtds(data);
2887 if (sc->sc_bus.use_polling)
2888 ehci_waitintr(sc, xfer);
2890 return (USBD_IN_PROGRESS);
2895 ehci_device_bulk_abort(usbd_xfer_handle xfer)
2897 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2898 ehci_abort_xfer(xfer, USBD_CANCELLED);
2902 * Close a device bulk pipe.
2905 ehci_device_bulk_close(usbd_pipe_handle pipe)
2907 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2909 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2910 ehci_close_pipe(pipe, sc->sc_async_head);
2914 ehci_device_bulk_done(usbd_xfer_handle xfer)
2916 struct ehci_xfer *ex = EXFER(xfer);
2917 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2918 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2920 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2921 xfer, xfer->actlen));
2923 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2924 ehci_del_intr_list(ex); /* remove from active list */
2925 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2928 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2931 /************************/
2934 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
2936 struct ehci_soft_islot *isp;
2939 /* Find a poll rate that is large enough. */
2940 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
2941 if (EHCI_ILEV_IVAL(lev) <= ival)
2944 /* Pick an interrupt slot at the right level. */
2945 /* XXX could do better than picking at random. */
2946 islot = EHCI_IQHIDX(lev, karc4random());
2949 isp = &sc->sc_islots[islot];
2950 ehci_add_qh(sqh, isp->sqh);
2952 return (USBD_NORMAL_COMPLETION);
2956 ehci_device_intr_transfer(usbd_xfer_handle xfer)
2960 /* Insert last in queue. */
2961 err = usb_insert_transfer(xfer);
2966 * Pipe isn't running (otherwise err would be USBD_INPROG),
2967 * so start it first.
2969 return (ehci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2973 ehci_device_intr_start(usbd_xfer_handle xfer)
2975 #define exfer EXFER(xfer)
2976 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2977 usbd_device_handle dev = xfer->pipe->device;
2978 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2979 ehci_soft_qtd_t *data, *dataend;
2980 ehci_soft_qh_t *sqh;
2982 int len, isread, endpt;
2984 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
2985 xfer, xfer->length, xfer->flags));
2988 return (USBD_IOERROR);
2991 if (xfer->rqflags & URQ_REQUEST)
2992 panic("ehci_device_intr_start: a request");
2996 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2997 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3000 epipe->u.intr.length = len;
3002 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
3005 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
3007 usb_transfer_complete(xfer);
3012 if (ehcidebug > 5) {
3013 DPRINTF(("ehci_device_intr_start: data(1)\n"));
3015 ehci_dump_sqtds(data);
3019 /* Set up interrupt info. */
3020 exfer->sqtdstart = data;
3021 exfer->sqtdend = dataend;
3023 if (!exfer->isdone) {
3024 kprintf("ehci_device_intr_start: not done, ex=%p\n", exfer);
3030 ehci_set_qh_qtd(sqh, data);
3031 if (xfer->timeout && !sc->sc_bus.use_polling) {
3032 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3033 ehci_timeout, xfer);
3035 ehci_add_intr_list(sc, exfer);
3036 xfer->status = USBD_IN_PROGRESS;
3040 if (ehcidebug > 10) {
3041 DPRINTF(("ehci_device_intr_start: data(2)\n"));
3043 DPRINTF(("ehci_device_intr_start: data(3)\n"));
3047 ehci_dump_sqtds(data);
3051 if (sc->sc_bus.use_polling)
3052 ehci_waitintr(sc, xfer);
3054 return (USBD_IN_PROGRESS);
3059 ehci_device_intr_abort(usbd_xfer_handle xfer)
3061 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
3062 if (xfer->pipe->intrxfer == xfer) {
3063 DPRINTFN(1, ("ehci_device_intr_abort: remove\n"));
3064 xfer->pipe->intrxfer = NULL;
3066 ehci_abort_xfer(xfer, USBD_CANCELLED);
3070 ehci_device_intr_close(usbd_pipe_handle pipe)
3072 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3073 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
3074 struct ehci_soft_islot *isp;
3076 isp = &sc->sc_islots[epipe->sqh->islot];
3077 ehci_close_pipe(pipe, isp->sqh);
3081 ehci_device_intr_done(usbd_xfer_handle xfer)
3083 #define exfer EXFER(xfer)
3084 struct ehci_xfer *ex = EXFER(xfer);
3085 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3086 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3087 ehci_soft_qtd_t *data, *dataend;
3088 ehci_soft_qh_t *sqh;
3090 int len, isread, endpt;
3092 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
3093 xfer, xfer->actlen));
3095 if (xfer->pipe->repeat) {
3096 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3098 len = epipe->u.intr.length;
3100 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3101 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3104 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3107 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
3112 /* Set up interrupt info. */
3113 exfer->sqtdstart = data;
3114 exfer->sqtdend = dataend;
3116 if (!exfer->isdone) {
3117 kprintf("ehci_device_intr_done: not done, ex=%p\n",
3124 ehci_set_qh_qtd(sqh, data);
3125 if (xfer->timeout && !sc->sc_bus.use_polling) {
3126 callout_reset(&xfer->timeout_handle,
3127 MS_TO_TICKS(xfer->timeout), ehci_timeout, xfer);
3131 xfer->status = USBD_IN_PROGRESS;
3132 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3133 ehci_del_intr_list(ex); /* remove from active list */
3134 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3139 /************************/
3142 ehci_device_isoc_transfer(usbd_xfer_handle xfer)
3144 return USBD_IOERROR;
3148 ehci_device_isoc_start(usbd_xfer_handle xfer)
3150 return USBD_IOERROR;
3154 ehci_device_isoc_abort(usbd_xfer_handle xfer)
3159 ehci_device_isoc_close(usbd_pipe_handle pipe)
3164 ehci_device_isoc_done(usbd_xfer_handle xfer)