5 * \author Gareth Hughes <gareth@valinux.com>
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
31 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_drv.c 254885 2013-08-25 19:37:15Z dumbbell $
35 #include <uapi_drm/radeon_drm.h>
36 #include "radeon_drv.h"
37 #include "radeon_gem.h"
38 #include "radeon_kms.h"
39 #include "radeon_irq_kms.h"
41 #include <drm/drm_pciids.h>
45 * - 2.0.0 - initial interface
46 * - 2.1.0 - add square tiling interface
47 * - 2.2.0 - add r6xx/r7xx const buffer support
48 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
49 * - 2.4.0 - add crtc id query
50 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
51 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
52 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
53 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
54 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
55 * 2.10.0 - fusion 2D tiling
56 * 2.11.0 - backend map, initial compute support for the CS checker
57 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
58 * 2.13.0 - virtual memory support, streamout
59 * 2.14.0 - add evergreen tiling informations
60 * 2.15.0 - add max_pipes query
61 * 2.16.0 - fix evergreen 2D tiled surface calculation
62 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
63 * 2.18.0 - r600-eg: allow "invalid" DB formats
64 * 2.19.0 - r600-eg: MSAA textures
65 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
66 * 2.21.0 - r600-r700: FMASK and CMASK
67 * 2.22.0 - r600 only: RESOLVE_BOX allowed
68 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
69 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
70 * 2.25.0 - eg+: new info request for num SE and num SH
71 * 2.26.0 - r600-eg: fix htile size computation
72 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
73 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
74 * 2.29.0 - R500 FP16 color clear registers
75 * 2.30.0 - fix for FMASK texturing
76 * 2.31.0 - Add fastfb support for rs690
77 * 2.32.0 - new info request for rings working
78 * 2.33.0 - Add SI tiling mode array query
79 * 2.34.0 - Add CIK tiling mode array query
81 #define KMS_DRIVER_MAJOR 2
82 #define KMS_DRIVER_MINOR 34
83 #define KMS_DRIVER_PATCHLEVEL 0
84 int radeon_suspend_kms(struct drm_device *dev);
85 int radeon_resume_kms(struct drm_device *dev);
86 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
88 int *vpos, int *hpos, ktime_t *stime,
90 extern struct drm_ioctl_desc radeon_ioctls_kms[];
91 extern int radeon_max_kms_ioctl;
93 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
94 #endif /* DUMBBELL_WIP */
95 int radeon_mode_dumb_mmap(struct drm_file *filp,
96 struct drm_device *dev,
97 uint32_t handle, uint64_t *offset_p);
98 int radeon_mode_dumb_create(struct drm_file *file_priv,
99 struct drm_device *dev,
100 struct drm_mode_create_dumb *args);
101 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
102 struct drm_device *dev,
104 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
105 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
107 struct sg_table *sg);
108 int radeon_gem_prime_pin(struct drm_gem_object *obj);
109 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
110 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
111 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
113 #if defined(CONFIG_DEBUG_FS)
114 int radeon_debugfs_init(struct drm_minor *minor);
115 void radeon_debugfs_cleanup(struct drm_minor *minor);
119 #if defined(CONFIG_VGA_SWITCHEROO)
120 void radeon_register_atpx_handler(void);
121 void radeon_unregister_atpx_handler(void);
123 static inline void radeon_register_atpx_handler(void) {}
124 static inline void radeon_unregister_atpx_handler(void) {}
128 int radeon_modeset = 1;
129 int radeon_dynclks = -1;
130 int radeon_r4xx_atom = 0;
131 int radeon_agpmode = 0;
132 int radeon_vram_limit = 0;
133 int radeon_gart_size = 512; /* default gart size */
134 int radeon_benchmarking = 0;
135 int radeon_testing = 0;
136 int radeon_connector_table = 0;
138 int radeon_audio = 0;
139 int radeon_disp_priority = 0;
140 int radeon_hw_i2c = 0;
141 int radeon_pcie_gen2 = -1;
143 int radeon_lockup_timeout = 10000;
144 int radeon_fastfb = 0;
146 int radeon_aspm = -1;
148 TUNABLE_INT("drm.radeon.no_wb", &radeon_no_wb);
149 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
150 module_param_named(no_wb, radeon_no_wb, int, 0444);
152 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
153 module_param_named(modeset, radeon_modeset, int, 0400);
155 TUNABLE_INT("drm.radeon.dynclks", &radeon_dynclks);
156 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
157 module_param_named(dynclks, radeon_dynclks, int, 0444);
159 TUNABLE_INT("drm.radeon.r4xx_atom", &radeon_r4xx_atom);
160 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
161 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
163 TUNABLE_INT("drm.radeon.vram_limit", &radeon_vram_limit);
164 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
165 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
167 TUNABLE_INT("drm.radeon.agpmode", &radeon_agpmode);
168 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
169 module_param_named(agpmode, radeon_agpmode, int, 0444);
171 TUNABLE_INT("drm.radeon.gart_size", &radeon_gart_size);
172 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
173 module_param_named(gartsize, radeon_gart_size, int, 0600);
175 TUNABLE_INT("drm.radeon.benchmarking", &radeon_benchmarking);
176 MODULE_PARM_DESC(benchmark, "Run benchmark");
177 module_param_named(benchmark, radeon_benchmarking, int, 0444);
179 TUNABLE_INT("drm.radeon.testing", &radeon_testing);
180 MODULE_PARM_DESC(test, "Run tests");
181 module_param_named(test, radeon_testing, int, 0444);
183 TUNABLE_INT("drm.radeon.connector_table", &radeon_connector_table);
184 MODULE_PARM_DESC(connector_table, "Force connector table");
185 module_param_named(connector_table, radeon_connector_table, int, 0444);
187 TUNABLE_INT("drm.radeon.tv", &radeon_tv);
188 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
189 module_param_named(tv, radeon_tv, int, 0444);
191 TUNABLE_INT("drm.radeon.audio", &radeon_audio);
192 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
193 module_param_named(audio, radeon_audio, int, 0444);
195 TUNABLE_INT("drm.radeon.disp_priority", &radeon_disp_priority);
196 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
197 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
199 TUNABLE_INT("drm.radeon.hw_i2c", &radeon_hw_i2c);
200 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
201 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
203 TUNABLE_INT("drm.radeon.pcie_gen2", &radeon_pcie_gen2);
204 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
205 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
207 TUNABLE_INT("drm.radeon.msi", &radeon_msi);
208 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
209 module_param_named(msi, radeon_msi, int, 0444);
211 TUNABLE_INT("drm.radeon.lockup_timeout", &radeon_lockup_timeout);
212 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
213 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
215 TUNABLE_INT("drm.radeon.fastfb", &radeon_fastfb);
216 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
217 module_param_named(fastfb, radeon_fastfb, int, 0444);
219 TUNABLE_INT("drm.radeon.dpm", &radeon_dpm);
220 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
221 module_param_named(dpm, radeon_dpm, int, 0444);
223 TUNABLE_INT("drm.radeon.aspm", &radeon_aspm);
224 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
225 module_param_named(aspm, radeon_aspm, int, 0444);
227 static drm_pci_id_list_t pciidlist[] = {
231 #ifdef CONFIG_DRM_RADEON_UMS
235 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
237 drm_radeon_private_t *dev_priv = dev->dev_private;
239 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
242 /* Disable *all* interrupts */
243 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
244 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
245 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
249 static int radeon_resume(struct drm_device *dev)
251 drm_radeon_private_t *dev_priv = dev->dev_private;
253 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
256 /* Restore interrupt registers */
257 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
258 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
259 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
262 #endif /* DUMBBELL_WIP */
265 static const struct file_operations radeon_driver_old_fops = {
266 .owner = THIS_MODULE,
268 .release = drm_release,
269 .unlocked_ioctl = drm_ioctl,
272 .fasync = drm_fasync,
275 .compat_ioctl = radeon_compat_ioctl,
277 .llseek = noop_llseek,
280 static struct drm_driver driver_old = {
282 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
283 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
284 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
285 .load = radeon_driver_load,
286 .firstopen = radeon_driver_firstopen,
287 .open = radeon_driver_open,
288 .preclose = radeon_driver_preclose,
289 .postclose = radeon_driver_postclose,
290 .lastclose = radeon_driver_lastclose,
291 .unload = radeon_driver_unload,
293 .suspend = radeon_suspend,
294 .resume = radeon_resume,
295 #endif /* DUMBBELL_WIP */
296 .get_vblank_counter = radeon_get_vblank_counter,
297 .enable_vblank = radeon_enable_vblank,
298 .disable_vblank = radeon_disable_vblank,
299 .master_create = radeon_master_create,
300 .master_destroy = radeon_master_destroy,
301 .irq_preinstall = radeon_driver_irq_preinstall,
302 .irq_postinstall = radeon_driver_irq_postinstall,
303 .irq_uninstall = radeon_driver_irq_uninstall,
304 .irq_handler = radeon_driver_irq_handler,
305 .ioctls = radeon_ioctls,
306 .dma_ioctl = radeon_cp_buffers,
307 .fops = &radeon_driver_old_fops,
311 .major = DRIVER_MAJOR,
312 .minor = DRIVER_MINOR,
313 .patchlevel = DRIVER_PATCHLEVEL,
315 #endif /* DUMBBELL_WIP */
319 static struct drm_driver kms_driver;
322 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
324 struct apertures_struct *ap;
325 bool primary = false;
327 ap = alloc_apertures(1);
331 ap->ranges[0].base = pci_resource_start(pdev, 0);
332 ap->ranges[0].size = pci_resource_len(pdev, 0);
335 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
337 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
343 static int radeon_pci_probe(struct pci_dev *pdev,
344 const struct pci_device_id *ent)
348 /* Get rid of things like offb */
349 ret = radeon_kick_out_firmware_fb(pdev);
353 return drm_get_pci_dev(pdev, ent, &kms_driver);
357 radeon_pci_remove(struct pci_dev *pdev)
359 struct drm_device *dev = pci_get_drvdata(pdev);
365 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
367 struct drm_device *dev = pci_get_drvdata(pdev);
368 return radeon_suspend_kms(dev, state);
372 radeon_pci_resume(struct pci_dev *pdev)
374 struct drm_device *dev = pci_get_drvdata(pdev);
375 return radeon_resume_kms(dev);
378 static const struct file_operations radeon_driver_kms_fops = {
379 .owner = THIS_MODULE,
381 .release = drm_release,
382 .unlocked_ioctl = drm_ioctl,
385 .fasync = drm_fasync,
388 .compat_ioctl = radeon_kms_compat_ioctl,
391 #endif /* DUMBBELL_WIP */
393 static struct drm_driver kms_driver = {
395 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
396 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
397 DRIVER_PRIME /* | DRIVE_MODESET */,
400 #endif /* DUMBBELL_WIP */
401 .load = radeon_driver_load_kms,
402 .use_msi = radeon_msi_ok,
403 .firstopen = radeon_driver_firstopen_kms,
404 .open = radeon_driver_open_kms,
405 .preclose = radeon_driver_preclose_kms,
406 .postclose = radeon_driver_postclose_kms,
407 .lastclose = radeon_driver_lastclose_kms,
408 .unload = radeon_driver_unload_kms,
410 .suspend = radeon_suspend_kms,
411 .resume = radeon_resume_kms,
412 #endif /* DUMBBELL_WIP */
413 .get_vblank_counter = radeon_get_vblank_counter_kms,
414 .enable_vblank = radeon_enable_vblank_kms,
415 .disable_vblank = radeon_disable_vblank_kms,
416 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
417 .get_scanout_position = radeon_get_crtc_scanoutpos,
418 .irq_preinstall = radeon_driver_irq_preinstall_kms,
419 .irq_postinstall = radeon_driver_irq_postinstall_kms,
420 .irq_uninstall = radeon_driver_irq_uninstall_kms,
421 .irq_handler = radeon_driver_irq_handler_kms,
422 .ioctls = radeon_ioctls_kms,
423 .gem_free_object = radeon_gem_object_free,
424 .gem_open_object = radeon_gem_object_open,
425 .gem_close_object = radeon_gem_object_close,
426 .dma_ioctl = radeon_dma_ioctl_kms,
427 .dumb_create = radeon_mode_dumb_create,
428 .dumb_map_offset = radeon_mode_dumb_mmap,
429 .dumb_destroy = radeon_mode_dumb_destroy,
431 .fops = &radeon_driver_kms_fops,
432 #endif /* DUMBBELL_WIP */
435 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
436 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
437 .gem_prime_export = drm_gem_prime_export,
438 .gem_prime_import = drm_gem_prime_import,
439 .gem_prime_pin = radeon_gem_prime_pin,
440 .gem_prime_unpin = radeon_gem_prime_unpin,
441 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
442 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
443 .gem_prime_vmap = radeon_gem_prime_vmap,
444 .gem_prime_vunmap = radeon_gem_prime_vunmap,
445 #endif /* DUMBBELL_WIP */
450 .major = KMS_DRIVER_MAJOR,
451 .minor = KMS_DRIVER_MINOR,
452 .patchlevel = KMS_DRIVER_PATCHLEVEL,
456 static int __init radeon_init(void)
458 if (radeon_modeset == 1) {
459 DRM_INFO("radeon kernel modesetting enabled.\n");
460 driver = &kms_driver;
461 pdriver = &radeon_kms_pci_driver;
462 driver->driver_features |= DRIVER_MODESET;
463 driver->num_ioctls = radeon_max_kms_ioctl;
464 radeon_register_atpx_handler();
467 #ifdef CONFIG_DRM_RADEON_UMS
468 DRM_INFO("radeon userspace modesetting enabled.\n");
469 driver = &driver_old;
470 pdriver = &radeon_pci_driver;
471 driver->driver_features &= ~DRIVER_MODESET;
472 driver->num_ioctls = radeon_max_ioctl;
474 DRM_ERROR("No UMS support in radeon module!\n");
479 /* let modprobe override vga console setting */
480 return drm_pci_init(driver, pdriver);
483 static void __exit radeon_exit(void)
485 drm_pci_exit(driver, pdriver);
486 radeon_unregister_atpx_handler();
488 #endif /* DUMBBELL_WIP */
490 /* =================================================================== */
493 radeon_probe(device_t kdev)
496 return drm_probe(kdev, pciidlist);
500 radeon_attach(device_t kdev)
502 struct drm_device *dev;
504 dev = device_get_softc(kdev);
505 if (radeon_modeset == 1) {
506 kms_driver.driver_features |= DRIVER_MODESET;
507 kms_driver.num_ioctls = radeon_max_kms_ioctl;
508 radeon_register_atpx_handler();
510 dev->driver = &kms_driver;
511 return (drm_attach(kdev, pciidlist));
515 radeon_suspend(device_t kdev)
517 struct drm_device *dev;
520 dev = device_get_softc(kdev);
521 ret = radeon_suspend_kms(dev);
527 radeon_resume(device_t kdev)
529 struct drm_device *dev;
532 dev = device_get_softc(kdev);
533 ret = radeon_resume_kms(dev);
538 static device_method_t radeon_methods[] = {
539 /* Device interface */
540 DEVMETHOD(device_probe, radeon_probe),
541 DEVMETHOD(device_attach, radeon_attach),
542 DEVMETHOD(device_suspend, radeon_suspend),
543 DEVMETHOD(device_resume, radeon_resume),
544 DEVMETHOD(device_detach, drm_release),
548 static driver_t radeon_driver = {
551 sizeof(struct drm_device)
554 extern devclass_t drm_devclass;
555 DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass,
556 NULL, NULL, SI_ORDER_ANY);
557 MODULE_DEPEND(radeonkms, drm, 1, 1, 1);
558 MODULE_DEPEND(radeonkms, agp, 1, 1, 1);
559 MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1);
560 MODULE_DEPEND(radeonkms, iic, 1, 1, 1);
561 MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1);