1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "coretypes.h"
95 #include "insn-config.h"
101 #include "hard-reg-set.h"
105 #include "function.h"
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* All reloads of the current insn are recorded here. See reload.h for
120 struct reload rld[MAX_RELOADS];
122 /* All the "earlyclobber" operands of the current insn
123 are recorded here. */
125 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
127 int reload_n_operands;
129 /* Replacing reloads.
131 If `replace_reloads' is nonzero, then as each reload is recorded
132 an entry is made for it in the table `replacements'.
133 Then later `subst_reloads' can look through that table and
134 perform all the replacements needed. */
136 /* Nonzero means record the places to replace. */
137 static int replace_reloads;
139 /* Each replacement is recorded with a structure like this. */
142 rtx *where; /* Location to store in */
143 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
144 a SUBREG; 0 otherwise. */
145 int what; /* which reload this is for */
146 enum machine_mode mode; /* mode it must have */
149 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
151 /* Number of replacements currently recorded. */
152 static int n_replacements;
154 /* Used to track what is modified by an operand. */
157 int reg_flag; /* Nonzero if referencing a register. */
158 int safe; /* Nonzero if this can't conflict with anything. */
159 rtx base; /* Base address for MEM. */
160 HOST_WIDE_INT start; /* Starting offset or register number. */
161 HOST_WIDE_INT end; /* Ending offset or register number. */
164 #ifdef SECONDARY_MEMORY_NEEDED
166 /* Save MEMs needed to copy from one class of registers to another. One MEM
167 is used per mode, but normally only one or two modes are ever used.
169 We keep two versions, before and after register elimination. The one
170 after register elimination is record separately for each operand. This
171 is done in case the address is not valid to be sure that we separately
174 static rtx secondary_memlocs[NUM_MACHINE_MODES];
175 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
176 static int secondary_memlocs_elim_used = 0;
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
243 static enum reg_class find_valid_class (enum machine_mode, int, unsigned int);
244 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
245 static void push_replacement (rtx *, int, enum machine_mode);
246 static void dup_replacements (rtx *, rtx *);
247 static void combine_reloads (void);
248 static int find_reusable_reload (rtx *, rtx, enum reg_class,
249 enum reload_type, int, int);
250 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
251 enum machine_mode, enum reg_class, int, int);
252 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
253 static struct decomposition decompose (rtx);
254 static int immune_p (rtx, rtx, struct decomposition);
255 static int alternative_allows_memconst (const char *, int);
256 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
258 static rtx make_memloc (rtx, int);
259 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
260 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
261 int, enum reload_type, int, rtx);
262 static rtx subst_reg_equivs (rtx, rtx);
263 static rtx subst_indexed_address (rtx);
264 static void update_auto_inc_notes (rtx, int, int);
265 static int find_reloads_address_1 (enum machine_mode, rtx, int, rtx *,
266 int, enum reload_type,int, rtx);
267 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
268 enum machine_mode, int,
269 enum reload_type, int);
270 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
272 static void copy_replacements_1 (rtx *, rtx *, int);
273 static int find_inc_amount (rtx, rtx);
275 #ifdef HAVE_SECONDARY_RELOADS
277 /* Determine if any secondary reloads are needed for loading (if IN_P is
278 nonzero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
287 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
288 enum reg_class reload_class,
289 enum machine_mode reload_mode, enum reload_type type,
290 enum insn_code *picode)
292 enum reg_class class = NO_REGS;
293 enum machine_mode mode = reload_mode;
294 enum insn_code icode = CODE_FOR_nothing;
295 enum reg_class t_class = NO_REGS;
296 enum machine_mode t_mode = VOIDmode;
297 enum insn_code t_icode = CODE_FOR_nothing;
298 enum reload_type secondary_type;
299 int s_reload, t_reload = -1;
301 if (type == RELOAD_FOR_INPUT_ADDRESS
302 || type == RELOAD_FOR_OUTPUT_ADDRESS
303 || type == RELOAD_FOR_INPADDR_ADDRESS
304 || type == RELOAD_FOR_OUTADDR_ADDRESS)
305 secondary_type = type;
307 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
309 *picode = CODE_FOR_nothing;
311 /* If X is a paradoxical SUBREG, use the inner value to determine both the
312 mode and object being reloaded. */
313 if (GET_CODE (x) == SUBREG
314 && (GET_MODE_SIZE (GET_MODE (x))
315 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
318 reload_mode = GET_MODE (x);
321 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
322 is still a pseudo-register by now, it *must* have an equivalent MEM
323 but we don't want to assume that), use that equivalent when seeing if
324 a secondary reload is needed since whether or not a reload is needed
325 might be sensitive to the form of the MEM. */
327 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
328 && reg_equiv_mem[REGNO (x)] != 0)
329 x = reg_equiv_mem[REGNO (x)];
331 #ifdef SECONDARY_INPUT_RELOAD_CLASS
333 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
336 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
338 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
341 /* If we don't need any secondary registers, done. */
342 if (class == NO_REGS)
345 /* Get a possible insn to use. If the predicate doesn't accept X, don't
348 icode = (in_p ? reload_in_optab[(int) reload_mode]
349 : reload_out_optab[(int) reload_mode]);
351 if (icode != CODE_FOR_nothing
352 && insn_data[(int) icode].operand[in_p].predicate
353 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
354 icode = CODE_FOR_nothing;
356 /* If we will be using an insn, see if it can directly handle the reload
357 register we will be using. If it can, the secondary reload is for a
358 scratch register. If it can't, we will use the secondary reload for
359 an intermediate register and require a tertiary reload for the scratch
362 if (icode != CODE_FOR_nothing)
364 /* If IN_P is nonzero, the reload register will be the output in
365 operand 0. If IN_P is zero, the reload register will be the input
366 in operand 1. Outputs should have an initial "=", which we must
369 enum reg_class insn_class;
371 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
372 insn_class = ALL_REGS;
375 const char *insn_constraint
376 = &insn_data[(int) icode].operand[!in_p].constraint[in_p];
377 char insn_letter = *insn_constraint;
379 = (insn_letter == 'r' ? GENERAL_REGS
380 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter,
383 if (insn_class == NO_REGS)
386 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
390 /* The scratch register's constraint must start with "=&". */
391 if (insn_data[(int) icode].operand[2].constraint[0] != '='
392 || insn_data[(int) icode].operand[2].constraint[1] != '&')
395 if (reg_class_subset_p (reload_class, insn_class))
396 mode = insn_data[(int) icode].operand[2].mode;
399 const char *t_constraint
400 = &insn_data[(int) icode].operand[2].constraint[2];
401 char t_letter = *t_constraint;
403 t_mode = insn_data[(int) icode].operand[2].mode;
404 t_class = (t_letter == 'r' ? GENERAL_REGS
405 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter,
408 icode = CODE_FOR_nothing;
412 /* This case isn't valid, so fail. Reload is allowed to use the same
413 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
414 in the case of a secondary register, we actually need two different
415 registers for correct code. We fail here to prevent the possibility of
416 silently generating incorrect code later.
418 The convention is that secondary input reloads are valid only if the
419 secondary_class is different from class. If you have such a case, you
420 can not use secondary reloads, you must work around the problem some
423 Allow this when a reload_in/out pattern is being used. I.e. assume
424 that the generated code handles this case. */
426 if (in_p && class == reload_class && icode == CODE_FOR_nothing
427 && t_icode == CODE_FOR_nothing)
430 /* If we need a tertiary reload, see if we have one we can reuse or else
433 if (t_class != NO_REGS)
435 for (t_reload = 0; t_reload < n_reloads; t_reload++)
436 if (rld[t_reload].secondary_p
437 && (reg_class_subset_p (t_class, rld[t_reload].class)
438 || reg_class_subset_p (rld[t_reload].class, t_class))
439 && ((in_p && rld[t_reload].inmode == t_mode)
440 || (! in_p && rld[t_reload].outmode == t_mode))
441 && ((in_p && (rld[t_reload].secondary_in_icode
442 == CODE_FOR_nothing))
443 || (! in_p &&(rld[t_reload].secondary_out_icode
444 == CODE_FOR_nothing)))
445 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
446 && MERGABLE_RELOADS (secondary_type,
447 rld[t_reload].when_needed,
448 opnum, rld[t_reload].opnum))
451 rld[t_reload].inmode = t_mode;
453 rld[t_reload].outmode = t_mode;
455 if (reg_class_subset_p (t_class, rld[t_reload].class))
456 rld[t_reload].class = t_class;
458 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
459 rld[t_reload].optional &= optional;
460 rld[t_reload].secondary_p = 1;
461 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
462 opnum, rld[t_reload].opnum))
463 rld[t_reload].when_needed = RELOAD_OTHER;
466 if (t_reload == n_reloads)
468 /* We need to make a new tertiary reload for this register class. */
469 rld[t_reload].in = rld[t_reload].out = 0;
470 rld[t_reload].class = t_class;
471 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
472 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
473 rld[t_reload].reg_rtx = 0;
474 rld[t_reload].optional = optional;
475 rld[t_reload].inc = 0;
476 /* Maybe we could combine these, but it seems too tricky. */
477 rld[t_reload].nocombine = 1;
478 rld[t_reload].in_reg = 0;
479 rld[t_reload].out_reg = 0;
480 rld[t_reload].opnum = opnum;
481 rld[t_reload].when_needed = secondary_type;
482 rld[t_reload].secondary_in_reload = -1;
483 rld[t_reload].secondary_out_reload = -1;
484 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
485 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
486 rld[t_reload].secondary_p = 1;
492 /* See if we can reuse an existing secondary reload. */
493 for (s_reload = 0; s_reload < n_reloads; s_reload++)
494 if (rld[s_reload].secondary_p
495 && (reg_class_subset_p (class, rld[s_reload].class)
496 || reg_class_subset_p (rld[s_reload].class, class))
497 && ((in_p && rld[s_reload].inmode == mode)
498 || (! in_p && rld[s_reload].outmode == mode))
499 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
500 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
501 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
502 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
503 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
504 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
505 opnum, rld[s_reload].opnum))
508 rld[s_reload].inmode = mode;
510 rld[s_reload].outmode = mode;
512 if (reg_class_subset_p (class, rld[s_reload].class))
513 rld[s_reload].class = class;
515 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
516 rld[s_reload].optional &= optional;
517 rld[s_reload].secondary_p = 1;
518 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
519 opnum, rld[s_reload].opnum))
520 rld[s_reload].when_needed = RELOAD_OTHER;
523 if (s_reload == n_reloads)
525 #ifdef SECONDARY_MEMORY_NEEDED
526 /* If we need a memory location to copy between the two reload regs,
527 set it up now. Note that we do the input case before making
528 the reload and the output case after. This is due to the
529 way reloads are output. */
531 if (in_p && icode == CODE_FOR_nothing
532 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
534 get_secondary_mem (x, reload_mode, opnum, type);
536 /* We may have just added new reloads. Make sure we add
537 the new reload at the end. */
538 s_reload = n_reloads;
542 /* We need to make a new secondary reload for this register class. */
543 rld[s_reload].in = rld[s_reload].out = 0;
544 rld[s_reload].class = class;
546 rld[s_reload].inmode = in_p ? mode : VOIDmode;
547 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
548 rld[s_reload].reg_rtx = 0;
549 rld[s_reload].optional = optional;
550 rld[s_reload].inc = 0;
551 /* Maybe we could combine these, but it seems too tricky. */
552 rld[s_reload].nocombine = 1;
553 rld[s_reload].in_reg = 0;
554 rld[s_reload].out_reg = 0;
555 rld[s_reload].opnum = opnum;
556 rld[s_reload].when_needed = secondary_type;
557 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
558 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
559 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
560 rld[s_reload].secondary_out_icode
561 = ! in_p ? t_icode : CODE_FOR_nothing;
562 rld[s_reload].secondary_p = 1;
566 #ifdef SECONDARY_MEMORY_NEEDED
567 if (! in_p && icode == CODE_FOR_nothing
568 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
569 get_secondary_mem (x, mode, opnum, type);
576 #endif /* HAVE_SECONDARY_RELOADS */
578 #ifdef SECONDARY_MEMORY_NEEDED
580 /* Return a memory location that will be used to copy X in mode MODE.
581 If we haven't already made a location for this mode in this insn,
582 call find_reloads_address on the location being returned. */
585 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
586 int opnum, enum reload_type type)
591 /* By default, if MODE is narrower than a word, widen it to a word.
592 This is required because most machines that require these memory
593 locations do not support short load and stores from all registers
594 (e.g., FP registers). */
596 #ifdef SECONDARY_MEMORY_NEEDED_MODE
597 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
599 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
600 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
603 /* If we already have made a MEM for this operand in MODE, return it. */
604 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
605 return secondary_memlocs_elim[(int) mode][opnum];
607 /* If this is the first time we've tried to get a MEM for this mode,
608 allocate a new one. `something_changed' in reload will get set
609 by noticing that the frame size has changed. */
611 if (secondary_memlocs[(int) mode] == 0)
613 #ifdef SECONDARY_MEMORY_NEEDED_RTX
614 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
616 secondary_memlocs[(int) mode]
617 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
621 /* Get a version of the address doing any eliminations needed. If that
622 didn't give us a new MEM, make a new one if it isn't valid. */
624 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
625 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
627 if (! mem_valid && loc == secondary_memlocs[(int) mode])
628 loc = copy_rtx (loc);
630 /* The only time the call below will do anything is if the stack
631 offset is too large. In that case IND_LEVELS doesn't matter, so we
632 can just pass a zero. Adjust the type to be the address of the
633 corresponding object. If the address was valid, save the eliminated
634 address. If it wasn't valid, we need to make a reload each time, so
639 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
640 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
643 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
647 secondary_memlocs_elim[(int) mode][opnum] = loc;
648 if (secondary_memlocs_elim_used <= (int)mode)
649 secondary_memlocs_elim_used = (int)mode + 1;
653 /* Clear any secondary memory locations we've made. */
656 clear_secondary_mem (void)
658 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
660 #endif /* SECONDARY_MEMORY_NEEDED */
662 /* Find the largest class for which every register number plus N is valid in
663 M1 (if in range) and is cheap to move into REGNO.
664 Abort if no such class exists. */
666 static enum reg_class
667 find_valid_class (enum machine_mode m1 ATTRIBUTE_UNUSED, int n,
668 unsigned int dest_regno ATTRIBUTE_UNUSED)
673 enum reg_class best_class = NO_REGS;
674 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
675 unsigned int best_size = 0;
678 for (class = 1; class < N_REG_CLASSES; class++)
681 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
682 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
683 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
684 && ! HARD_REGNO_MODE_OK (regno + n, m1))
689 cost = REGISTER_MOVE_COST (m1, class, dest_class);
691 if ((reg_class_size[class] > best_size
692 && (best_cost < 0 || best_cost >= cost))
696 best_size = reg_class_size[class];
697 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
707 /* Return the number of a previously made reload that can be combined with
708 a new one, or n_reloads if none of the existing reloads can be used.
709 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
710 push_reload, they determine the kind of the new reload that we try to
711 combine. P_IN points to the corresponding value of IN, which can be
712 modified by this function.
713 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
716 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
717 enum reload_type type, int opnum, int dont_share)
721 /* We can't merge two reloads if the output of either one is
724 if (earlyclobber_operand_p (out))
727 /* We can use an existing reload if the class is right
728 and at least one of IN and OUT is a match
729 and the other is at worst neutral.
730 (A zero compared against anything is neutral.)
732 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
733 for the same thing since that can cause us to need more reload registers
734 than we otherwise would. */
736 for (i = 0; i < n_reloads; i++)
737 if ((reg_class_subset_p (class, rld[i].class)
738 || reg_class_subset_p (rld[i].class, class))
739 /* If the existing reload has a register, it must fit our class. */
740 && (rld[i].reg_rtx == 0
741 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
742 true_regnum (rld[i].reg_rtx)))
743 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
744 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
745 || (out != 0 && MATCHES (rld[i].out, out)
746 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
747 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
748 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
749 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
752 /* Reloading a plain reg for input can match a reload to postincrement
753 that reg, since the postincrement's value is the right value.
754 Likewise, it can match a preincrement reload, since we regard
755 the preincrementation as happening before any ref in this insn
757 for (i = 0; i < n_reloads; i++)
758 if ((reg_class_subset_p (class, rld[i].class)
759 || reg_class_subset_p (rld[i].class, class))
760 /* If the existing reload has a register, it must fit our
762 && (rld[i].reg_rtx == 0
763 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
764 true_regnum (rld[i].reg_rtx)))
765 && out == 0 && rld[i].out == 0 && rld[i].in != 0
766 && ((GET_CODE (in) == REG
767 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
768 && MATCHES (XEXP (rld[i].in, 0), in))
769 || (GET_CODE (rld[i].in) == REG
770 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
771 && MATCHES (XEXP (in, 0), rld[i].in)))
772 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
773 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
774 && MERGABLE_RELOADS (type, rld[i].when_needed,
775 opnum, rld[i].opnum))
777 /* Make sure reload_in ultimately has the increment,
778 not the plain register. */
779 if (GET_CODE (in) == REG)
786 /* Return nonzero if X is a SUBREG which will require reloading of its
787 SUBREG_REG expression. */
790 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
794 /* Only SUBREGs are problematical. */
795 if (GET_CODE (x) != SUBREG)
798 inner = SUBREG_REG (x);
800 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
801 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
804 /* If INNER is not a hard register, then INNER will not need to
806 if (GET_CODE (inner) != REG
807 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
810 /* If INNER is not ok for MODE, then INNER will need reloading. */
811 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
814 /* If the outer part is a word or smaller, INNER larger than a
815 word and the number of regs for INNER is not the same as the
816 number of words in INNER, then INNER will need reloading. */
817 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
819 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
820 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
821 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
824 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
825 requiring an extra reload register. The caller has already found that
826 IN contains some reference to REGNO, so check that we can produce the
827 new value in a single step. E.g. if we have
828 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
829 instruction that adds one to a register, this should succeed.
830 However, if we have something like
831 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
832 needs to be loaded into a register first, we need a separate reload
834 Such PLUS reloads are generated by find_reload_address_part.
835 The out-of-range PLUS expressions are usually introduced in the instruction
836 patterns by register elimination and substituting pseudos without a home
837 by their function-invariant equivalences. */
839 can_reload_into (rtx in, int regno, enum machine_mode mode)
843 struct recog_data save_recog_data;
845 /* For matching constraints, we often get notional input reloads where
846 we want to use the original register as the reload register. I.e.
847 technically this is a non-optional input-output reload, but IN is
848 already a valid register, and has been chosen as the reload register.
849 Speed this up, since it trivially works. */
850 if (GET_CODE (in) == REG)
853 /* To test MEMs properly, we'd have to take into account all the reloads
854 that are already scheduled, which can become quite complicated.
855 And since we've already handled address reloads for this MEM, it
856 should always succeed anyway. */
857 if (GET_CODE (in) == MEM)
860 /* If we can make a simple SET insn that does the job, everything should
862 dst = gen_rtx_REG (mode, regno);
863 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
864 save_recog_data = recog_data;
865 if (recog_memoized (test_insn) >= 0)
867 extract_insn (test_insn);
868 r = constrain_operands (1);
870 recog_data = save_recog_data;
874 /* Record one reload that needs to be performed.
875 IN is an rtx saying where the data are to be found before this instruction.
876 OUT says where they must be stored after the instruction.
877 (IN is zero for data not read, and OUT is zero for data not written.)
878 INLOC and OUTLOC point to the places in the instructions where
879 IN and OUT were found.
880 If IN and OUT are both nonzero, it means the same register must be used
881 to reload both IN and OUT.
883 CLASS is a register class required for the reloaded data.
884 INMODE is the machine mode that the instruction requires
885 for the reg that replaces IN and OUTMODE is likewise for OUT.
887 If IN is zero, then OUT's location and mode should be passed as
890 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
892 OPTIONAL nonzero means this reload does not need to be performed:
893 it can be discarded if that is more convenient.
895 OPNUM and TYPE say what the purpose of this reload is.
897 The return value is the reload-number for this reload.
899 If both IN and OUT are nonzero, in some rare cases we might
900 want to make two separate reloads. (Actually we never do this now.)
901 Therefore, the reload-number for OUT is stored in
902 output_reloadnum when we return; the return value applies to IN.
903 Usually (presently always), when IN and OUT are nonzero,
904 the two reload-numbers are equal, but the caller should be careful to
908 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
909 enum reg_class class, enum machine_mode inmode,
910 enum machine_mode outmode, int strict_low, int optional,
911 int opnum, enum reload_type type)
915 int dont_remove_subreg = 0;
916 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
917 int secondary_in_reload = -1, secondary_out_reload = -1;
918 enum insn_code secondary_in_icode = CODE_FOR_nothing;
919 enum insn_code secondary_out_icode = CODE_FOR_nothing;
921 /* INMODE and/or OUTMODE could be VOIDmode if no mode
922 has been specified for the operand. In that case,
923 use the operand's mode as the mode to reload. */
924 if (inmode == VOIDmode && in != 0)
925 inmode = GET_MODE (in);
926 if (outmode == VOIDmode && out != 0)
927 outmode = GET_MODE (out);
929 /* If IN is a pseudo register everywhere-equivalent to a constant, and
930 it is not in a hard register, reload straight from the constant,
931 since we want to get rid of such pseudo registers.
932 Often this is done earlier, but not always in find_reloads_address. */
933 if (in != 0 && GET_CODE (in) == REG)
935 int regno = REGNO (in);
937 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
938 && reg_equiv_constant[regno] != 0)
939 in = reg_equiv_constant[regno];
942 /* Likewise for OUT. Of course, OUT will never be equivalent to
943 an actual constant, but it might be equivalent to a memory location
944 (in the case of a parameter). */
945 if (out != 0 && GET_CODE (out) == REG)
947 int regno = REGNO (out);
949 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
950 && reg_equiv_constant[regno] != 0)
951 out = reg_equiv_constant[regno];
954 /* If we have a read-write operand with an address side-effect,
955 change either IN or OUT so the side-effect happens only once. */
956 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
957 switch (GET_CODE (XEXP (in, 0)))
959 case POST_INC: case POST_DEC: case POST_MODIFY:
960 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
963 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
964 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
971 /* If we are reloading a (SUBREG constant ...), really reload just the
972 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
973 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
974 a pseudo and hence will become a MEM) with M1 wider than M2 and the
975 register is a pseudo, also reload the inside expression.
976 For machines that extend byte loads, do this for any SUBREG of a pseudo
977 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
978 M2 is an integral mode that gets extended when loaded.
979 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
980 either M1 is not valid for R or M2 is wider than a word but we only
981 need one word to store an M2-sized quantity in R.
982 (However, if OUT is nonzero, we need to reload the reg *and*
983 the subreg, so do nothing here, and let following statement handle it.)
985 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
986 we can't handle it here because CONST_INT does not indicate a mode.
988 Similarly, we must reload the inside expression if we have a
989 STRICT_LOW_PART (presumably, in == out in the cas).
991 Also reload the inner expression if it does not require a secondary
992 reload but the SUBREG does.
994 Finally, reload the inner expression if it is a register that is in
995 the class whose registers cannot be referenced in a different size
996 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
997 cannot reload just the inside since we might end up with the wrong
998 register class. But if it is inside a STRICT_LOW_PART, we have
999 no choice, so we hope we do get the right register class there. */
1001 if (in != 0 && GET_CODE (in) == SUBREG
1002 && (subreg_lowpart_p (in) || strict_low)
1003 #ifdef CANNOT_CHANGE_MODE_CLASS
1004 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1006 && (CONSTANT_P (SUBREG_REG (in))
1007 || GET_CODE (SUBREG_REG (in)) == PLUS
1009 || (((GET_CODE (SUBREG_REG (in)) == REG
1010 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1011 || GET_CODE (SUBREG_REG (in)) == MEM)
1012 && ((GET_MODE_SIZE (inmode)
1013 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1014 #ifdef LOAD_EXTEND_OP
1015 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1016 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1018 && (GET_MODE_SIZE (inmode)
1019 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1020 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1021 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
1023 #ifdef WORD_REGISTER_OPERATIONS
1024 || ((GET_MODE_SIZE (inmode)
1025 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1026 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1027 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1031 || (GET_CODE (SUBREG_REG (in)) == REG
1032 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1033 /* The case where out is nonzero
1034 is handled differently in the following statement. */
1035 && (out == 0 || subreg_lowpart_p (in))
1036 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1037 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1039 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1041 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1042 GET_MODE (SUBREG_REG (in)))))
1043 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1044 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1045 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1046 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1047 GET_MODE (SUBREG_REG (in)),
1051 #ifdef CANNOT_CHANGE_MODE_CLASS
1052 || (GET_CODE (SUBREG_REG (in)) == REG
1053 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1054 && REG_CANNOT_CHANGE_MODE_P
1055 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1059 in_subreg_loc = inloc;
1060 inloc = &SUBREG_REG (in);
1062 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1063 if (GET_CODE (in) == MEM)
1064 /* This is supposed to happen only for paradoxical subregs made by
1065 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1066 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1069 inmode = GET_MODE (in);
1072 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1073 either M1 is not valid for R or M2 is wider than a word but we only
1074 need one word to store an M2-sized quantity in R.
1076 However, we must reload the inner reg *as well as* the subreg in
1079 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1080 code above. This can happen if SUBREG_BYTE != 0. */
1082 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1084 enum reg_class in_class = class;
1086 if (GET_CODE (SUBREG_REG (in)) == REG)
1088 = find_valid_class (inmode,
1089 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1090 GET_MODE (SUBREG_REG (in)),
1093 REGNO (SUBREG_REG (in)));
1095 /* This relies on the fact that emit_reload_insns outputs the
1096 instructions for input reloads of type RELOAD_OTHER in the same
1097 order as the reloads. Thus if the outer reload is also of type
1098 RELOAD_OTHER, we are guaranteed that this inner reload will be
1099 output before the outer reload. */
1100 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1101 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1102 dont_remove_subreg = 1;
1105 /* Similarly for paradoxical and problematical SUBREGs on the output.
1106 Note that there is no reason we need worry about the previous value
1107 of SUBREG_REG (out); even if wider than out,
1108 storing in a subreg is entitled to clobber it all
1109 (except in the case of STRICT_LOW_PART,
1110 and in that case the constraint should label it input-output.) */
1111 if (out != 0 && GET_CODE (out) == SUBREG
1112 && (subreg_lowpart_p (out) || strict_low)
1113 #ifdef CANNOT_CHANGE_MODE_CLASS
1114 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1116 && (CONSTANT_P (SUBREG_REG (out))
1118 || (((GET_CODE (SUBREG_REG (out)) == REG
1119 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1120 || GET_CODE (SUBREG_REG (out)) == MEM)
1121 && ((GET_MODE_SIZE (outmode)
1122 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1123 #ifdef WORD_REGISTER_OPERATIONS
1124 || ((GET_MODE_SIZE (outmode)
1125 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1126 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1127 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1131 || (GET_CODE (SUBREG_REG (out)) == REG
1132 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1133 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1134 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1136 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1138 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1139 GET_MODE (SUBREG_REG (out)))))
1140 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1141 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1142 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1143 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1144 GET_MODE (SUBREG_REG (out)),
1148 #ifdef CANNOT_CHANGE_MODE_CLASS
1149 || (GET_CODE (SUBREG_REG (out)) == REG
1150 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1151 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1152 GET_MODE (SUBREG_REG (out)),
1157 out_subreg_loc = outloc;
1158 outloc = &SUBREG_REG (out);
1160 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1161 if (GET_CODE (out) == MEM
1162 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1165 outmode = GET_MODE (out);
1168 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1169 either M1 is not valid for R or M2 is wider than a word but we only
1170 need one word to store an M2-sized quantity in R.
1172 However, we must reload the inner reg *as well as* the subreg in
1173 that case. In this case, the inner reg is an in-out reload. */
1175 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1177 /* This relies on the fact that emit_reload_insns outputs the
1178 instructions for output reloads of type RELOAD_OTHER in reverse
1179 order of the reloads. Thus if the outer reload is also of type
1180 RELOAD_OTHER, we are guaranteed that this inner reload will be
1181 output after the outer reload. */
1182 dont_remove_subreg = 1;
1183 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1185 find_valid_class (outmode,
1186 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1187 GET_MODE (SUBREG_REG (out)),
1190 REGNO (SUBREG_REG (out))),
1191 VOIDmode, VOIDmode, 0, 0,
1192 opnum, RELOAD_OTHER);
1195 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1196 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1197 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1198 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1201 /* If IN is a SUBREG of a hard register, make a new REG. This
1202 simplifies some of the cases below. */
1204 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1205 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1206 && ! dont_remove_subreg)
1207 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1209 /* Similarly for OUT. */
1210 if (out != 0 && GET_CODE (out) == SUBREG
1211 && GET_CODE (SUBREG_REG (out)) == REG
1212 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1213 && ! dont_remove_subreg)
1214 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1216 /* Narrow down the class of register wanted if that is
1217 desirable on this machine for efficiency. */
1219 class = PREFERRED_RELOAD_CLASS (in, class);
1221 /* Output reloads may need analogous treatment, different in detail. */
1222 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1224 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1227 /* Make sure we use a class that can handle the actual pseudo
1228 inside any subreg. For example, on the 386, QImode regs
1229 can appear within SImode subregs. Although GENERAL_REGS
1230 can handle SImode, QImode needs a smaller class. */
1231 #ifdef LIMIT_RELOAD_CLASS
1233 class = LIMIT_RELOAD_CLASS (inmode, class);
1234 else if (in != 0 && GET_CODE (in) == SUBREG)
1235 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1238 class = LIMIT_RELOAD_CLASS (outmode, class);
1239 if (out != 0 && GET_CODE (out) == SUBREG)
1240 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1243 /* Verify that this class is at least possible for the mode that
1245 if (this_insn_is_asm)
1247 enum machine_mode mode;
1248 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1252 if (mode == VOIDmode)
1254 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1259 outmode = word_mode;
1261 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1262 if (HARD_REGNO_MODE_OK (i, mode)
1263 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1265 int nregs = HARD_REGNO_NREGS (i, mode);
1268 for (j = 1; j < nregs; j++)
1269 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1274 if (i == FIRST_PSEUDO_REGISTER)
1276 error_for_asm (this_insn, "impossible register constraint in `asm'");
1281 /* Optional output reloads are always OK even if we have no register class,
1282 since the function of these reloads is only to have spill_reg_store etc.
1283 set, so that the storing insn can be deleted later. */
1284 if (class == NO_REGS
1285 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1288 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1292 /* See if we need a secondary reload register to move between CLASS
1293 and IN or CLASS and OUT. Get the icode and push any required reloads
1294 needed for each of them if so. */
1296 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1299 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1300 &secondary_in_icode);
1303 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1304 if (out != 0 && GET_CODE (out) != SCRATCH)
1305 secondary_out_reload
1306 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1307 type, &secondary_out_icode);
1310 /* We found no existing reload suitable for re-use.
1311 So add an additional reload. */
1313 #ifdef SECONDARY_MEMORY_NEEDED
1314 /* If a memory location is needed for the copy, make one. */
1315 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1316 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1317 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1319 get_secondary_mem (in, inmode, opnum, type);
1325 rld[i].class = class;
1326 rld[i].inmode = inmode;
1327 rld[i].outmode = outmode;
1329 rld[i].optional = optional;
1331 rld[i].nocombine = 0;
1332 rld[i].in_reg = inloc ? *inloc : 0;
1333 rld[i].out_reg = outloc ? *outloc : 0;
1334 rld[i].opnum = opnum;
1335 rld[i].when_needed = type;
1336 rld[i].secondary_in_reload = secondary_in_reload;
1337 rld[i].secondary_out_reload = secondary_out_reload;
1338 rld[i].secondary_in_icode = secondary_in_icode;
1339 rld[i].secondary_out_icode = secondary_out_icode;
1340 rld[i].secondary_p = 0;
1344 #ifdef SECONDARY_MEMORY_NEEDED
1345 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1346 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1347 && SECONDARY_MEMORY_NEEDED (class,
1348 REGNO_REG_CLASS (reg_or_subregno (out)),
1350 get_secondary_mem (out, outmode, opnum, type);
1355 /* We are reusing an existing reload,
1356 but we may have additional information for it.
1357 For example, we may now have both IN and OUT
1358 while the old one may have just one of them. */
1360 /* The modes can be different. If they are, we want to reload in
1361 the larger mode, so that the value is valid for both modes. */
1362 if (inmode != VOIDmode
1363 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1364 rld[i].inmode = inmode;
1365 if (outmode != VOIDmode
1366 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1367 rld[i].outmode = outmode;
1370 rtx in_reg = inloc ? *inloc : 0;
1371 /* If we merge reloads for two distinct rtl expressions that
1372 are identical in content, there might be duplicate address
1373 reloads. Remove the extra set now, so that if we later find
1374 that we can inherit this reload, we can get rid of the
1375 address reloads altogether.
1377 Do not do this if both reloads are optional since the result
1378 would be an optional reload which could potentially leave
1379 unresolved address replacements.
1381 It is not sufficient to call transfer_replacements since
1382 choose_reload_regs will remove the replacements for address
1383 reloads of inherited reloads which results in the same
1385 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1386 && ! (rld[i].optional && optional))
1388 /* We must keep the address reload with the lower operand
1390 if (opnum > rld[i].opnum)
1392 remove_address_replacements (in);
1394 in_reg = rld[i].in_reg;
1397 remove_address_replacements (rld[i].in);
1400 rld[i].in_reg = in_reg;
1405 rld[i].out_reg = outloc ? *outloc : 0;
1407 if (reg_class_subset_p (class, rld[i].class))
1408 rld[i].class = class;
1409 rld[i].optional &= optional;
1410 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1411 opnum, rld[i].opnum))
1412 rld[i].when_needed = RELOAD_OTHER;
1413 rld[i].opnum = MIN (rld[i].opnum, opnum);
1416 /* If the ostensible rtx being reloaded differs from the rtx found
1417 in the location to substitute, this reload is not safe to combine
1418 because we cannot reliably tell whether it appears in the insn. */
1420 if (in != 0 && in != *inloc)
1421 rld[i].nocombine = 1;
1424 /* This was replaced by changes in find_reloads_address_1 and the new
1425 function inc_for_reload, which go with a new meaning of reload_inc. */
1427 /* If this is an IN/OUT reload in an insn that sets the CC,
1428 it must be for an autoincrement. It doesn't work to store
1429 the incremented value after the insn because that would clobber the CC.
1430 So we must do the increment of the value reloaded from,
1431 increment it, store it back, then decrement again. */
1432 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1436 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1437 /* If we did not find a nonzero amount-to-increment-by,
1438 that contradicts the belief that IN is being incremented
1439 in an address in this insn. */
1440 if (rld[i].inc == 0)
1445 /* If we will replace IN and OUT with the reload-reg,
1446 record where they are located so that substitution need
1447 not do a tree walk. */
1449 if (replace_reloads)
1453 struct replacement *r = &replacements[n_replacements++];
1455 r->subreg_loc = in_subreg_loc;
1459 if (outloc != 0 && outloc != inloc)
1461 struct replacement *r = &replacements[n_replacements++];
1464 r->subreg_loc = out_subreg_loc;
1469 /* If this reload is just being introduced and it has both
1470 an incoming quantity and an outgoing quantity that are
1471 supposed to be made to match, see if either one of the two
1472 can serve as the place to reload into.
1474 If one of them is acceptable, set rld[i].reg_rtx
1477 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1479 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1482 earlyclobber_operand_p (out));
1484 /* If the outgoing register already contains the same value
1485 as the incoming one, we can dispense with loading it.
1486 The easiest way to tell the caller that is to give a phony
1487 value for the incoming operand (same as outgoing one). */
1488 if (rld[i].reg_rtx == out
1489 && (GET_CODE (in) == REG || CONSTANT_P (in))
1490 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1491 static_reload_reg_p, i, inmode))
1495 /* If this is an input reload and the operand contains a register that
1496 dies in this insn and is used nowhere else, see if it is the right class
1497 to be used for this reload. Use it if so. (This occurs most commonly
1498 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1499 this if it is also an output reload that mentions the register unless
1500 the output is a SUBREG that clobbers an entire register.
1502 Note that the operand might be one of the spill regs, if it is a
1503 pseudo reg and we are in a block where spilling has not taken place.
1504 But if there is no spilling in this block, that is OK.
1505 An explicitly used hard reg cannot be a spill reg. */
1507 if (rld[i].reg_rtx == 0 && in != 0)
1511 enum machine_mode rel_mode = inmode;
1513 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1516 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1517 if (REG_NOTE_KIND (note) == REG_DEAD
1518 && GET_CODE (XEXP (note, 0)) == REG
1519 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1520 && reg_mentioned_p (XEXP (note, 0), in)
1521 && ! refers_to_regno_for_reload_p (regno,
1523 + HARD_REGNO_NREGS (regno,
1525 PATTERN (this_insn), inloc)
1526 /* If this is also an output reload, IN cannot be used as
1527 the reload register if it is set in this insn unless IN
1529 && (out == 0 || in == out
1530 || ! hard_reg_set_here_p (regno,
1532 + HARD_REGNO_NREGS (regno,
1534 PATTERN (this_insn)))
1535 /* ??? Why is this code so different from the previous?
1536 Is there any simple coherent way to describe the two together?
1537 What's going on here. */
1539 || (GET_CODE (in) == SUBREG
1540 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1542 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1543 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1544 /* Make sure the operand fits in the reg that dies. */
1545 && (GET_MODE_SIZE (rel_mode)
1546 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1547 && HARD_REGNO_MODE_OK (regno, inmode)
1548 && HARD_REGNO_MODE_OK (regno, outmode))
1551 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1552 HARD_REGNO_NREGS (regno, outmode));
1554 for (offs = 0; offs < nregs; offs++)
1555 if (fixed_regs[regno + offs]
1556 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1561 && (! (refers_to_regno_for_reload_p
1562 (regno, (regno + HARD_REGNO_NREGS (regno, inmode)),
1564 || can_reload_into (in, regno, inmode)))
1566 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1573 output_reloadnum = i;
1578 /* Record an additional place we must replace a value
1579 for which we have already recorded a reload.
1580 RELOADNUM is the value returned by push_reload
1581 when the reload was recorded.
1582 This is used in insn patterns that use match_dup. */
1585 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1587 if (replace_reloads)
1589 struct replacement *r = &replacements[n_replacements++];
1590 r->what = reloadnum;
1597 /* Duplicate any replacement we have recorded to apply at
1598 location ORIG_LOC to also be performed at DUP_LOC.
1599 This is used in insn patterns that use match_dup. */
1602 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1604 int i, n = n_replacements;
1606 for (i = 0; i < n; i++)
1608 struct replacement *r = &replacements[i];
1609 if (r->where == orig_loc)
1610 push_replacement (dup_loc, r->what, r->mode);
1614 /* Transfer all replacements that used to be in reload FROM to be in
1618 transfer_replacements (int to, int from)
1622 for (i = 0; i < n_replacements; i++)
1623 if (replacements[i].what == from)
1624 replacements[i].what = to;
1627 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1628 or a subpart of it. If we have any replacements registered for IN_RTX,
1629 cancel the reloads that were supposed to load them.
1630 Return nonzero if we canceled any reloads. */
1632 remove_address_replacements (rtx in_rtx)
1635 char reload_flags[MAX_RELOADS];
1636 int something_changed = 0;
1638 memset (reload_flags, 0, sizeof reload_flags);
1639 for (i = 0, j = 0; i < n_replacements; i++)
1641 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1642 reload_flags[replacements[i].what] |= 1;
1645 replacements[j++] = replacements[i];
1646 reload_flags[replacements[i].what] |= 2;
1649 /* Note that the following store must be done before the recursive calls. */
1652 for (i = n_reloads - 1; i >= 0; i--)
1654 if (reload_flags[i] == 1)
1656 deallocate_reload_reg (i);
1657 remove_address_replacements (rld[i].in);
1659 something_changed = 1;
1662 return something_changed;
1665 /* If there is only one output reload, and it is not for an earlyclobber
1666 operand, try to combine it with a (logically unrelated) input reload
1667 to reduce the number of reload registers needed.
1669 This is safe if the input reload does not appear in
1670 the value being output-reloaded, because this implies
1671 it is not needed any more once the original insn completes.
1673 If that doesn't work, see we can use any of the registers that
1674 die in this insn as a reload register. We can if it is of the right
1675 class and does not appear in the value being output-reloaded. */
1678 combine_reloads (void)
1681 int output_reload = -1;
1682 int secondary_out = -1;
1685 /* Find the output reload; return unless there is exactly one
1686 and that one is mandatory. */
1688 for (i = 0; i < n_reloads; i++)
1689 if (rld[i].out != 0)
1691 if (output_reload >= 0)
1696 if (output_reload < 0 || rld[output_reload].optional)
1699 /* An input-output reload isn't combinable. */
1701 if (rld[output_reload].in != 0)
1704 /* If this reload is for an earlyclobber operand, we can't do anything. */
1705 if (earlyclobber_operand_p (rld[output_reload].out))
1708 /* If there is a reload for part of the address of this operand, we would
1709 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1710 its life to the point where doing this combine would not lower the
1711 number of spill registers needed. */
1712 for (i = 0; i < n_reloads; i++)
1713 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1714 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1715 && rld[i].opnum == rld[output_reload].opnum)
1718 /* Check each input reload; can we combine it? */
1720 for (i = 0; i < n_reloads; i++)
1721 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1722 /* Life span of this reload must not extend past main insn. */
1723 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1724 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1725 && rld[i].when_needed != RELOAD_OTHER
1726 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1727 == CLASS_MAX_NREGS (rld[output_reload].class,
1728 rld[output_reload].outmode))
1730 && rld[i].reg_rtx == 0
1731 #ifdef SECONDARY_MEMORY_NEEDED
1732 /* Don't combine two reloads with different secondary
1733 memory locations. */
1734 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1735 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1736 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1737 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1739 && (SMALL_REGISTER_CLASSES
1740 ? (rld[i].class == rld[output_reload].class)
1741 : (reg_class_subset_p (rld[i].class,
1742 rld[output_reload].class)
1743 || reg_class_subset_p (rld[output_reload].class,
1745 && (MATCHES (rld[i].in, rld[output_reload].out)
1746 /* Args reversed because the first arg seems to be
1747 the one that we imagine being modified
1748 while the second is the one that might be affected. */
1749 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1751 /* However, if the input is a register that appears inside
1752 the output, then we also can't share.
1753 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1754 If the same reload reg is used for both reg 69 and the
1755 result to be stored in memory, then that result
1756 will clobber the address of the memory ref. */
1757 && ! (GET_CODE (rld[i].in) == REG
1758 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1759 rld[output_reload].out))))
1760 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1761 rld[i].when_needed != RELOAD_FOR_INPUT)
1762 && (reg_class_size[(int) rld[i].class]
1763 || SMALL_REGISTER_CLASSES)
1764 /* We will allow making things slightly worse by combining an
1765 input and an output, but no worse than that. */
1766 && (rld[i].when_needed == RELOAD_FOR_INPUT
1767 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1771 /* We have found a reload to combine with! */
1772 rld[i].out = rld[output_reload].out;
1773 rld[i].out_reg = rld[output_reload].out_reg;
1774 rld[i].outmode = rld[output_reload].outmode;
1775 /* Mark the old output reload as inoperative. */
1776 rld[output_reload].out = 0;
1777 /* The combined reload is needed for the entire insn. */
1778 rld[i].when_needed = RELOAD_OTHER;
1779 /* If the output reload had a secondary reload, copy it. */
1780 if (rld[output_reload].secondary_out_reload != -1)
1782 rld[i].secondary_out_reload
1783 = rld[output_reload].secondary_out_reload;
1784 rld[i].secondary_out_icode
1785 = rld[output_reload].secondary_out_icode;
1788 #ifdef SECONDARY_MEMORY_NEEDED
1789 /* Copy any secondary MEM. */
1790 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1791 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1792 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1794 /* If required, minimize the register class. */
1795 if (reg_class_subset_p (rld[output_reload].class,
1797 rld[i].class = rld[output_reload].class;
1799 /* Transfer all replacements from the old reload to the combined. */
1800 for (j = 0; j < n_replacements; j++)
1801 if (replacements[j].what == output_reload)
1802 replacements[j].what = i;
1807 /* If this insn has only one operand that is modified or written (assumed
1808 to be the first), it must be the one corresponding to this reload. It
1809 is safe to use anything that dies in this insn for that output provided
1810 that it does not occur in the output (we already know it isn't an
1811 earlyclobber. If this is an asm insn, give up. */
1813 if (INSN_CODE (this_insn) == -1)
1816 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1817 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1818 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1821 /* See if some hard register that dies in this insn and is not used in
1822 the output is the right class. Only works if the register we pick
1823 up can fully hold our output reload. */
1824 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1825 if (REG_NOTE_KIND (note) == REG_DEAD
1826 && GET_CODE (XEXP (note, 0)) == REG
1827 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1828 rld[output_reload].out)
1829 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1830 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1831 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1832 REGNO (XEXP (note, 0)))
1833 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1834 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1835 /* Ensure that a secondary or tertiary reload for this output
1836 won't want this register. */
1837 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1838 || (! (TEST_HARD_REG_BIT
1839 (reg_class_contents[(int) rld[secondary_out].class],
1840 REGNO (XEXP (note, 0))))
1841 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1842 || ! (TEST_HARD_REG_BIT
1843 (reg_class_contents[(int) rld[secondary_out].class],
1844 REGNO (XEXP (note, 0)))))))
1845 && ! fixed_regs[REGNO (XEXP (note, 0))])
1847 rld[output_reload].reg_rtx
1848 = gen_rtx_REG (rld[output_reload].outmode,
1849 REGNO (XEXP (note, 0)));
1854 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1855 See if one of IN and OUT is a register that may be used;
1856 this is desirable since a spill-register won't be needed.
1857 If so, return the register rtx that proves acceptable.
1859 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1860 CLASS is the register class required for the reload.
1862 If FOR_REAL is >= 0, it is the number of the reload,
1863 and in some cases when it can be discovered that OUT doesn't need
1864 to be computed, clear out rld[FOR_REAL].out.
1866 If FOR_REAL is -1, this should not be done, because this call
1867 is just to see if a register can be found, not to find and install it.
1869 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1870 puts an additional constraint on being able to use IN for OUT since
1871 IN must not appear elsewhere in the insn (it is assumed that IN itself
1872 is safe from the earlyclobber). */
1875 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1876 enum machine_mode inmode, enum machine_mode outmode,
1877 enum reg_class class, int for_real, int earlyclobber)
1885 /* If operands exceed a word, we can't use either of them
1886 unless they have the same size. */
1887 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1888 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1889 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1892 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1893 respectively refers to a hard register. */
1895 /* Find the inside of any subregs. */
1896 while (GET_CODE (out) == SUBREG)
1898 if (GET_CODE (SUBREG_REG (out)) == REG
1899 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1900 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1901 GET_MODE (SUBREG_REG (out)),
1904 out = SUBREG_REG (out);
1906 while (GET_CODE (in) == SUBREG)
1908 if (GET_CODE (SUBREG_REG (in)) == REG
1909 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1910 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1911 GET_MODE (SUBREG_REG (in)),
1914 in = SUBREG_REG (in);
1917 /* Narrow down the reg class, the same way push_reload will;
1918 otherwise we might find a dummy now, but push_reload won't. */
1919 class = PREFERRED_RELOAD_CLASS (in, class);
1921 /* See if OUT will do. */
1922 if (GET_CODE (out) == REG
1923 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1925 unsigned int regno = REGNO (out) + out_offset;
1926 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1929 /* When we consider whether the insn uses OUT,
1930 ignore references within IN. They don't prevent us
1931 from copying IN into OUT, because those refs would
1932 move into the insn that reloads IN.
1934 However, we only ignore IN in its role as this reload.
1935 If the insn uses IN elsewhere and it contains OUT,
1936 that counts. We can't be sure it's the "same" operand
1937 so it might not go through this reload. */
1939 *inloc = const0_rtx;
1941 if (regno < FIRST_PSEUDO_REGISTER
1942 && HARD_REGNO_MODE_OK (regno, outmode)
1943 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1944 PATTERN (this_insn), outloc))
1948 for (i = 0; i < nwords; i++)
1949 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1955 if (GET_CODE (real_out) == REG)
1958 value = gen_rtx_REG (outmode, regno);
1965 /* Consider using IN if OUT was not acceptable
1966 or if OUT dies in this insn (like the quotient in a divmod insn).
1967 We can't use IN unless it is dies in this insn,
1968 which means we must know accurately which hard regs are live.
1969 Also, the result can't go in IN if IN is used within OUT,
1970 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1971 if (hard_regs_live_known
1972 && GET_CODE (in) == REG
1973 && REGNO (in) < FIRST_PSEUDO_REGISTER
1975 || find_reg_note (this_insn, REG_UNUSED, real_out))
1976 && find_reg_note (this_insn, REG_DEAD, real_in)
1977 && !fixed_regs[REGNO (in)]
1978 && HARD_REGNO_MODE_OK (REGNO (in),
1979 /* The only case where out and real_out might
1980 have different modes is where real_out
1981 is a subreg, and in that case, out
1983 (GET_MODE (out) != VOIDmode
1984 ? GET_MODE (out) : outmode)))
1986 unsigned int regno = REGNO (in) + in_offset;
1987 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1989 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1990 && ! hard_reg_set_here_p (regno, regno + nwords,
1991 PATTERN (this_insn))
1993 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1994 PATTERN (this_insn), inloc)))
1998 for (i = 0; i < nwords; i++)
1999 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2005 /* If we were going to use OUT as the reload reg
2006 and changed our mind, it means OUT is a dummy that
2007 dies here. So don't bother copying value to it. */
2008 if (for_real >= 0 && value == real_out)
2009 rld[for_real].out = 0;
2010 if (GET_CODE (real_in) == REG)
2013 value = gen_rtx_REG (inmode, regno);
2021 /* This page contains subroutines used mainly for determining
2022 whether the IN or an OUT of a reload can serve as the
2025 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2028 earlyclobber_operand_p (rtx x)
2032 for (i = 0; i < n_earlyclobbers; i++)
2033 if (reload_earlyclobbers[i] == x)
2039 /* Return 1 if expression X alters a hard reg in the range
2040 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2041 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2042 X should be the body of an instruction. */
2045 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2047 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2049 rtx op0 = SET_DEST (x);
2051 while (GET_CODE (op0) == SUBREG)
2052 op0 = SUBREG_REG (op0);
2053 if (GET_CODE (op0) == REG)
2055 unsigned int r = REGNO (op0);
2057 /* See if this reg overlaps range under consideration. */
2059 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2063 else if (GET_CODE (x) == PARALLEL)
2065 int i = XVECLEN (x, 0) - 1;
2068 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2075 /* Return 1 if ADDR is a valid memory address for mode MODE,
2076 and check that each pseudo reg has the proper kind of
2080 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2082 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2089 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2090 if they are the same hard reg, and has special hacks for
2091 autoincrement and autodecrement.
2092 This is specifically intended for find_reloads to use
2093 in determining whether two operands match.
2094 X is the operand whose number is the lower of the two.
2096 The value is 2 if Y contains a pre-increment that matches
2097 a non-incrementing address in X. */
2099 /* ??? To be completely correct, we should arrange to pass
2100 for X the output operand and for Y the input operand.
2101 For now, we assume that the output operand has the lower number
2102 because that is natural in (SET output (... input ...)). */
2105 operands_match_p (rtx x, rtx y)
2108 RTX_CODE code = GET_CODE (x);
2114 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2115 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2116 && GET_CODE (SUBREG_REG (y)) == REG)))
2122 i = REGNO (SUBREG_REG (x));
2123 if (i >= FIRST_PSEUDO_REGISTER)
2125 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2126 GET_MODE (SUBREG_REG (x)),
2133 if (GET_CODE (y) == SUBREG)
2135 j = REGNO (SUBREG_REG (y));
2136 if (j >= FIRST_PSEUDO_REGISTER)
2138 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2139 GET_MODE (SUBREG_REG (y)),
2146 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2147 multiple hard register group, so that for example (reg:DI 0) and
2148 (reg:SI 1) will be considered the same register. */
2149 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2150 && i < FIRST_PSEUDO_REGISTER)
2151 i += HARD_REGNO_NREGS (i, GET_MODE (x)) - 1;
2152 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2153 && j < FIRST_PSEUDO_REGISTER)
2154 j += HARD_REGNO_NREGS (j, GET_MODE (y)) - 1;
2158 /* If two operands must match, because they are really a single
2159 operand of an assembler insn, then two postincrements are invalid
2160 because the assembler insn would increment only once.
2161 On the other hand, a postincrement matches ordinary indexing
2162 if the postincrement is the output operand. */
2163 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2164 return operands_match_p (XEXP (x, 0), y);
2165 /* Two preincrements are invalid
2166 because the assembler insn would increment only once.
2167 On the other hand, a preincrement matches ordinary indexing
2168 if the preincrement is the input operand.
2169 In this case, return 2, since some callers need to do special
2170 things when this happens. */
2171 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2172 || GET_CODE (y) == PRE_MODIFY)
2173 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2177 /* Now we have disposed of all the cases
2178 in which different rtx codes can match. */
2179 if (code != GET_CODE (y))
2181 if (code == LABEL_REF)
2182 return XEXP (x, 0) == XEXP (y, 0);
2183 if (code == SYMBOL_REF)
2184 return XSTR (x, 0) == XSTR (y, 0);
2186 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2188 if (GET_MODE (x) != GET_MODE (y))
2191 /* Compare the elements. If any pair of corresponding elements
2192 fail to match, return 0 for the whole things. */
2195 fmt = GET_RTX_FORMAT (code);
2196 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2202 if (XWINT (x, i) != XWINT (y, i))
2207 if (XINT (x, i) != XINT (y, i))
2212 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2215 /* If any subexpression returns 2,
2216 we should return 2 if we are successful. */
2225 if (XVECLEN (x, i) != XVECLEN (y, i))
2227 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2229 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2237 /* It is believed that rtx's at this level will never
2238 contain anything but integers and other rtx's,
2239 except for within LABEL_REFs and SYMBOL_REFs. */
2244 return 1 + success_2;
2247 /* Describe the range of registers or memory referenced by X.
2248 If X is a register, set REG_FLAG and put the first register
2249 number into START and the last plus one into END.
2250 If X is a memory reference, put a base address into BASE
2251 and a range of integer offsets into START and END.
2252 If X is pushing on the stack, we can assume it causes no trouble,
2253 so we set the SAFE field. */
2255 static struct decomposition
2258 struct decomposition val;
2264 if (GET_CODE (x) == MEM)
2266 rtx base = NULL_RTX, offset = 0;
2267 rtx addr = XEXP (x, 0);
2269 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2270 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2272 val.base = XEXP (addr, 0);
2273 val.start = -GET_MODE_SIZE (GET_MODE (x));
2274 val.end = GET_MODE_SIZE (GET_MODE (x));
2275 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2279 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2281 if (GET_CODE (XEXP (addr, 1)) == PLUS
2282 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2283 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2285 val.base = XEXP (addr, 0);
2286 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2287 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2288 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2293 if (GET_CODE (addr) == CONST)
2295 addr = XEXP (addr, 0);
2298 if (GET_CODE (addr) == PLUS)
2300 if (CONSTANT_P (XEXP (addr, 0)))
2302 base = XEXP (addr, 1);
2303 offset = XEXP (addr, 0);
2305 else if (CONSTANT_P (XEXP (addr, 1)))
2307 base = XEXP (addr, 0);
2308 offset = XEXP (addr, 1);
2315 offset = const0_rtx;
2317 if (GET_CODE (offset) == CONST)
2318 offset = XEXP (offset, 0);
2319 if (GET_CODE (offset) == PLUS)
2321 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2323 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2324 offset = XEXP (offset, 0);
2326 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2328 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2329 offset = XEXP (offset, 1);
2333 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2334 offset = const0_rtx;
2337 else if (GET_CODE (offset) != CONST_INT)
2339 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2340 offset = const0_rtx;
2343 if (all_const && GET_CODE (base) == PLUS)
2344 base = gen_rtx_CONST (GET_MODE (base), base);
2346 if (GET_CODE (offset) != CONST_INT)
2349 val.start = INTVAL (offset);
2350 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2354 else if (GET_CODE (x) == REG)
2357 val.start = true_regnum (x);
2360 /* A pseudo with no hard reg. */
2361 val.start = REGNO (x);
2362 val.end = val.start + 1;
2366 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2368 else if (GET_CODE (x) == SUBREG)
2370 if (GET_CODE (SUBREG_REG (x)) != REG)
2371 /* This could be more precise, but it's good enough. */
2372 return decompose (SUBREG_REG (x));
2374 val.start = true_regnum (x);
2376 return decompose (SUBREG_REG (x));
2379 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2381 else if (CONSTANT_P (x)
2382 /* This hasn't been assigned yet, so it can't conflict yet. */
2383 || GET_CODE (x) == SCRATCH)
2390 /* Return 1 if altering Y will not modify the value of X.
2391 Y is also described by YDATA, which should be decompose (Y). */
2394 immune_p (rtx x, rtx y, struct decomposition ydata)
2396 struct decomposition xdata;
2399 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2403 if (GET_CODE (y) != MEM)
2405 /* If Y is memory and X is not, Y can't affect X. */
2406 if (GET_CODE (x) != MEM)
2409 xdata = decompose (x);
2411 if (! rtx_equal_p (xdata.base, ydata.base))
2413 /* If bases are distinct symbolic constants, there is no overlap. */
2414 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2416 /* Constants and stack slots never overlap. */
2417 if (CONSTANT_P (xdata.base)
2418 && (ydata.base == frame_pointer_rtx
2419 || ydata.base == hard_frame_pointer_rtx
2420 || ydata.base == stack_pointer_rtx))
2422 if (CONSTANT_P (ydata.base)
2423 && (xdata.base == frame_pointer_rtx
2424 || xdata.base == hard_frame_pointer_rtx
2425 || xdata.base == stack_pointer_rtx))
2427 /* If either base is variable, we don't know anything. */
2431 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2434 /* Similar, but calls decompose. */
2437 safe_from_earlyclobber (rtx op, rtx clobber)
2439 struct decomposition early_data;
2441 early_data = decompose (clobber);
2442 return immune_p (op, clobber, early_data);
2445 /* Main entry point of this file: search the body of INSN
2446 for values that need reloading and record them with push_reload.
2447 REPLACE nonzero means record also where the values occur
2448 so that subst_reloads can be used.
2450 IND_LEVELS says how many levels of indirection are supported by this
2451 machine; a value of zero means that a memory reference is not a valid
2454 LIVE_KNOWN says we have valid information about which hard
2455 regs are live at each point in the program; this is true when
2456 we are called from global_alloc but false when stupid register
2457 allocation has been done.
2459 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2460 which is nonnegative if the reg has been commandeered for reloading into.
2461 It is copied into STATIC_RELOAD_REG_P and referenced from there
2462 by various subroutines.
2464 Return TRUE if some operands need to be changed, because of swapping
2465 commutative operands, reg_equiv_address substitution, or whatever. */
2468 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2469 short *reload_reg_p)
2471 int insn_code_number;
2474 /* These start out as the constraints for the insn
2475 and they are chewed up as we consider alternatives. */
2476 char *constraints[MAX_RECOG_OPERANDS];
2477 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2479 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2480 char pref_or_nothing[MAX_RECOG_OPERANDS];
2481 /* Nonzero for a MEM operand whose entire address needs a reload. */
2482 int address_reloaded[MAX_RECOG_OPERANDS];
2483 /* Nonzero for an address operand that needs to be completely reloaded. */
2484 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2485 /* Value of enum reload_type to use for operand. */
2486 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2487 /* Value of enum reload_type to use within address of operand. */
2488 enum reload_type address_type[MAX_RECOG_OPERANDS];
2489 /* Save the usage of each operand. */
2490 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2491 int no_input_reloads = 0, no_output_reloads = 0;
2493 int this_alternative[MAX_RECOG_OPERANDS];
2494 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2495 char this_alternative_win[MAX_RECOG_OPERANDS];
2496 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2497 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2498 int this_alternative_matches[MAX_RECOG_OPERANDS];
2500 int goal_alternative[MAX_RECOG_OPERANDS];
2501 int this_alternative_number;
2502 int goal_alternative_number = 0;
2503 int operand_reloadnum[MAX_RECOG_OPERANDS];
2504 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2505 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2506 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2507 char goal_alternative_win[MAX_RECOG_OPERANDS];
2508 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2509 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2510 int goal_alternative_swapped;
2513 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2514 rtx substed_operand[MAX_RECOG_OPERANDS];
2515 rtx body = PATTERN (insn);
2516 rtx set = single_set (insn);
2517 int goal_earlyclobber = 0, this_earlyclobber;
2518 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2524 n_earlyclobbers = 0;
2525 replace_reloads = replace;
2526 hard_regs_live_known = live_known;
2527 static_reload_reg_p = reload_reg_p;
2529 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2530 neither are insns that SET cc0. Insns that use CC0 are not allowed
2531 to have any input reloads. */
2532 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2533 no_output_reloads = 1;
2536 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2537 no_input_reloads = 1;
2538 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2539 no_output_reloads = 1;
2542 #ifdef SECONDARY_MEMORY_NEEDED
2543 /* The eliminated forms of any secondary memory locations are per-insn, so
2544 clear them out here. */
2546 if (secondary_memlocs_elim_used)
2548 memset (secondary_memlocs_elim, 0,
2549 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2550 secondary_memlocs_elim_used = 0;
2554 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2555 is cheap to move between them. If it is not, there may not be an insn
2556 to do the copy, so we may need a reload. */
2557 if (GET_CODE (body) == SET
2558 && GET_CODE (SET_DEST (body)) == REG
2559 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2560 && GET_CODE (SET_SRC (body)) == REG
2561 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2562 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2563 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2564 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2567 extract_insn (insn);
2569 noperands = reload_n_operands = recog_data.n_operands;
2570 n_alternatives = recog_data.n_alternatives;
2572 /* Just return "no reloads" if insn has no operands with constraints. */
2573 if (noperands == 0 || n_alternatives == 0)
2576 insn_code_number = INSN_CODE (insn);
2577 this_insn_is_asm = insn_code_number < 0;
2579 memcpy (operand_mode, recog_data.operand_mode,
2580 noperands * sizeof (enum machine_mode));
2581 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2585 /* If we will need to know, later, whether some pair of operands
2586 are the same, we must compare them now and save the result.
2587 Reloading the base and index registers will clobber them
2588 and afterward they will fail to match. */
2590 for (i = 0; i < noperands; i++)
2595 substed_operand[i] = recog_data.operand[i];
2598 modified[i] = RELOAD_READ;
2600 /* Scan this operand's constraint to see if it is an output operand,
2601 an in-out operand, is commutative, or should match another. */
2605 p += CONSTRAINT_LEN (c, p);
2607 modified[i] = RELOAD_WRITE;
2609 modified[i] = RELOAD_READ_WRITE;
2612 /* The last operand should not be marked commutative. */
2613 if (i == noperands - 1)
2616 /* We currently only support one commutative pair of
2617 operands. Some existing asm code currently uses more
2618 than one pair. Previously, that would usually work,
2619 but sometimes it would crash the compiler. We
2620 continue supporting that case as well as we can by
2621 silently ignoring all but the first pair. In the
2622 future we may handle it correctly. */
2623 if (commutative < 0)
2625 else if (!this_insn_is_asm)
2628 else if (ISDIGIT (c))
2630 c = strtoul (p - 1, &p, 10);
2632 operands_match[c][i]
2633 = operands_match_p (recog_data.operand[c],
2634 recog_data.operand[i]);
2636 /* An operand may not match itself. */
2640 /* If C can be commuted with C+1, and C might need to match I,
2641 then C+1 might also need to match I. */
2642 if (commutative >= 0)
2644 if (c == commutative || c == commutative + 1)
2646 int other = c + (c == commutative ? 1 : -1);
2647 operands_match[other][i]
2648 = operands_match_p (recog_data.operand[other],
2649 recog_data.operand[i]);
2651 if (i == commutative || i == commutative + 1)
2653 int other = i + (i == commutative ? 1 : -1);
2654 operands_match[c][other]
2655 = operands_match_p (recog_data.operand[c],
2656 recog_data.operand[other]);
2658 /* Note that C is supposed to be less than I.
2659 No need to consider altering both C and I because in
2660 that case we would alter one into the other. */
2666 /* Examine each operand that is a memory reference or memory address
2667 and reload parts of the addresses into index registers.
2668 Also here any references to pseudo regs that didn't get hard regs
2669 but are equivalent to constants get replaced in the insn itself
2670 with those constants. Nobody will ever see them again.
2672 Finally, set up the preferred classes of each operand. */
2674 for (i = 0; i < noperands; i++)
2676 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2678 address_reloaded[i] = 0;
2679 address_operand_reloaded[i] = 0;
2680 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2681 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2684 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2685 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2688 if (*constraints[i] == 0)
2689 /* Ignore things like match_operator operands. */
2691 else if (constraints[i][0] == 'p'
2692 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2694 address_operand_reloaded[i]
2695 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2696 recog_data.operand[i],
2697 recog_data.operand_loc[i],
2698 i, operand_type[i], ind_levels, insn);
2700 /* If we now have a simple operand where we used to have a
2701 PLUS or MULT, re-recognize and try again. */
2702 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2703 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2704 && (GET_CODE (recog_data.operand[i]) == MULT
2705 || GET_CODE (recog_data.operand[i]) == PLUS))
2707 INSN_CODE (insn) = -1;
2708 retval = find_reloads (insn, replace, ind_levels, live_known,
2713 recog_data.operand[i] = *recog_data.operand_loc[i];
2714 substed_operand[i] = recog_data.operand[i];
2716 /* Address operands are reloaded in their existing mode,
2717 no matter what is specified in the machine description. */
2718 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2720 else if (code == MEM)
2723 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2724 recog_data.operand_loc[i],
2725 XEXP (recog_data.operand[i], 0),
2726 &XEXP (recog_data.operand[i], 0),
2727 i, address_type[i], ind_levels, insn);
2728 recog_data.operand[i] = *recog_data.operand_loc[i];
2729 substed_operand[i] = recog_data.operand[i];
2731 else if (code == SUBREG)
2733 rtx reg = SUBREG_REG (recog_data.operand[i]);
2735 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2738 && &SET_DEST (set) == recog_data.operand_loc[i],
2740 &address_reloaded[i]);
2742 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2743 that didn't get a hard register, emit a USE with a REG_EQUAL
2744 note in front so that we might inherit a previous, possibly
2748 && GET_CODE (op) == MEM
2749 && GET_CODE (reg) == REG
2750 && (GET_MODE_SIZE (GET_MODE (reg))
2751 >= GET_MODE_SIZE (GET_MODE (op))))
2752 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2754 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2756 substed_operand[i] = recog_data.operand[i] = op;
2758 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2759 /* We can get a PLUS as an "operand" as a result of register
2760 elimination. See eliminate_regs and gen_reload. We handle
2761 a unary operator by reloading the operand. */
2762 substed_operand[i] = recog_data.operand[i]
2763 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2764 ind_levels, 0, insn,
2765 &address_reloaded[i]);
2766 else if (code == REG)
2768 /* This is equivalent to calling find_reloads_toplev.
2769 The code is duplicated for speed.
2770 When we find a pseudo always equivalent to a constant,
2771 we replace it by the constant. We must be sure, however,
2772 that we don't try to replace it in the insn in which it
2774 int regno = REGNO (recog_data.operand[i]);
2775 if (reg_equiv_constant[regno] != 0
2776 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2778 /* Record the existing mode so that the check if constants are
2779 allowed will work when operand_mode isn't specified. */
2781 if (operand_mode[i] == VOIDmode)
2782 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2784 substed_operand[i] = recog_data.operand[i]
2785 = reg_equiv_constant[regno];
2787 if (reg_equiv_memory_loc[regno] != 0
2788 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2789 /* We need not give a valid is_set_dest argument since the case
2790 of a constant equivalence was checked above. */
2791 substed_operand[i] = recog_data.operand[i]
2792 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2793 ind_levels, 0, insn,
2794 &address_reloaded[i]);
2796 /* If the operand is still a register (we didn't replace it with an
2797 equivalent), get the preferred class to reload it into. */
2798 code = GET_CODE (recog_data.operand[i]);
2800 = ((code == REG && REGNO (recog_data.operand[i])
2801 >= FIRST_PSEUDO_REGISTER)
2802 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2806 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2807 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2810 /* If this is simply a copy from operand 1 to operand 0, merge the
2811 preferred classes for the operands. */
2812 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2813 && recog_data.operand[1] == SET_SRC (set))
2815 preferred_class[0] = preferred_class[1]
2816 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2817 pref_or_nothing[0] |= pref_or_nothing[1];
2818 pref_or_nothing[1] |= pref_or_nothing[0];
2821 /* Now see what we need for pseudo-regs that didn't get hard regs
2822 or got the wrong kind of hard reg. For this, we must consider
2823 all the operands together against the register constraints. */
2825 best = MAX_RECOG_OPERANDS * 2 + 600;
2828 goal_alternative_swapped = 0;
2831 /* The constraints are made of several alternatives.
2832 Each operand's constraint looks like foo,bar,... with commas
2833 separating the alternatives. The first alternatives for all
2834 operands go together, the second alternatives go together, etc.
2836 First loop over alternatives. */
2838 for (this_alternative_number = 0;
2839 this_alternative_number < n_alternatives;
2840 this_alternative_number++)
2842 /* Loop over operands for one constraint alternative. */
2843 /* LOSERS counts those that don't fit this alternative
2844 and would require loading. */
2846 /* BAD is set to 1 if it some operand can't fit this alternative
2847 even after reloading. */
2849 /* REJECT is a count of how undesirable this alternative says it is
2850 if any reloading is required. If the alternative matches exactly
2851 then REJECT is ignored, but otherwise it gets this much
2852 counted against it in addition to the reloading needed. Each
2853 ? counts three times here since we want the disparaging caused by
2854 a bad register class to only count 1/3 as much. */
2857 this_earlyclobber = 0;
2859 for (i = 0; i < noperands; i++)
2861 char *p = constraints[i];
2866 /* 0 => this operand can be reloaded somehow for this alternative. */
2868 /* 0 => this operand can be reloaded if the alternative allows regs. */
2872 rtx operand = recog_data.operand[i];
2874 /* Nonzero means this is a MEM that must be reloaded into a reg
2875 regardless of what the constraint says. */
2876 int force_reload = 0;
2878 /* Nonzero if a constant forced into memory would be OK for this
2881 int earlyclobber = 0;
2883 /* If the predicate accepts a unary operator, it means that
2884 we need to reload the operand, but do not do this for
2885 match_operator and friends. */
2886 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2887 operand = XEXP (operand, 0);
2889 /* If the operand is a SUBREG, extract
2890 the REG or MEM (or maybe even a constant) within.
2891 (Constants can occur as a result of reg_equiv_constant.) */
2893 while (GET_CODE (operand) == SUBREG)
2895 /* Offset only matters when operand is a REG and
2896 it is a hard reg. This is because it is passed
2897 to reg_fits_class_p if it is a REG and all pseudos
2898 return 0 from that function. */
2899 if (GET_CODE (SUBREG_REG (operand)) == REG
2900 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2902 if (!subreg_offset_representable_p
2903 (REGNO (SUBREG_REG (operand)),
2904 GET_MODE (SUBREG_REG (operand)),
2905 SUBREG_BYTE (operand),
2906 GET_MODE (operand)))
2908 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2909 GET_MODE (SUBREG_REG (operand)),
2910 SUBREG_BYTE (operand),
2911 GET_MODE (operand));
2913 operand = SUBREG_REG (operand);
2914 /* Force reload if this is a constant or PLUS or if there may
2915 be a problem accessing OPERAND in the outer mode. */
2916 if (CONSTANT_P (operand)
2917 || GET_CODE (operand) == PLUS
2918 /* We must force a reload of paradoxical SUBREGs
2919 of a MEM because the alignment of the inner value
2920 may not be enough to do the outer reference. On
2921 big-endian machines, it may also reference outside
2924 On machines that extend byte operations and we have a
2925 SUBREG where both the inner and outer modes are no wider
2926 than a word and the inner mode is narrower, is integral,
2927 and gets extended when loaded from memory, combine.c has
2928 made assumptions about the behavior of the machine in such
2929 register access. If the data is, in fact, in memory we
2930 must always load using the size assumed to be in the
2931 register and let the insn do the different-sized
2934 This is doubly true if WORD_REGISTER_OPERATIONS. In
2935 this case eliminate_regs has left non-paradoxical
2936 subregs for push_reload to see. Make sure it does
2937 by forcing the reload.
2939 ??? When is it right at this stage to have a subreg
2940 of a mem that is _not_ to be handled specially? IMO
2941 those should have been reduced to just a mem. */
2942 || ((GET_CODE (operand) == MEM
2943 || (GET_CODE (operand)== REG
2944 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2945 #ifndef WORD_REGISTER_OPERATIONS
2946 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2947 < BIGGEST_ALIGNMENT)
2948 && (GET_MODE_SIZE (operand_mode[i])
2949 > GET_MODE_SIZE (GET_MODE (operand))))
2951 #ifdef LOAD_EXTEND_OP
2952 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2953 && (GET_MODE_SIZE (GET_MODE (operand))
2955 && (GET_MODE_SIZE (operand_mode[i])
2956 > GET_MODE_SIZE (GET_MODE (operand)))
2957 && INTEGRAL_MODE_P (GET_MODE (operand))
2958 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2967 this_alternative[i] = (int) NO_REGS;
2968 this_alternative_win[i] = 0;
2969 this_alternative_match_win[i] = 0;
2970 this_alternative_offmemok[i] = 0;
2971 this_alternative_earlyclobber[i] = 0;
2972 this_alternative_matches[i] = -1;
2974 /* An empty constraint or empty alternative
2975 allows anything which matched the pattern. */
2976 if (*p == 0 || *p == ',')
2979 /* Scan this alternative's specs for this operand;
2980 set WIN if the operand fits any letter in this alternative.
2981 Otherwise, clear BADOP if this operand could
2982 fit some letter after reloads,
2983 or set WINREG if this operand could fit after reloads
2984 provided the constraint allows some registers. */
2987 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
2996 case '=': case '+': case '*':
3000 /* We only support one commutative marker, the first
3001 one. We already set commutative above. */
3013 /* Ignore rest of this alternative as far as
3014 reloading is concerned. */
3017 while (*p && *p != ',');
3021 case '0': case '1': case '2': case '3': case '4':
3022 case '5': case '6': case '7': case '8': case '9':
3023 m = strtoul (p, &end, 10);
3027 this_alternative_matches[i] = m;
3028 /* We are supposed to match a previous operand.
3029 If we do, we win if that one did.
3030 If we do not, count both of the operands as losers.
3031 (This is too conservative, since most of the time
3032 only a single reload insn will be needed to make
3033 the two operands win. As a result, this alternative
3034 may be rejected when it is actually desirable.) */
3035 if ((swapped && (m != commutative || i != commutative + 1))
3036 /* If we are matching as if two operands were swapped,
3037 also pretend that operands_match had been computed
3039 But if I is the second of those and C is the first,
3040 don't exchange them, because operands_match is valid
3041 only on one side of its diagonal. */
3043 [(m == commutative || m == commutative + 1)
3044 ? 2 * commutative + 1 - m : m]
3045 [(i == commutative || i == commutative + 1)
3046 ? 2 * commutative + 1 - i : i])
3047 : operands_match[m][i])
3049 /* If we are matching a non-offsettable address where an
3050 offsettable address was expected, then we must reject
3051 this combination, because we can't reload it. */
3052 if (this_alternative_offmemok[m]
3053 && GET_CODE (recog_data.operand[m]) == MEM
3054 && this_alternative[m] == (int) NO_REGS
3055 && ! this_alternative_win[m])
3058 did_match = this_alternative_win[m];
3062 /* Operands don't match. */
3064 /* Retroactively mark the operand we had to match
3065 as a loser, if it wasn't already. */
3066 if (this_alternative_win[m])
3068 this_alternative_win[m] = 0;
3069 if (this_alternative[m] == (int) NO_REGS)
3071 /* But count the pair only once in the total badness of
3072 this alternative, if the pair can be a dummy reload. */
3074 = find_dummy_reload (recog_data.operand[i],
3075 recog_data.operand[m],
3076 recog_data.operand_loc[i],
3077 recog_data.operand_loc[m],
3078 operand_mode[i], operand_mode[m],
3079 this_alternative[m], -1,
3080 this_alternative_earlyclobber[m]);
3085 /* This can be fixed with reloads if the operand
3086 we are supposed to match can be fixed with reloads. */
3088 this_alternative[i] = this_alternative[m];
3090 /* If we have to reload this operand and some previous
3091 operand also had to match the same thing as this
3092 operand, we don't know how to do that. So reject this
3094 if (! did_match || force_reload)
3095 for (j = 0; j < i; j++)
3096 if (this_alternative_matches[j]
3097 == this_alternative_matches[i])
3102 /* All necessary reloads for an address_operand
3103 were handled in find_reloads_address. */
3104 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3112 if (GET_CODE (operand) == MEM
3113 || (GET_CODE (operand) == REG
3114 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3115 && reg_renumber[REGNO (operand)] < 0))
3117 if (CONSTANT_P (operand)
3118 /* force_const_mem does not accept HIGH. */
3119 && GET_CODE (operand) != HIGH)
3125 if (GET_CODE (operand) == MEM
3126 && ! address_reloaded[i]
3127 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3128 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3133 if (GET_CODE (operand) == MEM
3134 && ! address_reloaded[i]
3135 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3136 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3140 /* Memory operand whose address is not offsettable. */
3144 if (GET_CODE (operand) == MEM
3145 && ! (ind_levels ? offsettable_memref_p (operand)
3146 : offsettable_nonstrict_memref_p (operand))
3147 /* Certain mem addresses will become offsettable
3148 after they themselves are reloaded. This is important;
3149 we don't want our own handling of unoffsettables
3150 to override the handling of reg_equiv_address. */
3151 && !(GET_CODE (XEXP (operand, 0)) == REG
3153 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3157 /* Memory operand whose address is offsettable. */
3161 if ((GET_CODE (operand) == MEM
3162 /* If IND_LEVELS, find_reloads_address won't reload a
3163 pseudo that didn't get a hard reg, so we have to
3164 reject that case. */
3165 && ((ind_levels ? offsettable_memref_p (operand)
3166 : offsettable_nonstrict_memref_p (operand))
3167 /* A reloaded address is offsettable because it is now
3168 just a simple register indirect. */
3169 || address_reloaded[i]))
3170 || (GET_CODE (operand) == REG
3171 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3172 && reg_renumber[REGNO (operand)] < 0
3173 /* If reg_equiv_address is nonzero, we will be
3174 loading it into a register; hence it will be
3175 offsettable, but we cannot say that reg_equiv_mem
3176 is offsettable without checking. */
3177 && ((reg_equiv_mem[REGNO (operand)] != 0
3178 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3179 || (reg_equiv_address[REGNO (operand)] != 0))))
3181 /* force_const_mem does not accept HIGH. */
3182 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3183 || GET_CODE (operand) == MEM)
3190 /* Output operand that is stored before the need for the
3191 input operands (and their index registers) is over. */
3192 earlyclobber = 1, this_earlyclobber = 1;
3197 if (GET_CODE (operand) == CONST_DOUBLE
3198 || (GET_CODE (operand) == CONST_VECTOR
3199 && (GET_MODE_CLASS (GET_MODE (operand))
3200 == MODE_VECTOR_FLOAT)))
3206 if (GET_CODE (operand) == CONST_DOUBLE
3207 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3212 if (GET_CODE (operand) == CONST_INT
3213 || (GET_CODE (operand) == CONST_DOUBLE
3214 && GET_MODE (operand) == VOIDmode))
3217 if (CONSTANT_P (operand)
3218 #ifdef LEGITIMATE_PIC_OPERAND_P
3219 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3226 if (GET_CODE (operand) == CONST_INT
3227 || (GET_CODE (operand) == CONST_DOUBLE
3228 && GET_MODE (operand) == VOIDmode))
3240 if (GET_CODE (operand) == CONST_INT
3241 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3251 /* A PLUS is never a valid operand, but reload can make
3252 it from a register when eliminating registers. */
3253 && GET_CODE (operand) != PLUS
3254 /* A SCRATCH is not a valid operand. */
3255 && GET_CODE (operand) != SCRATCH
3256 #ifdef LEGITIMATE_PIC_OPERAND_P
3257 && (! CONSTANT_P (operand)
3259 || LEGITIMATE_PIC_OPERAND_P (operand))
3261 && (GENERAL_REGS == ALL_REGS
3262 || GET_CODE (operand) != REG
3263 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3264 && reg_renumber[REGNO (operand)] < 0)))
3266 /* Drop through into 'r' case. */
3270 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3274 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3276 #ifdef EXTRA_CONSTRAINT_STR
3277 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3281 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3283 /* If the address was already reloaded,
3285 else if (GET_CODE (operand) == MEM
3286 && address_reloaded[i])
3288 /* Likewise if the address will be reloaded because
3289 reg_equiv_address is nonzero. For reg_equiv_mem
3290 we have to check. */
3291 else if (GET_CODE (operand) == REG
3292 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3293 && reg_renumber[REGNO (operand)] < 0
3294 && ((reg_equiv_mem[REGNO (operand)] != 0
3295 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3296 || (reg_equiv_address[REGNO (operand)] != 0)))
3299 /* If we didn't already win, we can reload
3300 constants via force_const_mem, and other
3301 MEMs by reloading the address like for 'o'. */
3302 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3303 || GET_CODE (operand) == MEM)
3309 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3311 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3314 /* If we didn't already win, we can reload
3315 the address into a base register. */
3316 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3321 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3328 = (int) (reg_class_subunion
3329 [this_alternative[i]]
3330 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3332 if (GET_MODE (operand) == BLKmode)
3335 if (GET_CODE (operand) == REG
3336 && reg_fits_class_p (operand, this_alternative[i],
3337 offset, GET_MODE (recog_data.operand[i])))
3341 while ((p += len), c);
3345 /* If this operand could be handled with a reg,
3346 and some reg is allowed, then this operand can be handled. */
3347 if (winreg && this_alternative[i] != (int) NO_REGS)
3350 /* Record which operands fit this alternative. */
3351 this_alternative_earlyclobber[i] = earlyclobber;
3352 if (win && ! force_reload)
3353 this_alternative_win[i] = 1;
3354 else if (did_match && ! force_reload)
3355 this_alternative_match_win[i] = 1;
3358 int const_to_mem = 0;
3360 this_alternative_offmemok[i] = offmemok;
3364 /* Alternative loses if it has no regs for a reg operand. */
3365 if (GET_CODE (operand) == REG
3366 && this_alternative[i] == (int) NO_REGS
3367 && this_alternative_matches[i] < 0)
3370 /* If this is a constant that is reloaded into the desired
3371 class by copying it to memory first, count that as another
3372 reload. This is consistent with other code and is
3373 required to avoid choosing another alternative when
3374 the constant is moved into memory by this function on
3375 an early reload pass. Note that the test here is
3376 precisely the same as in the code below that calls
3378 if (CONSTANT_P (operand)
3379 /* force_const_mem does not accept HIGH. */
3380 && GET_CODE (operand) != HIGH
3381 && ((PREFERRED_RELOAD_CLASS (operand,
3382 (enum reg_class) this_alternative[i])
3384 || no_input_reloads)
3385 && operand_mode[i] != VOIDmode)
3388 if (this_alternative[i] != (int) NO_REGS)
3392 /* If we can't reload this value at all, reject this
3393 alternative. Note that we could also lose due to
3394 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3397 if (! CONSTANT_P (operand)
3398 && (enum reg_class) this_alternative[i] != NO_REGS
3399 && (PREFERRED_RELOAD_CLASS (operand,
3400 (enum reg_class) this_alternative[i])
3404 /* Alternative loses if it requires a type of reload not
3405 permitted for this insn. We can always reload SCRATCH
3406 and objects with a REG_UNUSED note. */
3407 else if (GET_CODE (operand) != SCRATCH
3408 && modified[i] != RELOAD_READ && no_output_reloads
3409 && ! find_reg_note (insn, REG_UNUSED, operand))
3411 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3415 #ifdef DISPARAGE_RELOAD_CLASS
3417 += DISPARAGE_RELOAD_CLASS (operand,
3418 (enum reg_class) this_alternative[i]);
3421 /* We prefer to reload pseudos over reloading other things,
3422 since such reloads may be able to be eliminated later.
3423 If we are reloading a SCRATCH, we won't be generating any
3424 insns, just using a register, so it is also preferred.
3425 So bump REJECT in other cases. Don't do this in the
3426 case where we are forcing a constant into memory and
3427 it will then win since we don't want to have a different
3428 alternative match then. */
3429 if (! (GET_CODE (operand) == REG
3430 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3431 && GET_CODE (operand) != SCRATCH
3432 && ! (const_to_mem && constmemok))
3435 /* Input reloads can be inherited more often than output
3436 reloads can be removed, so penalize output reloads. */
3437 if (operand_type[i] != RELOAD_FOR_INPUT
3438 && GET_CODE (operand) != SCRATCH)
3442 /* If this operand is a pseudo register that didn't get a hard
3443 reg and this alternative accepts some register, see if the
3444 class that we want is a subset of the preferred class for this
3445 register. If not, but it intersects that class, use the
3446 preferred class instead. If it does not intersect the preferred
3447 class, show that usage of this alternative should be discouraged;
3448 it will be discouraged more still if the register is `preferred
3449 or nothing'. We do this because it increases the chance of
3450 reusing our spill register in a later insn and avoiding a pair
3451 of memory stores and loads.
3453 Don't bother with this if this alternative will accept this
3456 Don't do this for a multiword operand, since it is only a
3457 small win and has the risk of requiring more spill registers,
3458 which could cause a large loss.
3460 Don't do this if the preferred class has only one register
3461 because we might otherwise exhaust the class. */
3463 if (! win && ! did_match
3464 && this_alternative[i] != (int) NO_REGS
3465 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3466 && reg_class_size[(int) preferred_class[i]] > 1)
3468 if (! reg_class_subset_p (this_alternative[i],
3469 preferred_class[i]))
3471 /* Since we don't have a way of forming the intersection,
3472 we just do something special if the preferred class
3473 is a subset of the class we have; that's the most
3474 common case anyway. */
3475 if (reg_class_subset_p (preferred_class[i],
3476 this_alternative[i]))
3477 this_alternative[i] = (int) preferred_class[i];
3479 reject += (2 + 2 * pref_or_nothing[i]);
3484 /* Now see if any output operands that are marked "earlyclobber"
3485 in this alternative conflict with any input operands
3486 or any memory addresses. */
3488 for (i = 0; i < noperands; i++)
3489 if (this_alternative_earlyclobber[i]
3490 && (this_alternative_win[i] || this_alternative_match_win[i]))
3492 struct decomposition early_data;
3494 early_data = decompose (recog_data.operand[i]);
3496 if (modified[i] == RELOAD_READ)
3499 if (this_alternative[i] == NO_REGS)
3501 this_alternative_earlyclobber[i] = 0;
3502 if (this_insn_is_asm)
3503 error_for_asm (this_insn,
3504 "`&' constraint used with no register class");
3509 for (j = 0; j < noperands; j++)
3510 /* Is this an input operand or a memory ref? */
3511 if ((GET_CODE (recog_data.operand[j]) == MEM
3512 || modified[j] != RELOAD_WRITE)
3514 /* Ignore things like match_operator operands. */
3515 && *recog_data.constraints[j] != 0
3516 /* Don't count an input operand that is constrained to match
3517 the early clobber operand. */
3518 && ! (this_alternative_matches[j] == i
3519 && rtx_equal_p (recog_data.operand[i],
3520 recog_data.operand[j]))
3521 /* Is it altered by storing the earlyclobber operand? */
3522 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3525 /* If the output is in a single-reg class,
3526 it's costly to reload it, so reload the input instead. */
3527 if (reg_class_size[this_alternative[i]] == 1
3528 && (GET_CODE (recog_data.operand[j]) == REG
3529 || GET_CODE (recog_data.operand[j]) == SUBREG))
3532 this_alternative_win[j] = 0;
3533 this_alternative_match_win[j] = 0;
3538 /* If an earlyclobber operand conflicts with something,
3539 it must be reloaded, so request this and count the cost. */
3543 this_alternative_win[i] = 0;
3544 this_alternative_match_win[j] = 0;
3545 for (j = 0; j < noperands; j++)
3546 if (this_alternative_matches[j] == i
3547 && this_alternative_match_win[j])
3549 this_alternative_win[j] = 0;
3550 this_alternative_match_win[j] = 0;
3556 /* If one alternative accepts all the operands, no reload required,
3557 choose that alternative; don't consider the remaining ones. */
3560 /* Unswap these so that they are never swapped at `finish'. */
3561 if (commutative >= 0)
3563 recog_data.operand[commutative] = substed_operand[commutative];
3564 recog_data.operand[commutative + 1]
3565 = substed_operand[commutative + 1];
3567 for (i = 0; i < noperands; i++)
3569 goal_alternative_win[i] = this_alternative_win[i];
3570 goal_alternative_match_win[i] = this_alternative_match_win[i];
3571 goal_alternative[i] = this_alternative[i];
3572 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3573 goal_alternative_matches[i] = this_alternative_matches[i];
3574 goal_alternative_earlyclobber[i]
3575 = this_alternative_earlyclobber[i];
3577 goal_alternative_number = this_alternative_number;
3578 goal_alternative_swapped = swapped;
3579 goal_earlyclobber = this_earlyclobber;
3583 /* REJECT, set by the ! and ? constraint characters and when a register
3584 would be reloaded into a non-preferred class, discourages the use of
3585 this alternative for a reload goal. REJECT is incremented by six
3586 for each ? and two for each non-preferred class. */
3587 losers = losers * 6 + reject;
3589 /* If this alternative can be made to work by reloading,
3590 and it needs less reloading than the others checked so far,
3591 record it as the chosen goal for reloading. */
3592 if (! bad && best > losers)
3594 for (i = 0; i < noperands; i++)
3596 goal_alternative[i] = this_alternative[i];
3597 goal_alternative_win[i] = this_alternative_win[i];
3598 goal_alternative_match_win[i] = this_alternative_match_win[i];
3599 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3600 goal_alternative_matches[i] = this_alternative_matches[i];
3601 goal_alternative_earlyclobber[i]
3602 = this_alternative_earlyclobber[i];
3604 goal_alternative_swapped = swapped;
3606 goal_alternative_number = this_alternative_number;
3607 goal_earlyclobber = this_earlyclobber;
3611 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3612 then we need to try each alternative twice,
3613 the second time matching those two operands
3614 as if we had exchanged them.
3615 To do this, really exchange them in operands.
3617 If we have just tried the alternatives the second time,
3618 return operands to normal and drop through. */
3620 if (commutative >= 0)
3625 enum reg_class tclass;
3628 recog_data.operand[commutative] = substed_operand[commutative + 1];
3629 recog_data.operand[commutative + 1] = substed_operand[commutative];
3630 /* Swap the duplicates too. */
3631 for (i = 0; i < recog_data.n_dups; i++)
3632 if (recog_data.dup_num[i] == commutative
3633 || recog_data.dup_num[i] == commutative + 1)
3634 *recog_data.dup_loc[i]
3635 = recog_data.operand[(int) recog_data.dup_num[i]];
3637 tclass = preferred_class[commutative];
3638 preferred_class[commutative] = preferred_class[commutative + 1];
3639 preferred_class[commutative + 1] = tclass;
3641 t = pref_or_nothing[commutative];
3642 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3643 pref_or_nothing[commutative + 1] = t;
3645 memcpy (constraints, recog_data.constraints,
3646 noperands * sizeof (char *));
3651 recog_data.operand[commutative] = substed_operand[commutative];
3652 recog_data.operand[commutative + 1]
3653 = substed_operand[commutative + 1];
3654 /* Unswap the duplicates too. */
3655 for (i = 0; i < recog_data.n_dups; i++)
3656 if (recog_data.dup_num[i] == commutative
3657 || recog_data.dup_num[i] == commutative + 1)
3658 *recog_data.dup_loc[i]
3659 = recog_data.operand[(int) recog_data.dup_num[i]];
3663 /* The operands don't meet the constraints.
3664 goal_alternative describes the alternative
3665 that we could reach by reloading the fewest operands.
3666 Reload so as to fit it. */
3668 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3670 /* No alternative works with reloads?? */
3671 if (insn_code_number >= 0)
3672 fatal_insn ("unable to generate reloads for:", insn);
3673 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3674 /* Avoid further trouble with this insn. */
3675 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3680 /* Jump to `finish' from above if all operands are valid already.
3681 In that case, goal_alternative_win is all 1. */
3684 /* Right now, for any pair of operands I and J that are required to match,
3686 goal_alternative_matches[J] is I.
3687 Set up goal_alternative_matched as the inverse function:
3688 goal_alternative_matched[I] = J. */
3690 for (i = 0; i < noperands; i++)
3691 goal_alternative_matched[i] = -1;
3693 for (i = 0; i < noperands; i++)
3694 if (! goal_alternative_win[i]
3695 && goal_alternative_matches[i] >= 0)
3696 goal_alternative_matched[goal_alternative_matches[i]] = i;
3698 for (i = 0; i < noperands; i++)
3699 goal_alternative_win[i] |= goal_alternative_match_win[i];
3701 /* If the best alternative is with operands 1 and 2 swapped,
3702 consider them swapped before reporting the reloads. Update the
3703 operand numbers of any reloads already pushed. */
3705 if (goal_alternative_swapped)
3709 tem = substed_operand[commutative];
3710 substed_operand[commutative] = substed_operand[commutative + 1];
3711 substed_operand[commutative + 1] = tem;
3712 tem = recog_data.operand[commutative];
3713 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3714 recog_data.operand[commutative + 1] = tem;
3715 tem = *recog_data.operand_loc[commutative];
3716 *recog_data.operand_loc[commutative]
3717 = *recog_data.operand_loc[commutative + 1];
3718 *recog_data.operand_loc[commutative + 1] = tem;
3720 for (i = 0; i < n_reloads; i++)
3722 if (rld[i].opnum == commutative)
3723 rld[i].opnum = commutative + 1;
3724 else if (rld[i].opnum == commutative + 1)
3725 rld[i].opnum = commutative;
3729 for (i = 0; i < noperands; i++)
3731 operand_reloadnum[i] = -1;
3733 /* If this is an earlyclobber operand, we need to widen the scope.
3734 The reload must remain valid from the start of the insn being
3735 reloaded until after the operand is stored into its destination.
3736 We approximate this with RELOAD_OTHER even though we know that we
3737 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3739 One special case that is worth checking is when we have an
3740 output that is earlyclobber but isn't used past the insn (typically
3741 a SCRATCH). In this case, we only need have the reload live
3742 through the insn itself, but not for any of our input or output
3744 But we must not accidentally narrow the scope of an existing
3745 RELOAD_OTHER reload - leave these alone.
3747 In any case, anything needed to address this operand can remain
3748 however they were previously categorized. */
3750 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3752 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3753 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3756 /* Any constants that aren't allowed and can't be reloaded
3757 into registers are here changed into memory references. */
3758 for (i = 0; i < noperands; i++)
3759 if (! goal_alternative_win[i]
3760 && CONSTANT_P (recog_data.operand[i])
3761 /* force_const_mem does not accept HIGH. */
3762 && GET_CODE (recog_data.operand[i]) != HIGH
3763 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3764 (enum reg_class) goal_alternative[i])
3766 || no_input_reloads)
3767 && operand_mode[i] != VOIDmode)
3769 substed_operand[i] = recog_data.operand[i]
3770 = find_reloads_toplev (force_const_mem (operand_mode[i],
3771 recog_data.operand[i]),
3772 i, address_type[i], ind_levels, 0, insn,
3774 if (alternative_allows_memconst (recog_data.constraints[i],
3775 goal_alternative_number))
3776 goal_alternative_win[i] = 1;
3779 /* Record the values of the earlyclobber operands for the caller. */
3780 if (goal_earlyclobber)
3781 for (i = 0; i < noperands; i++)
3782 if (goal_alternative_earlyclobber[i])
3783 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3785 /* Now record reloads for all the operands that need them. */
3786 for (i = 0; i < noperands; i++)
3787 if (! goal_alternative_win[i])
3789 /* Operands that match previous ones have already been handled. */
3790 if (goal_alternative_matches[i] >= 0)
3792 /* Handle an operand with a nonoffsettable address
3793 appearing where an offsettable address will do
3794 by reloading the address into a base register.
3796 ??? We can also do this when the operand is a register and
3797 reg_equiv_mem is not offsettable, but this is a bit tricky,
3798 so we don't bother with it. It may not be worth doing. */
3799 else if (goal_alternative_matched[i] == -1
3800 && goal_alternative_offmemok[i]
3801 && GET_CODE (recog_data.operand[i]) == MEM)
3803 operand_reloadnum[i]
3804 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3805 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3806 MODE_BASE_REG_CLASS (VOIDmode),
3807 GET_MODE (XEXP (recog_data.operand[i], 0)),
3808 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3809 rld[operand_reloadnum[i]].inc
3810 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3812 /* If this operand is an output, we will have made any
3813 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3814 now we are treating part of the operand as an input, so
3815 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3817 if (modified[i] == RELOAD_WRITE)
3819 for (j = 0; j < n_reloads; j++)
3821 if (rld[j].opnum == i)
3823 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3824 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3825 else if (rld[j].when_needed
3826 == RELOAD_FOR_OUTADDR_ADDRESS)
3827 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3832 else if (goal_alternative_matched[i] == -1)
3834 operand_reloadnum[i]
3835 = push_reload ((modified[i] != RELOAD_WRITE
3836 ? recog_data.operand[i] : 0),
3837 (modified[i] != RELOAD_READ
3838 ? recog_data.operand[i] : 0),
3839 (modified[i] != RELOAD_WRITE
3840 ? recog_data.operand_loc[i] : 0),
3841 (modified[i] != RELOAD_READ
3842 ? recog_data.operand_loc[i] : 0),
3843 (enum reg_class) goal_alternative[i],
3844 (modified[i] == RELOAD_WRITE
3845 ? VOIDmode : operand_mode[i]),
3846 (modified[i] == RELOAD_READ
3847 ? VOIDmode : operand_mode[i]),
3848 (insn_code_number < 0 ? 0
3849 : insn_data[insn_code_number].operand[i].strict_low),
3850 0, i, operand_type[i]);
3852 /* In a matching pair of operands, one must be input only
3853 and the other must be output only.
3854 Pass the input operand as IN and the other as OUT. */
3855 else if (modified[i] == RELOAD_READ
3856 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3858 operand_reloadnum[i]
3859 = push_reload (recog_data.operand[i],
3860 recog_data.operand[goal_alternative_matched[i]],
3861 recog_data.operand_loc[i],
3862 recog_data.operand_loc[goal_alternative_matched[i]],
3863 (enum reg_class) goal_alternative[i],
3865 operand_mode[goal_alternative_matched[i]],
3866 0, 0, i, RELOAD_OTHER);
3867 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3869 else if (modified[i] == RELOAD_WRITE
3870 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3872 operand_reloadnum[goal_alternative_matched[i]]
3873 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3874 recog_data.operand[i],
3875 recog_data.operand_loc[goal_alternative_matched[i]],
3876 recog_data.operand_loc[i],
3877 (enum reg_class) goal_alternative[i],
3878 operand_mode[goal_alternative_matched[i]],
3880 0, 0, i, RELOAD_OTHER);
3881 operand_reloadnum[i] = output_reloadnum;
3883 else if (insn_code_number >= 0)
3887 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3888 /* Avoid further trouble with this insn. */
3889 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3894 else if (goal_alternative_matched[i] < 0
3895 && goal_alternative_matches[i] < 0
3896 && !address_operand_reloaded[i]
3899 /* For each non-matching operand that's a MEM or a pseudo-register
3900 that didn't get a hard register, make an optional reload.
3901 This may get done even if the insn needs no reloads otherwise. */
3903 rtx operand = recog_data.operand[i];
3905 while (GET_CODE (operand) == SUBREG)
3906 operand = SUBREG_REG (operand);
3907 if ((GET_CODE (operand) == MEM
3908 || (GET_CODE (operand) == REG
3909 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3910 /* If this is only for an output, the optional reload would not
3911 actually cause us to use a register now, just note that
3912 something is stored here. */
3913 && ((enum reg_class) goal_alternative[i] != NO_REGS
3914 || modified[i] == RELOAD_WRITE)
3915 && ! no_input_reloads
3916 /* An optional output reload might allow to delete INSN later.
3917 We mustn't make in-out reloads on insns that are not permitted
3919 If this is an asm, we can't delete it; we must not even call
3920 push_reload for an optional output reload in this case,
3921 because we can't be sure that the constraint allows a register,
3922 and push_reload verifies the constraints for asms. */
3923 && (modified[i] == RELOAD_READ
3924 || (! no_output_reloads && ! this_insn_is_asm)))
3925 operand_reloadnum[i]
3926 = push_reload ((modified[i] != RELOAD_WRITE
3927 ? recog_data.operand[i] : 0),
3928 (modified[i] != RELOAD_READ
3929 ? recog_data.operand[i] : 0),
3930 (modified[i] != RELOAD_WRITE
3931 ? recog_data.operand_loc[i] : 0),
3932 (modified[i] != RELOAD_READ
3933 ? recog_data.operand_loc[i] : 0),
3934 (enum reg_class) goal_alternative[i],
3935 (modified[i] == RELOAD_WRITE
3936 ? VOIDmode : operand_mode[i]),
3937 (modified[i] == RELOAD_READ
3938 ? VOIDmode : operand_mode[i]),
3939 (insn_code_number < 0 ? 0
3940 : insn_data[insn_code_number].operand[i].strict_low),
3941 1, i, operand_type[i]);
3942 /* If a memory reference remains (either as a MEM or a pseudo that
3943 did not get a hard register), yet we can't make an optional
3944 reload, check if this is actually a pseudo register reference;
3945 we then need to emit a USE and/or a CLOBBER so that reload
3946 inheritance will do the right thing. */
3948 && (GET_CODE (operand) == MEM
3949 || (GET_CODE (operand) == REG
3950 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3951 && reg_renumber [REGNO (operand)] < 0)))
3953 operand = *recog_data.operand_loc[i];
3955 while (GET_CODE (operand) == SUBREG)
3956 operand = SUBREG_REG (operand);
3957 if (GET_CODE (operand) == REG)
3959 if (modified[i] != RELOAD_WRITE)
3960 /* We mark the USE with QImode so that we recognize
3961 it as one that can be safely deleted at the end
3963 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3965 if (modified[i] != RELOAD_READ)
3966 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3970 else if (goal_alternative_matches[i] >= 0
3971 && goal_alternative_win[goal_alternative_matches[i]]
3972 && modified[i] == RELOAD_READ
3973 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3974 && ! no_input_reloads && ! no_output_reloads
3977 /* Similarly, make an optional reload for a pair of matching
3978 objects that are in MEM or a pseudo that didn't get a hard reg. */
3980 rtx operand = recog_data.operand[i];
3982 while (GET_CODE (operand) == SUBREG)
3983 operand = SUBREG_REG (operand);
3984 if ((GET_CODE (operand) == MEM
3985 || (GET_CODE (operand) == REG
3986 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3987 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3989 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3990 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3991 recog_data.operand[i],
3992 recog_data.operand_loc[goal_alternative_matches[i]],
3993 recog_data.operand_loc[i],
3994 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3995 operand_mode[goal_alternative_matches[i]],
3997 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4000 /* Perform whatever substitutions on the operands we are supposed
4001 to make due to commutativity or replacement of registers
4002 with equivalent constants or memory slots. */
4004 for (i = 0; i < noperands; i++)
4006 /* We only do this on the last pass through reload, because it is
4007 possible for some data (like reg_equiv_address) to be changed during
4008 later passes. Moreover, we loose the opportunity to get a useful
4009 reload_{in,out}_reg when we do these replacements. */
4013 rtx substitution = substed_operand[i];
4015 *recog_data.operand_loc[i] = substitution;
4017 /* If we're replacing an operand with a LABEL_REF, we need
4018 to make sure that there's a REG_LABEL note attached to
4019 this instruction. */
4020 if (GET_CODE (insn) != JUMP_INSN
4021 && GET_CODE (substitution) == LABEL_REF
4022 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4023 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4024 XEXP (substitution, 0),
4028 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4031 /* If this insn pattern contains any MATCH_DUP's, make sure that
4032 they will be substituted if the operands they match are substituted.
4033 Also do now any substitutions we already did on the operands.
4035 Don't do this if we aren't making replacements because we might be
4036 propagating things allocated by frame pointer elimination into places
4037 it doesn't expect. */
4039 if (insn_code_number >= 0 && replace)
4040 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4042 int opno = recog_data.dup_num[i];
4043 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4044 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4048 /* This loses because reloading of prior insns can invalidate the equivalence
4049 (or at least find_equiv_reg isn't smart enough to find it any more),
4050 causing this insn to need more reload regs than it needed before.
4051 It may be too late to make the reload regs available.
4052 Now this optimization is done safely in choose_reload_regs. */
4054 /* For each reload of a reg into some other class of reg,
4055 search for an existing equivalent reg (same value now) in the right class.
4056 We can use it as long as we don't need to change its contents. */
4057 for (i = 0; i < n_reloads; i++)
4058 if (rld[i].reg_rtx == 0
4060 && GET_CODE (rld[i].in) == REG
4064 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4065 static_reload_reg_p, 0, rld[i].inmode);
4066 /* Prevent generation of insn to load the value
4067 because the one we found already has the value. */
4069 rld[i].in = rld[i].reg_rtx;
4073 /* Perhaps an output reload can be combined with another
4074 to reduce needs by one. */
4075 if (!goal_earlyclobber)
4078 /* If we have a pair of reloads for parts of an address, they are reloading
4079 the same object, the operands themselves were not reloaded, and they
4080 are for two operands that are supposed to match, merge the reloads and
4081 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4083 for (i = 0; i < n_reloads; i++)
4087 for (j = i + 1; j < n_reloads; j++)
4088 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4089 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4090 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4091 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4092 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4093 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4094 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4095 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4096 && rtx_equal_p (rld[i].in, rld[j].in)
4097 && (operand_reloadnum[rld[i].opnum] < 0
4098 || rld[operand_reloadnum[rld[i].opnum]].optional)
4099 && (operand_reloadnum[rld[j].opnum] < 0
4100 || rld[operand_reloadnum[rld[j].opnum]].optional)
4101 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4102 || (goal_alternative_matches[rld[j].opnum]
4105 for (k = 0; k < n_replacements; k++)
4106 if (replacements[k].what == j)
4107 replacements[k].what = i;
4109 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4110 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4111 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4113 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4118 /* Scan all the reloads and update their type.
4119 If a reload is for the address of an operand and we didn't reload
4120 that operand, change the type. Similarly, change the operand number
4121 of a reload when two operands match. If a reload is optional, treat it
4122 as though the operand isn't reloaded.
4124 ??? This latter case is somewhat odd because if we do the optional
4125 reload, it means the object is hanging around. Thus we need only
4126 do the address reload if the optional reload was NOT done.
4128 Change secondary reloads to be the address type of their operand, not
4131 If an operand's reload is now RELOAD_OTHER, change any
4132 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4133 RELOAD_FOR_OTHER_ADDRESS. */
4135 for (i = 0; i < n_reloads; i++)
4137 if (rld[i].secondary_p
4138 && rld[i].when_needed == operand_type[rld[i].opnum])
4139 rld[i].when_needed = address_type[rld[i].opnum];
4141 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4142 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4143 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4144 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4145 && (operand_reloadnum[rld[i].opnum] < 0
4146 || rld[operand_reloadnum[rld[i].opnum]].optional))
4148 /* If we have a secondary reload to go along with this reload,
4149 change its type to RELOAD_FOR_OPADDR_ADDR. */
4151 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4152 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4153 && rld[i].secondary_in_reload != -1)
4155 int secondary_in_reload = rld[i].secondary_in_reload;
4157 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4159 /* If there's a tertiary reload we have to change it also. */
4160 if (secondary_in_reload > 0
4161 && rld[secondary_in_reload].secondary_in_reload != -1)
4162 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4163 = RELOAD_FOR_OPADDR_ADDR;
4166 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4167 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4168 && rld[i].secondary_out_reload != -1)
4170 int secondary_out_reload = rld[i].secondary_out_reload;
4172 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4174 /* If there's a tertiary reload we have to change it also. */
4175 if (secondary_out_reload
4176 && rld[secondary_out_reload].secondary_out_reload != -1)
4177 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4178 = RELOAD_FOR_OPADDR_ADDR;
4181 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4182 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4183 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4185 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4188 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4189 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4190 && operand_reloadnum[rld[i].opnum] >= 0
4191 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4193 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4195 if (goal_alternative_matches[rld[i].opnum] >= 0)
4196 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4199 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4200 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4201 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4203 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4204 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4205 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4206 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4207 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4208 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4209 This is complicated by the fact that a single operand can have more
4210 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4211 choose_reload_regs without affecting code quality, and cases that
4212 actually fail are extremely rare, so it turns out to be better to fix
4213 the problem here by not generating cases that choose_reload_regs will
4215 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4216 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4218 We can reduce the register pressure by exploiting that a
4219 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4220 does not conflict with any of them, if it is only used for the first of
4221 the RELOAD_FOR_X_ADDRESS reloads. */
4223 int first_op_addr_num = -2;
4224 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4225 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4226 int need_change = 0;
4227 /* We use last_op_addr_reload and the contents of the above arrays
4228 first as flags - -2 means no instance encountered, -1 means exactly
4229 one instance encountered.
4230 If more than one instance has been encountered, we store the reload
4231 number of the first reload of the kind in question; reload numbers
4232 are known to be non-negative. */
4233 for (i = 0; i < noperands; i++)
4234 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4235 for (i = n_reloads - 1; i >= 0; i--)
4237 switch (rld[i].when_needed)
4239 case RELOAD_FOR_OPERAND_ADDRESS:
4240 if (++first_op_addr_num >= 0)
4242 first_op_addr_num = i;
4246 case RELOAD_FOR_INPUT_ADDRESS:
4247 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4249 first_inpaddr_num[rld[i].opnum] = i;
4253 case RELOAD_FOR_OUTPUT_ADDRESS:
4254 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4256 first_outpaddr_num[rld[i].opnum] = i;
4267 for (i = 0; i < n_reloads; i++)
4270 enum reload_type type;
4272 switch (rld[i].when_needed)
4274 case RELOAD_FOR_OPADDR_ADDR:
4275 first_num = first_op_addr_num;
4276 type = RELOAD_FOR_OPERAND_ADDRESS;
4278 case RELOAD_FOR_INPADDR_ADDRESS:
4279 first_num = first_inpaddr_num[rld[i].opnum];
4280 type = RELOAD_FOR_INPUT_ADDRESS;
4282 case RELOAD_FOR_OUTADDR_ADDRESS:
4283 first_num = first_outpaddr_num[rld[i].opnum];
4284 type = RELOAD_FOR_OUTPUT_ADDRESS;
4291 else if (i > first_num)
4292 rld[i].when_needed = type;
4295 /* Check if the only TYPE reload that uses reload I is
4296 reload FIRST_NUM. */
4297 for (j = n_reloads - 1; j > first_num; j--)
4299 if (rld[j].when_needed == type
4300 && (rld[i].secondary_p
4301 ? rld[j].secondary_in_reload == i
4302 : reg_mentioned_p (rld[i].in, rld[j].in)))
4304 rld[i].when_needed = type;
4313 /* See if we have any reloads that are now allowed to be merged
4314 because we've changed when the reload is needed to
4315 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4316 check for the most common cases. */
4318 for (i = 0; i < n_reloads; i++)
4319 if (rld[i].in != 0 && rld[i].out == 0
4320 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4321 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4322 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4323 for (j = 0; j < n_reloads; j++)
4324 if (i != j && rld[j].in != 0 && rld[j].out == 0
4325 && rld[j].when_needed == rld[i].when_needed
4326 && MATCHES (rld[i].in, rld[j].in)
4327 && rld[i].class == rld[j].class
4328 && !rld[i].nocombine && !rld[j].nocombine
4329 && rld[i].reg_rtx == rld[j].reg_rtx)
4331 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4332 transfer_replacements (i, j);
4337 /* If we made any reloads for addresses, see if they violate a
4338 "no input reloads" requirement for this insn. But loads that we
4339 do after the insn (such as for output addresses) are fine. */
4340 if (no_input_reloads)
4341 for (i = 0; i < n_reloads; i++)
4343 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4344 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4348 /* Compute reload_mode and reload_nregs. */
4349 for (i = 0; i < n_reloads; i++)
4352 = (rld[i].inmode == VOIDmode
4353 || (GET_MODE_SIZE (rld[i].outmode)
4354 > GET_MODE_SIZE (rld[i].inmode)))
4355 ? rld[i].outmode : rld[i].inmode;
4357 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4360 /* Special case a simple move with an input reload and a
4361 destination of a hard reg, if the hard reg is ok, use it. */
4362 for (i = 0; i < n_reloads; i++)
4363 if (rld[i].when_needed == RELOAD_FOR_INPUT
4364 && GET_CODE (PATTERN (insn)) == SET
4365 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4366 && SET_SRC (PATTERN (insn)) == rld[i].in)
4368 rtx dest = SET_DEST (PATTERN (insn));
4369 unsigned int regno = REGNO (dest);
4371 if (regno < FIRST_PSEUDO_REGISTER
4372 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4373 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4375 int nr = HARD_REGNO_NREGS (regno, rld[i].mode);
4378 for (nri = 1; nri < nr; nri ++)
4379 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4383 rld[i].reg_rtx = dest;
4390 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4391 accepts a memory operand with constant address. */
4394 alternative_allows_memconst (const char *constraint, int altnum)
4397 /* Skip alternatives before the one requested. */
4400 while (*constraint++ != ',');
4403 /* Scan the requested alternative for 'm' or 'o'.
4404 If one of them is present, this alternative accepts memory constants. */
4405 for (; (c = *constraint) && c != ',' && c != '#';
4406 constraint += CONSTRAINT_LEN (c, constraint))
4407 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4412 /* Scan X for memory references and scan the addresses for reloading.
4413 Also checks for references to "constant" regs that we want to eliminate
4414 and replaces them with the values they stand for.
4415 We may alter X destructively if it contains a reference to such.
4416 If X is just a constant reg, we return the equivalent value
4419 IND_LEVELS says how many levels of indirect addressing this machine
4422 OPNUM and TYPE identify the purpose of the reload.
4424 IS_SET_DEST is true if X is the destination of a SET, which is not
4425 appropriate to be replaced by a constant.
4427 INSN, if nonzero, is the insn in which we do the reload. It is used
4428 to determine if we may generate output reloads, and where to put USEs
4429 for pseudos that we have to replace with stack slots.
4431 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4432 result of find_reloads_address. */
4435 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4436 int ind_levels, int is_set_dest, rtx insn,
4437 int *address_reloaded)
4439 RTX_CODE code = GET_CODE (x);
4441 const char *fmt = GET_RTX_FORMAT (code);
4447 /* This code is duplicated for speed in find_reloads. */
4448 int regno = REGNO (x);
4449 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4450 x = reg_equiv_constant[regno];
4452 /* This creates (subreg (mem...)) which would cause an unnecessary
4453 reload of the mem. */
4454 else if (reg_equiv_mem[regno] != 0)
4455 x = reg_equiv_mem[regno];
4457 else if (reg_equiv_memory_loc[regno]
4458 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4460 rtx mem = make_memloc (x, regno);
4461 if (reg_equiv_address[regno]
4462 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4464 /* If this is not a toplevel operand, find_reloads doesn't see
4465 this substitution. We have to emit a USE of the pseudo so
4466 that delete_output_reload can see it. */
4467 if (replace_reloads && recog_data.operand[opnum] != x)
4468 /* We mark the USE with QImode so that we recognize it
4469 as one that can be safely deleted at the end of
4471 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4474 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4475 opnum, type, ind_levels, insn);
4476 if (address_reloaded)
4477 *address_reloaded = i;
4486 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4487 opnum, type, ind_levels, insn);
4488 if (address_reloaded)
4489 *address_reloaded = i;
4494 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4496 /* Check for SUBREG containing a REG that's equivalent to a constant.
4497 If the constant has a known value, truncate it right now.
4498 Similarly if we are extracting a single-word of a multi-word
4499 constant. If the constant is symbolic, allow it to be substituted
4500 normally. push_reload will strip the subreg later. If the
4501 constant is VOIDmode, abort because we will lose the mode of
4502 the register (this should never happen because one of the cases
4503 above should handle it). */
4505 int regno = REGNO (SUBREG_REG (x));
4508 if (subreg_lowpart_p (x)
4509 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4510 && reg_equiv_constant[regno] != 0
4511 && (tem = gen_lowpart_common (GET_MODE (x),
4512 reg_equiv_constant[regno])) != 0)
4515 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4516 && reg_equiv_constant[regno] != 0)
4519 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4520 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4526 /* If the subreg contains a reg that will be converted to a mem,
4527 convert the subreg to a narrower memref now.
4528 Otherwise, we would get (subreg (mem ...) ...),
4529 which would force reload of the mem.
4531 We also need to do this if there is an equivalent MEM that is
4532 not offsettable. In that case, alter_subreg would produce an
4533 invalid address on big-endian machines.
4535 For machines that extend byte loads, we must not reload using
4536 a wider mode if we have a paradoxical SUBREG. find_reloads will
4537 force a reload in that case. So we should not do anything here. */
4539 else if (regno >= FIRST_PSEUDO_REGISTER
4540 #ifdef LOAD_EXTEND_OP
4541 && (GET_MODE_SIZE (GET_MODE (x))
4542 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4544 && (reg_equiv_address[regno] != 0
4545 || (reg_equiv_mem[regno] != 0
4546 && (! strict_memory_address_p (GET_MODE (x),
4547 XEXP (reg_equiv_mem[regno], 0))
4548 || ! offsettable_memref_p (reg_equiv_mem[regno])
4549 || num_not_at_initial_offset))))
4550 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4554 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4558 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4559 ind_levels, is_set_dest, insn,
4561 /* If we have replaced a reg with it's equivalent memory loc -
4562 that can still be handled here e.g. if it's in a paradoxical
4563 subreg - we must make the change in a copy, rather than using
4564 a destructive change. This way, find_reloads can still elect
4565 not to do the change. */
4566 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4568 x = shallow_copy_rtx (x);
4571 XEXP (x, i) = new_part;
4577 /* Return a mem ref for the memory equivalent of reg REGNO.
4578 This mem ref is not shared with anything. */
4581 make_memloc (rtx ad, int regno)
4583 /* We must rerun eliminate_regs, in case the elimination
4584 offsets have changed. */
4586 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4588 /* If TEM might contain a pseudo, we must copy it to avoid
4589 modifying it when we do the substitution for the reload. */
4590 if (rtx_varies_p (tem, 0))
4591 tem = copy_rtx (tem);
4593 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4594 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4596 /* Copy the result if it's still the same as the equivalence, to avoid
4597 modifying it when we do the substitution for the reload. */
4598 if (tem == reg_equiv_memory_loc[regno])
4599 tem = copy_rtx (tem);
4603 /* Returns true if AD could be turned into a valid memory reference
4604 to mode MODE by reloading the part pointed to by PART into a
4608 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4612 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4615 retv = memory_address_p (mode, ad);
4621 /* Record all reloads needed for handling memory address AD
4622 which appears in *LOC in a memory reference to mode MODE
4623 which itself is found in location *MEMREFLOC.
4624 Note that we take shortcuts assuming that no multi-reg machine mode
4625 occurs as part of an address.
4627 OPNUM and TYPE specify the purpose of this reload.
4629 IND_LEVELS says how many levels of indirect addressing this machine
4632 INSN, if nonzero, is the insn in which we do the reload. It is used
4633 to determine if we may generate output reloads, and where to put USEs
4634 for pseudos that we have to replace with stack slots.
4636 Value is nonzero if this address is reloaded or replaced as a whole.
4637 This is interesting to the caller if the address is an autoincrement.
4639 Note that there is no verification that the address will be valid after
4640 this routine does its work. Instead, we rely on the fact that the address
4641 was valid when reload started. So we need only undo things that reload
4642 could have broken. These are wrong register types, pseudos not allocated
4643 to a hard register, and frame pointer elimination. */
4646 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4647 rtx *loc, int opnum, enum reload_type type,
4648 int ind_levels, rtx insn)
4651 int removed_and = 0;
4654 /* If the address is a register, see if it is a legitimate address and
4655 reload if not. We first handle the cases where we need not reload
4656 or where we must reload in a non-standard way. */
4658 if (GET_CODE (ad) == REG)
4662 /* If the register is equivalent to an invariant expression, substitute
4663 the invariant, and eliminate any eliminable register references. */
4664 tem = reg_equiv_constant[regno];
4666 && (tem = eliminate_regs (tem, mode, insn))
4667 && strict_memory_address_p (mode, tem))
4673 tem = reg_equiv_memory_loc[regno];
4676 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4678 tem = make_memloc (ad, regno);
4679 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4681 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4682 &XEXP (tem, 0), opnum,
4683 ADDR_TYPE (type), ind_levels, insn);
4685 /* We can avoid a reload if the register's equivalent memory
4686 expression is valid as an indirect memory address.
4687 But not all addresses are valid in a mem used as an indirect
4688 address: only reg or reg+constant. */
4691 && strict_memory_address_p (mode, tem)
4692 && (GET_CODE (XEXP (tem, 0)) == REG
4693 || (GET_CODE (XEXP (tem, 0)) == PLUS
4694 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4695 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4697 /* TEM is not the same as what we'll be replacing the
4698 pseudo with after reload, put a USE in front of INSN
4699 in the final reload pass. */
4701 && num_not_at_initial_offset
4702 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4705 /* We mark the USE with QImode so that we
4706 recognize it as one that can be safely
4707 deleted at the end of reload. */
4708 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4711 /* This doesn't really count as replacing the address
4712 as a whole, since it is still a memory access. */
4720 /* The only remaining case where we can avoid a reload is if this is a
4721 hard register that is valid as a base register and which is not the
4722 subject of a CLOBBER in this insn. */
4724 else if (regno < FIRST_PSEUDO_REGISTER
4725 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4726 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4729 /* If we do not have one of the cases above, we must do the reload. */
4730 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4731 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4735 if (strict_memory_address_p (mode, ad))
4737 /* The address appears valid, so reloads are not needed.
4738 But the address may contain an eliminable register.
4739 This can happen because a machine with indirect addressing
4740 may consider a pseudo register by itself a valid address even when
4741 it has failed to get a hard reg.
4742 So do a tree-walk to find and eliminate all such regs. */
4744 /* But first quickly dispose of a common case. */
4745 if (GET_CODE (ad) == PLUS
4746 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4747 && GET_CODE (XEXP (ad, 0)) == REG
4748 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4751 subst_reg_equivs_changed = 0;
4752 *loc = subst_reg_equivs (ad, insn);
4754 if (! subst_reg_equivs_changed)
4757 /* Check result for validity after substitution. */
4758 if (strict_memory_address_p (mode, ad))
4762 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4767 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4772 *memrefloc = copy_rtx (*memrefloc);
4773 XEXP (*memrefloc, 0) = ad;
4774 move_replacements (&ad, &XEXP (*memrefloc, 0));
4780 /* The address is not valid. We have to figure out why. First see if
4781 we have an outer AND and remove it if so. Then analyze what's inside. */
4783 if (GET_CODE (ad) == AND)
4786 loc = &XEXP (ad, 0);
4790 /* One possibility for why the address is invalid is that it is itself
4791 a MEM. This can happen when the frame pointer is being eliminated, a
4792 pseudo is not allocated to a hard register, and the offset between the
4793 frame and stack pointers is not its initial value. In that case the
4794 pseudo will have been replaced by a MEM referring to the
4796 if (GET_CODE (ad) == MEM)
4798 /* First ensure that the address in this MEM is valid. Then, unless
4799 indirect addresses are valid, reload the MEM into a register. */
4801 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4802 opnum, ADDR_TYPE (type),
4803 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4805 /* If tem was changed, then we must create a new memory reference to
4806 hold it and store it back into memrefloc. */
4807 if (tem != ad && memrefloc)
4809 *memrefloc = copy_rtx (*memrefloc);
4810 copy_replacements (tem, XEXP (*memrefloc, 0));
4811 loc = &XEXP (*memrefloc, 0);
4813 loc = &XEXP (*loc, 0);
4816 /* Check similar cases as for indirect addresses as above except
4817 that we can allow pseudos and a MEM since they should have been
4818 taken care of above. */
4821 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4822 || GET_CODE (XEXP (tem, 0)) == MEM
4823 || ! (GET_CODE (XEXP (tem, 0)) == REG
4824 || (GET_CODE (XEXP (tem, 0)) == PLUS
4825 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4826 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4828 /* Must use TEM here, not AD, since it is the one that will
4829 have any subexpressions reloaded, if needed. */
4830 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4831 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4834 return ! removed_and;
4840 /* If we have address of a stack slot but it's not valid because the
4841 displacement is too large, compute the sum in a register.
4842 Handle all base registers here, not just fp/ap/sp, because on some
4843 targets (namely SH) we can also get too large displacements from
4844 big-endian corrections. */
4845 else if (GET_CODE (ad) == PLUS
4846 && GET_CODE (XEXP (ad, 0)) == REG
4847 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4848 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4849 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4851 /* Unshare the MEM rtx so we can safely alter it. */
4854 *memrefloc = copy_rtx (*memrefloc);
4855 loc = &XEXP (*memrefloc, 0);
4857 loc = &XEXP (*loc, 0);
4860 if (double_reg_address_ok)
4862 /* Unshare the sum as well. */
4863 *loc = ad = copy_rtx (ad);
4865 /* Reload the displacement into an index reg.
4866 We assume the frame pointer or arg pointer is a base reg. */
4867 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4868 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4874 /* If the sum of two regs is not necessarily valid,
4875 reload the sum into a base reg.
4876 That will at least work. */
4877 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4878 Pmode, opnum, type, ind_levels);
4880 return ! removed_and;
4883 /* If we have an indexed stack slot, there are three possible reasons why
4884 it might be invalid: The index might need to be reloaded, the address
4885 might have been made by frame pointer elimination and hence have a
4886 constant out of range, or both reasons might apply.
4888 We can easily check for an index needing reload, but even if that is the
4889 case, we might also have an invalid constant. To avoid making the
4890 conservative assumption and requiring two reloads, we see if this address
4891 is valid when not interpreted strictly. If it is, the only problem is
4892 that the index needs a reload and find_reloads_address_1 will take care
4895 Handle all base registers here, not just fp/ap/sp, because on some
4896 targets (namely SPARC) we can also get invalid addresses from preventive
4897 subreg big-endian corrections made by find_reloads_toplev.
4899 If we decide to do something, it must be that `double_reg_address_ok'
4900 is true. We generate a reload of the base register + constant and
4901 rework the sum so that the reload register will be added to the index.
4902 This is safe because we know the address isn't shared.
4904 We check for the base register as both the first and second operand of
4905 the innermost PLUS. */
4907 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4908 && GET_CODE (XEXP (ad, 0)) == PLUS
4909 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4910 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4911 && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode)
4912 || XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4913 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4914 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4916 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4917 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4919 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4920 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
4922 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4923 plus_constant (XEXP (XEXP (ad, 0), 0),
4924 INTVAL (XEXP (ad, 1))),
4925 XEXP (XEXP (ad, 0), 1));
4926 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4927 MODE_BASE_REG_CLASS (mode),
4928 GET_MODE (ad), opnum, type, ind_levels);
4929 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4935 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4936 && GET_CODE (XEXP (ad, 0)) == PLUS
4937 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4938 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4939 && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode)
4940 || XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4941 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4942 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4944 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4945 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4947 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4948 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
4950 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4951 XEXP (XEXP (ad, 0), 0),
4952 plus_constant (XEXP (XEXP (ad, 0), 1),
4953 INTVAL (XEXP (ad, 1))));
4954 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4955 MODE_BASE_REG_CLASS (mode),
4956 GET_MODE (ad), opnum, type, ind_levels);
4957 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4963 /* See if address becomes valid when an eliminable register
4964 in a sum is replaced. */
4967 if (GET_CODE (ad) == PLUS)
4968 tem = subst_indexed_address (ad);
4969 if (tem != ad && strict_memory_address_p (mode, tem))
4971 /* Ok, we win that way. Replace any additional eliminable
4974 subst_reg_equivs_changed = 0;
4975 tem = subst_reg_equivs (tem, insn);
4977 /* Make sure that didn't make the address invalid again. */
4979 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4986 /* If constants aren't valid addresses, reload the constant address
4988 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4990 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4991 Unshare it so we can safely alter it. */
4992 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4993 && CONSTANT_POOL_ADDRESS_P (ad))
4995 *memrefloc = copy_rtx (*memrefloc);
4996 loc = &XEXP (*memrefloc, 0);
4998 loc = &XEXP (*loc, 0);
5001 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
5002 Pmode, opnum, type, ind_levels);
5003 return ! removed_and;
5006 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
5010 /* Find all pseudo regs appearing in AD
5011 that are eliminable in favor of equivalent values
5012 and do not have hard regs; replace them by their equivalents.
5013 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5014 front of it for pseudos that we have to replace with stack slots. */
5017 subst_reg_equivs (rtx ad, rtx insn)
5019 RTX_CODE code = GET_CODE (ad);
5038 int regno = REGNO (ad);
5040 if (reg_equiv_constant[regno] != 0)
5042 subst_reg_equivs_changed = 1;
5043 return reg_equiv_constant[regno];
5045 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5047 rtx mem = make_memloc (ad, regno);
5048 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5050 subst_reg_equivs_changed = 1;
5051 /* We mark the USE with QImode so that we recognize it
5052 as one that can be safely deleted at the end of
5054 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5063 /* Quickly dispose of a common case. */
5064 if (XEXP (ad, 0) == frame_pointer_rtx
5065 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5073 fmt = GET_RTX_FORMAT (code);
5074 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5076 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5080 /* Compute the sum of X and Y, making canonicalizations assumed in an
5081 address, namely: sum constant integers, surround the sum of two
5082 constants with a CONST, put the constant as the second operand, and
5083 group the constant on the outermost sum.
5085 This routine assumes both inputs are already in canonical form. */
5088 form_sum (rtx x, rtx y)
5091 enum machine_mode mode = GET_MODE (x);
5093 if (mode == VOIDmode)
5094 mode = GET_MODE (y);
5096 if (mode == VOIDmode)
5099 if (GET_CODE (x) == CONST_INT)
5100 return plus_constant (y, INTVAL (x));
5101 else if (GET_CODE (y) == CONST_INT)
5102 return plus_constant (x, INTVAL (y));
5103 else if (CONSTANT_P (x))
5104 tem = x, x = y, y = tem;
5106 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5107 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5109 /* Note that if the operands of Y are specified in the opposite
5110 order in the recursive calls below, infinite recursion will occur. */
5111 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5112 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5114 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5115 constant will have been placed second. */
5116 if (CONSTANT_P (x) && CONSTANT_P (y))
5118 if (GET_CODE (x) == CONST)
5120 if (GET_CODE (y) == CONST)
5123 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5126 return gen_rtx_PLUS (mode, x, y);
5129 /* If ADDR is a sum containing a pseudo register that should be
5130 replaced with a constant (from reg_equiv_constant),
5131 return the result of doing so, and also apply the associative
5132 law so that the result is more likely to be a valid address.
5133 (But it is not guaranteed to be one.)
5135 Note that at most one register is replaced, even if more are
5136 replaceable. Also, we try to put the result into a canonical form
5137 so it is more likely to be a valid address.
5139 In all other cases, return ADDR. */
5142 subst_indexed_address (rtx addr)
5144 rtx op0 = 0, op1 = 0, op2 = 0;
5148 if (GET_CODE (addr) == PLUS)
5150 /* Try to find a register to replace. */
5151 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5152 if (GET_CODE (op0) == REG
5153 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5154 && reg_renumber[regno] < 0
5155 && reg_equiv_constant[regno] != 0)
5156 op0 = reg_equiv_constant[regno];
5157 else if (GET_CODE (op1) == REG
5158 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5159 && reg_renumber[regno] < 0
5160 && reg_equiv_constant[regno] != 0)
5161 op1 = reg_equiv_constant[regno];
5162 else if (GET_CODE (op0) == PLUS
5163 && (tem = subst_indexed_address (op0)) != op0)
5165 else if (GET_CODE (op1) == PLUS
5166 && (tem = subst_indexed_address (op1)) != op1)
5171 /* Pick out up to three things to add. */
5172 if (GET_CODE (op1) == PLUS)
5173 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5174 else if (GET_CODE (op0) == PLUS)
5175 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5177 /* Compute the sum. */
5179 op1 = form_sum (op1, op2);
5181 op0 = form_sum (op0, op1);
5188 /* Update the REG_INC notes for an insn. It updates all REG_INC
5189 notes for the instruction which refer to REGNO the to refer
5190 to the reload number.
5192 INSN is the insn for which any REG_INC notes need updating.
5194 REGNO is the register number which has been reloaded.
5196 RELOADNUM is the reload number. */
5199 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5200 int reloadnum ATTRIBUTE_UNUSED)
5205 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5206 if (REG_NOTE_KIND (link) == REG_INC
5207 && (int) REGNO (XEXP (link, 0)) == regno)
5208 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5212 /* Record the pseudo registers we must reload into hard registers in a
5213 subexpression of a would-be memory address, X referring to a value
5214 in mode MODE. (This function is not called if the address we find
5217 CONTEXT = 1 means we are considering regs as index regs,
5218 = 0 means we are considering them as base regs.
5220 OPNUM and TYPE specify the purpose of any reloads made.
5222 IND_LEVELS says how many levels of indirect addressing are
5223 supported at this point in the address.
5225 INSN, if nonzero, is the insn in which we do the reload. It is used
5226 to determine if we may generate output reloads.
5228 We return nonzero if X, as a whole, is reloaded or replaced. */
5230 /* Note that we take shortcuts assuming that no multi-reg machine mode
5231 occurs as part of an address.
5232 Also, this is not fully machine-customizable; it works for machines
5233 such as VAXen and 68000's and 32000's, but other possible machines
5234 could have addressing modes that this does not handle right. */
5237 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5238 rtx *loc, int opnum, enum reload_type type,
5239 int ind_levels, rtx insn)
5241 RTX_CODE code = GET_CODE (x);
5247 rtx orig_op0 = XEXP (x, 0);
5248 rtx orig_op1 = XEXP (x, 1);
5249 RTX_CODE code0 = GET_CODE (orig_op0);
5250 RTX_CODE code1 = GET_CODE (orig_op1);
5254 if (GET_CODE (op0) == SUBREG)
5256 op0 = SUBREG_REG (op0);
5257 code0 = GET_CODE (op0);
5258 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5259 op0 = gen_rtx_REG (word_mode,
5261 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5262 GET_MODE (SUBREG_REG (orig_op0)),
5263 SUBREG_BYTE (orig_op0),
5264 GET_MODE (orig_op0))));
5267 if (GET_CODE (op1) == SUBREG)
5269 op1 = SUBREG_REG (op1);
5270 code1 = GET_CODE (op1);
5271 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5272 /* ??? Why is this given op1's mode and above for
5273 ??? op0 SUBREGs we use word_mode? */
5274 op1 = gen_rtx_REG (GET_MODE (op1),
5276 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5277 GET_MODE (SUBREG_REG (orig_op1)),
5278 SUBREG_BYTE (orig_op1),
5279 GET_MODE (orig_op1))));
5281 /* Plus in the index register may be created only as a result of
5282 register remateralization for expression like &localvar*4. Reload it.
5283 It may be possible to combine the displacement on the outer level,
5284 but it is probably not worthwhile to do so. */
5287 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5288 opnum, ADDR_TYPE (type), ind_levels, insn);
5289 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5290 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5291 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5295 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5296 || code0 == ZERO_EXTEND || code1 == MEM)
5298 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5299 type, ind_levels, insn);
5300 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5301 type, ind_levels, insn);
5304 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5305 || code1 == ZERO_EXTEND || code0 == MEM)
5307 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5308 type, ind_levels, insn);
5309 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5310 type, ind_levels, insn);
5313 else if (code0 == CONST_INT || code0 == CONST
5314 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5315 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5316 type, ind_levels, insn);
5318 else if (code1 == CONST_INT || code1 == CONST
5319 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5320 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5321 type, ind_levels, insn);
5323 else if (code0 == REG && code1 == REG)
5325 if (REG_OK_FOR_INDEX_P (op0)
5326 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5328 else if (REG_OK_FOR_INDEX_P (op1)
5329 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5331 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5332 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5333 type, ind_levels, insn);
5334 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5335 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5336 type, ind_levels, insn);
5337 else if (REG_OK_FOR_INDEX_P (op1))
5338 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5339 type, ind_levels, insn);
5340 else if (REG_OK_FOR_INDEX_P (op0))
5341 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5342 type, ind_levels, insn);
5345 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5346 type, ind_levels, insn);
5347 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5348 type, ind_levels, insn);
5352 else if (code0 == REG)
5354 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5355 type, ind_levels, insn);
5356 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5357 type, ind_levels, insn);
5360 else if (code1 == REG)
5362 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5363 type, ind_levels, insn);
5364 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5365 type, ind_levels, insn);
5374 rtx op0 = XEXP (x, 0);
5375 rtx op1 = XEXP (x, 1);
5377 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5380 /* Currently, we only support {PRE,POST}_MODIFY constructs
5381 where a base register is {inc,dec}remented by the contents
5382 of another register or by a constant value. Thus, these
5383 operands must match. */
5384 if (op0 != XEXP (op1, 0))
5387 /* Require index register (or constant). Let's just handle the
5388 register case in the meantime... If the target allows
5389 auto-modify by a constant then we could try replacing a pseudo
5390 register with its equivalent constant where applicable. */
5391 if (REG_P (XEXP (op1, 1)))
5392 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5393 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5394 opnum, type, ind_levels, insn);
5396 if (REG_P (XEXP (op1, 0)))
5398 int regno = REGNO (XEXP (op1, 0));
5401 /* A register that is incremented cannot be constant! */
5402 if (regno >= FIRST_PSEUDO_REGISTER
5403 && reg_equiv_constant[regno] != 0)
5406 /* Handle a register that is equivalent to a memory location
5407 which cannot be addressed directly. */
5408 if (reg_equiv_memory_loc[regno] != 0
5409 && (reg_equiv_address[regno] != 0
5410 || num_not_at_initial_offset))
5412 rtx tem = make_memloc (XEXP (x, 0), regno);
5414 if (reg_equiv_address[regno]
5415 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5417 /* First reload the memory location's address.
5418 We can't use ADDR_TYPE (type) here, because we need to
5419 write back the value after reading it, hence we actually
5420 need two registers. */
5421 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5422 &XEXP (tem, 0), opnum,
5426 /* Then reload the memory location into a base
5428 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5430 MODE_BASE_REG_CLASS (mode),
5431 GET_MODE (x), GET_MODE (x), 0,
5432 0, opnum, RELOAD_OTHER);
5434 update_auto_inc_notes (this_insn, regno, reloadnum);
5439 if (reg_renumber[regno] >= 0)
5440 regno = reg_renumber[regno];
5442 /* We require a base register here... */
5443 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5445 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5446 &XEXP (op1, 0), &XEXP (x, 0),
5447 MODE_BASE_REG_CLASS (mode),
5448 GET_MODE (x), GET_MODE (x), 0, 0,
5449 opnum, RELOAD_OTHER);
5451 update_auto_inc_notes (this_insn, regno, reloadnum);
5464 if (GET_CODE (XEXP (x, 0)) == REG)
5466 int regno = REGNO (XEXP (x, 0));
5470 /* A register that is incremented cannot be constant! */
5471 if (regno >= FIRST_PSEUDO_REGISTER
5472 && reg_equiv_constant[regno] != 0)
5475 /* Handle a register that is equivalent to a memory location
5476 which cannot be addressed directly. */
5477 if (reg_equiv_memory_loc[regno] != 0
5478 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5480 rtx tem = make_memloc (XEXP (x, 0), regno);
5481 if (reg_equiv_address[regno]
5482 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5484 /* First reload the memory location's address.
5485 We can't use ADDR_TYPE (type) here, because we need to
5486 write back the value after reading it, hence we actually
5487 need two registers. */
5488 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5489 &XEXP (tem, 0), opnum, type,
5491 /* Put this inside a new increment-expression. */
5492 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5493 /* Proceed to reload that, as if it contained a register. */
5497 /* If we have a hard register that is ok as an index,
5498 don't make a reload. If an autoincrement of a nice register
5499 isn't "valid", it must be that no autoincrement is "valid".
5500 If that is true and something made an autoincrement anyway,
5501 this must be a special context where one is allowed.
5502 (For example, a "push" instruction.)
5503 We can't improve this address, so leave it alone. */
5505 /* Otherwise, reload the autoincrement into a suitable hard reg
5506 and record how much to increment by. */
5508 if (reg_renumber[regno] >= 0)
5509 regno = reg_renumber[regno];
5510 if ((regno >= FIRST_PSEUDO_REGISTER
5511 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5512 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5516 /* If we can output the register afterwards, do so, this
5517 saves the extra update.
5518 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5519 CALL_INSN - and it does not set CC0.
5520 But don't do this if we cannot directly address the
5521 memory location, since this will make it harder to
5522 reuse address reloads, and increases register pressure.
5523 Also don't do this if we can probably update x directly. */
5524 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5526 : reg_equiv_mem[regno]);
5527 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5528 if (insn && GET_CODE (insn) == INSN && equiv
5529 && memory_operand (equiv, GET_MODE (equiv))
5531 && ! sets_cc0_p (PATTERN (insn))
5533 && ! (icode != CODE_FOR_nothing
5534 && ((*insn_data[icode].operand[0].predicate)
5536 && ((*insn_data[icode].operand[1].predicate)
5539 /* We use the original pseudo for loc, so that
5540 emit_reload_insns() knows which pseudo this
5541 reload refers to and updates the pseudo rtx, not
5542 its equivalent memory location, as well as the
5543 corresponding entry in reg_last_reload_reg. */
5544 loc = &XEXP (x_orig, 0);
5547 = push_reload (x, x, loc, loc,
5548 (context ? INDEX_REG_CLASS :
5549 MODE_BASE_REG_CLASS (mode)),
5550 GET_MODE (x), GET_MODE (x), 0, 0,
5551 opnum, RELOAD_OTHER);
5556 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5557 (context ? INDEX_REG_CLASS :
5558 MODE_BASE_REG_CLASS (mode)),
5559 GET_MODE (x), GET_MODE (x), 0, 0,
5562 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5567 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5573 else if (GET_CODE (XEXP (x, 0)) == MEM)
5575 /* This is probably the result of a substitution, by eliminate_regs,
5576 of an equivalent address for a pseudo that was not allocated to a
5577 hard register. Verify that the specified address is valid and
5578 reload it into a register. */
5579 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5580 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5584 /* Since we know we are going to reload this item, don't decrement
5585 for the indirection level.
5587 Note that this is actually conservative: it would be slightly
5588 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5590 /* We can't use ADDR_TYPE (type) here, because we need to
5591 write back the value after reading it, hence we actually
5592 need two registers. */
5593 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5594 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5595 opnum, type, ind_levels, insn);
5597 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5598 (context ? INDEX_REG_CLASS :
5599 MODE_BASE_REG_CLASS (mode)),
5600 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5602 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5604 link = FIND_REG_INC_NOTE (this_insn, tem);
5606 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5613 /* This is probably the result of a substitution, by eliminate_regs, of
5614 an equivalent address for a pseudo that was not allocated to a hard
5615 register. Verify that the specified address is valid and reload it
5618 Since we know we are going to reload this item, don't decrement for
5619 the indirection level.
5621 Note that this is actually conservative: it would be slightly more
5622 efficient to use the value of SPILL_INDIRECT_LEVELS from
5625 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5626 opnum, ADDR_TYPE (type), ind_levels, insn);
5627 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5628 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5629 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5634 int regno = REGNO (x);
5636 if (reg_equiv_constant[regno] != 0)
5638 find_reloads_address_part (reg_equiv_constant[regno], loc,
5639 (context ? INDEX_REG_CLASS :
5640 MODE_BASE_REG_CLASS (mode)),
5641 GET_MODE (x), opnum, type, ind_levels);
5645 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5646 that feeds this insn. */
5647 if (reg_equiv_mem[regno] != 0)
5649 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5650 (context ? INDEX_REG_CLASS :
5651 MODE_BASE_REG_CLASS (mode)),
5652 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5657 if (reg_equiv_memory_loc[regno]
5658 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5660 rtx tem = make_memloc (x, regno);
5661 if (reg_equiv_address[regno] != 0
5662 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5665 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5666 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5671 if (reg_renumber[regno] >= 0)
5672 regno = reg_renumber[regno];
5674 if ((regno >= FIRST_PSEUDO_REGISTER
5675 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5676 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5678 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5679 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5680 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5684 /* If a register appearing in an address is the subject of a CLOBBER
5685 in this insn, reload it into some other register to be safe.
5686 The CLOBBER is supposed to make the register unavailable
5687 from before this insn to after it. */
5688 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5690 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5691 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5692 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5699 if (GET_CODE (SUBREG_REG (x)) == REG)
5701 /* If this is a SUBREG of a hard register and the resulting register
5702 is of the wrong class, reload the whole SUBREG. This avoids
5703 needless copies if SUBREG_REG is multi-word. */
5704 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5706 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5708 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5709 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5711 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5712 (context ? INDEX_REG_CLASS :
5713 MODE_BASE_REG_CLASS (mode)),
5714 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5718 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5719 is larger than the class size, then reload the whole SUBREG. */
5722 enum reg_class class = (context ? INDEX_REG_CLASS
5723 : MODE_BASE_REG_CLASS (mode));
5724 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5725 > reg_class_size[class])
5727 x = find_reloads_subreg_address (x, 0, opnum, type,
5729 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5730 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5742 const char *fmt = GET_RTX_FORMAT (code);
5745 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5748 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5749 opnum, type, ind_levels, insn);
5756 /* X, which is found at *LOC, is a part of an address that needs to be
5757 reloaded into a register of class CLASS. If X is a constant, or if
5758 X is a PLUS that contains a constant, check that the constant is a
5759 legitimate operand and that we are supposed to be able to load
5760 it into the register.
5762 If not, force the constant into memory and reload the MEM instead.
5764 MODE is the mode to use, in case X is an integer constant.
5766 OPNUM and TYPE describe the purpose of any reloads made.
5768 IND_LEVELS says how many levels of indirect addressing this machine
5772 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5773 enum machine_mode mode, int opnum,
5774 enum reload_type type, int ind_levels)
5777 && (! LEGITIMATE_CONSTANT_P (x)
5778 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5782 tem = x = force_const_mem (mode, x);
5783 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5784 opnum, type, ind_levels, 0);
5787 else if (GET_CODE (x) == PLUS
5788 && CONSTANT_P (XEXP (x, 1))
5789 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5790 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5794 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5795 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5796 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5797 opnum, type, ind_levels, 0);
5800 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5801 mode, VOIDmode, 0, 0, opnum, type);
5804 /* X, a subreg of a pseudo, is a part of an address that needs to be
5807 If the pseudo is equivalent to a memory location that cannot be directly
5808 addressed, make the necessary address reloads.
5810 If address reloads have been necessary, or if the address is changed
5811 by register elimination, return the rtx of the memory location;
5812 otherwise, return X.
5814 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5817 OPNUM and TYPE identify the purpose of the reload.
5819 IND_LEVELS says how many levels of indirect addressing are
5820 supported at this point in the address.
5822 INSN, if nonzero, is the insn in which we do the reload. It is used
5823 to determine where to put USEs for pseudos that we have to replace with
5827 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5828 enum reload_type type, int ind_levels, rtx insn)
5830 int regno = REGNO (SUBREG_REG (x));
5832 if (reg_equiv_memory_loc[regno])
5834 /* If the address is not directly addressable, or if the address is not
5835 offsettable, then it must be replaced. */
5837 && (reg_equiv_address[regno]
5838 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5841 if (force_replace || num_not_at_initial_offset)
5843 rtx tem = make_memloc (SUBREG_REG (x), regno);
5845 /* If the address changes because of register elimination, then
5846 it must be replaced. */
5848 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5850 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5851 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5854 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5855 hold the correct (negative) byte offset. */
5856 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
5857 offset = inner_size - outer_size;
5859 offset = SUBREG_BYTE (x);
5861 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5862 PUT_MODE (tem, GET_MODE (x));
5864 /* If this was a paradoxical subreg that we replaced, the
5865 resulting memory must be sufficiently aligned to allow
5866 us to widen the mode of the memory. */
5867 if (outer_size > inner_size && STRICT_ALIGNMENT)
5871 base = XEXP (tem, 0);
5872 if (GET_CODE (base) == PLUS)
5874 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5875 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5877 base = XEXP (base, 0);
5879 if (GET_CODE (base) != REG
5880 || (REGNO_POINTER_ALIGN (REGNO (base))
5881 < outer_size * BITS_PER_UNIT))
5885 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5886 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5889 /* If this is not a toplevel operand, find_reloads doesn't see
5890 this substitution. We have to emit a USE of the pseudo so
5891 that delete_output_reload can see it. */
5892 if (replace_reloads && recog_data.operand[opnum] != x)
5893 /* We mark the USE with QImode so that we recognize it
5894 as one that can be safely deleted at the end of
5896 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5906 /* Substitute into the current INSN the registers into which we have reloaded
5907 the things that need reloading. The array `replacements'
5908 contains the locations of all pointers that must be changed
5909 and says what to replace them with.
5911 Return the rtx that X translates into; usually X, but modified. */
5914 subst_reloads (rtx insn)
5918 for (i = 0; i < n_replacements; i++)
5920 struct replacement *r = &replacements[i];
5921 rtx reloadreg = rld[r->what].reg_rtx;
5924 #ifdef ENABLE_CHECKING
5925 /* Internal consistency test. Check that we don't modify
5926 anything in the equivalence arrays. Whenever something from
5927 those arrays needs to be reloaded, it must be unshared before
5928 being substituted into; the equivalence must not be modified.
5929 Otherwise, if the equivalence is used after that, it will
5930 have been modified, and the thing substituted (probably a
5931 register) is likely overwritten and not a usable equivalence. */
5934 for (check_regno = 0; check_regno < max_regno; check_regno++)
5936 #define CHECK_MODF(ARRAY) \
5937 if (ARRAY[check_regno] \
5938 && loc_mentioned_in_p (r->where, \
5939 ARRAY[check_regno])) \
5942 CHECK_MODF (reg_equiv_constant);
5943 CHECK_MODF (reg_equiv_memory_loc);
5944 CHECK_MODF (reg_equiv_address);
5945 CHECK_MODF (reg_equiv_mem);
5948 #endif /* ENABLE_CHECKING */
5950 /* If we're replacing a LABEL_REF with a register, add a
5951 REG_LABEL note to indicate to flow which label this
5952 register refers to. */
5953 if (GET_CODE (*r->where) == LABEL_REF
5954 && GET_CODE (insn) == JUMP_INSN)
5955 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5956 XEXP (*r->where, 0),
5959 /* Encapsulate RELOADREG so its machine mode matches what
5960 used to be there. Note that gen_lowpart_common will
5961 do the wrong thing if RELOADREG is multi-word. RELOADREG
5962 will always be a REG here. */
5963 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5964 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
5966 /* If we are putting this into a SUBREG and RELOADREG is a
5967 SUBREG, we would be making nested SUBREGs, so we have to fix
5968 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5970 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5972 if (GET_MODE (*r->subreg_loc)
5973 == GET_MODE (SUBREG_REG (reloadreg)))
5974 *r->subreg_loc = SUBREG_REG (reloadreg);
5978 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5980 /* When working with SUBREGs the rule is that the byte
5981 offset must be a multiple of the SUBREG's mode. */
5982 final_offset = (final_offset /
5983 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5984 final_offset = (final_offset *
5985 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5987 *r->where = SUBREG_REG (reloadreg);
5988 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5992 *r->where = reloadreg;
5994 /* If reload got no reg and isn't optional, something's wrong. */
5995 else if (! rld[r->what].optional)
6000 /* Make a copy of any replacements being done into X and move those
6001 copies to locations in Y, a copy of X. */
6004 copy_replacements (rtx x, rtx y)
6006 /* We can't support X being a SUBREG because we might then need to know its
6007 location if something inside it was replaced. */
6008 if (GET_CODE (x) == SUBREG)
6011 copy_replacements_1 (&x, &y, n_replacements);
6015 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6019 struct replacement *r;
6023 for (j = 0; j < orig_replacements; j++)
6025 if (replacements[j].subreg_loc == px)
6027 r = &replacements[n_replacements++];
6028 r->where = replacements[j].where;
6030 r->what = replacements[j].what;
6031 r->mode = replacements[j].mode;
6033 else if (replacements[j].where == px)
6035 r = &replacements[n_replacements++];
6038 r->what = replacements[j].what;
6039 r->mode = replacements[j].mode;
6045 code = GET_CODE (x);
6046 fmt = GET_RTX_FORMAT (code);
6048 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6051 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6052 else if (fmt[i] == 'E')
6053 for (j = XVECLEN (x, i); --j >= 0; )
6054 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6059 /* Change any replacements being done to *X to be done to *Y. */
6062 move_replacements (rtx *x, rtx *y)
6066 for (i = 0; i < n_replacements; i++)
6067 if (replacements[i].subreg_loc == x)
6068 replacements[i].subreg_loc = y;
6069 else if (replacements[i].where == x)
6071 replacements[i].where = y;
6072 replacements[i].subreg_loc = 0;
6076 /* If LOC was scheduled to be replaced by something, return the replacement.
6077 Otherwise, return *LOC. */
6080 find_replacement (rtx *loc)
6082 struct replacement *r;
6084 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6086 rtx reloadreg = rld[r->what].reg_rtx;
6088 if (reloadreg && r->where == loc)
6090 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6091 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6095 else if (reloadreg && r->subreg_loc == loc)
6097 /* RELOADREG must be either a REG or a SUBREG.
6099 ??? Is it actually still ever a SUBREG? If so, why? */
6101 if (GET_CODE (reloadreg) == REG)
6102 return gen_rtx_REG (GET_MODE (*loc),
6103 (REGNO (reloadreg) +
6104 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6105 GET_MODE (SUBREG_REG (*loc)),
6108 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6112 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6114 /* When working with SUBREGs the rule is that the byte
6115 offset must be a multiple of the SUBREG's mode. */
6116 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6117 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6118 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6124 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6125 what's inside and make a new rtl if so. */
6126 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6127 || GET_CODE (*loc) == MULT)
6129 rtx x = find_replacement (&XEXP (*loc, 0));
6130 rtx y = find_replacement (&XEXP (*loc, 1));
6132 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6133 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6139 /* Return nonzero if register in range [REGNO, ENDREGNO)
6140 appears either explicitly or implicitly in X
6141 other than being stored into (except for earlyclobber operands).
6143 References contained within the substructure at LOC do not count.
6144 LOC may be zero, meaning don't ignore anything.
6146 This is similar to refers_to_regno_p in rtlanal.c except that we
6147 look at equivalences for pseudos that didn't get hard registers. */
6150 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6162 code = GET_CODE (x);
6169 /* If this is a pseudo, a hard register must not have been allocated.
6170 X must therefore either be a constant or be in memory. */
6171 if (r >= FIRST_PSEUDO_REGISTER)
6173 if (reg_equiv_memory_loc[r])
6174 return refers_to_regno_for_reload_p (regno, endregno,
6175 reg_equiv_memory_loc[r],
6178 if (reg_equiv_constant[r])
6184 return (endregno > r
6185 && regno < r + (r < FIRST_PSEUDO_REGISTER
6186 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6190 /* If this is a SUBREG of a hard reg, we can see exactly which
6191 registers are being modified. Otherwise, handle normally. */
6192 if (GET_CODE (SUBREG_REG (x)) == REG
6193 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6195 unsigned int inner_regno = subreg_regno (x);
6196 unsigned int inner_endregno
6197 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6198 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6200 return endregno > inner_regno && regno < inner_endregno;
6206 if (&SET_DEST (x) != loc
6207 /* Note setting a SUBREG counts as referring to the REG it is in for
6208 a pseudo but not for hard registers since we can
6209 treat each word individually. */
6210 && ((GET_CODE (SET_DEST (x)) == SUBREG
6211 && loc != &SUBREG_REG (SET_DEST (x))
6212 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6213 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6214 && refers_to_regno_for_reload_p (regno, endregno,
6215 SUBREG_REG (SET_DEST (x)),
6217 /* If the output is an earlyclobber operand, this is
6219 || ((GET_CODE (SET_DEST (x)) != REG
6220 || earlyclobber_operand_p (SET_DEST (x)))
6221 && refers_to_regno_for_reload_p (regno, endregno,
6222 SET_DEST (x), loc))))
6225 if (code == CLOBBER || loc == &SET_SRC (x))
6234 /* X does not match, so try its subexpressions. */
6236 fmt = GET_RTX_FORMAT (code);
6237 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6239 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6247 if (refers_to_regno_for_reload_p (regno, endregno,
6251 else if (fmt[i] == 'E')
6254 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6255 if (loc != &XVECEXP (x, i, j)
6256 && refers_to_regno_for_reload_p (regno, endregno,
6257 XVECEXP (x, i, j), loc))
6264 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6265 we check if any register number in X conflicts with the relevant register
6266 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6267 contains a MEM (we don't bother checking for memory addresses that can't
6268 conflict because we expect this to be a rare case.
6270 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6271 that we look at equivalences for pseudos that didn't get hard registers. */
6274 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6276 int regno, endregno;
6278 /* Overly conservative. */
6279 if (GET_CODE (x) == STRICT_LOW_PART
6280 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6283 /* If either argument is a constant, then modifying X can not affect IN. */
6284 if (CONSTANT_P (x) || CONSTANT_P (in))
6286 else if (GET_CODE (x) == SUBREG)
6288 regno = REGNO (SUBREG_REG (x));
6289 if (regno < FIRST_PSEUDO_REGISTER)
6290 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6291 GET_MODE (SUBREG_REG (x)),
6295 else if (GET_CODE (x) == REG)
6299 /* If this is a pseudo, it must not have been assigned a hard register.
6300 Therefore, it must either be in memory or be a constant. */
6302 if (regno >= FIRST_PSEUDO_REGISTER)
6304 if (reg_equiv_memory_loc[regno])
6305 return refers_to_mem_for_reload_p (in);
6306 else if (reg_equiv_constant[regno])
6311 else if (GET_CODE (x) == MEM)
6312 return refers_to_mem_for_reload_p (in);
6313 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6314 || GET_CODE (x) == CC0)
6315 return reg_mentioned_p (x, in);
6316 else if (GET_CODE (x) == PLUS)
6318 /* We actually want to know if X is mentioned somewhere inside IN.
6319 We must not say that (plus (sp) (const_int 124)) is in
6320 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6321 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6322 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6323 while (GET_CODE (in) == MEM)
6325 if (GET_CODE (in) == REG)
6327 else if (GET_CODE (in) == PLUS)
6328 return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6329 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6330 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6331 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6336 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6337 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6339 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6342 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6346 refers_to_mem_for_reload_p (rtx x)
6351 if (GET_CODE (x) == MEM)
6354 if (GET_CODE (x) == REG)
6355 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6356 && reg_equiv_memory_loc[REGNO (x)]);
6358 fmt = GET_RTX_FORMAT (GET_CODE (x));
6359 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6361 && (GET_CODE (XEXP (x, i)) == MEM
6362 || refers_to_mem_for_reload_p (XEXP (x, i))))
6368 /* Check the insns before INSN to see if there is a suitable register
6369 containing the same value as GOAL.
6370 If OTHER is -1, look for a register in class CLASS.
6371 Otherwise, just see if register number OTHER shares GOAL's value.
6373 Return an rtx for the register found, or zero if none is found.
6375 If RELOAD_REG_P is (short *)1,
6376 we reject any hard reg that appears in reload_reg_rtx
6377 because such a hard reg is also needed coming into this insn.
6379 If RELOAD_REG_P is any other nonzero value,
6380 it is a vector indexed by hard reg number
6381 and we reject any hard reg whose element in the vector is nonnegative
6382 as well as any that appears in reload_reg_rtx.
6384 If GOAL is zero, then GOALREG is a register number; we look
6385 for an equivalent for that register.
6387 MODE is the machine mode of the value we want an equivalence for.
6388 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6390 This function is used by jump.c as well as in the reload pass.
6392 If GOAL is the sum of the stack pointer and a constant, we treat it
6393 as if it were a constant except that sp is required to be unchanging. */
6396 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6397 short *reload_reg_p, int goalreg, enum machine_mode mode)
6400 rtx goaltry, valtry, value, where;
6406 int goal_mem_addr_varies = 0;
6407 int need_stable_sp = 0;
6414 else if (GET_CODE (goal) == REG)
6415 regno = REGNO (goal);
6416 else if (GET_CODE (goal) == MEM)
6418 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6419 if (MEM_VOLATILE_P (goal))
6421 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6423 /* An address with side effects must be reexecuted. */
6438 else if (CONSTANT_P (goal))
6440 else if (GET_CODE (goal) == PLUS
6441 && XEXP (goal, 0) == stack_pointer_rtx
6442 && CONSTANT_P (XEXP (goal, 1)))
6443 goal_const = need_stable_sp = 1;
6444 else if (GET_CODE (goal) == PLUS
6445 && XEXP (goal, 0) == frame_pointer_rtx
6446 && CONSTANT_P (XEXP (goal, 1)))
6452 /* Scan insns back from INSN, looking for one that copies
6453 a value into or out of GOAL.
6454 Stop and give up if we reach a label. */
6460 if (p == 0 || GET_CODE (p) == CODE_LABEL
6461 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6464 if (GET_CODE (p) == INSN
6465 /* If we don't want spill regs ... */
6466 && (! (reload_reg_p != 0
6467 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6468 /* ... then ignore insns introduced by reload; they aren't
6469 useful and can cause results in reload_as_needed to be
6470 different from what they were when calculating the need for
6471 spills. If we notice an input-reload insn here, we will
6472 reject it below, but it might hide a usable equivalent.
6473 That makes bad code. It may even abort: perhaps no reg was
6474 spilled for this insn because it was assumed we would find
6476 || INSN_UID (p) < reload_first_uid))
6479 pat = single_set (p);
6481 /* First check for something that sets some reg equal to GOAL. */
6484 && true_regnum (SET_SRC (pat)) == regno
6485 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6488 && true_regnum (SET_DEST (pat)) == regno
6489 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6491 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6492 /* When looking for stack pointer + const,
6493 make sure we don't use a stack adjust. */
6494 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6495 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6497 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6498 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6500 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6501 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6502 /* If we are looking for a constant,
6503 and something equivalent to that constant was copied
6504 into a reg, we can use that reg. */
6505 || (goal_const && REG_NOTES (p) != 0
6506 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6507 && ((rtx_equal_p (XEXP (tem, 0), goal)
6509 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6510 || (GET_CODE (SET_DEST (pat)) == REG
6511 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6512 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6514 && GET_CODE (goal) == CONST_INT
6516 = operand_subword (XEXP (tem, 0), 0, 0,
6518 && rtx_equal_p (goal, goaltry)
6520 = operand_subword (SET_DEST (pat), 0, 0,
6522 && (valueno = true_regnum (valtry)) >= 0)))
6523 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6525 && GET_CODE (SET_DEST (pat)) == REG
6526 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6527 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6529 && GET_CODE (goal) == CONST_INT
6530 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6532 && rtx_equal_p (goal, goaltry)
6534 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6535 && (valueno = true_regnum (valtry)) >= 0)))
6539 if (valueno != other)
6542 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6548 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6549 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6562 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6563 (or copying VALUE into GOAL, if GOAL is also a register).
6564 Now verify that VALUE is really valid. */
6566 /* VALUENO is the register number of VALUE; a hard register. */
6568 /* Don't try to re-use something that is killed in this insn. We want
6569 to be able to trust REG_UNUSED notes. */
6570 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6573 /* If we propose to get the value from the stack pointer or if GOAL is
6574 a MEM based on the stack pointer, we need a stable SP. */
6575 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6576 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6580 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6581 if (GET_MODE (value) != mode)
6584 /* Reject VALUE if it was loaded from GOAL
6585 and is also a register that appears in the address of GOAL. */
6587 if (goal_mem && value == SET_DEST (single_set (where))
6588 && refers_to_regno_for_reload_p (valueno,
6590 + HARD_REGNO_NREGS (valueno, mode)),
6594 /* Reject registers that overlap GOAL. */
6596 if (!goal_mem && !goal_const
6597 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6598 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6601 nregs = HARD_REGNO_NREGS (regno, mode);
6602 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6604 /* Reject VALUE if it is one of the regs reserved for reloads.
6605 Reload1 knows how to reuse them anyway, and it would get
6606 confused if we allocated one without its knowledge.
6607 (Now that insns introduced by reload are ignored above,
6608 this case shouldn't happen, but I'm not positive.) */
6610 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6613 for (i = 0; i < valuenregs; ++i)
6614 if (reload_reg_p[valueno + i] >= 0)
6618 /* Reject VALUE if it is a register being used for an input reload
6619 even if it is not one of those reserved. */
6621 if (reload_reg_p != 0)
6624 for (i = 0; i < n_reloads; i++)
6625 if (rld[i].reg_rtx != 0 && rld[i].in)
6627 int regno1 = REGNO (rld[i].reg_rtx);
6628 int nregs1 = HARD_REGNO_NREGS (regno1,
6629 GET_MODE (rld[i].reg_rtx));
6630 if (regno1 < valueno + valuenregs
6631 && regno1 + nregs1 > valueno)
6637 /* We must treat frame pointer as varying here,
6638 since it can vary--in a nonlocal goto as generated by expand_goto. */
6639 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6641 /* Now verify that the values of GOAL and VALUE remain unaltered
6642 until INSN is reached. */
6651 /* Don't trust the conversion past a function call
6652 if either of the two is in a call-clobbered register, or memory. */
6653 if (GET_CODE (p) == CALL_INSN)
6657 if (goal_mem || need_stable_sp)
6660 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6661 for (i = 0; i < nregs; ++i)
6662 if (call_used_regs[regno + i])
6665 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6666 for (i = 0; i < valuenregs; ++i)
6667 if (call_used_regs[valueno + i])
6669 #ifdef NON_SAVING_SETJMP
6670 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6679 /* Watch out for unspec_volatile, and volatile asms. */
6680 if (volatile_insn_p (pat))
6683 /* If this insn P stores in either GOAL or VALUE, return 0.
6684 If GOAL is a memory ref and this insn writes memory, return 0.
6685 If GOAL is a memory ref and its address is not constant,
6686 and this insn P changes a register used in GOAL, return 0. */
6688 if (GET_CODE (pat) == COND_EXEC)
6689 pat = COND_EXEC_CODE (pat);
6690 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6692 rtx dest = SET_DEST (pat);
6693 while (GET_CODE (dest) == SUBREG
6694 || GET_CODE (dest) == ZERO_EXTRACT
6695 || GET_CODE (dest) == SIGN_EXTRACT
6696 || GET_CODE (dest) == STRICT_LOW_PART)
6697 dest = XEXP (dest, 0);
6698 if (GET_CODE (dest) == REG)
6700 int xregno = REGNO (dest);
6702 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6703 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6706 if (xregno < regno + nregs && xregno + xnregs > regno)
6708 if (xregno < valueno + valuenregs
6709 && xregno + xnregs > valueno)
6711 if (goal_mem_addr_varies
6712 && reg_overlap_mentioned_for_reload_p (dest, goal))
6714 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6717 else if (goal_mem && GET_CODE (dest) == MEM
6718 && ! push_operand (dest, GET_MODE (dest)))
6720 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6721 && reg_equiv_memory_loc[regno] != 0)
6723 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6726 else if (GET_CODE (pat) == PARALLEL)
6729 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6731 rtx v1 = XVECEXP (pat, 0, i);
6732 if (GET_CODE (v1) == COND_EXEC)
6733 v1 = COND_EXEC_CODE (v1);
6734 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6736 rtx dest = SET_DEST (v1);
6737 while (GET_CODE (dest) == SUBREG
6738 || GET_CODE (dest) == ZERO_EXTRACT
6739 || GET_CODE (dest) == SIGN_EXTRACT
6740 || GET_CODE (dest) == STRICT_LOW_PART)
6741 dest = XEXP (dest, 0);
6742 if (GET_CODE (dest) == REG)
6744 int xregno = REGNO (dest);
6746 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6747 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6750 if (xregno < regno + nregs
6751 && xregno + xnregs > regno)
6753 if (xregno < valueno + valuenregs
6754 && xregno + xnregs > valueno)
6756 if (goal_mem_addr_varies
6757 && reg_overlap_mentioned_for_reload_p (dest,
6760 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6763 else if (goal_mem && GET_CODE (dest) == MEM
6764 && ! push_operand (dest, GET_MODE (dest)))
6766 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6767 && reg_equiv_memory_loc[regno] != 0)
6769 else if (need_stable_sp
6770 && push_operand (dest, GET_MODE (dest)))
6776 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6780 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6781 link = XEXP (link, 1))
6783 pat = XEXP (link, 0);
6784 if (GET_CODE (pat) == CLOBBER)
6786 rtx dest = SET_DEST (pat);
6788 if (GET_CODE (dest) == REG)
6790 int xregno = REGNO (dest);
6792 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6794 if (xregno < regno + nregs
6795 && xregno + xnregs > regno)
6797 else if (xregno < valueno + valuenregs
6798 && xregno + xnregs > valueno)
6800 else if (goal_mem_addr_varies
6801 && reg_overlap_mentioned_for_reload_p (dest,
6806 else if (goal_mem && GET_CODE (dest) == MEM
6807 && ! push_operand (dest, GET_MODE (dest)))
6809 else if (need_stable_sp
6810 && push_operand (dest, GET_MODE (dest)))
6817 /* If this insn auto-increments or auto-decrements
6818 either regno or valueno, return 0 now.
6819 If GOAL is a memory ref and its address is not constant,
6820 and this insn P increments a register used in GOAL, return 0. */
6824 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6825 if (REG_NOTE_KIND (link) == REG_INC
6826 && GET_CODE (XEXP (link, 0)) == REG)
6828 int incno = REGNO (XEXP (link, 0));
6829 if (incno < regno + nregs && incno >= regno)
6831 if (incno < valueno + valuenregs && incno >= valueno)
6833 if (goal_mem_addr_varies
6834 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6844 /* Find a place where INCED appears in an increment or decrement operator
6845 within X, and return the amount INCED is incremented or decremented by.
6846 The value is always positive. */
6849 find_inc_amount (rtx x, rtx inced)
6851 enum rtx_code code = GET_CODE (x);
6857 rtx addr = XEXP (x, 0);
6858 if ((GET_CODE (addr) == PRE_DEC
6859 || GET_CODE (addr) == POST_DEC
6860 || GET_CODE (addr) == PRE_INC
6861 || GET_CODE (addr) == POST_INC)
6862 && XEXP (addr, 0) == inced)
6863 return GET_MODE_SIZE (GET_MODE (x));
6864 else if ((GET_CODE (addr) == PRE_MODIFY
6865 || GET_CODE (addr) == POST_MODIFY)
6866 && GET_CODE (XEXP (addr, 1)) == PLUS
6867 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6868 && XEXP (addr, 0) == inced
6869 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6871 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6872 return i < 0 ? -i : i;
6876 fmt = GET_RTX_FORMAT (code);
6877 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6881 int tem = find_inc_amount (XEXP (x, i), inced);
6888 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6890 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6900 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6901 If SETS is nonzero, also consider SETs. */
6904 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
6907 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6908 unsigned int endregno = regno + nregs;
6910 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6911 || (sets && GET_CODE (PATTERN (insn)) == SET))
6912 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6914 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6916 return test >= regno && test < endregno;
6919 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6921 int i = XVECLEN (PATTERN (insn), 0) - 1;
6925 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6926 if ((GET_CODE (elt) == CLOBBER
6927 || (sets && GET_CODE (PATTERN (insn)) == SET))
6928 && GET_CODE (XEXP (elt, 0)) == REG)
6930 unsigned int test = REGNO (XEXP (elt, 0));
6932 if (test >= regno && test < endregno)
6941 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
6943 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
6947 if (GET_MODE (reloadreg) == mode)
6950 regno = REGNO (reloadreg);
6952 if (WORDS_BIG_ENDIAN)
6953 regno += HARD_REGNO_NREGS (regno, GET_MODE (reloadreg))
6954 - HARD_REGNO_NREGS (regno, mode);
6956 return gen_rtx_REG (mode, regno);
6959 static const char *const reload_when_needed_name[] =
6962 "RELOAD_FOR_OUTPUT",
6964 "RELOAD_FOR_INPUT_ADDRESS",
6965 "RELOAD_FOR_INPADDR_ADDRESS",
6966 "RELOAD_FOR_OUTPUT_ADDRESS",
6967 "RELOAD_FOR_OUTADDR_ADDRESS",
6968 "RELOAD_FOR_OPERAND_ADDRESS",
6969 "RELOAD_FOR_OPADDR_ADDR",
6971 "RELOAD_FOR_OTHER_ADDRESS"
6974 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6976 /* These functions are used to print the variables set by 'find_reloads' */
6979 debug_reload_to_stream (FILE *f)
6986 for (r = 0; r < n_reloads; r++)
6988 fprintf (f, "Reload %d: ", r);
6992 fprintf (f, "reload_in (%s) = ",
6993 GET_MODE_NAME (rld[r].inmode));
6994 print_inline_rtx (f, rld[r].in, 24);
6995 fprintf (f, "\n\t");
6998 if (rld[r].out != 0)
7000 fprintf (f, "reload_out (%s) = ",
7001 GET_MODE_NAME (rld[r].outmode));
7002 print_inline_rtx (f, rld[r].out, 24);
7003 fprintf (f, "\n\t");
7006 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7008 fprintf (f, "%s (opnum = %d)",
7009 reload_when_needed_name[(int) rld[r].when_needed],
7012 if (rld[r].optional)
7013 fprintf (f, ", optional");
7015 if (rld[r].nongroup)
7016 fprintf (f, ", nongroup");
7018 if (rld[r].inc != 0)
7019 fprintf (f, ", inc by %d", rld[r].inc);
7021 if (rld[r].nocombine)
7022 fprintf (f, ", can't combine");
7024 if (rld[r].secondary_p)
7025 fprintf (f, ", secondary_reload_p");
7027 if (rld[r].in_reg != 0)
7029 fprintf (f, "\n\treload_in_reg: ");
7030 print_inline_rtx (f, rld[r].in_reg, 24);
7033 if (rld[r].out_reg != 0)
7035 fprintf (f, "\n\treload_out_reg: ");
7036 print_inline_rtx (f, rld[r].out_reg, 24);
7039 if (rld[r].reg_rtx != 0)
7041 fprintf (f, "\n\treload_reg_rtx: ");
7042 print_inline_rtx (f, rld[r].reg_rtx, 24);
7046 if (rld[r].secondary_in_reload != -1)
7048 fprintf (f, "%ssecondary_in_reload = %d",
7049 prefix, rld[r].secondary_in_reload);
7053 if (rld[r].secondary_out_reload != -1)
7054 fprintf (f, "%ssecondary_out_reload = %d\n",
7055 prefix, rld[r].secondary_out_reload);
7058 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7060 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7061 insn_data[rld[r].secondary_in_icode].name);
7065 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7066 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7067 insn_data[rld[r].secondary_out_icode].name);
7076 debug_reload_to_stream (stderr);