sys/dev/netif/ipw/if_ipw.c

   1 /*-
   2  * Copyright (c) 2004, 2005
   3  *      Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice unmodified, this list of conditions, and the following
  10  *    disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  *
  28  * $Id: if_ipw.c,v 1.7.2.1 2005/01/13 20:01:03 damien Exp $
  29  * $DragonFly: src/sys/dev/netif/ipw/Attic/if_ipw.c,v 1.13 2005/12/31 14:07:59 sephe Exp $
  30  */
  31
  32 /*-
  33  * Intel(R) PRO/Wireless 2100 MiniPCI driver
  34  * http://www.intel.com/network/connectivity/products/wireless/prowireless_mobile.htm
  35  */
  36
  37 #include <sys/param.h>
  38 #include <sys/sysctl.h>
  39 #include <sys/sockio.h>
  40 #include <sys/mbuf.h>
  41 #include <sys/kernel.h>
  42 #include <sys/socket.h>
  43 #include <sys/systm.h>
  44 #include <sys/malloc.h>
  45 #include <sys/module.h>
  46 #include <sys/bus.h>
  47 #include <sys/endian.h>
  48 #include <sys/proc.h>
  49 #include <sys/ucred.h>
  50 #include <sys/serialize.h>
  51 #include <sys/thread2.h>
  52
  53 #include <machine/bus.h>
  54 #include <machine/resource.h>
  55 #include <machine/clock.h>
  56 #include <sys/rman.h>
  57
  58 #include <bus/pci/pcireg.h>
  59 #include <bus/pci/pcivar.h>
  60
  61 #include <net/bpf.h>
  62 #include <net/if.h>
  63 #include <net/if_arp.h>
  64 #include <net/ethernet.h>
  65 #include <net/if_dl.h>
  66 #include <net/if_media.h>
  67 #include <net/if_types.h>
  68 #include <net/ifq_var.h>
  69
  70 #include <netinet/in.h>
  71 #include <netinet/in_systm.h>
  72 #include <netinet/in_var.h>
  73 #include <netinet/ip.h>
  74 #include <netinet/if_ether.h>
  75
  76 #include <netproto/802_11/ieee80211_var.h>
  77 #include <netproto/802_11/ieee80211_ioctl.h>
  78 #include <netproto/802_11/ieee80211_radiotap.h>
  79 #include <netproto/802_11/if_wavelan_ieee.h>
  80
  81 #include "if_ipwreg.h"
  82 #include "if_ipwvar.h"
  83
  84 #ifdef IPW_DEBUG
  85 #define DPRINTF(x)      if (ipw_debug > 0) printf x
  86 #define DPRINTFN(n, x)  if (ipw_debug >= (n)) printf x
  87 int ipw_debug = 0;
  88 SYSCTL_INT(_debug, OID_AUTO, ipw, CTLFLAG_RW, &ipw_debug, 0, "ipw debug level");
  89 #else
  90 #define DPRINTF(x)
  91 #define DPRINTFN(n, x)
  92 #endif
  93
  94 MODULE_DEPEND(ipw, pci,  1, 1, 1);
  95 MODULE_DEPEND(ipw, wlan, 1, 1, 1);
  96
  97 struct ipw_ident {
  98         u_int16_t       vendor;
  99         u_int16_t       device;
 100         const char      *name;
 101 };
 102
 103 static const struct ipw_ident ipw_ident_table[] = {
 104         { 0x8086, 0x1043, "Intel(R) PRO/Wireless 2100 MiniPCI" },
 105
 106         { 0, 0, NULL }
 107 };
 108
 109 static const struct ieee80211_rateset ipw_rateset_11b =
 110         { 4, { 2, 4, 11, 22 } };
 111
 112 static int              ipw_dma_alloc(device_t);
 113 static void             ipw_release(struct ipw_softc *);
 114 static int              ipw_media_change(struct ifnet *);
 115 static void             ipw_media_status(struct ifnet *, struct ifmediareq *);
 116 static int              ipw_newstate(struct ieee80211com *,
 117                             enum ieee80211_state, int);
 118 static u_int16_t        ipw_read_prom_word(struct ipw_softc *, u_int8_t);
 119 static void             ipw_command_intr(struct ipw_softc *,
 120                             struct ipw_soft_buf *);
 121 static void             ipw_newstate_intr(struct ipw_softc *,
 122                             struct ipw_soft_buf *);
 123 static void             ipw_data_intr(struct ipw_softc *, struct ipw_status *,
 124                             struct ipw_soft_bd *, struct ipw_soft_buf *);
 125 static void             ipw_notification_intr(struct ipw_softc *,
 126                             struct ipw_soft_buf *);
 127 static void             ipw_rx_intr(struct ipw_softc *);
 128 static void             ipw_release_sbd(struct ipw_softc *,
 129                             struct ipw_soft_bd *);
 130 static void             ipw_tx_intr(struct ipw_softc *);
 131 static void             ipw_intr(void *);
 132 static void             ipw_dma_map_txbuf(void *, bus_dma_segment_t *, int,
 133                             bus_size_t, int);
 134 static void             ipw_dma_map_addr(void *, bus_dma_segment_t *, int, int);
 135 static int              ipw_cmd(struct ipw_softc *, u_int32_t, void *,
 136                             u_int32_t);
 137 static int              ipw_tx_start(struct ifnet *, struct mbuf *,
 138                             struct ieee80211_node *);
 139 static void             ipw_start(struct ifnet *);
 140 static void             ipw_watchdog(struct ifnet *);
 141 static int              ipw_ioctl(struct ifnet *, u_long, caddr_t,
 142                                 struct ucred *cr);
 143 static void             ipw_stop_master(struct ipw_softc *);
 144 static int              ipw_reset(struct ipw_softc *);
 145 static int              ipw_load_ucode(struct ipw_softc *, u_char *, int);
 146 static int              ipw_load_firmware(struct ipw_softc *, u_char *, int);
 147 static int              ipw_cache_firmware(struct ipw_softc *, void *);
 148 static void             ipw_free_firmware(struct ipw_softc *);
 149 static int              ipw_config(struct ipw_softc *);
 150 static void             ipw_init(void *);
 151 static void             ipw_stop(void *);
 152 static int              ipw_sysctl_stats(SYSCTL_HANDLER_ARGS);
 153 static int              ipw_sysctl_radio(SYSCTL_HANDLER_ARGS);
 154 static u_int32_t        ipw_read_table1(struct ipw_softc *, u_int32_t);
 155 static void             ipw_write_table1(struct ipw_softc *, u_int32_t,
 156                             u_int32_t);
 157 static int              ipw_read_table2(struct ipw_softc *, u_int32_t, void *,
 158                             u_int32_t *);
 159 static void             ipw_read_mem_1(struct ipw_softc *, bus_size_t,
 160                             u_int8_t *, bus_size_t);
 161 static void             ipw_write_mem_1(struct ipw_softc *, bus_size_t,
 162                             u_int8_t *, bus_size_t);
 163
 164 static __inline u_int8_t MEM_READ_1(struct ipw_softc *sc, u_int32_t addr)
 165 {
 166         CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
 167         return CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA);
 168 }
 169
 170 static __inline u_int32_t MEM_READ_4(struct ipw_softc *sc, u_int32_t addr)
 171 {
 172         CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
 173         return CSR_READ_4(sc, IPW_CSR_INDIRECT_DATA);
 174 }
 175
 176 static int ipw_probe(device_t);
 177 static int ipw_attach(device_t);
 178 static int ipw_detach(device_t);
 179 static int ipw_shutdown(device_t);
 180 static int ipw_suspend(device_t);
 181 static int ipw_resume(device_t);
 182
 183 static device_method_t ipw_methods[] = {
 184         /* Device interface */
 185         DEVMETHOD(device_probe,         ipw_probe),
 186         DEVMETHOD(device_attach,        ipw_attach),
 187         DEVMETHOD(device_detach,        ipw_detach),
 188         DEVMETHOD(device_shutdown,      ipw_shutdown),
 189         DEVMETHOD(device_suspend,       ipw_suspend),
 190         DEVMETHOD(device_resume,        ipw_resume),
 191
 192         { 0, 0 }
 193 };
 194
 195 static DEFINE_CLASS_0(ipw, ipw_driver, ipw_methods, sizeof(struct ipw_softc));
 196 static devclass_t ipw_devclass;
 197
 198 DRIVER_MODULE(ipw, pci, ipw_driver, ipw_devclass, 0, 0);
 199
 200 static int
 201 ipw_probe(device_t dev)
 202 {
 203         const struct ipw_ident *ident;
 204
 205         for (ident = ipw_ident_table; ident->name != NULL; ident++) {
 206                 if (pci_get_vendor(dev) == ident->vendor &&
 207                     pci_get_device(dev) == ident->device) {
 208                         device_set_desc(dev, ident->name);
 209                         return 0;
 210                 }
 211         }
 212         return ENXIO;
 213 }
 214
 215 /* Base Address Register */
 216 #define IPW_PCI_BAR0    0x10
 217
 218 static int
 219 ipw_attach(device_t dev)
 220 {
 221         struct ipw_softc *sc = device_get_softc(dev);
 222         struct ieee80211com *ic = &sc->sc_ic;
 223         struct ifnet *ifp = &ic->ic_if;
 224         struct sysctl_oid *sysctl_tree;
 225         u_int16_t val;
 226         int error, rid, i;
 227
 228         if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
 229                 device_printf(dev, "chip is in D%d power mode "
 230                     "-- setting to D0\n", pci_get_powerstate(dev));
 231                 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
 232         }
 233
 234         pci_write_config(dev, 0x41, 0, 1);
 235
 236         /* enable bus-mastering */
 237         pci_enable_busmaster(dev);
 238
 239         /* map the register window */
 240         rid = IPW_PCI_BAR0;
 241         sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
 242         if (sc->mem == NULL) {
 243                 device_printf(dev, "could not allocate memory resource\n");
 244                 goto fail;
 245         }
 246
 247         sc->sc_st = rman_get_bustag(sc->mem);
 248         sc->sc_sh = rman_get_bushandle(sc->mem);
 249
 250         rid = 0;
 251         sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
 252             RF_SHAREABLE);
 253         if (sc->irq == NULL) {
 254                 device_printf(dev, "could not allocate interrupt resource\n");
 255                 goto fail;
 256         }
 257
 258         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 259
 260         if (ipw_reset(sc) != 0) {
 261                 device_printf(dev, "could not reset adapter\n");
 262                 goto fail;
 263         }
 264
 265         sysctl_ctx_init(&sc->sysctl_ctx);
 266         sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
 267                 SYSCTL_STATIC_CHILDREN(_hw),
 268                 OID_AUTO,
 269                 device_get_nameunit(dev),
 270                 CTLFLAG_RD,
 271                 0, "");
 272
 273         if (ipw_dma_alloc(dev) != 0) {
 274                 device_printf(dev, "could not allocate DMA resources\n");
 275                 goto fail;
 276         }
 277
 278         ic->ic_phytype = IEEE80211_T_DS;
 279         ic->ic_opmode = IEEE80211_M_STA;
 280         ic->ic_state = IEEE80211_S_INIT;
 281
 282         /* set device capabilities */
 283        ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT |
 284            IEEE80211_C_PMGT | IEEE80211_C_IBSS | IEEE80211_C_MONITOR |
 285            IEEE80211_C_WEP;
 286
 287         /* read MAC address from EEPROM */
 288         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0);
 289         ic->ic_myaddr[0] = val >> 8;
 290         ic->ic_myaddr[1] = val & 0xff;
 291         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1);
 292         ic->ic_myaddr[2] = val >> 8;
 293         ic->ic_myaddr[3] = val & 0xff;
 294         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2);
 295         ic->ic_myaddr[4] = val >> 8;
 296         ic->ic_myaddr[5] = val & 0xff;
 297
 298         /* set supported .11b rates */
 299         ic->ic_sup_rates[IEEE80211_MODE_11B] = ipw_rateset_11b;
 300
 301         /* set supported .11b channels (read from EEPROM) */
 302         if ((val = ipw_read_prom_word(sc, IPW_EEPROM_CHANNEL_LIST)) == 0)
 303                 val = 0x7ff; /* default to channels 1-11 */
 304         val <<= 1;
 305         for (i = 1; i < 16; i++) {
 306                 if (val & (1 << i)) {
 307                         ic->ic_channels[i].ic_freq =
 308                             ieee80211_ieee2mhz(i, IEEE80211_CHAN_B);
 309                         ic->ic_channels[i].ic_flags = IEEE80211_CHAN_B;
 310                 }
 311         }
 312
 313         /* check support for radio transmitter switch in EEPROM */
 314         if (!(ipw_read_prom_word(sc, IPW_EEPROM_RADIO) & 8))
 315                 sc->flags |= IPW_FLAG_HAS_RADIO_SWITCH;
 316
 317         /* default to authmode OPEN */
 318         sc->authmode = IEEE80211_AUTH_OPEN;
 319
 320         /* IBSS channel undefined for now */
 321         ic->ic_ibss_chan = &ic->ic_channels[0];
 322
 323         ifp->if_softc = sc;
 324         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 325         ifp->if_init = ipw_init;
 326         ifp->if_ioctl = ipw_ioctl;
 327         ifp->if_start = ipw_start;
 328         ifp->if_watchdog = ipw_watchdog;
 329         ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
 330         ifq_set_ready(&ifp->if_snd);
 331
 332         ieee80211_ifattach(ifp);
 333         /* override state transition machine */
 334         sc->sc_newstate = ic->ic_newstate;
 335         ic->ic_newstate = ipw_newstate;
 336         ieee80211_media_init(ifp, ipw_media_change, ipw_media_status);
 337
 338         bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
 339             sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
 340
 341         sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
 342         sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
 343         sc->sc_rxtap.wr_ihdr.it_present = htole32(IPW_RX_RADIOTAP_PRESENT);
 344
 345         sc->sc_txtap_len = sizeof sc->sc_txtapu;
 346         sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
 347         sc->sc_txtap.wt_ihdr.it_present = htole32(IPW_TX_RADIOTAP_PRESENT);
 348
 349         SYSCTL_ADD_PROC(&sc->sysctl_ctx,
 350             SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "radio",
 351             CTLTYPE_INT | CTLFLAG_RD, sc, 0, ipw_sysctl_radio, "I",
 352             "Radio transmitter switch");
 353
 354         SYSCTL_ADD_PROC(&sc->sysctl_ctx,
 355             SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "stats",
 356             CTLTYPE_OPAQUE | CTLFLAG_RD, sc, 0, ipw_sysctl_stats, "S",
 357             "Statistics");
 358
 359         /*
 360          * Hook our interrupt after all initialization is complete
 361          */
 362         error = bus_setup_intr(dev, sc->irq, INTR_MPSAFE,
 363                                ipw_intr, sc, &sc->sc_ih, ifp->if_serializer);
 364         if (error != 0) {
 365                 device_printf(dev, "could not set up interrupt\n");
 366                 bpfdetach(ifp);
 367                 ieee80211_ifdetach(ifp);
 368                 goto fail;
 369         }
 370
 371         return 0;
 372
 373 fail:
 374         ipw_detach(dev);
 375         return ENXIO;
 376 }
 377
 378 static int
 379 ipw_detach(device_t dev)
 380 {
 381         struct ipw_softc *sc = device_get_softc(dev);
 382         struct ifnet *ifp = &sc->sc_ic.ic_if;
 383
 384         if (device_is_attached(dev)) {
 385                 lwkt_serialize_enter(ifp->if_serializer);
 386                 ipw_stop(sc);
 387                 ipw_free_firmware(sc);
 388                 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
 389                 lwkt_serialize_exit(ifp->if_serializer);
 390
 391                 bpfdetach(ifp);
 392                 ieee80211_ifdetach(ifp);
 393         }
 394
 395         ipw_release(sc);
 396
 397         if (sc->irq != NULL)
 398                 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
 399
 400         if (sc->mem != NULL) {
 401                 bus_release_resource(dev, SYS_RES_MEMORY, IPW_PCI_BAR0,
 402                                      sc->mem);
 403         }
 404
 405         sysctl_ctx_free(&sc->sysctl_ctx);
 406
 407         return 0;
 408 }
 409
 410 static int
 411 ipw_dma_alloc(device_t dev)
 412 {
 413         struct ipw_soft_bd *sbd;
 414         struct ipw_soft_hdr *shdr;
 415         struct ipw_soft_buf *sbuf;
 416         bus_addr_t physaddr;
 417         int error, i;
 418         struct ipw_softc *sc;
 419
 420         sc = device_get_softc(dev);
 421         /*
 422          * Allocate and map tx ring
 423          */
 424         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 425             BUS_SPACE_MAXADDR, NULL, NULL, IPW_TBD_SZ, 1, IPW_TBD_SZ, 0,
 426             &sc->tbd_dmat);
 427         if (error != 0) {
 428                 device_printf(dev, "could not create tx ring DMA tag\n");
 429                 goto fail;
 430         }
 431
 432         error = bus_dmamem_alloc(sc->tbd_dmat, (void **)&sc->tbd_list,
 433             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->tbd_map);
 434         if (error != 0) {
 435                 device_printf(dev, "could not allocate tx ring DMA memory\n");
 436                 goto fail;
 437         }
 438
 439         error = bus_dmamap_load(sc->tbd_dmat, sc->tbd_map, sc->tbd_list,
 440             IPW_TBD_SZ, ipw_dma_map_addr, &sc->tbd_phys, 0);
 441         if (error != 0) {
 442                 device_printf(dev, "could not map tx ring DMA memory\n");
 443                 goto fail;
 444         }
 445
 446         /*
 447          * Allocate and map rx ring
 448          */
 449         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 450             BUS_SPACE_MAXADDR, NULL, NULL, IPW_RBD_SZ, 1, IPW_RBD_SZ, 0,
 451             &sc->rbd_dmat);
 452         if (error != 0) {
 453                 device_printf(dev, "could not create rx ring DMA tag\n");
 454                 goto fail;
 455         }
 456
 457         error = bus_dmamem_alloc(sc->rbd_dmat, (void **)&sc->rbd_list,
 458             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->rbd_map);
 459         if (error != 0) {
 460                 device_printf(dev, "could not allocate rx ring DMA memory\n");
 461                 goto fail;
 462         }
 463
 464         error = bus_dmamap_load(sc->rbd_dmat, sc->rbd_map, sc->rbd_list,
 465             IPW_RBD_SZ, ipw_dma_map_addr, &sc->rbd_phys, 0);
 466         if (error != 0) {
 467                 device_printf(dev, "could not map rx ring DMA memory\n");
 468                 goto fail;
 469         }
 470
 471         /*
 472          * Allocate and map status ring
 473          */
 474         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 475             BUS_SPACE_MAXADDR, NULL, NULL, IPW_STATUS_SZ, 1, IPW_STATUS_SZ, 0,
 476             &sc->status_dmat);
 477         if (error != 0) {
 478                 device_printf(dev, "could not create status ring DMA tag\n");
 479                 goto fail;
 480         }
 481
 482         error = bus_dmamem_alloc(sc->status_dmat, (void **)&sc->status_list,
 483             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->status_map);
 484         if (error != 0) {
 485                 device_printf(dev,
 486                     "could not allocate status ring DMA memory\n");
 487                 goto fail;
 488         }
 489
 490         error = bus_dmamap_load(sc->status_dmat, sc->status_map,
 491             sc->status_list, IPW_STATUS_SZ, ipw_dma_map_addr, &sc->status_phys,
 492             0);
 493         if (error != 0) {
 494                 device_printf(dev, "could not map status ring DMA memory\n");
 495                 goto fail;
 496         }
 497
 498         /*
 499          * Allocate command DMA map
 500          */
 501         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 502             BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_cmd), 1,
 503             sizeof (struct ipw_cmd), 0, &sc->cmd_dmat);
 504         if (error != 0) {
 505                 device_printf(dev, "could not create command DMA tag\n");
 506                 goto fail;
 507         }
 508
 509         error = bus_dmamap_create(sc->cmd_dmat, 0, &sc->cmd_map);
 510         if (error != 0) {
 511                 device_printf(dev, "could not create command DMA map\n");
 512                 goto fail;
 513         }
 514
 515         /*
 516          * Allocate headers DMA maps
 517          */
 518         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 519             BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_hdr), 1,
 520             sizeof (struct ipw_hdr), 0, &sc->hdr_dmat);
 521         if (error != 0) {
 522                 device_printf(dev, "could not create header DMA tag\n");
 523                 goto fail;
 524         }
 525
 526         SLIST_INIT(&sc->free_shdr);
 527         for (i = 0; i < IPW_NDATA; i++) {
 528                 shdr = &sc->shdr_list[i];
 529                 error = bus_dmamap_create(sc->hdr_dmat, 0, &shdr->map);
 530                 if (error != 0) {
 531                         device_printf(dev, "could not create header DMA map\n");
 532                         goto fail;
 533                 }
 534                 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
 535         }
 536
 537         /*
 538          * Allocate tx buffers DMA maps
 539          */
 540         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 541             BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_MAX_NSEG, MCLBYTES, 0,
 542             &sc->txbuf_dmat);
 543         if (error != 0) {
 544                 device_printf(dev, "could not create tx DMA tag\n");
 545                 goto fail;
 546         }
 547
 548         SLIST_INIT(&sc->free_sbuf);
 549         for (i = 0; i < IPW_NDATA; i++) {
 550                 sbuf = &sc->tx_sbuf_list[i];
 551                 error = bus_dmamap_create(sc->txbuf_dmat, 0, &sbuf->map);
 552                 if (error != 0) {
 553                         device_printf(dev, "could not create tx DMA map\n");
 554                         goto fail;
 555                 }
 556                 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
 557         }
 558
 559         /*
 560          * Initialize tx ring
 561          */
 562         for (i = 0; i < IPW_NTBD; i++) {
 563                 sbd = &sc->stbd_list[i];
 564                 sbd->bd = &sc->tbd_list[i];
 565                 sbd->type = IPW_SBD_TYPE_NOASSOC;
 566         }
 567
 568         /*
 569          * Pre-allocate rx buffers and DMA maps
 570          */
 571         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 572             BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_NRBD, MCLBYTES, 0,
 573             &sc->rxbuf_dmat);
 574         if (error != 0) {
 575                 device_printf(dev, "could not create rx DMA tag\n");
 576                 goto fail;
 577         }
 578
 579         for (i = 0; i < IPW_NRBD; i++) {
 580                 sbd = &sc->srbd_list[i];
 581                 sbuf = &sc->rx_sbuf_list[i];
 582                 sbd->bd = &sc->rbd_list[i];
 583
 584                 sbuf->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
 585                 if (sbuf->m == NULL) {
 586                         device_printf(dev, "could not allocate rx mbuf\n");
 587                         error = ENOMEM;
 588                         goto fail;
 589                 }
 590
 591                 error = bus_dmamap_create(sc->rxbuf_dmat, 0, &sbuf->map);
 592                 if (error != 0) {
 593                         device_printf(dev, "could not create rx DMA map\n");
 594                         goto fail;
 595                 }
 596
 597                 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map,
 598                     mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr,
 599                     &physaddr, 0);
 600                 if (error != 0) {
 601                         device_printf(dev, "could not map rx DMA memory\n");
 602                         goto fail;
 603                 }
 604
 605                 sbd->type = IPW_SBD_TYPE_DATA;
 606                 sbd->priv = sbuf;
 607                 sbd->bd->physaddr = htole32(physaddr);
 608                 sbd->bd->len = htole32(MCLBYTES);
 609         }
 610
 611         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
 612
 613         return 0;
 614
 615 fail:   ipw_release(sc);
 616         return error;
 617 }
 618
 619 static void
 620 ipw_release(struct ipw_softc *sc)
 621 {
 622         struct ipw_soft_buf *sbuf;
 623         int i;
 624
 625         if (sc->tbd_dmat != NULL) {
 626                 if (sc->stbd_list != NULL) {
 627                         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map,
 628                             BUS_DMASYNC_POSTWRITE);
 629                         bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map);
 630                         bus_dmamem_free(sc->tbd_dmat, sc->tbd_list,
 631                             sc->tbd_map);
 632                 }
 633                 bus_dma_tag_destroy(sc->tbd_dmat);
 634         }
 635
 636         if (sc->rbd_dmat != NULL) {
 637                 if (sc->rbd_list != NULL) {
 638                         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map,
 639                             BUS_DMASYNC_POSTWRITE);
 640                         bus_dmamap_unload(sc->rbd_dmat, sc->rbd_map);
 641                         bus_dmamem_free(sc->rbd_dmat, sc->rbd_list,
 642                             sc->rbd_map);
 643                 }
 644                 bus_dma_tag_destroy(sc->rbd_dmat);
 645         }
 646
 647         if (sc->status_dmat != NULL) {
 648                 if (sc->status_list != NULL) {
 649                         bus_dmamap_sync(sc->status_dmat, sc->status_map,
 650                             BUS_DMASYNC_POSTWRITE);
 651                         bus_dmamap_unload(sc->status_dmat, sc->status_map);
 652                         bus_dmamem_free(sc->status_dmat, sc->status_list,
 653                             sc->status_map);
 654                 }
 655                 bus_dma_tag_destroy(sc->status_dmat);
 656         }
 657
 658         for (i = 0; i < IPW_NTBD; i++)
 659                 ipw_release_sbd(sc, &sc->stbd_list[i]);
 660
 661         if (sc->cmd_dmat != NULL) {
 662                 bus_dmamap_destroy(sc->cmd_dmat, sc->cmd_map);
 663                 bus_dma_tag_destroy(sc->cmd_dmat);
 664         }
 665
 666         if (sc->hdr_dmat != NULL) {
 667                 for (i = 0; i < IPW_NDATA; i++)
 668                         bus_dmamap_destroy(sc->hdr_dmat, sc->shdr_list[i].map);
 669                 bus_dma_tag_destroy(sc->hdr_dmat);
 670         }
 671
 672         if (sc->txbuf_dmat != NULL) {
 673                 for (i = 0; i < IPW_NDATA; i++) {
 674                         bus_dmamap_destroy(sc->txbuf_dmat,
 675                             sc->tx_sbuf_list[i].map);
 676                 }
 677                 bus_dma_tag_destroy(sc->txbuf_dmat);
 678         }
 679
 680         if (sc->rxbuf_dmat != NULL) {
 681                 for (i = 0; i < IPW_NRBD; i++) {
 682                         sbuf = &sc->rx_sbuf_list[i];
 683                         if (sbuf->m != NULL) {
 684                                 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map,
 685                                     BUS_DMASYNC_POSTREAD);
 686                                 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
 687                                 m_freem(sbuf->m);
 688                         }
 689                         bus_dmamap_destroy(sc->rxbuf_dmat, sbuf->map);
 690                 }
 691                 bus_dma_tag_destroy(sc->rxbuf_dmat);
 692         }
 693 }
 694
 695 static int
 696 ipw_shutdown(device_t dev)
 697 {
 698         struct ipw_softc *sc = device_get_softc(dev);
 699         struct ifnet *ifp = &sc->sc_ic.ic_if;
 700
 701         lwkt_serialize_enter(ifp->if_serializer);
 702         ipw_stop(sc);
 703         lwkt_serialize_exit(ifp->if_serializer);
 704
 705         return 0;
 706 }
 707
 708 static int
 709 ipw_suspend(device_t dev)
 710 {
 711         struct ipw_softc *sc = device_get_softc(dev);
 712         struct ifnet *ifp = &sc->sc_ic.ic_if;
 713
 714         lwkt_serialize_enter(ifp->if_serializer);
 715         ipw_stop(sc);
 716         lwkt_serialize_exit(ifp->if_serializer);
 717
 718         return 0;
 719 }
 720
 721 static int
 722 ipw_resume(device_t dev)
 723 {
 724         struct ipw_softc *sc = device_get_softc(dev);
 725         struct ifnet *ifp = &sc->sc_ic.ic_if;
 726
 727         lwkt_serialize_enter(ifp->if_serializer);
 728         pci_write_config(dev, 0x41, 0, 1);
 729
 730         if (ifp->if_flags & IFF_UP) {
 731                 ifp->if_init(ifp->if_softc);
 732                 if (ifp->if_flags & IFF_RUNNING)
 733                         ifp->if_start(ifp);
 734         }
 735         lwkt_serialize_exit(ifp->if_serializer);
 736
 737         return 0;
 738 }
 739
 740 static int
 741 ipw_media_change(struct ifnet *ifp)
 742 {
 743         struct ipw_softc *sc = ifp->if_softc;
 744         int error;
 745
 746         error = ieee80211_media_change(ifp);
 747         if (error != ENETRESET)
 748                 return error;
 749
 750         if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
 751                 ipw_init(sc);
 752
 753         return 0;
 754 }
 755
 756 static void
 757 ipw_media_status(struct ifnet *ifp, struct ifmediareq *imr)
 758 {
 759         struct ipw_softc *sc = ifp->if_softc;
 760         struct ieee80211com *ic = &sc->sc_ic;
 761 #define N(a)    (sizeof (a) / sizeof (a[0]))
 762         static const struct {
 763                 u_int32_t       val;
 764                 int             rate;
 765         } rates[] = {
 766                 { IPW_RATE_DS1,   2 },
 767                 { IPW_RATE_DS2,   4 },
 768                 { IPW_RATE_DS5,  11 },
 769                 { IPW_RATE_DS11, 22 },
 770         };
 771         u_int32_t val, i;
 772         int rate;
 773
 774         imr->ifm_status = IFM_AVALID;
 775         imr->ifm_active = IFM_IEEE80211;
 776         if (ic->ic_state == IEEE80211_S_RUN)
 777                 imr->ifm_status |= IFM_ACTIVE;
 778
 779         /* read current transmission rate from adapter */
 780         val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE) & 0xf;
 781
 782         /* convert rate to 802.11 rate */
 783         for (i = 0; i < N(rates) && rates[i].val != val; i++);
 784         rate = (i < N(rates)) ? rates[i].rate : 0;
 785
 786         imr->ifm_active |= IFM_IEEE80211_11B;
 787         imr->ifm_active |= ieee80211_rate2media(ic, rate, IEEE80211_MODE_11B);
 788         switch (ic->ic_opmode) {
 789         case IEEE80211_M_STA:
 790                 break;
 791
 792         case IEEE80211_M_IBSS:
 793                 imr->ifm_active |= IFM_IEEE80211_IBSS;
 794                 break;
 795
 796         case IEEE80211_M_MONITOR:
 797                 imr->ifm_active |= IFM_IEEE80211_MONITOR;
 798                 break;
 799
 800         case IEEE80211_M_AHDEMO:
 801         case IEEE80211_M_HOSTAP:
 802                 /* should not get there */
 803                 break;
 804         }
 805 #undef N
 806 }
 807
 808 static int
 809 ipw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg __unused)
 810 {
 811         struct ipw_softc *sc = ic->ic_softc;
 812         struct ieee80211_node *ni = ic->ic_bss;
 813         u_int32_t len;
 814         u_int8_t val;
 815
 816         switch (nstate) {
 817         case IEEE80211_S_RUN:
 818                 len = IEEE80211_NWID_LEN;
 819                 ipw_read_table2(sc, IPW_INFO_CURRENT_SSID, ni->ni_essid, &len);
 820                 ni->ni_esslen = len;
 821
 822                 val = ipw_read_table1(sc, IPW_INFO_CURRENT_CHANNEL);
 823                 ni->ni_chan = &ic->ic_channels[val];
 824
 825                 DELAY(100); /* firmware needs a short delay here */
 826
 827                 len = IEEE80211_ADDR_LEN;
 828                 ipw_read_table2(sc, IPW_INFO_CURRENT_BSSID, ni->ni_bssid, &len);
 829                 IEEE80211_ADDR_COPY(ni->ni_macaddr, ni->ni_bssid);
 830                 break;
 831
 832         case IEEE80211_S_INIT:
 833         case IEEE80211_S_SCAN:
 834         case IEEE80211_S_AUTH:
 835         case IEEE80211_S_ASSOC:
 836                 break;
 837         }
 838
 839         ic->ic_state = nstate;
 840         return 0;
 841 }
 842
 843 /*
 844  * Read 16 bits at address 'addr' from the Microwire EEPROM.
 845  * DON'T PLAY WITH THIS CODE UNLESS YOU KNOW *EXACTLY* WHAT YOU'RE DOING!
 846  */
 847 static u_int16_t
 848 ipw_read_prom_word(struct ipw_softc *sc, u_int8_t addr)
 849 {
 850         u_int32_t tmp;
 851         u_int16_t val;
 852         int n;
 853
 854         /* Clock C once before the first command */
 855         IPW_EEPROM_CTL(sc, 0);
 856         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 857         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 858         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 859
 860         /* Write start bit (1) */
 861         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
 862         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
 863
 864         /* Write READ opcode (10) */
 865         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
 866         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
 867         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 868         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 869
 870         /* Write address A7-A0 */
 871         for (n = 7; n >= 0; n--) {
 872                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
 873                     (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D));
 874                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
 875                     (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D) | IPW_EEPROM_C);
 876         }
 877
 878         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 879
 880         /* Read data Q15-Q0 */
 881         val = 0;
 882         for (n = 15; n >= 0; n--) {
 883                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 884                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 885                 tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL);
 886                 val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n;
 887         }
 888
 889         IPW_EEPROM_CTL(sc, 0);
 890
 891         /* Clear Chip Select and clock C */
 892         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 893         IPW_EEPROM_CTL(sc, 0);
 894         IPW_EEPROM_CTL(sc, IPW_EEPROM_C);
 895
 896         return le16toh(val);
 897 }
 898
 899 static void
 900 ipw_scan_result(struct ipw_softc *sc)
 901 {
 902         struct ieee80211com *ic = &sc->sc_ic;
 903         struct ieee80211_node *ni;
 904         u_int32_t i, cnt, off;
 905         struct ipw_node ap;
 906
 907         /* flush previously seen access points */
 908         ieee80211_free_allnodes(ic);
 909
 910         cnt = ipw_read_table1(sc, IPW_INFO_APS_CNT);
 911         off = ipw_read_table1(sc, IPW_INFO_APS_BASE);
 912
 913         DPRINTF(("Found %u APs\n", cnt));
 914
 915         for (i = 0; i < cnt; i++) {
 916                 ipw_read_mem_1(sc, off, (u_int8_t *)&ap, sizeof ap);
 917                 off += sizeof ap;
 918
 919 #ifdef IPW_DEBUG
 920                 if (ipw_debug >= 2) {
 921                         u_char *p = (u_char *)&ap;
 922                         int j;
 923
 924                         printf("AP%u\n", i);
 925                         for (j = 0; j < sizeof ap; j++)
 926                                 printf("%02x", *p++);
 927                         printf("\n");
 928                 }
 929 #endif
 930
 931                 ni = ieee80211_lookup_node(ic, ap.bssid,
 932                     &ic->ic_channels[ap.chan]);
 933                 if (ni != NULL)
 934                         continue;
 935
 936                 ni = ieee80211_alloc_node(ic, ap.bssid);
 937                 if (ni == NULL)
 938                         return;
 939
 940                 IEEE80211_ADDR_COPY(ni->ni_bssid, ap.bssid);
 941                 ni->ni_rssi = ap.rssi;
 942                 ni->ni_intval = le16toh(ap.intval);
 943                 ni->ni_capinfo = le16toh(ap.capinfo);
 944                 ni->ni_chan = &ic->ic_channels[ap.chan];
 945                 ni->ni_esslen = ap.esslen;
 946                 bcopy(ap.essid, ni->ni_essid, IEEE80211_NWID_LEN);
 947         }
 948 }
 949
 950 static void
 951 ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
 952 {
 953         struct ipw_cmd *cmd;
 954
 955         cmd = mtod(sbuf->m, struct ipw_cmd *);
 956
 957         DPRINTFN(2, ("RX!CMD!%u!%u!%u!%u!%u\n",
 958             le32toh(cmd->type), le32toh(cmd->subtype), le32toh(cmd->seq),
 959             le32toh(cmd->len), le32toh(cmd->status)));
 960
 961         wakeup(sc);
 962 }
 963
 964 static void
 965 ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
 966 {
 967         struct ieee80211com *ic = &sc->sc_ic;
 968         u_int32_t state;
 969
 970         state = le32toh(*mtod(sbuf->m, u_int32_t *));
 971
 972         DPRINTFN(2, ("RX!NEWSTATE!%u\n", state));
 973
 974         switch (state) {
 975         case IPW_STATE_ASSOCIATED:
 976                 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
 977                 break;
 978
 979         case IPW_STATE_SCANNING:
 980                 /* don't leave run state on background scan */
 981                 if (ic->ic_state != IEEE80211_S_RUN)
 982                         ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
 983                 break;
 984
 985         case IPW_STATE_SCAN_COMPLETE:
 986                 ipw_scan_result(sc);
 987                 break;
 988
 989         case IPW_STATE_ASSOCIATION_LOST:
 990                 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
 991                 break;
 992
 993         case IPW_STATE_RADIO_DISABLED:
 994                 sc->sc_ic.ic_if.if_flags &= ~IFF_UP;
 995                 ipw_stop(sc);
 996                 break;
 997         }
 998 }
 999
1000 static void
1001 ipw_data_intr(struct ipw_softc *sc, struct ipw_status *status,
1002     struct ipw_soft_bd *sbd, struct ipw_soft_buf *sbuf)
1003 {
1004         struct ieee80211com *ic = &sc->sc_ic;
1005         struct ifnet *ifp = &ic->ic_if;
1006         struct mbuf *m;
1007         struct ieee80211_frame *wh;
1008         struct ieee80211_node *ni;
1009         bus_addr_t physaddr;
1010         int error;
1011
1012         DPRINTFN(5, ("RX!DATA!%u!%u\n", le32toh(status->len), status->rssi));
1013
1014         if (le32toh(status->len) < sizeof (struct ieee80211_frame_min) ||
1015             le32toh(status->len) > MCLBYTES) {
1016                 if_printf(ifp, "bad frame length\n");
1017                 return;
1018         }
1019
1020         bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
1021
1022         /* Finalize mbuf */
1023         m = sbuf->m;
1024         m->m_pkthdr.rcvif = ifp;
1025         m->m_pkthdr.len = m->m_len = le32toh(status->len);
1026
1027         if (sc->sc_drvbpf != NULL) {
1028                 struct ipw_rx_radiotap_header *tap = &sc->sc_rxtap;
1029
1030                 tap->wr_flags = 0;
1031                 tap->wr_antsignal = status->rssi;
1032                 tap->wr_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq);
1033                 tap->wr_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags);
1034
1035                 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1036         }
1037
1038         wh = mtod(m, struct ieee80211_frame *);
1039
1040         if (ic->ic_opmode != IEEE80211_M_STA) {
1041                 ni = ieee80211_find_node(ic, wh->i_addr2);
1042                 if (ni == NULL)
1043                         ni = ieee80211_ref_node(ic->ic_bss);
1044         } else
1045                 ni = ieee80211_ref_node(ic->ic_bss);
1046
1047         /* Send the frame to the upper layer */
1048         ieee80211_input(ifp, m, ni, status->rssi, 0);
1049
1050         if (ni == ic->ic_bss)
1051                 ieee80211_unref_node(&ni);
1052         else
1053                 ieee80211_free_node(ic, ni);
1054
1055         m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1056         if (m == NULL) {
1057                 if_printf(ifp, "could not allocate rx mbuf\n");
1058                 sbuf->m = NULL;
1059                 return;
1060         }
1061
1062         error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, mtod(m, void *),
1063             MCLBYTES, ipw_dma_map_addr, &physaddr, 0);
1064         if (error != 0) {
1065                 if_printf(ifp, "could not map rx DMA memory\n");
1066                 m_freem(m);
1067                 sbuf->m = NULL;
1068                 return;
1069         }
1070
1071         sbuf->m = m;
1072         sbd->bd->physaddr = htole32(physaddr);
1073 }
1074
1075 static void
1076 ipw_notification_intr(struct ipw_softc *sc __unused, struct ipw_soft_buf *sbuf __unused)
1077 {
1078         DPRINTFN(2, ("RX!NOTIFICATION\n"));
1079 }
1080
1081 static void
1082 ipw_rx_intr(struct ipw_softc *sc)
1083 {
1084         struct ipw_status *status;
1085         struct ipw_soft_bd *sbd;
1086         struct ipw_soft_buf *sbuf;
1087         u_int32_t r, i;
1088
1089         if (!(sc->flags & IPW_FLAG_FW_INITED))
1090                 return;
1091
1092         r = CSR_READ_4(sc, IPW_CSR_RX_READ_INDEX);
1093
1094         bus_dmamap_sync(sc->status_dmat, sc->status_map, BUS_DMASYNC_POSTREAD);
1095
1096         for (i = (sc->rxcur + 1) % IPW_NRBD; i != r; i = (i + 1) % IPW_NRBD) {
1097
1098                 status = &sc->status_list[i];
1099                 sbd = &sc->srbd_list[i];
1100                 sbuf = sbd->priv;
1101
1102                 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map,
1103                     BUS_DMASYNC_POSTREAD);
1104
1105                 switch (le16toh(status->code) & 0xf) {
1106                 case IPW_STATUS_CODE_COMMAND:
1107                         ipw_command_intr(sc, sbuf);
1108                         break;
1109
1110                 case IPW_STATUS_CODE_NEWSTATE:
1111                         ipw_newstate_intr(sc, sbuf);
1112                         break;
1113
1114                 case IPW_STATUS_CODE_DATA_802_3:
1115                 case IPW_STATUS_CODE_DATA_802_11:
1116                         ipw_data_intr(sc, status, sbd, sbuf);
1117                         break;
1118
1119                 case IPW_STATUS_CODE_NOTIFICATION:
1120                         ipw_notification_intr(sc, sbuf);
1121                         break;
1122
1123                 default:
1124                         if_printf(&sc->sc_ic.ic_if, "unknown status code %u\n",
1125                                   le16toh(status->code));
1126                 }
1127
1128                 /* firmware was killed, stop processing received frames */
1129                 if (!(sc->flags & IPW_FLAG_FW_INITED))
1130                         return;
1131
1132                 sbd->bd->flags = 0;
1133         }
1134         /* Some buffer descriptors may have changed */
1135         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
1136
1137         /* Tell the firmware what we have processed */
1138         sc->rxcur = (r == 0) ? IPW_NRBD - 1 : r - 1;
1139         CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, sc->rxcur);
1140 }
1141
1142 static void
1143 ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd)
1144 {
1145         struct ieee80211com *ic = &sc->sc_ic;
1146         struct ipw_soft_hdr *shdr;
1147         struct ipw_soft_buf *sbuf;
1148
1149         switch (sbd->type) {
1150         case IPW_SBD_TYPE_COMMAND:
1151                 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map,
1152                     BUS_DMASYNC_POSTWRITE);
1153                 bus_dmamap_unload(sc->cmd_dmat, sc->cmd_map);
1154                 break;
1155
1156         case IPW_SBD_TYPE_HEADER:
1157                 shdr = sbd->priv;
1158                 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_POSTWRITE);
1159                 bus_dmamap_unload(sc->hdr_dmat, shdr->map);
1160                 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
1161                 break;
1162
1163         case IPW_SBD_TYPE_DATA:
1164                 sbuf = sbd->priv;
1165                 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map,
1166                     BUS_DMASYNC_POSTWRITE);
1167                 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1168                 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
1169
1170                 m_freem(sbuf->m);
1171
1172                 if (sbuf->ni != NULL && sbuf->ni != ic->ic_bss)
1173                         ieee80211_free_node(ic, sbuf->ni);
1174
1175                 /* kill watchdog timer */
1176                 sc->sc_tx_timer = 0;
1177                 break;
1178         }
1179         sbd->type = IPW_SBD_TYPE_NOASSOC;
1180 }
1181
1182 static void
1183 ipw_tx_intr(struct ipw_softc *sc)
1184 {
1185         struct ifnet *ifp = &sc->sc_ic.ic_if;
1186         u_int32_t r, i;
1187
1188         if (!(sc->flags & IPW_FLAG_FW_INITED))
1189                 return;
1190
1191         r = CSR_READ_4(sc, IPW_CSR_TX_READ_INDEX);
1192
1193         for (i = (sc->txold + 1) % IPW_NTBD; i != r; i = (i + 1) % IPW_NTBD) {
1194                 ipw_release_sbd(sc, &sc->stbd_list[i]);
1195                 sc->txfree++;
1196         }
1197
1198         /* Remember what the firmware has processed */
1199         sc->txold = (r == 0) ? IPW_NTBD - 1 : r - 1;
1200
1201         /* Call start() since some buffer descriptors have been released */
1202         ifp->if_flags &= ~IFF_OACTIVE;
1203         (*ifp->if_start)(ifp);
1204 }
1205
1206 static void
1207 ipw_intr(void *arg)
1208 {
1209         struct ipw_softc *sc = arg;
1210         u_int32_t r;
1211
1212         if ((r = CSR_READ_4(sc, IPW_CSR_INTR)) == 0 || r == 0xffffffff)
1213                 return;
1214
1215         /* Disable interrupts */
1216         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1217
1218         DPRINTFN(8, ("INTR!0x%08x\n", r));
1219
1220         if (r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)) {
1221                 if_printf(&sc->sc_ic.ic_if, "fatal error\n");
1222                 sc->sc_ic.ic_if.if_flags &= ~IFF_UP;
1223                 ipw_stop(sc);
1224         }
1225
1226         if (r & IPW_INTR_FW_INIT_DONE) {
1227                 if (!(r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)))
1228                         wakeup(sc);
1229         }
1230
1231         if (r & IPW_INTR_RX_TRANSFER)
1232                 ipw_rx_intr(sc);
1233
1234         if (r & IPW_INTR_TX_TRANSFER)
1235                 ipw_tx_intr(sc);
1236
1237         /* Acknowledge interrupts */
1238         CSR_WRITE_4(sc, IPW_CSR_INTR, r);
1239
1240         /* Re-enable interrupts */
1241         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1242 }
1243
1244 static void
1245 ipw_dma_map_txbuf(void *arg, bus_dma_segment_t *segs, int nseg,
1246     bus_size_t mapsize, int error)
1247 {
1248         struct ipw_dma_mapping *map = arg;
1249
1250         if (error != 0)
1251                 return;
1252
1253         KASSERT(nseg <= IPW_MAX_NSEG, ("too many DMA segments %d", nseg));
1254
1255         bcopy(segs, map->segs, nseg * sizeof (bus_dma_segment_t));
1256         map->nseg = nseg;
1257         map->mapsize = mapsize;
1258 }
1259
1260 static void
1261 ipw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg __unused, int error)
1262 {
1263         if (error != 0)
1264                 return;
1265
1266         KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
1267
1268         *(bus_addr_t *)arg = segs[0].ds_addr;
1269 }
1270
1271 static int
1272 ipw_cmd(struct ipw_softc *sc, u_int32_t type, void *data, u_int32_t len)
1273 {
1274         struct ifnet *ifp = &sc->sc_ic.ic_if;
1275         struct ipw_soft_bd *sbd;
1276         bus_addr_t physaddr;
1277         int error;
1278
1279         sbd = &sc->stbd_list[sc->txcur];
1280
1281         error = bus_dmamap_load(sc->cmd_dmat, sc->cmd_map, &sc->cmd,
1282             sizeof (struct ipw_cmd), ipw_dma_map_addr, &physaddr, 0);
1283         if (error != 0) {
1284                 if_printf(&sc->sc_ic.ic_if,
1285                           "could not map command DMA memory\n");
1286                 return error;
1287         }
1288
1289         sc->cmd.type = htole32(type);
1290         sc->cmd.subtype = htole32(0);
1291         sc->cmd.len = htole32(len);
1292         sc->cmd.seq = htole32(0);
1293         if (data != NULL)
1294                 bcopy(data, sc->cmd.data, len);
1295
1296         sbd->type = IPW_SBD_TYPE_COMMAND;
1297         sbd->bd->physaddr = htole32(physaddr);
1298         sbd->bd->len = htole32(sizeof (struct ipw_cmd));
1299         sbd->bd->nfrag = 1;
1300         sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_COMMAND |
1301                          IPW_BD_FLAG_TX_LAST_FRAGMENT;
1302
1303         bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, BUS_DMASYNC_PREWRITE);
1304         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1305
1306         sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1307         sc->txfree--;
1308
1309         /*
1310          * This is kinda messy.  Since we may be MP, a combination of
1311          * a critical section for a local cpu interrupt and
1312          * tsleep_interlock() for a remote cpu interrupt is required to
1313          * avoid command completion racing the tsleep.
1314          */
1315         crit_enter();
1316         tsleep_interlock(sc);
1317         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
1318         lwkt_serialize_exit(ifp->if_serializer);
1319         error = tsleep(sc, 0, "ipwcmd", hz);
1320         crit_exit();
1321         lwkt_serialize_enter(ifp->if_serializer);
1322         return (error);
1323 }
1324
1325 static int
1326 ipw_tx_start(struct ifnet *ifp, struct mbuf *m0, struct ieee80211_node *ni)
1327 {
1328         struct ipw_softc *sc = ifp->if_softc;
1329         struct ieee80211com *ic = &sc->sc_ic;
1330         struct ieee80211_frame *wh;
1331         struct ipw_dma_mapping map;
1332         struct ipw_soft_bd *sbd;
1333         struct ipw_soft_hdr *shdr;
1334         struct ipw_soft_buf *sbuf;
1335         struct mbuf *mnew;
1336         bus_addr_t physaddr;
1337         int error, i;
1338
1339         if (ic->ic_flags & IEEE80211_F_WEPON) {
1340                 m0 = ieee80211_wep_crypt(ifp, m0, 1);
1341                 if (m0 == NULL)
1342                         return ENOBUFS;
1343         }
1344
1345         if (sc->sc_drvbpf != NULL) {
1346                 struct ipw_tx_radiotap_header *tap = &sc->sc_txtap;
1347
1348                 tap->wt_flags = 0;
1349                 tap->wt_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq);
1350                 tap->wt_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags);
1351
1352                 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1353         }
1354
1355         wh = mtod(m0, struct ieee80211_frame *);
1356
1357         shdr = SLIST_FIRST(&sc->free_shdr);
1358         sbuf = SLIST_FIRST(&sc->free_sbuf);
1359         KASSERT(shdr != NULL && sbuf != NULL, ("empty sw hdr/buf pool"));
1360
1361         shdr->hdr.type = htole32(IPW_HDR_TYPE_SEND);
1362         shdr->hdr.subtype = htole32(0);
1363         shdr->hdr.encrypted = (wh->i_fc[1] & IEEE80211_FC1_WEP) ? 1 : 0;
1364         shdr->hdr.encrypt = 0;
1365         shdr->hdr.keyidx = 0;
1366         shdr->hdr.keysz = 0;
1367         shdr->hdr.fragmentsz = htole16(0);
1368         IEEE80211_ADDR_COPY(shdr->hdr.src_addr, wh->i_addr2);
1369         if (ic->ic_opmode == IEEE80211_M_STA)
1370                 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr3);
1371         else
1372                 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr1);
1373
1374         /* trim IEEE802.11 header */
1375         m_adj(m0, sizeof (struct ieee80211_frame));
1376
1377         error = bus_dmamap_load_mbuf(sc->txbuf_dmat, sbuf->map, m0,
1378             ipw_dma_map_txbuf, &map, 0);
1379         if (error != 0 && error != EFBIG) {
1380                 if_printf(ifp, "could not map mbuf (error %d)\n", error);
1381                 m_freem(m0);
1382                 return error;
1383         }
1384         if (error != 0) {
1385                 mnew = m_defrag(m0, MB_DONTWAIT);
1386                 if (mnew == NULL) {
1387                         if_printf(ifp, "could not defragment mbuf\n");
1388                         m_freem(m0);
1389                         return ENOBUFS;
1390                 }
1391                 m0 = mnew;
1392
1393                 error = bus_dmamap_load_mbuf(sc->txbuf_dmat, sbuf->map, m0,
1394                     ipw_dma_map_txbuf, &map, 0);
1395                 if (error != 0) {
1396                         if_printf(ifp,
1397                                   "could not map mbuf (error %d)\n", error);
1398                         m_freem(m0);
1399                         return error;
1400                 }
1401         }
1402
1403         error = bus_dmamap_load(sc->hdr_dmat, shdr->map, &shdr->hdr,
1404             sizeof (struct ipw_hdr), ipw_dma_map_addr, &physaddr, 0);
1405         if (error != 0) {
1406                 if_printf(ifp, "could not map header DMA memory\n");
1407                 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1408                 m_freem(m0);
1409                 return error;
1410         }
1411
1412         SLIST_REMOVE_HEAD(&sc->free_sbuf, next);
1413         SLIST_REMOVE_HEAD(&sc->free_shdr, next);
1414
1415         sbd = &sc->stbd_list[sc->txcur];
1416         sbd->type = IPW_SBD_TYPE_HEADER;
1417         sbd->priv = shdr;
1418         sbd->bd->physaddr = htole32(physaddr);
1419         sbd->bd->len = htole32(sizeof (struct ipw_hdr));
1420         sbd->bd->nfrag = 1 + map.nseg;
1421         sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3 |
1422                          IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1423
1424         DPRINTFN(5, ("TX!HDR!%u!%u!%u!%u!%6D!%6D\n", shdr->hdr.type,
1425             shdr->hdr.subtype, shdr->hdr.encrypted, shdr->hdr.encrypt,
1426             shdr->hdr.src_addr, ":", shdr->hdr.dst_addr, ":"));
1427         sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1428         sc->txfree--;
1429
1430         sbuf->m = m0;
1431         sbuf->ni = ni;
1432
1433         for (i = 0; i < map.nseg; i++) {
1434                 sbd = &sc->stbd_list[sc->txcur];
1435
1436                 sbd->bd->physaddr = htole32(map.segs[i].ds_addr);
1437                 sbd->bd->len = htole32(map.segs[i].ds_len);
1438                 sbd->bd->nfrag = 0; /* used only in first bd */
1439                 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3;
1440                 if (i == map.nseg - 1) {
1441                         sbd->type = IPW_SBD_TYPE_DATA;
1442                         sbd->priv = sbuf;
1443                         sbd->bd->flags |= IPW_BD_FLAG_TX_LAST_FRAGMENT;
1444                 } else {
1445                         sbd->type = IPW_SBD_TYPE_NOASSOC;
1446                         sbd->bd->flags |= IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1447                 }
1448
1449                 DPRINTFN(5, ("TX!FRAG!%d!%d\n", i, map.segs[i].ds_len));
1450                 sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1451                 sc->txfree--;
1452         }
1453
1454         bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_PREWRITE);
1455         bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, BUS_DMASYNC_PREWRITE);
1456         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1457
1458         /* Inform firmware about this new packet */
1459         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
1460
1461         return 0;
1462 }
1463
1464 static void
1465 ipw_start(struct ifnet *ifp)
1466 {
1467         struct ipw_softc *sc = ifp->if_softc;
1468         struct ieee80211com *ic = &sc->sc_ic;
1469         struct mbuf *m0;
1470         struct ieee80211_node *ni;
1471
1472         if (ic->ic_state != IEEE80211_S_RUN) {
1473                 return;
1474         }
1475
1476         for (;;) {
1477                 m0 = ifq_poll(&ifp->if_snd);
1478                 if (m0 == NULL)
1479                         break;
1480                 if (sc->txfree < 1 + IPW_MAX_NSEG) {
1481                         ifp->if_flags |= IFF_OACTIVE;
1482                         break;
1483                 }
1484                 ifq_dequeue(&ifp->if_snd, m0);
1485
1486                 BPF_MTAP(ifp, m0);
1487
1488                 m0 = ieee80211_encap(ifp, m0, &ni);
1489                 if (m0 == NULL)
1490                         continue;
1491
1492                 if (ic->ic_rawbpf != NULL)
1493                         bpf_mtap(ic->ic_rawbpf, m0);
1494
1495                 if (ipw_tx_start(ifp, m0, ni) != 0) {
1496                         if (ni != NULL && ni != ic->ic_bss)
1497                                 ieee80211_free_node(ic, ni);
1498                         break;
1499                 }
1500
1501                 /* start watchdog timer */
1502                 sc->sc_tx_timer = 5;
1503                 ifp->if_timer = 1;
1504         }
1505 }
1506
1507 static void
1508 ipw_watchdog(struct ifnet *ifp)
1509 {
1510         struct ipw_softc *sc = ifp->if_softc;
1511
1512         ifp->if_timer = 0;
1513
1514         if (sc->sc_tx_timer > 0) {
1515                 if (--sc->sc_tx_timer == 0) {
1516                         if_printf(ifp, "device timeout\n");
1517                         ifp->if_flags &= ~IFF_UP;
1518                         ipw_stop(sc);
1519                         return;
1520                 }
1521                 ifp->if_timer = 1;
1522         }
1523
1524         ieee80211_watchdog(ifp);
1525 }
1526
1527 static int
1528 ipw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1529 {
1530         struct ipw_softc *sc = ifp->if_softc;
1531         struct ieee80211com *ic = &sc->sc_ic;
1532         struct ifreq *ifr;
1533         struct ieee80211req *ireq;
1534         int error = 0;
1535
1536         switch (cmd) {
1537         case SIOCSIFFLAGS:
1538                 if (ifp->if_flags & IFF_UP) {
1539                         if (!(ifp->if_flags & IFF_RUNNING))
1540                                 ipw_init(sc);
1541                 } else {
1542                         if (ifp->if_flags & IFF_RUNNING)
1543                                 ipw_stop(sc);
1544                 }
1545                 break;
1546
1547         case SIOCSLOADFW:
1548                 /* only super-user can do that! */
1549                 if ((error = suser(curthread)) != 0)
1550                         break;
1551
1552                 ifr = (struct ifreq *)data;
1553                 error = ipw_cache_firmware(sc, ifr->ifr_data);
1554                 break;
1555
1556         case SIOCSKILLFW:
1557                 /* only super-user can do that! */
1558                 if ((error = suser(curthread)) != 0)
1559                         break;
1560
1561                 ifp->if_flags &= ~IFF_UP;
1562                 ipw_stop(sc);
1563                 ipw_free_firmware(sc);
1564                 break;
1565
1566         case SIOCG80211:
1567                 ireq = (struct ieee80211req *)data;
1568                 switch (ireq->i_type) {
1569                 case IEEE80211_IOC_AUTHMODE:
1570                         ireq->i_val = sc->authmode;
1571                         break;
1572
1573                 case IEEE80211_IOC_TXPOWER:
1574                         ireq->i_val = (CSR_READ_4(sc, IPW_CSR_IO) &
1575                             IPW_IO_RADIO_DISABLED) ? 0 : ic->ic_txpower;
1576                         break;
1577
1578                 default:
1579                         error = ieee80211_ioctl(ifp, cmd, data, cr);
1580                 }
1581                 break;
1582
1583         case SIOCS80211:
1584                 /* only super-user can do that! */
1585                 if ((error = suser(curthread)) != 0)
1586                         break;
1587
1588                 ireq = (struct ieee80211req *)data;
1589                 switch (ireq->i_type) {
1590                 case IEEE80211_IOC_AUTHMODE:
1591                         sc->authmode = ireq->i_val;
1592                         break;
1593
1594                 default:
1595                         error = ieee80211_ioctl(ifp, cmd, data, cr);
1596                 }
1597                 break;
1598
1599         default:
1600                 error = ieee80211_ioctl(ifp, cmd, data, cr);
1601         }
1602
1603         if (error == ENETRESET) {
1604                 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1605                     (IFF_UP | IFF_RUNNING))
1606                         ipw_init(sc);
1607                 error = 0;
1608         }
1609
1610         return error;
1611 }
1612
1613 static void
1614 ipw_stop_master(struct ipw_softc *sc)
1615 {
1616         int ntries;
1617
1618         /* Disable interrupts */
1619         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1620
1621         CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER);
1622         for (ntries = 0; ntries < 5; ntries++) {
1623                 if (CSR_READ_4(sc, IPW_CSR_RST) & IPW_RST_MASTER_DISABLED)
1624                         break;
1625                 DELAY(10);
1626         }
1627         if (ntries == 5)
1628                 if_printf(&sc->sc_ic.ic_if, "timeout waiting for master\n");
1629
1630         CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
1631             IPW_RST_PRINCETON_RESET);
1632
1633         sc->flags &= ~IPW_FLAG_FW_INITED;
1634 }
1635
1636 static int
1637 ipw_reset(struct ipw_softc *sc)
1638 {
1639         int ntries;
1640
1641         ipw_stop_master(sc);
1642
1643         /* Move adapter to D0 state */
1644         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1645             IPW_CTL_INIT);
1646
1647         /* Wait for clock stabilization */
1648         for (ntries = 0; ntries < 1000; ntries++) {
1649                 if (CSR_READ_4(sc, IPW_CSR_CTL) & IPW_CTL_CLOCK_READY)
1650                         break;
1651                 DELAY(200);
1652         }
1653         if (ntries == 1000)
1654                 return EIO;
1655
1656         CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
1657             IPW_RST_SW_RESET);
1658
1659         DELAY(10);
1660
1661         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1662             IPW_CTL_INIT);
1663
1664         return 0;
1665 }
1666
1667 static int
1668 ipw_load_ucode(struct ipw_softc *sc, u_char *uc, int size)
1669 {
1670         int ntries;
1671
1672         MEM_WRITE_4(sc, 0x3000e0, 0x80000000);
1673         CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1674
1675         MEM_WRITE_2(sc, 0x220000, 0x0703);
1676         MEM_WRITE_2(sc, 0x220000, 0x0707);
1677
1678         MEM_WRITE_1(sc, 0x210014, 0x72);
1679         MEM_WRITE_1(sc, 0x210014, 0x72);
1680
1681         MEM_WRITE_1(sc, 0x210000, 0x40);
1682         MEM_WRITE_1(sc, 0x210000, 0x00);
1683         MEM_WRITE_1(sc, 0x210000, 0x40);
1684
1685         MEM_WRITE_MULTI_1(sc, 0x210010, uc, size);
1686
1687         MEM_WRITE_1(sc, 0x210000, 0x00);
1688         MEM_WRITE_1(sc, 0x210000, 0x00);
1689         MEM_WRITE_1(sc, 0x210000, 0x80);
1690
1691         MEM_WRITE_2(sc, 0x220000, 0x0703);
1692         MEM_WRITE_2(sc, 0x220000, 0x0707);
1693
1694         MEM_WRITE_1(sc, 0x210014, 0x72);
1695         MEM_WRITE_1(sc, 0x210014, 0x72);
1696
1697         MEM_WRITE_1(sc, 0x210000, 0x00);
1698         MEM_WRITE_1(sc, 0x210000, 0x80);
1699
1700         for (ntries = 0; ntries < 100; ntries++) {
1701                 if (MEM_READ_1(sc, 0x210000) & 1)
1702                         break;
1703                 DELAY(1000);
1704         }
1705         if (ntries == 100) {
1706                 if_printf(&sc->sc_ic.ic_if,
1707                           "timeout waiting for ucode to initialize\n");
1708                 return EIO;
1709         }
1710
1711         MEM_WRITE_4(sc, 0x3000e0, 0);
1712
1713         return 0;
1714 }
1715
1716 /* set of macros to handle unaligned little endian data in firmware image */
1717 #define GETLE32(p) ((p)[0] | (p)[1] << 8 | (p)[2] << 16 | (p)[3] << 24)
1718 #define GETLE16(p) ((p)[0] | (p)[1] << 8)
1719 static int
1720 ipw_load_firmware(struct ipw_softc *sc, u_char *fw, int size)
1721 {
1722         struct ifnet *ifp = &sc->sc_ic.ic_if;
1723         u_char *p, *end;
1724         u_int32_t dst;
1725         u_int16_t len;
1726         int error;
1727
1728         p = fw;
1729         end = fw + size;
1730         while (p < end) {
1731                 if (p + 6 > end)
1732                         return EINVAL;
1733
1734                 dst = GETLE32(p); p += 4;
1735                 len = GETLE16(p); p += 2;
1736
1737                 if (p + len > end)
1738                         return EINVAL;
1739
1740                 ipw_write_mem_1(sc, dst, p, len);
1741                 p += len;
1742         }
1743
1744         CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK |
1745             IPW_IO_LED_OFF);
1746
1747         /* Allow interrupts so we know when the firmware is inited */
1748         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1749
1750         /*
1751          * Tell the adapter to initialize the firmware.
1752          *
1753          * This is kinda messy.  Since we may be MP, a combination of
1754          * a critical section for a local cpu interrupt and
1755          * tsleep_interlock() for a remote cpu interrupt is required to
1756          * avoid command completion racing the tsleep.
1757          */
1758         crit_enter();
1759         CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1760         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1761             IPW_CTL_ALLOW_STANDBY);
1762
1763         tsleep_interlock(sc);
1764         lwkt_serialize_exit(ifp->if_serializer);
1765         error = tsleep(sc, 0, "ipwinit", hz);
1766         crit_exit();
1767         lwkt_serialize_enter(ifp->if_serializer);
1768         if (error) {
1769                 if_printf(&sc->sc_ic.ic_if, "timeout waiting for firmware "
1770                     "initialization to complete\n");
1771                 return error;
1772         }
1773
1774         CSR_WRITE_4(sc, IPW_CSR_IO, CSR_READ_4(sc, IPW_CSR_IO) |
1775             IPW_IO_GPIO1_MASK | IPW_IO_GPIO3_MASK);
1776
1777         return 0;
1778 }
1779
1780 /*
1781  * Store firmware into kernel memory so we can download it when we need to,
1782  * e.g when the adapter wakes up from suspend mode.
1783  */
1784 static int
1785 ipw_cache_firmware(struct ipw_softc *sc, void *data)
1786 {
1787         struct ipw_firmware *fw = &sc->fw;
1788         struct ipw_firmware_hdr hdr;
1789         u_char *p = data;
1790         int error;
1791
1792         ipw_free_firmware(sc);
1793
1794         /*
1795          * mutex(9): no mutexes should be held across functions which access
1796          * memory in userspace, such as copyin(9) [...]
1797          */
1798
1799         if ((error = copyin(data, &hdr, sizeof hdr)) != 0)
1800                 goto fail1;
1801
1802         fw->main_size  = le32toh(hdr.main_size);
1803         fw->ucode_size = le32toh(hdr.ucode_size);
1804         p += sizeof hdr;
1805
1806         fw->main = malloc(fw->main_size, M_DEVBUF, M_WAITOK);
1807         if (fw->main == NULL) {
1808                 error = ENOMEM;
1809                 goto fail1;
1810         }
1811
1812         fw->ucode = malloc(fw->ucode_size, M_DEVBUF, M_WAITOK);
1813         if (fw->ucode == NULL) {
1814                 error = ENOMEM;
1815                 goto fail2;
1816         }
1817
1818         if ((error = copyin(p, fw->main, fw->main_size)) != 0)
1819                 goto fail3;
1820
1821         p += fw->main_size;
1822         if ((error = copyin(p, fw->ucode, fw->ucode_size)) != 0)
1823                 goto fail3;
1824
1825         DPRINTF(("Firmware cached: main %u, ucode %u\n", fw->main_size,
1826             fw->ucode_size));
1827
1828         sc->flags |= IPW_FLAG_FW_CACHED;
1829
1830         return 0;
1831
1832 fail3:  free(fw->ucode, M_DEVBUF);
1833 fail2:  free(fw->main, M_DEVBUF);
1834 fail1:
1835
1836         return error;
1837 }
1838
1839 static void
1840 ipw_free_firmware(struct ipw_softc *sc)
1841 {
1842         if (!(sc->flags & IPW_FLAG_FW_CACHED))
1843                 return;
1844
1845         free(sc->fw.main, M_DEVBUF);
1846         free(sc->fw.ucode, M_DEVBUF);
1847
1848         sc->flags &= ~IPW_FLAG_FW_CACHED;
1849 }
1850
1851 static int
1852 ipw_config(struct ipw_softc *sc)
1853 {
1854         struct ieee80211com *ic = &sc->sc_ic;
1855         struct ifnet *ifp = &ic->ic_if;
1856         struct ipw_security security;
1857         struct ieee80211_wepkey *k;
1858         struct ipw_wep_key wepkey;
1859         struct ipw_scan_options options;
1860         struct ipw_configuration config;
1861         u_int32_t data;
1862         int error, i;
1863
1864         switch (ic->ic_opmode) {
1865         case IEEE80211_M_STA:
1866         case IEEE80211_M_HOSTAP:
1867                 data = htole32(IPW_MODE_BSS);
1868                 break;
1869
1870         case IEEE80211_M_IBSS:
1871         case IEEE80211_M_AHDEMO:
1872                 data = htole32(IPW_MODE_IBSS);
1873                 break;
1874
1875         case IEEE80211_M_MONITOR:
1876                 data = htole32(IPW_MODE_MONITOR);
1877                 break;
1878         }
1879         DPRINTF(("Setting mode to %u\n", le32toh(data)));
1880         error = ipw_cmd(sc, IPW_CMD_SET_MODE, &data, sizeof data);
1881         if (error != 0)
1882                 return error;
1883
1884         if (ic->ic_opmode == IEEE80211_M_IBSS ||
1885             ic->ic_opmode == IEEE80211_M_MONITOR) {
1886                 data = htole32(ieee80211_chan2ieee(ic, ic->ic_ibss_chan));
1887                 DPRINTF(("Setting channel to %u\n", le32toh(data)));
1888                 error = ipw_cmd(sc, IPW_CMD_SET_CHANNEL, &data, sizeof data);
1889                 if (error != 0)
1890                         return error;
1891         }
1892
1893         if (ic->ic_opmode == IEEE80211_M_MONITOR) {
1894                 DPRINTF(("Enabling adapter\n"));
1895                 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
1896         }
1897
1898         IEEE80211_ADDR_COPY(((struct arpcom *)ifp)->ac_enaddr, ic->ic_myaddr);
1899         IEEE80211_ADDR_COPY(IF_LLADDR(ifp), ic->ic_myaddr);
1900         DPRINTF(("Setting MAC address to %6D\n", ic->ic_myaddr, ":"));
1901         error = ipw_cmd(sc, IPW_CMD_SET_MAC_ADDRESS, ic->ic_myaddr,
1902             IEEE80211_ADDR_LEN);
1903         if (error != 0)
1904                 return error;
1905
1906         config.flags = htole32(IPW_CFG_BSS_MASK | IPW_CFG_IBSS_MASK |
1907             IPW_CFG_PREAMBLE_AUTO | IPW_CFG_802_1x_ENABLE);
1908         if (ic->ic_opmode == IEEE80211_M_IBSS)
1909                 config.flags |= htole32(IPW_CFG_IBSS_AUTO_START);
1910         if (ifp->if_flags & IFF_PROMISC)
1911                 config.flags |= htole32(IPW_CFG_PROMISCUOUS);
1912         config.bss_chan = htole32(0x3fff); /* channels 1-14 */
1913         config.ibss_chan = htole32(0x7ff); /* channels 1-11 */
1914         DPRINTF(("Setting configuration to 0x%x\n", le32toh(config.flags)));
1915         error = ipw_cmd(sc, IPW_CMD_SET_CONFIGURATION, &config, sizeof config);
1916         if (error != 0)
1917                 return error;
1918
1919         data = htole32(0x3); /* 1, 2 */
1920         DPRINTF(("Setting basic tx rates to 0x%x\n", le32toh(data)));
1921         error = ipw_cmd(sc, IPW_CMD_SET_BASIC_TX_RATES, &data, sizeof data);
1922         if (error != 0)
1923                 return error;
1924
1925         data = htole32(0xf); /* 1, 2, 5.5, 11 */
1926         DPRINTF(("Setting tx rates to 0x%x\n", le32toh(data)));
1927         error = ipw_cmd(sc, IPW_CMD_SET_TX_RATES, &data, sizeof data);
1928         if (error != 0)
1929                 return error;
1930
1931         data = htole32(IPW_POWER_MODE_CAM);
1932         DPRINTF(("Setting power mode to %u\n", le32toh(data)));
1933         error = ipw_cmd(sc, IPW_CMD_SET_POWER_MODE, &data, sizeof data);
1934         if (error != 0)
1935                 return error;
1936
1937         if (ic->ic_opmode == IEEE80211_M_IBSS) {
1938                 data = htole32(32); /* default value */
1939                 DPRINTF(("Setting tx power index to %u\n", le32toh(data)));
1940                 error = ipw_cmd(sc, IPW_CMD_SET_TX_POWER_INDEX, &data,
1941                     sizeof data);
1942                 if (error != 0)
1943                         return error;
1944         }
1945
1946         data = htole32(ic->ic_rtsthreshold);
1947         DPRINTF(("Setting RTS threshold to %u\n", le32toh(data)));
1948         error = ipw_cmd(sc, IPW_CMD_SET_RTS_THRESHOLD, &data, sizeof data);
1949         if (error != 0)
1950                 return error;
1951
1952         data = htole32(ic->ic_fragthreshold);
1953         DPRINTF(("Setting frag threshold to %u\n", le32toh(data)));
1954         error = ipw_cmd(sc, IPW_CMD_SET_FRAG_THRESHOLD, &data, sizeof data);
1955         if (error != 0)
1956                 return error;
1957
1958 #ifdef IPW_DEBUG
1959         if (ipw_debug > 0) {
1960                 printf("Setting ESSID to ");
1961                 ieee80211_print_essid(ic->ic_des_essid, ic->ic_des_esslen);
1962                 printf("\n");
1963         }
1964 #endif
1965         error = ipw_cmd(sc, IPW_CMD_SET_ESSID, ic->ic_des_essid,
1966             ic->ic_des_esslen);
1967         if (error != 0)
1968                 return error;
1969
1970         /* no mandatory BSSID */
1971         DPRINTF(("Setting mandatory BSSID to null\n"));
1972         error = ipw_cmd(sc, IPW_CMD_SET_MANDATORY_BSSID, NULL, 0);
1973         if (error != 0)
1974                 return error;
1975
1976         if (ic->ic_flags & IEEE80211_F_DESBSSID) {
1977                 DPRINTF(("Setting desired BSSID to %6D\n", ic->ic_des_bssid,
1978                     ":"));
1979                 error = ipw_cmd(sc, IPW_CMD_SET_DESIRED_BSSID,
1980                     ic->ic_des_bssid, IEEE80211_ADDR_LEN);
1981                 if (error != 0)
1982                         return error;
1983         }
1984
1985         bzero(&security, sizeof security);
1986         security.authmode = (sc->authmode == IEEE80211_AUTH_SHARED) ?
1987             IPW_AUTH_SHARED : IPW_AUTH_OPEN;
1988         security.ciphers = htole32(IPW_CIPHER_NONE);
1989         DPRINTF(("Setting authmode to %u\n", security.authmode));
1990         error = ipw_cmd(sc, IPW_CMD_SET_SECURITY_INFORMATION, &security,
1991             sizeof security);
1992         if (error != 0)
1993                 return error;
1994
1995         if (ic->ic_flags & IEEE80211_F_WEPON) {
1996                 k = ic->ic_nw_keys;
1997                 for (i = 0; i < IEEE80211_WEP_NKID; i++, k++) {
1998                         if (k->wk_len == 0)
1999                                 continue;
2000
2001                         wepkey.idx = i;
2002                         wepkey.len = k->wk_len;
2003                         bzero(wepkey.key, sizeof wepkey.key);
2004                         bcopy(k->wk_key, wepkey.key, k->wk_len);
2005                         DPRINTF(("Setting wep key index %u len %u\n",
2006                             wepkey.idx, wepkey.len));
2007                         error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY, &wepkey,
2008                             sizeof wepkey);
2009                         if (error != 0)
2010                                 return error;
2011                 }
2012
2013                 data = htole32(ic->ic_wep_txkey);
2014                 DPRINTF(("Setting wep tx key index to %u\n", le32toh(data)));
2015                 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY_INDEX, &data,
2016                     sizeof data);
2017                 if (error != 0)
2018                         return error;
2019         }
2020
2021         data = htole32((ic->ic_flags & IEEE80211_F_WEPON) ? IPW_WEPON : 0);
2022         DPRINTF(("Setting wep flags to 0x%x\n", le32toh(data)));
2023         error = ipw_cmd(sc, IPW_CMD_SET_WEP_FLAGS, &data, sizeof data);
2024         if (error != 0)
2025                 return error;
2026
2027         if (ic->ic_opmode == IEEE80211_M_IBSS ||
2028             ic->ic_opmode == IEEE80211_M_HOSTAP) {
2029                 data = htole32(ic->ic_lintval);
2030                 DPRINTF(("Setting beacon interval to %u\n", le32toh(data)));
2031                 error = ipw_cmd(sc, IPW_CMD_SET_BEACON_INTERVAL, &data,
2032                     sizeof data);
2033                 if (error != 0)
2034                         return error;
2035         }
2036
2037         options.flags = htole32(0);
2038         options.channels = htole32(0x3fff); /* scan channels 1-14 */
2039         DPRINTF(("Setting scan options to 0x%x\n", le32toh(options.flags)));
2040         error = ipw_cmd(sc, IPW_CMD_SET_SCAN_OPTIONS, &options, sizeof options);
2041         if (error != 0)
2042                 return error;
2043
2044         /* finally, enable adapter (start scanning for an access point) */
2045         DPRINTF(("Enabling adapter\n"));
2046         return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
2047 }
2048
2049 static void
2050 ipw_init(void *priv)
2051 {
2052         struct ipw_softc *sc = priv;
2053         struct ieee80211com *ic = &sc->sc_ic;
2054         struct ifnet *ifp = &ic->ic_if;
2055         struct ipw_firmware *fw = &sc->fw;
2056
2057         /* exit immediately if firmware has not been ioctl'd */
2058         if (!(sc->flags & IPW_FLAG_FW_CACHED)) {
2059                 ifp->if_flags &= ~IFF_UP;
2060                 return;
2061         }
2062
2063         ipw_stop(sc);
2064
2065         if (ipw_reset(sc) != 0) {
2066                 if_printf(ifp, "could not reset adapter\n");
2067                 goto fail;
2068         }
2069
2070         if (ipw_load_ucode(sc, fw->ucode, fw->ucode_size) != 0) {
2071                 if_printf(ifp, "could not load microcode\n");
2072                 goto fail;
2073         }
2074
2075         ipw_stop_master(sc);
2076
2077         /*
2078          * Setup tx, rx and status rings
2079          */
2080         CSR_WRITE_4(sc, IPW_CSR_TX_BD_BASE, sc->tbd_phys);
2081         CSR_WRITE_4(sc, IPW_CSR_TX_BD_SIZE, IPW_NTBD);
2082         CSR_WRITE_4(sc, IPW_CSR_TX_READ_INDEX, 0);
2083         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, 0);
2084         sc->txold = IPW_NTBD - 1; /* latest bd index ack'ed by firmware */
2085         sc->txcur = 0; /* bd index to write to */
2086         sc->txfree = IPW_NTBD - 2;
2087
2088         CSR_WRITE_4(sc, IPW_CSR_RX_BD_BASE, sc->rbd_phys);
2089         CSR_WRITE_4(sc, IPW_CSR_RX_BD_SIZE, IPW_NRBD);
2090         CSR_WRITE_4(sc, IPW_CSR_RX_READ_INDEX, 0);
2091         CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, IPW_NRBD - 1);
2092         sc->rxcur = IPW_NRBD - 1; /* latest bd index I've read */
2093
2094         CSR_WRITE_4(sc, IPW_CSR_RX_STATUS_BASE, sc->status_phys);
2095
2096         if (ipw_load_firmware(sc, fw->main, fw->main_size) != 0) {
2097                 if_printf(ifp, "could not load firmware\n");
2098                 goto fail;
2099         }
2100
2101         sc->flags |= IPW_FLAG_FW_INITED;
2102
2103         /* Retrieve information tables base addresses */
2104         sc->table1_base = CSR_READ_4(sc, IPW_CSR_TABLE1_BASE);
2105         sc->table2_base = CSR_READ_4(sc, IPW_CSR_TABLE2_BASE);
2106
2107         ipw_write_table1(sc, IPW_INFO_LOCK, 0);
2108
2109         if (ipw_config(sc) != 0) {
2110                 if_printf(ifp, "device configuration failed\n");
2111                 goto fail;
2112         }
2113
2114         ifp->if_flags &= ~IFF_OACTIVE;
2115         ifp->if_flags |= IFF_RUNNING;
2116
2117         return;
2118
2119 fail:   ifp->if_flags &= ~IFF_UP;
2120         ipw_stop(sc);
2121 }
2122
2123 static void
2124 ipw_stop(void *priv)
2125 {
2126         struct ipw_softc *sc = priv;
2127         struct ieee80211com *ic = &sc->sc_ic;
2128         struct ifnet *ifp = &ic->ic_if;
2129         int i;
2130
2131         ipw_stop_master(sc);
2132         CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET);
2133
2134         /*
2135          * Release tx buffers
2136          */
2137         for (i = 0; i < IPW_NTBD; i++)
2138                 ipw_release_sbd(sc, &sc->stbd_list[i]);
2139
2140         ifp->if_timer = 0;
2141         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2142
2143         ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2144 }
2145
2146 static int
2147 ipw_sysctl_stats(SYSCTL_HANDLER_ARGS)
2148 {
2149         struct ipw_softc *sc = arg1;
2150         u_int32_t i, size, buf[256];
2151
2152         (void)arg2; /* silence WARNS == 6 */
2153         (void)oidp; /* silence WARNS == 6 */
2154
2155         if (!(sc->flags & IPW_FLAG_FW_INITED)) {
2156                 bzero(buf, sizeof buf);
2157                 return SYSCTL_OUT(req, buf, sizeof buf);
2158         }
2159
2160         CSR_WRITE_4(sc, IPW_CSR_AUTOINC_ADDR, sc->table1_base);
2161
2162         size = min(CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA), 256);
2163         for (i = 1; i < size; i++)
2164                 buf[i] = MEM_READ_4(sc, CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA));
2165
2166         return SYSCTL_OUT(req, buf, sizeof buf);
2167 }
2168
2169 static int
2170 ipw_sysctl_radio(SYSCTL_HANDLER_ARGS)
2171 {
2172         struct ipw_softc *sc = arg1;
2173         int val;
2174
2175         (void)arg2; /* silence WARNS == 6 */
2176         (void)oidp; /* silence WARNS == 6 */
2177
2178         val = !((sc->flags & IPW_FLAG_HAS_RADIO_SWITCH) &&
2179                 (CSR_READ_4(sc, IPW_CSR_IO) & IPW_IO_RADIO_DISABLED));
2180
2181         return SYSCTL_OUT(req, &val, sizeof val);
2182 }
2183
2184 static u_int32_t
2185 ipw_read_table1(struct ipw_softc *sc, u_int32_t off)
2186 {
2187         return MEM_READ_4(sc, MEM_READ_4(sc, sc->table1_base + off));
2188 }
2189
2190 static void
2191 ipw_write_table1(struct ipw_softc *sc, u_int32_t off, u_int32_t info)
2192 {
2193         MEM_WRITE_4(sc, MEM_READ_4(sc, sc->table1_base + off), info);
2194 }
2195
2196 static int
2197 ipw_read_table2(struct ipw_softc *sc, u_int32_t off, void *buf, u_int32_t *len)
2198 {
2199         u_int32_t addr, info;
2200         u_int16_t count, size;
2201         u_int32_t total;
2202
2203         /* addr[4] + count[2] + size[2] */
2204         addr = MEM_READ_4(sc, sc->table2_base + off);
2205         info = MEM_READ_4(sc, sc->table2_base + off + 4);
2206
2207         count = info >> 16;
2208         size = info & 0xffff;
2209         total = count * size;
2210
2211         if (total > *len) {
2212                 *len = total;
2213                 return EINVAL;
2214         }
2215
2216         *len = total;
2217         ipw_read_mem_1(sc, addr, buf, total);
2218
2219         return 0;
2220 }
2221
2222 static void
2223 ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, u_int8_t *datap,
2224     bus_size_t count)
2225 {
2226         for (; count > 0; offset++, datap++, count--) {
2227                 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2228                 *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3));
2229         }
2230 }
2231
2232 static void
2233 ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, u_int8_t *datap,
2234     bus_size_t count)
2235 {
2236         for (; count > 0; offset++, datap++, count--) {
2237                 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2238                 CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);
2239         }
2240 }