1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
156 #include "coretypes.h"
161 #include "function.h"
162 #include "insn-config.h"
164 #include "hard-reg-set.h"
169 #include "basic-block.h"
174 /* We use this array to cache info about insns, because otherwise we
175 spend too much time in stack_regs_mentioned_p.
177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
178 the insn uses stack registers, two indicates the insn does not use
180 static GTY(()) varray_type stack_regs_mentioned_data;
184 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
186 /* This is the basic stack record. TOP is an index into REG[] such
187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
189 If TOP is -2, REG[] is not yet initialized. Stack initialization
190 consists of placing each live reg in array `reg' and setting `top'
193 REG_SET indicates which registers are live. */
195 typedef struct stack_def
197 int top; /* index to top stack element */
198 HARD_REG_SET reg_set; /* set of live registers */
199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
202 /* This is used to carry information about basic blocks. It is
203 attached to the AUX field of the standard CFG block. */
205 typedef struct block_info_def
207 struct stack_def stack_in; /* Input stack configuration. */
208 struct stack_def stack_out; /* Output stack configuration. */
209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
210 int done; /* True if block already converted. */
211 int predecessors; /* Number of predecessors that needs
215 #define BLOCK_INFO(B) ((block_info) (B)->aux)
217 /* Passed to change_stack to indicate where to emit insns. */
224 /* The block we're currently working on. */
225 static basic_block current_block;
227 /* This is the register file for all register after conversion. */
229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
231 #define FP_MODE_REG(regno,mode) \
232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
234 /* Used to initialize uninitialized registers. */
237 /* Forward declarations */
239 static int stack_regs_mentioned_p (rtx pat);
240 static void straighten_stack (rtx, stack);
241 static void pop_stack (stack, int);
242 static rtx *get_true_reg (rtx *);
244 static int check_asm_stack_operands (rtx);
245 static int get_asm_operand_n_inputs (rtx);
246 static rtx stack_result (tree);
247 static void replace_reg (rtx *, int);
248 static void remove_regno_note (rtx, enum reg_note, unsigned int);
249 static int get_hard_regnum (stack, rtx);
250 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
251 static void emit_swap_insn (rtx, stack, rtx);
252 static bool move_for_stack_reg (rtx, stack, rtx);
253 static int swap_rtx_condition_1 (rtx);
254 static int swap_rtx_condition (rtx);
255 static void compare_for_stack_reg (rtx, stack, rtx);
256 static bool subst_stack_regs_pat (rtx, stack, rtx);
257 static void subst_asm_stack_regs (rtx, stack);
258 static bool subst_stack_regs (rtx, stack);
259 static void change_stack (rtx, stack, stack, enum emit_where);
260 static int convert_regs_entry (void);
261 static void convert_regs_exit (void);
262 static int convert_regs_1 (FILE *, basic_block);
263 static int convert_regs_2 (FILE *, basic_block);
264 static int convert_regs (FILE *);
265 static void print_stack (FILE *, stack);
266 static rtx next_flags_user (rtx);
267 static void record_label_references (rtx, rtx);
268 static bool compensate_edge (edge, FILE *);
270 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
273 stack_regs_mentioned_p (rtx pat)
278 if (STACK_REG_P (pat))
281 fmt = GET_RTX_FORMAT (GET_CODE (pat));
282 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
288 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
289 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
292 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
299 /* Return nonzero if INSN mentions stacked registers, else return zero. */
302 stack_regs_mentioned (rtx insn)
304 unsigned int uid, max;
307 if (! INSN_P (insn) || !stack_regs_mentioned_data)
310 uid = INSN_UID (insn);
311 max = VARRAY_SIZE (stack_regs_mentioned_data);
314 /* Allocate some extra size to avoid too many reallocs, but
315 do not grow too quickly. */
316 max = uid + uid / 20;
317 VARRAY_GROW (stack_regs_mentioned_data, max);
320 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
323 /* This insn has yet to be examined. Do so now. */
324 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
325 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
331 static rtx ix86_flags_rtx;
334 next_flags_user (rtx insn)
336 /* Search forward looking for the first use of this value.
337 Stop at block boundaries. */
339 while (insn != BB_END (current_block))
341 insn = NEXT_INSN (insn);
343 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
346 if (GET_CODE (insn) == CALL_INSN)
352 /* Reorganize the stack into ascending numbers,
356 straighten_stack (rtx insn, stack regstack)
358 struct stack_def temp_stack;
361 /* If there is only a single register on the stack, then the stack is
362 already in increasing order and no reorganization is needed.
364 Similarly if the stack is empty. */
365 if (regstack->top <= 0)
368 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
370 for (top = temp_stack.top = regstack->top; top >= 0; top--)
371 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
373 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
376 /* Pop a register from the stack. */
379 pop_stack (stack regstack, int regno)
381 int top = regstack->top;
383 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
385 /* If regno was not at the top of stack then adjust stack. */
386 if (regstack->reg [top] != regno)
389 for (i = regstack->top; i >= 0; i--)
390 if (regstack->reg [i] == regno)
393 for (j = i; j < top; j++)
394 regstack->reg [j] = regstack->reg [j + 1];
400 /* Convert register usage from "flat" register file usage to a "stack
401 register file. FIRST is the first insn in the function, FILE is the
404 Construct a CFG and run life analysis. Then convert each insn one
405 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
406 code duplication created when the converter inserts pop insns on
410 reg_to_stack (rtx first, FILE *file)
416 /* Clean up previous run. */
417 stack_regs_mentioned_data = 0;
419 /* See if there is something to do. Flow analysis is quite
420 expensive so we might save some compilation time. */
421 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
422 if (regs_ever_live[i])
424 if (i > LAST_STACK_REG)
427 /* Ok, floating point instructions exist. If not optimizing,
428 build the CFG and run life analysis.
429 Also need to rebuild life when superblock scheduling is done
430 as it don't update liveness yet. */
432 || (flag_sched2_use_superblocks
433 && flag_schedule_insns_after_reload))
435 count_or_remove_death_notes (NULL, 1);
436 life_analysis (first, file, PROP_DEATH_NOTES);
438 mark_dfs_back_edges ();
440 /* Set up block info for each basic block. */
441 alloc_aux_for_blocks (sizeof (struct block_info_def));
442 FOR_EACH_BB_REVERSE (bb)
445 for (e = bb->pred; e; e = e->pred_next)
446 if (!(e->flags & EDGE_DFS_BACK)
447 && e->src != ENTRY_BLOCK_PTR)
448 BLOCK_INFO (bb)->predecessors++;
451 /* Create the replacement registers up front. */
452 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
454 enum machine_mode mode;
455 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
457 mode = GET_MODE_WIDER_MODE (mode))
458 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
459 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
461 mode = GET_MODE_WIDER_MODE (mode))
462 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
465 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
467 /* A QNaN for initializing uninitialized variables.
469 ??? We can't load from constant memory in PIC mode, because
470 we're inserting these instructions before the prologue and
471 the PIC register hasn't been set up. In that case, fall back
472 on zero, which we can get from `ldz'. */
475 nan = CONST0_RTX (SFmode);
478 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
479 nan = force_const_mem (SFmode, nan);
482 /* Allocate a cache for stack_regs_mentioned. */
483 max_uid = get_max_uid ();
484 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
485 "stack_regs_mentioned cache");
489 free_aux_for_blocks ();
493 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
494 label's chain of references, and note which insn contains each
498 record_label_references (rtx insn, rtx pat)
500 enum rtx_code code = GET_CODE (pat);
504 if (code == LABEL_REF)
506 rtx label = XEXP (pat, 0);
509 if (GET_CODE (label) != CODE_LABEL)
512 /* If this is an undefined label, LABEL_REFS (label) contains
514 if (INSN_UID (label) == 0)
517 /* Don't make a duplicate in the code_label's chain. */
519 for (ref = LABEL_REFS (label);
521 ref = LABEL_NEXTREF (ref))
522 if (CONTAINING_INSN (ref) == insn)
525 CONTAINING_INSN (pat) = insn;
526 LABEL_NEXTREF (pat) = LABEL_REFS (label);
527 LABEL_REFS (label) = pat;
532 fmt = GET_RTX_FORMAT (code);
533 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
536 record_label_references (insn, XEXP (pat, i));
540 for (j = 0; j < XVECLEN (pat, i); j++)
541 record_label_references (insn, XVECEXP (pat, i, j));
546 /* Return a pointer to the REG expression within PAT. If PAT is not a
547 REG, possible enclosed by a conversion rtx, return the inner part of
548 PAT that stopped the search. */
551 get_true_reg (rtx *pat)
554 switch (GET_CODE (*pat))
557 /* Eliminate FP subregister accesses in favor of the
558 actual FP register in use. */
561 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
563 int regno_off = subreg_regno_offset (REGNO (subreg),
567 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
576 pat = & XEXP (*pat, 0);
580 /* Set if we find any malformed asms in a block. */
581 static bool any_malformed_asm;
583 /* There are many rules that an asm statement for stack-like regs must
584 follow. Those rules are explained at the top of this file: the rule
585 numbers below refer to that explanation. */
588 check_asm_stack_operands (rtx insn)
592 int malformed_asm = 0;
593 rtx body = PATTERN (insn);
595 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
596 char implicitly_dies[FIRST_PSEUDO_REGISTER];
599 rtx *clobber_reg = 0;
600 int n_inputs, n_outputs;
602 /* Find out what the constraints require. If no constraint
603 alternative matches, this asm is malformed. */
605 constrain_operands (1);
606 alt = which_alternative;
608 preprocess_constraints ();
610 n_inputs = get_asm_operand_n_inputs (body);
611 n_outputs = recog_data.n_operands - n_inputs;
616 /* Avoid further trouble with this insn. */
617 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
621 /* Strip SUBREGs here to make the following code simpler. */
622 for (i = 0; i < recog_data.n_operands; i++)
623 if (GET_CODE (recog_data.operand[i]) == SUBREG
624 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
625 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
627 /* Set up CLOBBER_REG. */
631 if (GET_CODE (body) == PARALLEL)
633 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
635 for (i = 0; i < XVECLEN (body, 0); i++)
636 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
638 rtx clobber = XVECEXP (body, 0, i);
639 rtx reg = XEXP (clobber, 0);
641 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
642 reg = SUBREG_REG (reg);
644 if (STACK_REG_P (reg))
646 clobber_reg[n_clobbers] = reg;
652 /* Enforce rule #4: Output operands must specifically indicate which
653 reg an output appears in after an asm. "=f" is not allowed: the
654 operand constraints must select a class with a single reg.
656 Also enforce rule #5: Output operands must start at the top of
657 the reg-stack: output operands may not "skip" a reg. */
659 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
660 for (i = 0; i < n_outputs; i++)
661 if (STACK_REG_P (recog_data.operand[i]))
663 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
665 error_for_asm (insn, "output constraint %d must specify a single register", i);
672 for (j = 0; j < n_clobbers; j++)
673 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
675 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
676 i, reg_names [REGNO (clobber_reg[j])]);
681 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
686 /* Search for first non-popped reg. */
687 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
688 if (! reg_used_as_output[i])
691 /* If there are any other popped regs, that's an error. */
692 for (; i < LAST_STACK_REG + 1; i++)
693 if (reg_used_as_output[i])
696 if (i != LAST_STACK_REG + 1)
698 error_for_asm (insn, "output regs must be grouped at top of stack");
702 /* Enforce rule #2: All implicitly popped input regs must be closer
703 to the top of the reg-stack than any input that is not implicitly
706 memset (implicitly_dies, 0, sizeof (implicitly_dies));
707 for (i = n_outputs; i < n_outputs + n_inputs; i++)
708 if (STACK_REG_P (recog_data.operand[i]))
710 /* An input reg is implicitly popped if it is tied to an
711 output, or if there is a CLOBBER for it. */
714 for (j = 0; j < n_clobbers; j++)
715 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
718 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
719 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
722 /* Search for first non-popped reg. */
723 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
724 if (! implicitly_dies[i])
727 /* If there are any other popped regs, that's an error. */
728 for (; i < LAST_STACK_REG + 1; i++)
729 if (implicitly_dies[i])
732 if (i != LAST_STACK_REG + 1)
735 "implicitly popped regs must be grouped at top of stack");
739 /* Enforce rule #3: If any input operand uses the "f" constraint, all
740 output constraints must use the "&" earlyclobber.
742 ??? Detect this more deterministically by having constrain_asm_operands
743 record any earlyclobber. */
745 for (i = n_outputs; i < n_outputs + n_inputs; i++)
746 if (recog_op_alt[i][alt].matches == -1)
750 for (j = 0; j < n_outputs; j++)
751 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
754 "output operand %d must use `&' constraint", j);
761 /* Avoid further trouble with this insn. */
762 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
763 any_malformed_asm = true;
770 /* Calculate the number of inputs and outputs in BODY, an
771 asm_operands. N_OPERANDS is the total number of operands, and
772 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
776 get_asm_operand_n_inputs (rtx body)
778 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
779 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
781 else if (GET_CODE (body) == ASM_OPERANDS)
782 return ASM_OPERANDS_INPUT_LENGTH (body);
784 else if (GET_CODE (body) == PARALLEL
785 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
786 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
788 else if (GET_CODE (body) == PARALLEL
789 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
790 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
795 /* If current function returns its result in an fp stack register,
796 return the REG. Otherwise, return 0. */
799 stack_result (tree decl)
803 /* If the value is supposed to be returned in memory, then clearly
804 it is not returned in a stack register. */
805 if (aggregate_value_p (DECL_RESULT (decl), decl))
808 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
811 #ifdef FUNCTION_OUTGOING_VALUE
813 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
815 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
819 return result != 0 && STACK_REG_P (result) ? result : 0;
824 * This section deals with stack register substitution, and forms the second
828 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
829 the desired hard REGNO. */
832 replace_reg (rtx *reg, int regno)
834 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
835 || ! STACK_REG_P (*reg))
838 switch (GET_MODE_CLASS (GET_MODE (*reg)))
842 case MODE_COMPLEX_FLOAT:;
845 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
848 /* Remove a note of type NOTE, which must be found, for register
849 number REGNO from INSN. Remove only one such note. */
852 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
854 rtx *note_link, this;
856 note_link = ®_NOTES (insn);
857 for (this = *note_link; this; this = XEXP (this, 1))
858 if (REG_NOTE_KIND (this) == note
859 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
861 *note_link = XEXP (this, 1);
865 note_link = &XEXP (this, 1);
870 /* Find the hard register number of virtual register REG in REGSTACK.
871 The hard register number is relative to the top of the stack. -1 is
872 returned if the register is not found. */
875 get_hard_regnum (stack regstack, rtx reg)
879 if (! STACK_REG_P (reg))
882 for (i = regstack->top; i >= 0; i--)
883 if (regstack->reg[i] == REGNO (reg))
886 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
889 /* Emit an insn to pop virtual register REG before or after INSN.
890 REGSTACK is the stack state after INSN and is updated to reflect this
891 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
892 is represented as a SET whose destination is the register to be popped
893 and source is the top of stack. A death note for the top of stack
894 cases the movdf pattern to pop. */
897 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
899 rtx pop_insn, pop_rtx;
902 /* For complex types take care to pop both halves. These may survive in
903 CLOBBER and USE expressions. */
904 if (COMPLEX_MODE_P (GET_MODE (reg)))
906 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
907 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
910 if (get_hard_regnum (regstack, reg1) >= 0)
911 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
912 if (get_hard_regnum (regstack, reg2) >= 0)
913 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
919 hard_regno = get_hard_regnum (regstack, reg);
921 if (hard_regno < FIRST_STACK_REG)
924 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
925 FP_MODE_REG (FIRST_STACK_REG, DFmode));
927 if (where == EMIT_AFTER)
928 pop_insn = emit_insn_after (pop_rtx, insn);
930 pop_insn = emit_insn_before (pop_rtx, insn);
933 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
934 REG_NOTES (pop_insn));
936 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
937 = regstack->reg[regstack->top];
939 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
944 /* Emit an insn before or after INSN to swap virtual register REG with
945 the top of stack. REGSTACK is the stack state before the swap, and
946 is updated to reflect the swap. A swap insn is represented as a
947 PARALLEL of two patterns: each pattern moves one reg to the other.
949 If REG is already at the top of the stack, no insn is emitted. */
952 emit_swap_insn (rtx insn, stack regstack, rtx reg)
956 int tmp, other_reg; /* swap regno temps */
957 rtx i1; /* the stack-reg insn prior to INSN */
958 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
960 hard_regno = get_hard_regnum (regstack, reg);
962 if (hard_regno < FIRST_STACK_REG)
964 if (hard_regno == FIRST_STACK_REG)
967 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
969 tmp = regstack->reg[other_reg];
970 regstack->reg[other_reg] = regstack->reg[regstack->top];
971 regstack->reg[regstack->top] = tmp;
973 /* Find the previous insn involving stack regs, but don't pass a
976 if (current_block && insn != BB_HEAD (current_block))
978 rtx tmp = PREV_INSN (insn);
979 rtx limit = PREV_INSN (BB_HEAD (current_block));
982 if (GET_CODE (tmp) == CODE_LABEL
983 || GET_CODE (tmp) == CALL_INSN
984 || NOTE_INSN_BASIC_BLOCK_P (tmp)
985 || (GET_CODE (tmp) == INSN
986 && stack_regs_mentioned (tmp)))
991 tmp = PREV_INSN (tmp);
996 && (i1set = single_set (i1)) != NULL_RTX)
998 rtx i1src = *get_true_reg (&SET_SRC (i1set));
999 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1001 /* If the previous register stack push was from the reg we are to
1002 swap with, omit the swap. */
1004 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1005 && GET_CODE (i1src) == REG
1006 && REGNO (i1src) == (unsigned) hard_regno - 1
1007 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1010 /* If the previous insn wrote to the reg we are to swap with,
1013 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1014 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1015 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1019 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1020 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1023 emit_insn_after (swap_rtx, i1);
1024 else if (current_block)
1025 emit_insn_before (swap_rtx, BB_HEAD (current_block));
1027 emit_insn_before (swap_rtx, insn);
1030 /* Handle a move to or from a stack register in PAT, which is in INSN.
1031 REGSTACK is the current stack. Return whether a control flow insn
1032 was deleted in the process. */
1035 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
1037 rtx *psrc = get_true_reg (&SET_SRC (pat));
1038 rtx *pdest = get_true_reg (&SET_DEST (pat));
1041 bool control_flow_insn_deleted = false;
1043 src = *psrc; dest = *pdest;
1045 if (STACK_REG_P (src) && STACK_REG_P (dest))
1047 /* Write from one stack reg to another. If SRC dies here, then
1048 just change the register mapping and delete the insn. */
1050 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1055 /* If this is a no-op move, there must not be a REG_DEAD note. */
1056 if (REGNO (src) == REGNO (dest))
1059 for (i = regstack->top; i >= 0; i--)
1060 if (regstack->reg[i] == REGNO (src))
1063 /* The destination must be dead, or life analysis is borked. */
1064 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1067 /* If the source is not live, this is yet another case of
1068 uninitialized variables. Load up a NaN instead. */
1071 PATTERN (insn) = pat
1072 = gen_rtx_SET (VOIDmode,
1073 FP_MODE_REG (REGNO (dest), SFmode), nan);
1074 INSN_CODE (insn) = -1;
1075 return move_for_stack_reg (insn, regstack, pat);
1078 /* It is possible that the dest is unused after this insn.
1079 If so, just pop the src. */
1081 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1082 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1085 regstack->reg[i] = REGNO (dest);
1086 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1087 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1090 control_flow_insn_deleted |= control_flow_insn_p (insn);
1092 return control_flow_insn_deleted;
1095 /* The source reg does not die. */
1097 /* If this appears to be a no-op move, delete it, or else it
1098 will confuse the machine description output patterns. But if
1099 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1100 for REG_UNUSED will not work for deleted insns. */
1102 if (REGNO (src) == REGNO (dest))
1104 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1105 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1107 control_flow_insn_deleted |= control_flow_insn_p (insn);
1109 return control_flow_insn_deleted;
1112 /* The destination ought to be dead. */
1113 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1116 replace_reg (psrc, get_hard_regnum (regstack, src));
1118 regstack->reg[++regstack->top] = REGNO (dest);
1119 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1120 replace_reg (pdest, FIRST_STACK_REG);
1122 else if (STACK_REG_P (src))
1124 /* Save from a stack reg to MEM, or possibly integer reg. Since
1125 only top of stack may be saved, emit an exchange first if
1128 emit_swap_insn (insn, regstack, src);
1130 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1133 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1135 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1137 else if ((GET_MODE (src) == XFmode)
1138 && regstack->top < REG_STACK_SIZE - 1)
1140 /* A 387 cannot write an XFmode value to a MEM without
1141 clobbering the source reg. The output code can handle
1142 this by reading back the value from the MEM.
1143 But it is more efficient to use a temp register if one is
1144 available. Push the source value here if the register
1145 stack is not full, and then write the value to memory via
1147 rtx push_rtx, push_insn;
1148 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1150 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1151 push_insn = emit_insn_before (push_rtx, insn);
1152 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1156 replace_reg (psrc, FIRST_STACK_REG);
1158 else if (STACK_REG_P (dest))
1160 /* Load from MEM, or possibly integer REG or constant, into the
1161 stack regs. The actual target is always the top of the
1162 stack. The stack mapping is changed to reflect that DEST is
1163 now at top of stack. */
1165 /* The destination ought to be dead. */
1166 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1169 if (regstack->top >= REG_STACK_SIZE)
1172 regstack->reg[++regstack->top] = REGNO (dest);
1173 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1174 replace_reg (pdest, FIRST_STACK_REG);
1179 return control_flow_insn_deleted;
1182 /* Swap the condition on a branch, if there is one. Return true if we
1183 found a condition to swap. False if the condition was not used as
1187 swap_rtx_condition_1 (rtx pat)
1192 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1194 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1199 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1200 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1206 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1207 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1209 else if (fmt[i] == 'e')
1210 r |= swap_rtx_condition_1 (XEXP (pat, i));
1218 swap_rtx_condition (rtx insn)
1220 rtx pat = PATTERN (insn);
1222 /* We're looking for a single set to cc0 or an HImode temporary. */
1224 if (GET_CODE (pat) == SET
1225 && GET_CODE (SET_DEST (pat)) == REG
1226 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1228 insn = next_flags_user (insn);
1229 if (insn == NULL_RTX)
1231 pat = PATTERN (insn);
1234 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1235 not doing anything with the cc value right now. We may be able to
1236 search for one though. */
1238 if (GET_CODE (pat) == SET
1239 && GET_CODE (SET_SRC (pat)) == UNSPEC
1240 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1242 rtx dest = SET_DEST (pat);
1244 /* Search forward looking for the first use of this value.
1245 Stop at block boundaries. */
1246 while (insn != BB_END (current_block))
1248 insn = NEXT_INSN (insn);
1249 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1251 if (GET_CODE (insn) == CALL_INSN)
1255 /* So we've found the insn using this value. If it is anything
1256 other than sahf, aka unspec 10, or the value does not die
1257 (meaning we'd have to search further), then we must give up. */
1258 pat = PATTERN (insn);
1259 if (GET_CODE (pat) != SET
1260 || GET_CODE (SET_SRC (pat)) != UNSPEC
1261 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1262 || ! dead_or_set_p (insn, dest))
1265 /* Now we are prepared to handle this as a normal cc0 setter. */
1266 insn = next_flags_user (insn);
1267 if (insn == NULL_RTX)
1269 pat = PATTERN (insn);
1272 if (swap_rtx_condition_1 (pat))
1275 INSN_CODE (insn) = -1;
1276 if (recog_memoized (insn) == -1)
1278 /* In case the flags don't die here, recurse to try fix
1279 following user too. */
1280 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1282 insn = next_flags_user (insn);
1283 if (!insn || !swap_rtx_condition (insn))
1288 swap_rtx_condition_1 (pat);
1296 /* Handle a comparison. Special care needs to be taken to avoid
1297 causing comparisons that a 387 cannot do correctly, such as EQ.
1299 Also, a pop insn may need to be emitted. The 387 does have an
1300 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1301 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1305 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1308 rtx src1_note, src2_note;
1311 src1 = get_true_reg (&XEXP (pat_src, 0));
1312 src2 = get_true_reg (&XEXP (pat_src, 1));
1313 flags_user = next_flags_user (insn);
1315 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1316 registers that die in this insn - move those to stack top first. */
1317 if ((! STACK_REG_P (*src1)
1318 || (STACK_REG_P (*src2)
1319 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1320 && swap_rtx_condition (insn))
1323 temp = XEXP (pat_src, 0);
1324 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1325 XEXP (pat_src, 1) = temp;
1327 src1 = get_true_reg (&XEXP (pat_src, 0));
1328 src2 = get_true_reg (&XEXP (pat_src, 1));
1330 INSN_CODE (insn) = -1;
1333 /* We will fix any death note later. */
1335 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1337 if (STACK_REG_P (*src2))
1338 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1340 src2_note = NULL_RTX;
1342 emit_swap_insn (insn, regstack, *src1);
1344 replace_reg (src1, FIRST_STACK_REG);
1346 if (STACK_REG_P (*src2))
1347 replace_reg (src2, get_hard_regnum (regstack, *src2));
1351 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1352 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1355 /* If the second operand dies, handle that. But if the operands are
1356 the same stack register, don't bother, because only one death is
1357 needed, and it was just handled. */
1360 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1361 && REGNO (*src1) == REGNO (*src2)))
1363 /* As a special case, two regs may die in this insn if src2 is
1364 next to top of stack and the top of stack also dies. Since
1365 we have already popped src1, "next to top of stack" is really
1366 at top (FIRST_STACK_REG) now. */
1368 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1371 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1372 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1376 /* The 386 can only represent death of the first operand in
1377 the case handled above. In all other cases, emit a separate
1378 pop and remove the death note from here. */
1380 /* link_cc0_insns (insn); */
1382 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1384 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1390 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1391 is the current register layout. Return whether a control flow insn
1392 was deleted in the process. */
1395 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1398 bool control_flow_insn_deleted = false;
1400 switch (GET_CODE (pat))
1403 /* Deaths in USE insns can happen in non optimizing compilation.
1404 Handle them by popping the dying register. */
1405 src = get_true_reg (&XEXP (pat, 0));
1406 if (STACK_REG_P (*src)
1407 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1409 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1410 return control_flow_insn_deleted;
1412 /* ??? Uninitialized USE should not happen. */
1413 else if (get_hard_regnum (regstack, *src) == -1)
1421 dest = get_true_reg (&XEXP (pat, 0));
1422 if (STACK_REG_P (*dest))
1424 note = find_reg_note (insn, REG_DEAD, *dest);
1426 if (pat != PATTERN (insn))
1428 /* The fix_truncdi_1 pattern wants to be able to allocate
1429 it's own scratch register. It does this by clobbering
1430 an fp reg so that it is assured of an empty reg-stack
1431 register. If the register is live, kill it now.
1432 Remove the DEAD/UNUSED note so we don't try to kill it
1436 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1439 note = find_reg_note (insn, REG_UNUSED, *dest);
1443 remove_note (insn, note);
1444 replace_reg (dest, FIRST_STACK_REG + 1);
1448 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1449 indicates an uninitialized value. Because reload removed
1450 all other clobbers, this must be due to a function
1451 returning without a value. Load up a NaN. */
1454 && get_hard_regnum (regstack, *dest) == -1)
1456 pat = gen_rtx_SET (VOIDmode,
1457 FP_MODE_REG (REGNO (*dest), SFmode),
1459 PATTERN (insn) = pat;
1460 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1462 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1463 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1465 pat = gen_rtx_SET (VOIDmode,
1466 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1468 PATTERN (insn) = pat;
1469 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1478 rtx *src1 = (rtx *) 0, *src2;
1479 rtx src1_note, src2_note;
1482 dest = get_true_reg (&SET_DEST (pat));
1483 src = get_true_reg (&SET_SRC (pat));
1484 pat_src = SET_SRC (pat);
1486 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1487 if (STACK_REG_P (*src)
1488 || (STACK_REG_P (*dest)
1489 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1490 || GET_CODE (*src) == CONST_DOUBLE)))
1492 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1496 switch (GET_CODE (pat_src))
1499 compare_for_stack_reg (insn, regstack, pat_src);
1505 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1508 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1509 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1512 replace_reg (dest, FIRST_STACK_REG);
1516 /* This is a `tstM2' case. */
1517 if (*dest != cc0_rtx)
1523 case FLOAT_TRUNCATE:
1527 /* These insns only operate on the top of the stack. DEST might
1528 be cc0_rtx if we're processing a tstM pattern. Also, it's
1529 possible that the tstM case results in a REG_DEAD note on the
1533 src1 = get_true_reg (&XEXP (pat_src, 0));
1535 emit_swap_insn (insn, regstack, *src1);
1537 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1539 if (STACK_REG_P (*dest))
1540 replace_reg (dest, FIRST_STACK_REG);
1544 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1546 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1549 replace_reg (src1, FIRST_STACK_REG);
1554 /* On i386, reversed forms of subM3 and divM3 exist for
1555 MODE_FLOAT, so the same code that works for addM3 and mulM3
1559 /* These insns can accept the top of stack as a destination
1560 from a stack reg or mem, or can use the top of stack as a
1561 source and some other stack register (possibly top of stack)
1562 as a destination. */
1564 src1 = get_true_reg (&XEXP (pat_src, 0));
1565 src2 = get_true_reg (&XEXP (pat_src, 1));
1567 /* We will fix any death note later. */
1569 if (STACK_REG_P (*src1))
1570 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1572 src1_note = NULL_RTX;
1573 if (STACK_REG_P (*src2))
1574 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1576 src2_note = NULL_RTX;
1578 /* If either operand is not a stack register, then the dest
1579 must be top of stack. */
1581 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1582 emit_swap_insn (insn, regstack, *dest);
1585 /* Both operands are REG. If neither operand is already
1586 at the top of stack, choose to make the one that is the dest
1587 the new top of stack. */
1589 int src1_hard_regnum, src2_hard_regnum;
1591 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1592 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1593 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1596 if (src1_hard_regnum != FIRST_STACK_REG
1597 && src2_hard_regnum != FIRST_STACK_REG)
1598 emit_swap_insn (insn, regstack, *dest);
1601 if (STACK_REG_P (*src1))
1602 replace_reg (src1, get_hard_regnum (regstack, *src1));
1603 if (STACK_REG_P (*src2))
1604 replace_reg (src2, get_hard_regnum (regstack, *src2));
1608 rtx src1_reg = XEXP (src1_note, 0);
1610 /* If the register that dies is at the top of stack, then
1611 the destination is somewhere else - merely substitute it.
1612 But if the reg that dies is not at top of stack, then
1613 move the top of stack to the dead reg, as though we had
1614 done the insn and then a store-with-pop. */
1616 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1618 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1619 replace_reg (dest, get_hard_regnum (regstack, *dest));
1623 int regno = get_hard_regnum (regstack, src1_reg);
1625 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1626 replace_reg (dest, regno);
1628 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1629 = regstack->reg[regstack->top];
1632 CLEAR_HARD_REG_BIT (regstack->reg_set,
1633 REGNO (XEXP (src1_note, 0)));
1634 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1639 rtx src2_reg = XEXP (src2_note, 0);
1640 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1642 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1643 replace_reg (dest, get_hard_regnum (regstack, *dest));
1647 int regno = get_hard_regnum (regstack, src2_reg);
1649 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1650 replace_reg (dest, regno);
1652 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1653 = regstack->reg[regstack->top];
1656 CLEAR_HARD_REG_BIT (regstack->reg_set,
1657 REGNO (XEXP (src2_note, 0)));
1658 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1663 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1664 replace_reg (dest, get_hard_regnum (regstack, *dest));
1667 /* Keep operand 1 matching with destination. */
1668 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1669 && REG_P (*src1) && REG_P (*src2)
1670 && REGNO (*src1) != REGNO (*dest))
1672 int tmp = REGNO (*src1);
1673 replace_reg (src1, REGNO (*src2));
1674 replace_reg (src2, tmp);
1679 switch (XINT (pat_src, 1))
1683 case UNSPEC_FRNDINT:
1685 /* These insns only operate on the top of the stack. */
1687 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1689 emit_swap_insn (insn, regstack, *src1);
1691 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1693 if (STACK_REG_P (*dest))
1694 replace_reg (dest, FIRST_STACK_REG);
1698 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1700 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1703 replace_reg (src1, FIRST_STACK_REG);
1709 /* These insns operate on the top two stack slots. */
1711 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1712 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1714 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1715 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1718 struct stack_def temp_stack;
1719 int regno, j, k, temp;
1721 temp_stack = *regstack;
1723 /* Place operand 1 at the top of stack. */
1724 regno = get_hard_regnum (&temp_stack, *src1);
1727 if (regno != FIRST_STACK_REG)
1729 k = temp_stack.top - (regno - FIRST_STACK_REG);
1732 temp = temp_stack.reg[k];
1733 temp_stack.reg[k] = temp_stack.reg[j];
1734 temp_stack.reg[j] = temp;
1737 /* Place operand 2 next on the stack. */
1738 regno = get_hard_regnum (&temp_stack, *src2);
1741 if (regno != FIRST_STACK_REG + 1)
1743 k = temp_stack.top - (regno - FIRST_STACK_REG);
1744 j = temp_stack.top - 1;
1746 temp = temp_stack.reg[k];
1747 temp_stack.reg[k] = temp_stack.reg[j];
1748 temp_stack.reg[j] = temp;
1751 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1754 replace_reg (src1, FIRST_STACK_REG);
1755 replace_reg (src2, FIRST_STACK_REG + 1);
1758 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1760 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1762 /* Pop both input operands from the stack. */
1763 CLEAR_HARD_REG_BIT (regstack->reg_set,
1764 regstack->reg[regstack->top]);
1765 CLEAR_HARD_REG_BIT (regstack->reg_set,
1766 regstack->reg[regstack->top - 1]);
1769 /* Push the result back onto the stack. */
1770 regstack->reg[++regstack->top] = REGNO (*dest);
1771 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1772 replace_reg (dest, FIRST_STACK_REG);
1776 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1777 The combination matches the PPRO fcomi instruction. */
1779 pat_src = XVECEXP (pat_src, 0, 0);
1780 if (GET_CODE (pat_src) != UNSPEC
1781 || XINT (pat_src, 1) != UNSPEC_FNSTSW)
1786 /* Combined fcomp+fnstsw generated for doing well with
1787 CSE. When optimizing this would have been broken
1790 pat_src = XVECEXP (pat_src, 0, 0);
1791 if (GET_CODE (pat_src) != COMPARE)
1794 compare_for_stack_reg (insn, regstack, pat_src);
1803 /* This insn requires the top of stack to be the destination. */
1805 src1 = get_true_reg (&XEXP (pat_src, 1));
1806 src2 = get_true_reg (&XEXP (pat_src, 2));
1808 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1809 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1811 /* If the comparison operator is an FP comparison operator,
1812 it is handled correctly by compare_for_stack_reg () who
1813 will move the destination to the top of stack. But if the
1814 comparison operator is not an FP comparison operator, we
1815 have to handle it here. */
1816 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1817 && REGNO (*dest) != regstack->reg[regstack->top])
1819 /* In case one of operands is the top of stack and the operands
1820 dies, it is safe to make it the destination operand by
1821 reversing the direction of cmove and avoid fxch. */
1822 if ((REGNO (*src1) == regstack->reg[regstack->top]
1824 || (REGNO (*src2) == regstack->reg[regstack->top]
1827 int idx1 = (get_hard_regnum (regstack, *src1)
1829 int idx2 = (get_hard_regnum (regstack, *src2)
1832 /* Make reg-stack believe that the operands are already
1833 swapped on the stack */
1834 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1835 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1837 /* Reverse condition to compensate the operand swap.
1838 i386 do have comparison always reversible. */
1839 PUT_CODE (XEXP (pat_src, 0),
1840 reversed_comparison_code (XEXP (pat_src, 0), insn));
1843 emit_swap_insn (insn, regstack, *dest);
1851 src_note[1] = src1_note;
1852 src_note[2] = src2_note;
1854 if (STACK_REG_P (*src1))
1855 replace_reg (src1, get_hard_regnum (regstack, *src1));
1856 if (STACK_REG_P (*src2))
1857 replace_reg (src2, get_hard_regnum (regstack, *src2));
1859 for (i = 1; i <= 2; i++)
1862 int regno = REGNO (XEXP (src_note[i], 0));
1864 /* If the register that dies is not at the top of
1865 stack, then move the top of stack to the dead reg */
1866 if (regno != regstack->reg[regstack->top])
1868 remove_regno_note (insn, REG_DEAD, regno);
1869 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1873 /* Top of stack never dies, as it is the
1879 /* Make dest the top of stack. Add dest to regstack if
1881 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1882 regstack->reg[++regstack->top] = REGNO (*dest);
1883 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1884 replace_reg (dest, FIRST_STACK_REG);
1897 return control_flow_insn_deleted;
1900 /* Substitute hard regnums for any stack regs in INSN, which has
1901 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1902 before the insn, and is updated with changes made here.
1904 There are several requirements and assumptions about the use of
1905 stack-like regs in asm statements. These rules are enforced by
1906 record_asm_stack_regs; see comments there for details. Any
1907 asm_operands left in the RTL at this point may be assume to meet the
1908 requirements, since record_asm_stack_regs removes any problem asm. */
1911 subst_asm_stack_regs (rtx insn, stack regstack)
1913 rtx body = PATTERN (insn);
1916 rtx *note_reg; /* Array of note contents */
1917 rtx **note_loc; /* Address of REG field of each note */
1918 enum reg_note *note_kind; /* The type of each note */
1920 rtx *clobber_reg = 0;
1921 rtx **clobber_loc = 0;
1923 struct stack_def temp_stack;
1928 int n_inputs, n_outputs;
1930 if (! check_asm_stack_operands (insn))
1933 /* Find out what the constraints required. If no constraint
1934 alternative matches, that is a compiler bug: we should have caught
1935 such an insn in check_asm_stack_operands. */
1936 extract_insn (insn);
1937 constrain_operands (1);
1938 alt = which_alternative;
1940 preprocess_constraints ();
1942 n_inputs = get_asm_operand_n_inputs (body);
1943 n_outputs = recog_data.n_operands - n_inputs;
1948 /* Strip SUBREGs here to make the following code simpler. */
1949 for (i = 0; i < recog_data.n_operands; i++)
1950 if (GET_CODE (recog_data.operand[i]) == SUBREG
1951 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1953 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1954 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1957 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1959 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1962 note_reg = alloca (i * sizeof (rtx));
1963 note_loc = alloca (i * sizeof (rtx *));
1964 note_kind = alloca (i * sizeof (enum reg_note));
1967 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1969 rtx reg = XEXP (note, 0);
1970 rtx *loc = & XEXP (note, 0);
1972 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1974 loc = & SUBREG_REG (reg);
1975 reg = SUBREG_REG (reg);
1978 if (STACK_REG_P (reg)
1979 && (REG_NOTE_KIND (note) == REG_DEAD
1980 || REG_NOTE_KIND (note) == REG_UNUSED))
1982 note_reg[n_notes] = reg;
1983 note_loc[n_notes] = loc;
1984 note_kind[n_notes] = REG_NOTE_KIND (note);
1989 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1993 if (GET_CODE (body) == PARALLEL)
1995 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
1996 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
1998 for (i = 0; i < XVECLEN (body, 0); i++)
1999 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2001 rtx clobber = XVECEXP (body, 0, i);
2002 rtx reg = XEXP (clobber, 0);
2003 rtx *loc = & XEXP (clobber, 0);
2005 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2007 loc = & SUBREG_REG (reg);
2008 reg = SUBREG_REG (reg);
2011 if (STACK_REG_P (reg))
2013 clobber_reg[n_clobbers] = reg;
2014 clobber_loc[n_clobbers] = loc;
2020 temp_stack = *regstack;
2022 /* Put the input regs into the desired place in TEMP_STACK. */
2024 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2025 if (STACK_REG_P (recog_data.operand[i])
2026 && reg_class_subset_p (recog_op_alt[i][alt].class,
2028 && recog_op_alt[i][alt].class != FLOAT_REGS)
2030 /* If an operand needs to be in a particular reg in
2031 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2032 these constraints are for single register classes, and
2033 reload guaranteed that operand[i] is already in that class,
2034 we can just use REGNO (recog_data.operand[i]) to know which
2035 actual reg this operand needs to be in. */
2037 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2042 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2044 /* recog_data.operand[i] is not in the right place. Find
2045 it and swap it with whatever is already in I's place.
2046 K is where recog_data.operand[i] is now. J is where it
2050 k = temp_stack.top - (regno - FIRST_STACK_REG);
2052 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2054 temp = temp_stack.reg[k];
2055 temp_stack.reg[k] = temp_stack.reg[j];
2056 temp_stack.reg[j] = temp;
2060 /* Emit insns before INSN to make sure the reg-stack is in the right
2063 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2065 /* Make the needed input register substitutions. Do death notes and
2066 clobbers too, because these are for inputs, not outputs. */
2068 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2069 if (STACK_REG_P (recog_data.operand[i]))
2071 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2076 replace_reg (recog_data.operand_loc[i], regnum);
2079 for (i = 0; i < n_notes; i++)
2080 if (note_kind[i] == REG_DEAD)
2082 int regnum = get_hard_regnum (regstack, note_reg[i]);
2087 replace_reg (note_loc[i], regnum);
2090 for (i = 0; i < n_clobbers; i++)
2092 /* It's OK for a CLOBBER to reference a reg that is not live.
2093 Don't try to replace it in that case. */
2094 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2098 /* Sigh - clobbers always have QImode. But replace_reg knows
2099 that these regs can't be MODE_INT and will abort. Just put
2100 the right reg there without calling replace_reg. */
2102 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2106 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2108 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2109 if (STACK_REG_P (recog_data.operand[i]))
2111 /* An input reg is implicitly popped if it is tied to an
2112 output, or if there is a CLOBBER for it. */
2115 for (j = 0; j < n_clobbers; j++)
2116 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2119 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2121 /* recog_data.operand[i] might not be at the top of stack.
2122 But that's OK, because all we need to do is pop the
2123 right number of regs off of the top of the reg-stack.
2124 record_asm_stack_regs guaranteed that all implicitly
2125 popped regs were grouped at the top of the reg-stack. */
2127 CLEAR_HARD_REG_BIT (regstack->reg_set,
2128 regstack->reg[regstack->top]);
2133 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2134 Note that there isn't any need to substitute register numbers.
2135 ??? Explain why this is true. */
2137 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2139 /* See if there is an output for this hard reg. */
2142 for (j = 0; j < n_outputs; j++)
2143 if (STACK_REG_P (recog_data.operand[j])
2144 && REGNO (recog_data.operand[j]) == (unsigned) i)
2146 regstack->reg[++regstack->top] = i;
2147 SET_HARD_REG_BIT (regstack->reg_set, i);
2152 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2153 input that the asm didn't implicitly pop. If the asm didn't
2154 implicitly pop an input reg, that reg will still be live.
2156 Note that we can't use find_regno_note here: the register numbers
2157 in the death notes have already been substituted. */
2159 for (i = 0; i < n_outputs; i++)
2160 if (STACK_REG_P (recog_data.operand[i]))
2164 for (j = 0; j < n_notes; j++)
2165 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2166 && note_kind[j] == REG_UNUSED)
2168 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2174 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2175 if (STACK_REG_P (recog_data.operand[i]))
2179 for (j = 0; j < n_notes; j++)
2180 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2181 && note_kind[j] == REG_DEAD
2182 && TEST_HARD_REG_BIT (regstack->reg_set,
2183 REGNO (recog_data.operand[i])))
2185 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2192 /* Substitute stack hard reg numbers for stack virtual registers in
2193 INSN. Non-stack register numbers are not changed. REGSTACK is the
2194 current stack content. Insns may be emitted as needed to arrange the
2195 stack for the 387 based on the contents of the insn. Return whether
2196 a control flow insn was deleted in the process. */
2199 subst_stack_regs (rtx insn, stack regstack)
2201 rtx *note_link, note;
2202 bool control_flow_insn_deleted = false;
2205 if (GET_CODE (insn) == CALL_INSN)
2207 int top = regstack->top;
2209 /* If there are any floating point parameters to be passed in
2210 registers for this call, make sure they are in the right
2215 straighten_stack (PREV_INSN (insn), regstack);
2217 /* Now mark the arguments as dead after the call. */
2219 while (regstack->top >= 0)
2221 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2227 /* Do the actual substitution if any stack regs are mentioned.
2228 Since we only record whether entire insn mentions stack regs, and
2229 subst_stack_regs_pat only works for patterns that contain stack regs,
2230 we must check each pattern in a parallel here. A call_value_pop could
2233 if (stack_regs_mentioned (insn))
2235 int n_operands = asm_noperands (PATTERN (insn));
2236 if (n_operands >= 0)
2238 /* This insn is an `asm' with operands. Decode the operands,
2239 decide how many are inputs, and do register substitution.
2240 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2242 subst_asm_stack_regs (insn, regstack);
2243 return control_flow_insn_deleted;
2246 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2247 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2249 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2250 control_flow_insn_deleted
2251 |= subst_stack_regs_pat (insn, regstack,
2252 XVECEXP (PATTERN (insn), 0, i));
2255 control_flow_insn_deleted
2256 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2259 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2260 REG_UNUSED will already have been dealt with, so just return. */
2262 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn))
2263 return control_flow_insn_deleted;
2265 /* If there is a REG_UNUSED note on a stack register on this insn,
2266 the indicated reg must be popped. The REG_UNUSED note is removed,
2267 since the form of the newly emitted pop insn references the reg,
2268 making it no longer `unset'. */
2270 note_link = ®_NOTES (insn);
2271 for (note = *note_link; note; note = XEXP (note, 1))
2272 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2274 *note_link = XEXP (note, 1);
2275 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2278 note_link = &XEXP (note, 1);
2280 return control_flow_insn_deleted;
2283 /* Change the organization of the stack so that it fits a new basic
2284 block. Some registers might have to be popped, but there can never be
2285 a register live in the new block that is not now live.
2287 Insert any needed insns before or after INSN, as indicated by
2288 WHERE. OLD is the original stack layout, and NEW is the desired
2289 form. OLD is updated to reflect the code emitted, ie, it will be
2290 the same as NEW upon return.
2292 This function will not preserve block_end[]. But that information
2293 is no longer needed once this has executed. */
2296 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2301 /* We will be inserting new insns "backwards". If we are to insert
2302 after INSN, find the next insn, and insert before it. */
2304 if (where == EMIT_AFTER)
2306 if (current_block && BB_END (current_block) == insn)
2308 insn = NEXT_INSN (insn);
2311 /* Pop any registers that are not needed in the new block. */
2313 for (reg = old->top; reg >= 0; reg--)
2314 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2315 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2320 /* If the new block has never been processed, then it can inherit
2321 the old stack order. */
2323 new->top = old->top;
2324 memcpy (new->reg, old->reg, sizeof (new->reg));
2328 /* This block has been entered before, and we must match the
2329 previously selected stack order. */
2331 /* By now, the only difference should be the order of the stack,
2332 not their depth or liveliness. */
2334 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2337 if (old->top != new->top)
2340 /* If the stack is not empty (new->top != -1), loop here emitting
2341 swaps until the stack is correct.
2343 The worst case number of swaps emitted is N + 2, where N is the
2344 depth of the stack. In some cases, the reg at the top of
2345 stack may be correct, but swapped anyway in order to fix
2346 other regs. But since we never swap any other reg away from
2347 its correct slot, this algorithm will converge. */
2352 /* Swap the reg at top of stack into the position it is
2353 supposed to be in, until the correct top of stack appears. */
2355 while (old->reg[old->top] != new->reg[new->top])
2357 for (reg = new->top; reg >= 0; reg--)
2358 if (new->reg[reg] == old->reg[old->top])
2364 emit_swap_insn (insn, old,
2365 FP_MODE_REG (old->reg[reg], DFmode));
2368 /* See if any regs remain incorrect. If so, bring an
2369 incorrect reg to the top of stack, and let the while loop
2372 for (reg = new->top; reg >= 0; reg--)
2373 if (new->reg[reg] != old->reg[reg])
2375 emit_swap_insn (insn, old,
2376 FP_MODE_REG (old->reg[reg], DFmode));
2381 /* At this point there must be no differences. */
2383 for (reg = old->top; reg >= 0; reg--)
2384 if (old->reg[reg] != new->reg[reg])
2389 BB_END (current_block) = PREV_INSN (insn);
2392 /* Print stack configuration. */
2395 print_stack (FILE *file, stack s)
2401 fprintf (file, "uninitialized\n");
2402 else if (s->top == -1)
2403 fprintf (file, "empty\n");
2408 for (i = 0; i <= s->top; ++i)
2409 fprintf (file, "%d ", s->reg[i]);
2410 fputs ("]\n", file);
2414 /* This function was doing life analysis. We now let the regular live
2415 code do it's job, so we only need to check some extra invariants
2416 that reg-stack expects. Primary among these being that all registers
2417 are initialized before use.
2419 The function returns true when code was emitted to CFG edges and
2420 commit_edge_insertions needs to be called. */
2423 convert_regs_entry (void)
2429 FOR_EACH_BB_REVERSE (block)
2431 block_info bi = BLOCK_INFO (block);
2434 /* Set current register status at last instruction `uninitialized'. */
2435 bi->stack_in.top = -2;
2437 /* Copy live_at_end and live_at_start into temporaries. */
2438 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2440 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2441 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2442 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2443 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2447 /* Load something into each stack register live at function entry.
2448 Such live registers can be caused by uninitialized variables or
2449 functions not returning values on all paths. In order to keep
2450 the push/pop code happy, and to not scrog the register stack, we
2451 must put something in these registers. Use a QNaN.
2453 Note that we are inserting converted code here. This code is
2454 never seen by the convert_regs pass. */
2456 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2458 basic_block block = e->dest;
2459 block_info bi = BLOCK_INFO (block);
2462 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2463 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2467 bi->stack_in.reg[++top] = reg;
2469 init = gen_rtx_SET (VOIDmode,
2470 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2472 insert_insn_on_edge (init, e);
2476 bi->stack_in.top = top;
2482 /* Construct the desired stack for function exit. This will either
2483 be `empty', or the function return value at top-of-stack. */
2486 convert_regs_exit (void)
2488 int value_reg_low, value_reg_high;
2492 retvalue = stack_result (current_function_decl);
2493 value_reg_low = value_reg_high = -1;
2496 value_reg_low = REGNO (retvalue);
2497 value_reg_high = value_reg_low
2498 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2501 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2502 if (value_reg_low == -1)
2503 output_stack->top = -1;
2508 output_stack->top = value_reg_high - value_reg_low;
2509 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2511 output_stack->reg[value_reg_high - reg] = reg;
2512 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2517 /* Adjust the stack of this block on exit to match the stack of the
2518 target block, or copy stack info into the stack of the successor
2519 of the successor hasn't been processed yet. */
2521 compensate_edge (edge e, FILE *file)
2523 basic_block block = e->src, target = e->dest;
2524 block_info bi = BLOCK_INFO (block);
2525 struct stack_def regstack, tmpstack;
2526 stack target_stack = &BLOCK_INFO (target)->stack_in;
2529 current_block = block;
2530 regstack = bi->stack_out;
2532 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2534 if (target_stack->top == -2)
2536 /* The target block hasn't had a stack order selected.
2537 We need merely ensure that no pops are needed. */
2538 for (reg = regstack.top; reg >= 0; --reg)
2539 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2545 fprintf (file, "new block; copying stack position\n");
2547 /* change_stack kills values in regstack. */
2548 tmpstack = regstack;
2550 change_stack (BB_END (block), &tmpstack, target_stack, EMIT_AFTER);
2555 fprintf (file, "new block; pops needed\n");
2559 if (target_stack->top == regstack.top)
2561 for (reg = target_stack->top; reg >= 0; --reg)
2562 if (target_stack->reg[reg] != regstack.reg[reg])
2568 fprintf (file, "no changes needed\n");
2575 fprintf (file, "correcting stack to ");
2576 print_stack (file, target_stack);
2580 /* Care for non-call EH edges specially. The normal return path have
2581 values in registers. These will be popped en masse by the unwind
2583 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2584 target_stack->top = -1;
2586 /* Other calls may appear to have values live in st(0), but the
2587 abnormal return path will not have actually loaded the values. */
2588 else if (e->flags & EDGE_ABNORMAL_CALL)
2590 /* Assert that the lifetimes are as we expect -- one value
2591 live at st(0) on the end of the source block, and no
2592 values live at the beginning of the destination block. */
2595 CLEAR_HARD_REG_SET (tmp);
2596 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2600 /* We are sure that there is st(0) live, otherwise we won't compensate.
2601 For complex return values, we may have st(1) live as well. */
2602 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2603 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
2604 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1);
2605 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2609 target_stack->top = -1;
2612 /* It is better to output directly to the end of the block
2613 instead of to the edge, because emit_swap can do minimal
2614 insn scheduling. We can do this when there is only one
2615 edge out, and it is not abnormal. */
2616 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2618 /* change_stack kills values in regstack. */
2619 tmpstack = regstack;
2621 change_stack (BB_END (block), &tmpstack, target_stack,
2622 (GET_CODE (BB_END (block)) == JUMP_INSN
2623 ? EMIT_BEFORE : EMIT_AFTER));
2629 /* We don't support abnormal edges. Global takes care to
2630 avoid any live register across them, so we should never
2631 have to insert instructions on such edges. */
2632 if (e->flags & EDGE_ABNORMAL)
2635 current_block = NULL;
2638 /* ??? change_stack needs some point to emit insns after. */
2639 after = emit_note (NOTE_INSN_DELETED);
2641 tmpstack = regstack;
2642 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2647 insert_insn_on_edge (seq, e);
2653 /* Convert stack register references in one block. */
2656 convert_regs_1 (FILE *file, basic_block block)
2658 struct stack_def regstack;
2659 block_info bi = BLOCK_INFO (block);
2660 int deleted, inserted, reg;
2662 edge e, beste = NULL;
2663 bool control_flow_insn_deleted = false;
2667 any_malformed_asm = false;
2669 /* Find the edge we will copy stack from. It should be the most frequent
2670 one as it will get cheapest after compensation code is generated,
2671 if multiple such exists, take one with largest count, prefer critical
2672 one (as splitting critical edges is more expensive), or one with lowest
2673 index, to avoid random changes with different orders of the edges. */
2674 for (e = block->pred; e ; e = e->pred_next)
2676 if (e->flags & EDGE_DFS_BACK)
2680 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2682 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2684 else if (beste->count < e->count)
2686 else if (beste->count > e->count)
2688 else if ((EDGE_CRITICAL_P (e) != 0)
2689 != (EDGE_CRITICAL_P (beste) != 0))
2691 if (EDGE_CRITICAL_P (e))
2694 else if (e->src->index < beste->src->index)
2698 /* Initialize stack at block entry. */
2699 if (bi->stack_in.top == -2)
2702 inserted |= compensate_edge (beste, file);
2705 /* No predecessors. Create an arbitrary input stack. */
2708 bi->stack_in.top = -1;
2709 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2710 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2711 bi->stack_in.reg[++bi->stack_in.top] = reg;
2715 /* Entry blocks do have stack already initialized. */
2718 current_block = block;
2722 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2723 print_stack (file, &bi->stack_in);
2726 /* Process all insns in this block. Keep track of NEXT so that we
2727 don't process insns emitted while substituting in INSN. */
2728 next = BB_HEAD (block);
2729 regstack = bi->stack_in;
2733 next = NEXT_INSN (insn);
2735 /* Ensure we have not missed a block boundary. */
2738 if (insn == BB_END (block))
2741 /* Don't bother processing unless there is a stack reg
2742 mentioned or if it's a CALL_INSN. */
2743 if (stack_regs_mentioned (insn)
2744 || GET_CODE (insn) == CALL_INSN)
2748 fprintf (file, " insn %d input stack: ",
2750 print_stack (file, ®stack);
2752 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
2759 fprintf (file, "Expected live registers [");
2760 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2761 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2762 fprintf (file, " %d", reg);
2763 fprintf (file, " ]\nOutput stack: ");
2764 print_stack (file, ®stack);
2767 insn = BB_END (block);
2768 if (GET_CODE (insn) == JUMP_INSN)
2769 insn = PREV_INSN (insn);
2771 /* If the function is declared to return a value, but it returns one
2772 in only some cases, some registers might come live here. Emit
2773 necessary moves for them. */
2775 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2777 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2778 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2784 fprintf (file, "Emitting insn initializing reg %d\n",
2788 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2790 insn = emit_insn_after (set, insn);
2791 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
2795 /* Amongst the insns possibly deleted during the substitution process above,
2796 might have been the only trapping insn in the block. We purge the now
2797 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2798 called at the end of convert_regs. The order in which we process the
2799 blocks ensures that we never delete an already processed edge.
2801 Note that, at this point, the CFG may have been damaged by the emission
2802 of instructions after an abnormal call, which moves the basic block end
2803 (and is the reason why we call fixup_abnormal_edges later). So we must
2804 be sure that the trapping insn has been deleted before trying to purge
2805 dead edges, otherwise we risk purging valid edges.
2807 ??? We are normally supposed not to delete trapping insns, so we pretend
2808 that the insns deleted above don't actually trap. It would have been
2809 better to detect this earlier and avoid creating the EH edge in the first
2810 place, still, but we don't have enough information at that time. */
2812 if (control_flow_insn_deleted)
2813 purge_dead_edges (block);
2815 /* Something failed if the stack lives don't match. If we had malformed
2816 asms, we zapped the instruction itself, but that didn't produce the
2817 same pattern of register kills as before. */
2818 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2819 if (!any_malformed_asm)
2822 bi->stack_out = regstack;
2824 /* Compensate the back edges, as those wasn't visited yet. */
2825 for (e = block->succ; e ; e = e->succ_next)
2827 if (e->flags & EDGE_DFS_BACK
2828 || (e->dest == EXIT_BLOCK_PTR))
2830 if (!BLOCK_INFO (e->dest)->done
2831 && e->dest != block)
2833 inserted |= compensate_edge (e, file);
2836 for (e = block->pred; e ; e = e->pred_next)
2838 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2839 && e->src != ENTRY_BLOCK_PTR)
2841 if (!BLOCK_INFO (e->src)->done)
2843 inserted |= compensate_edge (e, file);
2850 /* Convert registers in all blocks reachable from BLOCK. */
2853 convert_regs_2 (FILE *file, basic_block block)
2855 basic_block *stack, *sp;
2858 /* We process the blocks in a top-down manner, in a way such that one block
2859 is only processed after all its predecessors. The number of predecessors
2860 of every block has already been computed. */
2862 stack = xmalloc (sizeof (*stack) * n_basic_blocks);
2874 /* Processing BLOCK is achieved by convert_regs_1, which may purge
2875 some dead EH outgoing edge after the deletion of the trapping
2876 insn inside the block. Since the number of predecessors of
2877 BLOCK's successors was computed based on the initial edge set,
2878 we check the necessity to process some of these successors
2879 before such an edge deletion may happen. However, there is
2880 a pitfall: if BLOCK is the only predecessor of a successor and
2881 the edge between them happens to be deleted, the successor
2882 becomes unreachable and should not be processed. The problem
2883 is that there is no way to preventively detect this case so we
2884 stack the successor in all cases and hand over the task of
2885 fixing up the discrepancy to convert_regs_1. */
2887 for (e = block->succ; e ; e = e->succ_next)
2888 if (! (e->flags & EDGE_DFS_BACK))
2890 BLOCK_INFO (e->dest)->predecessors--;
2891 if (!BLOCK_INFO (e->dest)->predecessors)
2895 inserted |= convert_regs_1 (file, block);
2896 BLOCK_INFO (block)->done = 1;
2898 while (sp != stack);
2903 /* Traverse all basic blocks in a function, converting the register
2904 references in each insn from the "flat" register file that gcc uses,
2905 to the stack-like registers the 387 uses. */
2908 convert_regs (FILE *file)
2914 /* Initialize uninitialized registers on function entry. */
2915 inserted = convert_regs_entry ();
2917 /* Construct the desired stack for function exit. */
2918 convert_regs_exit ();
2919 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2921 /* ??? Future: process inner loops first, and give them arbitrary
2922 initial stacks which emit_swap_insn can modify. This ought to
2923 prevent double fxch that aften appears at the head of a loop. */
2925 /* Process all blocks reachable from all entry points. */
2926 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2927 inserted |= convert_regs_2 (file, e->dest);
2929 /* ??? Process all unreachable blocks. Though there's no excuse
2930 for keeping these even when not optimizing. */
2933 block_info bi = BLOCK_INFO (b);
2936 inserted |= convert_regs_2 (file, b);
2938 clear_aux_for_blocks ();
2940 fixup_abnormal_edges ();
2942 commit_edge_insertions ();
2949 #endif /* STACK_REGS */
2951 #include "gt-reg-stack.h"