2 * Copyright (C) 2005, 2007, 2009, 2011 Free Software Foundation, Inc.
4 * This file is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 3, or (at your option) any
9 * This file is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * Under Section 7 of GPL version 3, you are granted additional
15 * permissions described in the GCC Runtime Library Exception, version
16 * 3.1, as published by the Free Software Foundation.
18 * You should have received a copy of the GNU General Public License and
19 * a copy of the GCC Runtime Library Exception along with this program;
20 * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
21 * <http://www.gnu.org/licenses/>.
24 #define MXCSR_DAZ (1 << 6) /* Enable denormals are zero mode */
25 #define MXCSR_FTZ (1 << 15) /* Enable flush to zero mode */
28 /* All 64-bit targets have SSE and DAZ;
29 only check them explicitly for 32-bit ones. */
33 #if !defined __x86_64__ && defined __sun__ && defined __svr4__
37 static volatile sig_atomic_t sigill_caught;
40 sigill_hdlr (int sig __attribute((unused)),
41 siginfo_t *sip __attribute__((unused)),
45 /* Set PC to the instruction after the faulting one to skip over it,
46 otherwise we enter an infinite loop. 3 is the size of the movaps
48 ucp->uc_mcontext.gregs[EIP] += 3;
53 static void __attribute__((constructor))
55 /* The i386 ABI only requires 4-byte stack alignment, so this is necessary
56 to make sure the fxsave struct gets correct alignment.
57 See PR27537 and PR28621. */
58 __attribute__ ((force_align_arg_pointer))
63 unsigned int eax, ebx, ecx, edx;
65 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
72 #if defined __sun__ && defined __svr4__
73 /* Solaris 2 before Solaris 9 4/04 cannot execute SSE instructions even
74 if the CPU supports them. Programs receive SIGILL instead, so check
75 for that at runtime. */
76 struct sigaction act, oact;
78 act.sa_handler = sigill_hdlr;
79 sigemptyset (&act.sa_mask);
80 /* Need to set SA_SIGINFO so a ucontext_t * is passed to the handler. */
81 act.sa_flags = SA_SIGINFO;
82 sigaction (SIGILL, &act, &oact);
84 /* We need a single SSE instruction here so the handler can safely skip
86 __asm__ volatile ("movaps %xmm0,%xmm0");
88 sigaction (SIGILL, &oact, NULL);
92 #endif /* __sun__ && __svr4__ */
94 mxcsr = __builtin_ia32_stmxcsr () | MXCSR_FTZ;
98 /* Check if DAZ is available. */
101 unsigned short int cwd;
102 unsigned short int swd;
103 unsigned short int twd;
104 unsigned short int fop;
111 long int st_space[32];
112 long int xmm_space[32];
113 long int padding[56];
114 } __attribute__ ((aligned (16))) fxsave;
116 __builtin_memset (&fxsave, 0, sizeof (fxsave));
118 asm volatile ("fxsave %0" : "=m" (fxsave) : "m" (fxsave));
120 if (fxsave.mxcsr_mask & MXCSR_DAZ)
124 __builtin_ia32_ldmxcsr (mxcsr);
127 unsigned int mxcsr = __builtin_ia32_stmxcsr ();
128 mxcsr |= MXCSR_DAZ | MXCSR_FTZ;
129 __builtin_ia32_ldmxcsr (mxcsr);