1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 /* stdio.h must precede rtl.h for FFS. */
30 #include "hard-reg-set.h"
33 #include "insn-config.h"
38 #include "splay-tree.h"
40 /* The basic idea of common subexpression elimination is to go
41 through the code, keeping a record of expressions that would
42 have the same value at the current scan point, and replacing
43 expressions encountered with the cheapest equivalent expression.
45 It is too complicated to keep track of the different possibilities
46 when control paths merge in this code; so, at each label, we forget all
47 that is known and start fresh. This can be described as processing each
48 extended basic block separately. We have a separate pass to perform
51 Note CSE can turn a conditional or computed jump into a nop or
52 an unconditional jump. When this occurs we arrange to run the jump
53 optimizer after CSE to delete the unreachable code.
55 We use two data structures to record the equivalent expressions:
56 a hash table for most expressions, and several vectors together
57 with "quantity numbers" to record equivalent (pseudo) registers.
59 The use of the special data structure for registers is desirable
60 because it is faster. It is possible because registers references
61 contain a fairly small number, the register number, taken from
62 a contiguously allocated series, and two register references are
63 identical if they have the same number. General expressions
64 do not have any such thing, so the only way to retrieve the
65 information recorded on an expression other than a register
66 is to keep it in a hash table.
68 Registers and "quantity numbers":
70 At the start of each basic block, all of the (hardware and pseudo)
71 registers used in the function are given distinct quantity
72 numbers to indicate their contents. During scan, when the code
73 copies one register into another, we copy the quantity number.
74 When a register is loaded in any other way, we allocate a new
75 quantity number to describe the value generated by this operation.
76 `reg_qty' records what quantity a register is currently thought
79 All real quantity numbers are greater than or equal to `max_reg'.
80 If register N has not been assigned a quantity, reg_qty[N] will equal N.
82 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
83 variables should be referenced with an index below `max_reg'.
85 We also maintain a bidirectional chain of registers for each
86 quantity number. `qty_first_reg', `qty_last_reg',
87 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
89 The first register in a chain is the one whose lifespan is least local.
90 Among equals, it is the one that was seen first.
91 We replace any equivalent register with that one.
93 If two registers have the same quantity number, it must be true that
94 REG expressions with `qty_mode' must be in the hash table for both
95 registers and must be in the same class.
97 The converse is not true. Since hard registers may be referenced in
98 any mode, two REG expressions might be equivalent in the hash table
99 but not have the same quantity number if the quantity number of one
100 of the registers is not the same mode as those expressions.
102 Constants and quantity numbers
104 When a quantity has a known constant value, that value is stored
105 in the appropriate element of qty_const. This is in addition to
106 putting the constant in the hash table as is usual for non-regs.
108 Whether a reg or a constant is preferred is determined by the configuration
109 macro CONST_COSTS and will often depend on the constant value. In any
110 event, expressions containing constants can be simplified, by fold_rtx.
112 When a quantity has a known nearly constant value (such as an address
113 of a stack slot), that value is stored in the appropriate element
116 Integer constants don't have a machine mode. However, cse
117 determines the intended machine mode from the destination
118 of the instruction that moves the constant. The machine mode
119 is recorded in the hash table along with the actual RTL
120 constant expression so that different modes are kept separate.
124 To record known equivalences among expressions in general
125 we use a hash table called `table'. It has a fixed number of buckets
126 that contain chains of `struct table_elt' elements for expressions.
127 These chains connect the elements whose expressions have the same
130 Other chains through the same elements connect the elements which
131 currently have equivalent values.
133 Register references in an expression are canonicalized before hashing
134 the expression. This is done using `reg_qty' and `qty_first_reg'.
135 The hash code of a register reference is computed using the quantity
136 number, not the register number.
138 When the value of an expression changes, it is necessary to remove from the
139 hash table not just that expression but all expressions whose values
140 could be different as a result.
142 1. If the value changing is in memory, except in special cases
143 ANYTHING referring to memory could be changed. That is because
144 nobody knows where a pointer does not point.
145 The function `invalidate_memory' removes what is necessary.
147 The special cases are when the address is constant or is
148 a constant plus a fixed register such as the frame pointer
149 or a static chain pointer. When such addresses are stored in,
150 we can tell exactly which other such addresses must be invalidated
151 due to overlap. `invalidate' does this.
152 All expressions that refer to non-constant
153 memory addresses are also invalidated. `invalidate_memory' does this.
155 2. If the value changing is a register, all expressions
156 containing references to that register, and only those,
159 Because searching the entire hash table for expressions that contain
160 a register is very slow, we try to figure out when it isn't necessary.
161 Precisely, this is necessary only when expressions have been
162 entered in the hash table using this register, and then the value has
163 changed, and then another expression wants to be added to refer to
164 the register's new value. This sequence of circumstances is rare
165 within any one basic block.
167 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
168 reg_tick[i] is incremented whenever a value is stored in register i.
169 reg_in_table[i] holds -1 if no references to register i have been
170 entered in the table; otherwise, it contains the value reg_tick[i] had
171 when the references were entered. If we want to enter a reference
172 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
173 Until we want to enter a new entry, the mere fact that the two vectors
174 don't match makes the entries be ignored if anyone tries to match them.
176 Registers themselves are entered in the hash table as well as in
177 the equivalent-register chains. However, the vectors `reg_tick'
178 and `reg_in_table' do not apply to expressions which are simple
179 register references. These expressions are removed from the table
180 immediately when they become invalid, and this can be done even if
181 we do not immediately search for all the expressions that refer to
184 A CLOBBER rtx in an instruction invalidates its operand for further
185 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
186 invalidates everything that resides in memory.
190 Constant expressions that differ only by an additive integer
191 are called related. When a constant expression is put in
192 the table, the related expression with no constant term
193 is also entered. These are made to point at each other
194 so that it is possible to find out if there exists any
195 register equivalent to an expression related to a given expression. */
197 /* One plus largest register number used in this function. */
201 /* One plus largest instruction UID used in this function at time of
204 static int max_insn_uid;
206 /* Length of vectors indexed by quantity number.
207 We know in advance we will not need a quantity number this big. */
211 /* Next quantity number to be allocated.
212 This is 1 + the largest number needed so far. */
216 /* Indexed by quantity number, gives the first (or last) register
217 in the chain of registers that currently contain this quantity. */
219 static int *qty_first_reg;
220 static int *qty_last_reg;
222 /* Index by quantity number, gives the mode of the quantity. */
224 static enum machine_mode *qty_mode;
226 /* Indexed by quantity number, gives the rtx of the constant value of the
227 quantity, or zero if it does not have a known value.
228 A sum of the frame pointer (or arg pointer) plus a constant
229 can also be entered here. */
231 static rtx *qty_const;
233 /* Indexed by qty number, gives the insn that stored the constant value
234 recorded in `qty_const'. */
236 static rtx *qty_const_insn;
238 /* The next three variables are used to track when a comparison between a
239 quantity and some constant or register has been passed. In that case, we
240 know the results of the comparison in case we see it again. These variables
241 record a comparison that is known to be true. */
243 /* Indexed by qty number, gives the rtx code of a comparison with a known
244 result involving this quantity. If none, it is UNKNOWN. */
245 static enum rtx_code *qty_comparison_code;
247 /* Indexed by qty number, gives the constant being compared against in a
248 comparison of known result. If no such comparison, it is undefined.
249 If the comparison is not with a constant, it is zero. */
251 static rtx *qty_comparison_const;
253 /* Indexed by qty number, gives the quantity being compared against in a
254 comparison of known result. If no such comparison, if it undefined.
255 If the comparison is not with a register, it is -1. */
257 static int *qty_comparison_qty;
260 /* For machines that have a CC0, we do not record its value in the hash
261 table since its use is guaranteed to be the insn immediately following
262 its definition and any other insn is presumed to invalidate it.
264 Instead, we store below the value last assigned to CC0. If it should
265 happen to be a constant, it is stored in preference to the actual
266 assigned value. In case it is a constant, we store the mode in which
267 the constant should be interpreted. */
269 static rtx prev_insn_cc0;
270 static enum machine_mode prev_insn_cc0_mode;
273 /* Previous actual insn. 0 if at first insn of basic block. */
275 static rtx prev_insn;
277 /* Insn being scanned. */
279 static rtx this_insn;
281 /* Index by register number, gives the number of the next (or
282 previous) register in the chain of registers sharing the same
285 Or -1 if this register is at the end of the chain.
287 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
289 static int *reg_next_eqv;
290 static int *reg_prev_eqv;
292 struct cse_reg_info {
294 /* The number of times the register has been altered in the current
298 /* The next cse_reg_info structure in the free list. */
299 struct cse_reg_info* next;
302 /* The REG_TICK value at which rtx's containing this register are
303 valid in the hash table. If this does not equal the current
304 reg_tick value, such expressions existing in the hash table are
308 /* The quantity number of the register's current contents. */
312 /* A free list of cse_reg_info entries. */
313 static struct cse_reg_info *cse_reg_info_free_list;
315 /* A mapping from registers to cse_reg_info data structures. */
316 static splay_tree cse_reg_info_tree;
318 /* The last lookup we did into the cse_reg_info_tree. This allows us
319 to cache repeated lookups. */
320 static int cached_regno;
321 static struct cse_reg_info *cached_cse_reg_info;
323 /* A HARD_REG_SET containing all the hard registers for which there is
324 currently a REG expression in the hash table. Note the difference
325 from the above variables, which indicate if the REG is mentioned in some
326 expression in the table. */
328 static HARD_REG_SET hard_regs_in_table;
330 /* A HARD_REG_SET containing all the hard registers that are invalidated
333 static HARD_REG_SET regs_invalidated_by_call;
335 /* CUID of insn that starts the basic block currently being cse-processed. */
337 static int cse_basic_block_start;
339 /* CUID of insn that ends the basic block currently being cse-processed. */
341 static int cse_basic_block_end;
343 /* Vector mapping INSN_UIDs to cuids.
344 The cuids are like uids but increase monotonically always.
345 We use them to see whether a reg is used outside a given basic block. */
347 static int *uid_cuid;
349 /* Highest UID in UID_CUID. */
352 /* Get the cuid of an insn. */
354 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
356 /* Nonzero if cse has altered conditional jump insns
357 in such a way that jump optimization should be redone. */
359 static int cse_jumps_altered;
361 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
362 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
363 to put in the note. */
364 static int recorded_label_ref;
366 /* canon_hash stores 1 in do_not_record
367 if it notices a reference to CC0, PC, or some other volatile
370 static int do_not_record;
372 #ifdef LOAD_EXTEND_OP
374 /* Scratch rtl used when looking for load-extended copy of a MEM. */
375 static rtx memory_extend_rtx;
378 /* canon_hash stores 1 in hash_arg_in_memory
379 if it notices a reference to memory within the expression being hashed. */
381 static int hash_arg_in_memory;
383 /* canon_hash stores 1 in hash_arg_in_struct
384 if it notices a reference to memory that's part of a structure. */
386 static int hash_arg_in_struct;
388 /* The hash table contains buckets which are chains of `struct table_elt's,
389 each recording one expression's information.
390 That expression is in the `exp' field.
392 Those elements with the same hash code are chained in both directions
393 through the `next_same_hash' and `prev_same_hash' fields.
395 Each set of expressions with equivalent values
396 are on a two-way chain through the `next_same_value'
397 and `prev_same_value' fields, and all point with
398 the `first_same_value' field at the first element in
399 that chain. The chain is in order of increasing cost.
400 Each element's cost value is in its `cost' field.
402 The `in_memory' field is nonzero for elements that
403 involve any reference to memory. These elements are removed
404 whenever a write is done to an unidentified location in memory.
405 To be safe, we assume that a memory address is unidentified unless
406 the address is either a symbol constant or a constant plus
407 the frame pointer or argument pointer.
409 The `in_struct' field is nonzero for elements that
410 involve any reference to memory inside a structure or array.
412 The `related_value' field is used to connect related expressions
413 (that differ by adding an integer).
414 The related expressions are chained in a circular fashion.
415 `related_value' is zero for expressions for which this
418 The `cost' field stores the cost of this element's expression.
420 The `is_const' flag is set if the element is a constant (including
423 The `flag' field is used as a temporary during some search routines.
425 The `mode' field is usually the same as GET_MODE (`exp'), but
426 if `exp' is a CONST_INT and has no machine mode then the `mode'
427 field is the mode it was being used as. Each constant is
428 recorded separately for each mode it is used with. */
434 struct table_elt *next_same_hash;
435 struct table_elt *prev_same_hash;
436 struct table_elt *next_same_value;
437 struct table_elt *prev_same_value;
438 struct table_elt *first_same_value;
439 struct table_elt *related_value;
441 enum machine_mode mode;
448 /* We don't want a lot of buckets, because we rarely have very many
449 things stored in the hash table, and a lot of buckets slows
450 down a lot of loops that happen frequently. */
453 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
454 register (hard registers may require `do_not_record' to be set). */
457 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
458 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \
459 : canon_hash (X, M) % NBUCKETS)
461 /* Determine whether register number N is considered a fixed register for CSE.
462 It is desirable to replace other regs with fixed regs, to reduce need for
464 A reg wins if it is either the frame pointer or designated as fixed,
465 but not if it is an overlapping register. */
466 #ifdef OVERLAPPING_REGNO_P
467 #define FIXED_REGNO_P(N) \
468 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
469 || fixed_regs[N] || global_regs[N]) \
470 && ! OVERLAPPING_REGNO_P ((N)))
472 #define FIXED_REGNO_P(N) \
473 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
474 || fixed_regs[N] || global_regs[N])
477 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
478 hard registers and pointers into the frame are the cheapest with a cost
479 of 0. Next come pseudos with a cost of one and other hard registers with
480 a cost of 2. Aside from these special cases, call `rtx_cost'. */
482 #define CHEAP_REGNO(N) \
483 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
484 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
485 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
486 || ((N) < FIRST_PSEUDO_REGISTER \
487 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
489 /* A register is cheap if it is a user variable assigned to the register
490 or if its register number always corresponds to a cheap register. */
492 #define CHEAP_REG(N) \
493 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
494 || CHEAP_REGNO (REGNO (N)))
497 (GET_CODE (X) == REG \
498 ? (CHEAP_REG (X) ? 0 \
499 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
503 /* Get the info associated with register N. */
505 #define GET_CSE_REG_INFO(N) \
506 (((N) == cached_regno && cached_cse_reg_info) \
507 ? cached_cse_reg_info : get_cse_reg_info ((N)))
509 /* Get the number of times this register has been updated in this
512 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->variant.reg_tick)
514 /* Get the point at which REG was recorded in the table. */
516 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
518 /* Get the quantity number for REG. */
520 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
522 /* Determine if the quantity number for register X represents a valid index
523 into the `qty_...' variables. */
525 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
528 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
529 during CSE, such nodes are present. Using an ADDRESSOF node which
530 refers to the address of a REG is a good thing because we can then
531 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
532 #define CSE_ADDRESS_COST(RTX) \
533 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
534 ? -1 : ADDRESS_COST(RTX))
537 static struct table_elt *table[NBUCKETS];
539 /* Chain of `struct table_elt's made so far for this function
540 but currently removed from the table. */
542 static struct table_elt *free_element_chain;
544 /* Number of `struct table_elt' structures made so far for this function. */
546 static int n_elements_made;
548 /* Maximum value `n_elements_made' has had so far in this compilation
549 for functions previously processed. */
551 static int max_elements_made;
553 /* Surviving equivalence class when two equivalence classes are merged
554 by recording the effects of a jump in the last insn. Zero if the
555 last insn was not a conditional jump. */
557 static struct table_elt *last_jump_equiv_class;
559 /* Set to the cost of a constant pool reference if one was found for a
560 symbolic constant. If this was found, it means we should try to
561 convert constants into constant pool entries if they don't fit in
564 static int constant_pool_entries_cost;
566 /* Define maximum length of a branch path. */
568 #define PATHLENGTH 10
570 /* This data describes a block that will be processed by cse_basic_block. */
572 struct cse_basic_block_data {
573 /* Lowest CUID value of insns in block. */
575 /* Highest CUID value of insns in block. */
577 /* Total number of SETs in block. */
579 /* Last insn in the block. */
581 /* Size of current branch path, if any. */
583 /* Current branch path, indicating which branches will be taken. */
585 /* The branch insn. */
587 /* Whether it should be taken or not. AROUND is the same as taken
588 except that it is used when the destination label is not preceded
590 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
594 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
595 virtual regs here because the simplify_*_operation routines are called
596 by integrate.c, which is called before virtual register instantiation. */
598 #define FIXED_BASE_PLUS_P(X) \
599 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
600 || (X) == arg_pointer_rtx \
601 || (X) == virtual_stack_vars_rtx \
602 || (X) == virtual_incoming_args_rtx \
603 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
604 && (XEXP (X, 0) == frame_pointer_rtx \
605 || XEXP (X, 0) == hard_frame_pointer_rtx \
606 || XEXP (X, 0) == arg_pointer_rtx \
607 || XEXP (X, 0) == virtual_stack_vars_rtx \
608 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
609 || GET_CODE (X) == ADDRESSOF)
611 /* Similar, but also allows reference to the stack pointer.
613 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
614 arg_pointer_rtx by itself is nonzero, because on at least one machine,
615 the i960, the arg pointer is zero when it is unused. */
617 #define NONZERO_BASE_PLUS_P(X) \
618 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
619 || (X) == virtual_stack_vars_rtx \
620 || (X) == virtual_incoming_args_rtx \
621 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
622 && (XEXP (X, 0) == frame_pointer_rtx \
623 || XEXP (X, 0) == hard_frame_pointer_rtx \
624 || XEXP (X, 0) == arg_pointer_rtx \
625 || XEXP (X, 0) == virtual_stack_vars_rtx \
626 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
627 || (X) == stack_pointer_rtx \
628 || (X) == virtual_stack_dynamic_rtx \
629 || (X) == virtual_outgoing_args_rtx \
630 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
631 && (XEXP (X, 0) == stack_pointer_rtx \
632 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
633 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
634 || GET_CODE (X) == ADDRESSOF)
636 static int notreg_cost PROTO((rtx));
637 static void new_basic_block PROTO((void));
638 static void make_new_qty PROTO((int));
639 static void make_regs_eqv PROTO((int, int));
640 static void delete_reg_equiv PROTO((int));
641 static int mention_regs PROTO((rtx));
642 static int insert_regs PROTO((rtx, struct table_elt *, int));
643 static void free_element PROTO((struct table_elt *));
644 static void remove_from_table PROTO((struct table_elt *, unsigned));
645 static struct table_elt *get_element PROTO((void));
646 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
647 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
648 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
649 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
651 static void merge_equiv_classes PROTO((struct table_elt *,
652 struct table_elt *));
653 static void invalidate PROTO((rtx, enum machine_mode));
654 static int cse_rtx_varies_p PROTO((rtx));
655 static void remove_invalid_refs PROTO((int));
656 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
657 static void rehash_using_reg PROTO((rtx));
658 static void invalidate_memory PROTO((void));
659 static void invalidate_for_call PROTO((void));
660 static rtx use_related_value PROTO((rtx, struct table_elt *));
661 static unsigned canon_hash PROTO((rtx, enum machine_mode));
662 static unsigned safe_hash PROTO((rtx, enum machine_mode));
663 static int exp_equiv_p PROTO((rtx, rtx, int, int));
664 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
667 static int refers_to_p PROTO((rtx, rtx));
668 static rtx canon_reg PROTO((rtx, rtx));
669 static void find_best_addr PROTO((rtx, rtx *));
670 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
672 enum machine_mode *));
673 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
675 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
677 static rtx fold_rtx PROTO((rtx, rtx));
678 static rtx equiv_constant PROTO((rtx));
679 static void record_jump_equiv PROTO((rtx, int));
680 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
682 static void cse_insn PROTO((rtx, rtx));
683 static int note_mem_written PROTO((rtx));
684 static void invalidate_from_clobbers PROTO((rtx));
685 static rtx cse_process_notes PROTO((rtx, rtx));
686 static void cse_around_loop PROTO((rtx));
687 static void invalidate_skipped_set PROTO((rtx, rtx));
688 static void invalidate_skipped_block PROTO((rtx));
689 static void cse_check_loop_start PROTO((rtx, rtx));
690 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
691 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
692 static void count_reg_usage PROTO((rtx, int *, rtx, int));
693 extern void dump_class PROTO((struct table_elt*));
694 static void check_fold_consts PROTO((PTR));
695 static struct cse_reg_info* get_cse_reg_info PROTO((int));
696 static void free_cse_reg_info PROTO((splay_tree_value));
697 static void flush_hash_table PROTO((void));
699 /* Dump the expressions in the equivalence class indicated by CLASSP.
700 This function is used only for debugging. */
703 struct table_elt *classp;
705 struct table_elt *elt;
707 fprintf (stderr, "Equivalence chain for ");
708 print_rtl (stderr, classp->exp);
709 fprintf (stderr, ": \n");
711 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
713 print_rtl (stderr, elt->exp);
714 fprintf (stderr, "\n");
718 /* Return an estimate of the cost of computing rtx X.
719 One use is in cse, to decide which expression to keep in the hash table.
720 Another is in rtl generation, to pick the cheapest way to multiply.
721 Other uses like the latter are expected in the future. */
723 /* Internal function, to compute cost when X is not a register; called
724 from COST macro to keep it simple. */
730 return ((GET_CODE (x) == SUBREG
731 && GET_CODE (SUBREG_REG (x)) == REG
732 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
733 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
734 && (GET_MODE_SIZE (GET_MODE (x))
735 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
736 && subreg_lowpart_p (x)
737 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
738 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
739 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
740 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
742 : rtx_cost (x, SET) * 2);
745 /* Return the right cost to give to an operation
746 to make the cost of the corresponding register-to-register instruction
747 N times that of a fast register-to-register instruction. */
749 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
752 rtx_cost (x, outer_code)
754 enum rtx_code outer_code ATTRIBUTE_UNUSED;
757 register enum rtx_code code;
764 /* Compute the default costs of certain things.
765 Note that RTX_COSTS can override the defaults. */
771 /* Count multiplication by 2**n as a shift,
772 because if we are considering it, we would output it as a shift. */
773 if (GET_CODE (XEXP (x, 1)) == CONST_INT
774 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
777 total = COSTS_N_INSNS (5);
783 total = COSTS_N_INSNS (7);
786 /* Used in loop.c and combine.c as a marker. */
790 /* We don't want these to be used in substitutions because
791 we have no way of validating the resulting insn. So assign
792 anything containing an ASM_OPERANDS a very high cost. */
802 return ! CHEAP_REG (x);
805 /* If we can't tie these modes, make this expensive. The larger
806 the mode, the more expensive it is. */
807 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
808 return COSTS_N_INSNS (2
809 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
812 RTX_COSTS (x, code, outer_code);
815 CONST_COSTS (x, code, outer_code);
819 #ifdef DEFAULT_RTX_COSTS
820 DEFAULT_RTX_COSTS(x, code, outer_code);
825 /* Sum the costs of the sub-rtx's, plus cost of this operation,
826 which is already in total. */
828 fmt = GET_RTX_FORMAT (code);
829 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
831 total += rtx_cost (XEXP (x, i), code);
832 else if (fmt[i] == 'E')
833 for (j = 0; j < XVECLEN (x, i); j++)
834 total += rtx_cost (XVECEXP (x, i, j), code);
839 static struct cse_reg_info *
840 get_cse_reg_info (regno)
843 struct cse_reg_info *cri;
846 /* See if we already have this entry. */
847 n = splay_tree_lookup (cse_reg_info_tree,
848 (splay_tree_key) regno);
850 cri = (struct cse_reg_info *) (n->value);
853 /* Get a new cse_reg_info structure. */
854 if (cse_reg_info_free_list)
856 cri = cse_reg_info_free_list;
857 cse_reg_info_free_list = cri->variant.next;
860 cri = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
863 cri->variant.reg_tick = 0;
864 cri->reg_in_table = -1;
865 cri->reg_qty = regno;
867 splay_tree_insert (cse_reg_info_tree,
868 (splay_tree_key) regno,
869 (splay_tree_value) cri);
872 /* Cache this lookup; we tend to be looking up information about the
873 same register several times in a row. */
874 cached_regno = regno;
875 cached_cse_reg_info = cri;
881 free_cse_reg_info (v)
884 struct cse_reg_info *cri = (struct cse_reg_info *) v;
886 cri->variant.next = cse_reg_info_free_list;
887 cse_reg_info_free_list = cri;
890 /* Clear the hash table and initialize each register with its own quantity,
891 for a new basic block. */
900 if (cse_reg_info_tree)
902 splay_tree_delete (cse_reg_info_tree);
903 cached_cse_reg_info = 0;
906 cse_reg_info_tree = splay_tree_new (splay_tree_compare_ints, 0,
909 CLEAR_HARD_REG_SET (hard_regs_in_table);
911 /* The per-quantity values used to be initialized here, but it is
912 much faster to initialize each as it is made in `make_new_qty'. */
914 for (i = 0; i < NBUCKETS; i++)
916 register struct table_elt *this, *next;
917 for (this = table[i]; this; this = next)
919 next = this->next_same_hash;
924 bzero ((char *) table, sizeof table);
933 /* Say that register REG contains a quantity not in any register before
934 and initialize that quantity. */
942 if (next_qty >= max_qty)
945 q = REG_QTY (reg) = next_qty++;
946 qty_first_reg[q] = reg;
947 qty_last_reg[q] = reg;
948 qty_const[q] = qty_const_insn[q] = 0;
949 qty_comparison_code[q] = UNKNOWN;
951 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
954 /* Make reg NEW equivalent to reg OLD.
955 OLD is not changing; NEW is. */
958 make_regs_eqv (new, old)
959 register int new, old;
961 register int lastr, firstr;
962 register int q = REG_QTY (old);
964 /* Nothing should become eqv until it has a "non-invalid" qty number. */
965 if (! REGNO_QTY_VALID_P (old))
969 firstr = qty_first_reg[q];
970 lastr = qty_last_reg[q];
972 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
973 hard regs. Among pseudos, if NEW will live longer than any other reg
974 of the same qty, and that is beyond the current basic block,
975 make it the new canonical replacement for this qty. */
976 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
977 /* Certain fixed registers might be of the class NO_REGS. This means
978 that not only can they not be allocated by the compiler, but
979 they cannot be used in substitutions or canonicalizations
981 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
982 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
983 || (new >= FIRST_PSEUDO_REGISTER
984 && (firstr < FIRST_PSEUDO_REGISTER
985 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
986 || (uid_cuid[REGNO_FIRST_UID (new)]
987 < cse_basic_block_start))
988 && (uid_cuid[REGNO_LAST_UID (new)]
989 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
991 reg_prev_eqv[firstr] = new;
992 reg_next_eqv[new] = firstr;
993 reg_prev_eqv[new] = -1;
994 qty_first_reg[q] = new;
998 /* If NEW is a hard reg (known to be non-fixed), insert at end.
999 Otherwise, insert before any non-fixed hard regs that are at the
1000 end. Registers of class NO_REGS cannot be used as an
1001 equivalent for anything. */
1002 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
1003 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1004 && new >= FIRST_PSEUDO_REGISTER)
1005 lastr = reg_prev_eqv[lastr];
1006 reg_next_eqv[new] = reg_next_eqv[lastr];
1007 if (reg_next_eqv[lastr] >= 0)
1008 reg_prev_eqv[reg_next_eqv[lastr]] = new;
1010 qty_last_reg[q] = new;
1011 reg_next_eqv[lastr] = new;
1012 reg_prev_eqv[new] = lastr;
1016 /* Remove REG from its equivalence class. */
1019 delete_reg_equiv (reg)
1022 register int q = REG_QTY (reg);
1025 /* If invalid, do nothing. */
1029 p = reg_prev_eqv[reg];
1030 n = reg_next_eqv[reg];
1033 reg_prev_eqv[n] = p;
1035 qty_last_reg[q] = p;
1037 reg_next_eqv[p] = n;
1039 qty_first_reg[q] = n;
1041 REG_QTY (reg) = reg;
1044 /* Remove any invalid expressions from the hash table
1045 that refer to any of the registers contained in expression X.
1047 Make sure that newly inserted references to those registers
1048 as subexpressions will be considered valid.
1050 mention_regs is not called when a register itself
1051 is being stored in the table.
1053 Return 1 if we have done something that may have changed the hash code
1060 register enum rtx_code code;
1063 register int changed = 0;
1068 code = GET_CODE (x);
1071 register int regno = REGNO (x);
1072 register int endregno
1073 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1074 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1077 for (i = regno; i < endregno; i++)
1079 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1080 remove_invalid_refs (i);
1082 REG_IN_TABLE (i) = REG_TICK (i);
1088 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1089 pseudo if they don't use overlapping words. We handle only pseudos
1090 here for simplicity. */
1091 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1092 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1094 int i = REGNO (SUBREG_REG (x));
1096 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1098 /* If reg_tick has been incremented more than once since
1099 reg_in_table was last set, that means that the entire
1100 register has been set before, so discard anything memorized
1101 for the entrire register, including all SUBREG expressions. */
1102 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1103 remove_invalid_refs (i);
1105 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1108 REG_IN_TABLE (i) = REG_TICK (i);
1112 /* If X is a comparison or a COMPARE and either operand is a register
1113 that does not have a quantity, give it one. This is so that a later
1114 call to record_jump_equiv won't cause X to be assigned a different
1115 hash code and not found in the table after that call.
1117 It is not necessary to do this here, since rehash_using_reg can
1118 fix up the table later, but doing this here eliminates the need to
1119 call that expensive function in the most common case where the only
1120 use of the register is in the comparison. */
1122 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1124 if (GET_CODE (XEXP (x, 0)) == REG
1125 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1126 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1128 rehash_using_reg (XEXP (x, 0));
1132 if (GET_CODE (XEXP (x, 1)) == REG
1133 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1134 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1136 rehash_using_reg (XEXP (x, 1));
1141 fmt = GET_RTX_FORMAT (code);
1142 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1144 changed |= mention_regs (XEXP (x, i));
1145 else if (fmt[i] == 'E')
1146 for (j = 0; j < XVECLEN (x, i); j++)
1147 changed |= mention_regs (XVECEXP (x, i, j));
1152 /* Update the register quantities for inserting X into the hash table
1153 with a value equivalent to CLASSP.
1154 (If the class does not contain a REG, it is irrelevant.)
1155 If MODIFIED is nonzero, X is a destination; it is being modified.
1156 Note that delete_reg_equiv should be called on a register
1157 before insert_regs is done on that register with MODIFIED != 0.
1159 Nonzero value means that elements of reg_qty have changed
1160 so X's hash code may be different. */
1163 insert_regs (x, classp, modified)
1165 struct table_elt *classp;
1168 if (GET_CODE (x) == REG)
1170 register int regno = REGNO (x);
1172 /* If REGNO is in the equivalence table already but is of the
1173 wrong mode for that equivalence, don't do anything here. */
1175 if (REGNO_QTY_VALID_P (regno)
1176 && qty_mode[REG_QTY (regno)] != GET_MODE (x))
1179 if (modified || ! REGNO_QTY_VALID_P (regno))
1182 for (classp = classp->first_same_value;
1184 classp = classp->next_same_value)
1185 if (GET_CODE (classp->exp) == REG
1186 && GET_MODE (classp->exp) == GET_MODE (x))
1188 make_regs_eqv (regno, REGNO (classp->exp));
1192 make_new_qty (regno);
1193 qty_mode[REG_QTY (regno)] = GET_MODE (x);
1200 /* If X is a SUBREG, we will likely be inserting the inner register in the
1201 table. If that register doesn't have an assigned quantity number at
1202 this point but does later, the insertion that we will be doing now will
1203 not be accessible because its hash code will have changed. So assign
1204 a quantity number now. */
1206 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1207 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1209 int regno = REGNO (SUBREG_REG (x));
1211 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1212 /* Mention_regs checks if REG_TICK is exactly one larger than
1213 REG_IN_TABLE to find out if there was only a single preceding
1214 invalidation - for the SUBREG - or another one, which would be
1215 for the full register. Since we don't invalidate the SUBREG
1216 here first, we might have to bump up REG_TICK so that mention_regs
1217 will do the right thing. */
1218 if (REG_IN_TABLE (regno) >= 0
1219 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1225 return mention_regs (x);
1228 /* Look in or update the hash table. */
1230 /* Put the element ELT on the list of free elements. */
1234 struct table_elt *elt;
1236 elt->next_same_hash = free_element_chain;
1237 free_element_chain = elt;
1240 /* Return an element that is free for use. */
1242 static struct table_elt *
1245 struct table_elt *elt = free_element_chain;
1248 free_element_chain = elt->next_same_hash;
1252 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1255 /* Remove table element ELT from use in the table.
1256 HASH is its hash code, made using the HASH macro.
1257 It's an argument because often that is known in advance
1258 and we save much time not recomputing it. */
1261 remove_from_table (elt, hash)
1262 register struct table_elt *elt;
1268 /* Mark this element as removed. See cse_insn. */
1269 elt->first_same_value = 0;
1271 /* Remove the table element from its equivalence class. */
1274 register struct table_elt *prev = elt->prev_same_value;
1275 register struct table_elt *next = elt->next_same_value;
1277 if (next) next->prev_same_value = prev;
1280 prev->next_same_value = next;
1283 register struct table_elt *newfirst = next;
1286 next->first_same_value = newfirst;
1287 next = next->next_same_value;
1292 /* Remove the table element from its hash bucket. */
1295 register struct table_elt *prev = elt->prev_same_hash;
1296 register struct table_elt *next = elt->next_same_hash;
1298 if (next) next->prev_same_hash = prev;
1301 prev->next_same_hash = next;
1302 else if (table[hash] == elt)
1306 /* This entry is not in the proper hash bucket. This can happen
1307 when two classes were merged by `merge_equiv_classes'. Search
1308 for the hash bucket that it heads. This happens only very
1309 rarely, so the cost is acceptable. */
1310 for (hash = 0; hash < NBUCKETS; hash++)
1311 if (table[hash] == elt)
1316 /* Remove the table element from its related-value circular chain. */
1318 if (elt->related_value != 0 && elt->related_value != elt)
1320 register struct table_elt *p = elt->related_value;
1321 while (p->related_value != elt)
1322 p = p->related_value;
1323 p->related_value = elt->related_value;
1324 if (p->related_value == p)
1325 p->related_value = 0;
1331 /* Look up X in the hash table and return its table element,
1332 or 0 if X is not in the table.
1334 MODE is the machine-mode of X, or if X is an integer constant
1335 with VOIDmode then MODE is the mode with which X will be used.
1337 Here we are satisfied to find an expression whose tree structure
1340 static struct table_elt *
1341 lookup (x, hash, mode)
1344 enum machine_mode mode;
1346 register struct table_elt *p;
1348 for (p = table[hash]; p; p = p->next_same_hash)
1349 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1350 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1356 /* Like `lookup' but don't care whether the table element uses invalid regs.
1357 Also ignore discrepancies in the machine mode of a register. */
1359 static struct table_elt *
1360 lookup_for_remove (x, hash, mode)
1363 enum machine_mode mode;
1365 register struct table_elt *p;
1367 if (GET_CODE (x) == REG)
1369 int regno = REGNO (x);
1370 /* Don't check the machine mode when comparing registers;
1371 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1372 for (p = table[hash]; p; p = p->next_same_hash)
1373 if (GET_CODE (p->exp) == REG
1374 && REGNO (p->exp) == regno)
1379 for (p = table[hash]; p; p = p->next_same_hash)
1380 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1387 /* Look for an expression equivalent to X and with code CODE.
1388 If one is found, return that expression. */
1391 lookup_as_function (x, code)
1395 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1397 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1398 long as we are narrowing. So if we looked in vain for a mode narrower
1399 than word_mode before, look for word_mode now. */
1400 if (p == 0 && code == CONST_INT
1401 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1404 PUT_MODE (x, word_mode);
1405 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1411 for (p = p->first_same_value; p; p = p->next_same_value)
1413 if (GET_CODE (p->exp) == code
1414 /* Make sure this is a valid entry in the table. */
1415 && exp_equiv_p (p->exp, p->exp, 1, 0))
1422 /* Insert X in the hash table, assuming HASH is its hash code
1423 and CLASSP is an element of the class it should go in
1424 (or 0 if a new class should be made).
1425 It is inserted at the proper position to keep the class in
1426 the order cheapest first.
1428 MODE is the machine-mode of X, or if X is an integer constant
1429 with VOIDmode then MODE is the mode with which X will be used.
1431 For elements of equal cheapness, the most recent one
1432 goes in front, except that the first element in the list
1433 remains first unless a cheaper element is added. The order of
1434 pseudo-registers does not matter, as canon_reg will be called to
1435 find the cheapest when a register is retrieved from the table.
1437 The in_memory field in the hash table element is set to 0.
1438 The caller must set it nonzero if appropriate.
1440 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1441 and if insert_regs returns a nonzero value
1442 you must then recompute its hash code before calling here.
1444 If necessary, update table showing constant values of quantities. */
1446 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1448 static struct table_elt *
1449 insert (x, classp, hash, mode)
1451 register struct table_elt *classp;
1453 enum machine_mode mode;
1455 register struct table_elt *elt;
1457 /* If X is a register and we haven't made a quantity for it,
1458 something is wrong. */
1459 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1462 /* If X is a hard register, show it is being put in the table. */
1463 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1465 int regno = REGNO (x);
1466 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1469 for (i = regno; i < endregno; i++)
1470 SET_HARD_REG_BIT (hard_regs_in_table, i);
1473 /* If X is a label, show we recorded it. */
1474 if (GET_CODE (x) == LABEL_REF
1475 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1476 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1477 recorded_label_ref = 1;
1479 /* Put an element for X into the right hash bucket. */
1481 elt = get_element ();
1483 elt->cost = COST (x);
1484 elt->next_same_value = 0;
1485 elt->prev_same_value = 0;
1486 elt->next_same_hash = table[hash];
1487 elt->prev_same_hash = 0;
1488 elt->related_value = 0;
1491 elt->is_const = (CONSTANT_P (x)
1492 /* GNU C++ takes advantage of this for `this'
1493 (and other const values). */
1494 || (RTX_UNCHANGING_P (x)
1495 && GET_CODE (x) == REG
1496 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1497 || FIXED_BASE_PLUS_P (x));
1500 table[hash]->prev_same_hash = elt;
1503 /* Put it into the proper value-class. */
1506 classp = classp->first_same_value;
1507 if (CHEAPER (elt, classp))
1508 /* Insert at the head of the class */
1510 register struct table_elt *p;
1511 elt->next_same_value = classp;
1512 classp->prev_same_value = elt;
1513 elt->first_same_value = elt;
1515 for (p = classp; p; p = p->next_same_value)
1516 p->first_same_value = elt;
1520 /* Insert not at head of the class. */
1521 /* Put it after the last element cheaper than X. */
1522 register struct table_elt *p, *next;
1523 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1525 /* Put it after P and before NEXT. */
1526 elt->next_same_value = next;
1528 next->prev_same_value = elt;
1529 elt->prev_same_value = p;
1530 p->next_same_value = elt;
1531 elt->first_same_value = classp;
1535 elt->first_same_value = elt;
1537 /* If this is a constant being set equivalent to a register or a register
1538 being set equivalent to a constant, note the constant equivalence.
1540 If this is a constant, it cannot be equivalent to a different constant,
1541 and a constant is the only thing that can be cheaper than a register. So
1542 we know the register is the head of the class (before the constant was
1545 If this is a register that is not already known equivalent to a
1546 constant, we must check the entire class.
1548 If this is a register that is already known equivalent to an insn,
1549 update `qty_const_insn' to show that `this_insn' is the latest
1550 insn making that quantity equivalent to the constant. */
1552 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1553 && GET_CODE (x) != REG)
1555 qty_const[REG_QTY (REGNO (classp->exp))]
1556 = gen_lowpart_if_possible (qty_mode[REG_QTY (REGNO (classp->exp))], x);
1557 qty_const_insn[REG_QTY (REGNO (classp->exp))] = this_insn;
1560 else if (GET_CODE (x) == REG && classp && ! qty_const[REG_QTY (REGNO (x))]
1563 register struct table_elt *p;
1565 for (p = classp; p != 0; p = p->next_same_value)
1567 if (p->is_const && GET_CODE (p->exp) != REG)
1569 qty_const[REG_QTY (REGNO (x))]
1570 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1571 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1577 else if (GET_CODE (x) == REG && qty_const[REG_QTY (REGNO (x))]
1578 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))])
1579 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1581 /* If this is a constant with symbolic value,
1582 and it has a term with an explicit integer value,
1583 link it up with related expressions. */
1584 if (GET_CODE (x) == CONST)
1586 rtx subexp = get_related_value (x);
1588 struct table_elt *subelt, *subelt_prev;
1592 /* Get the integer-free subexpression in the hash table. */
1593 subhash = safe_hash (subexp, mode) % NBUCKETS;
1594 subelt = lookup (subexp, subhash, mode);
1596 subelt = insert (subexp, NULL_PTR, subhash, mode);
1597 /* Initialize SUBELT's circular chain if it has none. */
1598 if (subelt->related_value == 0)
1599 subelt->related_value = subelt;
1600 /* Find the element in the circular chain that precedes SUBELT. */
1601 subelt_prev = subelt;
1602 while (subelt_prev->related_value != subelt)
1603 subelt_prev = subelt_prev->related_value;
1604 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1605 This way the element that follows SUBELT is the oldest one. */
1606 elt->related_value = subelt_prev->related_value;
1607 subelt_prev->related_value = elt;
1614 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1615 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1616 the two classes equivalent.
1618 CLASS1 will be the surviving class; CLASS2 should not be used after this
1621 Any invalid entries in CLASS2 will not be copied. */
1624 merge_equiv_classes (class1, class2)
1625 struct table_elt *class1, *class2;
1627 struct table_elt *elt, *next, *new;
1629 /* Ensure we start with the head of the classes. */
1630 class1 = class1->first_same_value;
1631 class2 = class2->first_same_value;
1633 /* If they were already equal, forget it. */
1634 if (class1 == class2)
1637 for (elt = class2; elt; elt = next)
1641 enum machine_mode mode = elt->mode;
1643 next = elt->next_same_value;
1645 /* Remove old entry, make a new one in CLASS1's class.
1646 Don't do this for invalid entries as we cannot find their
1647 hash code (it also isn't necessary). */
1648 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1650 hash_arg_in_memory = 0;
1651 hash_arg_in_struct = 0;
1652 hash = HASH (exp, mode);
1654 if (GET_CODE (exp) == REG)
1655 delete_reg_equiv (REGNO (exp));
1657 remove_from_table (elt, hash);
1659 if (insert_regs (exp, class1, 0))
1661 rehash_using_reg (exp);
1662 hash = HASH (exp, mode);
1664 new = insert (exp, class1, hash, mode);
1665 new->in_memory = hash_arg_in_memory;
1666 new->in_struct = hash_arg_in_struct;
1672 /* Flush the entire hash table. */
1678 struct table_elt *p;
1680 for (i = 0; i < NBUCKETS; i++)
1681 for (p = table[i]; p; p = table[i])
1683 /* Note that invalidate can remove elements
1684 after P in the current hash chain. */
1685 if (GET_CODE (p->exp) == REG)
1686 invalidate (p->exp, p->mode);
1688 remove_from_table (p, i);
1693 /* Remove from the hash table, or mark as invalid,
1694 all expressions whose values could be altered by storing in X.
1695 X is a register, a subreg, or a memory reference with nonvarying address
1696 (because, when a memory reference with a varying address is stored in,
1697 all memory references are removed by invalidate_memory
1698 so specific invalidation is superfluous).
1699 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1700 instead of just the amount indicated by the mode of X. This is only used
1701 for bitfield stores into memory.
1703 A nonvarying address may be just a register or just
1704 a symbol reference, or it may be either of those plus
1705 a numeric offset. */
1708 invalidate (x, full_mode)
1710 enum machine_mode full_mode;
1713 register struct table_elt *p;
1715 /* If X is a register, dependencies on its contents
1716 are recorded through the qty number mechanism.
1717 Just change the qty number of the register,
1718 mark it as invalid for expressions that refer to it,
1719 and remove it itself. */
1721 if (GET_CODE (x) == REG)
1723 register int regno = REGNO (x);
1724 register unsigned hash = HASH (x, GET_MODE (x));
1726 /* Remove REGNO from any quantity list it might be on and indicate
1727 that its value might have changed. If it is a pseudo, remove its
1728 entry from the hash table.
1730 For a hard register, we do the first two actions above for any
1731 additional hard registers corresponding to X. Then, if any of these
1732 registers are in the table, we must remove any REG entries that
1733 overlap these registers. */
1735 delete_reg_equiv (regno);
1738 if (regno >= FIRST_PSEUDO_REGISTER)
1740 /* Because a register can be referenced in more than one mode,
1741 we might have to remove more than one table entry. */
1743 struct table_elt *elt;
1745 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1746 remove_from_table (elt, hash);
1750 HOST_WIDE_INT in_table
1751 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1752 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1753 int tregno, tendregno;
1754 register struct table_elt *p, *next;
1756 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1758 for (i = regno + 1; i < endregno; i++)
1760 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1761 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1762 delete_reg_equiv (i);
1767 for (hash = 0; hash < NBUCKETS; hash++)
1768 for (p = table[hash]; p; p = next)
1770 next = p->next_same_hash;
1772 if (GET_CODE (p->exp) != REG
1773 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1776 tregno = REGNO (p->exp);
1778 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1779 if (tendregno > regno && tregno < endregno)
1780 remove_from_table (p, hash);
1787 if (GET_CODE (x) == SUBREG)
1789 if (GET_CODE (SUBREG_REG (x)) != REG)
1791 invalidate (SUBREG_REG (x), VOIDmode);
1795 /* If X is a parallel, invalidate all of its elements. */
1797 if (GET_CODE (x) == PARALLEL)
1799 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1800 invalidate (XVECEXP (x, 0, i), VOIDmode);
1804 /* If X is an expr_list, this is part of a disjoint return value;
1805 extract the location in question ignoring the offset. */
1807 if (GET_CODE (x) == EXPR_LIST)
1809 invalidate (XEXP (x, 0), VOIDmode);
1813 /* X is not a register; it must be a memory reference with
1814 a nonvarying address. Remove all hash table elements
1815 that refer to overlapping pieces of memory. */
1817 if (GET_CODE (x) != MEM)
1820 if (full_mode == VOIDmode)
1821 full_mode = GET_MODE (x);
1823 for (i = 0; i < NBUCKETS; i++)
1825 register struct table_elt *next;
1826 for (p = table[i]; p; p = next)
1828 next = p->next_same_hash;
1829 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1830 than checking all the aliases). */
1832 && (GET_CODE (p->exp) != MEM
1833 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1834 remove_from_table (p, i);
1839 /* Remove all expressions that refer to register REGNO,
1840 since they are already invalid, and we are about to
1841 mark that register valid again and don't want the old
1842 expressions to reappear as valid. */
1845 remove_invalid_refs (regno)
1849 register struct table_elt *p, *next;
1851 for (i = 0; i < NBUCKETS; i++)
1852 for (p = table[i]; p; p = next)
1854 next = p->next_same_hash;
1855 if (GET_CODE (p->exp) != REG
1856 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1857 remove_from_table (p, i);
1861 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1863 remove_invalid_subreg_refs (regno, word, mode)
1866 enum machine_mode mode;
1869 register struct table_elt *p, *next;
1870 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1872 for (i = 0; i < NBUCKETS; i++)
1873 for (p = table[i]; p; p = next)
1876 next = p->next_same_hash;
1879 if (GET_CODE (p->exp) != REG
1880 && (GET_CODE (exp) != SUBREG
1881 || GET_CODE (SUBREG_REG (exp)) != REG
1882 || REGNO (SUBREG_REG (exp)) != regno
1883 || (((SUBREG_WORD (exp)
1884 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1886 && SUBREG_WORD (exp) <= end))
1887 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1888 remove_from_table (p, i);
1892 /* Recompute the hash codes of any valid entries in the hash table that
1893 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1895 This is called when we make a jump equivalence. */
1898 rehash_using_reg (x)
1902 struct table_elt *p, *next;
1905 if (GET_CODE (x) == SUBREG)
1908 /* If X is not a register or if the register is known not to be in any
1909 valid entries in the table, we have no work to do. */
1911 if (GET_CODE (x) != REG
1912 || REG_IN_TABLE (REGNO (x)) < 0
1913 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1916 /* Scan all hash chains looking for valid entries that mention X.
1917 If we find one and it is in the wrong hash chain, move it. We can skip
1918 objects that are registers, since they are handled specially. */
1920 for (i = 0; i < NBUCKETS; i++)
1921 for (p = table[i]; p; p = next)
1923 next = p->next_same_hash;
1924 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1925 && exp_equiv_p (p->exp, p->exp, 1, 0)
1926 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1928 if (p->next_same_hash)
1929 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1931 if (p->prev_same_hash)
1932 p->prev_same_hash->next_same_hash = p->next_same_hash;
1934 table[i] = p->next_same_hash;
1936 p->next_same_hash = table[hash];
1937 p->prev_same_hash = 0;
1939 table[hash]->prev_same_hash = p;
1945 /* Remove from the hash table any expression that is a call-clobbered
1946 register. Also update their TICK values. */
1949 invalidate_for_call ()
1951 int regno, endregno;
1954 struct table_elt *p, *next;
1957 /* Go through all the hard registers. For each that is clobbered in
1958 a CALL_INSN, remove the register from quantity chains and update
1959 reg_tick if defined. Also see if any of these registers is currently
1962 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1963 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1965 delete_reg_equiv (regno);
1966 if (REG_TICK (regno) >= 0)
1969 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1972 /* In the case where we have no call-clobbered hard registers in the
1973 table, we are done. Otherwise, scan the table and remove any
1974 entry that overlaps a call-clobbered register. */
1977 for (hash = 0; hash < NBUCKETS; hash++)
1978 for (p = table[hash]; p; p = next)
1980 next = p->next_same_hash;
1984 remove_from_table (p, hash);
1988 if (GET_CODE (p->exp) != REG
1989 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1992 regno = REGNO (p->exp);
1993 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1995 for (i = regno; i < endregno; i++)
1996 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1998 remove_from_table (p, hash);
2004 /* Given an expression X of type CONST,
2005 and ELT which is its table entry (or 0 if it
2006 is not in the hash table),
2007 return an alternate expression for X as a register plus integer.
2008 If none can be found, return 0. */
2011 use_related_value (x, elt)
2013 struct table_elt *elt;
2015 register struct table_elt *relt = 0;
2016 register struct table_elt *p, *q;
2017 HOST_WIDE_INT offset;
2019 /* First, is there anything related known?
2020 If we have a table element, we can tell from that.
2021 Otherwise, must look it up. */
2023 if (elt != 0 && elt->related_value != 0)
2025 else if (elt == 0 && GET_CODE (x) == CONST)
2027 rtx subexp = get_related_value (x);
2029 relt = lookup (subexp,
2030 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
2037 /* Search all related table entries for one that has an
2038 equivalent register. */
2043 /* This loop is strange in that it is executed in two different cases.
2044 The first is when X is already in the table. Then it is searching
2045 the RELATED_VALUE list of X's class (RELT). The second case is when
2046 X is not in the table. Then RELT points to a class for the related
2049 Ensure that, whatever case we are in, that we ignore classes that have
2050 the same value as X. */
2052 if (rtx_equal_p (x, p->exp))
2055 for (q = p->first_same_value; q; q = q->next_same_value)
2056 if (GET_CODE (q->exp) == REG)
2062 p = p->related_value;
2064 /* We went all the way around, so there is nothing to be found.
2065 Alternatively, perhaps RELT was in the table for some other reason
2066 and it has no related values recorded. */
2067 if (p == relt || p == 0)
2074 offset = (get_integer_term (x) - get_integer_term (p->exp));
2075 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2076 return plus_constant (q->exp, offset);
2079 /* Hash an rtx. We are careful to make sure the value is never negative.
2080 Equivalent registers hash identically.
2081 MODE is used in hashing for CONST_INTs only;
2082 otherwise the mode of X is used.
2084 Store 1 in do_not_record if any subexpression is volatile.
2086 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2087 which does not have the RTX_UNCHANGING_P bit set.
2088 In this case, also store 1 in hash_arg_in_struct
2089 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
2091 Note that cse_insn knows that the hash code of a MEM expression
2092 is just (int) MEM plus the hash code of the address. */
2095 canon_hash (x, mode)
2097 enum machine_mode mode;
2100 register unsigned hash = 0;
2101 register enum rtx_code code;
2104 /* repeat is used to turn tail-recursion into iteration. */
2109 code = GET_CODE (x);
2114 register int regno = REGNO (x);
2116 /* On some machines, we can't record any non-fixed hard register,
2117 because extending its life will cause reload problems. We
2118 consider ap, fp, and sp to be fixed for this purpose.
2120 We also consider CCmode registers to be fixed for this purpose;
2121 failure to do so leads to failure to simplify 0<100 type of
2124 On all machines, we can't record any global registers. */
2126 if (regno < FIRST_PSEUDO_REGISTER
2127 && (global_regs[regno]
2128 || (SMALL_REGISTER_CLASSES
2129 && ! fixed_regs[regno]
2130 && regno != FRAME_POINTER_REGNUM
2131 && regno != HARD_FRAME_POINTER_REGNUM
2132 && regno != ARG_POINTER_REGNUM
2133 && regno != STACK_POINTER_REGNUM
2134 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2139 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2143 /* We handle SUBREG of a REG specially because the underlying
2144 reg changes its hash value with every value change; we don't
2145 want to have to forget unrelated subregs when one subreg changes. */
2148 if (GET_CODE (SUBREG_REG (x)) == REG)
2150 hash += (((unsigned) SUBREG << 7)
2151 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2159 unsigned HOST_WIDE_INT tem = INTVAL (x);
2160 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2165 /* This is like the general case, except that it only counts
2166 the integers representing the constant. */
2167 hash += (unsigned) code + (unsigned) GET_MODE (x);
2168 if (GET_MODE (x) != VOIDmode)
2169 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2171 unsigned tem = XINT (x, i);
2175 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2176 + (unsigned) CONST_DOUBLE_HIGH (x));
2179 /* Assume there is only one rtx object for any given label. */
2182 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2187 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2191 if (MEM_VOLATILE_P (x))
2196 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2198 hash_arg_in_memory = 1;
2199 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
2201 /* Now that we have already found this special case,
2202 might as well speed it up as much as possible. */
2203 hash += (unsigned) MEM;
2214 case UNSPEC_VOLATILE:
2219 if (MEM_VOLATILE_P (x))
2230 i = GET_RTX_LENGTH (code) - 1;
2231 hash += (unsigned) code + (unsigned) GET_MODE (x);
2232 fmt = GET_RTX_FORMAT (code);
2237 rtx tem = XEXP (x, i);
2239 /* If we are about to do the last recursive call
2240 needed at this level, change it into iteration.
2241 This function is called enough to be worth it. */
2247 hash += canon_hash (tem, 0);
2249 else if (fmt[i] == 'E')
2250 for (j = 0; j < XVECLEN (x, i); j++)
2251 hash += canon_hash (XVECEXP (x, i, j), 0);
2252 else if (fmt[i] == 's')
2254 register unsigned char *p = (unsigned char *) XSTR (x, i);
2259 else if (fmt[i] == 'i')
2261 register unsigned tem = XINT (x, i);
2264 else if (fmt[i] == '0')
2272 /* Like canon_hash but with no side effects. */
2277 enum machine_mode mode;
2279 int save_do_not_record = do_not_record;
2280 int save_hash_arg_in_memory = hash_arg_in_memory;
2281 int save_hash_arg_in_struct = hash_arg_in_struct;
2282 unsigned hash = canon_hash (x, mode);
2283 hash_arg_in_memory = save_hash_arg_in_memory;
2284 hash_arg_in_struct = save_hash_arg_in_struct;
2285 do_not_record = save_do_not_record;
2289 /* Return 1 iff X and Y would canonicalize into the same thing,
2290 without actually constructing the canonicalization of either one.
2291 If VALIDATE is nonzero,
2292 we assume X is an expression being processed from the rtl
2293 and Y was found in the hash table. We check register refs
2294 in Y for being marked as valid.
2296 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2297 that is known to be in the register. Ordinarily, we don't allow them
2298 to match, because letting them match would cause unpredictable results
2299 in all the places that search a hash table chain for an equivalent
2300 for a given value. A possible equivalent that has different structure
2301 has its hash code computed from different data. Whether the hash code
2302 is the same as that of the given value is pure luck. */
2305 exp_equiv_p (x, y, validate, equal_values)
2311 register enum rtx_code code;
2314 /* Note: it is incorrect to assume an expression is equivalent to itself
2315 if VALIDATE is nonzero. */
2316 if (x == y && !validate)
2318 if (x == 0 || y == 0)
2321 code = GET_CODE (x);
2322 if (code != GET_CODE (y))
2327 /* If X is a constant and Y is a register or vice versa, they may be
2328 equivalent. We only have to validate if Y is a register. */
2329 if (CONSTANT_P (x) && GET_CODE (y) == REG
2330 && REGNO_QTY_VALID_P (REGNO (y))
2331 && GET_MODE (y) == qty_mode[REG_QTY (REGNO (y))]
2332 && rtx_equal_p (x, qty_const[REG_QTY (REGNO (y))])
2333 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2336 if (CONSTANT_P (y) && code == REG
2337 && REGNO_QTY_VALID_P (REGNO (x))
2338 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2339 && rtx_equal_p (y, qty_const[REG_QTY (REGNO (x))]))
2345 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2346 if (GET_MODE (x) != GET_MODE (y))
2356 return INTVAL (x) == INTVAL (y);
2359 return XEXP (x, 0) == XEXP (y, 0);
2362 return XSTR (x, 0) == XSTR (y, 0);
2366 int regno = REGNO (y);
2368 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2369 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2372 /* If the quantities are not the same, the expressions are not
2373 equivalent. If there are and we are not to validate, they
2374 are equivalent. Otherwise, ensure all regs are up-to-date. */
2376 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2382 for (i = regno; i < endregno; i++)
2383 if (REG_IN_TABLE (i) != REG_TICK (i))
2389 /* For commutative operations, check both orders. */
2397 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2398 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2399 validate, equal_values))
2400 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2401 validate, equal_values)
2402 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2403 validate, equal_values)));
2409 /* Compare the elements. If any pair of corresponding elements
2410 fail to match, return 0 for the whole things. */
2412 fmt = GET_RTX_FORMAT (code);
2413 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2418 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2423 if (XVECLEN (x, i) != XVECLEN (y, i))
2425 for (j = 0; j < XVECLEN (x, i); j++)
2426 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2427 validate, equal_values))
2432 if (strcmp (XSTR (x, i), XSTR (y, i)))
2437 if (XINT (x, i) != XINT (y, i))
2442 if (XWINT (x, i) != XWINT (y, i))
2457 /* Return 1 iff any subexpression of X matches Y.
2458 Here we do not require that X or Y be valid (for registers referred to)
2459 for being in the hash table. */
2466 register enum rtx_code code;
2472 if (x == 0 || y == 0)
2475 code = GET_CODE (x);
2476 /* If X as a whole has the same code as Y, they may match.
2478 if (code == GET_CODE (y))
2480 if (exp_equiv_p (x, y, 0, 1))
2484 /* X does not match, so try its subexpressions. */
2486 fmt = GET_RTX_FORMAT (code);
2487 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2496 if (refers_to_p (XEXP (x, i), y))
2499 else if (fmt[i] == 'E')
2502 for (j = 0; j < XVECLEN (x, i); j++)
2503 if (refers_to_p (XVECEXP (x, i, j), y))
2510 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2511 set PBASE, PSTART, and PEND which correspond to the base of the address,
2512 the starting offset, and ending offset respectively.
2514 ADDR is known to be a nonvarying address. */
2516 /* ??? Despite what the comments say, this function is in fact frequently
2517 passed varying addresses. This does not appear to cause any problems. */
2520 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2524 HOST_WIDE_INT *pstart, *pend;
2527 HOST_WIDE_INT start, end;
2533 if (flag_pic && GET_CODE (base) == PLUS
2534 && XEXP (base, 0) == pic_offset_table_rtx)
2535 base = XEXP (base, 1);
2537 /* Registers with nonvarying addresses usually have constant equivalents;
2538 but the frame pointer register is also possible. */
2539 if (GET_CODE (base) == REG
2541 && REGNO_QTY_VALID_P (REGNO (base))
2542 && qty_mode[REG_QTY (REGNO (base))] == GET_MODE (base)
2543 && qty_const[REG_QTY (REGNO (base))] != 0)
2544 base = qty_const[REG_QTY (REGNO (base))];
2545 else if (GET_CODE (base) == PLUS
2546 && GET_CODE (XEXP (base, 1)) == CONST_INT
2547 && GET_CODE (XEXP (base, 0)) == REG
2549 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2550 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2551 == GET_MODE (XEXP (base, 0)))
2552 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))])
2554 start = INTVAL (XEXP (base, 1));
2555 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2557 /* This can happen as the result of virtual register instantiation,
2558 if the initial offset is too large to be a valid address. */
2559 else if (GET_CODE (base) == PLUS
2560 && GET_CODE (XEXP (base, 0)) == REG
2561 && GET_CODE (XEXP (base, 1)) == REG
2563 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2564 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2565 == GET_MODE (XEXP (base, 0)))
2566 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))]
2567 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2568 && (qty_mode[REG_QTY (REGNO (XEXP (base, 1)))]
2569 == GET_MODE (XEXP (base, 1)))
2570 && qty_const[REG_QTY (REGNO (XEXP (base, 1)))])
2572 rtx tem = qty_const[REG_QTY (REGNO (XEXP (base, 1)))];
2573 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2575 /* One of the two values must be a constant. */
2576 if (GET_CODE (base) != CONST_INT)
2578 if (GET_CODE (tem) != CONST_INT)
2580 start = INTVAL (tem);
2584 start = INTVAL (base);
2589 /* Handle everything that we can find inside an address that has been
2590 viewed as constant. */
2594 /* If no part of this switch does a "continue", the code outside
2595 will exit this loop. */
2597 switch (GET_CODE (base))
2600 /* By definition, operand1 of a LO_SUM is the associated constant
2601 address. Use the associated constant address as the base
2603 base = XEXP (base, 1);
2607 /* Strip off CONST. */
2608 base = XEXP (base, 0);
2612 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2614 start += INTVAL (XEXP (base, 1));
2615 base = XEXP (base, 0);
2621 /* Handle the case of an AND which is the negative of a power of
2622 two. This is used to represent unaligned memory operations. */
2623 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2624 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2626 set_nonvarying_address_components (XEXP (base, 0), size,
2627 pbase, pstart, pend);
2629 /* Assume the worst misalignment. START is affected, but not
2630 END, so compensate but adjusting SIZE. Don't lose any
2631 constant we already had. */
2633 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2634 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2647 if (GET_CODE (base) == CONST_INT)
2649 start += INTVAL (base);
2655 /* Set the return values. */
2661 /* Return 1 if X has a value that can vary even between two
2662 executions of the program. 0 means X can be compared reliably
2663 against certain constants or near-constants. */
2666 cse_rtx_varies_p (x)
2669 /* We need not check for X and the equivalence class being of the same
2670 mode because if X is equivalent to a constant in some mode, it
2671 doesn't vary in any mode. */
2673 if (GET_CODE (x) == REG
2674 && REGNO_QTY_VALID_P (REGNO (x))
2675 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2676 && qty_const[REG_QTY (REGNO (x))] != 0)
2679 if (GET_CODE (x) == PLUS
2680 && GET_CODE (XEXP (x, 1)) == CONST_INT
2681 && GET_CODE (XEXP (x, 0)) == REG
2682 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2683 && (GET_MODE (XEXP (x, 0))
2684 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2685 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))])
2688 /* This can happen as the result of virtual register instantiation, if
2689 the initial constant is too large to be a valid address. This gives
2690 us a three instruction sequence, load large offset into a register,
2691 load fp minus a constant into a register, then a MEM which is the
2692 sum of the two `constant' registers. */
2693 if (GET_CODE (x) == PLUS
2694 && GET_CODE (XEXP (x, 0)) == REG
2695 && GET_CODE (XEXP (x, 1)) == REG
2696 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2697 && (GET_MODE (XEXP (x, 0))
2698 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2699 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))]
2700 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2701 && (GET_MODE (XEXP (x, 1))
2702 == qty_mode[REG_QTY (REGNO (XEXP (x, 1)))])
2703 && qty_const[REG_QTY (REGNO (XEXP (x, 1)))])
2706 return rtx_varies_p (x);
2709 /* Canonicalize an expression:
2710 replace each register reference inside it
2711 with the "oldest" equivalent register.
2713 If INSN is non-zero and we are replacing a pseudo with a hard register
2714 or vice versa, validate_change is used to ensure that INSN remains valid
2715 after we make our substitution. The calls are made with IN_GROUP non-zero
2716 so apply_change_group must be called upon the outermost return from this
2717 function (unless INSN is zero). The result of apply_change_group can
2718 generally be discarded since the changes we are making are optional. */
2726 register enum rtx_code code;
2732 code = GET_CODE (x);
2750 /* Never replace a hard reg, because hard regs can appear
2751 in more than one machine mode, and we must preserve the mode
2752 of each occurrence. Also, some hard regs appear in
2753 MEMs that are shared and mustn't be altered. Don't try to
2754 replace any reg that maps to a reg of class NO_REGS. */
2755 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2756 || ! REGNO_QTY_VALID_P (REGNO (x)))
2759 first = qty_first_reg[REG_QTY (REGNO (x))];
2760 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2761 : REGNO_REG_CLASS (first) == NO_REGS ? x
2762 : gen_rtx_REG (qty_mode[REG_QTY (REGNO (x))], first));
2769 fmt = GET_RTX_FORMAT (code);
2770 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2776 rtx new = canon_reg (XEXP (x, i), insn);
2779 /* If replacing pseudo with hard reg or vice versa, ensure the
2780 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2781 if (insn != 0 && new != 0
2782 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2783 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2784 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2785 || (insn_code = recog_memoized (insn)) < 0
2786 || insn_n_dups[insn_code] > 0))
2787 validate_change (insn, &XEXP (x, i), new, 1);
2791 else if (fmt[i] == 'E')
2792 for (j = 0; j < XVECLEN (x, i); j++)
2793 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2799 /* LOC is a location within INSN that is an operand address (the contents of
2800 a MEM). Find the best equivalent address to use that is valid for this
2803 On most CISC machines, complicated address modes are costly, and rtx_cost
2804 is a good approximation for that cost. However, most RISC machines have
2805 only a few (usually only one) memory reference formats. If an address is
2806 valid at all, it is often just as cheap as any other address. Hence, for
2807 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2808 costs of various addresses. For two addresses of equal cost, choose the one
2809 with the highest `rtx_cost' value as that has the potential of eliminating
2810 the most insns. For equal costs, we choose the first in the equivalence
2811 class. Note that we ignore the fact that pseudo registers are cheaper
2812 than hard registers here because we would also prefer the pseudo registers.
2816 find_best_addr (insn, loc)
2820 struct table_elt *elt;
2823 struct table_elt *p;
2824 int found_better = 1;
2826 int save_do_not_record = do_not_record;
2827 int save_hash_arg_in_memory = hash_arg_in_memory;
2828 int save_hash_arg_in_struct = hash_arg_in_struct;
2833 /* Do not try to replace constant addresses or addresses of local and
2834 argument slots. These MEM expressions are made only once and inserted
2835 in many instructions, as well as being used to control symbol table
2836 output. It is not safe to clobber them.
2838 There are some uncommon cases where the address is already in a register
2839 for some reason, but we cannot take advantage of that because we have
2840 no easy way to unshare the MEM. In addition, looking up all stack
2841 addresses is costly. */
2842 if ((GET_CODE (addr) == PLUS
2843 && GET_CODE (XEXP (addr, 0)) == REG
2844 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2845 && (regno = REGNO (XEXP (addr, 0)),
2846 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2847 || regno == ARG_POINTER_REGNUM))
2848 || (GET_CODE (addr) == REG
2849 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2850 || regno == HARD_FRAME_POINTER_REGNUM
2851 || regno == ARG_POINTER_REGNUM))
2852 || GET_CODE (addr) == ADDRESSOF
2853 || CONSTANT_ADDRESS_P (addr))
2856 /* If this address is not simply a register, try to fold it. This will
2857 sometimes simplify the expression. Many simplifications
2858 will not be valid, but some, usually applying the associative rule, will
2859 be valid and produce better code. */
2860 if (GET_CODE (addr) != REG)
2862 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2866 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2867 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2868 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2870 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2872 && validate_change (insn, loc, folded, 0))
2876 /* If this address is not in the hash table, we can't look for equivalences
2877 of the whole address. Also, ignore if volatile. */
2880 hash = HASH (addr, Pmode);
2881 addr_volatile = do_not_record;
2882 do_not_record = save_do_not_record;
2883 hash_arg_in_memory = save_hash_arg_in_memory;
2884 hash_arg_in_struct = save_hash_arg_in_struct;
2889 elt = lookup (addr, hash, Pmode);
2891 #ifndef ADDRESS_COST
2894 int our_cost = elt->cost;
2896 /* Find the lowest cost below ours that works. */
2897 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2898 if (elt->cost < our_cost
2899 && (GET_CODE (elt->exp) == REG
2900 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2901 && validate_change (insn, loc,
2902 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2909 /* We need to find the best (under the criteria documented above) entry
2910 in the class that is valid. We use the `flag' field to indicate
2911 choices that were invalid and iterate until we can't find a better
2912 one that hasn't already been tried. */
2914 for (p = elt->first_same_value; p; p = p->next_same_value)
2917 while (found_better)
2919 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2920 int best_rtx_cost = (elt->cost + 1) >> 1;
2921 struct table_elt *best_elt = elt;
2924 for (p = elt->first_same_value; p; p = p->next_same_value)
2927 if ((GET_CODE (p->exp) == REG
2928 || exp_equiv_p (p->exp, p->exp, 1, 0))
2929 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2930 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2931 && (p->cost + 1) >> 1 > best_rtx_cost)))
2934 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2935 best_rtx_cost = (p->cost + 1) >> 1;
2942 if (validate_change (insn, loc,
2943 canon_reg (copy_rtx (best_elt->exp),
2952 /* If the address is a binary operation with the first operand a register
2953 and the second a constant, do the same as above, but looking for
2954 equivalences of the register. Then try to simplify before checking for
2955 the best address to use. This catches a few cases: First is when we
2956 have REG+const and the register is another REG+const. We can often merge
2957 the constants and eliminate one insn and one register. It may also be
2958 that a machine has a cheap REG+REG+const. Finally, this improves the
2959 code on the Alpha for unaligned byte stores. */
2961 if (flag_expensive_optimizations
2962 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2963 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2964 && GET_CODE (XEXP (*loc, 0)) == REG
2965 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2967 rtx c = XEXP (*loc, 1);
2970 hash = HASH (XEXP (*loc, 0), Pmode);
2971 do_not_record = save_do_not_record;
2972 hash_arg_in_memory = save_hash_arg_in_memory;
2973 hash_arg_in_struct = save_hash_arg_in_struct;
2975 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2979 /* We need to find the best (under the criteria documented above) entry
2980 in the class that is valid. We use the `flag' field to indicate
2981 choices that were invalid and iterate until we can't find a better
2982 one that hasn't already been tried. */
2984 for (p = elt->first_same_value; p; p = p->next_same_value)
2987 while (found_better)
2989 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2990 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2991 struct table_elt *best_elt = elt;
2992 rtx best_rtx = *loc;
2995 /* This is at worst case an O(n^2) algorithm, so limit our search
2996 to the first 32 elements on the list. This avoids trouble
2997 compiling code with very long basic blocks that can easily
2998 call cse_gen_binary so many times that we run out of memory. */
3001 for (p = elt->first_same_value, count = 0;
3003 p = p->next_same_value, count++)
3005 && (GET_CODE (p->exp) == REG
3006 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3008 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
3010 if ((CSE_ADDRESS_COST (new) < best_addr_cost
3011 || (CSE_ADDRESS_COST (new) == best_addr_cost
3012 && (COST (new) + 1) >> 1 > best_rtx_cost)))
3015 best_addr_cost = CSE_ADDRESS_COST (new);
3016 best_rtx_cost = (COST (new) + 1) >> 1;
3024 if (validate_change (insn, loc,
3025 canon_reg (copy_rtx (best_rtx),
3036 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3037 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3038 what values are being compared.
3040 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3041 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3042 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3043 compared to produce cc0.
3045 The return value is the comparison operator and is either the code of
3046 A or the code corresponding to the inverse of the comparison. */
3048 static enum rtx_code
3049 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3052 enum machine_mode *pmode1, *pmode2;
3056 arg1 = *parg1, arg2 = *parg2;
3058 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3060 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3062 /* Set non-zero when we find something of interest. */
3064 int reverse_code = 0;
3065 struct table_elt *p = 0;
3067 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3068 On machines with CC0, this is the only case that can occur, since
3069 fold_rtx will return the COMPARE or item being compared with zero
3072 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3075 /* If ARG1 is a comparison operator and CODE is testing for
3076 STORE_FLAG_VALUE, get the inner arguments. */
3078 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3081 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3082 && code == LT && STORE_FLAG_VALUE == -1)
3083 #ifdef FLOAT_STORE_FLAG_VALUE
3084 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3085 && FLOAT_STORE_FLAG_VALUE < 0)
3090 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3091 && code == GE && STORE_FLAG_VALUE == -1)
3092 #ifdef FLOAT_STORE_FLAG_VALUE
3093 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3094 && FLOAT_STORE_FLAG_VALUE < 0)
3097 x = arg1, reverse_code = 1;
3100 /* ??? We could also check for
3102 (ne (and (eq (...) (const_int 1))) (const_int 0))
3104 and related forms, but let's wait until we see them occurring. */
3107 /* Look up ARG1 in the hash table and see if it has an equivalence
3108 that lets us see what is being compared. */
3109 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
3111 if (p) p = p->first_same_value;
3113 for (; p; p = p->next_same_value)
3115 enum machine_mode inner_mode = GET_MODE (p->exp);
3117 /* If the entry isn't valid, skip it. */
3118 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3121 if (GET_CODE (p->exp) == COMPARE
3122 /* Another possibility is that this machine has a compare insn
3123 that includes the comparison code. In that case, ARG1 would
3124 be equivalent to a comparison operation that would set ARG1 to
3125 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3126 ORIG_CODE is the actual comparison being done; if it is an EQ,
3127 we must reverse ORIG_CODE. On machine with a negative value
3128 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3131 && GET_MODE_CLASS (inner_mode) == MODE_INT
3132 && (GET_MODE_BITSIZE (inner_mode)
3133 <= HOST_BITS_PER_WIDE_INT)
3134 && (STORE_FLAG_VALUE
3135 & ((HOST_WIDE_INT) 1
3136 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3137 #ifdef FLOAT_STORE_FLAG_VALUE
3139 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3140 && FLOAT_STORE_FLAG_VALUE < 0)
3143 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3148 else if ((code == EQ
3150 && GET_MODE_CLASS (inner_mode) == MODE_INT
3151 && (GET_MODE_BITSIZE (inner_mode)
3152 <= HOST_BITS_PER_WIDE_INT)
3153 && (STORE_FLAG_VALUE
3154 & ((HOST_WIDE_INT) 1
3155 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3156 #ifdef FLOAT_STORE_FLAG_VALUE
3158 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3159 && FLOAT_STORE_FLAG_VALUE < 0)
3162 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3169 /* If this is fp + constant, the equivalent is a better operand since
3170 it may let us predict the value of the comparison. */
3171 else if (NONZERO_BASE_PLUS_P (p->exp))
3178 /* If we didn't find a useful equivalence for ARG1, we are done.
3179 Otherwise, set up for the next iteration. */
3183 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3184 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3185 code = GET_CODE (x);
3188 code = reverse_condition (code);
3191 /* Return our results. Return the modes from before fold_rtx
3192 because fold_rtx might produce const_int, and then it's too late. */
3193 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3194 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3199 /* Try to simplify a unary operation CODE whose output mode is to be
3200 MODE with input operand OP whose mode was originally OP_MODE.
3201 Return zero if no simplification can be made. */
3204 simplify_unary_operation (code, mode, op, op_mode)
3206 enum machine_mode mode;
3208 enum machine_mode op_mode;
3210 register int width = GET_MODE_BITSIZE (mode);
3212 /* The order of these tests is critical so that, for example, we don't
3213 check the wrong mode (input vs. output) for a conversion operation,
3214 such as FIX. At some point, this should be simplified. */
3216 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3218 if (code == FLOAT && GET_MODE (op) == VOIDmode
3219 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3221 HOST_WIDE_INT hv, lv;
3224 if (GET_CODE (op) == CONST_INT)
3225 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3227 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3229 #ifdef REAL_ARITHMETIC
3230 REAL_VALUE_FROM_INT (d, lv, hv, mode);
3234 d = (double) (~ hv);
3235 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3236 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3237 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
3243 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3244 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3245 d += (double) (unsigned HOST_WIDE_INT) lv;
3247 #endif /* REAL_ARITHMETIC */
3248 d = real_value_truncate (mode, d);
3249 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3251 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
3252 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3254 HOST_WIDE_INT hv, lv;
3257 if (GET_CODE (op) == CONST_INT)
3258 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3260 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3262 if (op_mode == VOIDmode)
3264 /* We don't know how to interpret negative-looking numbers in
3265 this case, so don't try to fold those. */
3269 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3272 hv = 0, lv &= GET_MODE_MASK (op_mode);
3274 #ifdef REAL_ARITHMETIC
3275 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3278 d = (double) (unsigned HOST_WIDE_INT) hv;
3279 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3280 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3281 d += (double) (unsigned HOST_WIDE_INT) lv;
3282 #endif /* REAL_ARITHMETIC */
3283 d = real_value_truncate (mode, d);
3284 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3288 if (GET_CODE (op) == CONST_INT
3289 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3291 register HOST_WIDE_INT arg0 = INTVAL (op);
3292 register HOST_WIDE_INT val;
3305 val = (arg0 >= 0 ? arg0 : - arg0);
3309 /* Don't use ffs here. Instead, get low order bit and then its
3310 number. If arg0 is zero, this will return 0, as desired. */
3311 arg0 &= GET_MODE_MASK (mode);
3312 val = exact_log2 (arg0 & (- arg0)) + 1;
3320 if (op_mode == VOIDmode)
3322 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3324 /* If we were really extending the mode,
3325 we would have to distinguish between zero-extension
3326 and sign-extension. */
3327 if (width != GET_MODE_BITSIZE (op_mode))
3331 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3332 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3338 if (op_mode == VOIDmode)
3340 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3342 /* If we were really extending the mode,
3343 we would have to distinguish between zero-extension
3344 and sign-extension. */
3345 if (width != GET_MODE_BITSIZE (op_mode))
3349 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3352 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3354 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3355 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3368 /* Clear the bits that don't belong in our mode,
3369 unless they and our sign bit are all one.
3370 So we get either a reasonable negative value or a reasonable
3371 unsigned value for this mode. */
3372 if (width < HOST_BITS_PER_WIDE_INT
3373 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3374 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3375 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3377 /* If this would be an entire word for the target, but is not for
3378 the host, then sign-extend on the host so that the number will look
3379 the same way on the host that it would on the target.
3381 For example, when building a 64 bit alpha hosted 32 bit sparc
3382 targeted compiler, then we want the 32 bit unsigned value -1 to be
3383 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3384 The later confuses the sparc backend. */
3386 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3387 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3388 val |= ((HOST_WIDE_INT) (-1) << width);
3390 return GEN_INT (val);
3393 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3394 for a DImode operation on a CONST_INT. */
3395 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3396 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3398 HOST_WIDE_INT l1, h1, lv, hv;
3400 if (GET_CODE (op) == CONST_DOUBLE)
3401 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3403 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3413 neg_double (l1, h1, &lv, &hv);
3418 neg_double (l1, h1, &lv, &hv);
3426 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3428 lv = exact_log2 (l1 & (-l1)) + 1;
3432 /* This is just a change-of-mode, so do nothing. */
3437 if (op_mode == VOIDmode
3438 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3442 lv = l1 & GET_MODE_MASK (op_mode);
3446 if (op_mode == VOIDmode
3447 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3451 lv = l1 & GET_MODE_MASK (op_mode);
3452 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3453 && (lv & ((HOST_WIDE_INT) 1
3454 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3455 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3457 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3468 return immed_double_const (lv, hv, mode);
3471 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3472 else if (GET_CODE (op) == CONST_DOUBLE
3473 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3479 if (setjmp (handler))
3480 /* There used to be a warning here, but that is inadvisable.
3481 People may want to cause traps, and the natural way
3482 to do it should not get a warning. */
3485 set_float_handler (handler);
3487 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3492 d = REAL_VALUE_NEGATE (d);
3496 if (REAL_VALUE_NEGATIVE (d))
3497 d = REAL_VALUE_NEGATE (d);
3500 case FLOAT_TRUNCATE:
3501 d = real_value_truncate (mode, d);
3505 /* All this does is change the mode. */
3509 d = REAL_VALUE_RNDZINT (d);
3513 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3523 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3524 set_float_handler (NULL_PTR);
3528 else if (GET_CODE (op) == CONST_DOUBLE
3529 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3530 && GET_MODE_CLASS (mode) == MODE_INT
3531 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3537 if (setjmp (handler))
3540 set_float_handler (handler);
3542 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3547 val = REAL_VALUE_FIX (d);
3551 val = REAL_VALUE_UNSIGNED_FIX (d);
3558 set_float_handler (NULL_PTR);
3560 /* Clear the bits that don't belong in our mode,
3561 unless they and our sign bit are all one.
3562 So we get either a reasonable negative value or a reasonable
3563 unsigned value for this mode. */
3564 if (width < HOST_BITS_PER_WIDE_INT
3565 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3566 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3567 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3569 /* If this would be an entire word for the target, but is not for
3570 the host, then sign-extend on the host so that the number will look
3571 the same way on the host that it would on the target.
3573 For example, when building a 64 bit alpha hosted 32 bit sparc
3574 targeted compiler, then we want the 32 bit unsigned value -1 to be
3575 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3576 The later confuses the sparc backend. */
3578 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3579 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3580 val |= ((HOST_WIDE_INT) (-1) << width);
3582 return GEN_INT (val);
3585 /* This was formerly used only for non-IEEE float.
3586 eggert@twinsun.com says it is safe for IEEE also. */
3589 /* There are some simplifications we can do even if the operands
3595 /* (not (not X)) == X, similarly for NEG. */
3596 if (GET_CODE (op) == code)
3597 return XEXP (op, 0);
3601 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3602 becomes just the MINUS if its mode is MODE. This allows
3603 folding switch statements on machines using casesi (such as
3605 if (GET_CODE (op) == TRUNCATE
3606 && GET_MODE (XEXP (op, 0)) == mode
3607 && GET_CODE (XEXP (op, 0)) == MINUS
3608 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3609 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3610 return XEXP (op, 0);
3612 #ifdef POINTERS_EXTEND_UNSIGNED
3613 if (! POINTERS_EXTEND_UNSIGNED
3614 && mode == Pmode && GET_MODE (op) == ptr_mode
3616 return convert_memory_address (Pmode, op);
3620 #ifdef POINTERS_EXTEND_UNSIGNED
3622 if (POINTERS_EXTEND_UNSIGNED
3623 && mode == Pmode && GET_MODE (op) == ptr_mode
3625 return convert_memory_address (Pmode, op);
3637 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3638 and OP1. Return 0 if no simplification is possible.
3640 Don't use this for relational operations such as EQ or LT.
3641 Use simplify_relational_operation instead. */
3644 simplify_binary_operation (code, mode, op0, op1)
3646 enum machine_mode mode;
3649 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3651 int width = GET_MODE_BITSIZE (mode);
3654 /* Relational operations don't work here. We must know the mode
3655 of the operands in order to do the comparison correctly.
3656 Assuming a full word can give incorrect results.
3657 Consider comparing 128 with -128 in QImode. */
3659 if (GET_RTX_CLASS (code) == '<')
3662 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3663 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3664 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3665 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3667 REAL_VALUE_TYPE f0, f1, value;
3670 if (setjmp (handler))
3673 set_float_handler (handler);
3675 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3676 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3677 f0 = real_value_truncate (mode, f0);
3678 f1 = real_value_truncate (mode, f1);
3680 #ifdef REAL_ARITHMETIC
3681 #ifndef REAL_INFINITY
3682 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3685 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3699 #ifndef REAL_INFINITY
3706 value = MIN (f0, f1);
3709 value = MAX (f0, f1);
3716 value = real_value_truncate (mode, value);
3717 set_float_handler (NULL_PTR);
3718 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3720 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3722 /* We can fold some multi-word operations. */
3723 if (GET_MODE_CLASS (mode) == MODE_INT
3724 && width == HOST_BITS_PER_WIDE_INT * 2
3725 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3726 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3728 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3730 if (GET_CODE (op0) == CONST_DOUBLE)
3731 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3733 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3735 if (GET_CODE (op1) == CONST_DOUBLE)
3736 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3738 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3743 /* A - B == A + (-B). */
3744 neg_double (l2, h2, &lv, &hv);
3747 /* .. fall through ... */
3750 add_double (l1, h1, l2, h2, &lv, &hv);
3754 mul_double (l1, h1, l2, h2, &lv, &hv);
3757 case DIV: case MOD: case UDIV: case UMOD:
3758 /* We'd need to include tree.h to do this and it doesn't seem worth
3763 lv = l1 & l2, hv = h1 & h2;
3767 lv = l1 | l2, hv = h1 | h2;
3771 lv = l1 ^ l2, hv = h1 ^ h2;
3777 && ((unsigned HOST_WIDE_INT) l1
3778 < (unsigned HOST_WIDE_INT) l2)))
3787 && ((unsigned HOST_WIDE_INT) l1
3788 > (unsigned HOST_WIDE_INT) l2)))
3795 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3797 && ((unsigned HOST_WIDE_INT) l1
3798 < (unsigned HOST_WIDE_INT) l2)))
3805 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3807 && ((unsigned HOST_WIDE_INT) l1
3808 > (unsigned HOST_WIDE_INT) l2)))
3814 case LSHIFTRT: case ASHIFTRT:
3816 case ROTATE: case ROTATERT:
3817 #ifdef SHIFT_COUNT_TRUNCATED
3818 if (SHIFT_COUNT_TRUNCATED)
3819 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3822 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3825 if (code == LSHIFTRT || code == ASHIFTRT)
3826 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3828 else if (code == ASHIFT)
3829 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3830 else if (code == ROTATE)
3831 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3832 else /* code == ROTATERT */
3833 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3840 return immed_double_const (lv, hv, mode);
3843 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3844 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3846 /* Even if we can't compute a constant result,
3847 there are some cases worth simplifying. */
3852 /* In IEEE floating point, x+0 is not the same as x. Similarly
3853 for the other optimizations below. */
3854 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3855 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3858 if (op1 == CONST0_RTX (mode))
3861 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3862 if (GET_CODE (op0) == NEG)
3863 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3864 else if (GET_CODE (op1) == NEG)
3865 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3867 /* Handle both-operands-constant cases. We can only add
3868 CONST_INTs to constants since the sum of relocatable symbols
3869 can't be handled by most assemblers. Don't add CONST_INT
3870 to CONST_INT since overflow won't be computed properly if wider
3871 than HOST_BITS_PER_WIDE_INT. */
3873 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3874 && GET_CODE (op1) == CONST_INT)
3875 return plus_constant (op0, INTVAL (op1));
3876 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3877 && GET_CODE (op0) == CONST_INT)
3878 return plus_constant (op1, INTVAL (op0));
3880 /* See if this is something like X * C - X or vice versa or
3881 if the multiplication is written as a shift. If so, we can
3882 distribute and make a new multiply, shift, or maybe just
3883 have X (if C is 2 in the example above). But don't make
3884 real multiply if we didn't have one before. */
3886 if (! FLOAT_MODE_P (mode))
3888 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3889 rtx lhs = op0, rhs = op1;
3892 if (GET_CODE (lhs) == NEG)
3893 coeff0 = -1, lhs = XEXP (lhs, 0);
3894 else if (GET_CODE (lhs) == MULT
3895 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3897 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3900 else if (GET_CODE (lhs) == ASHIFT
3901 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3902 && INTVAL (XEXP (lhs, 1)) >= 0
3903 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3905 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3906 lhs = XEXP (lhs, 0);
3909 if (GET_CODE (rhs) == NEG)
3910 coeff1 = -1, rhs = XEXP (rhs, 0);
3911 else if (GET_CODE (rhs) == MULT
3912 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3914 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3917 else if (GET_CODE (rhs) == ASHIFT
3918 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3919 && INTVAL (XEXP (rhs, 1)) >= 0
3920 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3922 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3923 rhs = XEXP (rhs, 0);
3926 if (rtx_equal_p (lhs, rhs))
3928 tem = cse_gen_binary (MULT, mode, lhs,
3929 GEN_INT (coeff0 + coeff1));
3930 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3934 /* If one of the operands is a PLUS or a MINUS, see if we can
3935 simplify this by the associative law.
3936 Don't use the associative law for floating point.
3937 The inaccuracy makes it nonassociative,
3938 and subtle programs can break if operations are associated. */
3940 if (INTEGRAL_MODE_P (mode)
3941 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3942 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3943 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3949 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3950 using cc0, in which case we want to leave it as a COMPARE
3951 so we can distinguish it from a register-register-copy.
3953 In IEEE floating point, x-0 is not the same as x. */
3955 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3956 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3957 && op1 == CONST0_RTX (mode))
3960 /* Do nothing here. */
3965 /* None of these optimizations can be done for IEEE
3967 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3968 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3971 /* We can't assume x-x is 0 even with non-IEEE floating point,
3972 but since it is zero except in very strange circumstances, we
3973 will treat it as zero with -ffast-math. */
3974 if (rtx_equal_p (op0, op1)
3975 && ! side_effects_p (op0)
3976 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3977 return CONST0_RTX (mode);
3979 /* Change subtraction from zero into negation. */
3980 if (op0 == CONST0_RTX (mode))
3981 return gen_rtx_NEG (mode, op1);
3983 /* (-1 - a) is ~a. */
3984 if (op0 == constm1_rtx)
3985 return gen_rtx_NOT (mode, op1);
3987 /* Subtracting 0 has no effect. */
3988 if (op1 == CONST0_RTX (mode))
3991 /* See if this is something like X * C - X or vice versa or
3992 if the multiplication is written as a shift. If so, we can
3993 distribute and make a new multiply, shift, or maybe just
3994 have X (if C is 2 in the example above). But don't make
3995 real multiply if we didn't have one before. */
3997 if (! FLOAT_MODE_P (mode))
3999 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
4000 rtx lhs = op0, rhs = op1;
4003 if (GET_CODE (lhs) == NEG)
4004 coeff0 = -1, lhs = XEXP (lhs, 0);
4005 else if (GET_CODE (lhs) == MULT
4006 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
4008 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
4011 else if (GET_CODE (lhs) == ASHIFT
4012 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
4013 && INTVAL (XEXP (lhs, 1)) >= 0
4014 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
4016 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
4017 lhs = XEXP (lhs, 0);
4020 if (GET_CODE (rhs) == NEG)
4021 coeff1 = - 1, rhs = XEXP (rhs, 0);
4022 else if (GET_CODE (rhs) == MULT
4023 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
4025 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
4028 else if (GET_CODE (rhs) == ASHIFT
4029 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
4030 && INTVAL (XEXP (rhs, 1)) >= 0
4031 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
4033 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
4034 rhs = XEXP (rhs, 0);
4037 if (rtx_equal_p (lhs, rhs))
4039 tem = cse_gen_binary (MULT, mode, lhs,
4040 GEN_INT (coeff0 - coeff1));
4041 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
4045 /* (a - (-b)) -> (a + b). */
4046 if (GET_CODE (op1) == NEG)
4047 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
4049 /* If one of the operands is a PLUS or a MINUS, see if we can
4050 simplify this by the associative law.
4051 Don't use the associative law for floating point.
4052 The inaccuracy makes it nonassociative,
4053 and subtle programs can break if operations are associated. */
4055 if (INTEGRAL_MODE_P (mode)
4056 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
4057 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
4058 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
4061 /* Don't let a relocatable value get a negative coeff. */
4062 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
4063 return plus_constant (op0, - INTVAL (op1));
4065 /* (x - (x & y)) -> (x & ~y) */
4066 if (GET_CODE (op1) == AND)
4068 if (rtx_equal_p (op0, XEXP (op1, 0)))
4069 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 1)));
4070 if (rtx_equal_p (op0, XEXP (op1, 1)))
4071 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 0)));
4076 if (op1 == constm1_rtx)
4078 tem = simplify_unary_operation (NEG, mode, op0, mode);
4080 return tem ? tem : gen_rtx_NEG (mode, op0);
4083 /* In IEEE floating point, x*0 is not always 0. */
4084 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4085 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4086 && op1 == CONST0_RTX (mode)
4087 && ! side_effects_p (op0))
4090 /* In IEEE floating point, x*1 is not equivalent to x for nans.
4091 However, ANSI says we can drop signals,
4092 so we can do this anyway. */
4093 if (op1 == CONST1_RTX (mode))
4096 /* Convert multiply by constant power of two into shift unless
4097 we are still generating RTL. This test is a kludge. */
4098 if (GET_CODE (op1) == CONST_INT
4099 && (val = exact_log2 (INTVAL (op1))) >= 0
4100 /* If the mode is larger than the host word size, and the
4101 uppermost bit is set, then this isn't a power of two due
4102 to implicit sign extension. */
4103 && (width <= HOST_BITS_PER_WIDE_INT
4104 || val != HOST_BITS_PER_WIDE_INT - 1)
4105 && ! rtx_equal_function_value_matters)
4106 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
4108 if (GET_CODE (op1) == CONST_DOUBLE
4109 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
4113 int op1is2, op1ism1;
4115 if (setjmp (handler))
4118 set_float_handler (handler);
4119 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4120 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
4121 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
4122 set_float_handler (NULL_PTR);
4124 /* x*2 is x+x and x*(-1) is -x */
4125 if (op1is2 && GET_MODE (op0) == mode)
4126 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
4128 else if (op1ism1 && GET_MODE (op0) == mode)
4129 return gen_rtx_NEG (mode, op0);
4134 if (op1 == const0_rtx)
4136 if (GET_CODE (op1) == CONST_INT
4137 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4139 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4141 /* A | (~A) -> -1 */
4142 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4143 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4144 && ! side_effects_p (op0)
4145 && GET_MODE_CLASS (mode) != MODE_CC)
4150 if (op1 == const0_rtx)
4152 if (GET_CODE (op1) == CONST_INT
4153 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4154 return gen_rtx_NOT (mode, op0);
4155 if (op0 == op1 && ! side_effects_p (op0)
4156 && GET_MODE_CLASS (mode) != MODE_CC)
4161 if (op1 == const0_rtx && ! side_effects_p (op0))
4163 if (GET_CODE (op1) == CONST_INT
4164 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4166 if (op0 == op1 && ! side_effects_p (op0)
4167 && GET_MODE_CLASS (mode) != MODE_CC)
4170 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4171 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4172 && ! side_effects_p (op0)
4173 && GET_MODE_CLASS (mode) != MODE_CC)
4178 /* Convert divide by power of two into shift (divide by 1 handled
4180 if (GET_CODE (op1) == CONST_INT
4181 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
4182 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
4184 /* ... fall through ... */
4187 if (op1 == CONST1_RTX (mode))
4190 /* In IEEE floating point, 0/x is not always 0. */
4191 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4192 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4193 && op0 == CONST0_RTX (mode)
4194 && ! side_effects_p (op1))
4197 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4198 /* Change division by a constant into multiplication. Only do
4199 this with -ffast-math until an expert says it is safe in
4201 else if (GET_CODE (op1) == CONST_DOUBLE
4202 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
4203 && op1 != CONST0_RTX (mode)
4207 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4209 if (! REAL_VALUES_EQUAL (d, dconst0))
4211 #if defined (REAL_ARITHMETIC)
4212 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
4213 return gen_rtx_MULT (mode, op0,
4214 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
4216 return gen_rtx_MULT (mode, op0,
4217 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
4225 /* Handle modulus by power of two (mod with 1 handled below). */
4226 if (GET_CODE (op1) == CONST_INT
4227 && exact_log2 (INTVAL (op1)) > 0)
4228 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
4230 /* ... fall through ... */
4233 if ((op0 == const0_rtx || op1 == const1_rtx)
4234 && ! side_effects_p (op0) && ! side_effects_p (op1))
4240 /* Rotating ~0 always results in ~0. */
4241 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
4242 && INTVAL (op0) == GET_MODE_MASK (mode)
4243 && ! side_effects_p (op1))
4246 /* ... fall through ... */
4251 if (op1 == const0_rtx)
4253 if (op0 == const0_rtx && ! side_effects_p (op1))
4258 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4259 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
4260 && ! side_effects_p (op0))
4262 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4267 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4269 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4270 && ! side_effects_p (op0))
4272 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4277 if (op1 == const0_rtx && ! side_effects_p (op0))
4279 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4284 if (op1 == constm1_rtx && ! side_effects_p (op0))
4286 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4297 /* Get the integer argument values in two forms:
4298 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4300 arg0 = INTVAL (op0);
4301 arg1 = INTVAL (op1);
4303 if (width < HOST_BITS_PER_WIDE_INT)
4305 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4306 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4309 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4310 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4313 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4314 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4322 /* Compute the value of the arithmetic. */
4327 val = arg0s + arg1s;
4331 val = arg0s - arg1s;
4335 val = arg0s * arg1s;
4341 val = arg0s / arg1s;
4347 val = arg0s % arg1s;
4353 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4359 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4375 /* If shift count is undefined, don't fold it; let the machine do
4376 what it wants. But truncate it if the machine will do that. */
4380 #ifdef SHIFT_COUNT_TRUNCATED
4381 if (SHIFT_COUNT_TRUNCATED)
4385 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4392 #ifdef SHIFT_COUNT_TRUNCATED
4393 if (SHIFT_COUNT_TRUNCATED)
4397 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4404 #ifdef SHIFT_COUNT_TRUNCATED
4405 if (SHIFT_COUNT_TRUNCATED)
4409 val = arg0s >> arg1;
4411 /* Bootstrap compiler may not have sign extended the right shift.
4412 Manually extend the sign to insure bootstrap cc matches gcc. */
4413 if (arg0s < 0 && arg1 > 0)
4414 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4423 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4424 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4432 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4433 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4437 /* Do nothing here. */
4441 val = arg0s <= arg1s ? arg0s : arg1s;
4445 val = ((unsigned HOST_WIDE_INT) arg0
4446 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4450 val = arg0s > arg1s ? arg0s : arg1s;
4454 val = ((unsigned HOST_WIDE_INT) arg0
4455 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4462 /* Clear the bits that don't belong in our mode, unless they and our sign
4463 bit are all one. So we get either a reasonable negative value or a
4464 reasonable unsigned value for this mode. */
4465 if (width < HOST_BITS_PER_WIDE_INT
4466 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4467 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4468 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4470 /* If this would be an entire word for the target, but is not for
4471 the host, then sign-extend on the host so that the number will look
4472 the same way on the host that it would on the target.
4474 For example, when building a 64 bit alpha hosted 32 bit sparc
4475 targeted compiler, then we want the 32 bit unsigned value -1 to be
4476 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4477 The later confuses the sparc backend. */
4479 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4480 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4481 val |= ((HOST_WIDE_INT) (-1) << width);
4483 return GEN_INT (val);
4486 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4489 Rather than test for specific case, we do this by a brute-force method
4490 and do all possible simplifications until no more changes occur. Then
4491 we rebuild the operation. */
4494 simplify_plus_minus (code, mode, op0, op1)
4496 enum machine_mode mode;
4502 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4503 int first = 1, negate = 0, changed;
4505 HOST_WIDE_INT fp_offset = 0;
4507 bzero ((char *) ops, sizeof ops);
4509 /* Set up the two operands and then expand them until nothing has been
4510 changed. If we run out of room in our array, give up; this should
4511 almost never happen. */
4513 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4520 for (i = 0; i < n_ops; i++)
4521 switch (GET_CODE (ops[i]))
4524 if (flag_propolice_protection
4525 && XEXP (ops[i], 0) == virtual_stack_vars_rtx
4526 && GET_CODE (XEXP (ops[i], 1)) == CONST_INT)
4527 fp_offset = INTVAL (XEXP (ops[i], 1));
4532 ops[n_ops] = XEXP (ops[i], 1);
4533 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4534 ops[i] = XEXP (ops[i], 0);
4540 ops[i] = XEXP (ops[i], 0);
4541 negs[i] = ! negs[i];
4546 ops[i] = XEXP (ops[i], 0);
4552 /* ~a -> (-a - 1) */
4555 ops[n_ops] = constm1_rtx;
4556 negs[n_ops++] = negs[i];
4557 ops[i] = XEXP (ops[i], 0);
4558 negs[i] = ! negs[i];
4565 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4573 /* If we only have two operands, we can't do anything. */
4577 /* Now simplify each pair of operands until nothing changes. The first
4578 time through just simplify constants against each other. */
4585 for (i = 0; i < n_ops - 1; i++)
4586 for (j = i + 1; j < n_ops; j++)
4587 if (ops[i] != 0 && ops[j] != 0
4588 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4590 rtx lhs = ops[i], rhs = ops[j];
4591 enum rtx_code ncode = PLUS;
4593 if (negs[i] && ! negs[j])
4594 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4595 else if (! negs[i] && negs[j])
4598 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4601 ops[i] = tem, ops[j] = 0;
4602 negs[i] = negs[i] && negs[j];
4603 if (GET_CODE (tem) == NEG)
4604 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4606 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4607 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4615 /* Pack all the operands to the lower-numbered entries and give up if
4616 we didn't reduce the number of operands we had. Make sure we
4617 count a CONST as two operands. If we have the same number of
4618 operands, but have made more CONSTs than we had, this is also
4619 an improvement, so accept it. */
4621 for (i = 0, j = 0; j < n_ops; j++)
4624 ops[i] = ops[j], negs[i++] = negs[j];
4625 if (GET_CODE (ops[j]) == CONST)
4629 if (i + n_consts > input_ops
4630 || (i + n_consts == input_ops && n_consts <= input_consts))
4635 /* If we have a CONST_INT, put it last. */
4636 for (i = 0; i < n_ops - 1; i++)
4637 if (GET_CODE (ops[i]) == CONST_INT)
4639 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4640 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4643 if (flag_propolice_protection)
4645 /* keep the addressing style of local variables
4646 as (plus (virtual_stack_vars_rtx) (CONST_int x))
4647 (1) inline function is expanded, (+ (+VFP c1) -c2)=>(+ VFP c1-c2)
4648 (2) the case ary[r-1], (+ (+VFP c1) (+r -1))=>(+ R (+r -1))
4650 for (i = 0; i < n_ops; i++)
4651 #ifdef FRAME_GROWS_DOWNWARD
4652 if (ops[i] == virtual_stack_vars_rtx)
4654 if (ops[i] == virtual_stack_vars_rtx
4655 || ops[i] == frame_pointer_rtx)
4658 if (GET_CODE (ops[n_ops - 1]) == CONST_INT)
4660 HOST_WIDE_INT value = INTVAL (ops[n_ops - 1]);
4661 if (n_ops < 3 || value >= fp_offset)
4663 ops[i] = plus_constant (ops[i], value);
4668 if (n_ops+1 + n_consts > input_ops
4669 || (n_ops+1 + n_consts == input_ops && n_consts <= input_consts))
4671 ops[n_ops - 1] = GEN_INT (value-fp_offset);
4672 ops[i] = plus_constant (ops[i], fp_offset);
4675 /* buf[BUFSIZE]: buf is the first local variable (+ (+ fp -S) S)
4676 or (+ (fp 0) r) ==> ((+ (+fp 1) r) -1) */
4677 else if (fp_offset != 0)
4679 #ifndef FRAME_GROWS_DOWNWARD
4681 * For the case of buf[i], i: REG, buf: (plus fp 0),
4683 else if (fp_offset == 0)
4690 /* Put a non-negated operand first. If there aren't any, make all
4691 operands positive and negate the whole thing later. */
4692 for (i = 0; i < n_ops && negs[i]; i++)
4697 for (i = 0; i < n_ops; i++)
4703 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4704 j = negs[0], negs[0] = negs[i], negs[i] = j;
4707 /* Now make the result by performing the requested operations. */
4709 for (i = 1; i < n_ops; i++)
4710 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4712 return negate ? gen_rtx_NEG (mode, result) : result;
4715 /* Make a binary operation by properly ordering the operands and
4716 seeing if the expression folds. */
4719 cse_gen_binary (code, mode, op0, op1)
4721 enum machine_mode mode;
4726 /* Put complex operands first and constants second if commutative. */
4727 if (GET_RTX_CLASS (code) == 'c'
4728 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4729 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4730 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4731 || (GET_CODE (op0) == SUBREG
4732 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4733 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4734 tem = op0, op0 = op1, op1 = tem;
4736 /* If this simplifies, do it. */
4737 tem = simplify_binary_operation (code, mode, op0, op1);
4742 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4743 just form the operation. */
4745 if (code == PLUS && GET_CODE (op1) == CONST_INT
4746 && GET_MODE (op0) != VOIDmode)
4747 return plus_constant (op0, INTVAL (op1));
4748 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4749 && GET_MODE (op0) != VOIDmode)
4750 return plus_constant (op0, - INTVAL (op1));
4752 return gen_rtx_fmt_ee (code, mode, op0, op1);
4760 int equal, op0lt, op1lt;
4764 check_fold_consts (data)
4767 struct cfc_args * args = (struct cfc_args *) data;
4768 REAL_VALUE_TYPE d0, d1;
4770 REAL_VALUE_FROM_CONST_DOUBLE (d0, args->op0);
4771 REAL_VALUE_FROM_CONST_DOUBLE (d1, args->op1);
4772 args->equal = REAL_VALUES_EQUAL (d0, d1);
4773 args->op0lt = REAL_VALUES_LESS (d0, d1);
4774 args->op1lt = REAL_VALUES_LESS (d1, d0);
4777 /* Like simplify_binary_operation except used for relational operators.
4778 MODE is the mode of the operands, not that of the result. If MODE
4779 is VOIDmode, both operands must also be VOIDmode and we compare the
4780 operands in "infinite precision".
4782 If no simplification is possible, this function returns zero. Otherwise,
4783 it returns either const_true_rtx or const0_rtx. */
4786 simplify_relational_operation (code, mode, op0, op1)
4788 enum machine_mode mode;
4791 int equal, op0lt, op0ltu, op1lt, op1ltu;
4794 /* If op0 is a compare, extract the comparison arguments from it. */
4795 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4796 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4798 /* We can't simplify MODE_CC values since we don't know what the
4799 actual comparison is. */
4800 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4807 /* For integer comparisons of A and B maybe we can simplify A - B and can
4808 then simplify a comparison of that with zero. If A and B are both either
4809 a register or a CONST_INT, this can't help; testing for these cases will
4810 prevent infinite recursion here and speed things up.
4812 If CODE is an unsigned comparison, then we can never do this optimization,
4813 because it gives an incorrect result if the subtraction wraps around zero.
4814 ANSI C defines unsigned operations such that they never overflow, and
4815 thus such cases can not be ignored. */
4817 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4818 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4819 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4820 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4821 && code != GTU && code != GEU && code != LTU && code != LEU)
4822 return simplify_relational_operation (signed_condition (code),
4823 mode, tem, const0_rtx);
4825 /* For non-IEEE floating-point, if the two operands are equal, we know the
4827 if (rtx_equal_p (op0, op1)
4828 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4829 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4830 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4832 /* If the operands are floating-point constants, see if we can fold
4834 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4835 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4836 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4838 struct cfc_args args;
4840 /* Setup input for check_fold_consts() */
4844 if (do_float_handler(check_fold_consts, (PTR) &args) == 0)
4845 /* We got an exception from check_fold_consts() */
4848 /* Receive output from check_fold_consts() */
4850 op0lt = op0ltu = args.op0lt;
4851 op1lt = op1ltu = args.op1lt;
4853 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4855 /* Otherwise, see if the operands are both integers. */
4856 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4857 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4858 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4860 int width = GET_MODE_BITSIZE (mode);
4861 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4862 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4864 /* Get the two words comprising each integer constant. */
4865 if (GET_CODE (op0) == CONST_DOUBLE)
4867 l0u = l0s = CONST_DOUBLE_LOW (op0);
4868 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4872 l0u = l0s = INTVAL (op0);
4873 h0u = h0s = l0s < 0 ? -1 : 0;
4876 if (GET_CODE (op1) == CONST_DOUBLE)
4878 l1u = l1s = CONST_DOUBLE_LOW (op1);
4879 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4883 l1u = l1s = INTVAL (op1);
4884 h1u = h1s = l1s < 0 ? -1 : 0;
4887 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4888 we have to sign or zero-extend the values. */
4889 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4890 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4892 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4894 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4895 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4897 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4898 l0s |= ((HOST_WIDE_INT) (-1) << width);
4900 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4901 l1s |= ((HOST_WIDE_INT) (-1) << width);
4904 equal = (h0u == h1u && l0u == l1u);
4905 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4906 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4907 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4908 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4911 /* Otherwise, there are some code-specific tests we can make. */
4917 /* References to the frame plus a constant or labels cannot
4918 be zero, but a SYMBOL_REF can due to #pragma weak. */
4919 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4920 || GET_CODE (op0) == LABEL_REF)
4921 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4922 /* On some machines, the ap reg can be 0 sometimes. */
4923 && op0 != arg_pointer_rtx
4930 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4931 || GET_CODE (op0) == LABEL_REF)
4932 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4933 && op0 != arg_pointer_rtx
4936 return const_true_rtx;
4940 /* Unsigned values are never negative. */
4941 if (op1 == const0_rtx)
4942 return const_true_rtx;
4946 if (op1 == const0_rtx)
4951 /* Unsigned values are never greater than the largest
4953 if (GET_CODE (op1) == CONST_INT
4954 && INTVAL (op1) == GET_MODE_MASK (mode)
4955 && INTEGRAL_MODE_P (mode))
4956 return const_true_rtx;
4960 if (GET_CODE (op1) == CONST_INT
4961 && INTVAL (op1) == GET_MODE_MASK (mode)
4962 && INTEGRAL_MODE_P (mode))
4973 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4978 return equal ? const_true_rtx : const0_rtx;
4980 return ! equal ? const_true_rtx : const0_rtx;
4982 return op0lt ? const_true_rtx : const0_rtx;
4984 return op1lt ? const_true_rtx : const0_rtx;
4986 return op0ltu ? const_true_rtx : const0_rtx;
4988 return op1ltu ? const_true_rtx : const0_rtx;
4990 return equal || op0lt ? const_true_rtx : const0_rtx;
4992 return equal || op1lt ? const_true_rtx : const0_rtx;
4994 return equal || op0ltu ? const_true_rtx : const0_rtx;
4996 return equal || op1ltu ? const_true_rtx : const0_rtx;
5002 /* Simplify CODE, an operation with result mode MODE and three operands,
5003 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
5004 a constant. Return 0 if no simplifications is possible. */
5007 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
5009 enum machine_mode mode, op0_mode;
5012 int width = GET_MODE_BITSIZE (mode);
5014 /* VOIDmode means "infinite" precision. */
5016 width = HOST_BITS_PER_WIDE_INT;
5022 if (GET_CODE (op0) == CONST_INT
5023 && GET_CODE (op1) == CONST_INT
5024 && GET_CODE (op2) == CONST_INT
5025 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
5026 && width <= HOST_BITS_PER_WIDE_INT)
5028 /* Extracting a bit-field from a constant */
5029 HOST_WIDE_INT val = INTVAL (op0);
5031 if (BITS_BIG_ENDIAN)
5032 val >>= (GET_MODE_BITSIZE (op0_mode)
5033 - INTVAL (op2) - INTVAL (op1));
5035 val >>= INTVAL (op2);
5037 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
5039 /* First zero-extend. */
5040 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
5041 /* If desired, propagate sign bit. */
5042 if (code == SIGN_EXTRACT
5043 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
5044 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
5047 /* Clear the bits that don't belong in our mode,
5048 unless they and our sign bit are all one.
5049 So we get either a reasonable negative value or a reasonable
5050 unsigned value for this mode. */
5051 if (width < HOST_BITS_PER_WIDE_INT
5052 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
5053 != ((HOST_WIDE_INT) (-1) << (width - 1))))
5054 val &= ((HOST_WIDE_INT) 1 << width) - 1;
5056 return GEN_INT (val);
5061 if (GET_CODE (op0) == CONST_INT)
5062 return op0 != const0_rtx ? op1 : op2;
5064 /* Convert a == b ? b : a to "a". */
5065 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
5066 && rtx_equal_p (XEXP (op0, 0), op1)
5067 && rtx_equal_p (XEXP (op0, 1), op2))
5069 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
5070 && rtx_equal_p (XEXP (op0, 1), op1)
5071 && rtx_equal_p (XEXP (op0, 0), op2))
5073 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
5076 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
5077 XEXP (op0, 0), XEXP (op0, 1));
5078 /* See if any simplifications were possible. */
5079 if (temp == const0_rtx)
5081 else if (temp == const1_rtx)
5093 /* If X is a nontrivial arithmetic operation on an argument
5094 for which a constant value can be determined, return
5095 the result of operating on that value, as a constant.
5096 Otherwise, return X, possibly with one or more operands
5097 modified by recursive calls to this function.
5099 If X is a register whose contents are known, we do NOT
5100 return those contents here. equiv_constant is called to
5103 INSN is the insn that we may be modifying. If it is 0, make a copy
5104 of X before modifying it. */
5111 register enum rtx_code code;
5112 register enum machine_mode mode;
5119 /* Folded equivalents of first two operands of X. */
5123 /* Constant equivalents of first three operands of X;
5124 0 when no such equivalent is known. */
5129 /* The mode of the first operand of X. We need this for sign and zero
5131 enum machine_mode mode_arg0;
5136 mode = GET_MODE (x);
5137 code = GET_CODE (x);
5146 /* No use simplifying an EXPR_LIST
5147 since they are used only for lists of args
5148 in a function call's REG_EQUAL note. */
5150 /* Changing anything inside an ADDRESSOF is incorrect; we don't
5151 want to (e.g.,) make (addressof (const_int 0)) just because
5152 the location is known to be zero. */
5158 return prev_insn_cc0;
5162 /* If the next insn is a CODE_LABEL followed by a jump table,
5163 PC's value is a LABEL_REF pointing to that label. That
5164 lets us fold switch statements on the Vax. */
5165 if (insn && GET_CODE (insn) == JUMP_INSN)
5167 rtx next = next_nonnote_insn (insn);
5169 if (next && GET_CODE (next) == CODE_LABEL
5170 && NEXT_INSN (next) != 0
5171 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
5172 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
5173 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
5174 return gen_rtx_LABEL_REF (Pmode, next);
5179 /* See if we previously assigned a constant value to this SUBREG. */
5180 if ((new = lookup_as_function (x, CONST_INT)) != 0
5181 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
5184 /* If this is a paradoxical SUBREG, we have no idea what value the
5185 extra bits would have. However, if the operand is equivalent
5186 to a SUBREG whose operand is the same as our mode, and all the
5187 modes are within a word, we can just use the inner operand
5188 because these SUBREGs just say how to treat the register.
5190 Similarly if we find an integer constant. */
5192 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
5194 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
5195 struct table_elt *elt;
5197 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
5198 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
5199 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
5201 for (elt = elt->first_same_value;
5202 elt; elt = elt->next_same_value)
5204 if (CONSTANT_P (elt->exp)
5205 && GET_MODE (elt->exp) == VOIDmode)
5208 if (GET_CODE (elt->exp) == SUBREG
5209 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5210 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5211 return copy_rtx (SUBREG_REG (elt->exp));
5217 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
5218 We might be able to if the SUBREG is extracting a single word in an
5219 integral mode or extracting the low part. */
5221 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
5222 const_arg0 = equiv_constant (folded_arg0);
5224 folded_arg0 = const_arg0;
5226 if (folded_arg0 != SUBREG_REG (x))
5230 if (GET_MODE_CLASS (mode) == MODE_INT
5231 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5232 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
5233 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
5234 GET_MODE (SUBREG_REG (x)));
5235 if (new == 0 && subreg_lowpart_p (x))
5236 new = gen_lowpart_if_possible (mode, folded_arg0);
5241 /* If this is a narrowing SUBREG and our operand is a REG, see if
5242 we can find an equivalence for REG that is an arithmetic operation
5243 in a wider mode where both operands are paradoxical SUBREGs
5244 from objects of our result mode. In that case, we couldn't report
5245 an equivalent value for that operation, since we don't know what the
5246 extra bits will be. But we can find an equivalence for this SUBREG
5247 by folding that operation is the narrow mode. This allows us to
5248 fold arithmetic in narrow modes when the machine only supports
5249 word-sized arithmetic.
5251 Also look for a case where we have a SUBREG whose operand is the
5252 same as our result. If both modes are smaller than a word, we
5253 are simply interpreting a register in different modes and we
5254 can use the inner value. */
5256 if (GET_CODE (folded_arg0) == REG
5257 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
5258 && subreg_lowpart_p (x))
5260 struct table_elt *elt;
5262 /* We can use HASH here since we know that canon_hash won't be
5264 elt = lookup (folded_arg0,
5265 HASH (folded_arg0, GET_MODE (folded_arg0)),
5266 GET_MODE (folded_arg0));
5269 elt = elt->first_same_value;
5271 for (; elt; elt = elt->next_same_value)
5273 enum rtx_code eltcode = GET_CODE (elt->exp);
5275 /* Just check for unary and binary operations. */
5276 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
5277 && GET_CODE (elt->exp) != SIGN_EXTEND
5278 && GET_CODE (elt->exp) != ZERO_EXTEND
5279 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5280 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
5282 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
5284 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5285 op0 = fold_rtx (op0, NULL_RTX);
5287 op0 = equiv_constant (op0);
5289 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
5292 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
5293 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
5294 && eltcode != DIV && eltcode != MOD
5295 && eltcode != UDIV && eltcode != UMOD
5296 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
5297 && eltcode != ROTATE && eltcode != ROTATERT
5298 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5299 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
5301 || CONSTANT_P (XEXP (elt->exp, 0)))
5302 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
5303 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
5305 || CONSTANT_P (XEXP (elt->exp, 1))))
5307 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
5308 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
5310 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5311 op0 = fold_rtx (op0, NULL_RTX);
5314 op0 = equiv_constant (op0);
5316 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
5317 op1 = fold_rtx (op1, NULL_RTX);
5320 op1 = equiv_constant (op1);
5322 /* If we are looking for the low SImode part of
5323 (ashift:DI c (const_int 32)), it doesn't work
5324 to compute that in SImode, because a 32-bit shift
5325 in SImode is unpredictable. We know the value is 0. */
5327 && GET_CODE (elt->exp) == ASHIFT
5328 && GET_CODE (op1) == CONST_INT
5329 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
5331 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
5333 /* If the count fits in the inner mode's width,
5334 but exceeds the outer mode's width,
5335 the value will get truncated to 0
5339 /* If the count exceeds even the inner mode's width,
5340 don't fold this expression. */
5343 else if (op0 && op1)
5344 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5348 else if (GET_CODE (elt->exp) == SUBREG
5349 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5350 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5352 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5353 new = copy_rtx (SUBREG_REG (elt->exp));
5364 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5365 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5366 new = lookup_as_function (XEXP (x, 0), code);
5368 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5372 /* If we are not actually processing an insn, don't try to find the
5373 best address. Not only don't we care, but we could modify the
5374 MEM in an invalid way since we have no insn to validate against. */
5376 find_best_addr (insn, &XEXP (x, 0));
5379 /* Even if we don't fold in the insn itself,
5380 we can safely do so here, in hopes of getting a constant. */
5381 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5383 HOST_WIDE_INT offset = 0;
5385 if (GET_CODE (addr) == REG
5386 && REGNO_QTY_VALID_P (REGNO (addr))
5387 && GET_MODE (addr) == qty_mode[REG_QTY (REGNO (addr))]
5388 && qty_const[REG_QTY (REGNO (addr))] != 0)
5389 addr = qty_const[REG_QTY (REGNO (addr))];
5391 /* If address is constant, split it into a base and integer offset. */
5392 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5394 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5395 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5397 base = XEXP (XEXP (addr, 0), 0);
5398 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5400 else if (GET_CODE (addr) == LO_SUM
5401 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5402 base = XEXP (addr, 1);
5403 else if (GET_CODE (addr) == ADDRESSOF)
5404 return change_address (x, VOIDmode, addr);
5406 /* If this is a constant pool reference, we can fold it into its
5407 constant to allow better value tracking. */
5408 if (base && GET_CODE (base) == SYMBOL_REF
5409 && CONSTANT_POOL_ADDRESS_P (base))
5411 rtx constant = get_pool_constant (base);
5412 enum machine_mode const_mode = get_pool_mode (base);
5415 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5416 constant_pool_entries_cost = COST (constant);
5418 /* If we are loading the full constant, we have an equivalence. */
5419 if (offset == 0 && mode == const_mode)
5422 /* If this actually isn't a constant (weird!), we can't do
5423 anything. Otherwise, handle the two most common cases:
5424 extracting a word from a multi-word constant, and extracting
5425 the low-order bits. Other cases don't seem common enough to
5427 if (! CONSTANT_P (constant))
5430 if (GET_MODE_CLASS (mode) == MODE_INT
5431 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5432 && offset % UNITS_PER_WORD == 0
5433 && (new = operand_subword (constant,
5434 offset / UNITS_PER_WORD,
5435 0, const_mode)) != 0)
5438 if (((BYTES_BIG_ENDIAN
5439 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5440 || (! BYTES_BIG_ENDIAN && offset == 0))
5441 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5445 /* If this is a reference to a label at a known position in a jump
5446 table, we also know its value. */
5447 if (base && GET_CODE (base) == LABEL_REF)
5449 rtx label = XEXP (base, 0);
5450 rtx table_insn = NEXT_INSN (label);
5452 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5453 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5455 rtx table = PATTERN (table_insn);
5458 && (offset / GET_MODE_SIZE (GET_MODE (table))
5459 < XVECLEN (table, 0)))
5460 return XVECEXP (table, 0,
5461 offset / GET_MODE_SIZE (GET_MODE (table)));
5463 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5464 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5466 rtx table = PATTERN (table_insn);
5469 && (offset / GET_MODE_SIZE (GET_MODE (table))
5470 < XVECLEN (table, 1)))
5472 offset /= GET_MODE_SIZE (GET_MODE (table));
5473 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5476 if (GET_MODE (table) != Pmode)
5477 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5479 /* Indicate this is a constant. This isn't a
5480 valid form of CONST, but it will only be used
5481 to fold the next insns and then discarded, so
5484 Note this expression must be explicitly discarded,
5485 by cse_insn, else it may end up in a REG_EQUAL note
5486 and "escape" to cause problems elsewhere. */
5487 return gen_rtx_CONST (GET_MODE (new), new);
5496 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5497 validate_change (insn, &XVECEXP (x, 3, i),
5498 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5508 mode_arg0 = VOIDmode;
5510 /* Try folding our operands.
5511 Then see which ones have constant values known. */
5513 fmt = GET_RTX_FORMAT (code);
5514 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5517 rtx arg = XEXP (x, i);
5518 rtx folded_arg = arg, const_arg = 0;
5519 enum machine_mode mode_arg = GET_MODE (arg);
5520 rtx cheap_arg, expensive_arg;
5521 rtx replacements[2];
5524 /* Most arguments are cheap, so handle them specially. */
5525 switch (GET_CODE (arg))
5528 /* This is the same as calling equiv_constant; it is duplicated
5530 if (REGNO_QTY_VALID_P (REGNO (arg))
5531 && qty_const[REG_QTY (REGNO (arg))] != 0
5532 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != REG
5533 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != PLUS)
5535 = gen_lowpart_if_possible (GET_MODE (arg),
5536 qty_const[REG_QTY (REGNO (arg))]);
5549 folded_arg = prev_insn_cc0;
5550 mode_arg = prev_insn_cc0_mode;
5551 const_arg = equiv_constant (folded_arg);
5556 folded_arg = fold_rtx (arg, insn);
5557 const_arg = equiv_constant (folded_arg);
5560 /* For the first three operands, see if the operand
5561 is constant or equivalent to a constant. */
5565 folded_arg0 = folded_arg;
5566 const_arg0 = const_arg;
5567 mode_arg0 = mode_arg;
5570 folded_arg1 = folded_arg;
5571 const_arg1 = const_arg;
5574 const_arg2 = const_arg;
5578 /* Pick the least expensive of the folded argument and an
5579 equivalent constant argument. */
5580 if (const_arg == 0 || const_arg == folded_arg
5581 || COST (const_arg) > COST (folded_arg))
5582 cheap_arg = folded_arg, expensive_arg = const_arg;
5584 cheap_arg = const_arg, expensive_arg = folded_arg;
5586 /* Try to replace the operand with the cheapest of the two
5587 possibilities. If it doesn't work and this is either of the first
5588 two operands of a commutative operation, try swapping them.
5589 If THAT fails, try the more expensive, provided it is cheaper
5590 than what is already there. */
5592 if (cheap_arg == XEXP (x, i))
5595 if (insn == 0 && ! copied)
5601 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5603 j < 2 && replacements[j]
5604 && COST (replacements[j]) < COST (XEXP (x, i));
5607 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5610 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5612 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5613 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5615 if (apply_change_group ())
5617 /* Swap them back to be invalid so that this loop can
5618 continue and flag them to be swapped back later. */
5621 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5633 /* Don't try to fold inside of a vector of expressions.
5634 Doing nothing is harmless. */
5638 /* If a commutative operation, place a constant integer as the second
5639 operand unless the first operand is also a constant integer. Otherwise,
5640 place any constant second unless the first operand is also a constant. */
5642 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5644 if (must_swap || (const_arg0
5646 || (GET_CODE (const_arg0) == CONST_INT
5647 && GET_CODE (const_arg1) != CONST_INT))))
5649 register rtx tem = XEXP (x, 0);
5651 if (insn == 0 && ! copied)
5657 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5658 validate_change (insn, &XEXP (x, 1), tem, 1);
5659 if (apply_change_group ())
5661 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5662 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5667 /* If X is an arithmetic operation, see if we can simplify it. */
5669 switch (GET_RTX_CLASS (code))
5675 /* We can't simplify extension ops unless we know the
5677 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5678 && mode_arg0 == VOIDmode)
5681 /* If we had a CONST, strip it off and put it back later if we
5683 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5684 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5686 new = simplify_unary_operation (code, mode,
5687 const_arg0 ? const_arg0 : folded_arg0,
5689 if (new != 0 && is_const)
5690 new = gen_rtx_CONST (mode, new);
5695 /* See what items are actually being compared and set FOLDED_ARG[01]
5696 to those values and CODE to the actual comparison code. If any are
5697 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5698 do anything if both operands are already known to be constant. */
5700 if (const_arg0 == 0 || const_arg1 == 0)
5702 struct table_elt *p0, *p1;
5703 rtx true = const_true_rtx, false = const0_rtx;
5704 enum machine_mode mode_arg1;
5706 #ifdef FLOAT_STORE_FLAG_VALUE
5707 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5709 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5711 false = CONST0_RTX (mode);
5715 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5716 &mode_arg0, &mode_arg1);
5717 const_arg0 = equiv_constant (folded_arg0);
5718 const_arg1 = equiv_constant (folded_arg1);
5720 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5721 what kinds of things are being compared, so we can't do
5722 anything with this comparison. */
5724 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5727 /* If we do not now have two constants being compared, see
5728 if we can nevertheless deduce some things about the
5730 if (const_arg0 == 0 || const_arg1 == 0)
5732 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5733 non-explicit constant? These aren't zero, but we
5734 don't know their sign. */
5735 if (const_arg1 == const0_rtx
5736 && (NONZERO_BASE_PLUS_P (folded_arg0)
5737 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5739 || GET_CODE (folded_arg0) == SYMBOL_REF
5741 || GET_CODE (folded_arg0) == LABEL_REF
5742 || GET_CODE (folded_arg0) == CONST))
5746 else if (code == NE)
5750 /* See if the two operands are the same. We don't do this
5751 for IEEE floating-point since we can't assume x == x
5752 since x might be a NaN. */
5754 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5755 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5756 && (folded_arg0 == folded_arg1
5757 || (GET_CODE (folded_arg0) == REG
5758 && GET_CODE (folded_arg1) == REG
5759 && (REG_QTY (REGNO (folded_arg0))
5760 == REG_QTY (REGNO (folded_arg1))))
5761 || ((p0 = lookup (folded_arg0,
5762 (safe_hash (folded_arg0, mode_arg0)
5763 % NBUCKETS), mode_arg0))
5764 && (p1 = lookup (folded_arg1,
5765 (safe_hash (folded_arg1, mode_arg0)
5766 % NBUCKETS), mode_arg0))
5767 && p0->first_same_value == p1->first_same_value)))
5768 return ((code == EQ || code == LE || code == GE
5769 || code == LEU || code == GEU)
5772 /* If FOLDED_ARG0 is a register, see if the comparison we are
5773 doing now is either the same as we did before or the reverse
5774 (we only check the reverse if not floating-point). */
5775 else if (GET_CODE (folded_arg0) == REG)
5777 int qty = REG_QTY (REGNO (folded_arg0));
5779 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5780 && (comparison_dominates_p (qty_comparison_code[qty], code)
5781 || (comparison_dominates_p (qty_comparison_code[qty],
5782 reverse_condition (code))
5783 && ! FLOAT_MODE_P (mode_arg0)))
5784 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5786 && rtx_equal_p (qty_comparison_const[qty],
5788 || (GET_CODE (folded_arg1) == REG
5789 && (REG_QTY (REGNO (folded_arg1))
5790 == qty_comparison_qty[qty]))))
5791 return (comparison_dominates_p (qty_comparison_code[qty],
5798 /* If we are comparing against zero, see if the first operand is
5799 equivalent to an IOR with a constant. If so, we may be able to
5800 determine the result of this comparison. */
5802 if (const_arg1 == const0_rtx)
5804 rtx y = lookup_as_function (folded_arg0, IOR);
5808 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5809 && GET_CODE (inner_const) == CONST_INT
5810 && INTVAL (inner_const) != 0)
5812 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5813 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5814 && (INTVAL (inner_const)
5815 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5816 rtx true = const_true_rtx, false = const0_rtx;
5818 #ifdef FLOAT_STORE_FLAG_VALUE
5819 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5821 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5823 false = CONST0_RTX (mode);
5847 new = simplify_relational_operation (code, mode_arg0,
5848 const_arg0 ? const_arg0 : folded_arg0,
5849 const_arg1 ? const_arg1 : folded_arg1);
5850 #ifdef FLOAT_STORE_FLAG_VALUE
5851 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5852 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5853 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5862 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5863 with that LABEL_REF as its second operand. If so, the result is
5864 the first operand of that MINUS. This handles switches with an
5865 ADDR_DIFF_VEC table. */
5866 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5869 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5870 : lookup_as_function (folded_arg0, MINUS);
5872 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5873 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5876 /* Now try for a CONST of a MINUS like the above. */
5877 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5878 : lookup_as_function (folded_arg0, CONST))) != 0
5879 && GET_CODE (XEXP (y, 0)) == MINUS
5880 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5881 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5882 return XEXP (XEXP (y, 0), 0);
5885 /* Likewise if the operands are in the other order. */
5886 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5889 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5890 : lookup_as_function (folded_arg1, MINUS);
5892 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5893 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5896 /* Now try for a CONST of a MINUS like the above. */
5897 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5898 : lookup_as_function (folded_arg1, CONST))) != 0
5899 && GET_CODE (XEXP (y, 0)) == MINUS
5900 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5901 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5902 return XEXP (XEXP (y, 0), 0);
5905 /* If second operand is a register equivalent to a negative
5906 CONST_INT, see if we can find a register equivalent to the
5907 positive constant. Make a MINUS if so. Don't do this for
5908 a non-negative constant since we might then alternate between
5909 chosing positive and negative constants. Having the positive
5910 constant previously-used is the more common case. Be sure
5911 the resulting constant is non-negative; if const_arg1 were
5912 the smallest negative number this would overflow: depending
5913 on the mode, this would either just be the same value (and
5914 hence not save anything) or be incorrect. */
5915 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5916 && INTVAL (const_arg1) < 0
5917 /* This used to test
5919 - INTVAL (const_arg1) >= 0
5921 But The Sun V5.0 compilers mis-compiled that test. So
5922 instead we test for the problematic value in a more direct
5923 manner and hope the Sun compilers get it correct. */
5924 && INTVAL (const_arg1) !=
5925 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
5926 && GET_CODE (folded_arg1) == REG)
5928 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5930 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5934 for (p = p->first_same_value; p; p = p->next_same_value)
5935 if (GET_CODE (p->exp) == REG)
5936 return cse_gen_binary (MINUS, mode, folded_arg0,
5937 canon_reg (p->exp, NULL_RTX));
5942 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5943 If so, produce (PLUS Z C2-C). */
5944 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5946 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5947 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5948 return fold_rtx (plus_constant (copy_rtx (y),
5949 -INTVAL (const_arg1)),
5953 /* ... fall through ... */
5956 case SMIN: case SMAX: case UMIN: case UMAX:
5957 case IOR: case AND: case XOR:
5958 case MULT: case DIV: case UDIV:
5959 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5960 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5961 is known to be of similar form, we may be able to replace the
5962 operation with a combined operation. This may eliminate the
5963 intermediate operation if every use is simplified in this way.
5964 Note that the similar optimization done by combine.c only works
5965 if the intermediate operation's result has only one reference. */
5967 if (GET_CODE (folded_arg0) == REG
5968 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5971 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5972 rtx y = lookup_as_function (folded_arg0, code);
5974 enum rtx_code associate_code;
5978 || 0 == (inner_const
5979 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5980 || GET_CODE (inner_const) != CONST_INT
5981 /* If we have compiled a statement like
5982 "if (x == (x & mask1))", and now are looking at
5983 "x & mask2", we will have a case where the first operand
5984 of Y is the same as our first operand. Unless we detect
5985 this case, an infinite loop will result. */
5986 || XEXP (y, 0) == folded_arg0)
5989 /* Don't associate these operations if they are a PLUS with the
5990 same constant and it is a power of two. These might be doable
5991 with a pre- or post-increment. Similarly for two subtracts of
5992 identical powers of two with post decrement. */
5994 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5995 && ((HAVE_PRE_INCREMENT
5996 && exact_log2 (INTVAL (const_arg1)) >= 0)
5997 || (HAVE_POST_INCREMENT
5998 && exact_log2 (INTVAL (const_arg1)) >= 0)
5999 || (HAVE_PRE_DECREMENT
6000 && exact_log2 (- INTVAL (const_arg1)) >= 0)
6001 || (HAVE_POST_DECREMENT
6002 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
6005 /* Compute the code used to compose the constants. For example,
6006 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
6009 = (code == MULT || code == DIV || code == UDIV ? MULT
6010 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
6012 new_const = simplify_binary_operation (associate_code, mode,
6013 const_arg1, inner_const);
6017 #ifndef FRAME_GROWS_DOWNWARD
6018 if (flag_propolice_protection
6019 && GET_CODE (y) == PLUS
6020 && XEXP (y, 0) == frame_pointer_rtx
6021 && INTVAL (inner_const) > 0
6022 && INTVAL (new_const) <= 0)
6025 /* If we are associating shift operations, don't let this
6026 produce a shift of the size of the object or larger.
6027 This could occur when we follow a sign-extend by a right
6028 shift on a machine that does a sign-extend as a pair
6031 if (is_shift && GET_CODE (new_const) == CONST_INT
6032 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
6034 /* As an exception, we can turn an ASHIFTRT of this
6035 form into a shift of the number of bits - 1. */
6036 if (code == ASHIFTRT)
6037 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
6042 y = copy_rtx (XEXP (y, 0));
6044 /* If Y contains our first operand (the most common way this
6045 can happen is if Y is a MEM), we would do into an infinite
6046 loop if we tried to fold it. So don't in that case. */
6048 if (! reg_mentioned_p (folded_arg0, y))
6049 y = fold_rtx (y, insn);
6051 return cse_gen_binary (code, mode, y, new_const);
6059 new = simplify_binary_operation (code, mode,
6060 const_arg0 ? const_arg0 : folded_arg0,
6061 const_arg1 ? const_arg1 : folded_arg1);
6065 /* (lo_sum (high X) X) is simply X. */
6066 if (code == LO_SUM && const_arg0 != 0
6067 && GET_CODE (const_arg0) == HIGH
6068 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
6074 new = simplify_ternary_operation (code, mode, mode_arg0,
6075 const_arg0 ? const_arg0 : folded_arg0,
6076 const_arg1 ? const_arg1 : folded_arg1,
6077 const_arg2 ? const_arg2 : XEXP (x, 2));
6081 /* Always eliminate CONSTANT_P_RTX at this stage. */
6082 if (code == CONSTANT_P_RTX)
6083 return (const_arg0 ? const1_rtx : const0_rtx);
6087 return new ? new : x;
6090 /* Return a constant value currently equivalent to X.
6091 Return 0 if we don't know one. */
6097 if (GET_CODE (x) == REG
6098 && REGNO_QTY_VALID_P (REGNO (x))
6099 && qty_const[REG_QTY (REGNO (x))])
6100 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[REG_QTY (REGNO (x))]);
6102 if (x == 0 || CONSTANT_P (x))
6105 /* If X is a MEM, try to fold it outside the context of any insn to see if
6106 it might be equivalent to a constant. That handles the case where it
6107 is a constant-pool reference. Then try to look it up in the hash table
6108 in case it is something whose value we have seen before. */
6110 if (GET_CODE (x) == MEM)
6112 struct table_elt *elt;
6114 x = fold_rtx (x, NULL_RTX);
6118 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
6122 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
6123 if (elt->is_const && CONSTANT_P (elt->exp))
6130 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
6131 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
6132 least-significant part of X.
6133 MODE specifies how big a part of X to return.
6135 If the requested operation cannot be done, 0 is returned.
6137 This is similar to gen_lowpart in emit-rtl.c. */
6140 gen_lowpart_if_possible (mode, x)
6141 enum machine_mode mode;
6144 rtx result = gen_lowpart_common (mode, x);
6148 else if (GET_CODE (x) == MEM)
6150 /* This is the only other case we handle. */
6151 register int offset = 0;
6154 if (WORDS_BIG_ENDIAN)
6155 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
6156 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
6157 if (BYTES_BIG_ENDIAN)
6158 /* Adjust the address so that the address-after-the-data is
6160 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
6161 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
6162 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
6163 if (! memory_address_p (mode, XEXP (new, 0)))
6165 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
6166 MEM_COPY_ATTRIBUTES (new, x);
6173 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
6174 branch. It will be zero if not.
6176 In certain cases, this can cause us to add an equivalence. For example,
6177 if we are following the taken case of
6179 we can add the fact that `i' and '2' are now equivalent.
6181 In any case, we can record that this comparison was passed. If the same
6182 comparison is seen later, we will know its value. */
6185 record_jump_equiv (insn, taken)
6189 int cond_known_true;
6191 enum machine_mode mode, mode0, mode1;
6192 int reversed_nonequality = 0;
6195 /* Ensure this is the right kind of insn. */
6196 if (! condjump_p (insn) || simplejump_p (insn))
6199 /* See if this jump condition is known true or false. */
6201 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
6203 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
6205 /* Get the type of comparison being done and the operands being compared.
6206 If we had to reverse a non-equality condition, record that fact so we
6207 know that it isn't valid for floating-point. */
6208 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
6209 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
6210 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
6212 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
6213 if (! cond_known_true)
6215 reversed_nonequality = (code != EQ && code != NE);
6216 code = reverse_condition (code);
6219 /* The mode is the mode of the non-constant. */
6221 if (mode1 != VOIDmode)
6224 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
6227 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
6228 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
6229 Make any useful entries we can with that information. Called from
6230 above function and called recursively. */
6233 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
6235 enum machine_mode mode;
6237 int reversed_nonequality;
6239 unsigned op0_hash, op1_hash;
6240 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
6241 struct table_elt *op0_elt, *op1_elt;
6243 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
6244 we know that they are also equal in the smaller mode (this is also
6245 true for all smaller modes whether or not there is a SUBREG, but
6246 is not worth testing for with no SUBREG). */
6248 /* Note that GET_MODE (op0) may not equal MODE. */
6249 if (code == EQ && GET_CODE (op0) == SUBREG
6250 && (GET_MODE_SIZE (GET_MODE (op0))
6251 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6253 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6254 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6256 record_jump_cond (code, mode, SUBREG_REG (op0),
6257 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6258 reversed_nonequality);
6261 if (code == EQ && GET_CODE (op1) == SUBREG
6262 && (GET_MODE_SIZE (GET_MODE (op1))
6263 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6265 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6266 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6268 record_jump_cond (code, mode, SUBREG_REG (op1),
6269 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6270 reversed_nonequality);
6273 /* Similarly, if this is an NE comparison, and either is a SUBREG
6274 making a smaller mode, we know the whole thing is also NE. */
6276 /* Note that GET_MODE (op0) may not equal MODE;
6277 if we test MODE instead, we can get an infinite recursion
6278 alternating between two modes each wider than MODE. */
6280 if (code == NE && GET_CODE (op0) == SUBREG
6281 && subreg_lowpart_p (op0)
6282 && (GET_MODE_SIZE (GET_MODE (op0))
6283 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6285 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6286 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6288 record_jump_cond (code, mode, SUBREG_REG (op0),
6289 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6290 reversed_nonequality);
6293 if (code == NE && GET_CODE (op1) == SUBREG
6294 && subreg_lowpart_p (op1)
6295 && (GET_MODE_SIZE (GET_MODE (op1))
6296 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6298 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6299 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6301 record_jump_cond (code, mode, SUBREG_REG (op1),
6302 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6303 reversed_nonequality);
6306 /* Hash both operands. */
6309 hash_arg_in_memory = 0;
6310 hash_arg_in_struct = 0;
6311 op0_hash = HASH (op0, mode);
6312 op0_in_memory = hash_arg_in_memory;
6313 op0_in_struct = hash_arg_in_struct;
6319 hash_arg_in_memory = 0;
6320 hash_arg_in_struct = 0;
6321 op1_hash = HASH (op1, mode);
6322 op1_in_memory = hash_arg_in_memory;
6323 op1_in_struct = hash_arg_in_struct;
6328 /* Look up both operands. */
6329 op0_elt = lookup (op0, op0_hash, mode);
6330 op1_elt = lookup (op1, op1_hash, mode);
6332 /* If both operands are already equivalent or if they are not in the
6333 table but are identical, do nothing. */
6334 if ((op0_elt != 0 && op1_elt != 0
6335 && op0_elt->first_same_value == op1_elt->first_same_value)
6336 || op0 == op1 || rtx_equal_p (op0, op1))
6339 /* If we aren't setting two things equal all we can do is save this
6340 comparison. Similarly if this is floating-point. In the latter
6341 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6342 If we record the equality, we might inadvertently delete code
6343 whose intent was to change -0 to +0. */
6345 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
6347 /* If we reversed a floating-point comparison, if OP0 is not a
6348 register, or if OP1 is neither a register or constant, we can't
6351 if (GET_CODE (op1) != REG)
6352 op1 = equiv_constant (op1);
6354 if ((reversed_nonequality && FLOAT_MODE_P (mode))
6355 || GET_CODE (op0) != REG || op1 == 0)
6358 /* Put OP0 in the hash table if it isn't already. This gives it a
6359 new quantity number. */
6362 if (insert_regs (op0, NULL_PTR, 0))
6364 rehash_using_reg (op0);
6365 op0_hash = HASH (op0, mode);
6367 /* If OP0 is contained in OP1, this changes its hash code
6368 as well. Faster to rehash than to check, except
6369 for the simple case of a constant. */
6370 if (! CONSTANT_P (op1))
6371 op1_hash = HASH (op1,mode);
6374 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6375 op0_elt->in_memory = op0_in_memory;
6376 op0_elt->in_struct = op0_in_struct;
6379 qty_comparison_code[REG_QTY (REGNO (op0))] = code;
6380 if (GET_CODE (op1) == REG)
6382 /* Look it up again--in case op0 and op1 are the same. */
6383 op1_elt = lookup (op1, op1_hash, mode);
6385 /* Put OP1 in the hash table so it gets a new quantity number. */
6388 if (insert_regs (op1, NULL_PTR, 0))
6390 rehash_using_reg (op1);
6391 op1_hash = HASH (op1, mode);
6394 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6395 op1_elt->in_memory = op1_in_memory;
6396 op1_elt->in_struct = op1_in_struct;
6399 qty_comparison_qty[REG_QTY (REGNO (op0))] = REG_QTY (REGNO (op1));
6400 qty_comparison_const[REG_QTY (REGNO (op0))] = 0;
6404 qty_comparison_qty[REG_QTY (REGNO (op0))] = -1;
6405 qty_comparison_const[REG_QTY (REGNO (op0))] = op1;
6411 /* If either side is still missing an equivalence, make it now,
6412 then merge the equivalences. */
6416 if (insert_regs (op0, NULL_PTR, 0))
6418 rehash_using_reg (op0);
6419 op0_hash = HASH (op0, mode);
6422 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6423 op0_elt->in_memory = op0_in_memory;
6424 op0_elt->in_struct = op0_in_struct;
6429 if (insert_regs (op1, NULL_PTR, 0))
6431 rehash_using_reg (op1);
6432 op1_hash = HASH (op1, mode);
6435 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6436 op1_elt->in_memory = op1_in_memory;
6437 op1_elt->in_struct = op1_in_struct;
6440 merge_equiv_classes (op0_elt, op1_elt);
6441 last_jump_equiv_class = op0_elt;
6444 /* CSE processing for one instruction.
6445 First simplify sources and addresses of all assignments
6446 in the instruction, using previously-computed equivalents values.
6447 Then install the new sources and destinations in the table
6448 of available values.
6450 If LIBCALL_INSN is nonzero, don't record any equivalence made in
6451 the insn. It means that INSN is inside libcall block. In this
6452 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
6454 /* Data on one SET contained in the instruction. */
6458 /* The SET rtx itself. */
6460 /* The SET_SRC of the rtx (the original value, if it is changing). */
6462 /* The hash-table element for the SET_SRC of the SET. */
6463 struct table_elt *src_elt;
6464 /* Hash value for the SET_SRC. */
6466 /* Hash value for the SET_DEST. */
6468 /* The SET_DEST, with SUBREG, etc., stripped. */
6470 /* Place where the pointer to the INNER_DEST was found. */
6471 rtx *inner_dest_loc;
6472 /* Nonzero if the SET_SRC is in memory. */
6474 /* Nonzero if the SET_SRC is in a structure. */
6476 /* Nonzero if the SET_SRC contains something
6477 whose value cannot be predicted and understood. */
6479 /* Original machine mode, in case it becomes a CONST_INT. */
6480 enum machine_mode mode;
6481 /* A constant equivalent for SET_SRC, if any. */
6483 /* Hash value of constant equivalent for SET_SRC. */
6484 unsigned src_const_hash;
6485 /* Table entry for constant equivalent for SET_SRC, if any. */
6486 struct table_elt *src_const_elt;
6490 cse_insn (insn, libcall_insn)
6494 register rtx x = PATTERN (insn);
6497 register int n_sets = 0;
6500 /* Records what this insn does to set CC0. */
6501 rtx this_insn_cc0 = 0;
6502 enum machine_mode this_insn_cc0_mode = VOIDmode;
6506 struct table_elt *src_eqv_elt = 0;
6507 int src_eqv_volatile;
6508 int src_eqv_in_memory;
6509 int src_eqv_in_struct;
6510 unsigned src_eqv_hash;
6516 /* Find all the SETs and CLOBBERs in this instruction.
6517 Record all the SETs in the array `set' and count them.
6518 Also determine whether there is a CLOBBER that invalidates
6519 all memory references, or all references at varying addresses. */
6521 if (GET_CODE (insn) == CALL_INSN)
6523 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6524 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6525 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6528 if (GET_CODE (x) == SET)
6530 sets = (struct set *) alloca (sizeof (struct set));
6533 /* Ignore SETs that are unconditional jumps.
6534 They never need cse processing, so this does not hurt.
6535 The reason is not efficiency but rather
6536 so that we can test at the end for instructions
6537 that have been simplified to unconditional jumps
6538 and not be misled by unchanged instructions
6539 that were unconditional jumps to begin with. */
6540 if (SET_DEST (x) == pc_rtx
6541 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6543 else if (x->volatil) {
6544 rtx x1 = SET_DEST (x);
6545 if (GET_CODE (x1) == SUBREG && GET_CODE (SUBREG_REG (x1)) == REG)
6546 x1 = SUBREG_REG (x1);
6547 make_new_qty (REGNO (x1));
6548 qty_mode[REG_QTY (REGNO (x1))] = GET_MODE (x1);
6551 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6552 The hard function value register is used only once, to copy to
6553 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6554 Ensure we invalidate the destination register. On the 80386 no
6555 other code would invalidate it since it is a fixed_reg.
6556 We need not check the return of apply_change_group; see canon_reg. */
6558 else if (GET_CODE (SET_SRC (x)) == CALL)
6560 canon_reg (SET_SRC (x), insn);
6561 apply_change_group ();
6562 fold_rtx (SET_SRC (x), insn);
6563 invalidate (SET_DEST (x), VOIDmode);
6568 else if (GET_CODE (x) == PARALLEL)
6570 register int lim = XVECLEN (x, 0);
6572 sets = (struct set *) alloca (lim * sizeof (struct set));
6574 /* Find all regs explicitly clobbered in this insn,
6575 and ensure they are not replaced with any other regs
6576 elsewhere in this insn.
6577 When a reg that is clobbered is also used for input,
6578 we should presume that that is for a reason,
6579 and we should not substitute some other register
6580 which is not supposed to be clobbered.
6581 Therefore, this loop cannot be merged into the one below
6582 because a CALL may precede a CLOBBER and refer to the
6583 value clobbered. We must not let a canonicalization do
6584 anything in that case. */
6585 for (i = 0; i < lim; i++)
6587 register rtx y = XVECEXP (x, 0, i);
6588 if (GET_CODE (y) == CLOBBER)
6590 rtx clobbered = XEXP (y, 0);
6592 if (GET_CODE (clobbered) == REG
6593 || GET_CODE (clobbered) == SUBREG)
6594 invalidate (clobbered, VOIDmode);
6595 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6596 || GET_CODE (clobbered) == ZERO_EXTRACT)
6597 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6601 for (i = 0; i < lim; i++)
6603 register rtx y = XVECEXP (x, 0, i);
6604 if (GET_CODE (y) == SET)
6606 /* As above, we ignore unconditional jumps and call-insns and
6607 ignore the result of apply_change_group. */
6608 if (GET_CODE (SET_SRC (y)) == CALL)
6610 canon_reg (SET_SRC (y), insn);
6611 apply_change_group ();
6612 fold_rtx (SET_SRC (y), insn);
6613 invalidate (SET_DEST (y), VOIDmode);
6615 else if (SET_DEST (y) == pc_rtx
6616 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6619 sets[n_sets++].rtl = y;
6621 else if (GET_CODE (y) == CLOBBER)
6623 /* If we clobber memory, canon the address.
6624 This does nothing when a register is clobbered
6625 because we have already invalidated the reg. */
6626 if (GET_CODE (XEXP (y, 0)) == MEM)
6627 canon_reg (XEXP (y, 0), NULL_RTX);
6629 else if (GET_CODE (y) == USE
6630 && ! (GET_CODE (XEXP (y, 0)) == REG
6631 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6632 canon_reg (y, NULL_RTX);
6633 else if (GET_CODE (y) == CALL)
6635 /* The result of apply_change_group can be ignored; see
6637 canon_reg (y, insn);
6638 apply_change_group ();
6643 else if (GET_CODE (x) == CLOBBER)
6645 if (GET_CODE (XEXP (x, 0)) == MEM)
6646 canon_reg (XEXP (x, 0), NULL_RTX);
6649 /* Canonicalize a USE of a pseudo register or memory location. */
6650 else if (GET_CODE (x) == USE
6651 && ! (GET_CODE (XEXP (x, 0)) == REG
6652 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6653 canon_reg (XEXP (x, 0), NULL_RTX);
6654 else if (GET_CODE (x) == CALL)
6656 /* The result of apply_change_group can be ignored; see canon_reg. */
6657 canon_reg (x, insn);
6658 apply_change_group ();
6662 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6663 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6664 is handled specially for this case, and if it isn't set, then there will
6665 be no equivalence for the destination. */
6666 if (n_sets == 1 && REG_NOTES (insn) != 0
6667 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6668 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6669 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6670 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6672 /* Canonicalize sources and addresses of destinations.
6673 We do this in a separate pass to avoid problems when a MATCH_DUP is
6674 present in the insn pattern. In that case, we want to ensure that
6675 we don't break the duplicate nature of the pattern. So we will replace
6676 both operands at the same time. Otherwise, we would fail to find an
6677 equivalent substitution in the loop calling validate_change below.
6679 We used to suppress canonicalization of DEST if it appears in SRC,
6680 but we don't do this any more. */
6682 for (i = 0; i < n_sets; i++)
6684 rtx dest = SET_DEST (sets[i].rtl);
6685 rtx src = SET_SRC (sets[i].rtl);
6686 rtx new = canon_reg (src, insn);
6689 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6690 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6691 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6692 || (insn_code = recog_memoized (insn)) < 0
6693 || insn_n_dups[insn_code] > 0)
6694 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6696 SET_SRC (sets[i].rtl) = new;
6698 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6700 validate_change (insn, &XEXP (dest, 1),
6701 canon_reg (XEXP (dest, 1), insn), 1);
6702 validate_change (insn, &XEXP (dest, 2),
6703 canon_reg (XEXP (dest, 2), insn), 1);
6706 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6707 || GET_CODE (dest) == ZERO_EXTRACT
6708 || GET_CODE (dest) == SIGN_EXTRACT)
6709 dest = XEXP (dest, 0);
6711 if (GET_CODE (dest) == MEM)
6712 canon_reg (dest, insn);
6715 /* Now that we have done all the replacements, we can apply the change
6716 group and see if they all work. Note that this will cause some
6717 canonicalizations that would have worked individually not to be applied
6718 because some other canonicalization didn't work, but this should not
6721 The result of apply_change_group can be ignored; see canon_reg. */
6723 apply_change_group ();
6725 /* Set sets[i].src_elt to the class each source belongs to.
6726 Detect assignments from or to volatile things
6727 and set set[i] to zero so they will be ignored
6728 in the rest of this function.
6730 Nothing in this loop changes the hash table or the register chains. */
6732 for (i = 0; i < n_sets; i++)
6734 register rtx src, dest;
6735 register rtx src_folded;
6736 register struct table_elt *elt = 0, *p;
6737 enum machine_mode mode;
6740 rtx src_related = 0;
6741 struct table_elt *src_const_elt = 0;
6742 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6743 int src_related_cost = 10000, src_elt_cost = 10000;
6744 /* Set non-zero if we need to call force_const_mem on with the
6745 contents of src_folded before using it. */
6746 int src_folded_force_flag = 0;
6748 dest = SET_DEST (sets[i].rtl);
6749 src = SET_SRC (sets[i].rtl);
6751 /* If SRC is a constant that has no machine mode,
6752 hash it with the destination's machine mode.
6753 This way we can keep different modes separate. */
6755 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6756 sets[i].mode = mode;
6760 enum machine_mode eqvmode = mode;
6761 if (GET_CODE (dest) == STRICT_LOW_PART)
6762 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6764 hash_arg_in_memory = 0;
6765 hash_arg_in_struct = 0;
6766 src_eqv = fold_rtx (src_eqv, insn);
6767 src_eqv_hash = HASH (src_eqv, eqvmode);
6769 /* Find the equivalence class for the equivalent expression. */
6772 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6774 src_eqv_volatile = do_not_record;
6775 src_eqv_in_memory = hash_arg_in_memory;
6776 src_eqv_in_struct = hash_arg_in_struct;
6779 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6780 value of the INNER register, not the destination. So it is not
6781 a valid substitution for the source. But save it for later. */
6782 if (GET_CODE (dest) == STRICT_LOW_PART)
6785 src_eqv_here = src_eqv;
6787 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6788 simplified result, which may not necessarily be valid. */
6789 src_folded = fold_rtx (src, insn);
6792 /* ??? This caused bad code to be generated for the m68k port with -O2.
6793 Suppose src is (CONST_INT -1), and that after truncation src_folded
6794 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6795 At the end we will add src and src_const to the same equivalence
6796 class. We now have 3 and -1 on the same equivalence class. This
6797 causes later instructions to be mis-optimized. */
6798 /* If storing a constant in a bitfield, pre-truncate the constant
6799 so we will be able to record it later. */
6800 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6801 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6803 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6805 if (GET_CODE (src) == CONST_INT
6806 && GET_CODE (width) == CONST_INT
6807 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6808 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6810 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6811 << INTVAL (width)) - 1));
6815 /* Compute SRC's hash code, and also notice if it
6816 should not be recorded at all. In that case,
6817 prevent any further processing of this assignment. */
6819 hash_arg_in_memory = 0;
6820 hash_arg_in_struct = 0;
6823 sets[i].src_hash = HASH (src, mode);
6824 sets[i].src_volatile = do_not_record;
6825 sets[i].src_in_memory = hash_arg_in_memory;
6826 sets[i].src_in_struct = hash_arg_in_struct;
6828 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6829 a pseudo that is set more than once, do not record SRC. Using
6830 SRC as a replacement for anything else will be incorrect in that
6831 situation. Note that this usually occurs only for stack slots,
6832 in which case all the RTL would be referring to SRC, so we don't
6833 lose any optimization opportunities by not having SRC in the
6836 if (GET_CODE (src) == MEM
6837 && find_reg_note (insn, REG_EQUIV, src) != 0
6838 && GET_CODE (dest) == REG
6839 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6840 && REG_N_SETS (REGNO (dest)) != 1)
6841 sets[i].src_volatile = 1;
6844 /* It is no longer clear why we used to do this, but it doesn't
6845 appear to still be needed. So let's try without it since this
6846 code hurts cse'ing widened ops. */
6847 /* If source is a perverse subreg (such as QI treated as an SI),
6848 treat it as volatile. It may do the work of an SI in one context
6849 where the extra bits are not being used, but cannot replace an SI
6851 if (GET_CODE (src) == SUBREG
6852 && (GET_MODE_SIZE (GET_MODE (src))
6853 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6854 sets[i].src_volatile = 1;
6857 /* Locate all possible equivalent forms for SRC. Try to replace
6858 SRC in the insn with each cheaper equivalent.
6860 We have the following types of equivalents: SRC itself, a folded
6861 version, a value given in a REG_EQUAL note, or a value related
6864 Each of these equivalents may be part of an additional class
6865 of equivalents (if more than one is in the table, they must be in
6866 the same class; we check for this).
6868 If the source is volatile, we don't do any table lookups.
6870 We note any constant equivalent for possible later use in a
6873 if (!sets[i].src_volatile)
6874 elt = lookup (src, sets[i].src_hash, mode);
6876 sets[i].src_elt = elt;
6878 if (elt && src_eqv_here && src_eqv_elt)
6880 if (elt->first_same_value != src_eqv_elt->first_same_value)
6882 /* The REG_EQUAL is indicating that two formerly distinct
6883 classes are now equivalent. So merge them. */
6884 merge_equiv_classes (elt, src_eqv_elt);
6885 src_eqv_hash = HASH (src_eqv, elt->mode);
6886 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6892 else if (src_eqv_elt)
6895 /* Try to find a constant somewhere and record it in `src_const'.
6896 Record its table element, if any, in `src_const_elt'. Look in
6897 any known equivalences first. (If the constant is not in the
6898 table, also set `sets[i].src_const_hash'). */
6900 for (p = elt->first_same_value; p; p = p->next_same_value)
6904 src_const_elt = elt;
6909 && (CONSTANT_P (src_folded)
6910 /* Consider (minus (label_ref L1) (label_ref L2)) as
6911 "constant" here so we will record it. This allows us
6912 to fold switch statements when an ADDR_DIFF_VEC is used. */
6913 || (GET_CODE (src_folded) == MINUS
6914 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6915 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6916 src_const = src_folded, src_const_elt = elt;
6917 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6918 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6920 /* If we don't know if the constant is in the table, get its
6921 hash code and look it up. */
6922 if (src_const && src_const_elt == 0)
6924 sets[i].src_const_hash = HASH (src_const, mode);
6925 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6928 sets[i].src_const = src_const;
6929 sets[i].src_const_elt = src_const_elt;
6931 /* If the constant and our source are both in the table, mark them as
6932 equivalent. Otherwise, if a constant is in the table but the source
6933 isn't, set ELT to it. */
6934 if (src_const_elt && elt
6935 && src_const_elt->first_same_value != elt->first_same_value)
6936 merge_equiv_classes (elt, src_const_elt);
6937 else if (src_const_elt && elt == 0)
6938 elt = src_const_elt;
6940 /* See if there is a register linearly related to a constant
6941 equivalent of SRC. */
6943 && (GET_CODE (src_const) == CONST
6944 || (src_const_elt && src_const_elt->related_value != 0)))
6946 src_related = use_related_value (src_const, src_const_elt);
6949 struct table_elt *src_related_elt
6950 = lookup (src_related, HASH (src_related, mode), mode);
6951 if (src_related_elt && elt)
6953 if (elt->first_same_value
6954 != src_related_elt->first_same_value)
6955 /* This can occur when we previously saw a CONST
6956 involving a SYMBOL_REF and then see the SYMBOL_REF
6957 twice. Merge the involved classes. */
6958 merge_equiv_classes (elt, src_related_elt);
6961 src_related_elt = 0;
6963 else if (src_related_elt && elt == 0)
6964 elt = src_related_elt;
6968 /* See if we have a CONST_INT that is already in a register in a
6971 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6972 && GET_MODE_CLASS (mode) == MODE_INT
6973 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6975 enum machine_mode wider_mode;
6977 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6978 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6979 && src_related == 0;
6980 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6982 struct table_elt *const_elt
6983 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6988 for (const_elt = const_elt->first_same_value;
6989 const_elt; const_elt = const_elt->next_same_value)
6990 if (GET_CODE (const_elt->exp) == REG)
6992 src_related = gen_lowpart_if_possible (mode,
6999 /* Another possibility is that we have an AND with a constant in
7000 a mode narrower than a word. If so, it might have been generated
7001 as part of an "if" which would narrow the AND. If we already
7002 have done the AND in a wider mode, we can use a SUBREG of that
7005 if (flag_expensive_optimizations && ! src_related
7006 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
7007 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
7009 enum machine_mode tmode;
7010 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
7012 for (tmode = GET_MODE_WIDER_MODE (mode);
7013 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
7014 tmode = GET_MODE_WIDER_MODE (tmode))
7016 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
7017 struct table_elt *larger_elt;
7021 PUT_MODE (new_and, tmode);
7022 XEXP (new_and, 0) = inner;
7023 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
7024 if (larger_elt == 0)
7027 for (larger_elt = larger_elt->first_same_value;
7028 larger_elt; larger_elt = larger_elt->next_same_value)
7029 if (GET_CODE (larger_elt->exp) == REG)
7032 = gen_lowpart_if_possible (mode, larger_elt->exp);
7042 #ifdef LOAD_EXTEND_OP
7043 /* See if a MEM has already been loaded with a widening operation;
7044 if it has, we can use a subreg of that. Many CISC machines
7045 also have such operations, but this is only likely to be
7046 beneficial these machines. */
7048 if (flag_expensive_optimizations && src_related == 0
7049 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
7050 && GET_MODE_CLASS (mode) == MODE_INT
7051 && GET_CODE (src) == MEM && ! do_not_record
7052 && LOAD_EXTEND_OP (mode) != NIL)
7054 enum machine_mode tmode;
7056 /* Set what we are trying to extend and the operation it might
7057 have been extended with. */
7058 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
7059 XEXP (memory_extend_rtx, 0) = src;
7061 for (tmode = GET_MODE_WIDER_MODE (mode);
7062 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
7063 tmode = GET_MODE_WIDER_MODE (tmode))
7065 struct table_elt *larger_elt;
7067 PUT_MODE (memory_extend_rtx, tmode);
7068 larger_elt = lookup (memory_extend_rtx,
7069 HASH (memory_extend_rtx, tmode), tmode);
7070 if (larger_elt == 0)
7073 for (larger_elt = larger_elt->first_same_value;
7074 larger_elt; larger_elt = larger_elt->next_same_value)
7075 if (GET_CODE (larger_elt->exp) == REG)
7077 src_related = gen_lowpart_if_possible (mode,
7086 #endif /* LOAD_EXTEND_OP */
7088 if (src == src_folded)
7091 /* At this point, ELT, if non-zero, points to a class of expressions
7092 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
7093 and SRC_RELATED, if non-zero, each contain additional equivalent
7094 expressions. Prune these latter expressions by deleting expressions
7095 already in the equivalence class.
7097 Check for an equivalent identical to the destination. If found,
7098 this is the preferred equivalent since it will likely lead to
7099 elimination of the insn. Indicate this by placing it in
7102 if (elt) elt = elt->first_same_value;
7103 for (p = elt; p; p = p->next_same_value)
7105 enum rtx_code code = GET_CODE (p->exp);
7107 /* If the expression is not valid, ignore it. Then we do not
7108 have to check for validity below. In most cases, we can use
7109 `rtx_equal_p', since canonicalization has already been done. */
7110 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
7113 /* Also skip paradoxical subregs, unless that's what we're
7116 && (GET_MODE_SIZE (GET_MODE (p->exp))
7117 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
7119 && GET_CODE (src) == SUBREG
7120 && GET_MODE (src) == GET_MODE (p->exp)
7121 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7122 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
7125 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
7127 else if (src_folded && GET_CODE (src_folded) == code
7128 && rtx_equal_p (src_folded, p->exp))
7130 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
7131 && rtx_equal_p (src_eqv_here, p->exp))
7133 else if (src_related && GET_CODE (src_related) == code
7134 && rtx_equal_p (src_related, p->exp))
7137 /* This is the same as the destination of the insns, we want
7138 to prefer it. Copy it to src_related. The code below will
7139 then give it a negative cost. */
7140 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
7145 /* Find the cheapest valid equivalent, trying all the available
7146 possibilities. Prefer items not in the hash table to ones
7147 that are when they are equal cost. Note that we can never
7148 worsen an insn as the current contents will also succeed.
7149 If we find an equivalent identical to the destination, use it as best,
7150 since this insn will probably be eliminated in that case. */
7153 if (rtx_equal_p (src, dest))
7156 src_cost = COST (src);
7161 if (rtx_equal_p (src_eqv_here, dest))
7164 src_eqv_cost = COST (src_eqv_here);
7169 if (rtx_equal_p (src_folded, dest))
7170 src_folded_cost = -1;
7172 src_folded_cost = COST (src_folded);
7177 if (rtx_equal_p (src_related, dest))
7178 src_related_cost = -1;
7180 src_related_cost = COST (src_related);
7183 /* If this was an indirect jump insn, a known label will really be
7184 cheaper even though it looks more expensive. */
7185 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
7186 src_folded = src_const, src_folded_cost = -1;
7188 /* Terminate loop when replacement made. This must terminate since
7189 the current contents will be tested and will always be valid. */
7194 /* Skip invalid entries. */
7195 while (elt && GET_CODE (elt->exp) != REG
7196 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7197 elt = elt->next_same_value;
7199 /* A paradoxical subreg would be bad here: it'll be the right
7200 size, but later may be adjusted so that the upper bits aren't
7201 what we want. So reject it. */
7203 && GET_CODE (elt->exp) == SUBREG
7204 && (GET_MODE_SIZE (GET_MODE (elt->exp))
7205 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
7206 /* It is okay, though, if the rtx we're trying to match
7207 will ignore any of the bits we can't predict. */
7209 && GET_CODE (src) == SUBREG
7210 && GET_MODE (src) == GET_MODE (elt->exp)
7211 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7212 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
7214 elt = elt->next_same_value;
7218 if (elt) src_elt_cost = elt->cost;
7220 /* Find cheapest and skip it for the next time. For items
7221 of equal cost, use this order:
7222 src_folded, src, src_eqv, src_related and hash table entry. */
7223 if (src_folded_cost <= src_cost
7224 && src_folded_cost <= src_eqv_cost
7225 && src_folded_cost <= src_related_cost
7226 && src_folded_cost <= src_elt_cost)
7228 trial = src_folded, src_folded_cost = 10000;
7229 if (src_folded_force_flag)
7230 trial = force_const_mem (mode, trial);
7232 else if (src_cost <= src_eqv_cost
7233 && src_cost <= src_related_cost
7234 && src_cost <= src_elt_cost)
7235 trial = src, src_cost = 10000;
7236 else if (src_eqv_cost <= src_related_cost
7237 && src_eqv_cost <= src_elt_cost)
7238 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
7239 else if (src_related_cost <= src_elt_cost)
7240 trial = copy_rtx (src_related), src_related_cost = 10000;
7243 trial = copy_rtx (elt->exp);
7244 elt = elt->next_same_value;
7245 src_elt_cost = 10000;
7248 /* We don't normally have an insn matching (set (pc) (pc)), so
7249 check for this separately here. We will delete such an
7252 Tablejump insns contain a USE of the table, so simply replacing
7253 the operand with the constant won't match. This is simply an
7254 unconditional branch, however, and is therefore valid. Just
7255 insert the substitution here and we will delete and re-emit
7258 /* Keep track of the original SET_SRC so that we can fix notes
7259 on libcall instructions. */
7260 old_src = SET_SRC (sets[i].rtl);
7262 if (n_sets == 1 && dest == pc_rtx
7264 || (GET_CODE (trial) == LABEL_REF
7265 && ! condjump_p (insn))))
7267 /* If TRIAL is a label in front of a jump table, we are
7268 really falling through the switch (this is how casesi
7269 insns work), so we must branch around the table. */
7270 if (GET_CODE (trial) == CODE_LABEL
7271 && NEXT_INSN (trial) != 0
7272 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
7273 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
7274 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
7276 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
7278 SET_SRC (sets[i].rtl) = trial;
7279 cse_jumps_altered = 1;
7283 /* Look for a substitution that makes a valid insn. */
7284 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
7286 /* If we just made a substitution inside a libcall, then we
7287 need to make the same substitution in any notes attached
7288 to the RETVAL insn. */
7290 && (GET_CODE (old_src) == REG
7291 || GET_CODE (old_src) == SUBREG
7292 || GET_CODE (old_src) == MEM))
7293 replace_rtx (REG_NOTES (libcall_insn), old_src,
7294 canon_reg (SET_SRC (sets[i].rtl), insn));
7296 /* The result of apply_change_group can be ignored; see
7299 validate_change (insn, &SET_SRC (sets[i].rtl),
7300 canon_reg (SET_SRC (sets[i].rtl), insn),
7302 apply_change_group ();
7306 /* If we previously found constant pool entries for
7307 constants and this is a constant, try making a
7308 pool entry. Put it in src_folded unless we already have done
7309 this since that is where it likely came from. */
7311 else if (constant_pool_entries_cost
7312 && CONSTANT_P (trial)
7313 && ! (GET_CODE (trial) == CONST
7314 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
7316 || (GET_CODE (src_folded) != MEM
7317 && ! src_folded_force_flag))
7318 && GET_MODE_CLASS (mode) != MODE_CC
7319 && mode != VOIDmode)
7321 src_folded_force_flag = 1;
7323 src_folded_cost = constant_pool_entries_cost;
7327 src = SET_SRC (sets[i].rtl);
7329 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
7330 However, there is an important exception: If both are registers
7331 that are not the head of their equivalence class, replace SET_SRC
7332 with the head of the class. If we do not do this, we will have
7333 both registers live over a portion of the basic block. This way,
7334 their lifetimes will likely abut instead of overlapping. */
7335 if (GET_CODE (dest) == REG
7336 && REGNO_QTY_VALID_P (REGNO (dest))
7337 && qty_mode[REG_QTY (REGNO (dest))] == GET_MODE (dest)
7338 && qty_first_reg[REG_QTY (REGNO (dest))] != REGNO (dest)
7339 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
7340 /* Don't do this if the original insn had a hard reg as
7342 && (GET_CODE (sets[i].src) != REG
7343 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
7344 /* We can't call canon_reg here because it won't do anything if
7345 SRC is a hard register. */
7347 int first = qty_first_reg[REG_QTY (REGNO (src))];
7349 = (first >= FIRST_PSEUDO_REGISTER
7350 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
7352 /* We must use validate-change even for this, because this
7353 might be a special no-op instruction, suitable only to
7355 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
7358 /* If we had a constant that is cheaper than what we are now
7359 setting SRC to, use that constant. We ignored it when we
7360 thought we could make this into a no-op. */
7361 if (src_const && COST (src_const) < COST (src)
7362 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
7368 /* If we made a change, recompute SRC values. */
7369 if (src != sets[i].src)
7372 hash_arg_in_memory = 0;
7373 hash_arg_in_struct = 0;
7375 sets[i].src_hash = HASH (src, mode);
7376 sets[i].src_volatile = do_not_record;
7377 sets[i].src_in_memory = hash_arg_in_memory;
7378 sets[i].src_in_struct = hash_arg_in_struct;
7379 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
7382 /* If this is a single SET, we are setting a register, and we have an
7383 equivalent constant, we want to add a REG_NOTE. We don't want
7384 to write a REG_EQUAL note for a constant pseudo since verifying that
7385 that pseudo hasn't been eliminated is a pain. Such a note also
7386 won't help anything.
7388 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
7389 which can be created for a reference to a compile time computable
7390 entry in a jump table. */
7392 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
7393 && GET_CODE (src_const) != REG
7394 && ! (GET_CODE (src_const) == CONST
7395 && GET_CODE (XEXP (src_const, 0)) == MINUS
7396 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
7397 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
7399 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7401 /* Make sure that the rtx is not shared with any other insn. */
7402 src_const = copy_rtx (src_const);
7404 /* Record the actual constant value in a REG_EQUAL note, making
7405 a new one if one does not already exist. */
7407 XEXP (tem, 0) = src_const;
7409 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
7410 src_const, REG_NOTES (insn));
7412 /* If storing a constant value in a register that
7413 previously held the constant value 0,
7414 record this fact with a REG_WAS_0 note on this insn.
7416 Note that the *register* is required to have previously held 0,
7417 not just any register in the quantity and we must point to the
7418 insn that set that register to zero.
7420 Rather than track each register individually, we just see if
7421 the last set for this quantity was for this register. */
7423 if (REGNO_QTY_VALID_P (REGNO (dest))
7424 && qty_const[REG_QTY (REGNO (dest))] == const0_rtx)
7426 /* See if we previously had a REG_WAS_0 note. */
7427 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7428 rtx const_insn = qty_const_insn[REG_QTY (REGNO (dest))];
7430 if ((tem = single_set (const_insn)) != 0
7431 && rtx_equal_p (SET_DEST (tem), dest))
7434 XEXP (note, 0) = const_insn;
7436 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_WAS_0,
7443 /* Now deal with the destination. */
7445 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7447 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7448 to the MEM or REG within it. */
7449 while (GET_CODE (dest) == SIGN_EXTRACT
7450 || GET_CODE (dest) == ZERO_EXTRACT
7451 || GET_CODE (dest) == SUBREG
7452 || GET_CODE (dest) == STRICT_LOW_PART)
7454 sets[i].inner_dest_loc = &XEXP (dest, 0);
7455 dest = XEXP (dest, 0);
7458 sets[i].inner_dest = dest;
7460 if (GET_CODE (dest) == MEM)
7462 #ifdef PUSH_ROUNDING
7463 /* Stack pushes invalidate the stack pointer. */
7464 rtx addr = XEXP (dest, 0);
7465 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7466 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7467 && XEXP (addr, 0) == stack_pointer_rtx)
7468 invalidate (stack_pointer_rtx, Pmode);
7470 dest = fold_rtx (dest, insn);
7473 /* Compute the hash code of the destination now,
7474 before the effects of this instruction are recorded,
7475 since the register values used in the address computation
7476 are those before this instruction. */
7477 sets[i].dest_hash = HASH (dest, mode);
7479 /* Don't enter a bit-field in the hash table
7480 because the value in it after the store
7481 may not equal what was stored, due to truncation. */
7483 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7484 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7486 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7488 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7489 && GET_CODE (width) == CONST_INT
7490 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7491 && ! (INTVAL (src_const)
7492 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7493 /* Exception: if the value is constant,
7494 and it won't be truncated, record it. */
7498 /* This is chosen so that the destination will be invalidated
7499 but no new value will be recorded.
7500 We must invalidate because sometimes constant
7501 values can be recorded for bitfields. */
7502 sets[i].src_elt = 0;
7503 sets[i].src_volatile = 1;
7509 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7511 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7513 PUT_CODE (insn, NOTE);
7514 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7515 NOTE_SOURCE_FILE (insn) = 0;
7516 cse_jumps_altered = 1;
7517 /* One less use of the label this insn used to jump to. */
7518 if (JUMP_LABEL (insn) != 0)
7519 --LABEL_NUSES (JUMP_LABEL (insn));
7520 /* No more processing for this set. */
7524 /* If this SET is now setting PC to a label, we know it used to
7525 be a conditional or computed branch. So we see if we can follow
7526 it. If it was a computed branch, delete it and re-emit. */
7527 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7531 /* If this is not in the format for a simple branch and
7532 we are the only SET in it, re-emit it. */
7533 if (! simplejump_p (insn) && n_sets == 1)
7535 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7536 JUMP_LABEL (new) = XEXP (src, 0);
7537 LABEL_NUSES (XEXP (src, 0))++;
7541 /* Otherwise, force rerecognition, since it probably had
7542 a different pattern before.
7543 This shouldn't really be necessary, since whatever
7544 changed the source value above should have done this.
7545 Until the right place is found, might as well do this here. */
7546 INSN_CODE (insn) = -1;
7548 /* Now emit a BARRIER after the unconditional jump. Do not bother
7549 deleting any unreachable code, let jump/flow do that. */
7550 if (NEXT_INSN (insn) != 0
7551 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
7552 emit_barrier_after (insn);
7554 cse_jumps_altered = 1;
7558 /* If destination is volatile, invalidate it and then do no further
7559 processing for this assignment. */
7561 else if (do_not_record)
7563 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7564 || GET_CODE (dest) == MEM)
7565 invalidate (dest, VOIDmode);
7566 else if (GET_CODE (dest) == STRICT_LOW_PART
7567 || GET_CODE (dest) == ZERO_EXTRACT)
7568 invalidate (XEXP (dest, 0), GET_MODE (dest));
7572 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7573 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7576 /* If setting CC0, record what it was set to, or a constant, if it
7577 is equivalent to a constant. If it is being set to a floating-point
7578 value, make a COMPARE with the appropriate constant of 0. If we
7579 don't do this, later code can interpret this as a test against
7580 const0_rtx, which can cause problems if we try to put it into an
7581 insn as a floating-point operand. */
7582 if (dest == cc0_rtx)
7584 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7585 this_insn_cc0_mode = mode;
7586 if (FLOAT_MODE_P (mode))
7587 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7593 /* Now enter all non-volatile source expressions in the hash table
7594 if they are not already present.
7595 Record their equivalence classes in src_elt.
7596 This way we can insert the corresponding destinations into
7597 the same classes even if the actual sources are no longer in them
7598 (having been invalidated). */
7600 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7601 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7603 register struct table_elt *elt;
7604 register struct table_elt *classp = sets[0].src_elt;
7605 rtx dest = SET_DEST (sets[0].rtl);
7606 enum machine_mode eqvmode = GET_MODE (dest);
7608 if (GET_CODE (dest) == STRICT_LOW_PART)
7610 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7613 if (insert_regs (src_eqv, classp, 0))
7615 rehash_using_reg (src_eqv);
7616 src_eqv_hash = HASH (src_eqv, eqvmode);
7618 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7619 elt->in_memory = src_eqv_in_memory;
7620 elt->in_struct = src_eqv_in_struct;
7623 /* Check to see if src_eqv_elt is the same as a set source which
7624 does not yet have an elt, and if so set the elt of the set source
7626 for (i = 0; i < n_sets; i++)
7627 if (sets[i].rtl && sets[i].src_elt == 0
7628 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7629 sets[i].src_elt = src_eqv_elt;
7632 for (i = 0; i < n_sets; i++)
7633 if (sets[i].rtl && ! sets[i].src_volatile
7634 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7636 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7638 /* REG_EQUAL in setting a STRICT_LOW_PART
7639 gives an equivalent for the entire destination register,
7640 not just for the subreg being stored in now.
7641 This is a more interesting equivalence, so we arrange later
7642 to treat the entire reg as the destination. */
7643 sets[i].src_elt = src_eqv_elt;
7644 sets[i].src_hash = src_eqv_hash;
7648 /* Insert source and constant equivalent into hash table, if not
7650 register struct table_elt *classp = src_eqv_elt;
7651 register rtx src = sets[i].src;
7652 register rtx dest = SET_DEST (sets[i].rtl);
7653 enum machine_mode mode
7654 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7656 /* Don't put a hard register source into the table if this is
7657 the last insn of a libcall. */
7658 if (sets[i].src_elt == 0
7659 && (GET_CODE (src) != REG
7660 || REGNO (src) >= FIRST_PSEUDO_REGISTER
7661 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX)))
7663 register struct table_elt *elt;
7665 /* Note that these insert_regs calls cannot remove
7666 any of the src_elt's, because they would have failed to
7667 match if not still valid. */
7668 if (insert_regs (src, classp, 0))
7670 rehash_using_reg (src);
7671 sets[i].src_hash = HASH (src, mode);
7673 elt = insert (src, classp, sets[i].src_hash, mode);
7674 elt->in_memory = sets[i].src_in_memory;
7675 elt->in_struct = sets[i].src_in_struct;
7676 sets[i].src_elt = classp = elt;
7679 if (sets[i].src_const && sets[i].src_const_elt == 0
7680 && src != sets[i].src_const
7681 && ! rtx_equal_p (sets[i].src_const, src))
7682 sets[i].src_elt = insert (sets[i].src_const, classp,
7683 sets[i].src_const_hash, mode);
7686 else if (sets[i].src_elt == 0)
7687 /* If we did not insert the source into the hash table (e.g., it was
7688 volatile), note the equivalence class for the REG_EQUAL value, if any,
7689 so that the destination goes into that class. */
7690 sets[i].src_elt = src_eqv_elt;
7692 invalidate_from_clobbers (x);
7694 /* Some registers are invalidated by subroutine calls. Memory is
7695 invalidated by non-constant calls. */
7697 if (GET_CODE (insn) == CALL_INSN)
7699 if (! CONST_CALL_P (insn))
7700 invalidate_memory ();
7701 invalidate_for_call ();
7704 /* Now invalidate everything set by this instruction.
7705 If a SUBREG or other funny destination is being set,
7706 sets[i].rtl is still nonzero, so here we invalidate the reg
7707 a part of which is being set. */
7709 for (i = 0; i < n_sets; i++)
7712 /* We can't use the inner dest, because the mode associated with
7713 a ZERO_EXTRACT is significant. */
7714 register rtx dest = SET_DEST (sets[i].rtl);
7716 /* Needed for registers to remove the register from its
7717 previous quantity's chain.
7718 Needed for memory if this is a nonvarying address, unless
7719 we have just done an invalidate_memory that covers even those. */
7720 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7721 || GET_CODE (dest) == MEM)
7722 invalidate (dest, VOIDmode);
7723 else if (GET_CODE (dest) == STRICT_LOW_PART
7724 || GET_CODE (dest) == ZERO_EXTRACT)
7725 invalidate (XEXP (dest, 0), GET_MODE (dest));
7728 /* A volatile ASM invalidates everything. */
7729 if (GET_CODE (insn) == INSN
7730 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
7731 && MEM_VOLATILE_P (PATTERN (insn)))
7732 flush_hash_table ();
7734 /* Make sure registers mentioned in destinations
7735 are safe for use in an expression to be inserted.
7736 This removes from the hash table
7737 any invalid entry that refers to one of these registers.
7739 We don't care about the return value from mention_regs because
7740 we are going to hash the SET_DEST values unconditionally. */
7742 for (i = 0; i < n_sets; i++)
7746 rtx x = SET_DEST (sets[i].rtl);
7748 if (GET_CODE (x) != REG)
7752 /* We used to rely on all references to a register becoming
7753 inaccessible when a register changes to a new quantity,
7754 since that changes the hash code. However, that is not
7755 safe, since after NBUCKETS new quantities we get a
7756 hash 'collision' of a register with its own invalid
7757 entries. And since SUBREGs have been changed not to
7758 change their hash code with the hash code of the register,
7759 it wouldn't work any longer at all. So we have to check
7760 for any invalid references lying around now.
7761 This code is similar to the REG case in mention_regs,
7762 but it knows that reg_tick has been incremented, and
7763 it leaves reg_in_table as -1 . */
7764 register int regno = REGNO (x);
7765 register int endregno
7766 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
7767 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
7770 for (i = regno; i < endregno; i++)
7772 if (REG_IN_TABLE (i) >= 0)
7774 remove_invalid_refs (i);
7775 REG_IN_TABLE (i) = -1;
7782 /* We may have just removed some of the src_elt's from the hash table.
7783 So replace each one with the current head of the same class. */
7785 for (i = 0; i < n_sets; i++)
7788 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7789 /* If elt was removed, find current head of same class,
7790 or 0 if nothing remains of that class. */
7792 register struct table_elt *elt = sets[i].src_elt;
7794 while (elt && elt->prev_same_value)
7795 elt = elt->prev_same_value;
7797 while (elt && elt->first_same_value == 0)
7798 elt = elt->next_same_value;
7799 sets[i].src_elt = elt ? elt->first_same_value : 0;
7803 /* Now insert the destinations into their equivalence classes. */
7805 for (i = 0; i < n_sets; i++)
7808 register rtx dest = SET_DEST (sets[i].rtl);
7809 rtx inner_dest = sets[i].inner_dest;
7810 register struct table_elt *elt;
7812 /* Don't record value if we are not supposed to risk allocating
7813 floating-point values in registers that might be wider than
7815 if ((flag_float_store
7816 && GET_CODE (dest) == MEM
7817 && FLOAT_MODE_P (GET_MODE (dest)))
7818 /* Don't record BLKmode values, because we don't know the
7819 size of it, and can't be sure that other BLKmode values
7820 have the same or smaller size. */
7821 || GET_MODE (dest) == BLKmode
7822 /* Don't record values of destinations set inside a libcall block
7823 since we might delete the libcall. Things should have been set
7824 up so we won't want to reuse such a value, but we play it safe
7827 /* If we didn't put a REG_EQUAL value or a source into the hash
7828 table, there is no point is recording DEST. */
7829 || sets[i].src_elt == 0
7830 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7831 or SIGN_EXTEND, don't record DEST since it can cause
7832 some tracking to be wrong.
7834 ??? Think about this more later. */
7835 || (GET_CODE (dest) == SUBREG
7836 && (GET_MODE_SIZE (GET_MODE (dest))
7837 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7838 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7839 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7842 /* STRICT_LOW_PART isn't part of the value BEING set,
7843 and neither is the SUBREG inside it.
7844 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7845 if (GET_CODE (dest) == STRICT_LOW_PART)
7846 dest = SUBREG_REG (XEXP (dest, 0));
7848 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7849 /* Registers must also be inserted into chains for quantities. */
7850 if (insert_regs (dest, sets[i].src_elt, 1))
7852 /* If `insert_regs' changes something, the hash code must be
7854 rehash_using_reg (dest);
7855 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7858 if (GET_CODE (inner_dest) == MEM
7859 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
7860 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
7861 that (MEM (ADDRESSOF (X))) is equivalent to Y.
7862 Consider the case in which the address of the MEM is
7863 passed to a function, which alters the MEM. Then, if we
7864 later use Y instead of the MEM we'll miss the update. */
7865 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
7867 elt = insert (dest, sets[i].src_elt,
7868 sets[i].dest_hash, GET_MODE (dest));
7870 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7871 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7872 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7877 /* This implicitly assumes a whole struct
7878 need not have MEM_IN_STRUCT_P.
7879 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7880 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7881 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7884 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7885 narrower than M2, and both M1 and M2 are the same number of words,
7886 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7887 make that equivalence as well.
7889 However, BAR may have equivalences for which gen_lowpart_if_possible
7890 will produce a simpler value than gen_lowpart_if_possible applied to
7891 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7892 BAR's equivalences. If we don't get a simplified form, make
7893 the SUBREG. It will not be used in an equivalence, but will
7894 cause two similar assignments to be detected.
7896 Note the loop below will find SUBREG_REG (DEST) since we have
7897 already entered SRC and DEST of the SET in the table. */
7899 if (GET_CODE (dest) == SUBREG
7900 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7902 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7903 && (GET_MODE_SIZE (GET_MODE (dest))
7904 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7905 && sets[i].src_elt != 0)
7907 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7908 struct table_elt *elt, *classp = 0;
7910 for (elt = sets[i].src_elt->first_same_value; elt;
7911 elt = elt->next_same_value)
7915 struct table_elt *src_elt;
7917 /* Ignore invalid entries. */
7918 if (GET_CODE (elt->exp) != REG
7919 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7922 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7924 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7926 src_hash = HASH (new_src, new_mode);
7927 src_elt = lookup (new_src, src_hash, new_mode);
7929 /* Put the new source in the hash table is if isn't
7933 if (insert_regs (new_src, classp, 0))
7935 rehash_using_reg (new_src);
7936 src_hash = HASH (new_src, new_mode);
7938 src_elt = insert (new_src, classp, src_hash, new_mode);
7939 src_elt->in_memory = elt->in_memory;
7940 src_elt->in_struct = elt->in_struct;
7942 else if (classp && classp != src_elt->first_same_value)
7943 /* Show that two things that we've seen before are
7944 actually the same. */
7945 merge_equiv_classes (src_elt, classp);
7947 classp = src_elt->first_same_value;
7948 /* Ignore invalid entries. */
7950 && GET_CODE (classp->exp) != REG
7951 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7952 classp = classp->next_same_value;
7957 /* Special handling for (set REG0 REG1)
7958 where REG0 is the "cheapest", cheaper than REG1.
7959 After cse, REG1 will probably not be used in the sequel,
7960 so (if easily done) change this insn to (set REG1 REG0) and
7961 replace REG1 with REG0 in the previous insn that computed their value.
7962 Then REG1 will become a dead store and won't cloud the situation
7963 for later optimizations.
7965 Do not make this change if REG1 is a hard register, because it will
7966 then be used in the sequel and we may be changing a two-operand insn
7967 into a three-operand insn.
7969 Also do not do this if we are operating on a copy of INSN.
7971 Also don't do this if INSN ends a libcall; this would cause an unrelated
7972 register to be set in the middle of a libcall, and we then get bad code
7973 if the libcall is deleted. */
7975 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7976 && NEXT_INSN (PREV_INSN (insn)) == insn
7977 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7978 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7979 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7980 && (qty_first_reg[REG_QTY (REGNO (SET_SRC (sets[0].rtl)))]
7981 == REGNO (SET_DEST (sets[0].rtl)))
7982 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
7984 rtx prev = PREV_INSN (insn);
7985 while (prev && GET_CODE (prev) == NOTE)
7986 prev = PREV_INSN (prev);
7988 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7989 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7991 rtx dest = SET_DEST (sets[0].rtl);
7992 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7994 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7995 validate_change (insn, & SET_DEST (sets[0].rtl),
7996 SET_SRC (sets[0].rtl), 1);
7997 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7998 apply_change_group ();
8000 /* If REG1 was equivalent to a constant, REG0 is not. */
8002 PUT_REG_NOTE_KIND (note, REG_EQUAL);
8004 /* If there was a REG_WAS_0 note on PREV, remove it. Move
8005 any REG_WAS_0 note on INSN to PREV. */
8006 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
8008 remove_note (prev, note);
8010 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
8013 remove_note (insn, note);
8014 XEXP (note, 1) = REG_NOTES (prev);
8015 REG_NOTES (prev) = note;
8018 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
8019 then we must delete it, because the value in REG0 has changed. */
8020 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
8021 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
8022 remove_note (insn, note);
8026 /* If this is a conditional jump insn, record any known equivalences due to
8027 the condition being tested. */
8029 last_jump_equiv_class = 0;
8030 if (GET_CODE (insn) == JUMP_INSN
8031 && n_sets == 1 && GET_CODE (x) == SET
8032 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
8033 record_jump_equiv (insn, 0);
8036 /* If the previous insn set CC0 and this insn no longer references CC0,
8037 delete the previous insn. Here we use the fact that nothing expects CC0
8038 to be valid over an insn, which is true until the final pass. */
8039 if (prev_insn && GET_CODE (prev_insn) == INSN
8040 && (tem = single_set (prev_insn)) != 0
8041 && SET_DEST (tem) == cc0_rtx
8042 && ! reg_mentioned_p (cc0_rtx, x))
8044 PUT_CODE (prev_insn, NOTE);
8045 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
8046 NOTE_SOURCE_FILE (prev_insn) = 0;
8049 prev_insn_cc0 = this_insn_cc0;
8050 prev_insn_cc0_mode = this_insn_cc0_mode;
8056 /* Remove from the hash table all expressions that reference memory. */
8058 invalidate_memory ()
8061 register struct table_elt *p, *next;
8063 for (i = 0; i < NBUCKETS; i++)
8064 for (p = table[i]; p; p = next)
8066 next = p->next_same_hash;
8068 remove_from_table (p, i);
8072 /* XXX ??? The name of this function bears little resemblance to
8073 what this function actually does. FIXME. */
8075 note_mem_written (addr)
8078 /* Pushing or popping the stack invalidates just the stack pointer. */
8079 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
8080 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
8081 && GET_CODE (XEXP (addr, 0)) == REG
8082 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
8084 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
8085 REG_TICK (STACK_POINTER_REGNUM)++;
8087 /* This should be *very* rare. */
8088 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
8089 invalidate (stack_pointer_rtx, VOIDmode);
8095 /* Perform invalidation on the basis of everything about an insn
8096 except for invalidating the actual places that are SET in it.
8097 This includes the places CLOBBERed, and anything that might
8098 alias with something that is SET or CLOBBERed.
8100 X is the pattern of the insn. */
8103 invalidate_from_clobbers (x)
8106 if (GET_CODE (x) == CLOBBER)
8108 rtx ref = XEXP (x, 0);
8111 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
8112 || GET_CODE (ref) == MEM)
8113 invalidate (ref, VOIDmode);
8114 else if (GET_CODE (ref) == STRICT_LOW_PART
8115 || GET_CODE (ref) == ZERO_EXTRACT)
8116 invalidate (XEXP (ref, 0), GET_MODE (ref));
8119 else if (GET_CODE (x) == PARALLEL)
8122 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
8124 register rtx y = XVECEXP (x, 0, i);
8125 if (GET_CODE (y) == CLOBBER)
8127 rtx ref = XEXP (y, 0);
8128 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
8129 || GET_CODE (ref) == MEM)
8130 invalidate (ref, VOIDmode);
8131 else if (GET_CODE (ref) == STRICT_LOW_PART
8132 || GET_CODE (ref) == ZERO_EXTRACT)
8133 invalidate (XEXP (ref, 0), GET_MODE (ref));
8139 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
8140 and replace any registers in them with either an equivalent constant
8141 or the canonical form of the register. If we are inside an address,
8142 only do this if the address remains valid.
8144 OBJECT is 0 except when within a MEM in which case it is the MEM.
8146 Return the replacement for X. */
8149 cse_process_notes (x, object)
8153 enum rtx_code code = GET_CODE (x);
8154 char *fmt = GET_RTX_FORMAT (code);
8170 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
8175 if (REG_NOTE_KIND (x) == REG_EQUAL)
8176 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
8178 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
8185 rtx new = cse_process_notes (XEXP (x, 0), object);
8186 /* We don't substitute VOIDmode constants into these rtx,
8187 since they would impede folding. */
8188 if (GET_MODE (new) != VOIDmode)
8189 validate_change (object, &XEXP (x, 0), new, 0);
8194 i = REG_QTY (REGNO (x));
8196 /* Return a constant or a constant register. */
8197 if (REGNO_QTY_VALID_P (REGNO (x))
8198 && qty_const[i] != 0
8199 && (CONSTANT_P (qty_const[i])
8200 || GET_CODE (qty_const[i]) == REG))
8202 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
8207 /* Otherwise, canonicalize this register. */
8208 return canon_reg (x, NULL_RTX);
8214 for (i = 0; i < GET_RTX_LENGTH (code); i++)
8216 validate_change (object, &XEXP (x, i),
8217 cse_process_notes (XEXP (x, i), object), 0);
8222 /* Find common subexpressions between the end test of a loop and the beginning
8223 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
8225 Often we have a loop where an expression in the exit test is used
8226 in the body of the loop. For example "while (*p) *q++ = *p++;".
8227 Because of the way we duplicate the loop exit test in front of the loop,
8228 however, we don't detect that common subexpression. This will be caught
8229 when global cse is implemented, but this is a quite common case.
8231 This function handles the most common cases of these common expressions.
8232 It is called after we have processed the basic block ending with the
8233 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
8234 jumps to a label used only once. */
8237 cse_around_loop (loop_start)
8242 struct table_elt *p;
8244 /* If the jump at the end of the loop doesn't go to the start, we don't
8246 for (insn = PREV_INSN (loop_start);
8247 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
8248 insn = PREV_INSN (insn))
8252 || GET_CODE (insn) != NOTE
8253 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
8256 /* If the last insn of the loop (the end test) was an NE comparison,
8257 we will interpret it as an EQ comparison, since we fell through
8258 the loop. Any equivalences resulting from that comparison are
8259 therefore not valid and must be invalidated. */
8260 if (last_jump_equiv_class)
8261 for (p = last_jump_equiv_class->first_same_value; p;
8262 p = p->next_same_value)
8264 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
8265 || (GET_CODE (p->exp) == SUBREG
8266 && GET_CODE (SUBREG_REG (p->exp)) == REG))
8267 invalidate (p->exp, VOIDmode);
8268 else if (GET_CODE (p->exp) == STRICT_LOW_PART
8269 || GET_CODE (p->exp) == ZERO_EXTRACT)
8270 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
8273 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
8274 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
8276 The only thing we do with SET_DEST is invalidate entries, so we
8277 can safely process each SET in order. It is slightly less efficient
8278 to do so, but we only want to handle the most common cases.
8280 The gen_move_insn call in cse_set_around_loop may create new pseudos.
8281 These pseudos won't have valid entries in any of the tables indexed
8282 by register number, such as reg_qty. We avoid out-of-range array
8283 accesses by not processing any instructions created after cse started. */
8285 for (insn = NEXT_INSN (loop_start);
8286 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
8287 && INSN_UID (insn) < max_insn_uid
8288 && ! (GET_CODE (insn) == NOTE
8289 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
8290 insn = NEXT_INSN (insn))
8292 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8293 && (GET_CODE (PATTERN (insn)) == SET
8294 || GET_CODE (PATTERN (insn)) == CLOBBER))
8295 cse_set_around_loop (PATTERN (insn), insn, loop_start);
8296 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8297 && GET_CODE (PATTERN (insn)) == PARALLEL)
8298 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8299 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
8300 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
8301 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
8306 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
8307 since they are done elsewhere. This function is called via note_stores. */
8310 invalidate_skipped_set (dest, set)
8314 enum rtx_code code = GET_CODE (dest);
8317 && ! note_mem_written (dest) /* If this is not a stack push ... */
8318 /* There are times when an address can appear varying and be a PLUS
8319 during this scan when it would be a fixed address were we to know
8320 the proper equivalences. So invalidate all memory if there is
8321 a BLKmode or nonscalar memory reference or a reference to a
8322 variable address. */
8323 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
8324 || cse_rtx_varies_p (XEXP (dest, 0))))
8326 invalidate_memory ();
8330 if (GET_CODE (set) == CLOBBER
8337 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
8338 invalidate (XEXP (dest, 0), GET_MODE (dest));
8339 else if (code == REG || code == SUBREG || code == MEM)
8340 invalidate (dest, VOIDmode);
8343 /* Invalidate all insns from START up to the end of the function or the
8344 next label. This called when we wish to CSE around a block that is
8345 conditionally executed. */
8348 invalidate_skipped_block (start)
8353 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
8354 insn = NEXT_INSN (insn))
8356 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
8359 if (GET_CODE (insn) == CALL_INSN)
8361 if (! CONST_CALL_P (insn))
8362 invalidate_memory ();
8363 invalidate_for_call ();
8366 invalidate_from_clobbers (PATTERN (insn));
8367 note_stores (PATTERN (insn), invalidate_skipped_set);
8371 /* Used for communication between the following two routines; contains a
8372 value to be checked for modification. */
8374 static rtx cse_check_loop_start_value;
8376 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
8377 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
8380 cse_check_loop_start (x, set)
8382 rtx set ATTRIBUTE_UNUSED;
8384 if (cse_check_loop_start_value == 0
8385 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
8388 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
8389 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
8390 cse_check_loop_start_value = 0;
8393 /* X is a SET or CLOBBER contained in INSN that was found near the start of
8394 a loop that starts with the label at LOOP_START.
8396 If X is a SET, we see if its SET_SRC is currently in our hash table.
8397 If so, we see if it has a value equal to some register used only in the
8398 loop exit code (as marked by jump.c).
8400 If those two conditions are true, we search backwards from the start of
8401 the loop to see if that same value was loaded into a register that still
8402 retains its value at the start of the loop.
8404 If so, we insert an insn after the load to copy the destination of that
8405 load into the equivalent register and (try to) replace our SET_SRC with that
8408 In any event, we invalidate whatever this SET or CLOBBER modifies. */
8411 cse_set_around_loop (x, insn, loop_start)
8416 struct table_elt *src_elt;
8418 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8419 are setting PC or CC0 or whose SET_SRC is already a register. */
8420 if (GET_CODE (x) == SET
8421 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
8422 && GET_CODE (SET_SRC (x)) != REG)
8424 src_elt = lookup (SET_SRC (x),
8425 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
8426 GET_MODE (SET_DEST (x)));
8429 for (src_elt = src_elt->first_same_value; src_elt;
8430 src_elt = src_elt->next_same_value)
8431 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
8432 && COST (src_elt->exp) < COST (SET_SRC (x)))
8436 /* Look for an insn in front of LOOP_START that sets
8437 something in the desired mode to SET_SRC (x) before we hit
8438 a label or CALL_INSN. */
8440 for (p = prev_nonnote_insn (loop_start);
8441 p && GET_CODE (p) != CALL_INSN
8442 && GET_CODE (p) != CODE_LABEL;
8443 p = prev_nonnote_insn (p))
8444 if ((set = single_set (p)) != 0
8445 && GET_CODE (SET_DEST (set)) == REG
8446 && GET_MODE (SET_DEST (set)) == src_elt->mode
8447 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
8449 /* We now have to ensure that nothing between P
8450 and LOOP_START modified anything referenced in
8451 SET_SRC (x). We know that nothing within the loop
8452 can modify it, or we would have invalidated it in
8456 cse_check_loop_start_value = SET_SRC (x);
8457 for (q = p; q != loop_start; q = NEXT_INSN (q))
8458 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8459 note_stores (PATTERN (q), cse_check_loop_start);
8461 /* If nothing was changed and we can replace our
8462 SET_SRC, add an insn after P to copy its destination
8463 to what we will be replacing SET_SRC with. */
8464 if (cse_check_loop_start_value
8465 && validate_change (insn, &SET_SRC (x),
8468 /* If this creates new pseudos, this is unsafe,
8469 because the regno of new pseudo is unsuitable
8470 to index into reg_qty when cse_insn processes
8471 the new insn. Therefore, if a new pseudo was
8472 created, discard this optimization. */
8473 int nregs = max_reg_num ();
8475 = gen_move_insn (src_elt->exp, SET_DEST (set));
8476 if (nregs != max_reg_num ())
8478 if (! validate_change (insn, &SET_SRC (x),
8483 emit_insn_after (move, p);
8490 /* Now invalidate anything modified by X. */
8491 note_mem_written (SET_DEST (x));
8493 /* See comment on similar code in cse_insn for explanation of these tests. */
8494 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8495 || GET_CODE (SET_DEST (x)) == MEM)
8496 invalidate (SET_DEST (x), VOIDmode);
8497 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8498 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8499 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8502 /* Find the end of INSN's basic block and return its range,
8503 the total number of SETs in all the insns of the block, the last insn of the
8504 block, and the branch path.
8506 The branch path indicates which branches should be followed. If a non-zero
8507 path size is specified, the block should be rescanned and a different set
8508 of branches will be taken. The branch path is only used if
8509 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8511 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8512 used to describe the block. It is filled in with the information about
8513 the current block. The incoming structure's branch path, if any, is used
8514 to construct the output branch path. */
8517 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8519 struct cse_basic_block_data *data;
8526 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8527 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8528 int path_size = data->path_size;
8532 /* Update the previous branch path, if any. If the last branch was
8533 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8534 shorten the path by one and look at the previous branch. We know that
8535 at least one branch must have been taken if PATH_SIZE is non-zero. */
8536 while (path_size > 0)
8538 if (data->path[path_size - 1].status != NOT_TAKEN)
8540 data->path[path_size - 1].status = NOT_TAKEN;
8547 /* Scan to end of this basic block. */
8548 while (p && GET_CODE (p) != CODE_LABEL)
8550 /* Don't cse out the end of a loop. This makes a difference
8551 only for the unusual loops that always execute at least once;
8552 all other loops have labels there so we will stop in any case.
8553 Cse'ing out the end of the loop is dangerous because it
8554 might cause an invariant expression inside the loop
8555 to be reused after the end of the loop. This would make it
8556 hard to move the expression out of the loop in loop.c,
8557 especially if it is one of several equivalent expressions
8558 and loop.c would like to eliminate it.
8560 If we are running after loop.c has finished, we can ignore
8561 the NOTE_INSN_LOOP_END. */
8563 if (! after_loop && GET_CODE (p) == NOTE
8564 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8567 /* Don't cse over a call to setjmp; on some machines (eg vax)
8568 the regs restored by the longjmp come from
8569 a later time than the setjmp. */
8570 if (GET_CODE (p) == NOTE
8571 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8574 /* A PARALLEL can have lots of SETs in it,
8575 especially if it is really an ASM_OPERANDS. */
8576 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8577 && GET_CODE (PATTERN (p)) == PARALLEL)
8578 nsets += XVECLEN (PATTERN (p), 0);
8579 else if (GET_CODE (p) != NOTE)
8582 /* Ignore insns made by CSE; they cannot affect the boundaries of
8585 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8586 high_cuid = INSN_CUID (p);
8587 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8588 low_cuid = INSN_CUID (p);
8590 /* See if this insn is in our branch path. If it is and we are to
8592 if (path_entry < path_size && data->path[path_entry].branch == p)
8594 if (data->path[path_entry].status != NOT_TAKEN)
8597 /* Point to next entry in path, if any. */
8601 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8602 was specified, we haven't reached our maximum path length, there are
8603 insns following the target of the jump, this is the only use of the
8604 jump label, and the target label is preceded by a BARRIER.
8606 Alternatively, we can follow the jump if it branches around a
8607 block of code and there are no other branches into the block.
8608 In this case invalidate_skipped_block will be called to invalidate any
8609 registers set in the block when following the jump. */
8611 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8612 && GET_CODE (p) == JUMP_INSN
8613 && GET_CODE (PATTERN (p)) == SET
8614 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8615 && JUMP_LABEL (p) != 0
8616 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8617 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8619 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8620 if ((GET_CODE (q) != NOTE
8621 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8622 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8623 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8626 /* If we ran into a BARRIER, this code is an extension of the
8627 basic block when the branch is taken. */
8628 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8630 /* Don't allow ourself to keep walking around an
8631 always-executed loop. */
8632 if (next_real_insn (q) == next)
8638 /* Similarly, don't put a branch in our path more than once. */
8639 for (i = 0; i < path_entry; i++)
8640 if (data->path[i].branch == p)
8643 if (i != path_entry)
8646 data->path[path_entry].branch = p;
8647 data->path[path_entry++].status = TAKEN;
8649 /* This branch now ends our path. It was possible that we
8650 didn't see this branch the last time around (when the
8651 insn in front of the target was a JUMP_INSN that was
8652 turned into a no-op). */
8653 path_size = path_entry;
8656 /* Mark block so we won't scan it again later. */
8657 PUT_MODE (NEXT_INSN (p), QImode);
8659 /* Detect a branch around a block of code. */
8660 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8664 if (next_real_insn (q) == next)
8670 for (i = 0; i < path_entry; i++)
8671 if (data->path[i].branch == p)
8674 if (i != path_entry)
8677 /* This is no_labels_between_p (p, q) with an added check for
8678 reaching the end of a function (in case Q precedes P). */
8679 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8680 if (GET_CODE (tmp) == CODE_LABEL)
8685 data->path[path_entry].branch = p;
8686 data->path[path_entry++].status = AROUND;
8688 path_size = path_entry;
8691 /* Mark block so we won't scan it again later. */
8692 PUT_MODE (NEXT_INSN (p), QImode);
8699 data->low_cuid = low_cuid;
8700 data->high_cuid = high_cuid;
8701 data->nsets = nsets;
8704 /* If all jumps in the path are not taken, set our path length to zero
8705 so a rescan won't be done. */
8706 for (i = path_size - 1; i >= 0; i--)
8707 if (data->path[i].status != NOT_TAKEN)
8711 data->path_size = 0;
8713 data->path_size = path_size;
8715 /* End the current branch path. */
8716 data->path[path_size].branch = 0;
8719 /* Perform cse on the instructions of a function.
8720 F is the first instruction.
8721 NREGS is one plus the highest pseudo-reg number used in the instruction.
8723 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8724 (only if -frerun-cse-after-loop).
8726 Returns 1 if jump_optimize should be redone due to simplifications
8727 in conditional jump instructions. */
8730 cse_main (f, nregs, after_loop, file)
8736 struct cse_basic_block_data val;
8737 register rtx insn = f;
8740 cse_jumps_altered = 0;
8741 recorded_label_ref = 0;
8742 constant_pool_entries_cost = 0;
8746 init_alias_analysis ();
8750 max_insn_uid = get_max_uid ();
8752 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8753 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8755 #ifdef LOAD_EXTEND_OP
8757 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8758 and change the code and mode as appropriate. */
8759 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8762 /* Discard all the free elements of the previous function
8763 since they are allocated in the temporarily obstack. */
8764 bzero ((char *) table, sizeof table);
8765 free_element_chain = 0;
8766 n_elements_made = 0;
8768 /* Find the largest uid. */
8770 max_uid = get_max_uid ();
8771 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8772 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8774 /* Compute the mapping from uids to cuids.
8775 CUIDs are numbers assigned to insns, like uids,
8776 except that cuids increase monotonically through the code.
8777 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8778 between two insns is not affected by -g. */
8780 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8782 if (GET_CODE (insn) != NOTE
8783 || NOTE_LINE_NUMBER (insn) < 0)
8784 INSN_CUID (insn) = ++i;
8786 /* Give a line number note the same cuid as preceding insn. */
8787 INSN_CUID (insn) = i;
8790 /* Initialize which registers are clobbered by calls. */
8792 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8794 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8795 if ((call_used_regs[i]
8796 /* Used to check !fixed_regs[i] here, but that isn't safe;
8797 fixed regs are still call-clobbered, and sched can get
8798 confused if they can "live across calls".
8800 The frame pointer is always preserved across calls. The arg
8801 pointer is if it is fixed. The stack pointer usually is, unless
8802 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8803 will be present. If we are generating PIC code, the PIC offset
8804 table register is preserved across calls. */
8806 && i != STACK_POINTER_REGNUM
8807 && i != FRAME_POINTER_REGNUM
8808 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8809 && i != HARD_FRAME_POINTER_REGNUM
8811 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8812 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8814 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8815 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8819 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8821 /* Loop over basic blocks.
8822 Compute the maximum number of qty's needed for each basic block
8823 (which is 2 for each SET). */
8827 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8828 flag_cse_skip_blocks);
8830 /* If this basic block was already processed or has no sets, skip it. */
8831 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8833 PUT_MODE (insn, VOIDmode);
8834 insn = (val.last ? NEXT_INSN (val.last) : 0);
8839 cse_basic_block_start = val.low_cuid;
8840 cse_basic_block_end = val.high_cuid;
8841 max_qty = val.nsets * 2;
8844 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
8845 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8848 /* Make MAX_QTY bigger to give us room to optimize
8849 past the end of this basic block, if that should prove useful. */
8855 /* If this basic block is being extended by following certain jumps,
8856 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8857 Otherwise, we start after this basic block. */
8858 if (val.path_size > 0)
8859 cse_basic_block (insn, val.last, val.path, 0);
8862 int old_cse_jumps_altered = cse_jumps_altered;
8865 /* When cse changes a conditional jump to an unconditional
8866 jump, we want to reprocess the block, since it will give
8867 us a new branch path to investigate. */
8868 cse_jumps_altered = 0;
8869 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8870 if (cse_jumps_altered == 0
8871 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8874 cse_jumps_altered |= old_cse_jumps_altered;
8882 /* Tell refers_to_mem_p that qty_const info is not available. */
8885 if (max_elements_made < n_elements_made)
8886 max_elements_made = n_elements_made;
8888 return cse_jumps_altered || recorded_label_ref;
8891 /* Process a single basic block. FROM and TO and the limits of the basic
8892 block. NEXT_BRANCH points to the branch path when following jumps or
8893 a null path when not following jumps.
8895 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8896 loop. This is true when we are being called for the last time on a
8897 block and this CSE pass is before loop.c. */
8900 cse_basic_block (from, to, next_branch, around_loop)
8901 register rtx from, to;
8902 struct branch_path *next_branch;
8907 rtx libcall_insn = NULL_RTX;
8910 /* Each of these arrays is undefined before max_reg, so only allocate
8911 the space actually needed and adjust the start below. */
8913 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8914 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8915 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8916 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8917 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8919 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8920 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8921 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8923 qty_first_reg -= max_reg;
8924 qty_last_reg -= max_reg;
8925 qty_mode -= max_reg;
8926 qty_const -= max_reg;
8927 qty_const_insn -= max_reg;
8928 qty_comparison_code -= max_reg;
8929 qty_comparison_qty -= max_reg;
8930 qty_comparison_const -= max_reg;
8934 /* TO might be a label. If so, protect it from being deleted. */
8935 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8938 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8940 register enum rtx_code code = GET_CODE (insn);
8942 /* If we have processed 1,000 insns, flush the hash table to
8943 avoid extreme quadratic behavior. We must not include NOTEs
8944 in the count since there may be more or them when generating
8945 debugging information. If we clear the table at different
8946 times, code generated with -g -O might be different than code
8947 generated with -O but not -g.
8949 ??? This is a real kludge and needs to be done some other way.
8951 if (code != NOTE && num_insns++ > 1000)
8953 flush_hash_table ();
8957 /* See if this is a branch that is part of the path. If so, and it is
8958 to be taken, do so. */
8959 if (next_branch->branch == insn)
8961 enum taken status = next_branch++->status;
8962 if (status != NOT_TAKEN)
8964 if (status == TAKEN)
8965 record_jump_equiv (insn, 1);
8967 invalidate_skipped_block (NEXT_INSN (insn));
8969 /* Set the last insn as the jump insn; it doesn't affect cc0.
8970 Then follow this branch. */
8975 insn = JUMP_LABEL (insn);
8980 if (GET_MODE (insn) == QImode)
8981 PUT_MODE (insn, VOIDmode);
8983 if (GET_RTX_CLASS (code) == 'i')
8987 /* Process notes first so we have all notes in canonical forms when
8988 looking for duplicate operations. */
8990 if (REG_NOTES (insn))
8991 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8993 /* Track when we are inside in LIBCALL block. Inside such a block,
8994 we do not want to record destinations. The last insn of a
8995 LIBCALL block is not considered to be part of the block, since
8996 its destination is the result of the block and hence should be
8999 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
9000 libcall_insn = XEXP (p, 0);
9001 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
9002 libcall_insn = NULL_RTX;
9004 cse_insn (insn, libcall_insn);
9007 /* If INSN is now an unconditional jump, skip to the end of our
9008 basic block by pretending that we just did the last insn in the
9009 basic block. If we are jumping to the end of our block, show
9010 that we can have one usage of TO. */
9012 if (simplejump_p (insn))
9017 if (JUMP_LABEL (insn) == to)
9020 /* Maybe TO was deleted because the jump is unconditional.
9021 If so, there is nothing left in this basic block. */
9022 /* ??? Perhaps it would be smarter to set TO
9023 to whatever follows this insn,
9024 and pretend the basic block had always ended here. */
9025 if (INSN_DELETED_P (to))
9028 insn = PREV_INSN (to);
9031 /* See if it is ok to keep on going past the label
9032 which used to end our basic block. Remember that we incremented
9033 the count of that label, so we decrement it here. If we made
9034 a jump unconditional, TO_USAGE will be one; in that case, we don't
9035 want to count the use in that jump. */
9037 if (to != 0 && NEXT_INSN (insn) == to
9038 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
9040 struct cse_basic_block_data val;
9043 insn = NEXT_INSN (to);
9045 /* If TO was the last insn in the function, we are done. */
9049 /* If TO was preceded by a BARRIER we are done with this block
9050 because it has no continuation. */
9051 prev = prev_nonnote_insn (to);
9052 if (prev && GET_CODE (prev) == BARRIER)
9055 /* Find the end of the following block. Note that we won't be
9056 following branches in this case. */
9059 cse_end_of_basic_block (insn, &val, 0, 0, 0);
9061 /* If the tables we allocated have enough space left
9062 to handle all the SETs in the next basic block,
9063 continue through it. Otherwise, return,
9064 and that block will be scanned individually. */
9065 if (val.nsets * 2 + next_qty > max_qty)
9068 cse_basic_block_start = val.low_cuid;
9069 cse_basic_block_end = val.high_cuid;
9072 /* Prevent TO from being deleted if it is a label. */
9073 if (to != 0 && GET_CODE (to) == CODE_LABEL)
9076 /* Back up so we process the first insn in the extension. */
9077 insn = PREV_INSN (insn);
9081 if (next_qty > max_qty)
9084 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
9085 the previous insn is the only insn that branches to the head of a loop,
9086 we can cse into the loop. Don't do this if we changed the jump
9087 structure of a loop unless we aren't going to be following jumps. */
9089 if ((cse_jumps_altered == 0
9090 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
9091 && around_loop && to != 0
9092 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
9093 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
9094 && JUMP_LABEL (PREV_INSN (to)) != 0
9095 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
9096 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
9098 return to ? NEXT_INSN (to) : 0;
9101 /* Count the number of times registers are used (not set) in X.
9102 COUNTS is an array in which we accumulate the count, INCR is how much
9103 we count each register usage.
9105 Don't count a usage of DEST, which is the SET_DEST of a SET which
9106 contains X in its SET_SRC. This is because such a SET does not
9107 modify the liveness of DEST. */
9110 count_reg_usage (x, counts, dest, incr)
9123 switch (code = GET_CODE (x))
9127 counts[REGNO (x)] += incr;
9140 /* If we are clobbering a MEM, mark any registers inside the address
9142 if (GET_CODE (XEXP (x, 0)) == MEM)
9143 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
9147 /* Unless we are setting a REG, count everything in SET_DEST. */
9148 if (GET_CODE (SET_DEST (x)) != REG)
9149 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
9151 /* If SRC has side-effects, then we can't delete this insn, so the
9152 usage of SET_DEST inside SRC counts.
9154 ??? Strictly-speaking, we might be preserving this insn
9155 because some other SET has side-effects, but that's hard
9156 to do and can't happen now. */
9157 count_reg_usage (SET_SRC (x), counts,
9158 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
9163 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
9165 /* ... falls through ... */
9168 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
9170 /* Things used in a REG_EQUAL note aren't dead since loop may try to
9173 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
9178 if (REG_NOTE_KIND (x) == REG_EQUAL
9179 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
9180 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
9181 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
9188 fmt = GET_RTX_FORMAT (code);
9189 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9192 count_reg_usage (XEXP (x, i), counts, dest, incr);
9193 else if (fmt[i] == 'E')
9194 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9195 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
9199 /* Scan all the insns and delete any that are dead; i.e., they store a register
9200 that is never used or they copy a register to itself.
9202 This is used to remove insns made obviously dead by cse, loop or other
9203 optimizations. It improves the heuristics in loop since it won't try to
9204 move dead invariants out of loops or make givs for dead quantities. The
9205 remaining passes of the compilation are also sped up. */
9208 delete_trivially_dead_insns (insns, nreg)
9212 int *counts = (int *) alloca (nreg * sizeof (int));
9218 int in_libcall = 0, dead_libcall = 0;
9220 /* First count the number of times each register is used. */
9221 bzero ((char *) counts, sizeof (int) * nreg);
9222 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
9223 count_reg_usage (insn, counts, NULL_RTX, 1);
9225 /* Go from the last insn to the first and delete insns that only set unused
9226 registers or copy a register to itself. As we delete an insn, remove
9227 usage counts for registers it uses. */
9228 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
9233 prev = prev_real_insn (insn);
9235 /* Don't delete any insns that are part of a libcall block unless
9236 we can delete the whole libcall block.
9238 Flow or loop might get confused if we did that. Remember
9239 that we are scanning backwards. */
9240 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
9246 /* See if there's a REG_EQUAL note on this insn and try to
9247 replace the source with the REG_EQUAL expression.
9249 We assume that insns with REG_RETVALs can only be reg->reg
9250 copies at this point. */
9251 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
9254 rtx set = single_set (insn);
9256 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
9259 find_reg_note (insn, REG_RETVAL, NULL_RTX));
9264 else if (in_libcall)
9265 live_insn = ! dead_libcall;
9266 else if (GET_CODE (PATTERN (insn)) == SET)
9268 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
9269 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
9273 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
9274 && ! side_effects_p (SET_SRC (PATTERN (insn)))
9275 && ((tem = next_nonnote_insn (insn)) == 0
9276 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9277 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9280 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
9281 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
9282 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
9283 || side_effects_p (SET_SRC (PATTERN (insn))))
9286 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9287 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9289 rtx elt = XVECEXP (PATTERN (insn), 0, i);
9291 if (GET_CODE (elt) == SET)
9293 if (GET_CODE (SET_DEST (elt)) == REG
9294 && SET_DEST (elt) == SET_SRC (elt))
9298 else if (GET_CODE (SET_DEST (elt)) == CC0
9299 && ! side_effects_p (SET_SRC (elt))
9300 && ((tem = next_nonnote_insn (insn)) == 0
9301 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9302 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9305 else if (GET_CODE (SET_DEST (elt)) != REG
9306 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
9307 || counts[REGNO (SET_DEST (elt))] != 0
9308 || side_effects_p (SET_SRC (elt)))
9311 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
9317 /* If this is a dead insn, delete it and show registers in it aren't
9322 count_reg_usage (insn, counts, NULL_RTX, -1);
9326 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))