2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/hdmi.h>
32 #include <linux/i2c.h>
33 #include <linux/module.h>
35 #include <drm/drm_edid.h>
36 #include <linux/string.h>
38 #include <bus/iicbus/iic.h>
39 #include <bus/iicbus/iiconf.h>
40 #include "iicbus_if.h"
42 #define version_greater(edid, maj, min) \
43 (((edid)->version > (maj)) || \
44 ((edid)->version == (maj) && (edid)->revision > (min)))
46 #define EDID_EST_TIMINGS 16
47 #define EDID_STD_TIMINGS 8
48 #define EDID_DETAILED_TIMINGS 4
51 * EDID blocks out in the wild have a variety of bugs, try to collect
52 * them here (note that userspace may work around broken monitors first,
53 * but fixes should make their way here so that the kernel "just works"
54 * on as many displays as possible).
57 /* First detailed mode wrong, use largest 60Hz mode */
58 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
59 /* Reported 135MHz pixel clock is too high, needs adjustment */
60 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
61 /* Prefer the largest mode at 75 Hz */
62 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
63 /* Detail timing is in cm not mm */
64 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
65 /* Detailed timing descriptors have bogus size values, so just take the
66 * maximum size and use that.
68 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
69 /* Monitor forgot to set the first detailed is preferred bit. */
70 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
71 /* use +hsync +vsync for detailed mode */
72 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
73 /* Force reduced-blanking timings for detailed modes */
74 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
76 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
78 struct detailed_mode_closure {
79 struct drm_connector *connector;
91 static struct edid_quirk {
95 } edid_quirk_list[] = {
97 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
99 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
101 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
103 /* Belinea 10 15 55 */
104 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
105 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
107 /* Envision Peripherals, Inc. EN-7100e */
108 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
109 /* Envision EN2028 */
110 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
112 /* Funai Electronics PM36B */
113 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
114 EDID_QUIRK_DETAILED_IN_CM },
116 /* LG Philips LCD LP154W01-A5 */
117 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
118 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
120 /* Philips 107p5 CRT */
121 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
124 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
126 /* Samsung SyncMaster 205BW. Note: irony */
127 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
128 /* Samsung SyncMaster 22[5-6]BW */
129 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
130 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
132 /* ViewSonic VA2026w */
133 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
135 /* Medion MD 30217 PG */
136 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
138 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
139 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
143 * Autogenerated from the DMT spec.
144 * This table is copied from xfree86/modes/xf86EdidModes.c.
146 static const struct drm_display_mode drm_dmt_modes[] = {
148 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
149 736, 832, 0, 350, 382, 385, 445, 0,
150 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
152 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
153 736, 832, 0, 400, 401, 404, 445, 0,
154 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
156 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
157 828, 936, 0, 400, 401, 404, 446, 0,
158 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
160 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
161 752, 800, 0, 480, 489, 492, 525, 0,
162 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
164 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
165 704, 832, 0, 480, 489, 492, 520, 0,
166 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
168 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
169 720, 840, 0, 480, 481, 484, 500, 0,
170 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
172 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
173 752, 832, 0, 480, 481, 484, 509, 0,
174 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
176 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
177 896, 1024, 0, 600, 601, 603, 625, 0,
178 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
180 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
181 968, 1056, 0, 600, 601, 605, 628, 0,
182 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
184 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
185 976, 1040, 0, 600, 637, 643, 666, 0,
186 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
188 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
189 896, 1056, 0, 600, 601, 604, 625, 0,
190 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
192 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
193 896, 1048, 0, 600, 601, 604, 631, 0,
194 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
195 /* 800x600@120Hz RB */
196 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
197 880, 960, 0, 600, 603, 607, 636, 0,
198 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
200 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
201 976, 1088, 0, 480, 486, 494, 517, 0,
202 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
203 /* 1024x768@43Hz, interlace */
204 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
205 1208, 1264, 0, 768, 768, 772, 817, 0,
206 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
207 DRM_MODE_FLAG_INTERLACE) },
209 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
210 1184, 1344, 0, 768, 771, 777, 806, 0,
211 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
213 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
214 1184, 1328, 0, 768, 771, 777, 806, 0,
215 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
217 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
218 1136, 1312, 0, 768, 769, 772, 800, 0,
219 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
221 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
222 1168, 1376, 0, 768, 769, 772, 808, 0,
223 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
224 /* 1024x768@120Hz RB */
225 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
226 1104, 1184, 0, 768, 771, 775, 813, 0,
227 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
229 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
230 1344, 1600, 0, 864, 865, 868, 900, 0,
231 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
232 /* 1280x768@60Hz RB */
233 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
234 1360, 1440, 0, 768, 771, 778, 790, 0,
235 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
237 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
238 1472, 1664, 0, 768, 771, 778, 798, 0,
239 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
241 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
242 1488, 1696, 0, 768, 771, 778, 805, 0,
243 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
245 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
246 1496, 1712, 0, 768, 771, 778, 809, 0,
247 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
248 /* 1280x768@120Hz RB */
249 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
250 1360, 1440, 0, 768, 771, 778, 813, 0,
251 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
252 /* 1280x800@60Hz RB */
253 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
254 1360, 1440, 0, 800, 803, 809, 823, 0,
255 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
257 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
258 1480, 1680, 0, 800, 803, 809, 831, 0,
259 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
261 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
262 1488, 1696, 0, 800, 803, 809, 838, 0,
263 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
265 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
266 1496, 1712, 0, 800, 803, 809, 843, 0,
267 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
268 /* 1280x800@120Hz RB */
269 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
270 1360, 1440, 0, 800, 803, 809, 847, 0,
271 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
273 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
274 1488, 1800, 0, 960, 961, 964, 1000, 0,
275 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
277 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
278 1504, 1728, 0, 960, 961, 964, 1011, 0,
279 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
280 /* 1280x960@120Hz RB */
281 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
282 1360, 1440, 0, 960, 963, 967, 1017, 0,
283 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
285 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
286 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
287 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
289 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
290 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
291 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
293 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
294 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
295 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
296 /* 1280x1024@120Hz RB */
297 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
298 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
299 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
301 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
302 1536, 1792, 0, 768, 771, 777, 795, 0,
303 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
304 /* 1360x768@120Hz RB */
305 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
306 1440, 1520, 0, 768, 771, 776, 813, 0,
307 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
308 /* 1400x1050@60Hz RB */
309 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
310 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
311 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
313 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
314 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
315 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
317 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
318 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
319 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
321 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
322 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
323 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
324 /* 1400x1050@120Hz RB */
325 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
326 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
327 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
328 /* 1440x900@60Hz RB */
329 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
330 1520, 1600, 0, 900, 903, 909, 926, 0,
331 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
333 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
334 1672, 1904, 0, 900, 903, 909, 934, 0,
335 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
337 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
338 1688, 1936, 0, 900, 903, 909, 942, 0,
339 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
341 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
342 1696, 1952, 0, 900, 903, 909, 948, 0,
343 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
344 /* 1440x900@120Hz RB */
345 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
346 1520, 1600, 0, 900, 903, 909, 953, 0,
347 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
349 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
350 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
351 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
353 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
354 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
355 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
357 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
358 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
359 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
361 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
362 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
363 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
365 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
366 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
367 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
368 /* 1600x1200@120Hz RB */
369 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
370 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
371 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
372 /* 1680x1050@60Hz RB */
373 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
374 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
375 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
377 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
378 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
379 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
381 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
382 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
383 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
385 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
386 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
387 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
388 /* 1680x1050@120Hz RB */
389 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
390 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
391 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
393 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
394 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
395 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
397 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
398 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
399 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
400 /* 1792x1344@120Hz RB */
401 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
402 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
403 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
405 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
406 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
407 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
409 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
410 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
411 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
412 /* 1856x1392@120Hz RB */
413 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
414 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
415 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
416 /* 1920x1200@60Hz RB */
417 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
418 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
419 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
421 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
422 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
423 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
425 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
426 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
427 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
429 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
430 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
431 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
432 /* 1920x1200@120Hz RB */
433 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
434 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
435 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
437 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
438 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
439 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
441 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
442 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
444 /* 1920x1440@120Hz RB */
445 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
446 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
447 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
448 /* 2560x1600@60Hz RB */
449 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
450 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
451 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
453 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
454 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
455 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
457 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
458 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
459 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
461 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
462 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
463 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
464 /* 2560x1600@120Hz RB */
465 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
466 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
471 * These more or less come from the DMT spec. The 720x400 modes are
472 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
473 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
474 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
477 * The DMT modes have been fact-checked; the rest are mild guesses.
479 static const struct drm_display_mode edid_est_modes[] = {
480 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
481 968, 1056, 0, 600, 601, 605, 628, 0,
482 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
483 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
484 896, 1024, 0, 600, 601, 603, 625, 0,
485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
486 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
487 720, 840, 0, 480, 481, 484, 500, 0,
488 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
489 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
490 704, 832, 0, 480, 489, 491, 520, 0,
491 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
492 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
493 768, 864, 0, 480, 483, 486, 525, 0,
494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
495 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
496 752, 800, 0, 480, 490, 492, 525, 0,
497 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
498 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
499 846, 900, 0, 400, 421, 423, 449, 0,
500 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
501 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
502 846, 900, 0, 400, 412, 414, 449, 0,
503 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
504 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
505 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
507 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
508 1136, 1312, 0, 768, 769, 772, 800, 0,
509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
510 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
511 1184, 1328, 0, 768, 771, 777, 806, 0,
512 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
513 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
514 1184, 1344, 0, 768, 771, 777, 806, 0,
515 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
516 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
517 1208, 1264, 0, 768, 768, 776, 817, 0,
518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
519 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
520 928, 1152, 0, 624, 625, 628, 667, 0,
521 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
522 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
523 896, 1056, 0, 600, 601, 604, 625, 0,
524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
525 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
526 976, 1040, 0, 600, 637, 643, 666, 0,
527 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
528 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
529 1344, 1600, 0, 864, 865, 868, 900, 0,
530 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
540 static const struct minimode est3_modes[] = {
548 { 1024, 768, 85, 0 },
549 { 1152, 864, 75, 0 },
551 { 1280, 768, 60, 1 },
552 { 1280, 768, 60, 0 },
553 { 1280, 768, 75, 0 },
554 { 1280, 768, 85, 0 },
555 { 1280, 960, 60, 0 },
556 { 1280, 960, 85, 0 },
557 { 1280, 1024, 60, 0 },
558 { 1280, 1024, 85, 0 },
560 { 1360, 768, 60, 0 },
561 { 1440, 900, 60, 1 },
562 { 1440, 900, 60, 0 },
563 { 1440, 900, 75, 0 },
564 { 1440, 900, 85, 0 },
565 { 1400, 1050, 60, 1 },
566 { 1400, 1050, 60, 0 },
567 { 1400, 1050, 75, 0 },
569 { 1400, 1050, 85, 0 },
570 { 1680, 1050, 60, 1 },
571 { 1680, 1050, 60, 0 },
572 { 1680, 1050, 75, 0 },
573 { 1680, 1050, 85, 0 },
574 { 1600, 1200, 60, 0 },
575 { 1600, 1200, 65, 0 },
576 { 1600, 1200, 70, 0 },
578 { 1600, 1200, 75, 0 },
579 { 1600, 1200, 85, 0 },
580 { 1792, 1344, 60, 0 },
581 { 1792, 1344, 75, 0 },
582 { 1856, 1392, 60, 0 },
583 { 1856, 1392, 75, 0 },
584 { 1920, 1200, 60, 1 },
585 { 1920, 1200, 60, 0 },
587 { 1920, 1200, 75, 0 },
588 { 1920, 1200, 85, 0 },
589 { 1920, 1440, 60, 0 },
590 { 1920, 1440, 75, 0 },
593 static const struct minimode extra_modes[] = {
594 { 1024, 576, 60, 0 },
595 { 1366, 768, 60, 0 },
596 { 1600, 900, 60, 0 },
597 { 1680, 945, 60, 0 },
598 { 1920, 1080, 60, 0 },
599 { 2048, 1152, 60, 0 },
600 { 2048, 1536, 60, 0 },
604 * Probably taken from CEA-861 spec.
605 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
607 static const struct drm_display_mode edid_cea_modes[] = {
608 /* 1 - 640x480@60Hz */
609 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
610 752, 800, 0, 480, 490, 492, 525, 0,
611 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
612 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
613 /* 2 - 720x480@60Hz */
614 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
615 798, 858, 0, 480, 489, 495, 525, 0,
616 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
617 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
618 /* 3 - 720x480@60Hz */
619 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
620 798, 858, 0, 480, 489, 495, 525, 0,
621 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
622 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
623 /* 4 - 1280x720@60Hz */
624 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
625 1430, 1650, 0, 720, 725, 730, 750, 0,
626 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
627 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
628 /* 5 - 1920x1080i@60Hz */
629 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
630 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
631 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
632 DRM_MODE_FLAG_INTERLACE),
633 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
634 /* 6 - 1440x480i@60Hz */
635 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
636 1602, 1716, 0, 480, 488, 494, 525, 0,
637 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
638 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
639 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
640 /* 7 - 1440x480i@60Hz */
641 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
642 1602, 1716, 0, 480, 488, 494, 525, 0,
643 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
644 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
645 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
646 /* 8 - 1440x240@60Hz */
647 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
648 1602, 1716, 0, 240, 244, 247, 262, 0,
649 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
650 DRM_MODE_FLAG_DBLCLK),
651 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
652 /* 9 - 1440x240@60Hz */
653 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
654 1602, 1716, 0, 240, 244, 247, 262, 0,
655 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
656 DRM_MODE_FLAG_DBLCLK),
657 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
658 /* 10 - 2880x480i@60Hz */
659 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
660 3204, 3432, 0, 480, 488, 494, 525, 0,
661 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
662 DRM_MODE_FLAG_INTERLACE),
663 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
664 /* 11 - 2880x480i@60Hz */
665 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
666 3204, 3432, 0, 480, 488, 494, 525, 0,
667 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
668 DRM_MODE_FLAG_INTERLACE),
669 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
670 /* 12 - 2880x240@60Hz */
671 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
672 3204, 3432, 0, 240, 244, 247, 262, 0,
673 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
674 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
675 /* 13 - 2880x240@60Hz */
676 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
677 3204, 3432, 0, 240, 244, 247, 262, 0,
678 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
679 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
680 /* 14 - 1440x480@60Hz */
681 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
682 1596, 1716, 0, 480, 489, 495, 525, 0,
683 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
684 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
685 /* 15 - 1440x480@60Hz */
686 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
687 1596, 1716, 0, 480, 489, 495, 525, 0,
688 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
689 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
690 /* 16 - 1920x1080@60Hz */
691 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
692 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
693 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
694 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
695 /* 17 - 720x576@50Hz */
696 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
697 796, 864, 0, 576, 581, 586, 625, 0,
698 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
699 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
700 /* 18 - 720x576@50Hz */
701 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
702 796, 864, 0, 576, 581, 586, 625, 0,
703 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
704 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
705 /* 19 - 1280x720@50Hz */
706 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
707 1760, 1980, 0, 720, 725, 730, 750, 0,
708 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
709 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
710 /* 20 - 1920x1080i@50Hz */
711 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
712 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
713 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
714 DRM_MODE_FLAG_INTERLACE),
715 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
716 /* 21 - 1440x576i@50Hz */
717 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
718 1590, 1728, 0, 576, 580, 586, 625, 0,
719 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
720 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
721 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
722 /* 22 - 1440x576i@50Hz */
723 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
724 1590, 1728, 0, 576, 580, 586, 625, 0,
725 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
726 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
727 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
728 /* 23 - 1440x288@50Hz */
729 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
730 1590, 1728, 0, 288, 290, 293, 312, 0,
731 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
732 DRM_MODE_FLAG_DBLCLK),
733 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
734 /* 24 - 1440x288@50Hz */
735 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
736 1590, 1728, 0, 288, 290, 293, 312, 0,
737 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
738 DRM_MODE_FLAG_DBLCLK),
739 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
740 /* 25 - 2880x576i@50Hz */
741 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
742 3180, 3456, 0, 576, 580, 586, 625, 0,
743 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
744 DRM_MODE_FLAG_INTERLACE),
745 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
746 /* 26 - 2880x576i@50Hz */
747 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
748 3180, 3456, 0, 576, 580, 586, 625, 0,
749 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
750 DRM_MODE_FLAG_INTERLACE),
751 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
752 /* 27 - 2880x288@50Hz */
753 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
754 3180, 3456, 0, 288, 290, 293, 312, 0,
755 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
756 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
757 /* 28 - 2880x288@50Hz */
758 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
759 3180, 3456, 0, 288, 290, 293, 312, 0,
760 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
761 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
762 /* 29 - 1440x576@50Hz */
763 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
764 1592, 1728, 0, 576, 581, 586, 625, 0,
765 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
766 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
767 /* 30 - 1440x576@50Hz */
768 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
769 1592, 1728, 0, 576, 581, 586, 625, 0,
770 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
771 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
772 /* 31 - 1920x1080@50Hz */
773 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
774 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
775 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
776 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
777 /* 32 - 1920x1080@24Hz */
778 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
779 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
780 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
781 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
782 /* 33 - 1920x1080@25Hz */
783 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
784 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
785 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
786 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
787 /* 34 - 1920x1080@30Hz */
788 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
789 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
790 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
791 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
792 /* 35 - 2880x480@60Hz */
793 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
794 3192, 3432, 0, 480, 489, 495, 525, 0,
795 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
796 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
797 /* 36 - 2880x480@60Hz */
798 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
799 3192, 3432, 0, 480, 489, 495, 525, 0,
800 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
801 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
802 /* 37 - 2880x576@50Hz */
803 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
804 3184, 3456, 0, 576, 581, 586, 625, 0,
805 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
806 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
807 /* 38 - 2880x576@50Hz */
808 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
809 3184, 3456, 0, 576, 581, 586, 625, 0,
810 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
811 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
812 /* 39 - 1920x1080i@50Hz */
813 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
814 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
815 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
816 DRM_MODE_FLAG_INTERLACE),
817 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
818 /* 40 - 1920x1080i@100Hz */
819 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
820 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
821 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
822 DRM_MODE_FLAG_INTERLACE),
823 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
824 /* 41 - 1280x720@100Hz */
825 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
826 1760, 1980, 0, 720, 725, 730, 750, 0,
827 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
828 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
829 /* 42 - 720x576@100Hz */
830 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
831 796, 864, 0, 576, 581, 586, 625, 0,
832 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
833 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
834 /* 43 - 720x576@100Hz */
835 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
836 796, 864, 0, 576, 581, 586, 625, 0,
837 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
838 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
839 /* 44 - 1440x576i@100Hz */
840 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
841 1590, 1728, 0, 576, 580, 586, 625, 0,
842 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
843 DRM_MODE_FLAG_DBLCLK),
844 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
845 /* 45 - 1440x576i@100Hz */
846 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
847 1590, 1728, 0, 576, 580, 586, 625, 0,
848 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
849 DRM_MODE_FLAG_DBLCLK),
850 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
851 /* 46 - 1920x1080i@120Hz */
852 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
853 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
854 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
855 DRM_MODE_FLAG_INTERLACE),
856 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
857 /* 47 - 1280x720@120Hz */
858 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
859 1430, 1650, 0, 720, 725, 730, 750, 0,
860 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
861 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
862 /* 48 - 720x480@120Hz */
863 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
864 798, 858, 0, 480, 489, 495, 525, 0,
865 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
866 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
867 /* 49 - 720x480@120Hz */
868 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
869 798, 858, 0, 480, 489, 495, 525, 0,
870 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
871 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
872 /* 50 - 1440x480i@120Hz */
873 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
874 1602, 1716, 0, 480, 488, 494, 525, 0,
875 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
876 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
877 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
878 /* 51 - 1440x480i@120Hz */
879 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
880 1602, 1716, 0, 480, 488, 494, 525, 0,
881 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
882 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
883 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
884 /* 52 - 720x576@200Hz */
885 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
886 796, 864, 0, 576, 581, 586, 625, 0,
887 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
888 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
889 /* 53 - 720x576@200Hz */
890 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
891 796, 864, 0, 576, 581, 586, 625, 0,
892 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
893 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
894 /* 54 - 1440x576i@200Hz */
895 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
896 1590, 1728, 0, 576, 580, 586, 625, 0,
897 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
898 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
899 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
900 /* 55 - 1440x576i@200Hz */
901 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
902 1590, 1728, 0, 576, 580, 586, 625, 0,
903 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
904 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
905 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
906 /* 56 - 720x480@240Hz */
907 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
908 798, 858, 0, 480, 489, 495, 525, 0,
909 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
910 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
911 /* 57 - 720x480@240Hz */
912 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
913 798, 858, 0, 480, 489, 495, 525, 0,
914 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
915 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
916 /* 58 - 1440x480i@240 */
917 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
918 1602, 1716, 0, 480, 488, 494, 525, 0,
919 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
920 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
921 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
922 /* 59 - 1440x480i@240 */
923 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
924 1602, 1716, 0, 480, 488, 494, 525, 0,
925 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
926 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
927 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
928 /* 60 - 1280x720@24Hz */
929 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
930 3080, 3300, 0, 720, 725, 730, 750, 0,
931 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
932 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
933 /* 61 - 1280x720@25Hz */
934 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
935 3740, 3960, 0, 720, 725, 730, 750, 0,
936 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
937 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
938 /* 62 - 1280x720@30Hz */
939 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
940 3080, 3300, 0, 720, 725, 730, 750, 0,
941 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
942 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
943 /* 63 - 1920x1080@120Hz */
944 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
945 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
946 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
947 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
948 /* 64 - 1920x1080@100Hz */
949 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
950 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
951 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
952 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
958 static const struct drm_display_mode edid_4k_modes[] = {
959 /* 1 - 3840x2160@30Hz */
960 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
961 3840, 4016, 4104, 4400, 0,
962 2160, 2168, 2178, 2250, 0,
963 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
965 /* 2 - 3840x2160@25Hz */
966 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
967 3840, 4896, 4984, 5280, 0,
968 2160, 2168, 2178, 2250, 0,
969 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
971 /* 3 - 3840x2160@24Hz */
972 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
973 3840, 5116, 5204, 5500, 0,
974 2160, 2168, 2178, 2250, 0,
975 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
977 /* 4 - 4096x2160@24Hz (SMPTE) */
978 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
979 4096, 5116, 5204, 5500, 0,
980 2160, 2168, 2178, 2250, 0,
981 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
985 /*** DDC fetch and block validation ***/
987 static const u8 edid_header[] = {
988 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
992 * Sanity check the header of the base EDID block. Return 8 if the header
993 * is perfect, down to 0 if it's totally wrong.
995 int drm_edid_header_is_valid(const u8 *raw_edid)
999 for (i = 0; i < sizeof(edid_header); i++)
1000 if (raw_edid[i] == edid_header[i])
1005 EXPORT_SYMBOL(drm_edid_header_is_valid);
1007 static int edid_fixup __read_mostly = 6;
1008 module_param_named(edid_fixup, edid_fixup, int, 0400);
1009 MODULE_PARM_DESC(edid_fixup,
1010 "Minimum number of valid EDID header bytes (0-8, default 6)");
1013 * Sanity check the EDID block (base or extension). Return 0 if the block
1014 * doesn't check out, or 1 if it's valid.
1016 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
1020 struct edid *edid = (struct edid *)raw_edid;
1022 if (WARN_ON(!raw_edid))
1025 if (edid_fixup > 8 || edid_fixup < 0)
1029 int score = drm_edid_header_is_valid(raw_edid);
1031 else if (score >= edid_fixup) {
1032 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1033 memcpy(raw_edid, edid_header, sizeof(edid_header));
1039 for (i = 0; i < EDID_LENGTH; i++)
1040 csum += raw_edid[i];
1042 if (print_bad_edid) {
1043 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1046 /* allow CEA to slide through, switches mangle this */
1047 if (raw_edid[0] != 0x02)
1051 /* per-block-type checks */
1052 switch (raw_edid[0]) {
1054 if (edid->version != 1) {
1055 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1059 if (edid->revision > 4)
1060 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1070 if (print_bad_edid) {
1071 printk(KERN_ERR "Raw EDID:\n");
1072 for (i = 0; i < EDID_LENGTH; ) {
1073 kprintf("%02x", raw_edid[i]);
1075 if (i % 16 == 0 || i == EDID_LENGTH)
1077 else if (i % 8 == 0)
1085 EXPORT_SYMBOL(drm_edid_block_valid);
1088 * drm_edid_is_valid - sanity check EDID data
1091 * Sanity-check an entire EDID record (including extensions)
1093 bool drm_edid_is_valid(struct edid *edid)
1096 u8 *raw = (u8 *)edid;
1101 for (i = 0; i <= edid->extensions; i++)
1102 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1107 EXPORT_SYMBOL(drm_edid_is_valid);
1109 #define DDC_SEGMENT_ADDR 0x30
1111 * Get EDID information via I2C.
1113 * \param adapter : i2c device adaptor
1114 * \param buf : EDID data buffer to be filled
1115 * \param len : EDID data buffer length
1116 * \return 0 on success or -1 on failure.
1118 * Try to fetch EDID information by calling i2c driver function.
1121 drm_do_probe_ddc_edid(struct device *adapter, unsigned char *buf,
1124 unsigned char start = block * EDID_LENGTH;
1125 unsigned char segment = block >> 1;
1126 unsigned char xfers = segment ? 3 : 2;
1127 int ret, retries = 5;
1129 /* The core i2c driver will automatically retry the transfer if the
1130 * adapter reports EAGAIN. However, we find that bit-banging transfers
1131 * are susceptible to errors under a heavily loaded machine and
1132 * generate spurious NAKs and timeouts. Retrying the transfer
1133 * of the individual block a few times seems to overcome this.
1136 struct i2c_msg msgs[] = {
1138 .slave = DDC_SEGMENT_ADDR << 1,
1143 .slave = DDC_ADDR << 1,
1148 .slave = DDC_ADDR << 1,
1156 * Avoid sending the segment addr to not upset non-compliant ddc
1159 ret = iicbus_transfer(adapter, &msgs[3 - xfers], xfers);
1162 DRM_DEBUG_KMS("iicbus_transfer countdown %d error %d\n",
1164 } while (ret != 0 && --retries);
1166 return (ret == 0 ? 0 : -1);
1169 static bool drm_edid_is_zero(u8 *in_edid, int length)
1172 u32 *raw_edid = (u32 *)in_edid;
1174 for (i = 0; i < length / 4; i++)
1175 if (*(raw_edid + i) != 0)
1182 drm_do_get_edid(struct drm_connector *connector, struct device *adapter)
1184 int i, j = 0, valid_extensions = 0;
1186 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1188 if ((block = kmalloc(EDID_LENGTH, M_DRM, M_WAITOK)) == NULL)
1191 /* base block fetch */
1192 for (i = 0; i < 4; i++) {
1193 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
1195 if (drm_edid_block_valid(block, 0, print_bad_edid))
1197 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1198 connector->null_edid_counter++;
1205 /* if there's no extensions, we're done */
1206 if (block[0x7e] == 0)
1209 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, M_DRM, M_WAITOK);
1214 for (j = 1; j <= block[0x7e]; j++) {
1215 for (i = 0; i < 4; i++) {
1216 if (drm_do_probe_ddc_edid(adapter,
1217 block + (valid_extensions + 1) * EDID_LENGTH,
1220 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1226 if (i == 4 && print_bad_edid) {
1227 dev_warn(connector->dev->dev,
1228 "%s: Ignoring invalid EDID block %d.\n",
1229 drm_get_connector_name(connector), j);
1231 connector->bad_edid_counter++;
1235 if (valid_extensions != block[0x7e]) {
1236 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1237 block[0x7e] = valid_extensions;
1238 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH,
1248 if (print_bad_edid) {
1249 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1250 drm_get_connector_name(connector), j);
1252 connector->bad_edid_counter++;
1260 * Probe DDC presence.
1262 * \param adapter : i2c device adaptor
1263 * \return 1 on success
1266 drm_probe_ddc(struct device *adapter)
1270 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1272 EXPORT_SYMBOL(drm_probe_ddc);
1275 * drm_get_edid - get EDID data, if available
1276 * @connector: connector we're probing
1277 * @adapter: i2c adapter to use for DDC
1279 * Poke the given i2c channel to grab EDID data if possible. If found,
1280 * attach it to the connector.
1282 * Return edid data or NULL if we couldn't find any.
1284 struct edid *drm_get_edid(struct drm_connector *connector,
1285 struct device *adapter)
1287 struct edid *edid = NULL;
1289 if (drm_probe_ddc(adapter))
1290 edid = (struct edid *)drm_do_get_edid(connector, adapter);
1294 EXPORT_SYMBOL(drm_get_edid);
1297 * drm_edid_duplicate - duplicate an EDID and the extensions
1298 * @edid: EDID to duplicate
1300 * Return duplicate edid or NULL on allocation failure.
1302 struct edid *drm_edid_duplicate(const struct edid *edid)
1304 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1306 EXPORT_SYMBOL(drm_edid_duplicate);
1308 /*** EDID parsing ***/
1311 * edid_vendor - match a string against EDID's obfuscated vendor field
1312 * @edid: EDID to match
1313 * @vendor: vendor string
1315 * Returns true if @vendor is in @edid, false otherwise
1317 static bool edid_vendor(struct edid *edid, char *vendor)
1319 char edid_vendor[3];
1321 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1322 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1323 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1324 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1326 return !strncmp(edid_vendor, vendor, 3);
1330 * edid_get_quirks - return quirk flags for a given EDID
1331 * @edid: EDID to process
1333 * This tells subsequent routines what fixes they need to apply.
1335 static u32 edid_get_quirks(struct edid *edid)
1337 struct edid_quirk *quirk;
1340 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1341 quirk = &edid_quirk_list[i];
1343 if (edid_vendor(edid, quirk->vendor) &&
1344 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1345 return quirk->quirks;
1351 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1352 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1355 * edid_fixup_preferred - set preferred modes based on quirk list
1356 * @connector: has mode list to fix up
1357 * @quirks: quirks list
1359 * Walk the mode list for @connector, clearing the preferred status
1360 * on existing modes and setting it anew for the right mode ala @quirks.
1362 static void edid_fixup_preferred(struct drm_connector *connector,
1365 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1366 int target_refresh = 0;
1367 int cur_vrefresh, preferred_vrefresh;
1369 if (list_empty(&connector->probed_modes))
1372 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1373 target_refresh = 60;
1374 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1375 target_refresh = 75;
1377 preferred_mode = list_first_entry(&connector->probed_modes,
1378 struct drm_display_mode, head);
1380 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1381 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1383 if (cur_mode == preferred_mode)
1386 /* Largest mode is preferred */
1387 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1388 preferred_mode = cur_mode;
1390 cur_vrefresh = cur_mode->vrefresh ?
1391 cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1392 preferred_vrefresh = preferred_mode->vrefresh ?
1393 preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1394 /* At a given size, try to get closest to target refresh */
1395 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1396 MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1397 MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1398 preferred_mode = cur_mode;
1402 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1406 mode_is_rb(const struct drm_display_mode *mode)
1408 return (mode->htotal - mode->hdisplay == 160) &&
1409 (mode->hsync_end - mode->hdisplay == 80) &&
1410 (mode->hsync_end - mode->hsync_start == 32) &&
1411 (mode->vsync_start - mode->vdisplay == 3);
1415 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1416 * @dev: Device to duplicate against
1417 * @hsize: Mode width
1418 * @vsize: Mode height
1419 * @fresh: Mode refresh rate
1420 * @rb: Mode reduced-blanking-ness
1422 * Walk the DMT mode list looking for a match for the given parameters.
1423 * Return a newly allocated copy of the mode, or NULL if not found.
1425 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1426 int hsize, int vsize, int fresh,
1431 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1432 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1433 if (hsize != ptr->hdisplay)
1435 if (vsize != ptr->vdisplay)
1437 if (fresh != drm_mode_vrefresh(ptr))
1439 if (rb != mode_is_rb(ptr))
1442 return drm_mode_duplicate(dev, ptr);
1447 EXPORT_SYMBOL(drm_mode_find_dmt);
1449 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1452 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1456 u8 *det_base = ext + d;
1459 for (i = 0; i < n; i++)
1460 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1464 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1466 unsigned int i, n = min((int)ext[0x02], 6);
1467 u8 *det_base = ext + 5;
1470 return; /* unknown version */
1472 for (i = 0; i < n; i++)
1473 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1477 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1480 struct edid *edid = (struct edid *)raw_edid;
1485 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1486 cb(&(edid->detailed_timings[i]), closure);
1488 for (i = 1; i <= raw_edid[0x7e]; i++) {
1489 u8 *ext = raw_edid + (i * EDID_LENGTH);
1492 cea_for_each_detailed_block(ext, cb, closure);
1495 vtb_for_each_detailed_block(ext, cb, closure);
1504 is_rb(struct detailed_timing *t, void *data)
1507 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1509 *(bool *)data = true;
1512 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1514 drm_monitor_supports_rb(struct edid *edid)
1516 if (edid->revision >= 4) {
1518 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1522 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1526 find_gtf2(struct detailed_timing *t, void *data)
1529 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1533 /* Secondary GTF curve kicks in above some break frequency */
1535 drm_gtf2_hbreak(struct edid *edid)
1538 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1539 return r ? (r[12] * 2) : 0;
1543 drm_gtf2_2c(struct edid *edid)
1546 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1547 return r ? r[13] : 0;
1551 drm_gtf2_m(struct edid *edid)
1554 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1555 return r ? (r[15] << 8) + r[14] : 0;
1559 drm_gtf2_k(struct edid *edid)
1562 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1563 return r ? r[16] : 0;
1567 drm_gtf2_2j(struct edid *edid)
1570 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1571 return r ? r[17] : 0;
1575 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1576 * @edid: EDID block to scan
1578 static int standard_timing_level(struct edid *edid)
1580 if (edid->revision >= 2) {
1581 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1583 if (drm_gtf2_hbreak(edid))
1591 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1592 * monitors fill with ascii space (0x20) instead.
1595 bad_std_timing(u8 a, u8 b)
1597 return (a == 0x00 && b == 0x00) ||
1598 (a == 0x01 && b == 0x01) ||
1599 (a == 0x20 && b == 0x20);
1603 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1604 * @t: standard timing params
1605 * @timing_level: standard timing level
1607 * Take the standard timing params (in this case width, aspect, and refresh)
1608 * and convert them into a real mode using CVT/GTF/DMT.
1610 static struct drm_display_mode *
1611 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1612 struct std_timing *t, int revision)
1614 struct drm_device *dev = connector->dev;
1615 struct drm_display_mode *m, *mode = NULL;
1618 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1619 >> EDID_TIMING_ASPECT_SHIFT;
1620 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1621 >> EDID_TIMING_VFREQ_SHIFT;
1622 int timing_level = standard_timing_level(edid);
1624 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1627 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1628 hsize = t->hsize * 8 + 248;
1629 /* vrefresh_rate = vfreq + 60 */
1630 vrefresh_rate = vfreq + 60;
1631 /* the vdisplay is calculated based on the aspect ratio */
1632 if (aspect_ratio == 0) {
1636 vsize = (hsize * 10) / 16;
1637 } else if (aspect_ratio == 1)
1638 vsize = (hsize * 3) / 4;
1639 else if (aspect_ratio == 2)
1640 vsize = (hsize * 4) / 5;
1642 vsize = (hsize * 9) / 16;
1644 /* HDTV hack, part 1 */
1645 if (vrefresh_rate == 60 &&
1646 ((hsize == 1360 && vsize == 765) ||
1647 (hsize == 1368 && vsize == 769))) {
1653 * If this connector already has a mode for this size and refresh
1654 * rate (because it came from detailed or CVT info), use that
1655 * instead. This way we don't have to guess at interlace or
1658 list_for_each_entry(m, &connector->probed_modes, head)
1659 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1660 drm_mode_vrefresh(m) == vrefresh_rate)
1663 /* HDTV hack, part 2 */
1664 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1665 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1667 mode->hdisplay = 1366;
1668 mode->hsync_start = mode->hsync_start - 1;
1669 mode->hsync_end = mode->hsync_end - 1;
1673 /* check whether it can be found in default mode table */
1674 if (drm_monitor_supports_rb(edid)) {
1675 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1680 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1684 /* okay, generate it */
1685 switch (timing_level) {
1689 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1693 * This is potentially wrong if there's ever a monitor with
1694 * more than one ranges section, each claiming a different
1695 * secondary GTF curve. Please don't do that.
1697 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1700 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1701 drm_mode_destroy(dev, mode);
1702 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1703 vrefresh_rate, 0, 0,
1711 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1719 * EDID is delightfully ambiguous about how interlaced modes are to be
1720 * encoded. Our internal representation is of frame height, but some
1721 * HDTV detailed timings are encoded as field height.
1723 * The format list here is from CEA, in frame size. Technically we
1724 * should be checking refresh rate too. Whatever.
1727 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1728 struct detailed_pixel_timing *pt)
1731 static const struct {
1733 } cea_interlaced[] = {
1743 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1746 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1747 if ((mode->hdisplay == cea_interlaced[i].w) &&
1748 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1749 mode->vdisplay *= 2;
1750 mode->vsync_start *= 2;
1751 mode->vsync_end *= 2;
1757 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1761 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1762 * @dev: DRM device (needed to create new mode)
1764 * @timing: EDID detailed timing info
1765 * @quirks: quirks to apply
1767 * An EDID detailed timing block contains enough info for us to create and
1768 * return a new struct drm_display_mode.
1770 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1772 struct detailed_timing *timing,
1775 struct drm_display_mode *mode;
1776 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1777 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1778 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1779 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1780 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1781 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1782 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1783 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1784 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1786 /* ignore tiny modes */
1787 if (hactive < 64 || vactive < 64)
1790 if (pt->misc & DRM_EDID_PT_STEREO) {
1791 DRM_DEBUG_KMS("stereo mode not supported\n");
1794 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1795 DRM_DEBUG_KMS("composite sync not supported\n");
1798 /* it is incorrect if hsync/vsync width is zero */
1799 if (!hsync_pulse_width || !vsync_pulse_width) {
1800 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1801 "Wrong Hsync/Vsync pulse width\n");
1805 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1806 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1813 mode = drm_mode_create(dev);
1817 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1818 timing->pixel_clock = cpu_to_le16(1088);
1820 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1822 mode->hdisplay = hactive;
1823 mode->hsync_start = mode->hdisplay + hsync_offset;
1824 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1825 mode->htotal = mode->hdisplay + hblank;
1827 mode->vdisplay = vactive;
1828 mode->vsync_start = mode->vdisplay + vsync_offset;
1829 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1830 mode->vtotal = mode->vdisplay + vblank;
1832 /* Some EDIDs have bogus h/vtotal values */
1833 if (mode->hsync_end > mode->htotal)
1834 mode->htotal = mode->hsync_end + 1;
1835 if (mode->vsync_end > mode->vtotal)
1836 mode->vtotal = mode->vsync_end + 1;
1838 drm_mode_do_interlace_quirk(mode, pt);
1840 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1841 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1844 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1845 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1846 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1847 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1850 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1851 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1853 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1854 mode->width_mm *= 10;
1855 mode->height_mm *= 10;
1858 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1859 mode->width_mm = edid->width_cm * 10;
1860 mode->height_mm = edid->height_cm * 10;
1863 mode->type = DRM_MODE_TYPE_DRIVER;
1864 mode->vrefresh = drm_mode_vrefresh(mode);
1865 drm_mode_set_name(mode);
1871 mode_in_hsync_range(const struct drm_display_mode *mode,
1872 struct edid *edid, u8 *t)
1874 int hsync, hmin, hmax;
1877 if (edid->revision >= 4)
1878 hmin += ((t[4] & 0x04) ? 255 : 0);
1880 if (edid->revision >= 4)
1881 hmax += ((t[4] & 0x08) ? 255 : 0);
1882 hsync = drm_mode_hsync(mode);
1884 return (hsync <= hmax && hsync >= hmin);
1888 mode_in_vsync_range(const struct drm_display_mode *mode,
1889 struct edid *edid, u8 *t)
1891 int vsync, vmin, vmax;
1894 if (edid->revision >= 4)
1895 vmin += ((t[4] & 0x01) ? 255 : 0);
1897 if (edid->revision >= 4)
1898 vmax += ((t[4] & 0x02) ? 255 : 0);
1899 vsync = drm_mode_vrefresh(mode);
1901 return (vsync <= vmax && vsync >= vmin);
1905 range_pixel_clock(struct edid *edid, u8 *t)
1908 if (t[9] == 0 || t[9] == 255)
1911 /* 1.4 with CVT support gives us real precision, yay */
1912 if (edid->revision >= 4 && t[10] == 0x04)
1913 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1915 /* 1.3 is pathetic, so fuzz up a bit */
1916 return t[9] * 10000 + 5001;
1920 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1921 struct detailed_timing *timing)
1924 u8 *t = (u8 *)timing;
1926 if (!mode_in_hsync_range(mode, edid, t))
1929 if (!mode_in_vsync_range(mode, edid, t))
1932 if ((max_clock = range_pixel_clock(edid, t)))
1933 if (mode->clock > max_clock)
1936 /* 1.4 max horizontal check */
1937 if (edid->revision >= 4 && t[10] == 0x04)
1938 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1941 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1947 static bool valid_inferred_mode(const struct drm_connector *connector,
1948 const struct drm_display_mode *mode)
1950 struct drm_display_mode *m;
1953 list_for_each_entry(m, &connector->probed_modes, head) {
1954 if (mode->hdisplay == m->hdisplay &&
1955 mode->vdisplay == m->vdisplay &&
1956 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1957 return false; /* duplicated */
1958 if (mode->hdisplay <= m->hdisplay &&
1959 mode->vdisplay <= m->vdisplay)
1966 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1967 struct detailed_timing *timing)
1970 struct drm_display_mode *newmode;
1971 struct drm_device *dev = connector->dev;
1973 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1974 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1975 valid_inferred_mode(connector, drm_dmt_modes + i)) {
1976 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1978 drm_mode_probed_add(connector, newmode);
1987 /* fix up 1366x768 mode from 1368x768;
1988 * GFT/CVT can't express 1366 width which isn't dividable by 8
1990 static void fixup_mode_1366x768(struct drm_display_mode *mode)
1992 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1993 mode->hdisplay = 1366;
1994 mode->hsync_start--;
1996 drm_mode_set_name(mode);
2001 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2002 struct detailed_timing *timing)
2005 struct drm_display_mode *newmode;
2006 struct drm_device *dev = connector->dev;
2008 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2009 const struct minimode *m = &extra_modes[i];
2010 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2014 fixup_mode_1366x768(newmode);
2015 if (!mode_in_range(newmode, edid, timing) ||
2016 !valid_inferred_mode(connector, newmode)) {
2017 drm_mode_destroy(dev, newmode);
2021 drm_mode_probed_add(connector, newmode);
2029 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2030 struct detailed_timing *timing)
2033 struct drm_display_mode *newmode;
2034 struct drm_device *dev = connector->dev;
2035 bool rb = drm_monitor_supports_rb(edid);
2037 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2038 const struct minimode *m = &extra_modes[i];
2039 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2043 fixup_mode_1366x768(newmode);
2044 if (!mode_in_range(newmode, edid, timing) ||
2045 !valid_inferred_mode(connector, newmode)) {
2046 drm_mode_destroy(dev, newmode);
2050 drm_mode_probed_add(connector, newmode);
2058 do_inferred_modes(struct detailed_timing *timing, void *c)
2060 struct detailed_mode_closure *closure = c;
2061 struct detailed_non_pixel *data = &timing->data.other_data;
2062 struct detailed_data_monitor_range *range = &data->data.range;
2064 if (data->type != EDID_DETAIL_MONITOR_RANGE)
2067 closure->modes += drm_dmt_modes_for_range(closure->connector,
2071 if (!version_greater(closure->edid, 1, 1))
2072 return; /* GTF not defined yet */
2074 switch (range->flags) {
2075 case 0x02: /* secondary gtf, XXX could do more */
2076 case 0x00: /* default gtf */
2077 closure->modes += drm_gtf_modes_for_range(closure->connector,
2081 case 0x04: /* cvt, only in 1.4+ */
2082 if (!version_greater(closure->edid, 1, 3))
2085 closure->modes += drm_cvt_modes_for_range(closure->connector,
2089 case 0x01: /* just the ranges, no formula */
2096 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2098 struct detailed_mode_closure closure = {
2099 connector, edid, 0, 0, 0
2102 if (version_greater(edid, 1, 0))
2103 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2106 return closure.modes;
2110 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2112 int i, j, m, modes = 0;
2113 struct drm_display_mode *mode;
2114 u8 *est = ((u8 *)timing) + 5;
2116 for (i = 0; i < 6; i++) {
2117 for (j = 7; j >= 0; j--) {
2118 m = (i * 8) + (7 - j);
2119 if (m >= ARRAY_SIZE(est3_modes))
2121 if (est[i] & (1 << j)) {
2122 mode = drm_mode_find_dmt(connector->dev,
2128 drm_mode_probed_add(connector, mode);
2139 do_established_modes(struct detailed_timing *timing, void *c)
2141 struct detailed_mode_closure *closure = c;
2142 struct detailed_non_pixel *data = &timing->data.other_data;
2144 if (data->type == EDID_DETAIL_EST_TIMINGS)
2145 closure->modes += drm_est3_modes(closure->connector, timing);
2149 * add_established_modes - get est. modes from EDID and add them
2150 * @edid: EDID block to scan
2152 * Each EDID block contains a bitmap of the supported "established modes" list
2153 * (defined above). Tease them out and add them to the global modes list.
2156 add_established_modes(struct drm_connector *connector, struct edid *edid)
2158 struct drm_device *dev = connector->dev;
2159 unsigned long est_bits = edid->established_timings.t1 |
2160 (edid->established_timings.t2 << 8) |
2161 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2163 struct detailed_mode_closure closure = {
2164 connector, edid, 0, 0, 0
2167 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2168 if (est_bits & (1<<i)) {
2169 struct drm_display_mode *newmode;
2170 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2172 drm_mode_probed_add(connector, newmode);
2178 if (version_greater(edid, 1, 0))
2179 drm_for_each_detailed_block((u8 *)edid,
2180 do_established_modes, &closure);
2182 return modes + closure.modes;
2186 do_standard_modes(struct detailed_timing *timing, void *c)
2188 struct detailed_mode_closure *closure = c;
2189 struct detailed_non_pixel *data = &timing->data.other_data;
2190 struct drm_connector *connector = closure->connector;
2191 struct edid *edid = closure->edid;
2193 if (data->type == EDID_DETAIL_STD_MODES) {
2195 for (i = 0; i < 6; i++) {
2196 struct std_timing *std;
2197 struct drm_display_mode *newmode;
2199 std = &data->data.timings[i];
2200 newmode = drm_mode_std(connector, edid, std,
2203 drm_mode_probed_add(connector, newmode);
2211 * add_standard_modes - get std. modes from EDID and add them
2212 * @edid: EDID block to scan
2214 * Standard modes can be calculated using the appropriate standard (DMT,
2215 * GTF or CVT. Grab them from @edid and add them to the list.
2218 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2221 struct detailed_mode_closure closure = {
2222 connector, edid, 0, 0, 0
2225 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2226 struct drm_display_mode *newmode;
2228 newmode = drm_mode_std(connector, edid,
2229 &edid->standard_timings[i],
2232 drm_mode_probed_add(connector, newmode);
2237 if (version_greater(edid, 1, 0))
2238 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2241 /* XXX should also look for standard codes in VTB blocks */
2243 return modes + closure.modes;
2246 static int drm_cvt_modes(struct drm_connector *connector,
2247 struct detailed_timing *timing)
2249 int i, j, modes = 0;
2250 struct drm_display_mode *newmode;
2251 struct drm_device *dev = connector->dev;
2252 struct cvt_timing *cvt;
2253 const int rates[] = { 60, 85, 75, 60, 50 };
2254 const u8 empty[3] = { 0, 0, 0 };
2256 for (i = 0; i < 4; i++) {
2257 int width = 0, height;
2258 cvt = &(timing->data.other_data.data.cvt[i]);
2260 if (!memcmp(cvt->code, empty, 3))
2263 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2264 switch (cvt->code[1] & 0x0c) {
2266 width = height * 4 / 3;
2269 width = height * 16 / 9;
2272 width = height * 16 / 10;
2275 width = height * 15 / 9;
2279 for (j = 1; j < 5; j++) {
2280 if (cvt->code[2] & (1 << j)) {
2281 newmode = drm_cvt_mode(dev, width, height,
2285 drm_mode_probed_add(connector, newmode);
2296 do_cvt_mode(struct detailed_timing *timing, void *c)
2298 struct detailed_mode_closure *closure = c;
2299 struct detailed_non_pixel *data = &timing->data.other_data;
2301 if (data->type == EDID_DETAIL_CVT_3BYTE)
2302 closure->modes += drm_cvt_modes(closure->connector, timing);
2306 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2308 struct detailed_mode_closure closure = {
2309 connector, edid, 0, 0, 0
2312 if (version_greater(edid, 1, 2))
2313 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2315 /* XXX should also look for CVT codes in VTB blocks */
2317 return closure.modes;
2321 do_detailed_mode(struct detailed_timing *timing, void *c)
2323 struct detailed_mode_closure *closure = c;
2324 struct drm_display_mode *newmode;
2326 if (timing->pixel_clock) {
2327 newmode = drm_mode_detailed(closure->connector->dev,
2328 closure->edid, timing,
2333 if (closure->preferred)
2334 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2336 drm_mode_probed_add(closure->connector, newmode);
2338 closure->preferred = 0;
2343 * add_detailed_modes - Add modes from detailed timings
2344 * @connector: attached connector
2345 * @edid: EDID block to scan
2346 * @quirks: quirks to apply
2349 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2352 struct detailed_mode_closure closure = {
2360 if (closure.preferred && !version_greater(edid, 1, 3))
2362 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2364 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2366 return closure.modes;
2369 #define AUDIO_BLOCK 0x01
2370 #define VIDEO_BLOCK 0x02
2371 #define VENDOR_BLOCK 0x03
2372 #define SPEAKER_BLOCK 0x04
2373 #define VIDEO_CAPABILITY_BLOCK 0x07
2374 #define EDID_BASIC_AUDIO (1 << 6)
2375 #define EDID_CEA_YCRCB444 (1 << 5)
2376 #define EDID_CEA_YCRCB422 (1 << 4)
2377 #define EDID_CEA_VCDB_QS (1 << 6)
2380 * Search EDID for CEA extension block.
2382 static u8 *drm_find_cea_extension(struct edid *edid)
2384 u8 *edid_ext = NULL;
2387 /* No EDID or EDID extensions */
2388 if (edid == NULL || edid->extensions == 0)
2391 /* Find CEA extension */
2392 for (i = 0; i < edid->extensions; i++) {
2393 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2394 if (edid_ext[0] == CEA_EXT)
2398 if (i == edid->extensions)
2405 * Calculate the alternate clock for the CEA mode
2406 * (60Hz vs. 59.94Hz etc.)
2409 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2411 unsigned int clock = cea_mode->clock;
2413 if (cea_mode->vrefresh % 6 != 0)
2417 * edid_cea_modes contains the 59.94Hz
2418 * variant for 240 and 480 line modes,
2419 * and the 60Hz variant otherwise.
2421 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2422 clock = clock * 1001 / 1000;
2424 clock = DIV_ROUND_UP(clock * 1000, 1001);
2430 * drm_match_cea_mode - look for a CEA mode matching given mode
2431 * @to_match: display mode
2433 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2436 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2440 if (!to_match->clock)
2443 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2444 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2445 unsigned int clock1, clock2;
2447 /* Check both 60Hz and 59.94Hz */
2448 clock1 = cea_mode->clock;
2449 clock2 = cea_mode_alternate_clock(cea_mode);
2451 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2452 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2453 drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2458 EXPORT_SYMBOL(drm_match_cea_mode);
2461 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2464 * It's almost like cea_mode_alternate_clock(), we just need to add an
2465 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2469 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2471 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2472 return hdmi_mode->clock;
2474 return cea_mode_alternate_clock(hdmi_mode);
2478 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2479 * @to_match: display mode
2481 * An HDMI mode is one defined in the HDMI vendor specific block.
2483 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2485 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2489 if (!to_match->clock)
2492 for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
2493 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
2494 unsigned int clock1, clock2;
2496 /* Make sure to also match alternate clocks */
2497 clock1 = hdmi_mode->clock;
2498 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2500 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2501 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2502 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2509 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2511 struct drm_device *dev = connector->dev;
2512 struct drm_display_mode *mode, *tmp;
2513 LINUX_LIST_HEAD(list);
2516 /* Don't add CEA modes if the CEA extension block is missing */
2517 if (!drm_find_cea_extension(edid))
2521 * Go through all probed modes and create a new mode
2522 * with the alternate clock for certain CEA modes.
2524 list_for_each_entry(mode, &connector->probed_modes, head) {
2525 const struct drm_display_mode *cea_mode = NULL;
2526 struct drm_display_mode *newmode;
2527 u8 mode_idx = drm_match_cea_mode(mode) - 1;
2528 unsigned int clock1, clock2;
2530 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
2531 cea_mode = &edid_cea_modes[mode_idx];
2532 clock2 = cea_mode_alternate_clock(cea_mode);
2534 mode_idx = drm_match_hdmi_mode(mode) - 1;
2535 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
2536 cea_mode = &edid_4k_modes[mode_idx];
2537 clock2 = hdmi_mode_alternate_clock(cea_mode);
2544 clock1 = cea_mode->clock;
2546 if (clock1 == clock2)
2549 if (mode->clock != clock1 && mode->clock != clock2)
2552 newmode = drm_mode_duplicate(dev, cea_mode);
2556 /* Carry over the stereo flags */
2557 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2560 * The current mode could be either variant. Make
2561 * sure to pick the "other" clock for the new mode.
2563 if (mode->clock != clock1)
2564 newmode->clock = clock1;
2566 newmode->clock = clock2;
2568 list_add_tail(&newmode->head, &list);
2571 list_for_each_entry_safe(mode, tmp, &list, head) {
2572 list_del(&mode->head);
2573 drm_mode_probed_add(connector, mode);
2580 static struct drm_display_mode *
2581 drm_display_mode_from_vic_index(struct drm_connector *connector,
2582 const u8 *video_db, u8 video_len,
2585 struct drm_device *dev = connector->dev;
2586 struct drm_display_mode *newmode;
2589 if (video_db == NULL || video_index >= video_len)
2592 /* CEA modes are numbered 1..127 */
2593 cea_mode = (video_db[video_index] & 127) - 1;
2594 if (cea_mode >= ARRAY_SIZE(edid_cea_modes))
2597 newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
2598 newmode->vrefresh = 0;
2604 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2608 for (i = 0; i < len; i++) {
2609 struct drm_display_mode *mode;
2610 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2612 drm_mode_probed_add(connector, mode);
2620 struct stereo_mandatory_mode {
2621 int width, height, vrefresh;
2625 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2626 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2627 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2629 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2631 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2632 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2633 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2634 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2635 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2639 stereo_match_mandatory(const struct drm_display_mode *mode,
2640 const struct stereo_mandatory_mode *stereo_mode)
2642 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2644 return mode->hdisplay == stereo_mode->width &&
2645 mode->vdisplay == stereo_mode->height &&
2646 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2647 drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2650 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2652 struct drm_device *dev = connector->dev;
2653 struct drm_display_mode *mode;
2654 struct list_head stereo_modes;
2657 INIT_LIST_HEAD(&stereo_modes);
2659 list_for_each_entry(mode, &connector->probed_modes, head) {
2660 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2661 const struct stereo_mandatory_mode *mandatory;
2662 struct drm_display_mode *new_mode;
2664 if (!stereo_match_mandatory(mode,
2665 &stereo_mandatory_modes[i]))
2668 mandatory = &stereo_mandatory_modes[i];
2669 new_mode = drm_mode_duplicate(dev, mode);
2673 new_mode->flags |= mandatory->flags;
2674 list_add_tail(&new_mode->head, &stereo_modes);
2679 list_splice_tail(&stereo_modes, &connector->probed_modes);
2684 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2686 struct drm_device *dev = connector->dev;
2687 struct drm_display_mode *newmode;
2689 vic--; /* VICs start at 1 */
2690 if (vic >= ARRAY_SIZE(edid_4k_modes)) {
2691 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2695 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2699 drm_mode_probed_add(connector, newmode);
2704 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2705 const u8 *video_db, u8 video_len, u8 video_index)
2707 struct drm_display_mode *newmode;
2710 if (structure & (1 << 0)) {
2711 newmode = drm_display_mode_from_vic_index(connector, video_db,
2715 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2716 drm_mode_probed_add(connector, newmode);
2720 if (structure & (1 << 6)) {
2721 newmode = drm_display_mode_from_vic_index(connector, video_db,
2725 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2726 drm_mode_probed_add(connector, newmode);
2730 if (structure & (1 << 8)) {
2731 newmode = drm_display_mode_from_vic_index(connector, video_db,
2735 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2736 drm_mode_probed_add(connector, newmode);
2745 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2746 * @connector: connector corresponding to the HDMI sink
2747 * @db: start of the CEA vendor specific block
2748 * @len: length of the CEA block payload, ie. one can access up to db[len]
2750 * Parses the HDMI VSDB looking for modes to add to @connector. This function
2751 * also adds the stereo 3d modes when applicable.
2754 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
2755 const u8 *video_db, u8 video_len)
2757 int modes = 0, offset = 0, i, multi_present = 0, multi_len;
2758 u8 vic_len, hdmi_3d_len = 0;
2765 /* no HDMI_Video_Present */
2766 if (!(db[8] & (1 << 5)))
2769 /* Latency_Fields_Present */
2770 if (db[8] & (1 << 7))
2773 /* I_Latency_Fields_Present */
2774 if (db[8] & (1 << 6))
2777 /* the declared length is not long enough for the 2 first bytes
2778 * of additional video format capabilities */
2779 if (len < (8 + offset + 2))
2784 if (db[8 + offset] & (1 << 7)) {
2785 modes += add_hdmi_mandatory_stereo_modes(connector);
2787 /* 3D_Multi_present */
2788 multi_present = (db[8 + offset] & 0x60) >> 5;
2792 vic_len = db[8 + offset] >> 5;
2793 hdmi_3d_len = db[8 + offset] & 0x1f;
2795 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
2798 vic = db[9 + offset + i];
2799 modes += add_hdmi_mode(connector, vic);
2801 offset += 1 + vic_len;
2803 if (multi_present == 1)
2805 else if (multi_present == 2)
2810 if (len < (8 + offset + hdmi_3d_len - 1))
2813 if (hdmi_3d_len < multi_len)
2816 if (multi_present == 1 || multi_present == 2) {
2817 /* 3D_Structure_ALL */
2818 structure_all = (db[8 + offset] << 8) | db[9 + offset];
2820 /* check if 3D_MASK is present */
2821 if (multi_present == 2)
2822 mask = (db[10 + offset] << 8) | db[11 + offset];
2826 for (i = 0; i < 16; i++) {
2827 if (mask & (1 << i))
2828 modes += add_3d_struct_modes(connector,
2835 offset += multi_len;
2837 for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
2839 struct drm_display_mode *newmode = NULL;
2840 unsigned int newflag = 0;
2841 bool detail_present;
2843 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
2845 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
2848 /* 2D_VIC_order_X */
2849 vic_index = db[8 + offset + i] >> 4;
2851 /* 3D_Structure_X */
2852 switch (db[8 + offset + i] & 0x0f) {
2854 newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
2857 newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2861 if ((db[9 + offset + i] >> 4) == 1)
2862 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2867 newmode = drm_display_mode_from_vic_index(connector,
2873 newmode->flags |= newflag;
2874 drm_mode_probed_add(connector, newmode);
2888 cea_db_payload_len(const u8 *db)
2890 return db[0] & 0x1f;
2894 cea_db_tag(const u8 *db)
2900 cea_revision(const u8 *cea)
2906 cea_db_offsets(const u8 *cea, int *start, int *end)
2908 /* Data block offset in CEA extension block */
2913 if (*end < 4 || *end > 127)
2918 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2922 if (cea_db_tag(db) != VENDOR_BLOCK)
2925 if (cea_db_payload_len(db) < 5)
2928 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
2930 return hdmi_id == HDMI_IEEE_OUI;
2933 #define for_each_cea_db(cea, i, start, end) \
2934 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
2937 add_cea_modes(struct drm_connector *connector, struct edid *edid)
2939 const u8 *cea = drm_find_cea_extension(edid);
2940 const u8 *db, *hdmi = NULL, *video = NULL;
2941 u8 dbl, hdmi_len, video_len = 0;
2944 if (cea && cea_revision(cea) >= 3) {
2947 if (cea_db_offsets(cea, &start, &end))
2950 for_each_cea_db(cea, i, start, end) {
2952 dbl = cea_db_payload_len(db);
2954 if (cea_db_tag(db) == VIDEO_BLOCK) {
2957 modes += do_cea_modes(connector, video, dbl);
2959 else if (cea_db_is_hdmi_vsdb(db)) {
2967 * We parse the HDMI VSDB after having added the cea modes as we will
2968 * be patching their flags when the sink supports stereo 3D.
2971 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
2978 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
2980 u8 len = cea_db_payload_len(db);
2983 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
2984 connector->dvi_dual = db[6] & 1;
2987 connector->max_tmds_clock = db[7] * 5;
2989 connector->latency_present[0] = db[8] >> 7;
2990 connector->latency_present[1] = (db[8] >> 6) & 1;
2993 connector->video_latency[0] = db[9];
2995 connector->audio_latency[0] = db[10];
2997 connector->video_latency[1] = db[11];
2999 connector->audio_latency[1] = db[12];
3001 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3002 "max TMDS clock %d, "
3003 "latency present %d %d, "
3004 "video latency %d %d, "
3005 "audio latency %d %d\n",
3006 connector->dvi_dual,
3007 connector->max_tmds_clock,
3008 (int) connector->latency_present[0],
3009 (int) connector->latency_present[1],
3010 connector->video_latency[0],
3011 connector->video_latency[1],
3012 connector->audio_latency[0],
3013 connector->audio_latency[1]);
3017 monitor_name(struct detailed_timing *t, void *data)
3019 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3020 *(u8 **)data = t->data.other_data.data.str.str;
3024 * drm_edid_to_eld - build ELD from EDID
3025 * @connector: connector corresponding to the HDMI/DP sink
3026 * @edid: EDID to parse
3028 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
3029 * Some ELD fields are left to the graphics driver caller:
3034 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3036 uint8_t *eld = connector->eld;
3044 memset(eld, 0, sizeof(connector->eld));
3046 cea = drm_find_cea_extension(edid);
3048 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3053 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
3054 for (mnl = 0; name && mnl < 13; mnl++) {
3055 if (name[mnl] == 0x0a)
3057 eld[20 + mnl] = name[mnl];
3059 eld[4] = (cea[1] << 5) | mnl;
3060 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3062 eld[0] = 2 << 3; /* ELD version: 2 */
3064 eld[16] = edid->mfg_id[0];
3065 eld[17] = edid->mfg_id[1];
3066 eld[18] = edid->prod_code[0];
3067 eld[19] = edid->prod_code[1];
3069 if (cea_revision(cea) >= 3) {
3072 if (cea_db_offsets(cea, &start, &end)) {
3077 for_each_cea_db(cea, i, start, end) {
3079 dbl = cea_db_payload_len(db);
3081 switch (cea_db_tag(db)) {
3083 /* Audio Data Block, contains SADs */
3084 sad_count = dbl / 3;
3086 memcpy(eld + 20 + mnl, &db[1], dbl);
3089 /* Speaker Allocation Data Block */
3094 /* HDMI Vendor-Specific Data Block */
3095 if (cea_db_is_hdmi_vsdb(db))
3096 parse_hdmi_vsdb(connector, db);
3103 eld[5] |= sad_count << 4;
3104 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
3106 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
3108 EXPORT_SYMBOL(drm_edid_to_eld);
3111 * drm_edid_to_sad - extracts SADs from EDID
3112 * @edid: EDID to parse
3113 * @sads: pointer that will be set to the extracted SADs
3115 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3116 * Note: returned pointer needs to be kfreed
3118 * Return number of found SADs or negative number on error.
3120 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3123 int i, start, end, dbl;
3126 cea = drm_find_cea_extension(edid);
3128 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3132 if (cea_revision(cea) < 3) {
3133 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3137 if (cea_db_offsets(cea, &start, &end)) {
3138 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3142 for_each_cea_db(cea, i, start, end) {
3145 if (cea_db_tag(db) == AUDIO_BLOCK) {
3147 dbl = cea_db_payload_len(db);
3149 count = dbl / 3; /* SAD is 3B */
3150 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3153 for (j = 0; j < count; j++) {
3154 u8 *sad = &db[1 + j * 3];
3156 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3157 (*sads)[j].channels = sad[0] & 0x7;
3158 (*sads)[j].freq = sad[1] & 0x7F;
3159 (*sads)[j].byte2 = sad[2];
3167 EXPORT_SYMBOL(drm_edid_to_sad);
3170 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3171 * @edid: EDID to parse
3172 * @sadb: pointer to the speaker block
3174 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3175 * Note: returned pointer needs to be kfreed
3177 * Return number of found Speaker Allocation Blocks or negative number on error.
3179 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3182 int i, start, end, dbl;
3185 cea = drm_find_cea_extension(edid);
3187 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3191 if (cea_revision(cea) < 3) {
3192 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3196 if (cea_db_offsets(cea, &start, &end)) {
3197 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3201 for_each_cea_db(cea, i, start, end) {
3202 const u8 *db = &cea[i];
3204 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3205 dbl = cea_db_payload_len(db);
3207 /* Speaker Allocation Data Block */
3209 *sadb = kmalloc(dbl, M_DRM, M_WAITOK);
3210 memcpy(*sadb, &db[1], dbl);
3219 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3222 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
3223 * @connector: connector associated with the HDMI/DP sink
3224 * @mode: the display mode
3226 int drm_av_sync_delay(struct drm_connector *connector,
3227 struct drm_display_mode *mode)
3229 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3232 if (!connector->latency_present[0])
3234 if (!connector->latency_present[1])
3237 a = connector->audio_latency[i];
3238 v = connector->video_latency[i];
3241 * HDMI/DP sink doesn't support audio or video?
3243 if (a == 255 || v == 255)
3247 * Convert raw EDID values to millisecond.
3248 * Treat unknown latency as 0ms.
3251 a = min(2 * (a - 1), 500);
3253 v = min(2 * (v - 1), 500);
3255 return max(v - a, 0);
3257 EXPORT_SYMBOL(drm_av_sync_delay);
3260 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3261 * @encoder: the encoder just changed display mode
3262 * @mode: the adjusted display mode
3264 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3265 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3267 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
3268 struct drm_display_mode *mode)
3270 struct drm_connector *connector;
3271 struct drm_device *dev = encoder->dev;
3273 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
3274 if (connector->encoder == encoder && connector->eld[0])
3279 EXPORT_SYMBOL(drm_select_eld);
3282 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
3283 * @edid: monitor EDID information
3285 * Parse the CEA extension according to CEA-861-B.
3286 * Return true if HDMI, false if not or unknown.
3288 bool drm_detect_hdmi_monitor(struct edid *edid)
3292 int start_offset, end_offset;
3294 edid_ext = drm_find_cea_extension(edid);
3298 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3302 * Because HDMI identifier is in Vendor Specific Block,
3303 * search it from all data blocks of CEA extension.
3305 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3306 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3312 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3315 * drm_detect_monitor_audio - check monitor audio capability
3317 * Monitor should have CEA extension block.
3318 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3319 * audio' only. If there is any audio extension block and supported
3320 * audio format, assume at least 'basic audio' support, even if 'basic
3321 * audio' is not defined in EDID.
3324 bool drm_detect_monitor_audio(struct edid *edid)
3328 bool has_audio = false;
3329 int start_offset, end_offset;
3331 edid_ext = drm_find_cea_extension(edid);
3335 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3338 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3342 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3345 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3346 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3348 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3349 DRM_DEBUG_KMS("CEA audio format %d\n",
3350 (edid_ext[i + j] >> 3) & 0xf);
3357 EXPORT_SYMBOL(drm_detect_monitor_audio);
3360 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3362 * Check whether the monitor reports the RGB quantization range selection
3363 * as supported. The AVI infoframe can then be used to inform the monitor
3364 * which quantization range (full or limited) is used.
3366 bool drm_rgb_quant_range_selectable(struct edid *edid)
3371 edid_ext = drm_find_cea_extension(edid);
3375 if (cea_db_offsets(edid_ext, &start, &end))
3378 for_each_cea_db(edid_ext, i, start, end) {
3379 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3380 cea_db_payload_len(&edid_ext[i]) == 2) {
3381 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3382 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3388 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3391 * drm_add_display_info - pull display info out if present
3393 * @info: display info (attached to connector)
3395 * Grab any available display info and stuff it into the drm_display_info
3396 * structure that's part of the connector. Useful for tracking bpp and
3399 static void drm_add_display_info(struct edid *edid,
3400 struct drm_display_info *info)
3404 info->width_mm = edid->width_cm * 10;
3405 info->height_mm = edid->height_cm * 10;
3407 /* driver figures it out in this case */
3409 info->color_formats = 0;
3411 if (edid->revision < 3)
3414 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3417 /* Get data from CEA blocks if present */
3418 edid_ext = drm_find_cea_extension(edid);
3420 info->cea_rev = edid_ext[1];
3422 /* The existence of a CEA block should imply RGB support */
3423 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3424 if (edid_ext[3] & EDID_CEA_YCRCB444)
3425 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3426 if (edid_ext[3] & EDID_CEA_YCRCB422)
3427 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3430 /* Only defined for 1.4 with digital displays */
3431 if (edid->revision < 4)
3434 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3435 case DRM_EDID_DIGITAL_DEPTH_6:
3438 case DRM_EDID_DIGITAL_DEPTH_8:
3441 case DRM_EDID_DIGITAL_DEPTH_10:
3444 case DRM_EDID_DIGITAL_DEPTH_12:
3447 case DRM_EDID_DIGITAL_DEPTH_14:
3450 case DRM_EDID_DIGITAL_DEPTH_16:
3453 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3459 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3460 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3461 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3462 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3463 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3467 * drm_add_edid_modes - add modes from EDID data, if available
3468 * @connector: connector we're probing
3471 * Add the specified modes to the connector's mode list.
3473 * Return number of modes added or 0 if we couldn't find any.
3475 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
3483 if (!drm_edid_is_valid(edid)) {
3484 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
3485 drm_get_connector_name(connector));
3489 quirks = edid_get_quirks(edid);
3492 * EDID spec says modes should be preferred in this order:
3493 * - preferred detailed mode
3494 * - other detailed modes from base block
3495 * - detailed modes from extension blocks
3496 * - CVT 3-byte code modes
3497 * - standard timing codes
3498 * - established timing codes
3499 * - modes inferred from GTF or CVT range information
3501 * We get this pretty much right.
3503 * XXX order for additional mode types in extension blocks?
3505 num_modes += add_detailed_modes(connector, edid, quirks);
3506 num_modes += add_cvt_modes(connector, edid);
3507 num_modes += add_standard_modes(connector, edid);
3508 num_modes += add_established_modes(connector, edid);
3509 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
3510 num_modes += add_inferred_modes(connector, edid);
3511 num_modes += add_cea_modes(connector, edid);
3512 num_modes += add_alternate_cea_modes(connector, edid);
3514 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
3515 edid_fixup_preferred(connector, quirks);
3517 drm_add_display_info(edid, &connector->display_info);
3519 if (quirks & EDID_QUIRK_FORCE_8BPC)
3520 connector->display_info.bpc = 8;
3524 EXPORT_SYMBOL(drm_add_edid_modes);
3527 * drm_add_modes_noedid - add modes for the connectors without EDID
3528 * @connector: connector we're probing
3529 * @hdisplay: the horizontal display limit
3530 * @vdisplay: the vertical display limit
3532 * Add the specified modes to the connector's mode list. Only when the
3533 * hdisplay/vdisplay is not beyond the given limit, it will be added.
3535 * Return number of modes added or 0 if we couldn't find any.
3537 int drm_add_modes_noedid(struct drm_connector *connector,
3538 int hdisplay, int vdisplay)
3540 int i, count, num_modes = 0;
3541 struct drm_display_mode *mode;
3542 struct drm_device *dev = connector->dev;
3544 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
3550 for (i = 0; i < count; i++) {
3551 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3552 if (hdisplay && vdisplay) {
3554 * Only when two are valid, they will be used to check
3555 * whether the mode should be added to the mode list of
3558 if (ptr->hdisplay > hdisplay ||
3559 ptr->vdisplay > vdisplay)
3562 if (drm_mode_vrefresh(ptr) > 61)
3564 mode = drm_mode_duplicate(dev, ptr);
3566 drm_mode_probed_add(connector, mode);
3572 EXPORT_SYMBOL(drm_add_modes_noedid);
3574 void drm_set_preferred_mode(struct drm_connector *connector,
3575 int hpref, int vpref)
3577 struct drm_display_mode *mode;
3579 list_for_each_entry(mode, &connector->probed_modes, head) {
3580 if (drm_mode_width(mode) == hpref &&
3581 drm_mode_height(mode) == vpref)
3582 mode->type |= DRM_MODE_TYPE_PREFERRED;
3585 EXPORT_SYMBOL(drm_set_preferred_mode);
3588 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3589 * data from a DRM display mode
3590 * @frame: HDMI AVI infoframe
3591 * @mode: DRM display mode
3593 * Returns 0 on success or a negative error code on failure.
3596 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3597 const struct drm_display_mode *mode)
3601 if (!frame || !mode)
3604 err = hdmi_avi_infoframe_init(frame);
3608 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
3609 frame->pixel_repeat = 1;
3611 frame->video_code = drm_match_cea_mode(mode);
3613 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3614 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3618 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
3620 static enum hdmi_3d_structure
3621 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
3623 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
3626 case DRM_MODE_FLAG_3D_FRAME_PACKING:
3627 return HDMI_3D_STRUCTURE_FRAME_PACKING;
3628 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
3629 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
3630 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
3631 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
3632 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
3633 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
3634 case DRM_MODE_FLAG_3D_L_DEPTH:
3635 return HDMI_3D_STRUCTURE_L_DEPTH;
3636 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
3637 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
3638 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
3639 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
3640 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
3641 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
3643 return HDMI_3D_STRUCTURE_INVALID;
3648 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3649 * data from a DRM display mode
3650 * @frame: HDMI vendor infoframe
3651 * @mode: DRM display mode
3653 * Note that there's is a need to send HDMI vendor infoframes only when using a
3654 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3655 * function will return -EINVAL, error that can be safely ignored.
3657 * Returns 0 on success or a negative error code on failure.
3660 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
3661 const struct drm_display_mode *mode)
3667 if (!frame || !mode)
3670 vic = drm_match_hdmi_mode(mode);
3671 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
3673 if (!vic && !s3d_flags)
3676 if (vic && s3d_flags)
3679 err = hdmi_vendor_infoframe_init(frame);
3686 frame->s3d_struct = s3d_structure_from_display_mode(mode);
3690 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);