2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.40 2003/10/25 17:36:22 dillon Exp $
43 #include "use_ether.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_user_ldt.h"
58 #include "opt_userconfig.h"
60 #include <sys/param.h>
61 #include <sys/systm.h>
62 #include <sys/sysproto.h>
63 #include <sys/signalvar.h>
64 #include <sys/kernel.h>
65 #include <sys/linker.h>
66 #include <sys/malloc.h>
69 #include <sys/reboot.h>
70 #include <sys/callout.h>
72 #include <sys/msgbuf.h>
73 #include <sys/sysent.h>
74 #include <sys/sysctl.h>
75 #include <sys/vmmeter.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
96 #include <machine/cpu.h>
97 #include <machine/reg.h>
98 #include <machine/clock.h>
99 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
101 #include <machine/ipl.h>
102 #include <machine/md_var.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
106 #include <machine/smp.h>
109 #include <machine/perfmon.h>
111 #include <machine/cputypes.h>
114 #include <bus/isa/i386/isa_device.h>
116 #include <i386/isa/intr_machdep.h>
117 #include <bus/isa/rtc.h>
118 #include <machine/vm86.h>
119 #include <sys/random.h>
120 #include <sys/ptrace.h>
121 #include <machine/sigframe.h>
123 extern void init386 (int first);
124 extern void dblfault_handler (void);
126 extern void printcpuinfo(void); /* XXX header file */
127 extern void finishidentcpu(void);
128 extern void panicifcpuunsupported(void);
129 extern void initializecpu(void);
131 static void cpu_startup (void *);
132 #ifndef CPU_DISABLE_SSE
133 static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134 static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
135 #endif /* CPU_DISABLE_SSE */
137 extern void ffs_rawread_setup(void);
138 #endif /* DIRECTIO */
139 static void init_locks(void);
141 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
143 static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
145 int _udatasel, _ucodesel;
148 #if defined(SWTCH_OPTIM_STATS)
149 extern int swtch_optim_stats;
150 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
157 static int ispc98 = 1;
159 static int ispc98 = 0;
161 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
167 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
173 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
177 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
179 int error = sysctl_handle_int(oidp, 0,
180 ctob(physmem - vmstats.v_wire_count), req);
184 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
188 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
195 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
199 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
216 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
219 static int msgbuf_clear;
222 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
236 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
240 int bootverbose = 0, Maxmem = 0;
243 vm_offset_t phys_avail[10];
245 /* must be 2 less so 0 0 can signal end of chunks */
246 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
248 static vm_offset_t buffer_sva, buffer_eva;
249 vm_offset_t clean_sva, clean_eva;
250 static vm_offset_t pager_sva, pager_eva;
251 static struct trapframe proc0_tf;
264 if (boothowto & RB_VERBOSE)
268 * Good {morning,afternoon,evening,night}.
270 printf("%s", version);
273 panicifcpuunsupported();
277 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
279 * Display any holes after the first chunk of extended memory.
284 printf("Physical memory chunk(s):\n");
285 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
286 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx];
288 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
289 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
295 * Calculate callout wheel size
297 for (callwheelsize = 1, callwheelbits = 0;
298 callwheelsize < ncallout;
299 callwheelsize <<= 1, ++callwheelbits)
301 callwheelmask = callwheelsize - 1;
304 * Allocate space for system data structures.
305 * The first available kernel virtual address is in "v".
306 * As pages of kernel virtual memory are allocated, "v" is incremented.
307 * As pages of memory are allocated and cleared,
308 * "firstaddr" is incremented.
309 * An index into the kernel page table corresponding to the
310 * virtual memory address maintained in "v" is kept in "mapaddr".
314 * Make two passes. The first pass calculates how much memory is
315 * needed and allocates it. The second pass assigns virtual
316 * addresses to the various data structures.
320 v = (caddr_t)firstaddr;
322 #define valloc(name, type, num) \
323 (name) = (type *)v; v = (caddr_t)((name)+(num))
324 #define valloclim(name, type, num, lim) \
325 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
327 valloc(callout, struct callout, ncallout);
328 valloc(callwheel, struct callout_tailq, callwheelsize);
331 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
332 * For the first 64MB of ram nominally allocate sufficient buffers to
333 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
334 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
335 * the buffer cache we limit the eventual kva reservation to
338 * factor represents the 1/4 x ram conversion.
341 int factor = 4 * BKVASIZE / 1024;
342 int kbytes = physmem * (PAGE_SIZE / 1024);
346 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
348 nbuf += (kbytes - 65536) * 2 / (factor * 5);
349 if (maxbcache && nbuf > maxbcache / BKVASIZE)
350 nbuf = maxbcache / BKVASIZE;
354 * Do not allow the buffer_map to be more then 1/2 the size of the
357 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
359 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
361 printf("Warning: nbufs capped at %d\n", nbuf);
364 nswbuf = max(min(nbuf/4, 256), 16);
366 if (nswbuf < NSWBUF_MIN)
373 valloc(swbuf, struct buf, nswbuf);
374 valloc(buf, struct buf, nbuf);
378 * End of first pass, size has been calculated so allocate memory
380 if (firstaddr == 0) {
381 size = (vm_size_t)(v - firstaddr);
382 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
384 panic("startup: no room for tables");
389 * End of second pass, addresses have been assigned
391 if ((vm_size_t)(v - firstaddr) != size)
392 panic("startup: table size inconsistency");
394 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
395 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
396 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
398 buffer_map->system_map = 1;
399 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
400 (nswbuf*MAXPHYS) + pager_map_size);
401 pager_map->system_map = 1;
402 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
403 (16*(ARG_MAX+(PAGE_SIZE*3))));
406 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
407 * we use the more space efficient malloc in place of kmem_alloc.
410 vm_offset_t mb_map_size;
412 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
413 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
414 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
415 bzero(mclrefcnt, mb_map_size / MCLBYTES);
416 mb_map = kmem_suballoc(kernel_map, (vm_offset_t *)&mbutl,
417 &maxaddr, mb_map_size);
418 mb_map->system_map = 1;
422 * Initialize callouts
424 SLIST_INIT(&callfree);
425 for (i = 0; i < ncallout; i++) {
426 callout_init(&callout[i]);
427 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
428 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
431 for (i = 0; i < callwheelsize; i++) {
432 TAILQ_INIT(&callwheel[i]);
435 #if defined(USERCONFIG)
437 cninit(); /* the preferred console may have changed */
440 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
441 ptoa(vmstats.v_free_count) / 1024);
444 * Set up buffers, so they can be used to read disk labels.
447 vm_pager_bufferinit();
451 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
453 mp_start(); /* fire up the APs and APICs */
460 * Send an interrupt to process.
462 * Stack is set up to allow sigcode stored
463 * at top to call routine, followed by kcall
464 * to sigreturn routine below. After sigreturn
465 * resets the signal mask, the stack, and the
466 * frame pointer, it returns to the user
470 sendsig(catcher, sig, mask, code)
476 struct proc *p = curproc;
477 struct trapframe *regs;
478 struct sigacts *psp = p->p_sigacts;
479 struct sigframe sf, *sfp;
482 regs = p->p_md.md_regs;
483 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
485 /* save user context */
486 bzero(&sf, sizeof(struct sigframe));
487 sf.sf_uc.uc_sigmask = *mask;
488 sf.sf_uc.uc_stack = p->p_sigstk;
489 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
490 sf.sf_uc.uc_mcontext.mc_gs = rgs();
491 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
493 /* Allocate and validate space for the signal handler context. */
494 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
495 SIGISMEMBER(psp->ps_sigonstack, sig)) {
496 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
497 p->p_sigstk.ss_size - sizeof(struct sigframe));
498 p->p_sigstk.ss_flags |= SS_ONSTACK;
501 sfp = (struct sigframe *)regs->tf_esp - 1;
503 /* Translate the signal is appropriate */
504 if (p->p_sysent->sv_sigtbl) {
505 if (sig <= p->p_sysent->sv_sigsize)
506 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
509 /* Build the argument list for the signal handler. */
511 sf.sf_ucontext = (register_t)&sfp->sf_uc;
512 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
513 /* Signal handler installed with SA_SIGINFO. */
514 sf.sf_siginfo = (register_t)&sfp->sf_si;
515 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
517 /* fill siginfo structure */
518 sf.sf_si.si_signo = sig;
519 sf.sf_si.si_code = code;
520 sf.sf_si.si_addr = (void*)regs->tf_err;
523 /* Old FreeBSD-style arguments. */
524 sf.sf_siginfo = code;
525 sf.sf_addr = regs->tf_err;
526 sf.sf_ahu.sf_handler = catcher;
530 * If we're a vm86 process, we want to save the segment registers.
531 * We also change eflags to be our emulated eflags, not the actual
534 if (regs->tf_eflags & PSL_VM) {
535 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
536 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
538 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
539 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
540 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
541 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
543 if (vm86->vm86_has_vme == 0)
544 sf.sf_uc.uc_mcontext.mc_eflags =
545 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
546 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
549 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
550 * syscalls made by the signal handler. This just avoids
551 * wasting time for our lazy fixup of such faults. PSL_NT
552 * does nothing in vm86 mode, but vm86 programs can set it
553 * almost legitimately in probes for old cpu types.
555 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
559 * Copy the sigframe out to the user's stack.
561 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
563 * Something is wrong with the stack pointer.
564 * ...Kill the process.
569 regs->tf_esp = (int)sfp;
570 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
571 regs->tf_eflags &= ~PSL_T;
572 regs->tf_cs = _ucodesel;
573 regs->tf_ds = _udatasel;
574 regs->tf_es = _udatasel;
575 regs->tf_fs = _udatasel;
577 regs->tf_ss = _udatasel;
581 * sigreturn(ucontext_t *sigcntxp)
583 * System call to cleanup state after a signal
584 * has been taken. Reset signal mask and
585 * stack state from context left by sendsig (above).
586 * Return to previous pc and psl as specified by
587 * context left by sendsig. Check carefully to
588 * make sure that the user has not modified the
589 * state to gain improper privileges.
591 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
592 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
595 sigreturn(struct sigreturn_args *uap)
597 struct proc *p = curproc;
598 struct trapframe *regs;
604 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
607 regs = p->p_md.md_regs;
608 eflags = ucp->uc_mcontext.mc_eflags;
610 if (eflags & PSL_VM) {
611 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
612 struct vm86_kernel *vm86;
615 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
616 * set up the vm86 area, and we can't enter vm86 mode.
618 if (p->p_thread->td_pcb->pcb_ext == 0)
620 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
621 if (vm86->vm86_inited == 0)
624 /* go back to user mode if both flags are set */
625 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
626 trapsignal(p, SIGBUS, 0);
628 if (vm86->vm86_has_vme) {
629 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
630 (eflags & VME_USERCHANGE) | PSL_VM;
632 vm86->vm86_eflags = eflags; /* save VIF, VIP */
633 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
635 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
636 tf->tf_eflags = eflags;
637 tf->tf_vm86_ds = tf->tf_ds;
638 tf->tf_vm86_es = tf->tf_es;
639 tf->tf_vm86_fs = tf->tf_fs;
640 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
641 tf->tf_ds = _udatasel;
642 tf->tf_es = _udatasel;
643 tf->tf_fs = _udatasel;
646 * Don't allow users to change privileged or reserved flags.
649 * XXX do allow users to change the privileged flag PSL_RF.
650 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
651 * should sometimes set it there too. tf_eflags is kept in
652 * the signal context during signal handling and there is no
653 * other place to remember it, so the PSL_RF bit may be
654 * corrupted by the signal handler without us knowing.
655 * Corruption of the PSL_RF bit at worst causes one more or
656 * one less debugger trap, so allowing it is fairly harmless.
658 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
659 printf("sigreturn: eflags = 0x%x\n", eflags);
664 * Don't allow users to load a valid privileged %cs. Let the
665 * hardware check for invalid selectors, excess privilege in
666 * other selectors, invalid %eip's and invalid %esp's.
668 cs = ucp->uc_mcontext.mc_cs;
669 if (!CS_SECURE(cs)) {
670 printf("sigreturn: cs = 0x%x\n", cs);
671 trapsignal(p, SIGBUS, T_PROTFLT);
674 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
677 if (ucp->uc_mcontext.mc_onstack & 1)
678 p->p_sigstk.ss_flags |= SS_ONSTACK;
680 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
682 p->p_sigmask = ucp->uc_sigmask;
683 SIG_CANTMASK(p->p_sigmask);
688 * Machine dependent boot() routine
690 * I haven't seen anything to put here yet
691 * Possibly some stuff might be grafted back here from boot()
699 * Shutdown the CPU as much as possible
709 * cpu_idle() represents the idle LWKT. You cannot return from this function
710 * (unless you want to blow things up!). Instead we look for runnable threads
711 * and loop or halt as appropriate. Giant is not held on entry to the thread.
713 * The main loop is entered with a critical section held, we must release
714 * the critical section before doing anything else. lwkt_switch() will
715 * check for pending interrupts due to entering and exiting its own
718 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
719 * to wake a HLTed cpu up. However, there are cases where the idlethread
720 * will be entered with the possibility that no IPI will occur and in such
721 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
723 static int cpu_idle_hlt = 1;
724 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
725 &cpu_idle_hlt, 0, "Idle loop HLT enable");
730 struct thread *td = curthread;
733 KKASSERT(td->td_pri < TDPRI_CRIT);
736 * See if there are any LWKTs ready to go.
741 * If we are going to halt call splz unconditionally after
742 * CLIing to catch any interrupt races. Note that we are
743 * at SPL0 and interrupts are enabled.
745 if (cpu_idle_hlt && !lwkt_runnable() &&
746 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
748 * We must guarentee that hlt is exactly the instruction
751 __asm __volatile("cli");
753 __asm __volatile("sti; hlt");
755 td->td_flags &= ~TDF_IDLE_NOHLT;
756 __asm __volatile("sti");
762 * Clear registers on exec
765 setregs(p, entry, stack, ps_strings)
771 struct trapframe *regs = p->p_md.md_regs;
772 struct pcb *pcb = p->p_thread->td_pcb;
774 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
775 pcb->pcb_gs = _udatasel;
779 /* was i386_user_cleanup() in NetBSD */
783 bzero((char *)regs, sizeof(struct trapframe));
784 regs->tf_eip = entry;
785 regs->tf_esp = stack;
786 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
787 regs->tf_ss = _udatasel;
788 regs->tf_ds = _udatasel;
789 regs->tf_es = _udatasel;
790 regs->tf_fs = _udatasel;
791 regs->tf_cs = _ucodesel;
793 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
794 regs->tf_ebx = ps_strings;
797 * Reset the hardware debug registers if they were in use.
798 * They won't have any meaning for the newly exec'd process.
800 if (pcb->pcb_flags & PCB_DBREGS) {
807 if (pcb == curthread->td_pcb) {
809 * Clear the debug registers on the running
810 * CPU, otherwise they will end up affecting
811 * the next process we switch to.
815 pcb->pcb_flags &= ~PCB_DBREGS;
819 * Initialize the math emulator (if any) for the current process.
820 * Actually, just clear the bit that says that the emulator has
821 * been initialized. Initialization is delayed until the process
822 * traps to the emulator (if it is done at all) mainly because
823 * emulators don't provide an entry point for initialization.
825 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
828 * Arrange to trap the next npx or `fwait' instruction (see npx.c
829 * for why fwait must be trapped at least if there is an npx or an
830 * emulator). This is mainly to handle the case where npx0 is not
831 * configured, since the npx routines normally set up the trap
832 * otherwise. It should be done only at boot time, but doing it
833 * here allows modifying `npx_exists' for testing the emulator on
834 * systems with an npx.
836 load_cr0(rcr0() | CR0_MP | CR0_TS);
839 /* Initialize the npx (if any) for the current process. */
840 npxinit(__INITIAL_NPXCW__);
844 * note: linux emulator needs edx to be 0x0 on entry, which is
845 * handled in execve simply by setting the 64 bit syscall
856 cr0 |= CR0_NE; /* Done by npxinit() */
857 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
859 if (cpu_class != CPUCLASS_386)
861 cr0 |= CR0_WP | CR0_AM;
867 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
870 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
872 if (!error && req->newptr)
877 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
878 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
880 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
881 CTLFLAG_RW, &disable_rtc_set, 0, "");
883 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
884 CTLFLAG_RD, &bootinfo, bootinfo, "");
886 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
887 CTLFLAG_RW, &wall_cmos_clock, 0, "");
889 extern u_long bootdev; /* not a dev_t - encoding is different */
890 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
891 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
894 * Initialize 386 and configure to run kernel
898 * Initialize segments & interrupt table
902 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
903 static struct gate_descriptor idt0[NIDT];
904 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
905 union descriptor ldt[NLDT]; /* local descriptor table */
907 /* table descriptors - used to load tables by cpu */
908 struct region_descriptor r_gdt, r_idt;
910 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
911 extern int has_f00f_bug;
914 static struct i386tss dblfault_tss;
915 static char dblfault_stack[PAGE_SIZE];
917 extern struct user *proc0paddr;
920 /* software prototypes -- in more palatable form */
921 struct soft_segment_descriptor gdt_segs[] = {
922 /* GNULL_SEL 0 Null Descriptor */
923 { 0x0, /* segment base address */
925 0, /* segment type */
926 0, /* segment descriptor priority level */
927 0, /* segment descriptor present */
929 0, /* default 32 vs 16 bit size */
930 0 /* limit granularity (byte/page units)*/ },
931 /* GCODE_SEL 1 Code Descriptor for kernel */
932 { 0x0, /* segment base address */
933 0xfffff, /* length - all address space */
934 SDT_MEMERA, /* segment type */
935 0, /* segment descriptor priority level */
936 1, /* segment descriptor present */
938 1, /* default 32 vs 16 bit size */
939 1 /* limit granularity (byte/page units)*/ },
940 /* GDATA_SEL 2 Data Descriptor for kernel */
941 { 0x0, /* segment base address */
942 0xfffff, /* length - all address space */
943 SDT_MEMRWA, /* segment type */
944 0, /* segment descriptor priority level */
945 1, /* segment descriptor present */
947 1, /* default 32 vs 16 bit size */
948 1 /* limit granularity (byte/page units)*/ },
949 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
950 { 0x0, /* segment base address */
951 0xfffff, /* length - all address space */
952 SDT_MEMRWA, /* segment type */
953 0, /* segment descriptor priority level */
954 1, /* segment descriptor present */
956 1, /* default 32 vs 16 bit size */
957 1 /* limit granularity (byte/page units)*/ },
958 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
960 0x0, /* segment base address */
961 sizeof(struct i386tss)-1,/* length - all address space */
962 SDT_SYS386TSS, /* segment type */
963 0, /* segment descriptor priority level */
964 1, /* segment descriptor present */
966 0, /* unused - default 32 vs 16 bit size */
967 0 /* limit granularity (byte/page units)*/ },
968 /* GLDT_SEL 5 LDT Descriptor */
969 { (int) ldt, /* segment base address */
970 sizeof(ldt)-1, /* length - all address space */
971 SDT_SYSLDT, /* segment type */
972 SEL_UPL, /* segment descriptor priority level */
973 1, /* segment descriptor present */
975 0, /* unused - default 32 vs 16 bit size */
976 0 /* limit granularity (byte/page units)*/ },
977 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
978 { (int) ldt, /* segment base address */
979 (512 * sizeof(union descriptor)-1), /* length */
980 SDT_SYSLDT, /* segment type */
981 0, /* segment descriptor priority level */
982 1, /* segment descriptor present */
984 0, /* unused - default 32 vs 16 bit size */
985 0 /* limit granularity (byte/page units)*/ },
986 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
987 { 0x0, /* segment base address */
988 0x0, /* length - all address space */
989 0, /* segment type */
990 0, /* segment descriptor priority level */
991 0, /* segment descriptor present */
993 0, /* default 32 vs 16 bit size */
994 0 /* limit granularity (byte/page units)*/ },
995 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
996 { 0x400, /* segment base address */
997 0xfffff, /* length */
998 SDT_MEMRWA, /* segment type */
999 0, /* segment descriptor priority level */
1000 1, /* segment descriptor present */
1002 1, /* default 32 vs 16 bit size */
1003 1 /* limit granularity (byte/page units)*/ },
1004 /* GPANIC_SEL 9 Panic Tss Descriptor */
1005 { (int) &dblfault_tss, /* segment base address */
1006 sizeof(struct i386tss)-1,/* length - all address space */
1007 SDT_SYS386TSS, /* segment type */
1008 0, /* segment descriptor priority level */
1009 1, /* segment descriptor present */
1011 0, /* unused - default 32 vs 16 bit size */
1012 0 /* limit granularity (byte/page units)*/ },
1013 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1014 { 0, /* segment base address (overwritten) */
1015 0xfffff, /* length */
1016 SDT_MEMERA, /* segment type */
1017 0, /* segment descriptor priority level */
1018 1, /* segment descriptor present */
1020 0, /* default 32 vs 16 bit size */
1021 1 /* limit granularity (byte/page units)*/ },
1022 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1023 { 0, /* segment base address (overwritten) */
1024 0xfffff, /* length */
1025 SDT_MEMERA, /* segment type */
1026 0, /* segment descriptor priority level */
1027 1, /* segment descriptor present */
1029 0, /* default 32 vs 16 bit size */
1030 1 /* limit granularity (byte/page units)*/ },
1031 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1032 { 0, /* segment base address (overwritten) */
1033 0xfffff, /* length */
1034 SDT_MEMRWA, /* segment type */
1035 0, /* segment descriptor priority level */
1036 1, /* segment descriptor present */
1038 1, /* default 32 vs 16 bit size */
1039 1 /* limit granularity (byte/page units)*/ },
1040 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1041 { 0, /* segment base address (overwritten) */
1042 0xfffff, /* length */
1043 SDT_MEMRWA, /* segment type */
1044 0, /* segment descriptor priority level */
1045 1, /* segment descriptor present */
1047 0, /* default 32 vs 16 bit size */
1048 1 /* limit granularity (byte/page units)*/ },
1049 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1050 { 0, /* segment base address (overwritten) */
1051 0xfffff, /* length */
1052 SDT_MEMRWA, /* segment type */
1053 0, /* segment descriptor priority level */
1054 1, /* segment descriptor present */
1056 0, /* default 32 vs 16 bit size */
1057 1 /* limit granularity (byte/page units)*/ },
1060 static struct soft_segment_descriptor ldt_segs[] = {
1061 /* Null Descriptor - overwritten by call gate */
1062 { 0x0, /* segment base address */
1063 0x0, /* length - all address space */
1064 0, /* segment type */
1065 0, /* segment descriptor priority level */
1066 0, /* segment descriptor present */
1068 0, /* default 32 vs 16 bit size */
1069 0 /* limit granularity (byte/page units)*/ },
1070 /* Null Descriptor - overwritten by call gate */
1071 { 0x0, /* segment base address */
1072 0x0, /* length - all address space */
1073 0, /* segment type */
1074 0, /* segment descriptor priority level */
1075 0, /* segment descriptor present */
1077 0, /* default 32 vs 16 bit size */
1078 0 /* limit granularity (byte/page units)*/ },
1079 /* Null Descriptor - overwritten by call gate */
1080 { 0x0, /* segment base address */
1081 0x0, /* length - all address space */
1082 0, /* segment type */
1083 0, /* segment descriptor priority level */
1084 0, /* segment descriptor present */
1086 0, /* default 32 vs 16 bit size */
1087 0 /* limit granularity (byte/page units)*/ },
1088 /* Code Descriptor for user */
1089 { 0x0, /* segment base address */
1090 0xfffff, /* length - all address space */
1091 SDT_MEMERA, /* segment type */
1092 SEL_UPL, /* segment descriptor priority level */
1093 1, /* segment descriptor present */
1095 1, /* default 32 vs 16 bit size */
1096 1 /* limit granularity (byte/page units)*/ },
1097 /* Null Descriptor - overwritten by call gate */
1098 { 0x0, /* segment base address */
1099 0x0, /* length - all address space */
1100 0, /* segment type */
1101 0, /* segment descriptor priority level */
1102 0, /* segment descriptor present */
1104 0, /* default 32 vs 16 bit size */
1105 0 /* limit granularity (byte/page units)*/ },
1106 /* Data Descriptor for user */
1107 { 0x0, /* segment base address */
1108 0xfffff, /* length - all address space */
1109 SDT_MEMRWA, /* segment type */
1110 SEL_UPL, /* segment descriptor priority level */
1111 1, /* segment descriptor present */
1113 1, /* default 32 vs 16 bit size */
1114 1 /* limit granularity (byte/page units)*/ },
1118 setidt(idx, func, typ, dpl, selec)
1125 struct gate_descriptor *ip;
1128 ip->gd_looffset = (int)func;
1129 ip->gd_selector = selec;
1135 ip->gd_hioffset = ((int)func)>>16 ;
1138 #define IDTVEC(name) __CONCAT(X,name)
1141 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1142 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1143 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1144 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1145 IDTVEC(xmm), IDTVEC(syscall),
1148 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
1150 #ifdef DEBUG_INTERRUPTS
1151 extern inthand_t *Xrsvdary[256];
1156 struct segment_descriptor *sd;
1157 struct soft_segment_descriptor *ssd;
1159 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1160 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1161 ssd->ssd_type = sd->sd_type;
1162 ssd->ssd_dpl = sd->sd_dpl;
1163 ssd->ssd_p = sd->sd_p;
1164 ssd->ssd_def32 = sd->sd_def32;
1165 ssd->ssd_gran = sd->sd_gran;
1168 #define PHYSMAP_SIZE (2 * 8)
1171 * Populate the (physmap) array with base/bound pairs describing the
1172 * available physical memory in the system, then test this memory and
1173 * build the phys_avail array describing the actually-available memory.
1175 * If we cannot accurately determine the physical memory map, then use
1176 * value from the 0xE801 call, and failing that, the RTC.
1178 * Total memory size may be set by the kernel environment variable
1179 * hw.physmem or the compile-time define MAXMEM.
1182 getmemsize(int first)
1184 int i, physmap_idx, pa_indx;
1186 u_int basemem, extmem;
1187 struct vm86frame vmf;
1188 struct vm86context vmc;
1189 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1199 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1200 bzero(&vmf, sizeof(struct vm86frame));
1201 bzero(physmap, sizeof(physmap));
1205 * Some newer BIOSes has broken INT 12H implementation which cause
1206 * kernel panic immediately. In this case, we need to scan SMAP
1207 * with INT 15:E820 first, then determine base memory size.
1209 if (hasbrokenint12) {
1214 * Perform "base memory" related probes & setup
1216 vm86_intcall(0x12, &vmf);
1217 basemem = vmf.vmf_ax;
1218 if (basemem > 640) {
1219 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1225 * XXX if biosbasemem is now < 640, there is a `hole'
1226 * between the end of base memory and the start of
1227 * ISA memory. The hole may be empty or it may
1228 * contain BIOS code or data. Map it read/write so
1229 * that the BIOS can write to it. (Memory from 0 to
1230 * the physical end of the kernel is mapped read-only
1231 * to begin with and then parts of it are remapped.
1232 * The parts that aren't remapped form holes that
1233 * remain read-only and are unused by the kernel.
1234 * The base memory area is below the physical end of
1235 * the kernel and right now forms a read-only hole.
1236 * The part of it from PAGE_SIZE to
1237 * (trunc_page(biosbasemem * 1024) - 1) will be
1238 * remapped and used by the kernel later.)
1240 * This code is similar to the code used in
1241 * pmap_mapdev, but since no memory needs to be
1242 * allocated we simply change the mapping.
1244 for (pa = trunc_page(basemem * 1024);
1245 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1246 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1247 *pte = pa | PG_RW | PG_V;
1251 * if basemem != 640, map pages r/w into vm86 page table so
1252 * that the bios can scribble on it.
1254 pte = (pt_entry_t)vm86paddr;
1255 for (i = basemem / 4; i < 160; i++)
1256 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1260 * map page 1 R/W into the kernel page table so we can use it
1261 * as a buffer. The kernel will unmap this page later.
1263 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1264 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1267 * get memory map with INT 15:E820
1269 #define SMAPSIZ sizeof(*smap)
1270 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1273 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1274 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1279 vmf.vmf_eax = 0xE820;
1280 vmf.vmf_edx = SMAP_SIG;
1281 vmf.vmf_ecx = SMAPSIZ;
1282 i = vm86_datacall(0x15, &vmf, &vmc);
1283 if (i || vmf.vmf_eax != SMAP_SIG)
1285 if (boothowto & RB_VERBOSE)
1286 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1288 *(u_int32_t *)((char *)&smap->base + 4),
1289 (u_int32_t)smap->base,
1290 *(u_int32_t *)((char *)&smap->length + 4),
1291 (u_int32_t)smap->length);
1293 if (smap->type != 0x01)
1296 if (smap->length == 0)
1299 if (smap->base >= 0xffffffff) {
1300 printf("%uK of memory above 4GB ignored\n",
1301 (u_int)(smap->length / 1024));
1305 for (i = 0; i <= physmap_idx; i += 2) {
1306 if (smap->base < physmap[i + 1]) {
1307 if (boothowto & RB_VERBOSE)
1309 "Overlapping or non-montonic memory region, ignoring second region\n");
1314 if (smap->base == physmap[physmap_idx + 1]) {
1315 physmap[physmap_idx + 1] += smap->length;
1320 if (physmap_idx == PHYSMAP_SIZE) {
1322 "Too many segments in the physical address map, giving up\n");
1325 physmap[physmap_idx] = smap->base;
1326 physmap[physmap_idx + 1] = smap->base + smap->length;
1328 } while (vmf.vmf_ebx != 0);
1331 * Perform "base memory" related probes & setup based on SMAP
1334 for (i = 0; i <= physmap_idx; i += 2) {
1335 if (physmap[i] == 0x00000000) {
1336 basemem = physmap[i + 1] / 1024;
1345 if (basemem > 640) {
1346 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1351 for (pa = trunc_page(basemem * 1024);
1352 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1353 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1354 *pte = pa | PG_RW | PG_V;
1357 pte = (pt_entry_t)vm86paddr;
1358 for (i = basemem / 4; i < 160; i++)
1359 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1362 if (physmap[1] != 0)
1366 * If we failed above, try memory map with INT 15:E801
1368 vmf.vmf_ax = 0xE801;
1369 if (vm86_intcall(0x15, &vmf) == 0) {
1370 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1374 vm86_intcall(0x15, &vmf);
1375 extmem = vmf.vmf_ax;
1378 * Prefer the RTC value for extended memory.
1380 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1385 * Special hack for chipsets that still remap the 384k hole when
1386 * there's 16MB of memory - this really confuses people that
1387 * are trying to use bus mastering ISA controllers with the
1388 * "16MB limit"; they only have 16MB, but the remapping puts
1389 * them beyond the limit.
1391 * If extended memory is between 15-16MB (16-17MB phys address range),
1394 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1398 physmap[1] = basemem * 1024;
1400 physmap[physmap_idx] = 0x100000;
1401 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1405 * Now, physmap contains a map of physical memory.
1409 /* make hole for AP bootstrap code YYY */
1410 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1412 /* look for the MP hardware - needed for apic addresses */
1417 * Maxmem isn't the "maximum memory", it's one larger than the
1418 * highest page of the physical address space. It should be
1419 * called something like "Maxphyspage". We may adjust this
1420 * based on ``hw.physmem'' and the results of the memory test.
1422 Maxmem = atop(physmap[physmap_idx + 1]);
1425 Maxmem = MAXMEM / 4;
1429 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1430 * for the appropriate modifiers. This overrides MAXMEM.
1432 if ((cp = getenv("hw.physmem")) != NULL) {
1433 u_int64_t AllowMem, sanity;
1436 sanity = AllowMem = strtouq(cp, &ep, 0);
1437 if ((ep != cp) && (*ep != 0)) {
1450 AllowMem = sanity = 0;
1452 if (AllowMem < sanity)
1456 printf("Ignoring invalid memory size of '%s'\n", cp);
1458 Maxmem = atop(AllowMem);
1461 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1462 (boothowto & RB_VERBOSE))
1463 printf("Physical memory use set to %uK\n", Maxmem * 4);
1466 * If Maxmem has been increased beyond what the system has detected,
1467 * extend the last memory segment to the new limit.
1469 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1470 physmap[physmap_idx + 1] = ptoa(Maxmem);
1472 /* call pmap initialization to make new kernel address space */
1473 pmap_bootstrap(first, 0);
1476 * Size up each available chunk of physical memory.
1478 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1480 phys_avail[pa_indx++] = physmap[0];
1481 phys_avail[pa_indx] = physmap[0];
1483 pte = (pt_entry_t)vtopte(KERNBASE);
1485 pte = (pt_entry_t)CMAP1;
1489 * physmap is in bytes, so when converting to page boundaries,
1490 * round up the start address and round down the end address.
1492 for (i = 0; i <= physmap_idx; i += 2) {
1496 if (physmap[i + 1] < end)
1497 end = trunc_page(physmap[i + 1]);
1498 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1503 int *ptr = (int *)CADDR1;
1507 * block out kernel memory as not available.
1509 if (pa >= 0x100000 && pa < first)
1515 * map page into kernel: valid, read/write,non-cacheable
1517 *pte = pa | PG_V | PG_RW | PG_N;
1522 * Test for alternating 1's and 0's
1524 *(volatile int *)ptr = 0xaaaaaaaa;
1525 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1529 * Test for alternating 0's and 1's
1531 *(volatile int *)ptr = 0x55555555;
1532 if (*(volatile int *)ptr != 0x55555555) {
1538 *(volatile int *)ptr = 0xffffffff;
1539 if (*(volatile int *)ptr != 0xffffffff) {
1545 *(volatile int *)ptr = 0x0;
1546 if (*(volatile int *)ptr != 0x0) {
1550 * Restore original value.
1555 * Adjust array of valid/good pages.
1557 if (page_bad == TRUE) {
1561 * If this good page is a continuation of the
1562 * previous set of good pages, then just increase
1563 * the end pointer. Otherwise start a new chunk.
1564 * Note that "end" points one higher than end,
1565 * making the range >= start and < end.
1566 * If we're also doing a speculative memory
1567 * test and we at or past the end, bump up Maxmem
1568 * so that we keep going. The first bad page
1569 * will terminate the loop.
1571 if (phys_avail[pa_indx] == pa) {
1572 phys_avail[pa_indx] += PAGE_SIZE;
1575 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1576 printf("Too many holes in the physical address space, giving up\n");
1580 phys_avail[pa_indx++] = pa; /* start */
1581 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1591 * The last chunk must contain at least one page plus the message
1592 * buffer to avoid complicating other code (message buffer address
1593 * calculation, etc.).
1595 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1596 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1597 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1598 phys_avail[pa_indx--] = 0;
1599 phys_avail[pa_indx--] = 0;
1602 Maxmem = atop(phys_avail[pa_indx]);
1604 /* Trim off space for the message buffer. */
1605 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1607 avail_end = phys_avail[pa_indx];
1619 * 7 Device Not Available (x87)
1621 * 9 Coprocessor Segment overrun (unsupported, reserved)
1623 * 11 Segment not present
1625 * 13 General Protection
1628 * 16 x87 FP Exception pending
1629 * 17 Alignment Check
1631 * 19 SIMD floating point
1633 * 32-255 INTn/external sources
1638 struct gate_descriptor *gdp;
1639 int gsel_tss, metadata_missing, off, x;
1640 struct mdglobaldata *gd;
1643 * Prevent lowering of the ipl if we call tsleep() early.
1645 gd = &CPU_prvspace[0].mdglobaldata;
1646 bzero(gd, sizeof(*gd));
1648 gd->mi.gd_curthread = &thread0;
1650 atdevbase = ISA_HOLE_START + KERNBASE;
1652 metadata_missing = 0;
1653 if (bootinfo.bi_modulep) {
1654 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1655 preload_bootstrap_relocate(KERNBASE);
1657 metadata_missing = 1;
1659 if (bootinfo.bi_envp)
1660 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1662 /* start with one cpu */
1664 /* Init basic tunables, hz etc */
1668 * make gdt memory segments, the code segment goes up to end of the
1669 * page with etext in it, the data segment goes to the end of
1673 * XXX text protection is temporarily (?) disabled. The limit was
1674 * i386_btop(round_page(etext)) - 1.
1676 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1677 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1679 gdt_segs[GPRIV_SEL].ssd_limit =
1680 atop(sizeof(struct privatespace) - 1);
1681 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1682 gdt_segs[GPROC0_SEL].ssd_base =
1683 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1685 gd->mi.gd_prvspace = &CPU_prvspace[0];
1688 * Note: on both UP and SMP curthread must be set non-NULL
1689 * early in the boot sequence because the system assumes
1690 * that 'curthread' is never NULL.
1693 for (x = 0; x < NGDT; x++) {
1695 /* avoid overwriting db entries with APM ones */
1696 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1699 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1702 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1703 r_gdt.rd_base = (int) gdt;
1706 mi_gdinit(&gd->mi, 0);
1708 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1709 lwkt_set_comm(&thread0, "thread0");
1710 proc0.p_addr = (void *)thread0.td_kstack;
1711 proc0.p_thread = &thread0;
1712 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
1713 thread0.td_flags |= TDF_RUNNING;
1714 thread0.td_proc = &proc0;
1715 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1716 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1718 /* make ldt memory segments */
1720 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1721 * should be spelled ...MAX_USER...
1723 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1724 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1725 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1726 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1728 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1731 gd->gd_currentldt = _default_ldt;
1733 /* spinlocks and the BGL */
1737 for (x = 0; x < NIDT; x++) {
1738 #ifdef DEBUG_INTERRUPTS
1739 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1741 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1744 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1745 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1746 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1747 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1748 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1749 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1750 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1751 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1752 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1753 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1754 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1755 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1756 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1757 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1758 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1759 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1760 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1761 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1762 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1763 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1764 setidt(0x80, &IDTVEC(int0x80_syscall),
1765 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1766 setidt(0x81, &IDTVEC(int0x81_syscall),
1767 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1769 r_idt.rd_limit = sizeof(idt0) - 1;
1770 r_idt.rd_base = (int) idt;
1774 * Initialize the console before we print anything out.
1778 if (metadata_missing)
1779 printf("WARNING: loader(8) metadata is missing!\n");
1788 if (boothowto & RB_KDB)
1789 Debugger("Boot flags requested debugger");
1792 finishidentcpu(); /* Final stage of CPU initialization */
1793 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1794 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1795 initializecpu(); /* Initialize CPU registers */
1798 * make an initial tss so cpu can get interrupt stack on syscall!
1799 * The 16 bytes is to save room for a VM86 context.
1801 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1802 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
1803 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1804 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1805 gd->gd_common_tssd = *gd->gd_tss_gdt;
1806 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
1809 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1810 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1811 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1812 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1813 dblfault_tss.tss_cr3 = (int)IdlePTD;
1814 dblfault_tss.tss_eip = (int) dblfault_handler;
1815 dblfault_tss.tss_eflags = PSL_KERNEL;
1816 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1817 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1818 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1819 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1820 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1824 init_param2(physmem);
1826 /* now running on new page tables, configured,and u/iom is accessible */
1828 /* Map the message buffer. */
1829 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1830 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1832 msgbufinit(msgbufp, MSGBUF_SIZE);
1834 /* make a call gate to reenter kernel with */
1835 gdp = &ldt[LSYS5CALLS_SEL].gd;
1837 x = (int) &IDTVEC(syscall);
1838 gdp->gd_looffset = x++;
1839 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1841 gdp->gd_type = SDT_SYS386CGT;
1842 gdp->gd_dpl = SEL_UPL;
1844 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1846 /* XXX does this work? */
1847 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1848 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1850 /* transfer to user mode */
1852 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1853 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1855 /* setup proc 0's pcb */
1856 thread0.td_pcb->pcb_flags = 0;
1857 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
1858 thread0.td_pcb->pcb_ext = 0;
1859 proc0.p_md.md_regs = &proc0_tf;
1863 * Initialize machine-dependant portions of the global data structure.
1864 * Note that the global data area and cpu0's idlestack in the private
1865 * data space were allocated in locore.
1867 * Note: the idlethread's cpl is 0
1869 * WARNING! Called from early boot, 'mycpu' may not work yet.
1872 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1877 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1879 sp = gd->mi.gd_prvspace->idlestack;
1880 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
1881 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1882 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1883 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1884 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1888 globaldata_find(int cpu)
1890 KKASSERT(cpu >= 0 && cpu < ncpus);
1891 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1894 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1895 static void f00f_hack(void *unused);
1896 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
1899 f00f_hack(void *unused)
1901 struct gate_descriptor *new_idt;
1907 printf("Intel Pentium detected, installing workaround for F00F bug\n");
1909 r_idt.rd_limit = sizeof(idt0) - 1;
1911 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
1913 panic("kmem_alloc returned 0");
1914 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1915 panic("kmem_alloc returned non-page-aligned memory");
1916 /* Put the first seven entries in the lower page */
1917 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1918 bcopy(idt, new_idt, sizeof(idt0));
1919 r_idt.rd_base = (int)new_idt;
1922 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
1923 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1924 panic("vm_map_protect failed");
1927 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
1930 ptrace_set_pc(p, addr)
1934 p->p_md.md_regs->tf_eip = addr;
1939 ptrace_single_step(p)
1942 p->p_md.md_regs->tf_eflags |= PSL_T;
1946 int ptrace_read_u_check(p, addr, len)
1953 if ((vm_offset_t) (addr + len) < addr)
1955 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
1958 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
1960 if ((vm_offset_t) addr < gap)
1962 if ((vm_offset_t) (addr + len) <=
1963 (vm_offset_t) (gap + sizeof(struct trapframe)))
1968 int ptrace_write_u(p, off, data)
1973 struct trapframe frame_copy;
1975 struct trapframe *tp;
1978 * Privileged kernel state is scattered all over the user area.
1979 * Only allow write access to parts of regs and to fpregs.
1981 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
1982 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
1983 tp = p->p_md.md_regs;
1985 *(int *)((char *)&frame_copy + (off - min)) = data;
1986 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
1987 !CS_SECURE(frame_copy.tf_cs))
1989 *(int*)((char *)p->p_addr + off) = data;
1994 * The PCB is at the end of the user area YYY
1996 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
1997 min += offsetof(struct pcb, pcb_save);
1998 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
1999 *(int*)((char *)p->p_addr + off) = data;
2011 struct trapframe *tp;
2013 tp = p->p_md.md_regs;
2014 regs->r_fs = tp->tf_fs;
2015 regs->r_es = tp->tf_es;
2016 regs->r_ds = tp->tf_ds;
2017 regs->r_edi = tp->tf_edi;
2018 regs->r_esi = tp->tf_esi;
2019 regs->r_ebp = tp->tf_ebp;
2020 regs->r_ebx = tp->tf_ebx;
2021 regs->r_edx = tp->tf_edx;
2022 regs->r_ecx = tp->tf_ecx;
2023 regs->r_eax = tp->tf_eax;
2024 regs->r_eip = tp->tf_eip;
2025 regs->r_cs = tp->tf_cs;
2026 regs->r_eflags = tp->tf_eflags;
2027 regs->r_esp = tp->tf_esp;
2028 regs->r_ss = tp->tf_ss;
2029 pcb = p->p_thread->td_pcb;
2030 regs->r_gs = pcb->pcb_gs;
2040 struct trapframe *tp;
2042 tp = p->p_md.md_regs;
2043 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2044 !CS_SECURE(regs->r_cs))
2046 tp->tf_fs = regs->r_fs;
2047 tp->tf_es = regs->r_es;
2048 tp->tf_ds = regs->r_ds;
2049 tp->tf_edi = regs->r_edi;
2050 tp->tf_esi = regs->r_esi;
2051 tp->tf_ebp = regs->r_ebp;
2052 tp->tf_ebx = regs->r_ebx;
2053 tp->tf_edx = regs->r_edx;
2054 tp->tf_ecx = regs->r_ecx;
2055 tp->tf_eax = regs->r_eax;
2056 tp->tf_eip = regs->r_eip;
2057 tp->tf_cs = regs->r_cs;
2058 tp->tf_eflags = regs->r_eflags;
2059 tp->tf_esp = regs->r_esp;
2060 tp->tf_ss = regs->r_ss;
2061 pcb = p->p_thread->td_pcb;
2062 pcb->pcb_gs = regs->r_gs;
2066 #ifndef CPU_DISABLE_SSE
2068 fill_fpregs_xmm(sv_xmm, sv_87)
2069 struct savexmm *sv_xmm;
2070 struct save87 *sv_87;
2072 struct env87 *penv_87 = &sv_87->sv_env;
2073 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2076 /* FPU control/status */
2077 penv_87->en_cw = penv_xmm->en_cw;
2078 penv_87->en_sw = penv_xmm->en_sw;
2079 penv_87->en_tw = penv_xmm->en_tw;
2080 penv_87->en_fip = penv_xmm->en_fip;
2081 penv_87->en_fcs = penv_xmm->en_fcs;
2082 penv_87->en_opcode = penv_xmm->en_opcode;
2083 penv_87->en_foo = penv_xmm->en_foo;
2084 penv_87->en_fos = penv_xmm->en_fos;
2087 for (i = 0; i < 8; ++i)
2088 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2090 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2094 set_fpregs_xmm(sv_87, sv_xmm)
2095 struct save87 *sv_87;
2096 struct savexmm *sv_xmm;
2098 struct env87 *penv_87 = &sv_87->sv_env;
2099 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2102 /* FPU control/status */
2103 penv_xmm->en_cw = penv_87->en_cw;
2104 penv_xmm->en_sw = penv_87->en_sw;
2105 penv_xmm->en_tw = penv_87->en_tw;
2106 penv_xmm->en_fip = penv_87->en_fip;
2107 penv_xmm->en_fcs = penv_87->en_fcs;
2108 penv_xmm->en_opcode = penv_87->en_opcode;
2109 penv_xmm->en_foo = penv_87->en_foo;
2110 penv_xmm->en_fos = penv_87->en_fos;
2113 for (i = 0; i < 8; ++i)
2114 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2116 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2118 #endif /* CPU_DISABLE_SSE */
2121 fill_fpregs(p, fpregs)
2123 struct fpreg *fpregs;
2125 #ifndef CPU_DISABLE_SSE
2127 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
2128 (struct save87 *)fpregs);
2131 #endif /* CPU_DISABLE_SSE */
2132 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2137 set_fpregs(p, fpregs)
2139 struct fpreg *fpregs;
2141 #ifndef CPU_DISABLE_SSE
2143 set_fpregs_xmm((struct save87 *)fpregs,
2144 &p->p_thread->td_pcb->pcb_save.sv_xmm);
2147 #endif /* CPU_DISABLE_SSE */
2148 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2153 fill_dbregs(p, dbregs)
2155 struct dbreg *dbregs;
2160 dbregs->dr0 = rdr0();
2161 dbregs->dr1 = rdr1();
2162 dbregs->dr2 = rdr2();
2163 dbregs->dr3 = rdr3();
2164 dbregs->dr4 = rdr4();
2165 dbregs->dr5 = rdr5();
2166 dbregs->dr6 = rdr6();
2167 dbregs->dr7 = rdr7();
2170 pcb = p->p_thread->td_pcb;
2171 dbregs->dr0 = pcb->pcb_dr0;
2172 dbregs->dr1 = pcb->pcb_dr1;
2173 dbregs->dr2 = pcb->pcb_dr2;
2174 dbregs->dr3 = pcb->pcb_dr3;
2177 dbregs->dr6 = pcb->pcb_dr6;
2178 dbregs->dr7 = pcb->pcb_dr7;
2184 set_dbregs(p, dbregs)
2186 struct dbreg *dbregs;
2190 u_int32_t mask1, mask2;
2193 load_dr0(dbregs->dr0);
2194 load_dr1(dbregs->dr1);
2195 load_dr2(dbregs->dr2);
2196 load_dr3(dbregs->dr3);
2197 load_dr4(dbregs->dr4);
2198 load_dr5(dbregs->dr5);
2199 load_dr6(dbregs->dr6);
2200 load_dr7(dbregs->dr7);
2204 * Don't let an illegal value for dr7 get set. Specifically,
2205 * check for undefined settings. Setting these bit patterns
2206 * result in undefined behaviour and can lead to an unexpected
2209 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2210 i++, mask1 <<= 2, mask2 <<= 2)
2211 if ((dbregs->dr7 & mask1) == mask2)
2214 pcb = p->p_thread->td_pcb;
2217 * Don't let a process set a breakpoint that is not within the
2218 * process's address space. If a process could do this, it
2219 * could halt the system by setting a breakpoint in the kernel
2220 * (if ddb was enabled). Thus, we need to check to make sure
2221 * that no breakpoints are being enabled for addresses outside
2222 * process's address space, unless, perhaps, we were called by
2225 * XXX - what about when the watched area of the user's
2226 * address space is written into from within the kernel
2227 * ... wouldn't that still cause a breakpoint to be generated
2228 * from within kernel mode?
2231 if (suser_cred(p->p_ucred, 0) != 0) {
2232 if (dbregs->dr7 & 0x3) {
2233 /* dr0 is enabled */
2234 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2238 if (dbregs->dr7 & (0x3<<2)) {
2239 /* dr1 is enabled */
2240 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2244 if (dbregs->dr7 & (0x3<<4)) {
2245 /* dr2 is enabled */
2246 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2250 if (dbregs->dr7 & (0x3<<6)) {
2251 /* dr3 is enabled */
2252 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2257 pcb->pcb_dr0 = dbregs->dr0;
2258 pcb->pcb_dr1 = dbregs->dr1;
2259 pcb->pcb_dr2 = dbregs->dr2;
2260 pcb->pcb_dr3 = dbregs->dr3;
2261 pcb->pcb_dr6 = dbregs->dr6;
2262 pcb->pcb_dr7 = dbregs->dr7;
2264 pcb->pcb_flags |= PCB_DBREGS;
2271 * Return > 0 if a hardware breakpoint has been hit, and the
2272 * breakpoint was in user space. Return 0, otherwise.
2275 user_dbreg_trap(void)
2277 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2278 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2279 int nbp; /* number of breakpoints that triggered */
2280 caddr_t addr[4]; /* breakpoint addresses */
2284 if ((dr7 & 0x000000ff) == 0) {
2286 * all GE and LE bits in the dr7 register are zero,
2287 * thus the trap couldn't have been caused by the
2288 * hardware debug registers
2295 bp = dr6 & 0x0000000f;
2299 * None of the breakpoint bits are set meaning this
2300 * trap was not caused by any of the debug registers
2306 * at least one of the breakpoints were hit, check to see
2307 * which ones and if any of them are user space addresses
2311 addr[nbp++] = (caddr_t)rdr0();
2314 addr[nbp++] = (caddr_t)rdr1();
2317 addr[nbp++] = (caddr_t)rdr2();
2320 addr[nbp++] = (caddr_t)rdr3();
2323 for (i=0; i<nbp; i++) {
2325 (caddr_t)VM_MAXUSER_ADDRESS) {
2327 * addr[i] is in user space
2334 * None of the breakpoints are in user space.
2342 Debugger(const char *msg)
2344 printf("Debugger(\"%s\") called.\n", msg);
2348 #include <sys/disklabel.h>
2351 * Determine the size of the transfer, and make sure it is
2352 * within the boundaries of the partition. Adjust transfer
2353 * if needed, and signal errors or early completion.
2356 bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2358 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2359 int labelsect = lp->d_partitions[0].p_offset;
2360 int maxsz = p->p_size,
2361 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2363 /* overwriting disk label ? */
2364 /* XXX should also protect bootstrap in first 8K */
2365 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2366 #if LABELSECTOR != 0
2367 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2369 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2370 bp->b_error = EROFS;
2374 #if defined(DOSBBSECTOR) && defined(notyet)
2375 /* overwriting master boot record? */
2376 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2377 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2378 bp->b_error = EROFS;
2383 /* beyond partition? */
2384 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2385 /* if exactly at end of disk, return an EOF */
2386 if (bp->b_blkno == maxsz) {
2387 bp->b_resid = bp->b_bcount;
2390 /* or truncate if part of it fits */
2391 sz = maxsz - bp->b_blkno;
2393 bp->b_error = EINVAL;
2396 bp->b_bcount = sz << DEV_BSHIFT;
2399 bp->b_pblkno = bp->b_blkno + p->p_offset;
2403 bp->b_flags |= B_ERROR;
2410 * Provide inb() and outb() as functions. They are normally only
2411 * available as macros calling inlined functions, thus cannot be
2412 * called inside DDB.
2414 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2420 /* silence compiler warnings */
2422 void outb(u_int, u_char);
2429 * We use %%dx and not %1 here because i/o is done at %dx and not at
2430 * %edx, while gcc generates inferior code (movw instead of movl)
2431 * if we tell it to load (u_short) port.
2433 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2438 outb(u_int port, u_char data)
2442 * Use an unnecessary assignment to help gcc's register allocator.
2443 * This make a large difference for gcc-1.40 and a tiny difference
2444 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2445 * best results. gcc-2.6.0 can't handle this.
2448 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2455 #include "opt_cpu.h"
2456 #include "opt_htt.h"
2457 #include "opt_user_ldt.h"
2461 * initialize all the SMP locks
2464 /* critical region around IO APIC, apic_imen */
2465 struct spinlock imen_spinlock;
2467 /* Make FAST_INTR() routines sequential */
2468 struct spinlock fast_intr_spinlock;
2470 /* critical region for old style disable_intr/enable_intr */
2471 struct spinlock mpintr_spinlock;
2473 /* critical region around INTR() routines */
2474 struct spinlock intr_spinlock;
2476 /* lock region used by kernel profiling */
2477 struct spinlock mcount_spinlock;
2479 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2480 struct spinlock com_spinlock;
2482 /* locks kernel printfs */
2483 struct spinlock cons_spinlock;
2485 /* lock regions around the clock hardware */
2486 struct spinlock clock_spinlock;
2488 /* lock around the MP rendezvous */
2489 struct spinlock smp_rv_spinlock;
2495 * mp_lock = 0; BSP already owns the MP lock
2498 * Get the initial mp_lock with a count of 1 for the BSP.
2499 * This uses a LOGICAL cpu ID, ie BSP == 0.
2502 cpu_get_initial_mplock();
2504 spin_lock_init(&mcount_spinlock);
2505 spin_lock_init(&fast_intr_spinlock);
2506 spin_lock_init(&intr_spinlock);
2507 spin_lock_init(&mpintr_spinlock);
2508 spin_lock_init(&imen_spinlock);
2509 spin_lock_init(&smp_rv_spinlock);
2510 spin_lock_init(&com_spinlock);
2511 spin_lock_init(&clock_spinlock);
2512 spin_lock_init(&cons_spinlock);