2 * Copyright (c) 1997, 2001 Hellmuth Michaelis. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 *---------------------------------------------------------------------------
27 * i4b_ipac.h - definitions for the Siemens IPAC PSB2115 chip
28 * ==========================================================
30 * $FreeBSD: src/sys/i4b/layer1/isic/i4b_ipac.h,v 1.2.2.1 2001/08/10 14:08:38 obrien Exp $
31 * $DragonFly: src/sys/net/i4b/layer1/isic/i4b_ipac.h,v 1.2 2003/06/17 04:28:40 dillon Exp $
33 * last edit-date: [Wed Jan 24 09:10:09 2001]
35 *---------------------------------------------------------------------------
41 #define IPAC_BFIFO_LEN 64 /* 64 bytes B-channel FIFO on chip */
43 #define IPAC_HSCXA_OFF 0x00
44 #define IPAC_HSCXB_OFF 0x40
45 #define IPAC_ISAC_OFF 0x80
46 #define IPAC_IPAC_OFF 0xc0
50 #define IPAC_V11 0x01 /* IPAC Version 1.1 */
51 #define IPAC_V12 0x02 /* IPAC Version 1.2 */
54 * definitions of registers and bits for the IPAC ISDN chip.
57 typedef struct ipac_reg {
59 /* most registers can be read/written, but have different names */
60 /* so define a union with read/write names to make that clear */
64 unsigned char ipac_conf;
65 unsigned char ipac_ista;
66 unsigned char ipac_id;
67 unsigned char ipac_acfg;
68 unsigned char ipac_aoe;
69 unsigned char ipac_arx;
70 unsigned char ipac_pita1;
71 unsigned char ipac_pita2;
72 unsigned char ipac_pota1;
73 unsigned char ipac_pota2;
74 unsigned char ipac_pcfg;
75 unsigned char ipac_scfg;
76 unsigned char ipac_timr2;
79 unsigned char ipac_conf;
80 unsigned char ipac_mask;
81 unsigned char ipac_dummy;
82 unsigned char ipac_acfg;
83 unsigned char ipac_aoe;
84 unsigned char ipac_atx;
85 unsigned char ipac_pita1;
86 unsigned char ipac_pita2;
87 unsigned char ipac_pota1;
88 unsigned char ipac_pota2;
89 unsigned char ipac_pcfg;
90 unsigned char ipac_scfg;
91 unsigned char ipac_timr2;
96 #define REG_OFFSET(type, field) (int)(&(((type *)0)->field))
98 /* IPAC read registers */
100 #define IPAC_CONF REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_conf)
101 #define IPAC_ISTA REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_ista)
102 #define IPAC_ID REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_id)
103 #define IPAC_ACFG REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_acfg)
104 #define IPAC_AOE REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_aoe)
105 #define IPAC_ARX REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_arx)
106 #define IPAC_PITA1 REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_pita1)
107 #define IPAC_PITA2 REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_pita2)
108 #define IPAC_POTA1 REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_pota1)
109 #define IPAC_POTA2 REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_pota2)
110 #define IPAC_PCFG REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_pcfg)
111 #define IPAC_SCFG REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_scfg)
112 #define IPAC_TIMR2 REG_OFFSET(ipac_reg_t, ipac_rw.ipac_r.ipac_timr2)
114 /* IPAC write registers */
116 #define IPAC_MASK REG_OFFSET(ipac_reg_t, ipac_rw.ipac_w.ipac_mask)
117 #define IPAC_ATX REG_OFFSET(ipac_reg_t, ipac_rw.ipac_w.ipac_atx)
121 #define IPAC_CONF_AMP 0x80
122 #define IPAC_CONF_CFS 0x40
123 #define IPAC_CONF_TEM 0x20
124 #define IPAC_CONF_PDS 0x10
125 #define IPAC_CONF_IDH 0x08
126 #define IPAC_CONF_SGO 0x04
127 #define IPAC_CONF_ODS 0x02
128 #define IPAC_CONF_IOF 0x01
130 #define IPAC_ISTA_INT1 0x80
131 #define IPAC_ISTA_INT0 0x40
132 #define IPAC_ISTA_ICD 0x20
133 #define IPAC_ISTA_EXD 0x10
134 #define IPAC_ISTA_ICA 0x08
135 #define IPAC_ISTA_EXA 0x04
136 #define IPAC_ISTA_ICB 0x02
137 #define IPAC_ISTA_EXB 0x01
139 #define IPAC_MASK_INT1 0x80
140 #define IPAC_MASK_INT0 0x40
141 #define IPAC_MASK_ICD 0x20
142 #define IPAC_MASK_EXD 0x10
143 #define IPAC_MASK_ICA 0x08
144 #define IPAC_MASK_EXA 0x04
145 #define IPAC_MASK_ICB 0x02
146 #define IPAC_MASK_EXB 0x01
148 #define IPAC_ACFG_OD7 0x80
149 #define IPAC_ACFG_OD6 0x40
150 #define IPAC_ACFG_OD5 0x20
151 #define IPAC_ACFG_OD4 0x10
152 #define IPAC_ACFG_OD3 0x08
153 #define IPAC_ACFG_OD2 0x04
154 #define IPAC_ACFG_EL1 0x02
155 #define IPAC_ACFG_EL2 0x01
157 #define IPAC_AOE_OE7 0x80
158 #define IPAC_AOE_OE6 0x40
159 #define IPAC_AOE_OE5 0x20
160 #define IPAC_AOE_OE4 0x10
161 #define IPAC_AOE_OE3 0x08
162 #define IPAC_AOE_OE2 0x04
164 #define IPAC_ARX_AR7 0x80
165 #define IPAC_ARX_AR6 0x40
166 #define IPAC_ARX_AR5 0x20
167 #define IPAC_ARX_AR4 0x10
168 #define IPAC_ARX_AR3 0x08
169 #define IPAC_ARX_AR2 0x04
171 #define IPAC_ATX_AT7 0x80
172 #define IPAC_ATX_AT6 0x40
173 #define IPAC_ATX_AT5 0x20
174 #define IPAC_ATX_AT4 0x10
175 #define IPAC_ATX_AT3 0x08
176 #define IPAC_ATX_AT2 0x04
178 #define IPAC_PITA1_ENA 0x80
179 #define IPAC_PITA1_DUDD 0x40
181 #define IPAC_PITA2_ENA 0x80
182 #define IPAC_PITA2_DUDD 0x40
184 #define IPAC_POTA1_ENA 0x80
185 #define IPAC_POTA1_DUDD 0x40
187 #define IPAC_POTA2_ENA 0x80
188 #define IPAC_POTA2_DUDD 0x40
190 #define IPAC_PCFG_DPS 0x80
191 #define IPAC_PCFG_ACL 0x40
192 #define IPAC_PCFG_LED 0x20
193 #define IPAC_PCFG_PLD 0x10
194 #define IPAC_PCFG_FBS 0x08
195 #define IPAC_PCFG_CSL2 0x04
196 #define IPAC_PCFG_CSL1 0x02
197 #define IPAC_PCFG_CSL0 0x01
199 #define IPAC_SCFG_PRI 0x80
200 #define IPAC_SCFG_TXD 0x40
201 #define IPAC_SCFG_TLEN 0x20
203 #define IPAC_TIMR2_TMD 0x80
205 #endif /* _I4B_IPAC_H_ */