2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/hdmi.h>
32 #include <linux/i2c.h>
33 #include <linux/module.h>
35 #include <drm/drm_edid.h>
36 #include <linux/string.h>
38 #include <bus/iicbus/iic.h>
39 #include <bus/iicbus/iiconf.h>
40 #include "iicbus_if.h"
42 #define version_greater(edid, maj, min) \
43 (((edid)->version > (maj)) || \
44 ((edid)->version == (maj) && (edid)->revision > (min)))
46 #define EDID_EST_TIMINGS 16
47 #define EDID_STD_TIMINGS 8
48 #define EDID_DETAILED_TIMINGS 4
51 * EDID blocks out in the wild have a variety of bugs, try to collect
52 * them here (note that userspace may work around broken monitors first,
53 * but fixes should make their way here so that the kernel "just works"
54 * on as many displays as possible).
57 /* First detailed mode wrong, use largest 60Hz mode */
58 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
59 /* Reported 135MHz pixel clock is too high, needs adjustment */
60 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
61 /* Prefer the largest mode at 75 Hz */
62 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
63 /* Detail timing is in cm not mm */
64 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
65 /* Detailed timing descriptors have bogus size values, so just take the
66 * maximum size and use that.
68 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
69 /* Monitor forgot to set the first detailed is preferred bit. */
70 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
71 /* use +hsync +vsync for detailed mode */
72 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
73 /* Force reduced-blanking timings for detailed modes */
74 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
76 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
78 #define EDID_QUIRK_FORCE_12BPC (1 << 9)
80 struct detailed_mode_closure {
81 struct drm_connector *connector;
93 static struct edid_quirk {
97 } edid_quirk_list[] = {
99 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
101 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
103 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
105 /* Belinea 10 15 55 */
106 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
107 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
109 /* Envision Peripherals, Inc. EN-7100e */
110 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
111 /* Envision EN2028 */
112 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
114 /* Funai Electronics PM36B */
115 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
116 EDID_QUIRK_DETAILED_IN_CM },
118 /* LG Philips LCD LP154W01-A5 */
119 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
120 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
122 /* Philips 107p5 CRT */
123 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
126 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
128 /* Samsung SyncMaster 205BW. Note: irony */
129 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
130 /* Samsung SyncMaster 22[5-6]BW */
131 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
132 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
134 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
135 { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
137 /* ViewSonic VA2026w */
138 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
140 /* Medion MD 30217 PG */
141 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
143 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
144 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
148 * Autogenerated from the DMT spec.
149 * This table is copied from xfree86/modes/xf86EdidModes.c.
151 static const struct drm_display_mode drm_dmt_modes[] = {
153 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
154 736, 832, 0, 350, 382, 385, 445, 0,
155 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
157 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
158 736, 832, 0, 400, 401, 404, 445, 0,
159 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
161 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
162 828, 936, 0, 400, 401, 404, 446, 0,
163 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
165 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
166 752, 800, 0, 480, 489, 492, 525, 0,
167 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
169 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
170 704, 832, 0, 480, 489, 492, 520, 0,
171 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
173 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
174 720, 840, 0, 480, 481, 484, 500, 0,
175 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
177 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
178 752, 832, 0, 480, 481, 484, 509, 0,
179 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
181 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
182 896, 1024, 0, 600, 601, 603, 625, 0,
183 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
185 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
186 968, 1056, 0, 600, 601, 605, 628, 0,
187 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
189 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
190 976, 1040, 0, 600, 637, 643, 666, 0,
191 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
193 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
194 896, 1056, 0, 600, 601, 604, 625, 0,
195 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
197 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
198 896, 1048, 0, 600, 601, 604, 631, 0,
199 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
200 /* 800x600@120Hz RB */
201 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
202 880, 960, 0, 600, 603, 607, 636, 0,
203 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
205 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
206 976, 1088, 0, 480, 486, 494, 517, 0,
207 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
208 /* 1024x768@43Hz, interlace */
209 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
210 1208, 1264, 0, 768, 768, 772, 817, 0,
211 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
212 DRM_MODE_FLAG_INTERLACE) },
214 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
215 1184, 1344, 0, 768, 771, 777, 806, 0,
216 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
218 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
219 1184, 1328, 0, 768, 771, 777, 806, 0,
220 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
222 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
223 1136, 1312, 0, 768, 769, 772, 800, 0,
224 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
226 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
227 1168, 1376, 0, 768, 769, 772, 808, 0,
228 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
229 /* 1024x768@120Hz RB */
230 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
231 1104, 1184, 0, 768, 771, 775, 813, 0,
232 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
234 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
235 1344, 1600, 0, 864, 865, 868, 900, 0,
236 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
237 /* 1280x768@60Hz RB */
238 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
239 1360, 1440, 0, 768, 771, 778, 790, 0,
240 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
242 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
243 1472, 1664, 0, 768, 771, 778, 798, 0,
244 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
246 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
247 1488, 1696, 0, 768, 771, 778, 805, 0,
248 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
250 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
251 1496, 1712, 0, 768, 771, 778, 809, 0,
252 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
253 /* 1280x768@120Hz RB */
254 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
255 1360, 1440, 0, 768, 771, 778, 813, 0,
256 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
257 /* 1280x800@60Hz RB */
258 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
259 1360, 1440, 0, 800, 803, 809, 823, 0,
260 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
262 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
263 1480, 1680, 0, 800, 803, 809, 831, 0,
264 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
266 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
267 1488, 1696, 0, 800, 803, 809, 838, 0,
268 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
270 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
271 1496, 1712, 0, 800, 803, 809, 843, 0,
272 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
273 /* 1280x800@120Hz RB */
274 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
275 1360, 1440, 0, 800, 803, 809, 847, 0,
276 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
278 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
279 1488, 1800, 0, 960, 961, 964, 1000, 0,
280 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
282 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
283 1504, 1728, 0, 960, 961, 964, 1011, 0,
284 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
285 /* 1280x960@120Hz RB */
286 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
287 1360, 1440, 0, 960, 963, 967, 1017, 0,
288 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
290 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
291 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
292 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
294 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
295 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
296 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
298 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
299 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
300 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
301 /* 1280x1024@120Hz RB */
302 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
303 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
304 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
306 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
307 1536, 1792, 0, 768, 771, 777, 795, 0,
308 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
309 /* 1360x768@120Hz RB */
310 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
311 1440, 1520, 0, 768, 771, 776, 813, 0,
312 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
313 /* 1400x1050@60Hz RB */
314 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
315 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
316 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
318 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
319 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
320 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
322 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
323 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
324 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
326 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
327 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
328 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
329 /* 1400x1050@120Hz RB */
330 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
331 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
332 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
333 /* 1440x900@60Hz RB */
334 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
335 1520, 1600, 0, 900, 903, 909, 926, 0,
336 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
338 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
339 1672, 1904, 0, 900, 903, 909, 934, 0,
340 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
342 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
343 1688, 1936, 0, 900, 903, 909, 942, 0,
344 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
346 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
347 1696, 1952, 0, 900, 903, 909, 948, 0,
348 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
349 /* 1440x900@120Hz RB */
350 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
351 1520, 1600, 0, 900, 903, 909, 953, 0,
352 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
354 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
355 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
356 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
358 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
359 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
360 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
362 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
363 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
364 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
366 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
367 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
368 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
370 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
371 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
372 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
373 /* 1600x1200@120Hz RB */
374 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
375 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
376 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
377 /* 1680x1050@60Hz RB */
378 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
379 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
380 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
382 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
383 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
384 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
386 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
387 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
388 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
390 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
391 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
392 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
393 /* 1680x1050@120Hz RB */
394 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
395 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
396 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
398 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
399 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
400 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
402 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
403 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
404 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
405 /* 1792x1344@120Hz RB */
406 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
407 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
408 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
410 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
411 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
412 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
414 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
415 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
416 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
417 /* 1856x1392@120Hz RB */
418 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
419 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
420 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
421 /* 1920x1200@60Hz RB */
422 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
423 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
424 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
426 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
427 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
428 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
430 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
431 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
432 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
434 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
435 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
436 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
437 /* 1920x1200@120Hz RB */
438 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
439 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
440 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
442 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
443 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
444 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
446 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
447 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
448 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
449 /* 1920x1440@120Hz RB */
450 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
451 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
452 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
453 /* 2560x1600@60Hz RB */
454 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
455 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
456 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
458 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
459 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
460 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
462 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
463 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
464 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
466 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
467 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
468 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
469 /* 2560x1600@120Hz RB */
470 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
471 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
476 * These more or less come from the DMT spec. The 720x400 modes are
477 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
478 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
479 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
482 * The DMT modes have been fact-checked; the rest are mild guesses.
484 static const struct drm_display_mode edid_est_modes[] = {
485 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
486 968, 1056, 0, 600, 601, 605, 628, 0,
487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
488 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
489 896, 1024, 0, 600, 601, 603, 625, 0,
490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
491 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
492 720, 840, 0, 480, 481, 484, 500, 0,
493 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
494 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
495 704, 832, 0, 480, 489, 491, 520, 0,
496 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
497 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
498 768, 864, 0, 480, 483, 486, 525, 0,
499 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
500 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
501 752, 800, 0, 480, 490, 492, 525, 0,
502 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
503 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
504 846, 900, 0, 400, 421, 423, 449, 0,
505 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
506 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
507 846, 900, 0, 400, 412, 414, 449, 0,
508 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
509 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
510 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
512 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
513 1136, 1312, 0, 768, 769, 772, 800, 0,
514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
515 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
516 1184, 1328, 0, 768, 771, 777, 806, 0,
517 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
518 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
519 1184, 1344, 0, 768, 771, 777, 806, 0,
520 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
521 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
522 1208, 1264, 0, 768, 768, 776, 817, 0,
523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
524 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
525 928, 1152, 0, 624, 625, 628, 667, 0,
526 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
527 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
528 896, 1056, 0, 600, 601, 604, 625, 0,
529 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
530 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
531 976, 1040, 0, 600, 637, 643, 666, 0,
532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
533 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
534 1344, 1600, 0, 864, 865, 868, 900, 0,
535 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
545 static const struct minimode est3_modes[] = {
553 { 1024, 768, 85, 0 },
554 { 1152, 864, 75, 0 },
556 { 1280, 768, 60, 1 },
557 { 1280, 768, 60, 0 },
558 { 1280, 768, 75, 0 },
559 { 1280, 768, 85, 0 },
560 { 1280, 960, 60, 0 },
561 { 1280, 960, 85, 0 },
562 { 1280, 1024, 60, 0 },
563 { 1280, 1024, 85, 0 },
565 { 1360, 768, 60, 0 },
566 { 1440, 900, 60, 1 },
567 { 1440, 900, 60, 0 },
568 { 1440, 900, 75, 0 },
569 { 1440, 900, 85, 0 },
570 { 1400, 1050, 60, 1 },
571 { 1400, 1050, 60, 0 },
572 { 1400, 1050, 75, 0 },
574 { 1400, 1050, 85, 0 },
575 { 1680, 1050, 60, 1 },
576 { 1680, 1050, 60, 0 },
577 { 1680, 1050, 75, 0 },
578 { 1680, 1050, 85, 0 },
579 { 1600, 1200, 60, 0 },
580 { 1600, 1200, 65, 0 },
581 { 1600, 1200, 70, 0 },
583 { 1600, 1200, 75, 0 },
584 { 1600, 1200, 85, 0 },
585 { 1792, 1344, 60, 0 },
586 { 1792, 1344, 75, 0 },
587 { 1856, 1392, 60, 0 },
588 { 1856, 1392, 75, 0 },
589 { 1920, 1200, 60, 1 },
590 { 1920, 1200, 60, 0 },
592 { 1920, 1200, 75, 0 },
593 { 1920, 1200, 85, 0 },
594 { 1920, 1440, 60, 0 },
595 { 1920, 1440, 75, 0 },
598 static const struct minimode extra_modes[] = {
599 { 1024, 576, 60, 0 },
600 { 1366, 768, 60, 0 },
601 { 1600, 900, 60, 0 },
602 { 1680, 945, 60, 0 },
603 { 1920, 1080, 60, 0 },
604 { 2048, 1152, 60, 0 },
605 { 2048, 1536, 60, 0 },
609 * Probably taken from CEA-861 spec.
610 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
612 static const struct drm_display_mode edid_cea_modes[] = {
613 /* 1 - 640x480@60Hz */
614 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
615 752, 800, 0, 480, 490, 492, 525, 0,
616 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
617 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
618 /* 2 - 720x480@60Hz */
619 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
620 798, 858, 0, 480, 489, 495, 525, 0,
621 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
622 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
623 /* 3 - 720x480@60Hz */
624 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
625 798, 858, 0, 480, 489, 495, 525, 0,
626 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
627 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
628 /* 4 - 1280x720@60Hz */
629 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
630 1430, 1650, 0, 720, 725, 730, 750, 0,
631 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
632 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
633 /* 5 - 1920x1080i@60Hz */
634 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
635 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
636 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
637 DRM_MODE_FLAG_INTERLACE),
638 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
639 /* 6 - 720(1440)x480i@60Hz */
640 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
641 801, 858, 0, 480, 488, 494, 525, 0,
642 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
643 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
644 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
645 /* 7 - 720(1440)x480i@60Hz */
646 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
647 801, 858, 0, 480, 488, 494, 525, 0,
648 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
649 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
650 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
651 /* 8 - 720(1440)x240@60Hz */
652 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
653 801, 858, 0, 240, 244, 247, 262, 0,
654 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
655 DRM_MODE_FLAG_DBLCLK),
656 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
657 /* 9 - 720(1440)x240@60Hz */
658 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
659 801, 858, 0, 240, 244, 247, 262, 0,
660 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
661 DRM_MODE_FLAG_DBLCLK),
662 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
663 /* 10 - 2880x480i@60Hz */
664 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
665 3204, 3432, 0, 480, 488, 494, 525, 0,
666 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
667 DRM_MODE_FLAG_INTERLACE),
668 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
669 /* 11 - 2880x480i@60Hz */
670 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
671 3204, 3432, 0, 480, 488, 494, 525, 0,
672 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
673 DRM_MODE_FLAG_INTERLACE),
674 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
675 /* 12 - 2880x240@60Hz */
676 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
677 3204, 3432, 0, 240, 244, 247, 262, 0,
678 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
679 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
680 /* 13 - 2880x240@60Hz */
681 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
682 3204, 3432, 0, 240, 244, 247, 262, 0,
683 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
684 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
685 /* 14 - 1440x480@60Hz */
686 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
687 1596, 1716, 0, 480, 489, 495, 525, 0,
688 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
689 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
690 /* 15 - 1440x480@60Hz */
691 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
692 1596, 1716, 0, 480, 489, 495, 525, 0,
693 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
694 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
695 /* 16 - 1920x1080@60Hz */
696 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
697 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
698 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
699 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
700 /* 17 - 720x576@50Hz */
701 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
702 796, 864, 0, 576, 581, 586, 625, 0,
703 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
704 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
705 /* 18 - 720x576@50Hz */
706 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
707 796, 864, 0, 576, 581, 586, 625, 0,
708 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
709 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
710 /* 19 - 1280x720@50Hz */
711 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
712 1760, 1980, 0, 720, 725, 730, 750, 0,
713 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
714 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
715 /* 20 - 1920x1080i@50Hz */
716 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
717 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
718 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
719 DRM_MODE_FLAG_INTERLACE),
720 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
721 /* 21 - 720(1440)x576i@50Hz */
722 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
723 795, 864, 0, 576, 580, 586, 625, 0,
724 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
725 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
726 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
727 /* 22 - 720(1440)x576i@50Hz */
728 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
729 795, 864, 0, 576, 580, 586, 625, 0,
730 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
731 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
732 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
733 /* 23 - 720(1440)x288@50Hz */
734 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
735 795, 864, 0, 288, 290, 293, 312, 0,
736 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
737 DRM_MODE_FLAG_DBLCLK),
738 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
739 /* 24 - 720(1440)x288@50Hz */
740 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
741 795, 864, 0, 288, 290, 293, 312, 0,
742 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
743 DRM_MODE_FLAG_DBLCLK),
744 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
745 /* 25 - 2880x576i@50Hz */
746 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
747 3180, 3456, 0, 576, 580, 586, 625, 0,
748 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
749 DRM_MODE_FLAG_INTERLACE),
750 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
751 /* 26 - 2880x576i@50Hz */
752 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
753 3180, 3456, 0, 576, 580, 586, 625, 0,
754 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
755 DRM_MODE_FLAG_INTERLACE),
756 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
757 /* 27 - 2880x288@50Hz */
758 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
759 3180, 3456, 0, 288, 290, 293, 312, 0,
760 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
761 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
762 /* 28 - 2880x288@50Hz */
763 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
764 3180, 3456, 0, 288, 290, 293, 312, 0,
765 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
766 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
767 /* 29 - 1440x576@50Hz */
768 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
769 1592, 1728, 0, 576, 581, 586, 625, 0,
770 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
771 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
772 /* 30 - 1440x576@50Hz */
773 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
774 1592, 1728, 0, 576, 581, 586, 625, 0,
775 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
776 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
777 /* 31 - 1920x1080@50Hz */
778 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
779 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
780 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
781 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
782 /* 32 - 1920x1080@24Hz */
783 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
784 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
785 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
786 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
787 /* 33 - 1920x1080@25Hz */
788 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
789 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
790 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
791 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
792 /* 34 - 1920x1080@30Hz */
793 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
794 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
795 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
796 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
797 /* 35 - 2880x480@60Hz */
798 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
799 3192, 3432, 0, 480, 489, 495, 525, 0,
800 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
801 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
802 /* 36 - 2880x480@60Hz */
803 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
804 3192, 3432, 0, 480, 489, 495, 525, 0,
805 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
806 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
807 /* 37 - 2880x576@50Hz */
808 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
809 3184, 3456, 0, 576, 581, 586, 625, 0,
810 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
811 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
812 /* 38 - 2880x576@50Hz */
813 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
814 3184, 3456, 0, 576, 581, 586, 625, 0,
815 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
816 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
817 /* 39 - 1920x1080i@50Hz */
818 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
819 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
820 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
821 DRM_MODE_FLAG_INTERLACE),
822 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
823 /* 40 - 1920x1080i@100Hz */
824 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
825 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
826 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
827 DRM_MODE_FLAG_INTERLACE),
828 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
829 /* 41 - 1280x720@100Hz */
830 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
831 1760, 1980, 0, 720, 725, 730, 750, 0,
832 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
833 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
834 /* 42 - 720x576@100Hz */
835 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
836 796, 864, 0, 576, 581, 586, 625, 0,
837 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
838 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
839 /* 43 - 720x576@100Hz */
840 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
841 796, 864, 0, 576, 581, 586, 625, 0,
842 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
843 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
844 /* 44 - 720(1440)x576i@100Hz */
845 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
846 795, 864, 0, 576, 580, 586, 625, 0,
847 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
848 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
849 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
850 /* 45 - 720(1440)x576i@100Hz */
851 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
852 795, 864, 0, 576, 580, 586, 625, 0,
853 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
854 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
855 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
856 /* 46 - 1920x1080i@120Hz */
857 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
858 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
859 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
860 DRM_MODE_FLAG_INTERLACE),
861 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
862 /* 47 - 1280x720@120Hz */
863 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
864 1430, 1650, 0, 720, 725, 730, 750, 0,
865 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
866 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
867 /* 48 - 720x480@120Hz */
868 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
869 798, 858, 0, 480, 489, 495, 525, 0,
870 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
871 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
872 /* 49 - 720x480@120Hz */
873 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
874 798, 858, 0, 480, 489, 495, 525, 0,
875 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
876 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
877 /* 50 - 720(1440)x480i@120Hz */
878 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
879 801, 858, 0, 480, 488, 494, 525, 0,
880 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
881 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
882 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
883 /* 51 - 720(1440)x480i@120Hz */
884 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
885 801, 858, 0, 480, 488, 494, 525, 0,
886 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
887 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
888 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
889 /* 52 - 720x576@200Hz */
890 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
891 796, 864, 0, 576, 581, 586, 625, 0,
892 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
893 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
894 /* 53 - 720x576@200Hz */
895 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
896 796, 864, 0, 576, 581, 586, 625, 0,
897 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
898 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
899 /* 54 - 720(1440)x576i@200Hz */
900 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
901 795, 864, 0, 576, 580, 586, 625, 0,
902 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
903 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
904 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
905 /* 55 - 720(1440)x576i@200Hz */
906 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
907 795, 864, 0, 576, 580, 586, 625, 0,
908 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
909 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
910 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
911 /* 56 - 720x480@240Hz */
912 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
913 798, 858, 0, 480, 489, 495, 525, 0,
914 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
915 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
916 /* 57 - 720x480@240Hz */
917 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
918 798, 858, 0, 480, 489, 495, 525, 0,
919 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
920 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
921 /* 58 - 720(1440)x480i@240 */
922 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
923 801, 858, 0, 480, 488, 494, 525, 0,
924 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
925 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
926 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
927 /* 59 - 720(1440)x480i@240 */
928 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
929 801, 858, 0, 480, 488, 494, 525, 0,
930 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
931 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
932 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
933 /* 60 - 1280x720@24Hz */
934 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
935 3080, 3300, 0, 720, 725, 730, 750, 0,
936 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
937 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
938 /* 61 - 1280x720@25Hz */
939 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
940 3740, 3960, 0, 720, 725, 730, 750, 0,
941 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
942 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
943 /* 62 - 1280x720@30Hz */
944 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
945 3080, 3300, 0, 720, 725, 730, 750, 0,
946 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
947 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
948 /* 63 - 1920x1080@120Hz */
949 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
950 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
951 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
952 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
953 /* 64 - 1920x1080@100Hz */
954 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
955 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
956 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
957 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
963 static const struct drm_display_mode edid_4k_modes[] = {
964 /* 1 - 3840x2160@30Hz */
965 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
966 3840, 4016, 4104, 4400, 0,
967 2160, 2168, 2178, 2250, 0,
968 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
970 /* 2 - 3840x2160@25Hz */
971 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
972 3840, 4896, 4984, 5280, 0,
973 2160, 2168, 2178, 2250, 0,
974 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
976 /* 3 - 3840x2160@24Hz */
977 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
978 3840, 5116, 5204, 5500, 0,
979 2160, 2168, 2178, 2250, 0,
980 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
982 /* 4 - 4096x2160@24Hz (SMPTE) */
983 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
984 4096, 5116, 5204, 5500, 0,
985 2160, 2168, 2178, 2250, 0,
986 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
990 /*** DDC fetch and block validation ***/
992 static const u8 edid_header[] = {
993 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
997 * drm_edid_header_is_valid - sanity check the header of the base EDID block
998 * @raw_edid: pointer to raw base EDID block
1000 * Sanity check the header of the base EDID block.
1002 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1004 int drm_edid_header_is_valid(const u8 *raw_edid)
1008 for (i = 0; i < sizeof(edid_header); i++)
1009 if (raw_edid[i] == edid_header[i])
1014 EXPORT_SYMBOL(drm_edid_header_is_valid);
1016 static int edid_fixup __read_mostly = 6;
1017 module_param_named(edid_fixup, edid_fixup, int, 0400);
1018 MODULE_PARM_DESC(edid_fixup,
1019 "Minimum number of valid EDID header bytes (0-8, default 6)");
1022 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1023 * @raw_edid: pointer to raw EDID block
1024 * @block: type of block to validate (0 for base, extension otherwise)
1025 * @print_bad_edid: if true, dump bad EDID blocks to the console
1027 * Validate a base or extension EDID block and optionally dump bad blocks to
1030 * Return: True if the block is valid, false otherwise.
1032 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
1036 struct edid *edid = (struct edid *)raw_edid;
1038 if (WARN_ON(!raw_edid))
1041 if (edid_fixup > 8 || edid_fixup < 0)
1045 int score = drm_edid_header_is_valid(raw_edid);
1047 else if (score >= edid_fixup) {
1048 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1049 memcpy(raw_edid, edid_header, sizeof(edid_header));
1055 for (i = 0; i < EDID_LENGTH; i++)
1056 csum += raw_edid[i];
1058 if (print_bad_edid) {
1059 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1062 /* allow CEA to slide through, switches mangle this */
1063 if (raw_edid[0] != 0x02)
1067 /* per-block-type checks */
1068 switch (raw_edid[0]) {
1070 if (edid->version != 1) {
1071 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1075 if (edid->revision > 4)
1076 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1086 if (print_bad_edid) {
1087 printk(KERN_ERR "Raw EDID:\n");
1088 for (i = 0; i < EDID_LENGTH; ) {
1089 kprintf("%02x", raw_edid[i]);
1091 if (i % 16 == 0 || i == EDID_LENGTH)
1093 else if (i % 8 == 0)
1101 EXPORT_SYMBOL(drm_edid_block_valid);
1104 * drm_edid_is_valid - sanity check EDID data
1107 * Sanity-check an entire EDID record (including extensions)
1109 * Return: True if the EDID data is valid, false otherwise.
1111 bool drm_edid_is_valid(struct edid *edid)
1114 u8 *raw = (u8 *)edid;
1119 for (i = 0; i <= edid->extensions; i++)
1120 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1125 EXPORT_SYMBOL(drm_edid_is_valid);
1127 #define DDC_SEGMENT_ADDR 0x30
1129 * drm_do_probe_ddc_edid() - get EDID information via I2C
1130 * @adapter: I2C device adaptor
1131 * @buf: EDID data buffer to be filled
1132 * @block: 128 byte EDID block to start fetching from
1133 * @len: EDID data buffer length to fetch
1135 * Try to fetch EDID information by calling I2C driver functions.
1137 * Return: 0 on success or -1 on failure.
1140 drm_do_probe_ddc_edid(struct device *adapter, unsigned char *buf,
1143 unsigned char start = block * EDID_LENGTH;
1144 unsigned char segment = block >> 1;
1145 unsigned char xfers = segment ? 3 : 2;
1146 int ret, retries = 5;
1149 * The core I2C driver will automatically retry the transfer if the
1150 * adapter reports EAGAIN. However, we find that bit-banging transfers
1151 * are susceptible to errors under a heavily loaded machine and
1152 * generate spurious NAKs and timeouts. Retrying the transfer
1153 * of the individual block a few times seems to overcome this.
1156 struct i2c_msg msgs[] = {
1158 .slave = DDC_SEGMENT_ADDR << 1,
1163 .slave = DDC_ADDR << 1,
1168 .slave = DDC_ADDR << 1,
1176 * Avoid sending the segment addr to not upset non-compliant
1179 ret = iicbus_transfer(adapter, &msgs[3 - xfers], xfers);
1182 DRM_DEBUG_KMS("iicbus_transfer countdown %d error %d\n",
1184 } while (ret != 0 && --retries);
1186 return (ret == 0 ? 0 : -1);
1189 static bool drm_edid_is_zero(u8 *in_edid, int length)
1192 u32 *raw_edid = (u32 *)in_edid;
1194 for (i = 0; i < length / 4; i++)
1195 if (*(raw_edid + i) != 0)
1202 drm_do_get_edid(struct drm_connector *connector, struct device *adapter)
1204 int i, j = 0, valid_extensions = 0;
1206 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1208 if ((block = kmalloc(EDID_LENGTH, M_DRM, M_WAITOK)) == NULL)
1211 /* base block fetch */
1212 for (i = 0; i < 4; i++) {
1213 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
1215 if (drm_edid_block_valid(block, 0, print_bad_edid))
1217 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1218 connector->null_edid_counter++;
1225 /* if there's no extensions, we're done */
1226 if (block[0x7e] == 0)
1229 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, M_DRM, M_WAITOK);
1234 for (j = 1; j <= block[0x7e]; j++) {
1235 for (i = 0; i < 4; i++) {
1236 if (drm_do_probe_ddc_edid(adapter,
1237 block + (valid_extensions + 1) * EDID_LENGTH,
1240 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1246 if (i == 4 && print_bad_edid) {
1247 dev_warn(connector->dev->dev,
1248 "%s: Ignoring invalid EDID block %d.\n",
1249 connector->name, j);
1251 connector->bad_edid_counter++;
1255 if (valid_extensions != block[0x7e]) {
1256 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1257 block[0x7e] = valid_extensions;
1258 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, M_DRM, M_WAITOK);
1267 if (print_bad_edid) {
1268 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1269 connector->name, j);
1271 connector->bad_edid_counter++;
1279 * drm_probe_ddc() - probe DDC presence
1280 * @adapter: I2C adapter to probe
1282 * Return: True on success, false on failure.
1285 drm_probe_ddc(struct device *adapter)
1289 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1291 EXPORT_SYMBOL(drm_probe_ddc);
1294 * drm_get_edid - get EDID data, if available
1295 * @connector: connector we're probing
1296 * @adapter: I2C adapter to use for DDC
1298 * Poke the given I2C channel to grab EDID data if possible. If found,
1299 * attach it to the connector.
1301 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1303 struct edid *drm_get_edid(struct drm_connector *connector,
1304 struct device *adapter)
1306 struct edid *edid = NULL;
1308 if (drm_probe_ddc(adapter))
1309 edid = (struct edid *)drm_do_get_edid(connector, adapter);
1313 EXPORT_SYMBOL(drm_get_edid);
1316 * drm_edid_duplicate - duplicate an EDID and the extensions
1317 * @edid: EDID to duplicate
1319 * Return: Pointer to duplicated EDID or NULL on allocation failure.
1321 struct edid *drm_edid_duplicate(const struct edid *edid)
1323 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1325 EXPORT_SYMBOL(drm_edid_duplicate);
1327 /*** EDID parsing ***/
1330 * edid_vendor - match a string against EDID's obfuscated vendor field
1331 * @edid: EDID to match
1332 * @vendor: vendor string
1334 * Returns true if @vendor is in @edid, false otherwise
1336 static bool edid_vendor(struct edid *edid, char *vendor)
1338 char edid_vendor[3];
1340 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1341 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1342 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1343 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1345 return !strncmp(edid_vendor, vendor, 3);
1349 * edid_get_quirks - return quirk flags for a given EDID
1350 * @edid: EDID to process
1352 * This tells subsequent routines what fixes they need to apply.
1354 static u32 edid_get_quirks(struct edid *edid)
1356 struct edid_quirk *quirk;
1359 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1360 quirk = &edid_quirk_list[i];
1362 if (edid_vendor(edid, quirk->vendor) &&
1363 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1364 return quirk->quirks;
1370 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1371 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1374 * edid_fixup_preferred - set preferred modes based on quirk list
1375 * @connector: has mode list to fix up
1376 * @quirks: quirks list
1378 * Walk the mode list for @connector, clearing the preferred status
1379 * on existing modes and setting it anew for the right mode ala @quirks.
1381 static void edid_fixup_preferred(struct drm_connector *connector,
1384 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1385 int target_refresh = 0;
1386 int cur_vrefresh, preferred_vrefresh;
1388 if (list_empty(&connector->probed_modes))
1391 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1392 target_refresh = 60;
1393 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1394 target_refresh = 75;
1396 preferred_mode = list_first_entry(&connector->probed_modes,
1397 struct drm_display_mode, head);
1399 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1400 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1402 if (cur_mode == preferred_mode)
1405 /* Largest mode is preferred */
1406 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1407 preferred_mode = cur_mode;
1409 cur_vrefresh = cur_mode->vrefresh ?
1410 cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1411 preferred_vrefresh = preferred_mode->vrefresh ?
1412 preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1413 /* At a given size, try to get closest to target refresh */
1414 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1415 MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1416 MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1417 preferred_mode = cur_mode;
1421 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1425 mode_is_rb(const struct drm_display_mode *mode)
1427 return (mode->htotal - mode->hdisplay == 160) &&
1428 (mode->hsync_end - mode->hdisplay == 80) &&
1429 (mode->hsync_end - mode->hsync_start == 32) &&
1430 (mode->vsync_start - mode->vdisplay == 3);
1434 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1435 * @dev: Device to duplicate against
1436 * @hsize: Mode width
1437 * @vsize: Mode height
1438 * @fresh: Mode refresh rate
1439 * @rb: Mode reduced-blanking-ness
1441 * Walk the DMT mode list looking for a match for the given parameters.
1443 * Return: A newly allocated copy of the mode, or NULL if not found.
1445 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1446 int hsize, int vsize, int fresh,
1451 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1452 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1453 if (hsize != ptr->hdisplay)
1455 if (vsize != ptr->vdisplay)
1457 if (fresh != drm_mode_vrefresh(ptr))
1459 if (rb != mode_is_rb(ptr))
1462 return drm_mode_duplicate(dev, ptr);
1467 EXPORT_SYMBOL(drm_mode_find_dmt);
1469 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1472 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1476 u8 *det_base = ext + d;
1479 for (i = 0; i < n; i++)
1480 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1484 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1486 unsigned int i, n = min((int)ext[0x02], 6);
1487 u8 *det_base = ext + 5;
1490 return; /* unknown version */
1492 for (i = 0; i < n; i++)
1493 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1497 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1500 struct edid *edid = (struct edid *)raw_edid;
1505 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1506 cb(&(edid->detailed_timings[i]), closure);
1508 for (i = 1; i <= raw_edid[0x7e]; i++) {
1509 u8 *ext = raw_edid + (i * EDID_LENGTH);
1512 cea_for_each_detailed_block(ext, cb, closure);
1515 vtb_for_each_detailed_block(ext, cb, closure);
1524 is_rb(struct detailed_timing *t, void *data)
1527 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1529 *(bool *)data = true;
1532 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1534 drm_monitor_supports_rb(struct edid *edid)
1536 if (edid->revision >= 4) {
1538 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1542 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1546 find_gtf2(struct detailed_timing *t, void *data)
1549 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1553 /* Secondary GTF curve kicks in above some break frequency */
1555 drm_gtf2_hbreak(struct edid *edid)
1558 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1559 return r ? (r[12] * 2) : 0;
1563 drm_gtf2_2c(struct edid *edid)
1566 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1567 return r ? r[13] : 0;
1571 drm_gtf2_m(struct edid *edid)
1574 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1575 return r ? (r[15] << 8) + r[14] : 0;
1579 drm_gtf2_k(struct edid *edid)
1582 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1583 return r ? r[16] : 0;
1587 drm_gtf2_2j(struct edid *edid)
1590 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1591 return r ? r[17] : 0;
1595 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1596 * @edid: EDID block to scan
1598 static int standard_timing_level(struct edid *edid)
1600 if (edid->revision >= 2) {
1601 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1603 if (drm_gtf2_hbreak(edid))
1611 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1612 * monitors fill with ascii space (0x20) instead.
1615 bad_std_timing(u8 a, u8 b)
1617 return (a == 0x00 && b == 0x00) ||
1618 (a == 0x01 && b == 0x01) ||
1619 (a == 0x20 && b == 0x20);
1623 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1624 * @connector: connector of for the EDID block
1625 * @edid: EDID block to scan
1626 * @t: standard timing params
1628 * Take the standard timing params (in this case width, aspect, and refresh)
1629 * and convert them into a real mode using CVT/GTF/DMT.
1631 static struct drm_display_mode *
1632 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1633 struct std_timing *t)
1635 struct drm_device *dev = connector->dev;
1636 struct drm_display_mode *m, *mode = NULL;
1639 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1640 >> EDID_TIMING_ASPECT_SHIFT;
1641 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1642 >> EDID_TIMING_VFREQ_SHIFT;
1643 int timing_level = standard_timing_level(edid);
1645 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1648 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1649 hsize = t->hsize * 8 + 248;
1650 /* vrefresh_rate = vfreq + 60 */
1651 vrefresh_rate = vfreq + 60;
1652 /* the vdisplay is calculated based on the aspect ratio */
1653 if (aspect_ratio == 0) {
1654 if (edid->revision < 3)
1657 vsize = (hsize * 10) / 16;
1658 } else if (aspect_ratio == 1)
1659 vsize = (hsize * 3) / 4;
1660 else if (aspect_ratio == 2)
1661 vsize = (hsize * 4) / 5;
1663 vsize = (hsize * 9) / 16;
1665 /* HDTV hack, part 1 */
1666 if (vrefresh_rate == 60 &&
1667 ((hsize == 1360 && vsize == 765) ||
1668 (hsize == 1368 && vsize == 769))) {
1674 * If this connector already has a mode for this size and refresh
1675 * rate (because it came from detailed or CVT info), use that
1676 * instead. This way we don't have to guess at interlace or
1679 list_for_each_entry(m, &connector->probed_modes, head)
1680 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1681 drm_mode_vrefresh(m) == vrefresh_rate)
1684 /* HDTV hack, part 2 */
1685 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1686 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1688 mode->hdisplay = 1366;
1689 mode->hsync_start = mode->hsync_start - 1;
1690 mode->hsync_end = mode->hsync_end - 1;
1694 /* check whether it can be found in default mode table */
1695 if (drm_monitor_supports_rb(edid)) {
1696 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1701 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1705 /* okay, generate it */
1706 switch (timing_level) {
1710 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1714 * This is potentially wrong if there's ever a monitor with
1715 * more than one ranges section, each claiming a different
1716 * secondary GTF curve. Please don't do that.
1718 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1721 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1722 drm_mode_destroy(dev, mode);
1723 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1724 vrefresh_rate, 0, 0,
1732 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1740 * EDID is delightfully ambiguous about how interlaced modes are to be
1741 * encoded. Our internal representation is of frame height, but some
1742 * HDTV detailed timings are encoded as field height.
1744 * The format list here is from CEA, in frame size. Technically we
1745 * should be checking refresh rate too. Whatever.
1748 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1749 struct detailed_pixel_timing *pt)
1752 static const struct {
1754 } cea_interlaced[] = {
1764 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1767 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1768 if ((mode->hdisplay == cea_interlaced[i].w) &&
1769 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1770 mode->vdisplay *= 2;
1771 mode->vsync_start *= 2;
1772 mode->vsync_end *= 2;
1778 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1782 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1783 * @dev: DRM device (needed to create new mode)
1785 * @timing: EDID detailed timing info
1786 * @quirks: quirks to apply
1788 * An EDID detailed timing block contains enough info for us to create and
1789 * return a new struct drm_display_mode.
1791 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1793 struct detailed_timing *timing,
1796 struct drm_display_mode *mode;
1797 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1798 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1799 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1800 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1801 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1802 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1803 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1804 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1805 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1807 /* ignore tiny modes */
1808 if (hactive < 64 || vactive < 64)
1811 if (pt->misc & DRM_EDID_PT_STEREO) {
1812 DRM_DEBUG_KMS("stereo mode not supported\n");
1815 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1816 DRM_DEBUG_KMS("composite sync not supported\n");
1819 /* it is incorrect if hsync/vsync width is zero */
1820 if (!hsync_pulse_width || !vsync_pulse_width) {
1821 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1822 "Wrong Hsync/Vsync pulse width\n");
1826 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1827 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1834 mode = drm_mode_create(dev);
1838 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1839 timing->pixel_clock = cpu_to_le16(1088);
1841 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1843 mode->hdisplay = hactive;
1844 mode->hsync_start = mode->hdisplay + hsync_offset;
1845 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1846 mode->htotal = mode->hdisplay + hblank;
1848 mode->vdisplay = vactive;
1849 mode->vsync_start = mode->vdisplay + vsync_offset;
1850 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1851 mode->vtotal = mode->vdisplay + vblank;
1853 /* Some EDIDs have bogus h/vtotal values */
1854 if (mode->hsync_end > mode->htotal)
1855 mode->htotal = mode->hsync_end + 1;
1856 if (mode->vsync_end > mode->vtotal)
1857 mode->vtotal = mode->vsync_end + 1;
1859 drm_mode_do_interlace_quirk(mode, pt);
1861 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1862 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1865 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1866 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1867 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1868 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1871 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1872 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1874 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1875 mode->width_mm *= 10;
1876 mode->height_mm *= 10;
1879 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1880 mode->width_mm = edid->width_cm * 10;
1881 mode->height_mm = edid->height_cm * 10;
1884 mode->type = DRM_MODE_TYPE_DRIVER;
1885 mode->vrefresh = drm_mode_vrefresh(mode);
1886 drm_mode_set_name(mode);
1892 mode_in_hsync_range(const struct drm_display_mode *mode,
1893 struct edid *edid, u8 *t)
1895 int hsync, hmin, hmax;
1898 if (edid->revision >= 4)
1899 hmin += ((t[4] & 0x04) ? 255 : 0);
1901 if (edid->revision >= 4)
1902 hmax += ((t[4] & 0x08) ? 255 : 0);
1903 hsync = drm_mode_hsync(mode);
1905 return (hsync <= hmax && hsync >= hmin);
1909 mode_in_vsync_range(const struct drm_display_mode *mode,
1910 struct edid *edid, u8 *t)
1912 int vsync, vmin, vmax;
1915 if (edid->revision >= 4)
1916 vmin += ((t[4] & 0x01) ? 255 : 0);
1918 if (edid->revision >= 4)
1919 vmax += ((t[4] & 0x02) ? 255 : 0);
1920 vsync = drm_mode_vrefresh(mode);
1922 return (vsync <= vmax && vsync >= vmin);
1926 range_pixel_clock(struct edid *edid, u8 *t)
1929 if (t[9] == 0 || t[9] == 255)
1932 /* 1.4 with CVT support gives us real precision, yay */
1933 if (edid->revision >= 4 && t[10] == 0x04)
1934 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1936 /* 1.3 is pathetic, so fuzz up a bit */
1937 return t[9] * 10000 + 5001;
1941 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1942 struct detailed_timing *timing)
1945 u8 *t = (u8 *)timing;
1947 if (!mode_in_hsync_range(mode, edid, t))
1950 if (!mode_in_vsync_range(mode, edid, t))
1953 if ((max_clock = range_pixel_clock(edid, t)))
1954 if (mode->clock > max_clock)
1957 /* 1.4 max horizontal check */
1958 if (edid->revision >= 4 && t[10] == 0x04)
1959 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1962 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1968 static bool valid_inferred_mode(const struct drm_connector *connector,
1969 const struct drm_display_mode *mode)
1971 struct drm_display_mode *m;
1974 list_for_each_entry(m, &connector->probed_modes, head) {
1975 if (mode->hdisplay == m->hdisplay &&
1976 mode->vdisplay == m->vdisplay &&
1977 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1978 return false; /* duplicated */
1979 if (mode->hdisplay <= m->hdisplay &&
1980 mode->vdisplay <= m->vdisplay)
1987 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1988 struct detailed_timing *timing)
1991 struct drm_display_mode *newmode;
1992 struct drm_device *dev = connector->dev;
1994 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1995 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1996 valid_inferred_mode(connector, drm_dmt_modes + i)) {
1997 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1999 drm_mode_probed_add(connector, newmode);
2008 /* fix up 1366x768 mode from 1368x768;
2009 * GFT/CVT can't express 1366 width which isn't dividable by 8
2011 static void fixup_mode_1366x768(struct drm_display_mode *mode)
2013 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2014 mode->hdisplay = 1366;
2015 mode->hsync_start--;
2017 drm_mode_set_name(mode);
2022 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2023 struct detailed_timing *timing)
2026 struct drm_display_mode *newmode;
2027 struct drm_device *dev = connector->dev;
2029 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2030 const struct minimode *m = &extra_modes[i];
2031 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2035 fixup_mode_1366x768(newmode);
2036 if (!mode_in_range(newmode, edid, timing) ||
2037 !valid_inferred_mode(connector, newmode)) {
2038 drm_mode_destroy(dev, newmode);
2042 drm_mode_probed_add(connector, newmode);
2050 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2051 struct detailed_timing *timing)
2054 struct drm_display_mode *newmode;
2055 struct drm_device *dev = connector->dev;
2056 bool rb = drm_monitor_supports_rb(edid);
2058 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2059 const struct minimode *m = &extra_modes[i];
2060 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2064 fixup_mode_1366x768(newmode);
2065 if (!mode_in_range(newmode, edid, timing) ||
2066 !valid_inferred_mode(connector, newmode)) {
2067 drm_mode_destroy(dev, newmode);
2071 drm_mode_probed_add(connector, newmode);
2079 do_inferred_modes(struct detailed_timing *timing, void *c)
2081 struct detailed_mode_closure *closure = c;
2082 struct detailed_non_pixel *data = &timing->data.other_data;
2083 struct detailed_data_monitor_range *range = &data->data.range;
2085 if (data->type != EDID_DETAIL_MONITOR_RANGE)
2088 closure->modes += drm_dmt_modes_for_range(closure->connector,
2092 if (!version_greater(closure->edid, 1, 1))
2093 return; /* GTF not defined yet */
2095 switch (range->flags) {
2096 case 0x02: /* secondary gtf, XXX could do more */
2097 case 0x00: /* default gtf */
2098 closure->modes += drm_gtf_modes_for_range(closure->connector,
2102 case 0x04: /* cvt, only in 1.4+ */
2103 if (!version_greater(closure->edid, 1, 3))
2106 closure->modes += drm_cvt_modes_for_range(closure->connector,
2110 case 0x01: /* just the ranges, no formula */
2117 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2119 struct detailed_mode_closure closure = {
2120 .connector = connector,
2124 if (version_greater(edid, 1, 0))
2125 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2128 return closure.modes;
2132 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2134 int i, j, m, modes = 0;
2135 struct drm_display_mode *mode;
2136 u8 *est = ((u8 *)timing) + 5;
2138 for (i = 0; i < 6; i++) {
2139 for (j = 7; j >= 0; j--) {
2140 m = (i * 8) + (7 - j);
2141 if (m >= ARRAY_SIZE(est3_modes))
2143 if (est[i] & (1 << j)) {
2144 mode = drm_mode_find_dmt(connector->dev,
2150 drm_mode_probed_add(connector, mode);
2161 do_established_modes(struct detailed_timing *timing, void *c)
2163 struct detailed_mode_closure *closure = c;
2164 struct detailed_non_pixel *data = &timing->data.other_data;
2166 if (data->type == EDID_DETAIL_EST_TIMINGS)
2167 closure->modes += drm_est3_modes(closure->connector, timing);
2171 * add_established_modes - get est. modes from EDID and add them
2172 * @connector: connector to add mode(s) to
2173 * @edid: EDID block to scan
2175 * Each EDID block contains a bitmap of the supported "established modes" list
2176 * (defined above). Tease them out and add them to the global modes list.
2179 add_established_modes(struct drm_connector *connector, struct edid *edid)
2181 struct drm_device *dev = connector->dev;
2182 unsigned long est_bits = edid->established_timings.t1 |
2183 (edid->established_timings.t2 << 8) |
2184 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2186 struct detailed_mode_closure closure = {
2187 .connector = connector,
2191 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2192 if (est_bits & (1<<i)) {
2193 struct drm_display_mode *newmode;
2194 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2196 drm_mode_probed_add(connector, newmode);
2202 if (version_greater(edid, 1, 0))
2203 drm_for_each_detailed_block((u8 *)edid,
2204 do_established_modes, &closure);
2206 return modes + closure.modes;
2210 do_standard_modes(struct detailed_timing *timing, void *c)
2212 struct detailed_mode_closure *closure = c;
2213 struct detailed_non_pixel *data = &timing->data.other_data;
2214 struct drm_connector *connector = closure->connector;
2215 struct edid *edid = closure->edid;
2217 if (data->type == EDID_DETAIL_STD_MODES) {
2219 for (i = 0; i < 6; i++) {
2220 struct std_timing *std;
2221 struct drm_display_mode *newmode;
2223 std = &data->data.timings[i];
2224 newmode = drm_mode_std(connector, edid, std);
2226 drm_mode_probed_add(connector, newmode);
2234 * add_standard_modes - get std. modes from EDID and add them
2235 * @connector: connector to add mode(s) to
2236 * @edid: EDID block to scan
2238 * Standard modes can be calculated using the appropriate standard (DMT,
2239 * GTF or CVT. Grab them from @edid and add them to the list.
2242 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2245 struct detailed_mode_closure closure = {
2246 .connector = connector,
2250 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2251 struct drm_display_mode *newmode;
2253 newmode = drm_mode_std(connector, edid,
2254 &edid->standard_timings[i]);
2256 drm_mode_probed_add(connector, newmode);
2261 if (version_greater(edid, 1, 0))
2262 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2265 /* XXX should also look for standard codes in VTB blocks */
2267 return modes + closure.modes;
2270 static int drm_cvt_modes(struct drm_connector *connector,
2271 struct detailed_timing *timing)
2273 int i, j, modes = 0;
2274 struct drm_display_mode *newmode;
2275 struct drm_device *dev = connector->dev;
2276 struct cvt_timing *cvt;
2277 const int rates[] = { 60, 85, 75, 60, 50 };
2278 const u8 empty[3] = { 0, 0, 0 };
2280 for (i = 0; i < 4; i++) {
2281 int width = 0, height;
2282 cvt = &(timing->data.other_data.data.cvt[i]);
2284 if (!memcmp(cvt->code, empty, 3))
2287 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2288 switch (cvt->code[1] & 0x0c) {
2290 width = height * 4 / 3;
2293 width = height * 16 / 9;
2296 width = height * 16 / 10;
2299 width = height * 15 / 9;
2303 for (j = 1; j < 5; j++) {
2304 if (cvt->code[2] & (1 << j)) {
2305 newmode = drm_cvt_mode(dev, width, height,
2309 drm_mode_probed_add(connector, newmode);
2320 do_cvt_mode(struct detailed_timing *timing, void *c)
2322 struct detailed_mode_closure *closure = c;
2323 struct detailed_non_pixel *data = &timing->data.other_data;
2325 if (data->type == EDID_DETAIL_CVT_3BYTE)
2326 closure->modes += drm_cvt_modes(closure->connector, timing);
2330 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2332 struct detailed_mode_closure closure = {
2333 .connector = connector,
2337 if (version_greater(edid, 1, 2))
2338 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2340 /* XXX should also look for CVT codes in VTB blocks */
2342 return closure.modes;
2346 do_detailed_mode(struct detailed_timing *timing, void *c)
2348 struct detailed_mode_closure *closure = c;
2349 struct drm_display_mode *newmode;
2351 if (timing->pixel_clock) {
2352 newmode = drm_mode_detailed(closure->connector->dev,
2353 closure->edid, timing,
2358 if (closure->preferred)
2359 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2361 drm_mode_probed_add(closure->connector, newmode);
2363 closure->preferred = 0;
2368 * add_detailed_modes - Add modes from detailed timings
2369 * @connector: attached connector
2370 * @edid: EDID block to scan
2371 * @quirks: quirks to apply
2374 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2377 struct detailed_mode_closure closure = {
2378 .connector = connector,
2384 if (closure.preferred && !version_greater(edid, 1, 3))
2386 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2388 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2390 return closure.modes;
2393 #define AUDIO_BLOCK 0x01
2394 #define VIDEO_BLOCK 0x02
2395 #define VENDOR_BLOCK 0x03
2396 #define SPEAKER_BLOCK 0x04
2397 #define VIDEO_CAPABILITY_BLOCK 0x07
2398 #define EDID_BASIC_AUDIO (1 << 6)
2399 #define EDID_CEA_YCRCB444 (1 << 5)
2400 #define EDID_CEA_YCRCB422 (1 << 4)
2401 #define EDID_CEA_VCDB_QS (1 << 6)
2404 * Search EDID for CEA extension block.
2406 static u8 *drm_find_cea_extension(struct edid *edid)
2408 u8 *edid_ext = NULL;
2411 /* No EDID or EDID extensions */
2412 if (edid == NULL || edid->extensions == 0)
2415 /* Find CEA extension */
2416 for (i = 0; i < edid->extensions; i++) {
2417 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2418 if (edid_ext[0] == CEA_EXT)
2422 if (i == edid->extensions)
2429 * Calculate the alternate clock for the CEA mode
2430 * (60Hz vs. 59.94Hz etc.)
2433 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2435 unsigned int clock = cea_mode->clock;
2437 if (cea_mode->vrefresh % 6 != 0)
2441 * edid_cea_modes contains the 59.94Hz
2442 * variant for 240 and 480 line modes,
2443 * and the 60Hz variant otherwise.
2445 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2446 clock = clock * 1001 / 1000;
2448 clock = DIV_ROUND_UP(clock * 1000, 1001);
2454 * drm_match_cea_mode - look for a CEA mode matching given mode
2455 * @to_match: display mode
2457 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2460 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2464 if (!to_match->clock)
2467 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2468 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2469 unsigned int clock1, clock2;
2471 /* Check both 60Hz and 59.94Hz */
2472 clock1 = cea_mode->clock;
2473 clock2 = cea_mode_alternate_clock(cea_mode);
2475 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2476 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2477 drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2482 EXPORT_SYMBOL(drm_match_cea_mode);
2485 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2486 * the input VIC from the CEA mode list
2487 * @video_code: ID given to each of the CEA modes
2489 * Returns picture aspect ratio
2491 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2493 /* return picture aspect ratio for video_code - 1 to access the
2494 * right array element
2496 return edid_cea_modes[video_code-1].picture_aspect_ratio;
2498 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2501 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2504 * It's almost like cea_mode_alternate_clock(), we just need to add an
2505 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2509 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2511 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2512 return hdmi_mode->clock;
2514 return cea_mode_alternate_clock(hdmi_mode);
2518 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2519 * @to_match: display mode
2521 * An HDMI mode is one defined in the HDMI vendor specific block.
2523 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2525 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2529 if (!to_match->clock)
2532 for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
2533 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
2534 unsigned int clock1, clock2;
2536 /* Make sure to also match alternate clocks */
2537 clock1 = hdmi_mode->clock;
2538 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2540 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2541 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2542 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2549 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2551 struct drm_device *dev = connector->dev;
2552 struct drm_display_mode *mode, *tmp;
2553 LINUX_LIST_HEAD(list);
2556 /* Don't add CEA modes if the CEA extension block is missing */
2557 if (!drm_find_cea_extension(edid))
2561 * Go through all probed modes and create a new mode
2562 * with the alternate clock for certain CEA modes.
2564 list_for_each_entry(mode, &connector->probed_modes, head) {
2565 const struct drm_display_mode *cea_mode = NULL;
2566 struct drm_display_mode *newmode;
2567 u8 mode_idx = drm_match_cea_mode(mode) - 1;
2568 unsigned int clock1, clock2;
2570 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
2571 cea_mode = &edid_cea_modes[mode_idx];
2572 clock2 = cea_mode_alternate_clock(cea_mode);
2574 mode_idx = drm_match_hdmi_mode(mode) - 1;
2575 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
2576 cea_mode = &edid_4k_modes[mode_idx];
2577 clock2 = hdmi_mode_alternate_clock(cea_mode);
2584 clock1 = cea_mode->clock;
2586 if (clock1 == clock2)
2589 if (mode->clock != clock1 && mode->clock != clock2)
2592 newmode = drm_mode_duplicate(dev, cea_mode);
2596 /* Carry over the stereo flags */
2597 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2600 * The current mode could be either variant. Make
2601 * sure to pick the "other" clock for the new mode.
2603 if (mode->clock != clock1)
2604 newmode->clock = clock1;
2606 newmode->clock = clock2;
2608 list_add_tail(&newmode->head, &list);
2611 list_for_each_entry_safe(mode, tmp, &list, head) {
2612 list_del(&mode->head);
2613 drm_mode_probed_add(connector, mode);
2620 static struct drm_display_mode *
2621 drm_display_mode_from_vic_index(struct drm_connector *connector,
2622 const u8 *video_db, u8 video_len,
2625 struct drm_device *dev = connector->dev;
2626 struct drm_display_mode *newmode;
2629 if (video_db == NULL || video_index >= video_len)
2632 /* CEA modes are numbered 1..127 */
2633 cea_mode = (video_db[video_index] & 127) - 1;
2634 if (cea_mode >= ARRAY_SIZE(edid_cea_modes))
2637 newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
2641 newmode->vrefresh = 0;
2647 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2651 for (i = 0; i < len; i++) {
2652 struct drm_display_mode *mode;
2653 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2655 drm_mode_probed_add(connector, mode);
2663 struct stereo_mandatory_mode {
2664 int width, height, vrefresh;
2668 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2669 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2670 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2672 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2674 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2675 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2676 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2677 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2678 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2682 stereo_match_mandatory(const struct drm_display_mode *mode,
2683 const struct stereo_mandatory_mode *stereo_mode)
2685 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2687 return mode->hdisplay == stereo_mode->width &&
2688 mode->vdisplay == stereo_mode->height &&
2689 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2690 drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2693 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2695 struct drm_device *dev = connector->dev;
2696 struct drm_display_mode *mode;
2697 struct list_head stereo_modes;
2700 INIT_LIST_HEAD(&stereo_modes);
2702 list_for_each_entry(mode, &connector->probed_modes, head) {
2703 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2704 const struct stereo_mandatory_mode *mandatory;
2705 struct drm_display_mode *new_mode;
2707 if (!stereo_match_mandatory(mode,
2708 &stereo_mandatory_modes[i]))
2711 mandatory = &stereo_mandatory_modes[i];
2712 new_mode = drm_mode_duplicate(dev, mode);
2716 new_mode->flags |= mandatory->flags;
2717 list_add_tail(&new_mode->head, &stereo_modes);
2722 list_splice_tail(&stereo_modes, &connector->probed_modes);
2727 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2729 struct drm_device *dev = connector->dev;
2730 struct drm_display_mode *newmode;
2732 vic--; /* VICs start at 1 */
2733 if (vic >= ARRAY_SIZE(edid_4k_modes)) {
2734 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2738 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2742 drm_mode_probed_add(connector, newmode);
2747 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2748 const u8 *video_db, u8 video_len, u8 video_index)
2750 struct drm_display_mode *newmode;
2753 if (structure & (1 << 0)) {
2754 newmode = drm_display_mode_from_vic_index(connector, video_db,
2758 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2759 drm_mode_probed_add(connector, newmode);
2763 if (structure & (1 << 6)) {
2764 newmode = drm_display_mode_from_vic_index(connector, video_db,
2768 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2769 drm_mode_probed_add(connector, newmode);
2773 if (structure & (1 << 8)) {
2774 newmode = drm_display_mode_from_vic_index(connector, video_db,
2778 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2779 drm_mode_probed_add(connector, newmode);
2788 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2789 * @connector: connector corresponding to the HDMI sink
2790 * @db: start of the CEA vendor specific block
2791 * @len: length of the CEA block payload, ie. one can access up to db[len]
2793 * Parses the HDMI VSDB looking for modes to add to @connector. This function
2794 * also adds the stereo 3d modes when applicable.
2797 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
2798 const u8 *video_db, u8 video_len)
2800 int modes = 0, offset = 0, i, multi_present = 0, multi_len;
2801 u8 vic_len, hdmi_3d_len = 0;
2808 /* no HDMI_Video_Present */
2809 if (!(db[8] & (1 << 5)))
2812 /* Latency_Fields_Present */
2813 if (db[8] & (1 << 7))
2816 /* I_Latency_Fields_Present */
2817 if (db[8] & (1 << 6))
2820 /* the declared length is not long enough for the 2 first bytes
2821 * of additional video format capabilities */
2822 if (len < (8 + offset + 2))
2827 if (db[8 + offset] & (1 << 7)) {
2828 modes += add_hdmi_mandatory_stereo_modes(connector);
2830 /* 3D_Multi_present */
2831 multi_present = (db[8 + offset] & 0x60) >> 5;
2835 vic_len = db[8 + offset] >> 5;
2836 hdmi_3d_len = db[8 + offset] & 0x1f;
2838 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
2841 vic = db[9 + offset + i];
2842 modes += add_hdmi_mode(connector, vic);
2844 offset += 1 + vic_len;
2846 if (multi_present == 1)
2848 else if (multi_present == 2)
2853 if (len < (8 + offset + hdmi_3d_len - 1))
2856 if (hdmi_3d_len < multi_len)
2859 if (multi_present == 1 || multi_present == 2) {
2860 /* 3D_Structure_ALL */
2861 structure_all = (db[8 + offset] << 8) | db[9 + offset];
2863 /* check if 3D_MASK is present */
2864 if (multi_present == 2)
2865 mask = (db[10 + offset] << 8) | db[11 + offset];
2869 for (i = 0; i < 16; i++) {
2870 if (mask & (1 << i))
2871 modes += add_3d_struct_modes(connector,
2878 offset += multi_len;
2880 for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
2882 struct drm_display_mode *newmode = NULL;
2883 unsigned int newflag = 0;
2884 bool detail_present;
2886 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
2888 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
2891 /* 2D_VIC_order_X */
2892 vic_index = db[8 + offset + i] >> 4;
2894 /* 3D_Structure_X */
2895 switch (db[8 + offset + i] & 0x0f) {
2897 newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
2900 newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2904 if ((db[9 + offset + i] >> 4) == 1)
2905 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2910 newmode = drm_display_mode_from_vic_index(connector,
2916 newmode->flags |= newflag;
2917 drm_mode_probed_add(connector, newmode);
2931 cea_db_payload_len(const u8 *db)
2933 return db[0] & 0x1f;
2937 cea_db_tag(const u8 *db)
2943 cea_revision(const u8 *cea)
2949 cea_db_offsets(const u8 *cea, int *start, int *end)
2951 /* Data block offset in CEA extension block */
2956 if (*end < 4 || *end > 127)
2961 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2965 if (cea_db_tag(db) != VENDOR_BLOCK)
2968 if (cea_db_payload_len(db) < 5)
2971 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
2973 return hdmi_id == HDMI_IEEE_OUI;
2976 #define for_each_cea_db(cea, i, start, end) \
2977 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
2980 add_cea_modes(struct drm_connector *connector, struct edid *edid)
2982 const u8 *cea = drm_find_cea_extension(edid);
2983 const u8 *db, *hdmi = NULL, *video = NULL;
2984 u8 dbl, hdmi_len, video_len = 0;
2987 if (cea && cea_revision(cea) >= 3) {
2990 if (cea_db_offsets(cea, &start, &end))
2993 for_each_cea_db(cea, i, start, end) {
2995 dbl = cea_db_payload_len(db);
2997 if (cea_db_tag(db) == VIDEO_BLOCK) {
3000 modes += do_cea_modes(connector, video, dbl);
3002 else if (cea_db_is_hdmi_vsdb(db)) {
3010 * We parse the HDMI VSDB after having added the cea modes as we will
3011 * be patching their flags when the sink supports stereo 3D.
3014 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3021 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
3023 u8 len = cea_db_payload_len(db);
3026 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
3027 connector->dvi_dual = db[6] & 1;
3030 connector->max_tmds_clock = db[7] * 5;
3032 connector->latency_present[0] = db[8] >> 7;
3033 connector->latency_present[1] = (db[8] >> 6) & 1;
3036 connector->video_latency[0] = db[9];
3038 connector->audio_latency[0] = db[10];
3040 connector->video_latency[1] = db[11];
3042 connector->audio_latency[1] = db[12];
3044 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3045 "max TMDS clock %d, "
3046 "latency present %d %d, "
3047 "video latency %d %d, "
3048 "audio latency %d %d\n",
3049 connector->dvi_dual,
3050 connector->max_tmds_clock,
3051 (int) connector->latency_present[0],
3052 (int) connector->latency_present[1],
3053 connector->video_latency[0],
3054 connector->video_latency[1],
3055 connector->audio_latency[0],
3056 connector->audio_latency[1]);
3060 monitor_name(struct detailed_timing *t, void *data)
3062 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3063 *(u8 **)data = t->data.other_data.data.str.str;
3067 * drm_edid_to_eld - build ELD from EDID
3068 * @connector: connector corresponding to the HDMI/DP sink
3069 * @edid: EDID to parse
3071 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3072 * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3075 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3077 uint8_t *eld = connector->eld;
3085 memset(eld, 0, sizeof(connector->eld));
3087 cea = drm_find_cea_extension(edid);
3089 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3094 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
3095 for (mnl = 0; name && mnl < 13; mnl++) {
3096 if (name[mnl] == 0x0a)
3098 eld[20 + mnl] = name[mnl];
3100 eld[4] = (cea[1] << 5) | mnl;
3101 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3103 eld[0] = 2 << 3; /* ELD version: 2 */
3105 eld[16] = edid->mfg_id[0];
3106 eld[17] = edid->mfg_id[1];
3107 eld[18] = edid->prod_code[0];
3108 eld[19] = edid->prod_code[1];
3110 if (cea_revision(cea) >= 3) {
3113 if (cea_db_offsets(cea, &start, &end)) {
3118 for_each_cea_db(cea, i, start, end) {
3120 dbl = cea_db_payload_len(db);
3122 switch (cea_db_tag(db)) {
3124 /* Audio Data Block, contains SADs */
3125 sad_count = dbl / 3;
3127 memcpy(eld + 20 + mnl, &db[1], dbl);
3130 /* Speaker Allocation Data Block */
3135 /* HDMI Vendor-Specific Data Block */
3136 if (cea_db_is_hdmi_vsdb(db))
3137 parse_hdmi_vsdb(connector, db);
3144 eld[5] |= sad_count << 4;
3145 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
3147 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
3149 EXPORT_SYMBOL(drm_edid_to_eld);
3152 * drm_edid_to_sad - extracts SADs from EDID
3153 * @edid: EDID to parse
3154 * @sads: pointer that will be set to the extracted SADs
3156 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3158 * Note: The returned pointer needs to be freed using kfree().
3160 * Return: The number of found SADs or negative number on error.
3162 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3165 int i, start, end, dbl;
3168 cea = drm_find_cea_extension(edid);
3170 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3174 if (cea_revision(cea) < 3) {
3175 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3179 if (cea_db_offsets(cea, &start, &end)) {
3180 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3184 for_each_cea_db(cea, i, start, end) {
3187 if (cea_db_tag(db) == AUDIO_BLOCK) {
3189 dbl = cea_db_payload_len(db);
3191 count = dbl / 3; /* SAD is 3B */
3192 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3195 for (j = 0; j < count; j++) {
3196 u8 *sad = &db[1 + j * 3];
3198 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3199 (*sads)[j].channels = sad[0] & 0x7;
3200 (*sads)[j].freq = sad[1] & 0x7F;
3201 (*sads)[j].byte2 = sad[2];
3209 EXPORT_SYMBOL(drm_edid_to_sad);
3212 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3213 * @edid: EDID to parse
3214 * @sadb: pointer to the speaker block
3216 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3218 * Note: The returned pointer needs to be freed using kfree().
3220 * Return: The number of found Speaker Allocation Blocks or negative number on
3223 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3226 int i, start, end, dbl;
3229 cea = drm_find_cea_extension(edid);
3231 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3235 if (cea_revision(cea) < 3) {
3236 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3240 if (cea_db_offsets(cea, &start, &end)) {
3241 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3245 for_each_cea_db(cea, i, start, end) {
3246 const u8 *db = &cea[i];
3248 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3249 dbl = cea_db_payload_len(db);
3251 /* Speaker Allocation Data Block */
3253 *sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
3264 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3267 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3268 * @connector: connector associated with the HDMI/DP sink
3269 * @mode: the display mode
3271 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3272 * the sink doesn't support audio or video.
3274 int drm_av_sync_delay(struct drm_connector *connector,
3275 struct drm_display_mode *mode)
3277 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3280 if (!connector->latency_present[0])
3282 if (!connector->latency_present[1])
3285 a = connector->audio_latency[i];
3286 v = connector->video_latency[i];
3289 * HDMI/DP sink doesn't support audio or video?
3291 if (a == 255 || v == 255)
3295 * Convert raw EDID values to millisecond.
3296 * Treat unknown latency as 0ms.
3299 a = min(2 * (a - 1), 500);
3301 v = min(2 * (v - 1), 500);
3303 return max(v - a, 0);
3305 EXPORT_SYMBOL(drm_av_sync_delay);
3308 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3309 * @encoder: the encoder just changed display mode
3310 * @mode: the adjusted display mode
3312 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3313 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3315 * Return: The connector associated with the first HDMI/DP sink that has ELD
3318 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
3319 struct drm_display_mode *mode)
3321 struct drm_connector *connector;
3322 struct drm_device *dev = encoder->dev;
3324 WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
3325 WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
3327 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
3328 if (connector->encoder == encoder && connector->eld[0])
3333 EXPORT_SYMBOL(drm_select_eld);
3336 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3337 * @edid: monitor EDID information
3339 * Parse the CEA extension according to CEA-861-B.
3341 * Return: True if the monitor is HDMI, false if not or unknown.
3343 bool drm_detect_hdmi_monitor(struct edid *edid)
3347 int start_offset, end_offset;
3349 edid_ext = drm_find_cea_extension(edid);
3353 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3357 * Because HDMI identifier is in Vendor Specific Block,
3358 * search it from all data blocks of CEA extension.
3360 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3361 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3367 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3370 * drm_detect_monitor_audio - check monitor audio capability
3371 * @edid: EDID block to scan
3373 * Monitor should have CEA extension block.
3374 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3375 * audio' only. If there is any audio extension block and supported
3376 * audio format, assume at least 'basic audio' support, even if 'basic
3377 * audio' is not defined in EDID.
3379 * Return: True if the monitor supports audio, false otherwise.
3381 bool drm_detect_monitor_audio(struct edid *edid)
3385 bool has_audio = false;
3386 int start_offset, end_offset;
3388 edid_ext = drm_find_cea_extension(edid);
3392 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3395 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3399 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3402 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3403 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3405 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3406 DRM_DEBUG_KMS("CEA audio format %d\n",
3407 (edid_ext[i + j] >> 3) & 0xf);
3414 EXPORT_SYMBOL(drm_detect_monitor_audio);
3417 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3418 * @edid: EDID block to scan
3420 * Check whether the monitor reports the RGB quantization range selection
3421 * as supported. The AVI infoframe can then be used to inform the monitor
3422 * which quantization range (full or limited) is used.
3424 * Return: True if the RGB quantization range is selectable, false otherwise.
3426 bool drm_rgb_quant_range_selectable(struct edid *edid)
3431 edid_ext = drm_find_cea_extension(edid);
3435 if (cea_db_offsets(edid_ext, &start, &end))
3438 for_each_cea_db(edid_ext, i, start, end) {
3439 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3440 cea_db_payload_len(&edid_ext[i]) == 2) {
3441 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3442 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3448 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3451 * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3452 * hdmi deep color modes and update drm_display_info if so.
3453 * @edid: monitor EDID information
3454 * @info: Updated with maximum supported deep color bpc and color format
3455 * if deep color supported.
3456 * @connector: DRM connector, used only for debug output
3458 * Parse the CEA extension according to CEA-861-B.
3459 * Return true if HDMI deep color supported, false if not or unknown.
3461 static bool drm_assign_hdmi_deep_color_info(struct edid *edid,
3462 struct drm_display_info *info,
3463 struct drm_connector *connector)
3465 u8 *edid_ext, *hdmi;
3467 int start_offset, end_offset;
3468 unsigned int dc_bpc = 0;
3470 edid_ext = drm_find_cea_extension(edid);
3474 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3478 * Because HDMI identifier is in Vendor Specific Block,
3479 * search it from all data blocks of CEA extension.
3481 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3482 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) {
3483 /* HDMI supports at least 8 bpc */
3486 hdmi = &edid_ext[i];
3487 if (cea_db_payload_len(hdmi) < 6)
3490 if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3492 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3493 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3497 if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3499 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3500 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3504 if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3506 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3507 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3512 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3513 connector->name, dc_bpc);
3517 * Deep color support mandates RGB444 support for all video
3518 * modes and forbids YCRCB422 support for all video modes per
3521 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3523 /* YCRCB444 is optional according to spec. */
3524 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3525 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3526 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3531 * Spec says that if any deep color mode is supported at all,
3532 * then deep color 36 bit must be supported.
3534 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3535 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3542 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3552 * drm_add_display_info - pull display info out if present
3554 * @info: display info (attached to connector)
3555 * @connector: connector whose edid is used to build display info
3557 * Grab any available display info and stuff it into the drm_display_info
3558 * structure that's part of the connector. Useful for tracking bpp and
3561 static void drm_add_display_info(struct edid *edid,
3562 struct drm_display_info *info,
3563 struct drm_connector *connector)
3567 info->width_mm = edid->width_cm * 10;
3568 info->height_mm = edid->height_cm * 10;
3570 /* driver figures it out in this case */
3572 info->color_formats = 0;
3574 if (edid->revision < 3)
3577 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3580 /* Get data from CEA blocks if present */
3581 edid_ext = drm_find_cea_extension(edid);
3583 info->cea_rev = edid_ext[1];
3585 /* The existence of a CEA block should imply RGB support */
3586 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3587 if (edid_ext[3] & EDID_CEA_YCRCB444)
3588 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3589 if (edid_ext[3] & EDID_CEA_YCRCB422)
3590 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3593 /* HDMI deep color modes supported? Assign to info, if so */
3594 drm_assign_hdmi_deep_color_info(edid, info, connector);
3596 /* Only defined for 1.4 with digital displays */
3597 if (edid->revision < 4)
3600 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3601 case DRM_EDID_DIGITAL_DEPTH_6:
3604 case DRM_EDID_DIGITAL_DEPTH_8:
3607 case DRM_EDID_DIGITAL_DEPTH_10:
3610 case DRM_EDID_DIGITAL_DEPTH_12:
3613 case DRM_EDID_DIGITAL_DEPTH_14:
3616 case DRM_EDID_DIGITAL_DEPTH_16:
3619 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3625 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3626 connector->name, info->bpc);
3628 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3629 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3630 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3631 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3632 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3636 * drm_add_edid_modes - add modes from EDID data, if available
3637 * @connector: connector we're probing
3640 * Add the specified modes to the connector's mode list.
3642 * Return: The number of modes added or 0 if we couldn't find any.
3644 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
3652 if (!drm_edid_is_valid(edid)) {
3653 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
3658 quirks = edid_get_quirks(edid);
3661 * EDID spec says modes should be preferred in this order:
3662 * - preferred detailed mode
3663 * - other detailed modes from base block
3664 * - detailed modes from extension blocks
3665 * - CVT 3-byte code modes
3666 * - standard timing codes
3667 * - established timing codes
3668 * - modes inferred from GTF or CVT range information
3670 * We get this pretty much right.
3672 * XXX order for additional mode types in extension blocks?
3674 num_modes += add_detailed_modes(connector, edid, quirks);
3675 num_modes += add_cvt_modes(connector, edid);
3676 num_modes += add_standard_modes(connector, edid);
3677 num_modes += add_established_modes(connector, edid);
3678 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
3679 num_modes += add_inferred_modes(connector, edid);
3680 num_modes += add_cea_modes(connector, edid);
3681 num_modes += add_alternate_cea_modes(connector, edid);
3683 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
3684 edid_fixup_preferred(connector, quirks);
3686 drm_add_display_info(edid, &connector->display_info, connector);
3688 if (quirks & EDID_QUIRK_FORCE_8BPC)
3689 connector->display_info.bpc = 8;
3691 if (quirks & EDID_QUIRK_FORCE_12BPC)
3692 connector->display_info.bpc = 12;
3696 EXPORT_SYMBOL(drm_add_edid_modes);
3699 * drm_add_modes_noedid - add modes for the connectors without EDID
3700 * @connector: connector we're probing
3701 * @hdisplay: the horizontal display limit
3702 * @vdisplay: the vertical display limit
3704 * Add the specified modes to the connector's mode list. Only when the
3705 * hdisplay/vdisplay is not beyond the given limit, it will be added.
3707 * Return: The number of modes added or 0 if we couldn't find any.
3709 int drm_add_modes_noedid(struct drm_connector *connector,
3710 int hdisplay, int vdisplay)
3712 int i, count, num_modes = 0;
3713 struct drm_display_mode *mode;
3714 struct drm_device *dev = connector->dev;
3716 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
3722 for (i = 0; i < count; i++) {
3723 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3724 if (hdisplay && vdisplay) {
3726 * Only when two are valid, they will be used to check
3727 * whether the mode should be added to the mode list of
3730 if (ptr->hdisplay > hdisplay ||
3731 ptr->vdisplay > vdisplay)
3734 if (drm_mode_vrefresh(ptr) > 61)
3736 mode = drm_mode_duplicate(dev, ptr);
3738 drm_mode_probed_add(connector, mode);
3744 EXPORT_SYMBOL(drm_add_modes_noedid);
3747 * drm_set_preferred_mode - Sets the preferred mode of a connector
3748 * @connector: connector whose mode list should be processed
3749 * @hpref: horizontal resolution of preferred mode
3750 * @vpref: vertical resolution of preferred mode
3752 * Marks a mode as preferred if it matches the resolution specified by @hpref
3755 void drm_set_preferred_mode(struct drm_connector *connector,
3756 int hpref, int vpref)
3758 struct drm_display_mode *mode;
3760 list_for_each_entry(mode, &connector->probed_modes, head) {
3761 if (mode->hdisplay == hpref &&
3762 mode->vdisplay == vpref)
3763 mode->type |= DRM_MODE_TYPE_PREFERRED;
3766 EXPORT_SYMBOL(drm_set_preferred_mode);
3769 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3770 * data from a DRM display mode
3771 * @frame: HDMI AVI infoframe
3772 * @mode: DRM display mode
3774 * Return: 0 on success or a negative error code on failure.
3777 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3778 const struct drm_display_mode *mode)
3782 if (!frame || !mode)
3785 err = hdmi_avi_infoframe_init(frame);
3789 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
3790 frame->pixel_repeat = 1;
3792 frame->video_code = drm_match_cea_mode(mode);
3794 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3797 * Populate picture aspect ratio from either
3798 * user input (if specified) or from the CEA mode list.
3800 if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
3801 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
3802 frame->picture_aspect = mode->picture_aspect_ratio;
3803 else if (frame->video_code > 0)
3804 frame->picture_aspect = drm_get_cea_aspect_ratio(
3807 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3808 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
3812 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
3814 static enum hdmi_3d_structure
3815 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
3817 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
3820 case DRM_MODE_FLAG_3D_FRAME_PACKING:
3821 return HDMI_3D_STRUCTURE_FRAME_PACKING;
3822 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
3823 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
3824 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
3825 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
3826 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
3827 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
3828 case DRM_MODE_FLAG_3D_L_DEPTH:
3829 return HDMI_3D_STRUCTURE_L_DEPTH;
3830 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
3831 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
3832 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
3833 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
3834 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
3835 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
3837 return HDMI_3D_STRUCTURE_INVALID;
3842 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3843 * data from a DRM display mode
3844 * @frame: HDMI vendor infoframe
3845 * @mode: DRM display mode
3847 * Note that there's is a need to send HDMI vendor infoframes only when using a
3848 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3849 * function will return -EINVAL, error that can be safely ignored.
3851 * Return: 0 on success or a negative error code on failure.
3854 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
3855 const struct drm_display_mode *mode)
3861 if (!frame || !mode)
3864 vic = drm_match_hdmi_mode(mode);
3865 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
3867 if (!vic && !s3d_flags)
3870 if (vic && s3d_flags)
3873 err = hdmi_vendor_infoframe_init(frame);
3880 frame->s3d_struct = s3d_structure_from_display_mode(mode);
3884 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);