2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
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30 * authorization from the copyright holder(s) and author(s).
33 #include <linux/list.h>
34 #include <linux/list_sort.h>
35 #include <linux/export.h>
37 #include <drm/drm_crtc.h>
38 #include <drm/drm_modes.h>
40 #include "drm_crtc_internal.h"
43 * drm_mode_debug_printmodeline - print a mode to dmesg
44 * @mode: mode to print
46 * Describe @mode using DRM_DEBUG.
48 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
50 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
52 mode->base.id, mode->name, mode->vrefresh, mode->clock,
53 mode->hdisplay, mode->hsync_start,
54 mode->hsync_end, mode->htotal,
55 mode->vdisplay, mode->vsync_start,
56 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
58 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
61 * drm_mode_create - create a new display mode
64 * Create a new, cleared drm_display_mode with kzalloc, allocate an ID for it
68 * Pointer to new mode on success, NULL on error.
70 struct drm_display_mode *drm_mode_create(struct drm_device *dev)
72 struct drm_display_mode *nmode;
74 nmode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL);
78 if (drm_mode_object_get(dev, &nmode->base, DRM_MODE_OBJECT_MODE)) {
85 EXPORT_SYMBOL(drm_mode_create);
88 * drm_mode_destroy - remove a mode
90 * @mode: mode to remove
92 * Release @mode's unique ID, then free it @mode structure itself using kfree.
94 void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode)
99 drm_mode_object_put(dev, &mode->base);
103 EXPORT_SYMBOL(drm_mode_destroy);
106 * drm_mode_probed_add - add a mode to a connector's probed_mode list
107 * @connector: connector the new mode
110 * Add @mode to @connector's probed_mode list for later use. This list should
111 * then in a second step get filtered and all the modes actually supported by
112 * the hardware moved to the @connector's modes list.
114 void drm_mode_probed_add(struct drm_connector *connector,
115 struct drm_display_mode *mode)
117 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
119 list_add_tail(&mode->head, &connector->probed_modes);
121 EXPORT_SYMBOL(drm_mode_probed_add);
124 * drm_cvt_mode -create a modeline based on the CVT algorithm
126 * @hdisplay: hdisplay size
127 * @vdisplay: vdisplay size
128 * @vrefresh: vrefresh rate
129 * @reduced: whether to use reduced blanking
130 * @interlaced: whether to compute an interlaced mode
131 * @margins: whether to add margins (borders)
133 * This function is called to generate the modeline based on CVT algorithm
134 * according to the hdisplay, vdisplay, vrefresh.
135 * It is based from the VESA(TM) Coordinated Video Timing Generator by
136 * Graham Loveridge April 9, 2003 available at
137 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
139 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
140 * What I have done is to translate it by using integer calculation.
143 * The modeline based on the CVT algorithm stored in a drm_display_mode object.
144 * The display mode object is allocated with drm_mode_create(). Returns NULL
145 * when no mode could be allocated.
147 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
148 int vdisplay, int vrefresh,
149 bool reduced, bool interlaced, bool margins)
151 #define HV_FACTOR 1000
152 /* 1) top/bottom margin size (% of height) - default: 1.8, */
153 #define CVT_MARGIN_PERCENTAGE 18
154 /* 2) character cell horizontal granularity (pixels) - default 8 */
155 #define CVT_H_GRANULARITY 8
156 /* 3) Minimum vertical porch (lines) - default 3 */
157 #define CVT_MIN_V_PORCH 3
158 /* 4) Minimum number of vertical back porch lines - default 6 */
159 #define CVT_MIN_V_BPORCH 6
160 /* Pixel Clock step (kHz) */
161 #define CVT_CLOCK_STEP 250
162 struct drm_display_mode *drm_mode;
163 unsigned int vfieldrate, hperiod;
164 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
167 /* allocate the drm_display_mode structure. If failure, we will
170 drm_mode = drm_mode_create(dev);
174 /* the CVT default refresh rate is 60Hz */
178 /* the required field fresh rate */
180 vfieldrate = vrefresh * 2;
182 vfieldrate = vrefresh;
184 /* horizontal pixels */
185 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
187 /* determine the left&right borders */
190 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
191 hmargin -= hmargin % CVT_H_GRANULARITY;
193 /* find the total active pixels */
194 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
196 /* find the number of lines per field */
198 vdisplay_rnd = vdisplay / 2;
200 vdisplay_rnd = vdisplay;
202 /* find the top & bottom borders */
205 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
207 drm_mode->vdisplay = vdisplay + 2 * vmargin;
215 /* Determine VSync Width from aspect ratio */
216 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
218 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
220 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
222 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
224 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
230 /* simplify the GTF calculation */
231 /* 4) Minimum time of vertical sync + back porch interval (µs)
235 #define CVT_MIN_VSYNC_BP 550
236 /* 3) Nominal HSync width (% of line period) - default 8 */
237 #define CVT_HSYNC_PERCENTAGE 8
238 unsigned int hblank_percentage;
239 int vsyncandback_porch, vback_porch, hblank;
241 /* estimated the horizontal period */
242 tmp1 = HV_FACTOR * 1000000 -
243 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
244 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
246 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
248 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
249 /* 9. Find number of lines in sync + backporch */
250 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
251 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
253 vsyncandback_porch = tmp1;
254 /* 10. Find number of lines in back porch */
255 vback_porch = vsyncandback_porch - vsync;
256 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
257 vsyncandback_porch + CVT_MIN_V_PORCH;
258 /* 5) Definition of Horizontal blanking time limitation */
259 /* Gradient (%/kHz) - default 600 */
260 #define CVT_M_FACTOR 600
261 /* Offset (%) - default 40 */
262 #define CVT_C_FACTOR 40
263 /* Blanking time scaling factor - default 128 */
264 #define CVT_K_FACTOR 128
265 /* Scaling factor weighting - default 20 */
266 #define CVT_J_FACTOR 20
267 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
268 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
270 /* 12. Find ideal blanking duty cycle from formula */
271 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
273 /* 13. Blanking time */
274 if (hblank_percentage < 20 * HV_FACTOR)
275 hblank_percentage = 20 * HV_FACTOR;
276 hblank = drm_mode->hdisplay * hblank_percentage /
277 (100 * HV_FACTOR - hblank_percentage);
278 hblank -= hblank % (2 * CVT_H_GRANULARITY);
279 /* 14. find the total pixes per line */
280 drm_mode->htotal = drm_mode->hdisplay + hblank;
281 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
282 drm_mode->hsync_start = drm_mode->hsync_end -
283 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
284 drm_mode->hsync_start += CVT_H_GRANULARITY -
285 drm_mode->hsync_start % CVT_H_GRANULARITY;
286 /* fill the Vsync values */
287 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
288 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
290 /* Reduced blanking */
291 /* Minimum vertical blanking interval time (µs)- default 460 */
292 #define CVT_RB_MIN_VBLANK 460
293 /* Fixed number of clocks for horizontal sync */
294 #define CVT_RB_H_SYNC 32
295 /* Fixed number of clocks for horizontal blanking */
296 #define CVT_RB_H_BLANK 160
297 /* Fixed number of lines for vertical front porch - default 3*/
298 #define CVT_RB_VFPORCH 3
301 /* 8. Estimate Horizontal period. */
302 tmp1 = HV_FACTOR * 1000000 -
303 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
304 tmp2 = vdisplay_rnd + 2 * vmargin;
305 hperiod = tmp1 / (tmp2 * vfieldrate);
306 /* 9. Find number of lines in vertical blanking */
307 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
308 /* 10. Check if vertical blanking is sufficient */
309 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
310 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
311 /* 11. Find total number of lines in vertical field */
312 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
313 /* 12. Find total number of pixels in a line */
314 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
315 /* Fill in HSync values */
316 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
317 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
318 /* Fill in VSync values */
319 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
320 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
322 /* 15/13. Find pixel clock frequency (kHz for xf86) */
323 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
324 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
325 /* 18/16. Find actual vertical frame frequency */
326 /* ignore - just set the mode flag for interlaced */
328 drm_mode->vtotal *= 2;
329 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
331 /* Fill the mode line name */
332 drm_mode_set_name(drm_mode);
334 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
335 DRM_MODE_FLAG_NVSYNC);
337 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
338 DRM_MODE_FLAG_NHSYNC);
342 EXPORT_SYMBOL(drm_cvt_mode);
345 * drm_gtf_mode_complex - create the modeline based on the full GTF algorithm
347 * @hdisplay: hdisplay size
348 * @vdisplay: vdisplay size
349 * @vrefresh: vrefresh rate.
350 * @interlaced: whether to compute an interlaced mode
351 * @margins: desired margin (borders) size
352 * @GTF_M: extended GTF formula parameters
353 * @GTF_2C: extended GTF formula parameters
354 * @GTF_K: extended GTF formula parameters
355 * @GTF_2J: extended GTF formula parameters
357 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
358 * in here multiplied by two. For a C of 40, pass in 80.
361 * The modeline based on the full GTF algorithm stored in a drm_display_mode object.
362 * The display mode object is allocated with drm_mode_create(). Returns NULL
363 * when no mode could be allocated.
365 struct drm_display_mode *
366 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
367 int vrefresh, bool interlaced, int margins,
368 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
369 { /* 1) top/bottom margin size (% of height) - default: 1.8, */
370 #define GTF_MARGIN_PERCENTAGE 18
371 /* 2) character cell horizontal granularity (pixels) - default 8 */
372 #define GTF_CELL_GRAN 8
373 /* 3) Minimum vertical porch (lines) - default 3 */
374 #define GTF_MIN_V_PORCH 1
375 /* width of vsync in lines */
377 /* width of hsync as % of total line */
378 #define H_SYNC_PERCENT 8
379 /* min time of vsync + back porch (microsec) */
380 #define MIN_VSYNC_PLUS_BP 550
381 /* C' and M' are part of the Blanking Duty Cycle computation */
382 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
383 #define GTF_M_PRIME (GTF_K * GTF_M / 256)
384 struct drm_display_mode *drm_mode;
385 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
386 int top_margin, bottom_margin;
388 unsigned int hfreq_est;
389 int vsync_plus_bp, vback_porch;
390 unsigned int vtotal_lines, vfieldrate_est, hperiod;
391 unsigned int vfield_rate, vframe_rate;
392 int left_margin, right_margin;
393 unsigned int total_active_pixels, ideal_duty_cycle;
394 unsigned int hblank, total_pixels, pixel_freq;
395 int hsync, hfront_porch, vodd_front_porch_lines;
396 unsigned int tmp1, tmp2;
398 drm_mode = drm_mode_create(dev);
402 /* 1. In order to give correct results, the number of horizontal
403 * pixels requested is first processed to ensure that it is divisible
404 * by the character size, by rounding it to the nearest character
407 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
408 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
410 /* 2. If interlace is requested, the number of vertical lines assumed
411 * by the calculation must be halved, as the computation calculates
412 * the number of vertical lines per field.
415 vdisplay_rnd = vdisplay / 2;
417 vdisplay_rnd = vdisplay;
419 /* 3. Find the frame rate required: */
421 vfieldrate_rqd = vrefresh * 2;
423 vfieldrate_rqd = vrefresh;
425 /* 4. Find number of lines in Top margin: */
428 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
430 /* 5. Find number of lines in bottom margin: */
431 bottom_margin = top_margin;
433 /* 6. If interlace is required, then set variable interlace: */
439 /* 7. Estimate the Horizontal frequency */
441 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
442 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
444 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
447 /* 8. Find the number of lines in V sync + back porch */
448 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
449 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
450 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
451 /* 9. Find the number of lines in V back porch alone: */
452 vback_porch = vsync_plus_bp - V_SYNC_RQD;
453 /* 10. Find the total number of lines in Vertical field period: */
454 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
455 vsync_plus_bp + GTF_MIN_V_PORCH;
456 /* 11. Estimate the Vertical field frequency: */
457 vfieldrate_est = hfreq_est / vtotal_lines;
458 /* 12. Find the actual horizontal period: */
459 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
461 /* 13. Find the actual Vertical field frequency: */
462 vfield_rate = hfreq_est / vtotal_lines;
463 /* 14. Find the Vertical frame frequency: */
465 vframe_rate = vfield_rate / 2;
467 vframe_rate = vfield_rate;
468 /* 15. Find number of pixels in left margin: */
470 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
475 /* 16.Find number of pixels in right margin: */
476 right_margin = left_margin;
477 /* 17.Find total number of active pixels in image and left and right */
478 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
479 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
480 ideal_duty_cycle = GTF_C_PRIME * 1000 -
481 (GTF_M_PRIME * 1000000 / hfreq_est);
482 /* 19.Find the number of pixels in the blanking time to the nearest
483 * double character cell: */
484 hblank = total_active_pixels * ideal_duty_cycle /
485 (100000 - ideal_duty_cycle);
486 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
487 hblank = hblank * 2 * GTF_CELL_GRAN;
488 /* 20.Find total number of pixels: */
489 total_pixels = total_active_pixels + hblank;
490 /* 21.Find pixel clock frequency: */
491 pixel_freq = total_pixels * hfreq_est / 1000;
492 /* Stage 1 computations are now complete; I should really pass
493 * the results to another function and do the Stage 2 computations,
494 * but I only need a few more values so I'll just append the
495 * computations here for now */
496 /* 17. Find the number of pixels in the horizontal sync period: */
497 hsync = H_SYNC_PERCENT * total_pixels / 100;
498 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
499 hsync = hsync * GTF_CELL_GRAN;
500 /* 18. Find the number of pixels in horizontal front porch period */
501 hfront_porch = hblank / 2 - hsync;
502 /* 36. Find the number of lines in the odd front porch period: */
503 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
505 /* finally, pack the results in the mode struct */
506 drm_mode->hdisplay = hdisplay_rnd;
507 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
508 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
509 drm_mode->htotal = total_pixels;
510 drm_mode->vdisplay = vdisplay_rnd;
511 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
512 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
513 drm_mode->vtotal = vtotal_lines;
515 drm_mode->clock = pixel_freq;
518 drm_mode->vtotal *= 2;
519 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
522 drm_mode_set_name(drm_mode);
523 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
524 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
526 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
530 EXPORT_SYMBOL(drm_gtf_mode_complex);
533 * drm_gtf_mode - create the modeline based on the GTF algorithm
535 * @hdisplay: hdisplay size
536 * @vdisplay: vdisplay size
537 * @vrefresh: vrefresh rate.
538 * @interlaced: whether to compute an interlaced mode
539 * @margins: desired margin (borders) size
541 * return the modeline based on GTF algorithm
543 * This function is to create the modeline based on the GTF algorithm.
544 * Generalized Timing Formula is derived from:
545 * GTF Spreadsheet by Andy Morrish (1/5/97)
546 * available at http://www.vesa.org
548 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
549 * What I have done is to translate it by using integer calculation.
550 * I also refer to the function of fb_get_mode in the file of
551 * drivers/video/fbmon.c
553 * Standard GTF parameters:
560 * The modeline based on the GTF algorithm stored in a drm_display_mode object.
561 * The display mode object is allocated with drm_mode_create(). Returns NULL
562 * when no mode could be allocated.
564 struct drm_display_mode *
565 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
566 bool interlaced, int margins)
568 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh,
570 600, 40 * 2, 128, 20 * 2);
572 EXPORT_SYMBOL(drm_gtf_mode);
574 #ifdef CONFIG_VIDEOMODE_HELPERS
576 * drm_display_mode_from_videomode - fill in @dmode using @vm,
577 * @vm: videomode structure to use as source
578 * @dmode: drm_display_mode structure to use as destination
580 * Fills out @dmode using the display mode specified in @vm.
582 void drm_display_mode_from_videomode(const struct videomode *vm,
583 struct drm_display_mode *dmode)
585 dmode->hdisplay = vm->hactive;
586 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch;
587 dmode->hsync_end = dmode->hsync_start + vm->hsync_len;
588 dmode->htotal = dmode->hsync_end + vm->hback_porch;
590 dmode->vdisplay = vm->vactive;
591 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch;
592 dmode->vsync_end = dmode->vsync_start + vm->vsync_len;
593 dmode->vtotal = dmode->vsync_end + vm->vback_porch;
595 dmode->clock = vm->pixelclock / 1000;
598 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH)
599 dmode->flags |= DRM_MODE_FLAG_PHSYNC;
600 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
601 dmode->flags |= DRM_MODE_FLAG_NHSYNC;
602 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH)
603 dmode->flags |= DRM_MODE_FLAG_PVSYNC;
604 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
605 dmode->flags |= DRM_MODE_FLAG_NVSYNC;
606 if (vm->flags & DISPLAY_FLAGS_INTERLACED)
607 dmode->flags |= DRM_MODE_FLAG_INTERLACE;
608 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN)
609 dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
610 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
611 dmode->flags |= DRM_MODE_FLAG_DBLCLK;
612 drm_mode_set_name(dmode);
617 * of_get_drm_display_mode - get a drm_display_mode from devicetree
618 * @np: device_node with the timing specification
619 * @dmode: will be set to the return value
620 * @index: index into the list of display timings in devicetree
622 * This function is expensive and should only be used, if only one mode is to be
623 * read from DT. To get multiple modes start with of_get_display_timings and
624 * work with that instead.
627 * 0 on success, a negative errno code when no of videomode node was found.
629 int of_get_drm_display_mode(struct device_node *np,
630 struct drm_display_mode *dmode, int index)
635 ret = of_get_videomode(np, &vm, index);
639 drm_display_mode_from_videomode(&vm, dmode);
641 pr_debug("%s: got %dx%d display mode from %s\n",
642 of_node_full_name(np), vm.hactive, vm.vactive, np->name);
643 drm_mode_debug_printmodeline(dmode);
647 #endif /* CONFIG_OF */
648 #endif /* CONFIG_VIDEOMODE_HELPERS */
651 * drm_mode_set_name - set the name on a mode
652 * @mode: name will be set in this mode
654 * Set the name of @mode to a standard format which is <hdisplay>x<vdisplay>
655 * with an optional 'i' suffix for interlaced modes.
657 void drm_mode_set_name(struct drm_display_mode *mode)
659 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
661 ksnprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
662 mode->hdisplay, mode->vdisplay,
663 interlaced ? "i" : "");
665 EXPORT_SYMBOL(drm_mode_set_name);
667 /** drm_mode_hsync - get the hsync of a mode
671 * @modes's hsync rate in kHz, rounded to the nearest integer. Calculates the
672 * value first if it is not yet set.
674 int drm_mode_hsync(const struct drm_display_mode *mode)
676 unsigned int calc_val;
681 if (mode->htotal < 0)
684 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
685 calc_val += 500; /* round to 1000Hz */
686 calc_val /= 1000; /* truncate to kHz */
690 EXPORT_SYMBOL(drm_mode_hsync);
693 * drm_mode_vrefresh - get the vrefresh of a mode
697 * @modes's vrefresh rate in Hz, rounded to the nearest integer. Calculates the
698 * value first if it is not yet set.
700 int drm_mode_vrefresh(const struct drm_display_mode *mode)
703 unsigned int calc_val;
705 if (mode->vrefresh > 0)
706 refresh = mode->vrefresh;
707 else if (mode->htotal > 0 && mode->vtotal > 0) {
709 vtotal = mode->vtotal;
710 /* work out vrefresh the value will be x1000 */
711 calc_val = (mode->clock * 1000);
712 calc_val /= mode->htotal;
713 refresh = (calc_val + vtotal / 2) / vtotal;
715 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
717 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
720 refresh /= mode->vscan;
724 EXPORT_SYMBOL(drm_mode_vrefresh);
727 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
729 * @adjust_flags: a combination of adjustment flags
731 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
733 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
735 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
736 * buffers containing two eyes (only adjust the timings when needed, eg. for
737 * "frame packing" or "side by side full").
739 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
741 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
744 p->crtc_clock = p->clock;
745 p->crtc_hdisplay = p->hdisplay;
746 p->crtc_hsync_start = p->hsync_start;
747 p->crtc_hsync_end = p->hsync_end;
748 p->crtc_htotal = p->htotal;
749 p->crtc_hskew = p->hskew;
750 p->crtc_vdisplay = p->vdisplay;
751 p->crtc_vsync_start = p->vsync_start;
752 p->crtc_vsync_end = p->vsync_end;
753 p->crtc_vtotal = p->vtotal;
755 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
756 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
757 p->crtc_vdisplay /= 2;
758 p->crtc_vsync_start /= 2;
759 p->crtc_vsync_end /= 2;
764 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
765 p->crtc_vdisplay *= 2;
766 p->crtc_vsync_start *= 2;
767 p->crtc_vsync_end *= 2;
772 p->crtc_vdisplay *= p->vscan;
773 p->crtc_vsync_start *= p->vscan;
774 p->crtc_vsync_end *= p->vscan;
775 p->crtc_vtotal *= p->vscan;
778 if (adjust_flags & CRTC_STEREO_DOUBLE) {
779 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
782 case DRM_MODE_FLAG_3D_FRAME_PACKING:
784 p->crtc_vdisplay += p->crtc_vtotal;
785 p->crtc_vsync_start += p->crtc_vtotal;
786 p->crtc_vsync_end += p->crtc_vtotal;
787 p->crtc_vtotal += p->crtc_vtotal;
792 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
793 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
794 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
795 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
797 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
800 * drm_mode_copy - copy the mode
801 * @dst: mode to overwrite
804 * Copy an existing mode into another mode, preserving the object id and
805 * list head of the destination mode.
807 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
809 int id = dst->base.id;
810 struct list_head head = dst->head;
816 EXPORT_SYMBOL(drm_mode_copy);
819 * drm_mode_duplicate - allocate and duplicate an existing mode
820 * @dev: drm_device to allocate the duplicated mode for
821 * @mode: mode to duplicate
823 * Just allocate a new mode, copy the existing mode into it, and return
824 * a pointer to it. Used to create new instances of established modes.
827 * Pointer to duplicated mode on success, NULL on error.
829 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
830 const struct drm_display_mode *mode)
832 struct drm_display_mode *nmode;
834 nmode = drm_mode_create(dev);
838 drm_mode_copy(nmode, mode);
842 EXPORT_SYMBOL(drm_mode_duplicate);
845 * drm_mode_equal - test modes for equality
847 * @mode2: second mode
849 * Check to see if @mode1 and @mode2 are equivalent.
852 * True if the modes are equal, false otherwise.
854 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
856 /* do clock check convert to PICOS so fb modes get matched
858 if (mode1->clock && mode2->clock) {
859 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
861 } else if (mode1->clock != mode2->clock)
864 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
865 (mode2->flags & DRM_MODE_FLAG_3D_MASK))
868 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
870 EXPORT_SYMBOL(drm_mode_equal);
873 * drm_mode_equal_no_clocks_no_stereo - test modes for equality
875 * @mode2: second mode
877 * Check to see if @mode1 and @mode2 are equivalent, but
878 * don't check the pixel clocks nor the stereo layout.
881 * True if the modes are equal, false otherwise.
883 bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
884 const struct drm_display_mode *mode2)
886 if (mode1->hdisplay == mode2->hdisplay &&
887 mode1->hsync_start == mode2->hsync_start &&
888 mode1->hsync_end == mode2->hsync_end &&
889 mode1->htotal == mode2->htotal &&
890 mode1->hskew == mode2->hskew &&
891 mode1->vdisplay == mode2->vdisplay &&
892 mode1->vsync_start == mode2->vsync_start &&
893 mode1->vsync_end == mode2->vsync_end &&
894 mode1->vtotal == mode2->vtotal &&
895 mode1->vscan == mode2->vscan &&
896 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
897 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK))
902 EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo);
905 * drm_mode_validate_size - make sure modes adhere to size constraints
907 * @mode_list: list of modes to check
908 * @maxX: maximum width
909 * @maxY: maximum height
911 * This function is a helper which can be used to validate modes against size
912 * limitations of the DRM device/connector. If a mode is too big its status
913 * memeber is updated with the appropriate validation failure code. The list
914 * itself is not changed.
916 void drm_mode_validate_size(struct drm_device *dev,
917 struct list_head *mode_list,
920 struct drm_display_mode *mode;
922 list_for_each_entry(mode, mode_list, head) {
923 if (maxX > 0 && mode->hdisplay > maxX)
924 mode->status = MODE_VIRTUAL_X;
926 if (maxY > 0 && mode->vdisplay > maxY)
927 mode->status = MODE_VIRTUAL_Y;
930 EXPORT_SYMBOL(drm_mode_validate_size);
933 * drm_mode_prune_invalid - remove invalid modes from mode list
935 * @mode_list: list of modes to check
936 * @verbose: be verbose about it
938 * This helper function can be used to prune a display mode list after
939 * validation has been completed. All modes who's status is not MODE_OK will be
940 * removed from the list, and if @verbose the status code and mode name is also
943 void drm_mode_prune_invalid(struct drm_device *dev,
944 struct list_head *mode_list, bool verbose)
946 struct drm_display_mode *mode, *t;
948 list_for_each_entry_safe(mode, t, mode_list, head) {
949 if (mode->status != MODE_OK) {
950 list_del(&mode->head);
952 drm_mode_debug_printmodeline(mode);
953 DRM_DEBUG_KMS("Not using %s mode %d\n",
954 mode->name, mode->status);
956 drm_mode_destroy(dev, mode);
960 EXPORT_SYMBOL(drm_mode_prune_invalid);
963 * drm_mode_compare - compare modes for favorability
965 * @lh_a: list_head for first mode
966 * @lh_b: list_head for second mode
968 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
972 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
973 * positive if @lh_b is better than @lh_a.
975 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
977 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
978 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
981 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
982 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
985 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
989 diff = b->vrefresh - a->vrefresh;
993 diff = b->clock - a->clock;
998 * drm_mode_sort - sort mode list
999 * @mode_list: list of drm_display_mode structures to sort
1001 * Sort @mode_list by favorability, moving good modes to the head of the list.
1003 void drm_mode_sort(struct list_head *mode_list)
1005 list_sort(NULL, mode_list, drm_mode_compare);
1007 EXPORT_SYMBOL(drm_mode_sort);
1010 * drm_mode_connector_list_update - update the mode list for the connector
1011 * @connector: the connector to update
1012 * @merge_type_bits: whether to merge or overright type bits.
1014 * This moves the modes from the @connector probed_modes list
1015 * to the actual mode list. It compares the probed mode against the current
1016 * list and only adds different/new modes.
1018 * This is just a helper functions doesn't validate any modes itself and also
1019 * doesn't prune any invalid modes. Callers need to do that themselves.
1021 void drm_mode_connector_list_update(struct drm_connector *connector,
1022 bool merge_type_bits)
1024 struct drm_display_mode *mode;
1025 struct drm_display_mode *pmode, *pt;
1028 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
1030 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
1033 /* go through current modes checking for the new probed mode */
1034 list_for_each_entry(mode, &connector->modes, head) {
1035 if (drm_mode_equal(pmode, mode)) {
1037 /* if equal delete the probed mode */
1038 mode->status = pmode->status;
1039 /* Merge type bits together */
1040 if (merge_type_bits)
1041 mode->type |= pmode->type;
1043 mode->type = pmode->type;
1044 list_del(&pmode->head);
1045 drm_mode_destroy(connector->dev, pmode);
1051 list_move_tail(&pmode->head, &connector->modes);
1055 EXPORT_SYMBOL(drm_mode_connector_list_update);
1058 * drm_mode_parse_command_line_for_connector - parse command line modeline for connector
1059 * @mode_option: optional per connector mode option
1060 * @connector: connector to parse modeline for
1061 * @mode: preallocated drm_cmdline_mode structure to fill out
1063 * This parses @mode_option command line modeline for modes and options to
1064 * configure the connector. If @mode_option is NULL the default command line
1065 * modeline in fb_mode_option will be parsed instead.
1067 * This uses the same parameters as the fb modedb.c, except for an extra
1068 * force-enable, force-enable-digital and force-disable bit at the end:
1070 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1072 * The intermediate drm_cmdline_mode structure is required to store additional
1073 * options from the command line modline like the force-enabel/disable flag.
1076 * True if a valid modeline has been parsed, false otherwise.
1078 bool drm_mode_parse_command_line_for_connector(const char *mode_option,
1079 struct drm_connector *connector,
1080 struct drm_cmdline_mode *mode)
1083 unsigned int namelen;
1084 bool res_specified = false, bpp_specified = false, refresh_specified = false;
1085 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
1086 bool yres_specified = false, cvt = false, rb = false;
1087 bool interlace = false, margins = false, was_digit = false;
1089 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1093 mode_option = fb_mode_option;
1097 mode->specified = false;
1102 namelen = strlen(name);
1103 for (i = namelen-1; i >= 0; i--) {
1106 if (!refresh_specified && !bpp_specified &&
1107 !yres_specified && !cvt && !rb && was_digit) {
1108 refresh = simple_strtol(&name[i+1], NULL, 10);
1109 refresh_specified = true;
1115 if (!bpp_specified && !yres_specified && !cvt &&
1117 bpp = simple_strtol(&name[i+1], NULL, 10);
1118 bpp_specified = true;
1124 if (!yres_specified && was_digit) {
1125 yres = simple_strtol(&name[i+1], NULL, 10);
1126 yres_specified = true;
1135 if (yres_specified || cvt || was_digit)
1140 if (yres_specified || cvt || rb || was_digit)
1145 if (cvt || yres_specified || was_digit)
1150 if (cvt || yres_specified || was_digit)
1155 if (yres_specified || bpp_specified || refresh_specified ||
1156 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1159 force = DRM_FORCE_ON;
1162 if (yres_specified || bpp_specified || refresh_specified ||
1163 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1166 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1167 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1168 force = DRM_FORCE_ON;
1170 force = DRM_FORCE_ON_DIGITAL;
1173 if (yres_specified || bpp_specified || refresh_specified ||
1174 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1177 force = DRM_FORCE_OFF;
1184 if (i < 0 && yres_specified) {
1186 xres = simple_strtol(name, &ch, 10);
1187 if ((ch != NULL) && (*ch == 'x'))
1188 res_specified = true;
1191 } else if (!yres_specified && was_digit) {
1192 /* catch mode that begins with digits but has no 'x' */
1198 "parse error at position %i in video mode '%s'\n",
1200 mode->specified = false;
1204 if (res_specified) {
1205 mode->specified = true;
1210 if (refresh_specified) {
1211 mode->refresh_specified = true;
1212 mode->refresh = refresh;
1215 if (bpp_specified) {
1216 mode->bpp_specified = true;
1221 mode->interlace = interlace;
1222 mode->margins = margins;
1223 mode->force = force;
1227 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1230 * drm_mode_create_from_cmdline_mode - convert a command line modeline into a DRM display mode
1231 * @dev: DRM device to create the new mode for
1232 * @cmd: input command line modeline
1235 * Pointer to converted mode on success, NULL on error.
1237 struct drm_display_mode *
1238 drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1239 struct drm_cmdline_mode *cmd)
1241 struct drm_display_mode *mode;
1244 mode = drm_cvt_mode(dev,
1245 cmd->xres, cmd->yres,
1246 cmd->refresh_specified ? cmd->refresh : 60,
1247 cmd->rb, cmd->interlace,
1250 mode = drm_gtf_mode(dev,
1251 cmd->xres, cmd->yres,
1252 cmd->refresh_specified ? cmd->refresh : 60,
1258 mode->type |= DRM_MODE_TYPE_USERDEF;
1259 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1262 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);