2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 /* $FreeBSD: src/sys/dev/sym/sym_hipd.c,v 1.6.2.12 2001/12/02 19:01:10 groudier Exp $ */
59 /* $DragonFly: src/sys/dev/disk/sym/sym_hipd.c,v 1.8 2004/06/21 15:45:42 dillon Exp $ */
61 #define SYM_DRIVER_NAME "sym-1.6.5-20000902"
63 /* #define SYM_DEBUG_GENERIC_SUPPORT */
64 /* #define CAM_NEW_TRAN_CODE */
67 #include <sys/param.h>
70 * Only use the BUS stuff for PCI under FreeBSD 4 and later versions.
71 * Note that the old BUS stuff also works for FreeBSD 4 and spares
72 * about 1 KB for the driver object file.
74 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
75 #define FreeBSD_Bus_Dma_Abstraction
76 #define FreeBSD_Bus_Io_Abstraction
77 #define FreeBSD_Bus_Space_Abstraction
81 * Driver configuration options.
86 #ifndef FreeBSD_Bus_Io_Abstraction
87 #include "use_ncr.h" /* To know if the ncr has been configured */
90 #include <sys/systm.h>
91 #include <sys/malloc.h>
92 #include <sys/kernel.h>
93 #ifdef FreeBSD_Bus_Io_Abstraction
94 #include <sys/module.h>
100 #include <bus/pci/pcireg.h>
101 #include <bus/pci/pcivar.h>
103 #ifdef FreeBSD_Bus_Space_Abstraction
104 #include <machine/bus_memio.h>
106 * Only include bus_pio if needed.
107 * This avoids bus space primitives to be uselessly bloated
108 * by out-of-age PIO operations.
110 #ifdef SYM_CONF_IOMAPPED
111 #include <machine/bus_pio.h>
114 #include <machine/bus.h>
116 #ifdef FreeBSD_Bus_Io_Abstraction
117 #include <machine/resource.h>
118 #include <sys/rman.h>
120 #include <machine/clock.h>
122 #include <bus/cam/cam.h>
123 #include <bus/cam/cam_ccb.h>
124 #include <bus/cam/cam_sim.h>
125 #include <bus/cam/cam_xpt_sim.h>
126 #include <bus/cam/cam_debug.h>
128 #include <bus/cam/scsi/scsi_all.h>
129 #include <bus/cam/scsi/scsi_message.h>
132 #include <vm/vm_param.h>
135 /* Short and quite clear integer types */
140 typedef u_int16_t u16;
141 typedef u_int32_t u32;
144 * From 'cam.error_recovery_diffs.20010313.context' patch.
146 #ifdef CAM_NEW_TRAN_CODE
147 #define FreeBSD_New_Tran_Settings
148 #endif /* CAM_NEW_TRAN_CODE */
151 * Driver definitions.
153 #include "sym_defs.h"
157 * IA32 architecture does not reorder STORES and prevents
158 * LOADS from passing STORES. It is called `program order'
159 * by Intel and allows device drivers to deal with memory
160 * ordering by only ensuring that the code is not reordered
161 * by the compiler when ordering is required.
162 * Other architectures implement a weaker ordering that
163 * requires memory barriers (and also IO barriers when they
164 * make sense) to be used.
168 #define MEMORY_BARRIER() do { ; } while(0)
169 #elif defined __alpha__
170 #define MEMORY_BARRIER() alpha_mb()
171 #elif defined __powerpc__
172 #define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory")
173 #elif defined __ia64__
174 #define MEMORY_BARRIER() __asm__ volatile("mf.a; mf" : : : "memory")
175 #elif defined __sparc64__
176 #define MEMORY_BARRIER() __asm__ volatile("membar #Sync" : : : "memory")
178 #error "Not supported platform"
182 * Portable but silly implemented byte order primitives.
183 * We define the primitives we need, since FreeBSD doesn't
184 * seem to have them yet.
186 #if BYTE_ORDER == BIG_ENDIAN
188 #define __revb16(x) ( (((u16)(x) & (u16)0x00ffU) << 8) | \
189 (((u16)(x) & (u16)0xff00U) >> 8) )
190 #define __revb32(x) ( (((u32)(x) & 0x000000ffU) << 24) | \
191 (((u32)(x) & 0x0000ff00U) << 8) | \
192 (((u32)(x) & 0x00ff0000U) >> 8) | \
193 (((u32)(x) & 0xff000000U) >> 24) )
195 #define __htole16(v) __revb16(v)
196 #define __htole32(v) __revb32(v)
197 #define __le16toh(v) __htole16(v)
198 #define __le32toh(v) __htole32(v)
200 static __inline u16 _htole16(u16 v) { return __htole16(v); }
201 static __inline u32 _htole32(u32 v) { return __htole32(v); }
202 #define _le16toh _htole16
203 #define _le32toh _htole32
205 #else /* LITTLE ENDIAN */
207 #define __htole16(v) (v)
208 #define __htole32(v) (v)
209 #define __le16toh(v) (v)
210 #define __le32toh(v) (v)
212 #define _htole16(v) (v)
213 #define _htole32(v) (v)
214 #define _le16toh(v) (v)
215 #define _le32toh(v) (v)
217 #endif /* BYTE_ORDER */
220 * A la VMS/CAM-3 queue management.
223 typedef struct sym_quehead {
224 struct sym_quehead *flink; /* Forward pointer */
225 struct sym_quehead *blink; /* Backward pointer */
228 #define sym_que_init(ptr) do { \
229 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
232 static __inline struct sym_quehead *sym_que_first(struct sym_quehead *head)
234 return (head->flink == head) ? 0 : head->flink;
237 static __inline struct sym_quehead *sym_que_last(struct sym_quehead *head)
239 return (head->blink == head) ? 0 : head->blink;
242 static __inline void __sym_que_add(struct sym_quehead * new,
243 struct sym_quehead * blink,
244 struct sym_quehead * flink)
252 static __inline void __sym_que_del(struct sym_quehead * blink,
253 struct sym_quehead * flink)
255 flink->blink = blink;
256 blink->flink = flink;
259 static __inline int sym_que_empty(struct sym_quehead *head)
261 return head->flink == head;
264 static __inline void sym_que_splice(struct sym_quehead *list,
265 struct sym_quehead *head)
267 struct sym_quehead *first = list->flink;
270 struct sym_quehead *last = list->blink;
271 struct sym_quehead *at = head->flink;
281 #define sym_que_entry(ptr, type, member) \
282 ((type *)((char *)(ptr)-(unsigned int)(&((type *)0)->member)))
285 #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
287 #define sym_remque(el) __sym_que_del((el)->blink, (el)->flink)
289 #define sym_insque_head(new, head) __sym_que_add(new, head, (head)->flink)
291 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
293 struct sym_quehead *elem = head->flink;
296 __sym_que_del(head, elem->flink);
302 #define sym_insque_tail(new, head) __sym_que_add(new, (head)->blink, head)
304 static __inline struct sym_quehead *sym_remque_tail(struct sym_quehead *head)
306 struct sym_quehead *elem = head->blink;
309 __sym_que_del(elem->blink, head);
316 * This one may be useful.
318 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
319 for (qp = (head)->flink; qp != (head); qp = qp->flink)
321 * FreeBSD does not offer our kind of queue in the CAM CCB.
322 * So, we have to cast.
324 #define sym_qptr(p) ((struct sym_quehead *) (p))
327 * Simple bitmap operations.
329 #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
330 #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
331 #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
334 * Number of tasks per device we want to handle.
336 #if SYM_CONF_MAX_TAG_ORDER > 8
337 #error "more than 256 tags per logical unit not allowed."
339 #define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
342 * Donnot use more tasks that we can handle.
344 #ifndef SYM_CONF_MAX_TAG
345 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
347 #if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
348 #undef SYM_CONF_MAX_TAG
349 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
353 * This one means 'NO TAG for this job'
358 * Number of SCSI targets.
360 #if SYM_CONF_MAX_TARGET > 16
361 #error "more than 16 targets not allowed."
365 * Number of logical units per target.
367 #if SYM_CONF_MAX_LUN > 64
368 #error "more than 64 logical units per target not allowed."
372 * Asynchronous pre-scaler (ns). Shall be 40 for
373 * the SCSI timings to be compliant.
375 #define SYM_CONF_MIN_ASYNC (40)
378 * Number of entries in the START and DONE queues.
380 * We limit to 1 PAGE in order to succeed allocation of
381 * these queues. Each entry is 8 bytes long (2 DWORDS).
383 #ifdef SYM_CONF_MAX_START
384 #define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
386 #define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
387 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
390 #if SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
391 #undef SYM_CONF_MAX_QUEUE
392 #define SYM_CONF_MAX_QUEUE PAGE_SIZE/8
393 #undef SYM_CONF_MAX_START
394 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
398 * For this one, we want a short name :-)
400 #define MAX_QUEUE SYM_CONF_MAX_QUEUE
403 * Active debugging tags and verbosity.
405 #define DEBUG_ALLOC (0x0001)
406 #define DEBUG_PHASE (0x0002)
407 #define DEBUG_POLL (0x0004)
408 #define DEBUG_QUEUE (0x0008)
409 #define DEBUG_RESULT (0x0010)
410 #define DEBUG_SCATTER (0x0020)
411 #define DEBUG_SCRIPT (0x0040)
412 #define DEBUG_TINY (0x0080)
413 #define DEBUG_TIMING (0x0100)
414 #define DEBUG_NEGO (0x0200)
415 #define DEBUG_TAGS (0x0400)
416 #define DEBUG_POINTER (0x0800)
419 static int sym_debug = 0;
420 #define DEBUG_FLAGS sym_debug
422 /* #define DEBUG_FLAGS (0x0631) */
423 #define DEBUG_FLAGS (0x0000)
426 #define sym_verbose (np->verbose)
429 * Insert a delay in micro-seconds and milli-seconds.
431 static void UDELAY(int us) { DELAY(us); }
432 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
435 * Simple power of two buddy-like allocator.
437 * This simple code is not intended to be fast, but to
438 * provide power of 2 aligned memory allocations.
439 * Since the SCRIPTS processor only supplies 8 bit arithmetic,
440 * this allocator allows simple and fast address calculations
441 * from the SCRIPTS code. In addition, cache line alignment
442 * is guaranteed for power of 2 cache line size.
444 * This allocator has been developped for the Linux sym53c8xx
445 * driver, since this O/S does not provide naturally aligned
447 * It has the advantage of allowing the driver to use private
448 * pages of memory that will be useful if we ever need to deal
449 * with IO MMUs for PCI.
452 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
453 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
455 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
458 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
459 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
460 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
462 #define get_pages() malloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_INTWAIT)
463 #define free_pages(p) free((p), M_DEVBUF)
465 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
467 typedef struct m_link { /* Link between free memory chunks */
471 #ifdef FreeBSD_Bus_Dma_Abstraction
472 typedef struct m_vtob { /* Virtual to Bus address translation */
474 bus_dmamap_t dmamap; /* Map for this chunk */
475 m_addr_t vaddr; /* Virtual address */
476 m_addr_t baddr; /* Bus physical address */
478 /* Hash this stuff a bit to speed up translations */
479 #define VTOB_HASH_SHIFT 5
480 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
481 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
482 #define VTOB_HASH_CODE(m) \
483 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
486 typedef struct m_pool { /* Memory pool of a given kind */
487 #ifdef FreeBSD_Bus_Dma_Abstraction
488 bus_dma_tag_t dev_dmat; /* Identifies the pool */
489 bus_dma_tag_t dmat; /* Tag for our fixed allocations */
490 m_addr_t (*getp)(struct m_pool *);
491 #ifdef MEMO_FREE_UNUSED
492 void (*freep)(struct m_pool *, m_addr_t);
494 #define M_GETP() mp->getp(mp)
495 #define M_FREEP(p) mp->freep(mp, p)
497 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
500 #define M_GETP() get_pages()
501 #define M_FREEP(p) free_pages(p)
502 #endif /* FreeBSD_Bus_Dma_Abstraction */
503 struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
506 static void *___sym_malloc(m_pool_s *mp, int size)
509 int s = (1 << MEMO_SHIFT);
514 if (size > MEMO_CLUSTER_SIZE)
524 if (s == MEMO_CLUSTER_SIZE) {
525 h[j].next = (m_link_s *) M_GETP();
533 a = (m_addr_t) h[j].next;
535 h[j].next = h[j].next->next;
539 h[j].next = (m_link_s *) (a+s);
544 printf("___sym_malloc(%d) = %p\n", size, (void *) a);
549 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
552 int s = (1 << MEMO_SHIFT);
558 printf("___sym_mfree(%p, %d)\n", ptr, size);
561 if (size > MEMO_CLUSTER_SIZE)
572 #ifdef MEMO_FREE_UNUSED
573 if (s == MEMO_CLUSTER_SIZE) {
580 while (q->next && q->next != (m_link_s *) b) {
584 ((m_link_s *) a)->next = h[i].next;
585 h[i].next = (m_link_s *) a;
588 q->next = q->next->next;
595 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
599 p = ___sym_malloc(mp, size);
601 if (DEBUG_FLAGS & DEBUG_ALLOC)
602 printf ("new %-10s[%4d] @%p.\n", name, size, p);
606 else if (uflags & MEMO_WARN)
607 printf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
612 #define __sym_calloc(mp, s, n) __sym_calloc2(mp, s, n, MEMO_WARN)
614 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
616 if (DEBUG_FLAGS & DEBUG_ALLOC)
617 printf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
619 ___sym_mfree(mp, ptr, size);
624 * Default memory pool we donnot need to involve in DMA.
626 #ifndef FreeBSD_Bus_Dma_Abstraction
628 * Without the `bus dma abstraction', all the memory is assumed
629 * DMAable and a single pool is all what we need.
635 * With the `bus dma abstraction', we use a separate pool for
636 * memory we donnot need to involve in DMA.
638 static m_addr_t ___mp0_getp(m_pool_s *mp)
640 m_addr_t m = (m_addr_t) get_pages();
646 #ifdef MEMO_FREE_UNUSED
647 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
654 #ifdef MEMO_FREE_UNUSED
655 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
657 static m_pool_s mp0 = {0, 0, ___mp0_getp};
660 #endif /* FreeBSD_Bus_Dma_Abstraction */
663 * Actual memory allocation routine for non-DMAed memory.
665 static void *sym_calloc(int size, char *name)
669 m = __sym_calloc(&mp0, size, name);
675 * Actual memory allocation routine for non-DMAed memory.
677 static void sym_mfree(void *ptr, int size, char *name)
680 __sym_mfree(&mp0, ptr, size, name);
687 #ifndef FreeBSD_Bus_Dma_Abstraction
689 * Without `bus dma abstraction', all the memory is DMAable, and
690 * only a single pool is needed (vtophys() is our friend).
692 #define __sym_calloc_dma(b, s, n) sym_calloc(s, n)
693 #define __sym_mfree_dma(b, p, s, n) sym_mfree(p, s, n)
695 #define __vtobus(b, p) alpha_XXX_dmamap((vm_offset_t)(p))
696 #else /*__i386__, __sparc64__*/
697 #define __vtobus(b, p) vtophys(p)
702 * With `bus dma abstraction', we use a separate pool per parent
703 * BUS handle. A reverse table (hashed) is maintained for virtual
704 * to BUS address translation.
706 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
709 baddr = (bus_addr_t *)arg;
710 *baddr = segs->ds_addr;
713 static m_addr_t ___dma_getp(m_pool_s *mp)
717 bus_addr_t baddr = 0;
719 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
723 if (bus_dmamem_alloc(mp->dmat, &vaddr,
724 BUS_DMA_NOWAIT, &vbp->dmamap))
726 bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
727 MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, 0);
729 int hc = VTOB_HASH_CODE(vaddr);
730 vbp->vaddr = (m_addr_t) vaddr;
731 vbp->baddr = (m_addr_t) baddr;
732 vbp->next = mp->vtob[hc];
735 return (m_addr_t) vaddr;
739 bus_dmamap_unload(mp->dmat, vbp->dmamap);
741 bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
743 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
745 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
749 #ifdef MEMO_FREE_UNUSED
750 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
752 m_vtob_s **vbpp, *vbp;
753 int hc = VTOB_HASH_CODE(m);
755 vbpp = &mp->vtob[hc];
756 while (*vbpp && (*vbpp)->vaddr != m)
757 vbpp = &(*vbpp)->next;
760 *vbpp = (*vbpp)->next;
761 bus_dmamap_unload(mp->dmat, vbp->dmamap);
762 bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
763 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
764 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
770 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
773 for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
777 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
781 mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
783 mp->dev_dmat = dev_dmat;
784 if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
785 BUS_SPACE_MAXADDR_32BIT,
786 BUS_SPACE_MAXADDR_32BIT,
787 NULL, NULL, MEMO_CLUSTER_SIZE, 1,
788 MEMO_CLUSTER_SIZE, 0, &mp->dmat)) {
789 mp->getp = ___dma_getp;
790 #ifdef MEMO_FREE_UNUSED
791 mp->freep = ___dma_freep;
799 __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
803 #ifdef MEMO_FREE_UNUSED
804 static void ___del_dma_pool(m_pool_s *p)
806 struct m_pool **pp = &mp0.next;
808 while (*pp && *pp != p)
812 bus_dma_tag_destroy(p->dmat);
813 __sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
818 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
824 mp = ___get_dma_pool(dev_dmat);
826 mp = ___cre_dma_pool(dev_dmat);
828 m = __sym_calloc(mp, size, name);
829 #ifdef MEMO_FREE_UNUSED
839 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
844 mp = ___get_dma_pool(dev_dmat);
846 __sym_mfree(mp, m, size, name);
847 #ifdef MEMO_FREE_UNUSED
854 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
857 int hc = VTOB_HASH_CODE(m);
859 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
862 mp = ___get_dma_pool(dev_dmat);
865 while (vp && (m_addr_t) vp->vaddr != a)
870 panic("sym: VTOBUS FAILED!\n");
871 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
874 #endif /* FreeBSD_Bus_Dma_Abstraction */
877 * Verbs for DMAable memory handling.
878 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
881 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
882 #define _sym_calloc_dma(np, s, n) __sym_calloc_dma(np->bus_dmat, s, n)
883 #define _sym_mfree_dma(np, p, s, n) \
884 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
885 #define sym_calloc_dma(s, n) _sym_calloc_dma(np, s, n)
886 #define sym_mfree_dma(p, s, n) _sym_mfree_dma(np, p, s, n)
887 #define _vtobus(np, p) __vtobus(np->bus_dmat, _uvptv_(p))
888 #define vtobus(p) _vtobus(np, p)
892 * Print a buffer in hexadecimal format.
894 static void sym_printb_hex (u_char *p, int n)
897 printf (" %x", *p++);
901 * Same with a label at beginning and .\n at end.
903 static void sym_printl_hex (char *label, u_char *p, int n)
905 printf ("%s", label);
906 sym_printb_hex (p, n);
911 * Return a string for SCSI BUS mode.
913 static char *sym_scsi_bus_mode(int mode)
916 case SMODE_HVD: return "HVD";
917 case SMODE_SE: return "SE";
918 case SMODE_LVD: return "LVD";
924 * Some poor and bogus sync table that refers to Tekram NVRAM layout.
926 #ifdef SYM_CONF_NVRAM_SUPPORT
927 static u_char Tekram_sync[16] =
928 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
932 * Union of supported NVRAM formats.
936 #define SYM_SYMBIOS_NVRAM (1)
937 #define SYM_TEKRAM_NVRAM (2)
938 #ifdef SYM_CONF_NVRAM_SUPPORT
940 Symbios_nvram Symbios;
947 * This one is hopefully useless, but actually useful. :-)
950 #define assert(expression) { \
951 if (!(expression)) { \
953 "assertion \"%s\" failed: file \"%s\", line %d\n", \
955 __FILE__, __LINE__); \
961 * Some provision for a possible big endian mode supported by
962 * Symbios chips (never seen, by the way).
963 * For now, this stuff does not deserve any comments. :)
966 #define sym_offb(o) (o)
967 #define sym_offw(o) (o)
970 * Some provision for support for BIG ENDIAN CPU.
971 * Btw, FreeBSD does not seem to be ready yet for big endian.
974 #if BYTE_ORDER == BIG_ENDIAN
975 #define cpu_to_scr(dw) _htole32(dw)
976 #define scr_to_cpu(dw) _le32toh(dw)
978 #define cpu_to_scr(dw) (dw)
979 #define scr_to_cpu(dw) (dw)
983 * Access to the chip IO registers and on-chip RAM.
984 * We use the `bus space' interface under FreeBSD-4 and
985 * later kernel versions.
988 #ifdef FreeBSD_Bus_Space_Abstraction
990 #if defined(SYM_CONF_IOMAPPED)
992 #define INB_OFF(o) bus_space_read_1(np->io_tag, np->io_bsh, o)
993 #define INW_OFF(o) bus_space_read_2(np->io_tag, np->io_bsh, o)
994 #define INL_OFF(o) bus_space_read_4(np->io_tag, np->io_bsh, o)
996 #define OUTB_OFF(o, v) bus_space_write_1(np->io_tag, np->io_bsh, o, (v))
997 #define OUTW_OFF(o, v) bus_space_write_2(np->io_tag, np->io_bsh, o, (v))
998 #define OUTL_OFF(o, v) bus_space_write_4(np->io_tag, np->io_bsh, o, (v))
1000 #else /* Memory mapped IO */
1002 #define INB_OFF(o) bus_space_read_1(np->mmio_tag, np->mmio_bsh, o)
1003 #define INW_OFF(o) bus_space_read_2(np->mmio_tag, np->mmio_bsh, o)
1004 #define INL_OFF(o) bus_space_read_4(np->mmio_tag, np->mmio_bsh, o)
1006 #define OUTB_OFF(o, v) bus_space_write_1(np->mmio_tag, np->mmio_bsh, o, (v))
1007 #define OUTW_OFF(o, v) bus_space_write_2(np->mmio_tag, np->mmio_bsh, o, (v))
1008 #define OUTL_OFF(o, v) bus_space_write_4(np->mmio_tag, np->mmio_bsh, o, (v))
1010 #endif /* SYM_CONF_IOMAPPED */
1012 #define OUTRAM_OFF(o, a, l) \
1013 bus_space_write_region_1(np->ram_tag, np->ram_bsh, o, (a), (l))
1015 #else /* not defined FreeBSD_Bus_Space_Abstraction */
1017 #if BYTE_ORDER == BIG_ENDIAN
1018 #error "BIG ENDIAN support requires bus space kernel interface"
1022 * Access to the chip IO registers and on-chip RAM.
1023 * We use legacy MMIO and IO interface for FreeBSD 3.X versions.
1027 * Define some understable verbs for IO and MMIO.
1029 #define io_read8(p) scr_to_cpu(inb((p)))
1030 #define io_read16(p) scr_to_cpu(inw((p)))
1031 #define io_read32(p) scr_to_cpu(inl((p)))
1032 #define io_write8(p, v) outb((p), cpu_to_scr(v))
1033 #define io_write16(p, v) outw((p), cpu_to_scr(v))
1034 #define io_write32(p, v) outl((p), cpu_to_scr(v))
1038 #define mmio_read8(a) readb(a)
1039 #define mmio_read16(a) readw(a)
1040 #define mmio_read32(a) readl(a)
1041 #define mmio_write8(a, b) writeb(a, b)
1042 #define mmio_write16(a, b) writew(a, b)
1043 #define mmio_write32(a, b) writel(a, b)
1044 #define memcpy_to_pci(d, s, n) memcpy_toio((u32)(d), (void *)(s), (n))
1046 #else /*__i386__, __sparc64__*/
1048 #define mmio_read8(a) scr_to_cpu((*(volatile unsigned char *) (a)))
1049 #define mmio_read16(a) scr_to_cpu((*(volatile unsigned short *) (a)))
1050 #define mmio_read32(a) scr_to_cpu((*(volatile unsigned int *) (a)))
1051 #define mmio_write8(a, b) (*(volatile unsigned char *) (a)) = cpu_to_scr(b)
1052 #define mmio_write16(a, b) (*(volatile unsigned short *) (a)) = cpu_to_scr(b)
1053 #define mmio_write32(a, b) (*(volatile unsigned int *) (a)) = cpu_to_scr(b)
1054 #define memcpy_to_pci(d, s, n) bcopy((s), (void *)(d), (n))
1061 #if defined(SYM_CONF_IOMAPPED)
1063 #define INB_OFF(o) io_read8(np->io_port + sym_offb(o))
1064 #define OUTB_OFF(o, v) io_write8(np->io_port + sym_offb(o), (v))
1066 #define INW_OFF(o) io_read16(np->io_port + sym_offw(o))
1067 #define OUTW_OFF(o, v) io_write16(np->io_port + sym_offw(o), (v))
1069 #define INL_OFF(o) io_read32(np->io_port + (o))
1070 #define OUTL_OFF(o, v) io_write32(np->io_port + (o), (v))
1072 #else /* Memory mapped IO */
1074 #define INB_OFF(o) mmio_read8(np->mmio_va + sym_offb(o))
1075 #define OUTB_OFF(o, v) mmio_write8(np->mmio_va + sym_offb(o), (v))
1077 #define INW_OFF(o) mmio_read16(np->mmio_va + sym_offw(o))
1078 #define OUTW_OFF(o, v) mmio_write16(np->mmio_va + sym_offw(o), (v))
1080 #define INL_OFF(o) mmio_read32(np->mmio_va + (o))
1081 #define OUTL_OFF(o, v) mmio_write32(np->mmio_va + (o), (v))
1085 #define OUTRAM_OFF(o, a, l) memcpy_to_pci(np->ram_va + (o), (a), (l))
1087 #endif /* FreeBSD_Bus_Space_Abstraction */
1090 * Common definitions for both bus space and legacy IO methods.
1092 #define INB(r) INB_OFF(offsetof(struct sym_reg,r))
1093 #define INW(r) INW_OFF(offsetof(struct sym_reg,r))
1094 #define INL(r) INL_OFF(offsetof(struct sym_reg,r))
1096 #define OUTB(r, v) OUTB_OFF(offsetof(struct sym_reg,r), (v))
1097 #define OUTW(r, v) OUTW_OFF(offsetof(struct sym_reg,r), (v))
1098 #define OUTL(r, v) OUTL_OFF(offsetof(struct sym_reg,r), (v))
1100 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
1101 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
1102 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
1103 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
1104 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
1105 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
1108 * We normally want the chip to have a consistent view
1109 * of driver internal data structures when we restart it.
1110 * Thus these macros.
1112 #define OUTL_DSP(v) \
1115 OUTL (nc_dsp, (v)); \
1118 #define OUTONB_STD() \
1121 OUTONB (nc_dcntl, (STD|NOCOM)); \
1125 * Command control block states.
1129 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
1130 #define HS_DISCONNECT (3) /* Disconnected by target */
1131 #define HS_WAIT (4) /* waiting for resource */
1133 #define HS_DONEMASK (0x80)
1134 #define HS_COMPLETE (4|HS_DONEMASK)
1135 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
1136 #define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
1137 #define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
1140 * Software Interrupt Codes
1142 #define SIR_BAD_SCSI_STATUS (1)
1143 #define SIR_SEL_ATN_NO_MSG_OUT (2)
1144 #define SIR_MSG_RECEIVED (3)
1145 #define SIR_MSG_WEIRD (4)
1146 #define SIR_NEGO_FAILED (5)
1147 #define SIR_NEGO_PROTO (6)
1148 #define SIR_SCRIPT_STOPPED (7)
1149 #define SIR_REJECT_TO_SEND (8)
1150 #define SIR_SWIDE_OVERRUN (9)
1151 #define SIR_SODL_UNDERRUN (10)
1152 #define SIR_RESEL_NO_MSG_IN (11)
1153 #define SIR_RESEL_NO_IDENTIFY (12)
1154 #define SIR_RESEL_BAD_LUN (13)
1155 #define SIR_TARGET_SELECTED (14)
1156 #define SIR_RESEL_BAD_I_T_L (15)
1157 #define SIR_RESEL_BAD_I_T_L_Q (16)
1158 #define SIR_ABORT_SENT (17)
1159 #define SIR_RESEL_ABORTED (18)
1160 #define SIR_MSG_OUT_DONE (19)
1161 #define SIR_COMPLETE_ERROR (20)
1162 #define SIR_DATA_OVERRUN (21)
1163 #define SIR_BAD_PHASE (22)
1164 #define SIR_MAX (22)
1167 * Extended error bit codes.
1168 * xerr_status field of struct sym_ccb.
1170 #define XE_EXTRA_DATA (1) /* unexpected data phase */
1171 #define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
1172 #define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
1173 #define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
1174 #define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
1177 * Negotiation status.
1178 * nego_status field of struct sym_ccb.
1185 * A CCB hashed table is used to retrieve CCB address
1188 #define CCB_HASH_SHIFT 8
1189 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
1190 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
1191 #define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
1196 #define SYM_DISC_ENABLED (1)
1197 #define SYM_TAGS_ENABLED (1<<1)
1198 #define SYM_SCAN_BOOT_DISABLED (1<<2)
1199 #define SYM_SCAN_LUNS_DISABLED (1<<3)
1202 * Host adapter miscellaneous flags.
1204 #define SYM_AVOID_BUS_RESET (1)
1205 #define SYM_SCAN_TARGETS_HILO (1<<1)
1209 * Some devices, for example the CHEETAH 2 LVD, disconnects without
1210 * saving the DATA POINTER then reselects and terminates the IO.
1211 * On reselection, the automatic RESTORE DATA POINTER makes the
1212 * CURRENT DATA POINTER not point at the end of the IO.
1213 * This behaviour just breaks our calculation of the residual.
1214 * For now, we just force an AUTO SAVE on disconnection and will
1215 * fix that in a further driver version.
1217 #define SYM_QUIRK_AUTOSAVE 1
1222 #define SYM_SNOOP_TIMEOUT (10000000)
1223 #define SYM_PCI_IO PCIR_MAPS
1224 #define SYM_PCI_MMIO (PCIR_MAPS + 4)
1225 #define SYM_PCI_RAM (PCIR_MAPS + 8)
1226 #define SYM_PCI_RAM64 (PCIR_MAPS + 12)
1229 * Back-pointer from the CAM CCB to our data structures.
1231 #define sym_hcb_ptr spriv_ptr0
1232 /* #define sym_ccb_ptr spriv_ptr1 */
1235 * We mostly have to deal with pointers.
1236 * Thus these typedef's.
1238 typedef struct sym_tcb *tcb_p;
1239 typedef struct sym_lcb *lcb_p;
1240 typedef struct sym_ccb *ccb_p;
1241 typedef struct sym_hcb *hcb_p;
1244 * Gather negotiable parameters value
1247 #ifdef FreeBSD_New_Tran_Settings
1254 u8 options; /* PPR options */
1258 struct sym_trans current;
1259 struct sym_trans goal;
1260 struct sym_trans user;
1263 #define BUS_8_BIT MSG_EXT_WDTR_BUS_8_BIT
1264 #define BUS_16_BIT MSG_EXT_WDTR_BUS_16_BIT
1267 * Global TCB HEADER.
1269 * Due to lack of indirect addressing on earlier NCR chips,
1270 * this substructure is copied from the TCB to a global
1271 * address after selection.
1272 * For SYMBIOS chips that support LOAD/STORE this copy is
1273 * not needed and thus not performed.
1277 * Scripts bus addresses of LUN table accessed from scripts.
1278 * LUN #0 is a special case, since multi-lun devices are rare,
1279 * and we we want to speed-up the general case and not waste
1282 u32 luntbl_sa; /* bus address of this table */
1283 u32 lun0_sa; /* bus address of LCB #0 */
1285 * Actual SYNC/WIDE IO registers value for this target.
1286 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
1287 * so have alignment constraints.
1289 /*0*/ u_char uval; /* -> SCNTL4 register */
1290 /*1*/ u_char sval; /* -> SXFER io register */
1291 /*2*/ u_char filler1;
1292 /*3*/ u_char wval; /* -> SCNTL3 io register */
1296 * Target Control Block
1301 * Assumed at offset 0.
1303 /*0*/ struct sym_tcbh head;
1306 * LUN table used by the SCRIPTS processor.
1307 * An array of bus addresses is used on reselection.
1309 u32 *luntbl; /* LCBs bus address table */
1312 * LUN table used by the C code.
1314 lcb_p lun0p; /* LCB of LUN #0 (usual case) */
1315 #if SYM_CONF_MAX_LUN > 1
1316 lcb_p *lunmp; /* Other LCBs [1..MAX_LUN] */
1320 * Bitmap that tells about LUNs that succeeded at least
1321 * 1 IO and therefore assumed to be a real device.
1322 * Avoid useless allocation of the LCB structure.
1324 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
1327 * Bitmap that tells about LUNs that haven't yet an LCB
1328 * allocated (not discovered or LCB allocation failed).
1330 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1333 * Transfer capabilities (SIP)
1335 struct sym_tinfo tinfo;
1338 * Keep track of the CCB used for the negotiation in order
1339 * to ensure that only 1 negotiation is queued at a time.
1341 ccb_p nego_cp; /* CCB used for the nego */
1344 * Set when we want to reset the device.
1349 * Other user settable limits and options.
1350 * These limits are read from the NVRAM if present.
1357 * Global LCB HEADER.
1359 * Due to lack of indirect addressing on earlier NCR chips,
1360 * this substructure is copied from the LCB to a global
1361 * address after selection.
1362 * For SYMBIOS chips that support LOAD/STORE this copy is
1363 * not needed and thus not performed.
1367 * SCRIPTS address jumped by SCRIPTS on reselection.
1368 * For not probed logical units, this address points to
1369 * SCRIPTS that deal with bad LU handling (must be at
1370 * offset zero of the LCB for that reason).
1375 * Task (bus address of a CCB) read from SCRIPTS that points
1376 * to the unique ITL nexus allowed to be disconnected.
1381 * Task table bus address (read from SCRIPTS).
1387 * Logical Unit Control Block
1392 * Assumed at offset 0.
1394 /*0*/ struct sym_lcbh head;
1397 * Task table read from SCRIPTS that contains pointers to
1398 * ITLQ nexuses. The bus address read from SCRIPTS is
1399 * inside the header.
1401 u32 *itlq_tbl; /* Kernel virtual address */
1404 * Busy CCBs management.
1406 u_short busy_itlq; /* Number of busy tagged CCBs */
1407 u_short busy_itl; /* Number of busy untagged CCBs */
1410 * Circular tag allocation buffer.
1412 u_short ia_tag; /* Tag allocation index */
1413 u_short if_tag; /* Tag release index */
1414 u_char *cb_tags; /* Circular tags buffer */
1417 * Set when we want to clear all tasks.
1425 u_char current_flags;
1429 * Action from SCRIPTS on a task.
1430 * Is part of the CCB, but is also used separately to plug
1431 * error handling action to perform from SCRIPTS.
1434 u32 start; /* Jumped by SCRIPTS after selection */
1435 u32 restart; /* Jumped by SCRIPTS on relection */
1439 * Phase mismatch context.
1441 * It is part of the CCB and is used as parameters for the
1442 * DATA pointer. We need two contexts to handle correctly the
1443 * SAVED DATA POINTER.
1446 struct sym_tblmove sg; /* Updated interrupted SG block */
1447 u32 ret; /* SCRIPT return address */
1451 * LUN control block lookup.
1452 * We use a direct pointer for LUN #0, and a table of
1453 * pointers which is only allocated for devices that support
1456 #if SYM_CONF_MAX_LUN <= 1
1457 #define sym_lp(np, tp, lun) (!lun) ? (tp)->lun0p : 0
1459 #define sym_lp(np, tp, lun) \
1460 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1464 * Status are used by the host and the script processor.
1466 * The last four bytes (status[4]) are copied to the
1467 * scratchb register (declared as scr0..scr3) just after the
1468 * select/reselect, and copied back just after disconnecting.
1469 * Inside the script the XX_REG are used.
1473 * Last four bytes (script)
1477 #define HS_PRT nc_scr1
1479 #define SS_PRT nc_scr2
1481 #define HF_PRT nc_scr3
1484 * Last four bytes (host)
1486 #define actualquirks phys.head.status[0]
1487 #define host_status phys.head.status[1]
1488 #define ssss_status phys.head.status[2]
1489 #define host_flags phys.head.status[3]
1494 #define HF_IN_PM0 1u
1495 #define HF_IN_PM1 (1u<<1)
1496 #define HF_ACT_PM (1u<<2)
1497 #define HF_DP_SAVED (1u<<3)
1498 #define HF_SENSE (1u<<4)
1499 #define HF_EXT_ERR (1u<<5)
1500 #define HF_DATA_IN (1u<<6)
1501 #ifdef SYM_CONF_IARB_SUPPORT
1502 #define HF_HINT_IARB (1u<<7)
1506 * Global CCB HEADER.
1508 * Due to lack of indirect addressing on earlier NCR chips,
1509 * this substructure is copied from the ccb to a global
1510 * address after selection (or reselection) and copied back
1511 * before disconnect.
1512 * For SYMBIOS chips that support LOAD/STORE this copy is
1513 * not needed and thus not performed.
1518 * Start and restart SCRIPTS addresses (must be at 0).
1520 /*0*/ struct sym_actscr go;
1523 * SCRIPTS jump address that deal with data pointers.
1524 * 'savep' points to the position in the script responsible
1525 * for the actual transfer of data.
1526 * It's written on reception of a SAVE_DATA_POINTER message.
1528 u32 savep; /* Jump address to saved data pointer */
1529 u32 lastp; /* SCRIPTS address at end of data */
1530 u32 goalp; /* Not accessed for now from SCRIPTS */
1539 * Data Structure Block
1541 * During execution of a ccb by the script processor, the
1542 * DSA (data structure address) register points to this
1543 * substructure of the ccb.
1548 * Also assumed at offset 0 of the sym_ccb structure.
1550 /*0*/ struct sym_ccbh head;
1553 * Phase mismatch contexts.
1554 * We need two to handle correctly the SAVED DATA POINTER.
1555 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1556 * for address calculation from SCRIPTS.
1562 * Table data for Script
1564 struct sym_tblsel select;
1565 struct sym_tblmove smsg;
1566 struct sym_tblmove smsg_ext;
1567 struct sym_tblmove cmd;
1568 struct sym_tblmove sense;
1569 struct sym_tblmove wresid;
1570 struct sym_tblmove data [SYM_CONF_MAX_SG];
1574 * Our Command Control Block
1578 * This is the data structure which is pointed by the DSA
1579 * register when it is executed by the script processor.
1580 * It must be the first entry.
1582 struct sym_dsb phys;
1585 * Pointer to CAM ccb and related stuff.
1587 union ccb *cam_ccb; /* CAM scsiio ccb */
1588 u8 cdb_buf[16]; /* Copy of CDB */
1589 u8 *sns_bbuf; /* Bounce buffer for sense data */
1590 #define SYM_SNS_BBUF_LEN sizeof(struct scsi_sense_data)
1591 int data_len; /* Total data length */
1592 int segments; /* Number of SG segments */
1595 * Miscellaneous status'.
1597 u_char nego_status; /* Negotiation status */
1598 u_char xerr_status; /* Extended error flags */
1599 u32 extra_bytes; /* Extraneous bytes transferred */
1603 * We prepare a message to be sent after selection.
1604 * We may use a second one if the command is rescheduled
1605 * due to CHECK_CONDITION or COMMAND TERMINATED.
1606 * Contents are IDENTIFY and SIMPLE_TAG.
1607 * While negotiating sync or wide transfer,
1608 * a SDTR or WDTR message is appended.
1610 u_char scsi_smsg [12];
1611 u_char scsi_smsg2[12];
1614 * Auto request sense related fields.
1616 u_char sensecmd[6]; /* Request Sense command */
1617 u_char sv_scsi_status; /* Saved SCSI status */
1618 u_char sv_xerr_status; /* Saved extended status */
1619 int sv_resid; /* Saved residual */
1622 * Map for the DMA of user data.
1624 #ifdef FreeBSD_Bus_Dma_Abstraction
1625 void *arg; /* Argument for some callback */
1626 bus_dmamap_t dmamap; /* DMA map for user data */
1628 #define SYM_DMA_NONE 0
1629 #define SYM_DMA_READ 1
1630 #define SYM_DMA_WRITE 2
1635 u32 ccb_ba; /* BUS address of this CCB */
1636 u_short tag; /* Tag for this transfer */
1637 /* NO_TAG means no tag */
1640 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1642 link_ccbq; /* Link to free/busy CCB queue */
1643 u32 startp; /* Initial data pointer */
1644 int ext_sg; /* Extreme data pointer, used */
1645 int ext_ofs; /* to calculate the residual. */
1646 u_char to_abort; /* Want this IO to be aborted */
1649 #define CCB_BA(cp,lbl) (cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1652 * Host Control Block
1657 * Due to poorness of addressing capabilities, earlier
1658 * chips (810, 815, 825) copy part of the data structures
1659 * (CCB, TCB and LCB) in fixed areas.
1661 #ifdef SYM_CONF_GENERIC_SUPPORT
1662 struct sym_ccbh ccb_head;
1663 struct sym_tcbh tcb_head;
1664 struct sym_lcbh lcb_head;
1667 * Idle task and invalid task actions and
1668 * their bus addresses.
1670 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1671 vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1674 * Dummy lun table to protect us against target
1675 * returning bad lun number on reselection.
1677 u32 *badluntbl; /* Table physical address */
1678 u32 badlun_sa; /* SCRIPT handler BUS address */
1681 * Bus address of this host control block.
1686 * Bit 32-63 of the on-chip RAM bus address in LE format.
1687 * The START_RAM64 script loads the MMRS and MMWS from this
1693 * Chip and controller indentification.
1695 #ifdef FreeBSD_Bus_Io_Abstraction
1704 * Initial value of some IO register bits.
1705 * These values are assumed to have been set by BIOS, and may
1706 * be used to probe adapter implementation differences.
1708 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1709 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1713 * Actual initial value of IO register bits used by the
1714 * driver. They are loaded at initialisation according to
1715 * features that are to be enabled/disabled.
1717 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1718 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1723 struct sym_tcb target[SYM_CONF_MAX_TARGET];
1726 * Target control block bus address array used by the SCRIPT
1733 * CAM SIM information for this instance.
1735 struct cam_sim *sim;
1736 struct cam_path *path;
1739 * Allocated hardware resources.
1741 #ifdef FreeBSD_Bus_Io_Abstraction
1742 struct resource *irq_res;
1743 struct resource *io_res;
1744 struct resource *mmio_res;
1745 struct resource *ram_res;
1753 * My understanding of PCI is that all agents must share the
1754 * same addressing range and model.
1755 * But some hardware architecture guys provide complex and
1756 * brain-deaded stuff that makes shit.
1757 * This driver only support PCI compliant implementations and
1758 * deals with part of the BUS stuff complexity only to fit O/S
1761 #ifdef FreeBSD_Bus_Io_Abstraction
1762 bus_space_handle_t io_bsh;
1763 bus_space_tag_t io_tag;
1764 bus_space_handle_t mmio_bsh;
1765 bus_space_tag_t mmio_tag;
1766 bus_space_handle_t ram_bsh;
1767 bus_space_tag_t ram_tag;
1773 #ifdef FreeBSD_Bus_Dma_Abstraction
1774 bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */
1775 bus_dma_tag_t data_dmat; /* DMA tag for user data */
1778 * Virtual and physical bus addresses of the chip.
1780 vm_offset_t mmio_va; /* MMIO kernel virtual address */
1781 vm_offset_t mmio_pa; /* MMIO CPU physical address */
1782 vm_offset_t mmio_ba; /* MMIO BUS address */
1783 int mmio_ws; /* MMIO Window size */
1785 vm_offset_t ram_va; /* RAM kernel virtual address */
1786 vm_offset_t ram_pa; /* RAM CPU physical address */
1787 vm_offset_t ram_ba; /* RAM BUS address */
1788 int ram_ws; /* RAM window size */
1789 u32 io_port; /* IO port address */
1792 * SCRIPTS virtual and physical bus addresses.
1793 * 'script' is loaded in the on-chip RAM if present.
1794 * 'scripth' stays in main memory for all chips except the
1795 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1797 u_char *scripta0; /* Copies of script and scripth */
1798 u_char *scriptb0; /* Copies of script and scripth */
1799 vm_offset_t scripta_ba; /* Actual script and scripth */
1800 vm_offset_t scriptb_ba; /* bus addresses. */
1801 vm_offset_t scriptb0_ba;
1802 u_short scripta_sz; /* Actual size of script A */
1803 u_short scriptb_sz; /* Actual size of script B */
1806 * Bus addresses, setup and patch methods for
1807 * the selected firmware.
1809 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
1810 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
1811 void (*fw_setup)(hcb_p np, struct sym_fw *fw);
1812 void (*fw_patch)(hcb_p np);
1816 * General controller parameters and configuration.
1818 u_short device_id; /* PCI device id */
1819 u_char revision_id; /* PCI device revision id */
1820 u_int features; /* Chip features map */
1821 u_char myaddr; /* SCSI id of the adapter */
1822 u_char maxburst; /* log base 2 of dwords burst */
1823 u_char maxwide; /* Maximum transfer width */
1824 u_char minsync; /* Min sync period factor (ST) */
1825 u_char maxsync; /* Max sync period factor (ST) */
1826 u_char maxoffs; /* Max scsi offset (ST) */
1827 u_char minsync_dt; /* Min sync period factor (DT) */
1828 u_char maxsync_dt; /* Max sync period factor (DT) */
1829 u_char maxoffs_dt; /* Max scsi offset (DT) */
1830 u_char multiplier; /* Clock multiplier (1,2,4) */
1831 u_char clock_divn; /* Number of clock divisors */
1832 u32 clock_khz; /* SCSI clock frequency in KHz */
1833 u32 pciclk_khz; /* Estimated PCI clock in KHz */
1835 * Start queue management.
1836 * It is filled up by the host processor and accessed by the
1837 * SCRIPTS processor in order to start SCSI commands.
1839 volatile /* Prevent code optimizations */
1840 u32 *squeue; /* Start queue virtual address */
1841 u32 squeue_ba; /* Start queue BUS address */
1842 u_short squeueput; /* Next free slot of the queue */
1843 u_short actccbs; /* Number of allocated CCBs */
1846 * Command completion queue.
1847 * It is the same size as the start queue to avoid overflow.
1849 u_short dqueueget; /* Next position to scan */
1850 volatile /* Prevent code optimizations */
1851 u32 *dqueue; /* Completion (done) queue */
1852 u32 dqueue_ba; /* Done queue BUS address */
1855 * Miscellaneous buffers accessed by the scripts-processor.
1856 * They shall be DWORD aligned, because they may be read or
1857 * written with a script command.
1859 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1860 u_char msgin [8]; /* Buffer for MESSAGE IN */
1861 u32 lastmsg; /* Last SCSI message sent */
1862 u_char scratch; /* Scratch for SCSI receive */
1865 * Miscellaneous configuration and status parameters.
1867 u_char usrflags; /* Miscellaneous user flags */
1868 u_char scsi_mode; /* Current SCSI BUS mode */
1869 u_char verbose; /* Verbosity for this controller*/
1870 u32 cache; /* Used for cache test at init. */
1873 * CCB lists and queue.
1875 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
1876 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1877 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1880 * During error handling and/or recovery,
1881 * active CCBs that are to be completed with
1882 * error or requeued are moved from the busy_ccbq
1883 * to the comp_ccbq prior to completion.
1885 SYM_QUEHEAD comp_ccbq;
1888 * CAM CCB pending queue.
1890 SYM_QUEHEAD cam_ccbq;
1893 * IMMEDIATE ARBITRATION (IARB) control.
1895 * We keep track in 'last_cp' of the last CCB that has been
1896 * queued to the SCRIPTS processor and clear 'last_cp' when
1897 * this CCB completes. If last_cp is not zero at the moment
1898 * we queue a new CCB, we set a flag in 'last_cp' that is
1899 * used by the SCRIPTS as a hint for setting IARB.
1900 * We donnot set more than 'iarb_max' consecutive hints for
1901 * IARB in order to leave devices a chance to reselect.
1902 * By the way, any non zero value of 'iarb_max' is unfair. :)
1904 #ifdef SYM_CONF_IARB_SUPPORT
1905 u_short iarb_max; /* Max. # consecutive IARB hints*/
1906 u_short iarb_count; /* Actual # of these hints */
1911 * Command abort handling.
1912 * We need to synchronize tightly with the SCRIPTS
1913 * processor in order to handle things correctly.
1915 u_char abrt_msg[4]; /* Message to send buffer */
1916 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1917 struct sym_tblsel abrt_sel; /* Sync params for selection */
1918 u_char istat_sem; /* Tells the chip to stop (SEM) */
1921 #define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1924 * Return the name of the controller.
1926 static __inline char *sym_name(hcb_p np)
1928 return np->inst_name;
1931 /*--------------------------------------------------------------------------*/
1932 /*------------------------------ FIRMWARES ---------------------------------*/
1933 /*--------------------------------------------------------------------------*/
1936 * This stuff will be moved to a separate source file when
1937 * the driver will be broken into several source modules.
1941 * Macros used for all firmwares.
1943 #define SYM_GEN_A(s, label) ((short) offsetof(s, label)),
1944 #define SYM_GEN_B(s, label) ((short) offsetof(s, label)),
1945 #define PADDR_A(label) SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1946 #define PADDR_B(label) SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1949 #ifdef SYM_CONF_GENERIC_SUPPORT
1951 * Allocate firmware #1 script area.
1953 #define SYM_FWA_SCR sym_fw1a_scr
1954 #define SYM_FWB_SCR sym_fw1b_scr
1955 #include "sym_fw1.h"
1956 struct sym_fwa_ofs sym_fw1a_ofs = {
1957 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1959 struct sym_fwb_ofs sym_fw1b_ofs = {
1960 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1964 #endif /* SYM_CONF_GENERIC_SUPPORT */
1967 * Allocate firmware #2 script area.
1969 #define SYM_FWA_SCR sym_fw2a_scr
1970 #define SYM_FWB_SCR sym_fw2b_scr
1971 #include "sym_fw2.h"
1972 struct sym_fwa_ofs sym_fw2a_ofs = {
1973 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1975 struct sym_fwb_ofs sym_fw2b_ofs = {
1976 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1977 SYM_GEN_B(struct SYM_FWB_SCR, start64)
1978 SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1988 #ifdef SYM_CONF_GENERIC_SUPPORT
1990 * Patch routine for firmware #1.
1993 sym_fw1_patch(hcb_p np)
1995 struct sym_fw1a_scr *scripta0;
1996 struct sym_fw1b_scr *scriptb0;
1998 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1999 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
2002 * Remove LED support if not needed.
2004 if (!(np->features & FE_LED0)) {
2005 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
2006 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
2007 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
2010 #ifdef SYM_CONF_IARB_SUPPORT
2012 * If user does not want to use IMMEDIATE ARBITRATION
2013 * when we are reselected while attempting to arbitrate,
2014 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
2016 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
2017 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
2020 * Patch some data in SCRIPTS.
2021 * - start and done queue initial bus address.
2022 * - target bus address table bus address.
2024 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
2025 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
2026 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
2028 #endif /* SYM_CONF_GENERIC_SUPPORT */
2031 * Patch routine for firmware #2.
2034 sym_fw2_patch(hcb_p np)
2036 struct sym_fw2a_scr *scripta0;
2037 struct sym_fw2b_scr *scriptb0;
2039 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
2040 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
2043 * Remove LED support if not needed.
2045 if (!(np->features & FE_LED0)) {
2046 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
2047 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
2048 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
2051 #ifdef SYM_CONF_IARB_SUPPORT
2053 * If user does not want to use IMMEDIATE ARBITRATION
2054 * when we are reselected while attempting to arbitrate,
2055 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
2057 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
2058 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
2061 * Patch some variable in SCRIPTS.
2062 * - start and done queue initial bus address.
2063 * - target bus address table bus address.
2065 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
2066 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
2067 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
2070 * Remove the load of SCNTL4 on reselection if not a C10.
2072 if (!(np->features & FE_C10)) {
2073 scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
2074 scripta0->resel_scntl4[1] = cpu_to_scr(0);
2078 * Remove a couple of work-arounds specific to C1010 if
2079 * they are not desirable. See `sym_fw2.h' for more details.
2081 if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
2082 np->revision_id < 0x1 &&
2083 np->pciclk_khz < 60000)) {
2084 scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
2085 scripta0->datao_phase[1] = cpu_to_scr(0);
2087 if (!(np->device_id == PCI_ID_LSI53C1010 &&
2088 /* np->revision_id < 0xff */ 1)) {
2089 scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
2090 scripta0->sel_done[1] = cpu_to_scr(0);
2094 * Patch some other variables in SCRIPTS.
2095 * These ones are loaded by the SCRIPTS processor.
2097 scriptb0->pm0_data_addr[0] =
2098 cpu_to_scr(np->scripta_ba +
2099 offsetof(struct sym_fw2a_scr, pm0_data));
2100 scriptb0->pm1_data_addr[0] =
2101 cpu_to_scr(np->scripta_ba +
2102 offsetof(struct sym_fw2a_scr, pm1_data));
2106 * Fill the data area in scripts.
2107 * To be done for all firmwares.
2110 sym_fw_fill_data (u32 *in, u32 *out)
2114 for (i = 0; i < SYM_CONF_MAX_SG; i++) {
2115 *in++ = SCR_CHMOV_TBL ^ SCR_DATA_IN;
2116 *in++ = offsetof (struct sym_dsb, data[i]);
2117 *out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
2118 *out++ = offsetof (struct sym_dsb, data[i]);
2123 * Setup useful script bus addresses.
2124 * To be done for all firmwares.
2127 sym_fw_setup_bus_addresses(hcb_p np, struct sym_fw *fw)
2134 * Build the bus address table for script A
2135 * from the script A offset table.
2137 po = (u_short *) fw->a_ofs;
2138 pa = (u32 *) &np->fwa_bas;
2139 for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
2140 pa[i] = np->scripta_ba + po[i];
2143 * Same for script B.
2145 po = (u_short *) fw->b_ofs;
2146 pa = (u32 *) &np->fwb_bas;
2147 for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
2148 pa[i] = np->scriptb_ba + po[i];
2151 #ifdef SYM_CONF_GENERIC_SUPPORT
2153 * Setup routine for firmware #1.
2156 sym_fw1_setup(hcb_p np, struct sym_fw *fw)
2158 struct sym_fw1a_scr *scripta0;
2159 struct sym_fw1b_scr *scriptb0;
2161 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
2162 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
2165 * Fill variable parts in scripts.
2167 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
2170 * Setup bus addresses used from the C code..
2172 sym_fw_setup_bus_addresses(np, fw);
2174 #endif /* SYM_CONF_GENERIC_SUPPORT */
2177 * Setup routine for firmware #2.
2180 sym_fw2_setup(hcb_p np, struct sym_fw *fw)
2182 struct sym_fw2a_scr *scripta0;
2183 struct sym_fw2b_scr *scriptb0;
2185 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
2186 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
2189 * Fill variable parts in scripts.
2191 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
2194 * Setup bus addresses used from the C code..
2196 sym_fw_setup_bus_addresses(np, fw);
2200 * Allocate firmware descriptors.
2202 #ifdef SYM_CONF_GENERIC_SUPPORT
2203 static struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
2204 #endif /* SYM_CONF_GENERIC_SUPPORT */
2205 static struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
2208 * Find the most appropriate firmware for a chip.
2210 static struct sym_fw *
2211 sym_find_firmware(struct sym_pci_chip *chip)
2213 if (chip->features & FE_LDSTR)
2215 #ifdef SYM_CONF_GENERIC_SUPPORT
2216 else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2224 * Bind a script to physical addresses.
2226 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2228 u32 opcode, new, old, tmp1, tmp2;
2233 end = start + len/4;
2240 * If we forget to change the length
2241 * in scripts, a field will be
2242 * padded with 0. This is an illegal
2246 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
2247 sym_name(np), (int) (cur-start));
2254 * We use the bogus value 0xf00ff00f ;-)
2255 * to reserve data area in SCRIPTS.
2257 if (opcode == SCR_DATA_ZERO) {
2262 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2263 printf ("%d: <%x>\n", (int) (cur-start),
2267 * We don't have to decode ALL commands
2269 switch (opcode >> 28) {
2272 * LOAD / STORE DSA relative, don't relocate.
2278 * LOAD / STORE absolute.
2284 * COPY has TWO arguments.
2289 if ((tmp1 ^ tmp2) & 3) {
2290 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
2291 sym_name(np), (int) (cur-start));
2295 * If PREFETCH feature not enabled, remove
2296 * the NO FLUSH bit if present.
2298 if ((opcode & SCR_NO_FLUSH) &&
2299 !(np->features & FE_PFEN)) {
2300 opcode = (opcode & ~SCR_NO_FLUSH);
2305 * MOVE/CHMOV (absolute address)
2307 if (!(np->features & FE_WIDE))
2308 opcode = (opcode | OPC_MOVE);
2313 * MOVE/CHMOV (table indirect)
2315 if (!(np->features & FE_WIDE))
2316 opcode = (opcode | OPC_MOVE);
2322 * dont't relocate if relative :-)
2324 if (opcode & 0x00800000)
2326 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2343 * Scriptify:) the opcode.
2345 *cur++ = cpu_to_scr(opcode);
2348 * If no relocation, assume 1 argument
2349 * and just scriptize:) it.
2352 *cur = cpu_to_scr(*cur);
2358 * Otherwise performs all needed relocations.
2363 switch (old & RELOC_MASK) {
2364 case RELOC_REGISTER:
2365 new = (old & ~RELOC_MASK) + np->mmio_ba;
2368 new = (old & ~RELOC_MASK) + np->scripta_ba;
2371 new = (old & ~RELOC_MASK) + np->scriptb_ba;
2374 new = (old & ~RELOC_MASK) + np->hcb_ba;
2378 * Don't relocate a 0 address.
2379 * They are mostly used for patched or
2380 * script self-modified areas.
2389 panic("sym_fw_bind_script: "
2390 "weird relocation %x\n", old);
2394 *cur++ = cpu_to_scr(new);
2399 /*--------------------------------------------------------------------------*/
2400 /*--------------------------- END OF FIRMARES -----------------------------*/
2401 /*--------------------------------------------------------------------------*/
2404 * Function prototypes.
2406 static void sym_save_initial_setting (hcb_p np);
2407 static int sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2408 static int sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2409 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2410 static void sym_chip_reset (hcb_p np);
2411 static void sym_soft_reset (hcb_p np);
2412 static void sym_start_reset (hcb_p np);
2413 static int sym_reset_scsi_bus (hcb_p np, int enab_int);
2414 static int sym_wakeup_done (hcb_p np);
2415 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2416 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2417 static void sym_init (hcb_p np, int reason);
2418 static int sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2420 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2421 u_char div, u_char fak);
2422 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2423 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2424 u_char per, u_char wide, u_char div, u_char fak);
2425 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2426 u_char per, u_char wide, u_char div, u_char fak);
2427 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2428 static void sym_intr (void *arg);
2429 static void sym_poll (struct cam_sim *sim);
2430 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2431 static void sym_int_sto (hcb_p np);
2432 static void sym_int_udc (hcb_p np);
2433 static void sym_int_sbmc (hcb_p np);
2434 static void sym_int_par (hcb_p np, u_short sist);
2435 static void sym_int_ma (hcb_p np);
2436 static int sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2438 static void sym_sir_bad_scsi_status (hcb_p np, int num, ccb_p cp);
2439 static int sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2440 static void sym_sir_task_recovery (hcb_p np, int num);
2441 static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2442 static void sym_modify_dp (hcb_p np, tcb_p tp, ccb_p cp, int ofs);
2443 static int sym_compute_residual (hcb_p np, ccb_p cp);
2444 static int sym_show_msg (u_char * msg);
2445 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2446 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2447 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2448 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2449 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2450 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2451 static void sym_int_sir (hcb_p np);
2452 static void sym_free_ccb (hcb_p np, ccb_p cp);
2453 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2454 static ccb_p sym_alloc_ccb (hcb_p np);
2455 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2456 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2457 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2458 static int sym_snooptest (hcb_p np);
2459 static void sym_selectclock(hcb_p np, u_char scntl3);
2460 static void sym_getclock (hcb_p np, int mult);
2461 static int sym_getpciclock (hcb_p np);
2462 static void sym_complete_ok (hcb_p np, ccb_p cp);
2463 static void sym_complete_error (hcb_p np, ccb_p cp);
2464 static void sym_timeout (void *arg);
2465 static int sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2466 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2467 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2468 static void sym_action1 (struct cam_sim *sim, union ccb *ccb);
2469 static int sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2470 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2472 #ifdef FreeBSD_Bus_Dma_Abstraction
2473 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2474 bus_dma_segment_t *psegs, int nsegs);
2476 static int sym_scatter_virtual (hcb_p np, ccb_p cp, vm_offset_t vaddr,
2478 static int sym_scatter_sg_virtual (hcb_p np, ccb_p cp,
2479 bus_dma_segment_t *psegs, int nsegs);
2480 static int sym_scatter_physical (hcb_p np, ccb_p cp, vm_offset_t paddr,
2483 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2484 bus_dma_segment_t *psegs, int nsegs);
2485 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2486 static void sym_update_trans (hcb_p np, tcb_p tp, struct sym_trans *tip,
2487 struct ccb_trans_settings *cts);
2488 static void sym_update_dflags(hcb_p np, u_char *flags,
2489 struct ccb_trans_settings *cts);
2491 #ifdef FreeBSD_Bus_Io_Abstraction
2492 static struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2493 static int sym_pci_probe (device_t dev);
2494 static int sym_pci_attach (device_t dev);
2496 static struct sym_pci_chip *sym_find_pci_chip (pcici_t tag);
2497 static const char *sym_pci_probe (pcici_t tag, pcidi_t type);
2498 static void sym_pci_attach (pcici_t tag, int unit);
2499 static int sym_pci_attach2 (pcici_t tag, int unit);
2502 static void sym_pci_free (hcb_p np);
2503 static int sym_cam_attach (hcb_p np);
2504 static void sym_cam_free (hcb_p np);
2506 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2507 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2508 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2511 * Print something which allows to retrieve the controler type,
2512 * unit, target, lun concerned by a kernel message.
2514 static void PRINT_TARGET (hcb_p np, int target)
2516 printf ("%s:%d:", sym_name(np), target);
2519 static void PRINT_LUN(hcb_p np, int target, int lun)
2521 printf ("%s:%d:%d:", sym_name(np), target, lun);
2524 static void PRINT_ADDR (ccb_p cp)
2526 if (cp && cp->cam_ccb)
2527 xpt_print_path(cp->cam_ccb->ccb_h.path);
2531 * Take into account this ccb in the freeze count.
2533 static void sym_freeze_cam_ccb(union ccb *ccb)
2535 if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2536 if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2537 ccb->ccb_h.status |= CAM_DEV_QFRZN;
2538 xpt_freeze_devq(ccb->ccb_h.path, 1);
2544 * Set the status field of a CAM CCB.
2546 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2548 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2549 ccb->ccb_h.status |= status;
2553 * Get the status field of a CAM CCB.
2555 static __inline int sym_get_cam_status(union ccb *ccb)
2557 return ccb->ccb_h.status & CAM_STATUS_MASK;
2561 * Enqueue a CAM CCB.
2563 static void sym_enqueue_cam_ccb(hcb_p np, union ccb *ccb)
2565 assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2566 ccb->ccb_h.status = CAM_REQ_INPROG;
2568 ccb->ccb_h.timeout_ch = timeout(sym_timeout, (caddr_t) ccb,
2569 ccb->ccb_h.timeout*hz/1000);
2570 ccb->ccb_h.status |= CAM_SIM_QUEUED;
2571 ccb->ccb_h.sym_hcb_ptr = np;
2573 sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2577 * Complete a pending CAM CCB.
2579 static void sym_xpt_done(hcb_p np, union ccb *ccb)
2581 if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2582 untimeout(sym_timeout, (caddr_t) ccb, ccb->ccb_h.timeout_ch);
2583 sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2584 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2585 ccb->ccb_h.sym_hcb_ptr = 0;
2587 if (ccb->ccb_h.flags & CAM_DEV_QFREEZE)
2588 sym_freeze_cam_ccb(ccb);
2592 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2594 sym_set_cam_status(ccb, cam_status);
2595 sym_xpt_done(np, ccb);
2599 * SYMBIOS chip clock divisor table.
2601 * Divisors are multiplied by 10,000,000 in order to make
2602 * calculations more simple.
2605 static u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2608 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2609 * 128 transfers. All chips support at least 16 transfers
2610 * bursts. The 825A, 875 and 895 chips support bursts of up
2611 * to 128 transfers and the 895A and 896 support bursts of up
2612 * to 64 transfers. All other chips support up to 16
2615 * For PCI 32 bit data transfers each transfer is a DWORD.
2616 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2618 * We use log base 2 (burst length) as internal code, with
2619 * value 0 meaning "burst disabled".
2623 * Burst length from burst code.
2625 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2628 * Burst code from io register bits.
2630 #define burst_code(dmode, ctest4, ctest5) \
2631 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2634 * Set initial io register bits from burst code.
2636 static __inline void sym_init_burst(hcb_p np, u_char bc)
2638 np->rv_ctest4 &= ~0x80;
2639 np->rv_dmode &= ~(0x3 << 6);
2640 np->rv_ctest5 &= ~0x4;
2643 np->rv_ctest4 |= 0x80;
2647 np->rv_dmode |= ((bc & 0x3) << 6);
2648 np->rv_ctest5 |= (bc & 0x4);
2654 * Print out the list of targets that have some flag disabled by user.
2656 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2661 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2662 if (i == np->myaddr)
2664 if (np->target[i].usrflags & mask) {
2666 printf("%s: %s disabled for targets",
2676 * Save initial settings of some IO registers.
2677 * Assumed to have been set by BIOS.
2678 * We cannot reset the chip prior to reading the
2679 * IO registers, since informations will be lost.
2680 * Since the SCRIPTS processor may be running, this
2681 * is not safe on paper, but it seems to work quite
2684 static void sym_save_initial_setting (hcb_p np)
2686 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
2687 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
2688 np->sv_dmode = INB(nc_dmode) & 0xce;
2689 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
2690 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
2691 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
2692 np->sv_gpcntl = INB(nc_gpcntl);
2693 np->sv_stest1 = INB(nc_stest1);
2694 np->sv_stest2 = INB(nc_stest2) & 0x20;
2695 np->sv_stest4 = INB(nc_stest4);
2696 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
2697 np->sv_scntl4 = INB(nc_scntl4);
2698 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
2701 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
2705 * Prepare io register values used by sym_init() according
2706 * to selected and supported features.
2708 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2717 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
2720 * Get the frequency of the chip's clock.
2722 if (np->features & FE_QUAD)
2724 else if (np->features & FE_DBLR)
2729 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
2730 np->clock_khz *= np->multiplier;
2732 if (np->clock_khz != 40000)
2733 sym_getclock(np, np->multiplier);
2736 * Divisor to be used for async (timer pre-scaler).
2738 i = np->clock_divn - 1;
2740 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2745 np->rv_scntl3 = i+1;
2748 * The C1010 uses hardwired divisors for async.
2749 * So, we just throw away, the async. divisor.:-)
2751 if (np->features & FE_C10)
2755 * Minimum synchronous period factor supported by the chip.
2756 * Btw, 'period' is in tenths of nanoseconds.
2758 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
2759 if (period <= 250) np->minsync = 10;
2760 else if (period <= 303) np->minsync = 11;
2761 else if (period <= 500) np->minsync = 12;
2762 else np->minsync = (period + 40 - 1) / 40;
2765 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2767 if (np->minsync < 25 &&
2768 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2770 else if (np->minsync < 12 &&
2771 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2775 * Maximum synchronous period factor supported by the chip.
2777 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2778 np->maxsync = period > 2540 ? 254 : period / 10;
2781 * If chip is a C1010, guess the sync limits in DT mode.
2783 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2784 if (np->clock_khz == 160000) {
2786 np->maxsync_dt = 50;
2787 np->maxoffs_dt = 62;
2792 * 64 bit addressing (895A/896/1010) ?
2794 if (np->features & FE_DAC)
2795 #if BITS_PER_LONG > 32
2796 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
2798 np->rv_ccntl1 |= (DDAC);
2802 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2804 if (np->features & FE_NOPM)
2805 np->rv_ccntl0 |= (ENPMJ);
2809 * In dual channel mode, contention occurs if internal cycles
2810 * are used. Disable internal cycles.
2812 if (np->device_id == PCI_ID_LSI53C1010 &&
2813 np->revision_id < 0x2)
2814 np->rv_ccntl0 |= DILS;
2817 * Select burst length (dwords)
2819 burst_max = SYM_SETUP_BURST_ORDER;
2820 if (burst_max == 255)
2821 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2825 if (burst_max > np->maxburst)
2826 burst_max = np->maxburst;
2829 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2830 * This chip and the 860 Rev 1 may wrongly use PCI cache line
2831 * based transactions on LOAD/STORE instructions. So we have
2832 * to prevent these chips from using such PCI transactions in
2833 * this driver. The generic ncr driver that does not use
2834 * LOAD/STORE instructions does not need this work-around.
2836 if ((np->device_id == PCI_ID_SYM53C810 &&
2837 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2838 (np->device_id == PCI_ID_SYM53C860 &&
2839 np->revision_id <= 0x1))
2840 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2843 * Select all supported special features.
2844 * If we are using on-board RAM for scripts, prefetch (PFEN)
2845 * does not help, but burst op fetch (BOF) does.
2846 * Disabling PFEN makes sure BOF will be used.
2848 if (np->features & FE_ERL)
2849 np->rv_dmode |= ERL; /* Enable Read Line */
2850 if (np->features & FE_BOF)
2851 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
2852 if (np->features & FE_ERMP)
2853 np->rv_dmode |= ERMP; /* Enable Read Multiple */
2855 if ((np->features & FE_PFEN) && !np->ram_ba)
2857 if (np->features & FE_PFEN)
2859 np->rv_dcntl |= PFEN; /* Prefetch Enable */
2860 if (np->features & FE_CLSE)
2861 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
2862 if (np->features & FE_WRIE)
2863 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
2864 if (np->features & FE_DFS)
2865 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
2870 if (SYM_SETUP_PCI_PARITY)
2871 np->rv_ctest4 |= MPEE; /* Master parity checking */
2872 if (SYM_SETUP_SCSI_PARITY)
2873 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
2876 * Get parity checking, host ID and verbose mode from NVRAM
2879 sym_nvram_setup_host (np, nvram);
2882 * Get SCSI addr of host adapter (set by bios?).
2884 if (np->myaddr == 255) {
2885 np->myaddr = INB(nc_scid) & 0x07;
2887 np->myaddr = SYM_SETUP_HOST_ID;
2891 * Prepare initial io register bits for burst length
2893 sym_init_burst(np, burst_max);
2896 * Set SCSI BUS mode.
2897 * - LVD capable chips (895/895A/896/1010) report the
2898 * current BUS mode through the STEST4 IO register.
2899 * - For previous generation chips (825/825A/875),
2900 * user has to tell us how to check against HVD,
2901 * since a 100% safe algorithm is not possible.
2903 np->scsi_mode = SMODE_SE;
2904 if (np->features & (FE_ULTRA2|FE_ULTRA3))
2905 np->scsi_mode = (np->sv_stest4 & SMODE);
2906 else if (np->features & FE_DIFF) {
2907 if (SYM_SETUP_SCSI_DIFF == 1) {
2908 if (np->sv_scntl3) {
2909 if (np->sv_stest2 & 0x20)
2910 np->scsi_mode = SMODE_HVD;
2912 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2913 if (!(INB(nc_gpreg) & 0x08))
2914 np->scsi_mode = SMODE_HVD;
2917 else if (SYM_SETUP_SCSI_DIFF == 2)
2918 np->scsi_mode = SMODE_HVD;
2920 if (np->scsi_mode == SMODE_HVD)
2921 np->rv_stest2 |= 0x20;
2924 * Set LED support from SCRIPTS.
2925 * Ignore this feature for boards known to use a
2926 * specific GPIO wiring and for the 895A, 896
2927 * and 1010 that drive the LED directly.
2929 if ((SYM_SETUP_SCSI_LED ||
2930 (nvram->type == SYM_SYMBIOS_NVRAM ||
2931 (nvram->type == SYM_TEKRAM_NVRAM &&
2932 np->device_id == PCI_ID_SYM53C895))) &&
2933 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2934 np->features |= FE_LED0;
2939 switch(SYM_SETUP_IRQ_MODE & 3) {
2941 np->rv_dcntl |= IRQM;
2944 np->rv_dcntl |= (np->sv_dcntl & IRQM);
2951 * Configure targets according to driver setup.
2952 * If NVRAM present get targets setup from NVRAM.
2954 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2955 tcb_p tp = &np->target[i];
2957 #ifdef FreeBSD_New_Tran_Settings
2958 tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2959 tp->tinfo.user.spi_version = tp->tinfo.current.spi_version = 2;
2961 tp->tinfo.user.period = np->minsync;
2962 tp->tinfo.user.offset = np->maxoffs;
2963 tp->tinfo.user.width = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2964 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2965 tp->usrtags = SYM_SETUP_MAX_TAG;
2967 sym_nvram_setup_target (np, i, nvram);
2970 * For now, guess PPR/DT support from the period
2973 if (np->features & FE_ULTRA3) {
2974 if (tp->tinfo.user.period <= 9 &&
2975 tp->tinfo.user.width == BUS_16_BIT) {
2976 tp->tinfo.user.options |= PPR_OPT_DT;
2977 tp->tinfo.user.offset = np->maxoffs_dt;
2978 #ifdef FreeBSD_New_Tran_Settings
2979 tp->tinfo.user.spi_version = 3;
2985 tp->usrflags &= ~SYM_TAGS_ENABLED;
2989 * Let user know about the settings.
2992 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2993 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
2994 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
2996 (np->features & FE_ULTRA3) ? 80 :
2997 (np->features & FE_ULTRA2) ? 40 :
2998 (np->features & FE_ULTRA) ? 20 : 10,
2999 sym_scsi_bus_mode(np->scsi_mode),
3000 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
3002 * Tell him more on demand.
3005 printf("%s: %s IRQ line driver%s\n",
3007 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3008 np->ram_ba ? ", using on-chip SRAM" : "");
3009 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
3010 if (np->features & FE_NOPM)
3011 printf("%s: handling phase mismatch from SCRIPTS.\n",
3017 if (sym_verbose > 1) {
3018 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3019 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3020 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
3021 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
3023 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3024 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3025 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
3026 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3029 * Let user be aware of targets that have some disable flags set.
3031 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
3033 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
3040 * Prepare the next negotiation message if needed.
3042 * Fill in the part of message buffer that contains the
3043 * negotiation and the nego_status field of the CCB.
3044 * Returns the size of the message in bytes.
3047 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
3049 tcb_p tp = &np->target[cp->target];
3053 * Early C1010 chips need a work-around for DT
3054 * data transfer to work.
3056 if (!(np->features & FE_U3EN))
3057 tp->tinfo.goal.options = 0;
3059 * negotiate using PPR ?
3061 if (tp->tinfo.goal.options & PPR_OPT_MASK)
3064 * negotiate wide transfers ?
3066 else if (tp->tinfo.current.width != tp->tinfo.goal.width)
3069 * negotiate synchronous transfers?
3071 else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
3072 tp->tinfo.current.offset != tp->tinfo.goal.offset)
3077 msgptr[msglen++] = M_EXTENDED;
3078 msgptr[msglen++] = 3;
3079 msgptr[msglen++] = M_X_SYNC_REQ;
3080 msgptr[msglen++] = tp->tinfo.goal.period;
3081 msgptr[msglen++] = tp->tinfo.goal.offset;
3084 msgptr[msglen++] = M_EXTENDED;
3085 msgptr[msglen++] = 2;
3086 msgptr[msglen++] = M_X_WIDE_REQ;
3087 msgptr[msglen++] = tp->tinfo.goal.width;
3090 msgptr[msglen++] = M_EXTENDED;
3091 msgptr[msglen++] = 6;
3092 msgptr[msglen++] = M_X_PPR_REQ;
3093 msgptr[msglen++] = tp->tinfo.goal.period;
3094 msgptr[msglen++] = 0;
3095 msgptr[msglen++] = tp->tinfo.goal.offset;
3096 msgptr[msglen++] = tp->tinfo.goal.width;
3097 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
3101 cp->nego_status = nego;
3104 tp->nego_cp = cp; /* Keep track a nego will be performed */
3105 if (DEBUG_FLAGS & DEBUG_NEGO) {
3106 sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
3107 nego == NS_WIDE ? "wide msgout" :
3108 "ppr msgout", msgptr);
3116 * Insert a job into the start queue.
3118 static void sym_put_start_queue(hcb_p np, ccb_p cp)
3122 #ifdef SYM_CONF_IARB_SUPPORT
3124 * If the previously queued CCB is not yet done,
3125 * set the IARB hint. The SCRIPTS will go with IARB
3126 * for this job when starting the previous one.
3127 * We leave devices a chance to win arbitration by
3128 * not using more than 'iarb_max' consecutive
3129 * immediate arbitrations.
3131 if (np->last_cp && np->iarb_count < np->iarb_max) {
3132 np->last_cp->host_flags |= HF_HINT_IARB;
3141 * Insert first the idle task and then our job.
3142 * The MB should ensure proper ordering.
3144 qidx = np->squeueput + 2;
3145 if (qidx >= MAX_QUEUE*2) qidx = 0;
3147 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
3149 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
3151 np->squeueput = qidx;
3153 if (DEBUG_FLAGS & DEBUG_QUEUE)
3154 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
3157 * Script processor may be waiting for reselect.
3161 OUTB (nc_istat, SIGP|np->istat_sem);
3166 * Soft reset the chip.
3168 * Raising SRST when the chip is running may cause
3169 * problems on dual function chips (see below).
3170 * On the other hand, LVD devices need some delay
3171 * to settle and report actual BUS mode in STEST4.
3173 static void sym_chip_reset (hcb_p np)
3175 OUTB (nc_istat, SRST);
3178 UDELAY(2000); /* For BUS MODE to settle */
3182 * Soft reset the chip.
3184 * Some 896 and 876 chip revisions may hang-up if we set
3185 * the SRST (soft reset) bit at the wrong time when SCRIPTS
3187 * So, we need to abort the current operation prior to
3188 * soft resetting the chip.
3190 static void sym_soft_reset (hcb_p np)
3195 OUTB (nc_istat, CABRT);
3196 for (i = 1000000 ; i ; --i) {
3197 istat = INB (nc_istat);
3209 printf("%s: unable to abort current chip operation.\n",
3211 sym_chip_reset (np);
3215 * Start reset process.
3217 * The interrupt handler will reinitialize the chip.
3219 static void sym_start_reset(hcb_p np)
3221 (void) sym_reset_scsi_bus(np, 1);
3224 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3229 sym_soft_reset(np); /* Soft reset the chip */
3231 OUTW (nc_sien, RST);
3233 * Enable Tolerant, reset IRQD if present and
3234 * properly set IRQ mode, prior to resetting the bus.
3236 OUTB (nc_stest3, TE);
3237 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3238 OUTB (nc_scntl1, CRST);
3241 if (!SYM_SETUP_SCSI_BUS_CHECK)
3244 * Check for no terminators or SCSI bus shorts to ground.
3245 * Read SCSI data bus, data parity bits and control signals.
3246 * We are expecting RESET to be TRUE and other signals to be
3249 term = INB(nc_sstat0);
3250 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3251 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3252 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3253 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3254 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3256 if (!(np->features & FE_WIDE))
3259 if (term != (2<<7)) {
3260 printf("%s: suspicious SCSI data while resetting the BUS.\n",
3262 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3263 "0x%lx, expecting 0x%lx\n",
3265 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3266 (u_long)term, (u_long)(2<<7));
3267 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3271 OUTB (nc_scntl1, 0);
3277 * The chip may have completed jobs. Look at the DONE QUEUE.
3279 * On architectures that may reorder LOAD/STORE operations,
3280 * a memory barrier may be needed after the reading of the
3281 * so-called `flag' and prior to dealing with the data.
3283 static int sym_wakeup_done (hcb_p np)
3292 dsa = scr_to_cpu(np->dqueue[i]);
3296 if ((i = i+2) >= MAX_QUEUE*2)
3299 cp = sym_ccb_from_dsa(np, dsa);
3302 sym_complete_ok (np, cp);
3306 printf ("%s: bad DSA (%x) in done queue.\n",
3307 sym_name(np), (u_int) dsa);
3315 * Complete all active CCBs with error.
3316 * Used on CHIP/SCSI RESET.
3318 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3321 * Move all active CCBs to the COMP queue
3322 * and flush this queue.
3324 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3325 sym_que_init(&np->busy_ccbq);
3326 sym_flush_comp_queue(np, cam_status);
3333 * 0: initialisation.
3334 * 1: SCSI BUS RESET delivered or received.
3335 * 2: SCSI BUS MODE changed.
3337 static void sym_init (hcb_p np, int reason)
3343 * Reset chip if asked, otherwise just clear fifos.
3348 OUTB (nc_stest3, TE|CSF);
3349 OUTONB (nc_ctest3, CLF);
3355 phys = np->squeue_ba;
3356 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3357 np->squeue[i] = cpu_to_scr(np->idletask_ba);
3358 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3360 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3363 * Start at first entry.
3370 phys = np->dqueue_ba;
3371 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3373 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3375 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3378 * Start at first entry.
3383 * Install patches in scripts.
3384 * This also let point to first position the start
3385 * and done queue pointers used from SCRIPTS.
3390 * Wakeup all pending jobs.
3392 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3397 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
3398 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
3400 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3401 /* full arb., ena parity, par->ATN */
3402 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
3404 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
3406 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
3407 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
3408 OUTB (nc_istat , SIGP ); /* Signal Process */
3409 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
3410 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
3412 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
3413 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
3414 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
3416 /* Extended Sreq/Sack filtering not supported on the C10 */
3417 if (np->features & FE_C10)
3418 OUTB (nc_stest2, np->rv_stest2);
3420 OUTB (nc_stest2, EXT|np->rv_stest2);
3422 OUTB (nc_stest3, TE); /* TolerANT enable */
3423 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
3426 * For now, disable AIP generation on C1010-66.
3428 if (np->device_id == PCI_ID_LSI53C1010_2)
3429 OUTB (nc_aipcntl1, DISAIP);
3433 * Errant SGE's when in narrow. Write bits 4 & 5 of
3434 * STEST1 register to disable SGE. We probably should do
3435 * that from SCRIPTS for each selection/reselection, but
3436 * I just don't want. :)
3438 if (np->device_id == PCI_ID_LSI53C1010 &&
3439 /* np->revision_id < 0xff */ 1)
3440 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3443 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3444 * Disable overlapped arbitration for some dual function devices,
3445 * regardless revision id (kind of post-chip-design feature. ;-))
3447 if (np->device_id == PCI_ID_SYM53C875)
3448 OUTB (nc_ctest0, (1<<5));
3449 else if (np->device_id == PCI_ID_SYM53C896)
3450 np->rv_ccntl0 |= DPR;
3453 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3454 * and/or hardware phase mismatch, since only such chips
3455 * seem to support those IO registers.
3457 if (np->features & (FE_DAC|FE_NOPM)) {
3458 OUTB (nc_ccntl0, np->rv_ccntl0);
3459 OUTB (nc_ccntl1, np->rv_ccntl1);
3463 * If phase mismatch handled by scripts (895A/896/1010),
3464 * set PM jump addresses.
3466 if (np->features & FE_NOPM) {
3467 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3468 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3472 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
3473 * Also set GPIO5 and clear GPIO6 if hardware LED control.
3475 if (np->features & FE_LED0)
3476 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3477 else if (np->features & FE_LEDC)
3478 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3483 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3484 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3487 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3488 * Try to eat the spurious SBMC interrupt that may occur when
3489 * we reset the chip but not the SCSI BUS (at initialization).
3491 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3492 OUTONW (nc_sien, SBMC);
3497 np->scsi_mode = INB (nc_stest4) & SMODE;
3501 * Fill in target structure.
3502 * Reinitialize usrsync.
3503 * Reinitialize usrwide.
3504 * Prepare sync negotiation according to actual SCSI bus mode.
3506 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3507 tcb_p tp = &np->target[i];
3511 tp->head.wval = np->rv_scntl3;
3514 tp->tinfo.current.period = 0;
3515 tp->tinfo.current.offset = 0;
3516 tp->tinfo.current.width = BUS_8_BIT;
3517 tp->tinfo.current.options = 0;
3521 * Download SCSI SCRIPTS to on-chip RAM if present,
3522 * and start script processor.
3525 if (sym_verbose > 1)
3526 printf ("%s: Downloading SCSI SCRIPTS.\n",
3528 if (np->ram_ws == 8192) {
3529 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3530 OUTL (nc_mmws, np->scr_ram_seg);
3531 OUTL (nc_mmrs, np->scr_ram_seg);
3532 OUTL (nc_sfs, np->scr_ram_seg);
3533 phys = SCRIPTB_BA (np, start64);
3536 phys = SCRIPTA_BA (np, init);
3537 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3540 phys = SCRIPTA_BA (np, init);
3544 OUTL (nc_dsa, np->hcb_ba);
3548 * Notify the XPT about the RESET condition.
3551 xpt_async(AC_BUS_RESET, np->path, NULL);
3555 * Get clock factor and sync divisor for a given
3556 * synchronous factor period.
3559 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3561 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
3562 int div = np->clock_divn; /* Number of divisors supported */
3563 u32 fak; /* Sync factor in sxfer */
3564 u32 per; /* Period in tenths of ns */
3565 u32 kpc; /* (per * clk) */
3569 * Compute the synchronous period in tenths of nano-seconds
3571 if (dt && sfac <= 9) per = 125;
3572 else if (sfac <= 10) per = 250;
3573 else if (sfac == 11) per = 303;
3574 else if (sfac == 12) per = 500;
3575 else per = 40 * sfac;
3583 * For earliest C10 revision 0, we cannot use extra
3584 * clocks for the setting of the SCSI clocking.
3585 * Note that this limits the lowest sync data transfer
3586 * to 5 Mega-transfers per second and may result in
3587 * using higher clock divisors.
3590 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3592 * Look for the lowest clock divisor that allows an
3593 * output speed not faster than the period.
3597 if (kpc > (div_10M[div] << 2)) {
3602 fak = 0; /* No extra clocks */
3603 if (div == np->clock_divn) { /* Are we too fast ? */
3613 * Look for the greatest clock divisor that allows an
3614 * input speed faster than the period.
3617 if (kpc >= (div_10M[div] << 2)) break;
3620 * Calculate the lowest clock factor that allows an output
3621 * speed not faster than the period, and the max output speed.
3622 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3623 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3626 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3627 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3630 fak = (kpc - 1) / div_10M[div] + 1 - 4;
3631 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3635 * Check against our hardware limits, or bugs :).
3637 if (fak < 0) {fak = 0; ret = -1;}
3638 if (fak > 2) {fak = 2; ret = -1;}
3641 * Compute and return sync parameters.
3650 * Tell the SCSI layer about the new transfer parameters.
3653 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3655 struct ccb_trans_settings cts;
3656 struct cam_path *path;
3658 tcb_p tp = &np->target[target];
3660 sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3662 if (sts != CAM_REQ_CMP)
3665 bzero(&cts, sizeof(cts));
3667 #ifdef FreeBSD_New_Tran_Settings
3668 #define cts__scsi (cts.proto_specific.scsi)
3669 #define cts__spi (cts.xport_specific.spi)
3671 cts.type = CTS_TYPE_CURRENT_SETTINGS;
3672 cts.protocol = PROTO_SCSI;
3673 cts.transport = XPORT_SPI;
3674 cts.protocol_version = tp->tinfo.current.scsi_version;
3675 cts.transport_version = tp->tinfo.current.spi_version;
3677 cts__spi.valid = spi_valid;
3678 if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3679 cts__spi.sync_period = tp->tinfo.current.period;
3680 if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3681 cts__spi.sync_offset = tp->tinfo.current.offset;
3682 if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3683 cts__spi.bus_width = tp->tinfo.current.width;
3684 if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3685 cts__spi.ppr_options = tp->tinfo.current.options;
3689 cts.valid = spi_valid;
3690 if (spi_valid & CCB_TRANS_SYNC_RATE_VALID)
3691 cts.sync_period = tp->tinfo.current.period;
3692 if (spi_valid & CCB_TRANS_SYNC_OFFSET_VALID)
3693 cts.sync_offset = tp->tinfo.current.offset;
3694 if (spi_valid & CCB_TRANS_BUS_WIDTH_VALID)
3695 cts.bus_width = tp->tinfo.current.width;
3697 xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3698 xpt_async(AC_TRANSFER_NEG, path, &cts);
3699 xpt_free_path(path);
3702 #ifdef FreeBSD_New_Tran_Settings
3703 #define SYM_SPI_VALID_WDTR \
3704 CTS_SPI_VALID_BUS_WIDTH | \
3705 CTS_SPI_VALID_SYNC_RATE | \
3706 CTS_SPI_VALID_SYNC_OFFSET
3707 #define SYM_SPI_VALID_SDTR \
3708 CTS_SPI_VALID_SYNC_RATE | \
3709 CTS_SPI_VALID_SYNC_OFFSET
3710 #define SYM_SPI_VALID_PPR \
3711 CTS_SPI_VALID_PPR_OPTIONS | \
3712 CTS_SPI_VALID_BUS_WIDTH | \
3713 CTS_SPI_VALID_SYNC_RATE | \
3714 CTS_SPI_VALID_SYNC_OFFSET
3716 #define SYM_SPI_VALID_WDTR \
3717 CCB_TRANS_BUS_WIDTH_VALID | \
3718 CCB_TRANS_SYNC_RATE_VALID | \
3719 CCB_TRANS_SYNC_OFFSET_VALID
3720 #define SYM_SPI_VALID_SDTR \
3721 CCB_TRANS_SYNC_RATE_VALID | \
3722 CCB_TRANS_SYNC_OFFSET_VALID
3723 #define SYM_SPI_VALID_PPR \
3724 CCB_TRANS_BUS_WIDTH_VALID | \
3725 CCB_TRANS_SYNC_RATE_VALID | \
3726 CCB_TRANS_SYNC_OFFSET_VALID
3730 * We received a WDTR.
3731 * Let everything be aware of the changes.
3733 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3735 tcb_p tp = &np->target[cp->target];
3737 sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3740 * Tell the SCSI layer about the new transfer parameters.
3742 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3743 tp->tinfo.current.offset = 0;
3744 tp->tinfo.current.period = 0;
3745 tp->tinfo.current.options = 0;
3747 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3751 * We received a SDTR.
3752 * Let everything be aware of the changes.
3755 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3757 tcb_p tp = &np->target[cp->target];
3758 u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3760 sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3763 * Tell the SCSI layer about the new transfer parameters.
3765 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3766 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3767 tp->tinfo.goal.options = tp->tinfo.current.options = 0;
3769 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3773 * We received a PPR.
3774 * Let everything be aware of the changes.
3776 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3777 u_char per, u_char wide, u_char div, u_char fak)
3779 tcb_p tp = &np->target[cp->target];
3781 sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3784 * Tell the SCSI layer about the new transfer parameters.
3786 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3787 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3788 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3789 tp->tinfo.goal.options = tp->tinfo.current.options = dt;
3791 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3795 * Switch trans mode for current job and it's target.
3797 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3798 u_char per, u_char wide, u_char div, u_char fak)
3803 u_char target = INB (nc_sdid) & 0x0f;
3804 u_char sval, wval, uval;
3811 assert (target == (cp->target & 0xf));
3812 tp = &np->target[target];
3814 sval = tp->head.sval;
3815 wval = tp->head.wval;
3816 uval = tp->head.uval;
3819 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3820 sval, wval, uval, np->rv_scntl3);
3825 if (!(np->features & FE_C10))
3826 sval = (sval & ~0x1f) | ofs;
3828 sval = (sval & ~0x3f) | ofs;
3831 * Set the sync divisor and extra clock factor.
3834 wval = (wval & ~0x70) | ((div+1) << 4);
3835 if (!(np->features & FE_C10))
3836 sval = (sval & ~0xe0) | (fak << 5);
3838 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3839 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3840 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3845 * Set the bus width.
3852 * Set misc. ultra enable bits.
3854 if (np->features & FE_C10) {
3855 uval = uval & ~(U3EN|AIPCKEN);
3857 assert(np->features & FE_U3EN);
3862 wval = wval & ~ULTRA;
3863 if (per <= 12) wval |= ULTRA;
3867 * Stop there if sync parameters are unchanged.
3869 if (tp->head.sval == sval &&
3870 tp->head.wval == wval &&
3871 tp->head.uval == uval)
3873 tp->head.sval = sval;
3874 tp->head.wval = wval;
3875 tp->head.uval = uval;
3878 * Disable extended Sreq/Sack filtering if per < 50.
3879 * Not supported on the C1010.
3881 if (per < 50 && !(np->features & FE_C10))
3882 OUTOFFB (nc_stest2, EXT);
3885 * set actual value and sync_status
3887 OUTB (nc_sxfer, tp->head.sval);
3888 OUTB (nc_scntl3, tp->head.wval);
3890 if (np->features & FE_C10) {
3891 OUTB (nc_scntl4, tp->head.uval);
3895 * patch ALL busy ccbs of this target.
3897 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3898 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3899 if (cp->target != target)
3901 cp->phys.select.sel_scntl3 = tp->head.wval;
3902 cp->phys.select.sel_sxfer = tp->head.sval;
3903 if (np->features & FE_C10) {
3904 cp->phys.select.sel_scntl4 = tp->head.uval;
3910 * log message for real hard errors
3912 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3913 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3915 * exception register:
3920 * so: control lines as driven by chip.
3921 * si: control lines as seen by chip.
3922 * sd: scsi data lines as seen by chip.
3925 * sxfer: (see the manual)
3926 * scntl3: (see the manual)
3928 * current script command:
3929 * dsp: script adress (relative to start of script).
3930 * dbc: first word of script command.
3932 * First 24 register of the chip:
3935 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3941 u_char *script_base;
3946 if (dsp > np->scripta_ba &&
3947 dsp <= np->scripta_ba + np->scripta_sz) {
3948 script_ofs = dsp - np->scripta_ba;
3949 script_size = np->scripta_sz;
3950 script_base = (u_char *) np->scripta0;
3951 script_name = "scripta";
3953 else if (np->scriptb_ba < dsp &&
3954 dsp <= np->scriptb_ba + np->scriptb_sz) {
3955 script_ofs = dsp - np->scriptb_ba;
3956 script_size = np->scriptb_sz;
3957 script_base = (u_char *) np->scriptb0;
3958 script_name = "scriptb";
3963 script_name = "mem";
3966 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3967 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3968 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3969 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3970 (unsigned)INB (nc_scntl3), script_name, script_ofs,
3971 (unsigned)INL (nc_dbc));
3973 if (((script_ofs & 3) == 0) &&
3974 (unsigned)script_ofs < script_size) {
3975 printf ("%s: script cmd = %08x\n", sym_name(np),
3976 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3979 printf ("%s: regdump:", sym_name(np));
3981 printf (" %02x", (unsigned)INB_OFF(i));
3985 * PCI BUS error, read the PCI ststus register.
3987 if (dstat & (MDPE|BF)) {
3989 #ifdef FreeBSD_Bus_Io_Abstraction
3990 pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3992 pci_sts = pci_cfgread(np->pci_tag, PCIR_STATUS, 2);
3994 if (pci_sts & 0xf900) {
3995 #ifdef FreeBSD_Bus_Io_Abstraction
3996 pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
3998 pci_cfgwrite(np->pci_tag, PCIR_STATUS, pci_sts, 2);
4000 printf("%s: PCI STATUS = 0x%04x\n",
4001 sym_name(np), pci_sts & 0xf900);
4007 * chip interrupt handler
4009 * In normal situations, interrupt conditions occur one at
4010 * a time. But when something bad happens on the SCSI BUS,
4011 * the chip may raise several interrupt flags before
4012 * stopping and interrupting the CPU. The additionnal
4013 * interrupt flags are stacked in some extra registers
4014 * after the SIP and/or DIP flag has been raised in the
4015 * ISTAT. After the CPU has read the interrupt condition
4016 * flag from SIST or DSTAT, the chip unstacks the other
4017 * interrupt flags and sets the corresponding bits in
4018 * SIST or DSTAT. Since the chip starts stacking once the
4019 * SIP or DIP flag is set, there is a small window of time
4020 * where the stacking does not occur.
4022 * Typically, multiple interrupt conditions may happen in
4023 * the following situations:
4025 * - SCSI parity error + Phase mismatch (PAR|MA)
4026 * When an parity error is detected in input phase
4027 * and the device switches to msg-in phase inside a
4029 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
4030 * When a stupid device does not want to handle the
4031 * recovery of an SCSI parity error.
4032 * - Some combinations of STO, PAR, UDC, ...
4033 * When using non compliant SCSI stuff, when user is
4034 * doing non compliant hot tampering on the BUS, when
4035 * something really bad happens to a device, etc ...
4037 * The heuristic suggested by SYMBIOS to handle
4038 * multiple interrupts is to try unstacking all
4039 * interrupts conditions and to handle them on some
4040 * priority based on error severity.
4041 * This will work when the unstacking has been
4042 * successful, but we cannot be 100 % sure of that,
4043 * since the CPU may have been faster to unstack than
4044 * the chip is able to stack. Hmmm ... But it seems that
4045 * such a situation is very unlikely to happen.
4047 * If this happen, for example STO caught by the CPU
4048 * then UDC happenning before the CPU have restarted
4049 * the SCRIPTS, the driver may wrongly complete the
4050 * same command on UDC, since the SCRIPTS didn't restart
4051 * and the DSA still points to the same command.
4052 * We avoid this situation by setting the DSA to an
4053 * invalid value when the CCB is completed and before
4054 * restarting the SCRIPTS.
4056 * Another issue is that we need some section of our
4057 * recovery procedures to be somehow uninterruptible but
4058 * the SCRIPTS processor does not provides such a
4059 * feature. For this reason, we handle recovery preferently
4060 * from the C code and check against some SCRIPTS critical
4061 * sections from the C code.
4063 * Hopefully, the interrupt handling of the driver is now
4064 * able to resist to weird BUS error conditions, but donnot
4065 * ask me for any guarantee that it will never fail. :-)
4066 * Use at your own decision and risk.
4069 static void sym_intr1 (hcb_p np)
4071 u_char istat, istatc;
4076 * interrupt on the fly ?
4078 * A `dummy read' is needed to ensure that the
4079 * clear of the INTF flag reaches the device
4080 * before the scanning of the DONE queue.
4082 istat = INB (nc_istat);
4084 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
4085 istat = INB (nc_istat); /* DUMMY READ */
4086 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
4087 (void)sym_wakeup_done (np);
4090 if (!(istat & (SIP|DIP)))
4093 #if 0 /* We should never get this one */
4095 OUTB (nc_istat, CABRT);
4099 * PAR and MA interrupts may occur at the same time,
4100 * and we need to know of both in order to handle
4101 * this situation properly. We try to unstack SCSI
4102 * interrupts for that reason. BTW, I dislike a LOT
4103 * such a loop inside the interrupt routine.
4104 * Even if DMA interrupt stacking is very unlikely to
4105 * happen, we also try unstacking these ones, since
4106 * this has no performance impact.
4113 sist |= INW (nc_sist);
4115 dstat |= INB (nc_dstat);
4116 istatc = INB (nc_istat);
4118 } while (istatc & (SIP|DIP));
4120 if (DEBUG_FLAGS & DEBUG_TINY)
4121 printf ("<%d|%x:%x|%x:%x>",
4124 (unsigned)INL(nc_dsp),
4125 (unsigned)INL(nc_dbc));
4127 * On paper, a memory barrier may be needed here.
4128 * And since we are paranoid ... :)
4133 * First, interrupts we want to service cleanly.
4135 * Phase mismatch (MA) is the most frequent interrupt
4136 * for chip earlier than the 896 and so we have to service
4137 * it as quickly as possible.
4138 * A SCSI parity error (PAR) may be combined with a phase
4139 * mismatch condition (MA).
4140 * Programmed interrupts (SIR) are used to call the C code
4142 * The single step interrupt (SSI) is not used in this
4145 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
4146 !(dstat & (MDPE|BF|ABRT|IID))) {
4147 if (sist & PAR) sym_int_par (np, sist);
4148 else if (sist & MA) sym_int_ma (np);
4149 else if (dstat & SIR) sym_int_sir (np);
4150 else if (dstat & SSI) OUTONB_STD ();
4151 else goto unknown_int;
4156 * Now, interrupts that donnot happen in normal
4157 * situations and that we may need to recover from.
4159 * On SCSI RESET (RST), we reset everything.
4160 * On SCSI BUS MODE CHANGE (SBMC), we complete all
4161 * active CCBs with RESET status, prepare all devices
4162 * for negotiating again and restart the SCRIPTS.
4163 * On STO and UDC, we complete the CCB with the corres-
4164 * ponding status and restart the SCRIPTS.
4167 xpt_print_path(np->path);
4168 printf("SCSI BUS reset detected.\n");
4173 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4174 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4176 if (!(sist & (GEN|HTH|SGE)) &&
4177 !(dstat & (MDPE|BF|ABRT|IID))) {
4178 if (sist & SBMC) sym_int_sbmc (np);
4179 else if (sist & STO) sym_int_sto (np);
4180 else if (sist & UDC) sym_int_udc (np);
4181 else goto unknown_int;
4186 * Now, interrupts we are not able to recover cleanly.
4188 * Log message for hard errors.
4192 sym_log_hard_error(np, sist, dstat);
4194 if ((sist & (GEN|HTH|SGE)) ||
4195 (dstat & (MDPE|BF|ABRT|IID))) {
4196 sym_start_reset(np);
4202 * We just miss the cause of the interrupt. :(
4203 * Print a message. The timeout will do the real work.
4205 printf( "%s: unknown interrupt(s) ignored, "
4206 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
4207 sym_name(np), istat, dstat, sist);
4210 static void sym_intr(void *arg)
4212 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
4213 sym_intr1((hcb_p) arg);
4214 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]");
4218 static void sym_poll(struct cam_sim *sim)
4221 sym_intr(cam_sim_softc(sim));
4227 * generic recovery from scsi interrupt
4229 * The doc says that when the chip gets an SCSI interrupt,
4230 * it tries to stop in an orderly fashion, by completing
4231 * an instruction fetch that had started or by flushing
4232 * the DMA fifo for a write to memory that was executing.
4233 * Such a fashion is not enough to know if the instruction
4234 * that was just before the current DSP value has been
4237 * There are some small SCRIPTS sections that deal with
4238 * the start queue and the done queue that may break any
4239 * assomption from the C code if we are interrupted
4240 * inside, so we reset if this happens. Btw, since these
4241 * SCRIPTS sections are executed while the SCRIPTS hasn't
4242 * started SCSI operations, it is very unlikely to happen.
4244 * All the driver data structures are supposed to be
4245 * allocated from the same 4 GB memory window, so there
4246 * is a 1 to 1 relationship between DSA and driver data
4247 * structures. Since we are careful :) to invalidate the
4248 * DSA when we complete a command or when the SCRIPTS
4249 * pushes a DSA into a queue, we can trust it when it
4252 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
4254 u32 dsp = INL (nc_dsp);
4255 u32 dsa = INL (nc_dsa);
4256 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4259 * If we haven't been interrupted inside the SCRIPTS
4260 * critical pathes, we can safely restart the SCRIPTS
4261 * and trust the DSA value if it matches a CCB.
4263 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4264 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4265 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4266 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4267 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4268 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4269 (!(dsp > SCRIPTA_BA (np, done) &&
4270 dsp < SCRIPTA_BA (np, done_end) + 1))) {
4271 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4272 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4274 * If we have a CCB, let the SCRIPTS call us back for
4275 * the handling of the error with SCRATCHA filled with
4276 * STARTPOS. This way, we will be able to freeze the
4277 * device queue and requeue awaiting IOs.
4280 cp->host_status = hsts;
4281 OUTL_DSP (SCRIPTA_BA (np, complete_error));
4284 * Otherwise just restart the SCRIPTS.
4287 OUTL (nc_dsa, 0xffffff);
4288 OUTL_DSP (SCRIPTA_BA (np, start));
4297 sym_start_reset(np);
4301 * chip exception handler for selection timeout
4303 void sym_int_sto (hcb_p np)
4305 u32 dsp = INL (nc_dsp);
4307 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
4309 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4310 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4312 sym_start_reset(np);
4316 * chip exception handler for unexpected disconnect
4318 void sym_int_udc (hcb_p np)
4320 printf ("%s: unexpected disconnect\n", sym_name(np));
4321 sym_recover_scsi_int(np, HS_UNEXPECTED);
4325 * chip exception handler for SCSI bus mode change
4327 * spi2-r12 11.2.3 says a transceiver mode change must
4328 * generate a reset event and a device that detects a reset
4329 * event shall initiate a hard reset. It says also that a
4330 * device that detects a mode change shall set data transfer
4331 * mode to eight bit asynchronous, etc...
4332 * So, just reinitializing all except chip should be enough.
4334 static void sym_int_sbmc (hcb_p np)
4336 u_char scsi_mode = INB (nc_stest4) & SMODE;
4341 xpt_print_path(np->path);
4342 printf("SCSI BUS mode change from %s to %s.\n",
4343 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4346 * Should suspend command processing for a few seconds and
4347 * reinitialize all except the chip.
4353 * chip exception handler for SCSI parity error.
4355 * When the chip detects a SCSI parity error and is
4356 * currently executing a (CH)MOV instruction, it does
4357 * not interrupt immediately, but tries to finish the
4358 * transfer of the current scatter entry before
4359 * interrupting. The following situations may occur:
4361 * - The complete scatter entry has been transferred
4362 * without the device having changed phase.
4363 * The chip will then interrupt with the DSP pointing
4364 * to the instruction that follows the MOV.
4366 * - A phase mismatch occurs before the MOV finished
4367 * and phase errors are to be handled by the C code.
4368 * The chip will then interrupt with both PAR and MA
4371 * - A phase mismatch occurs before the MOV finished and
4372 * phase errors are to be handled by SCRIPTS.
4373 * The chip will load the DSP with the phase mismatch
4374 * JUMP address and interrupt the host processor.
4376 static void sym_int_par (hcb_p np, u_short sist)
4378 u_char hsts = INB (HS_PRT);
4379 u32 dsp = INL (nc_dsp);
4380 u32 dbc = INL (nc_dbc);
4381 u32 dsa = INL (nc_dsa);
4382 u_char sbcl = INB (nc_sbcl);
4383 u_char cmd = dbc >> 24;
4384 int phase = cmd & 7;
4385 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4387 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4388 sym_name(np), hsts, dbc, sbcl);
4391 * Check that the chip is connected to the SCSI BUS.
4393 if (!(INB (nc_scntl1) & ISCON)) {
4394 sym_recover_scsi_int(np, HS_UNEXPECTED);
4399 * If the nexus is not clearly identified, reset the bus.
4400 * We will try to do better later.
4406 * Check instruction was a MOV, direction was INPUT and
4409 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4413 * Keep track of the parity error.
4415 OUTONB (HF_PRT, HF_EXT_ERR);
4416 cp->xerr_status |= XE_PARITY_ERR;
4419 * Prepare the message to send to the device.
4421 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4424 * If the old phase was DATA IN phase, we have to deal with
4425 * the 3 situations described above.
4426 * For other input phases (MSG IN and STATUS), the device
4427 * must resend the whole thing that failed parity checking
4428 * or signal error. So, jumping to dispatcher should be OK.
4430 if (phase == 1 || phase == 5) {
4431 /* Phase mismatch handled by SCRIPTS */
4432 if (dsp == SCRIPTB_BA (np, pm_handle))
4434 /* Phase mismatch handled by the C code */
4437 /* No phase mismatch occurred */
4439 OUTL (nc_temp, dsp);
4440 OUTL_DSP (SCRIPTA_BA (np, dispatch));
4444 OUTL_DSP (SCRIPTA_BA (np, clrack));
4448 sym_start_reset(np);
4453 * chip exception handler for phase errors.
4455 * We have to construct a new transfer descriptor,
4456 * to transfer the rest of the current block.
4458 static void sym_int_ma (hcb_p np)
4471 u_char hflags, hflags0;
4480 rest = dbc & 0xffffff;
4484 * locate matching cp if any.
4486 cp = sym_ccb_from_dsa(np, dsa);
4489 * Donnot take into account dma fifo and various buffers in
4490 * INPUT phase since the chip flushes everything before
4491 * raising the MA interrupt for interrupted INPUT phases.
4492 * For DATA IN phase, we will check for the SWIDE later.
4494 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4497 if (np->features & FE_DFBC)
4498 delta = INW (nc_dfbc);
4503 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4505 dfifo = INL(nc_dfifo);
4508 * Calculate remaining bytes in DMA fifo.
4509 * (CTEST5 = dfifo >> 16)
4511 if (dfifo & (DFS << 16))
4512 delta = ((((dfifo >> 8) & 0x300) |
4513 (dfifo & 0xff)) - rest) & 0x3ff;
4515 delta = ((dfifo & 0xff) - rest) & 0x7f;
4519 * The data in the dma fifo has not been transfered to
4520 * the target -> add the amount to the rest
4521 * and clear the data.
4522 * Check the sstat2 register in case of wide transfer.
4525 ss0 = INB (nc_sstat0);
4526 if (ss0 & OLF) rest++;
4527 if (!(np->features & FE_C10))
4528 if (ss0 & ORF) rest++;
4529 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4530 ss2 = INB (nc_sstat2);
4531 if (ss2 & OLF1) rest++;
4532 if (!(np->features & FE_C10))
4533 if (ss2 & ORF1) rest++;
4539 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
4540 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
4544 * log the information
4546 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4547 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4548 (unsigned) rest, (unsigned) delta);
4551 * try to find the interrupted script command,
4552 * and the address at which to continue.
4556 if (dsp > np->scripta_ba &&
4557 dsp <= np->scripta_ba + np->scripta_sz) {
4558 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4561 else if (dsp > np->scriptb_ba &&
4562 dsp <= np->scriptb_ba + np->scriptb_sz) {
4563 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4568 * log the information
4570 if (DEBUG_FLAGS & DEBUG_PHASE) {
4571 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4572 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4576 printf ("%s: interrupted SCRIPT address not found.\n",
4582 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4588 * get old startaddress and old length.
4590 oadr = scr_to_cpu(vdsp[1]);
4592 if (cmd & 0x10) { /* Table indirect */
4593 tblp = (u32 *) ((char*) &cp->phys + oadr);
4594 olen = scr_to_cpu(tblp[0]);
4595 oadr = scr_to_cpu(tblp[1]);
4598 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4601 if (DEBUG_FLAGS & DEBUG_PHASE) {
4602 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4603 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4610 * check cmd against assumed interrupted script command.
4611 * If dt data phase, the MOVE instruction hasn't bit 4 of
4614 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4616 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4617 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4623 * if old phase not dataphase, leave here.
4627 printf ("phase change %x-%x %d@%08x resid=%d.\n",
4628 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4629 (unsigned)oadr, (unsigned)rest);
4630 goto unexpected_phase;
4634 * Choose the correct PM save area.
4636 * Look at the PM_SAVE SCRIPT if you want to understand
4637 * this stuff. The equivalent code is implemented in
4638 * SCRIPTS for the 895A, 896 and 1010 that are able to
4639 * handle PM from the SCRIPTS processor.
4641 hflags0 = INB (HF_PRT);
4644 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4645 if (hflags & HF_IN_PM0)
4646 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4647 else if (hflags & HF_IN_PM1)
4648 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4650 if (hflags & HF_DP_SAVED)
4651 hflags ^= HF_ACT_PM;
4654 if (!(hflags & HF_ACT_PM)) {
4656 newcmd = SCRIPTA_BA (np, pm0_data);
4660 newcmd = SCRIPTA_BA (np, pm1_data);
4663 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4664 if (hflags != hflags0)
4665 OUTB (HF_PRT, hflags);
4668 * fillin the phase mismatch context
4670 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4671 pm->sg.size = cpu_to_scr(rest);
4672 pm->ret = cpu_to_scr(nxtdsp);
4675 * If we have a SWIDE,
4676 * - prepare the address to write the SWIDE from SCRIPTS,
4677 * - compute the SCRIPTS address to restart from,
4678 * - move current data pointer context by one byte.
4680 nxtdsp = SCRIPTA_BA (np, dispatch);
4681 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4682 (INB (nc_scntl2) & WSR)) {
4686 * Set up the table indirect for the MOVE
4687 * of the residual byte and adjust the data
4690 tmp = scr_to_cpu(pm->sg.addr);
4691 cp->phys.wresid.addr = cpu_to_scr(tmp);
4692 pm->sg.addr = cpu_to_scr(tmp + 1);
4693 tmp = scr_to_cpu(pm->sg.size);
4694 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4695 pm->sg.size = cpu_to_scr(tmp - 1);
4698 * If only the residual byte is to be moved,
4699 * no PM context is needed.
4701 if ((tmp&0xffffff) == 1)
4705 * Prepare the address of SCRIPTS that will
4706 * move the residual byte to memory.
4708 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4711 if (DEBUG_FLAGS & DEBUG_PHASE) {
4713 printf ("PM %x %x %x / %x %x %x.\n",
4714 hflags0, hflags, newcmd,
4715 (unsigned)scr_to_cpu(pm->sg.addr),
4716 (unsigned)scr_to_cpu(pm->sg.size),
4717 (unsigned)scr_to_cpu(pm->ret));
4721 * Restart the SCRIPTS processor.
4723 OUTL (nc_temp, newcmd);
4728 * Unexpected phase changes that occurs when the current phase
4729 * is not a DATA IN or DATA OUT phase are due to error conditions.
4730 * Such event may only happen when the SCRIPTS is using a
4731 * multibyte SCSI MOVE.
4733 * Phase change Some possible cause
4735 * COMMAND --> MSG IN SCSI parity error detected by target.
4736 * COMMAND --> STATUS Bad command or refused by target.
4737 * MSG OUT --> MSG IN Message rejected by target.
4738 * MSG OUT --> COMMAND Bogus target that discards extended
4739 * negotiation messages.
4741 * The code below does not care of the new phase and so
4742 * trusts the target. Why to annoy it ?
4743 * If the interrupted phase is COMMAND phase, we restart at
4745 * If a target does not get all the messages after selection,
4746 * the code assumes blindly that the target discards extended
4747 * messages and clears the negotiation status.
4748 * If the target does not want all our response to negotiation,
4749 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4750 * bloat for such a should_not_happen situation).
4751 * In all other situation, we reset the BUS.
4752 * Are these assumptions reasonnable ? (Wait and see ...)
4759 case 2: /* COMMAND phase */
4760 nxtdsp = SCRIPTA_BA (np, dispatch);
4763 case 3: /* STATUS phase */
4764 nxtdsp = SCRIPTA_BA (np, dispatch);
4767 case 6: /* MSG OUT phase */
4769 * If the device may want to use untagged when we want
4770 * tagged, we prepare an IDENTIFY without disc. granted,
4771 * since we will not be able to handle reselect.
4772 * Otherwise, we just don't care.
4774 if (dsp == SCRIPTA_BA (np, send_ident)) {
4775 if (cp->tag != NO_TAG && olen - rest <= 3) {
4776 cp->host_status = HS_BUSY;
4777 np->msgout[0] = M_IDENTIFY | cp->lun;
4778 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4781 nxtdsp = SCRIPTB_BA (np, ident_break);
4783 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
4784 dsp == SCRIPTB_BA (np, send_sdtr) ||
4785 dsp == SCRIPTB_BA (np, send_ppr)) {
4786 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4790 case 7: /* MSG IN phase */
4791 nxtdsp = SCRIPTA_BA (np, clrack);
4802 sym_start_reset(np);
4806 * Dequeue from the START queue all CCBs that match
4807 * a given target/lun/task condition (-1 means all),
4808 * and move them from the BUSY queue to the COMP queue
4809 * with CAM_REQUEUE_REQ status condition.
4810 * This function is used during error handling/recovery.
4811 * It is called with SCRIPTS not running.
4814 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4820 * Make sure the starting index is within range.
4822 assert((i >= 0) && (i < 2*MAX_QUEUE));
4825 * Walk until end of START queue and dequeue every job
4826 * that matches the target/lun/task condition.
4829 while (i != np->squeueput) {
4830 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4832 #ifdef SYM_CONF_IARB_SUPPORT
4833 /* Forget hints for IARB, they may be no longer relevant */
4834 cp->host_flags &= ~HF_HINT_IARB;
4836 if ((target == -1 || cp->target == target) &&
4837 (lun == -1 || cp->lun == lun) &&
4838 (task == -1 || cp->tag == task)) {
4839 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4840 sym_remque(&cp->link_ccbq);
4841 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4845 np->squeue[j] = np->squeue[i];
4846 if ((j += 2) >= MAX_QUEUE*2) j = 0;
4848 if ((i += 2) >= MAX_QUEUE*2) i = 0;
4850 if (i != j) /* Copy back the idle task if needed */
4851 np->squeue[j] = np->squeue[i];
4852 np->squeueput = j; /* Update our current start queue pointer */
4858 * Complete all CCBs queued to the COMP queue.
4860 * These CCBs are assumed:
4861 * - Not to be referenced either by devices or
4862 * SCRIPTS-related queues and datas.
4863 * - To have to be completed with an error condition
4866 * The device queue freeze count is incremented
4867 * for each CCB that does not prevent this.
4868 * This function is called when all CCBs involved
4869 * in error handling/recovery have been reaped.
4872 sym_flush_comp_queue(hcb_p np, int cam_status)
4877 while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) {
4879 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4880 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4881 /* Leave quiet CCBs waiting for resources */
4882 if (cp->host_status == HS_WAIT)
4886 sym_set_cam_status(ccb, cam_status);
4887 sym_free_ccb(np, cp);
4888 sym_freeze_cam_ccb(ccb);
4889 sym_xpt_done(np, ccb);
4894 * chip handler for bad SCSI status condition
4896 * In case of bad SCSI status, we unqueue all the tasks
4897 * currently queued to the controller but not yet started
4898 * and then restart the SCRIPTS processor immediately.
4900 * QUEUE FULL and BUSY conditions are handled the same way.
4901 * Basically all the not yet started tasks are requeued in
4902 * device queue and the queue is frozen until a completion.
4904 * For CHECK CONDITION and COMMAND TERMINATED status, we use
4905 * the CCB of the failed command to prepare a REQUEST SENSE
4906 * SCSI command and queue it to the controller queue.
4908 * SCRATCHA is assumed to have been loaded with STARTPOS
4909 * before the SCRIPTS called the C code.
4911 static void sym_sir_bad_scsi_status(hcb_p np, int num, ccb_p cp)
4913 tcb_p tp = &np->target[cp->target];
4915 u_char s_status = cp->ssss_status;
4916 u_char h_flags = cp->host_flags;
4922 * Compute the index of the next job to start from SCRIPTS.
4924 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4927 * The last CCB queued used for IARB hint may be
4928 * no longer relevant. Forget it.
4930 #ifdef SYM_CONF_IARB_SUPPORT
4936 * Now deal with the SCSI status.
4941 if (sym_verbose >= 2) {
4943 printf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4945 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
4946 sym_complete_error (np, cp);
4951 * If we get an SCSI error when requesting sense, give up.
4953 if (h_flags & HF_SENSE) {
4954 sym_complete_error (np, cp);
4959 * Dequeue all queued CCBs for that device not yet started,
4960 * and restart the SCRIPTS processor immediately.
4962 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4963 OUTL_DSP (SCRIPTA_BA (np, start));
4966 * Save some info of the actual IO.
4967 * Compute the data residual.
4969 cp->sv_scsi_status = cp->ssss_status;
4970 cp->sv_xerr_status = cp->xerr_status;
4971 cp->sv_resid = sym_compute_residual(np, cp);
4974 * Prepare all needed data structures for
4975 * requesting sense data.
4981 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4985 * If we are currently using anything different from
4986 * async. 8 bit data transfers with that target,
4987 * start a negotiation, since the device may want
4988 * to report us a UNIT ATTENTION condition due to
4989 * a cause we currently ignore, and we donnot want
4990 * to be stuck with WIDE and/or SYNC data transfer.
4992 * cp->nego_status is filled by sym_prepare_nego().
4994 cp->nego_status = 0;
4996 if (tp->tinfo.current.options & PPR_OPT_MASK)
4998 else if (tp->tinfo.current.width != BUS_8_BIT)
5000 else if (tp->tinfo.current.offset != 0)
5004 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
5006 * Message table indirect structure.
5008 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
5009 cp->phys.smsg.size = cpu_to_scr(msglen);
5014 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
5015 cp->phys.cmd.size = cpu_to_scr(6);
5018 * patch requested size into sense command
5020 cp->sensecmd[0] = 0x03;
5021 cp->sensecmd[1] = cp->lun << 5;
5022 #ifdef FreeBSD_New_Tran_Settings
5023 if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
5024 cp->sensecmd[1] = 0;
5026 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
5027 cp->data_len = SYM_SNS_BBUF_LEN;
5032 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
5033 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
5034 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
5037 * requeue the command.
5039 startp = SCRIPTB_BA (np, sdata_in);
5041 cp->phys.head.savep = cpu_to_scr(startp);
5042 cp->phys.head.goalp = cpu_to_scr(startp + 16);
5043 cp->phys.head.lastp = cpu_to_scr(startp);
5044 cp->startp = cpu_to_scr(startp);
5046 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
5047 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
5048 cp->ssss_status = S_ILLEGAL;
5049 cp->host_flags = (HF_SENSE|HF_DATA_IN);
5050 cp->xerr_status = 0;
5051 cp->extra_bytes = 0;
5053 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
5056 * Requeue the command.
5058 sym_put_start_queue(np, cp);
5061 * Give back to upper layer everything we have dequeued.
5063 sym_flush_comp_queue(np, 0);
5069 * After a device has accepted some management message
5070 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
5071 * a device signals a UNIT ATTENTION condition, some
5072 * tasks are thrown away by the device. We are required
5073 * to reflect that on our tasks list since the device
5074 * will never complete these tasks.
5076 * This function move from the BUSY queue to the COMP
5077 * queue all disconnected CCBs for a given target that
5078 * match the following criteria:
5079 * - lun=-1 means any logical UNIT otherwise a given one.
5080 * - task=-1 means any task, otherwise a given one.
5083 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
5085 SYM_QUEHEAD qtmp, *qp;
5090 * Move the entire BUSY queue to our temporary queue.
5092 sym_que_init(&qtmp);
5093 sym_que_splice(&np->busy_ccbq, &qtmp);
5094 sym_que_init(&np->busy_ccbq);
5097 * Put all CCBs that matches our criteria into
5098 * the COMP queue and put back other ones into
5101 while ((qp = sym_remque_head(&qtmp)) != 0) {
5103 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5105 if (cp->host_status != HS_DISCONNECT ||
5106 cp->target != target ||
5107 (lun != -1 && cp->lun != lun) ||
5109 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
5110 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
5113 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
5115 /* Preserve the software timeout condition */
5116 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
5117 sym_set_cam_status(ccb, cam_status);
5120 printf("XXXX TASK @%p CLEARED\n", cp);
5127 * chip handler for TASKS recovery
5129 * We cannot safely abort a command, while the SCRIPTS
5130 * processor is running, since we just would be in race
5133 * As long as we have tasks to abort, we keep the SEM
5134 * bit set in the ISTAT. When this bit is set, the
5135 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
5136 * each time it enters the scheduler.
5138 * If we have to reset a target, clear tasks of a unit,
5139 * or to perform the abort of a disconnected job, we
5140 * restart the SCRIPTS for selecting the target. Once
5141 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
5142 * If it loses arbitration, the SCRIPTS will interrupt again
5143 * the next time it will enter its scheduler, and so on ...
5145 * On SIR_TARGET_SELECTED, we scan for the more
5146 * appropriate thing to do:
5148 * - If nothing, we just sent a M_ABORT message to the
5149 * target to get rid of the useless SCSI bus ownership.
5150 * According to the specs, no tasks shall be affected.
5151 * - If the target is to be reset, we send it a M_RESET
5153 * - If a logical UNIT is to be cleared , we send the
5154 * IDENTIFY(lun) + M_ABORT.
5155 * - If an untagged task is to be aborted, we send the
5156 * IDENTIFY(lun) + M_ABORT.
5157 * - If a tagged task is to be aborted, we send the
5158 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
5160 * Once our 'kiss of death' :) message has been accepted
5161 * by the target, the SCRIPTS interrupts again
5162 * (SIR_ABORT_SENT). On this interrupt, we complete
5163 * all the CCBs that should have been aborted by the
5164 * target according to our message.
5166 static void sym_sir_task_recovery(hcb_p np, int num)
5171 int target=-1, lun=-1, task;
5176 * The SCRIPTS processor stopped before starting
5177 * the next command in order to allow us to perform
5178 * some task recovery.
5180 case SIR_SCRIPT_STOPPED:
5182 * Do we have any target to reset or unit to clear ?
5184 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
5185 tp = &np->target[i];
5187 (tp->lun0p && tp->lun0p->to_clear)) {
5193 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5194 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5204 * If not, walk the busy queue for any
5205 * disconnected CCB to be aborted.
5208 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5209 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
5210 if (cp->host_status != HS_DISCONNECT)
5213 target = cp->target;
5220 * If some target is to be selected,
5221 * prepare and start the selection.
5224 tp = &np->target[target];
5225 np->abrt_sel.sel_id = target;
5226 np->abrt_sel.sel_scntl3 = tp->head.wval;
5227 np->abrt_sel.sel_sxfer = tp->head.sval;
5228 OUTL(nc_dsa, np->hcb_ba);
5229 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
5234 * Now look for a CCB to abort that haven't started yet.
5235 * Btw, the SCRIPTS processor is still stopped, so
5236 * we are not in race.
5240 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5241 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5242 if (cp->host_status != HS_BUSY &&
5243 cp->host_status != HS_NEGOTIATE)
5247 #ifdef SYM_CONF_IARB_SUPPORT
5249 * If we are using IMMEDIATE ARBITRATION, we donnot
5250 * want to cancel the last queued CCB, since the
5251 * SCRIPTS may have anticipated the selection.
5253 if (cp == np->last_cp) {
5258 i = 1; /* Means we have found some */
5263 * We are done, so we donnot need
5264 * to synchronize with the SCRIPTS anylonger.
5265 * Remove the SEM flag from the ISTAT.
5268 OUTB (nc_istat, SIGP);
5272 * Compute index of next position in the start
5273 * queue the SCRIPTS intends to start and dequeue
5274 * all CCBs for that device that haven't been started.
5276 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5277 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5280 * Make sure at least our IO to abort has been dequeued.
5282 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5285 * Keep track in cam status of the reason of the abort.
5287 if (cp->to_abort == 2)
5288 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5290 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5293 * Complete with error everything that we have dequeued.
5295 sym_flush_comp_queue(np, 0);
5298 * The SCRIPTS processor has selected a target
5299 * we may have some manual recovery to perform for.
5301 case SIR_TARGET_SELECTED:
5302 target = (INB (nc_sdid) & 0xf);
5303 tp = &np->target[target];
5305 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5308 * If the target is to be reset, prepare a
5309 * M_RESET message and clear the to_reset flag
5310 * since we donnot expect this operation to fail.
5313 np->abrt_msg[0] = M_RESET;
5314 np->abrt_tbl.size = 1;
5320 * Otherwise, look for some logical unit to be cleared.
5322 if (tp->lun0p && tp->lun0p->to_clear)
5324 else if (tp->lunmp) {
5325 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5326 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5334 * If a logical unit is to be cleared, prepare
5335 * an IDENTIFY(lun) + ABORT MESSAGE.
5338 lcb_p lp = sym_lp(np, tp, lun);
5339 lp->to_clear = 0; /* We donnot expect to fail here */
5340 np->abrt_msg[0] = M_IDENTIFY | lun;
5341 np->abrt_msg[1] = M_ABORT;
5342 np->abrt_tbl.size = 2;
5347 * Otherwise, look for some disconnected job to
5348 * abort for this target.
5352 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5353 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5354 if (cp->host_status != HS_DISCONNECT)
5356 if (cp->target != target)
5360 i = 1; /* Means we have some */
5365 * If we have none, probably since the device has
5366 * completed the command before we won abitration,
5367 * send a M_ABORT message without IDENTIFY.
5368 * According to the specs, the device must just
5369 * disconnect the BUS and not abort any task.
5372 np->abrt_msg[0] = M_ABORT;
5373 np->abrt_tbl.size = 1;
5378 * We have some task to abort.
5379 * Set the IDENTIFY(lun)
5381 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5384 * If we want to abort an untagged command, we
5385 * will send a IDENTIFY + M_ABORT.
5386 * Otherwise (tagged command), we will send
5387 * a IDENTITFY + task attributes + ABORT TAG.
5389 if (cp->tag == NO_TAG) {
5390 np->abrt_msg[1] = M_ABORT;
5391 np->abrt_tbl.size = 2;
5394 np->abrt_msg[1] = cp->scsi_smsg[1];
5395 np->abrt_msg[2] = cp->scsi_smsg[2];
5396 np->abrt_msg[3] = M_ABORT_TAG;
5397 np->abrt_tbl.size = 4;
5400 * Keep track of software timeout condition, since the
5401 * peripheral driver may not count retries on abort
5402 * conditions not due to timeout.
5404 if (cp->to_abort == 2)
5405 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5406 cp->to_abort = 0; /* We donnot expect to fail here */
5410 * The target has accepted our message and switched
5411 * to BUS FREE phase as we expected.
5413 case SIR_ABORT_SENT:
5414 target = (INB (nc_sdid) & 0xf);
5415 tp = &np->target[target];
5418 ** If we didn't abort anything, leave here.
5420 if (np->abrt_msg[0] == M_ABORT)
5424 * If we sent a M_RESET, then a hardware reset has
5425 * been performed by the target.
5426 * - Reset everything to async 8 bit
5427 * - Tell ourself to negotiate next time :-)
5428 * - Prepare to clear all disconnected CCBs for
5429 * this target from our task list (lun=task=-1)
5433 if (np->abrt_msg[0] == M_RESET) {
5435 tp->head.wval = np->rv_scntl3;
5437 tp->tinfo.current.period = 0;
5438 tp->tinfo.current.offset = 0;
5439 tp->tinfo.current.width = BUS_8_BIT;
5440 tp->tinfo.current.options = 0;
5444 * Otherwise, check for the LUN and TASK(s)
5445 * concerned by the cancelation.
5446 * If it is not ABORT_TAG then it is CLEAR_QUEUE
5447 * or an ABORT message :-)
5450 lun = np->abrt_msg[0] & 0x3f;
5451 if (np->abrt_msg[1] == M_ABORT_TAG)
5452 task = np->abrt_msg[2];
5456 * Complete all the CCBs the device should have
5457 * aborted due to our 'kiss of death' message.
5459 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5460 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5461 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5462 sym_flush_comp_queue(np, 0);
5465 * If we sent a BDR, make uper layer aware of that.
5467 if (np->abrt_msg[0] == M_RESET)
5468 xpt_async(AC_SENT_BDR, np->path, NULL);
5473 * Print to the log the message we intend to send.
5475 if (num == SIR_TARGET_SELECTED) {
5476 PRINT_TARGET(np, target);
5477 sym_printl_hex("control msgout:", np->abrt_msg,
5479 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5483 * Let the SCRIPTS processor continue.
5489 * Gerard's alchemy:) that deals with with the data
5490 * pointer for both MDP and the residual calculation.
5492 * I didn't want to bloat the code by more than 200
5493 * lignes for the handling of both MDP and the residual.
5494 * This has been achieved by using a data pointer
5495 * representation consisting in an index in the data
5496 * array (dp_sg) and a negative offset (dp_ofs) that
5497 * have the following meaning:
5499 * - dp_sg = SYM_CONF_MAX_SG
5500 * we are at the end of the data script.
5501 * - dp_sg < SYM_CONF_MAX_SG
5502 * dp_sg points to the next entry of the scatter array
5503 * we want to transfer.
5505 * dp_ofs represents the residual of bytes of the
5506 * previous entry scatter entry we will send first.
5508 * no residual to send first.
5510 * The function sym_evaluate_dp() accepts an arbitray
5511 * offset (basically from the MDP message) and returns
5512 * the corresponding values of dp_sg and dp_ofs.
5515 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5518 int dp_ofs, dp_sg, dp_sgmin;
5523 * Compute the resulted data pointer in term of a script
5524 * address within some DATA script and a signed byte offset.
5528 if (dp_scr == SCRIPTA_BA (np, pm0_data))
5530 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5536 dp_scr = scr_to_cpu(pm->ret);
5537 dp_ofs -= scr_to_cpu(pm->sg.size);
5541 * If we are auto-sensing, then we are done.
5543 if (cp->host_flags & HF_SENSE) {
5549 * Deduce the index of the sg entry.
5550 * Keep track of the index of the first valid entry.
5551 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5554 tmp = scr_to_cpu(cp->phys.head.goalp);
5555 dp_sg = SYM_CONF_MAX_SG;
5557 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5558 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5561 * Move to the sg entry the data pointer belongs to.
5563 * If we are inside the data area, we expect result to be:
5566 * dp_ofs = 0 and dp_sg is the index of the sg entry
5567 * the data pointer belongs to (or the end of the data)
5569 * dp_ofs < 0 and dp_sg is the index of the sg entry
5570 * the data pointer belongs to + 1.
5574 while (dp_sg > dp_sgmin) {
5576 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5577 n = dp_ofs + (tmp & 0xffffff);
5585 else if (dp_ofs > 0) {
5586 while (dp_sg < SYM_CONF_MAX_SG) {
5587 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5588 dp_ofs -= (tmp & 0xffffff);
5596 * Make sure the data pointer is inside the data area.
5597 * If not, return some error.
5599 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5601 else if (dp_sg > SYM_CONF_MAX_SG ||
5602 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5606 * Save the extreme pointer if needed.
5608 if (dp_sg > cp->ext_sg ||
5609 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5611 cp->ext_ofs = dp_ofs;
5625 * chip handler for MODIFY DATA POINTER MESSAGE
5627 * We also call this function on IGNORE WIDE RESIDUE
5628 * messages that do not match a SWIDE full condition.
5629 * Btw, we assume in that situation that such a message
5630 * is equivalent to a MODIFY DATA POINTER (offset=-1).
5633 static void sym_modify_dp(hcb_p np, tcb_p tp, ccb_p cp, int ofs)
5636 u32 dp_scr = INL (nc_temp);
5644 * Not supported for auto-sense.
5646 if (cp->host_flags & HF_SENSE)
5650 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
5651 * to the resulted data pointer.
5653 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5658 * And our alchemy:) allows to easily calculate the data
5659 * script address we want to return for the next data phase.
5661 dp_ret = cpu_to_scr(cp->phys.head.goalp);
5662 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5665 * If offset / scatter entry is zero we donnot need
5666 * a context for the new current data pointer.
5674 * Get a context for the new current data pointer.
5676 hflags = INB (HF_PRT);
5678 if (hflags & HF_DP_SAVED)
5679 hflags ^= HF_ACT_PM;
5681 if (!(hflags & HF_ACT_PM)) {
5683 dp_scr = SCRIPTA_BA (np, pm0_data);
5687 dp_scr = SCRIPTA_BA (np, pm1_data);
5690 hflags &= ~(HF_DP_SAVED);
5692 OUTB (HF_PRT, hflags);
5695 * Set up the new current data pointer.
5696 * ofs < 0 there, and for the next data phase, we
5697 * want to transfer part of the data of the sg entry
5698 * corresponding to index dp_sg-1 prior to returning
5699 * to the main data script.
5701 pm->ret = cpu_to_scr(dp_ret);
5702 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5703 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5704 pm->sg.addr = cpu_to_scr(tmp);
5705 pm->sg.size = cpu_to_scr(-dp_ofs);
5708 OUTL (nc_temp, dp_scr);
5709 OUTL_DSP (SCRIPTA_BA (np, clrack));
5713 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5718 * chip calculation of the data residual.
5720 * As I used to say, the requirement of data residual
5721 * in SCSI is broken, useless and cannot be achieved
5722 * without huge complexity.
5723 * But most OSes and even the official CAM require it.
5724 * When stupidity happens to be so widely spread inside
5725 * a community, it gets hard to convince.
5727 * Anyway, I don't care, since I am not going to use
5728 * any software that considers this data residual as
5729 * a relevant information. :)
5732 static int sym_compute_residual(hcb_p np, ccb_p cp)
5734 int dp_sg, dp_sgmin, resid = 0;
5738 * Check for some data lost or just thrown away.
5739 * We are not required to be quite accurate in this
5740 * situation. Btw, if we are odd for output and the
5741 * device claims some more data, it may well happen
5742 * than our residual be zero. :-)
5744 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5745 if (cp->xerr_status & XE_EXTRA_DATA)
5746 resid -= cp->extra_bytes;
5747 if (cp->xerr_status & XE_SODL_UNRUN)
5749 if (cp->xerr_status & XE_SWIDE_OVRUN)
5754 * If all data has been transferred,
5755 * there is no residual.
5757 if (cp->phys.head.lastp == cp->phys.head.goalp)
5761 * If no data transfer occurs, or if the data
5762 * pointer is weird, return full residual.
5764 if (cp->startp == cp->phys.head.lastp ||
5765 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5767 return cp->data_len;
5771 * If we were auto-sensing, then we are done.
5773 if (cp->host_flags & HF_SENSE) {
5778 * We are now full comfortable in the computation
5779 * of the data residual (2's complement).
5781 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5782 resid = -cp->ext_ofs;
5783 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5784 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5785 resid += (tmp & 0xffffff);
5789 * Hopefully, the result is not too wrong.
5795 * Print out the content of a SCSI message.
5798 static int sym_show_msg (u_char * msg)
5802 if (*msg==M_EXTENDED) {
5804 if (i-1>msg[1]) break;
5805 printf ("-%x",msg[i]);
5808 } else if ((*msg & 0xf0) == 0x20) {
5809 printf ("-%x",msg[1]);
5815 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5819 printf ("%s: ", label);
5821 (void) sym_show_msg (msg);
5826 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5828 * When we try to negotiate, we append the negotiation message
5829 * to the identify and (maybe) simple tag message.
5830 * The host status field is set to HS_NEGOTIATE to mark this
5833 * If the target doesn't answer this message immediately
5834 * (as required by the standard), the SIR_NEGO_FAILED interrupt
5835 * will be raised eventually.
5836 * The handler removes the HS_NEGOTIATE status, and sets the
5837 * negotiated value to the default (async / nowide).
5839 * If we receive a matching answer immediately, we check it
5840 * for validity, and set the values.
5842 * If we receive a Reject message immediately, we assume the
5843 * negotiation has failed, and fall back to standard values.
5845 * If we receive a negotiation message while not in HS_NEGOTIATE
5846 * state, it's a target initiated negotiation. We prepare a
5847 * (hopefully) valid answer, set our parameters, and send back
5848 * this answer to the target.
5850 * If the target doesn't fetch the answer (no message out phase),
5851 * we assume the negotiation has failed, and fall back to default
5852 * settings (SIR_NEGO_PROTO interrupt).
5854 * When we set the values, we adjust them in all ccbs belonging
5855 * to this target, in the controller's register, and in the "phys"
5856 * field of the controller's struct sym_hcb.
5860 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5862 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5864 u_char chg, ofs, per, fak, div;
5868 * Synchronous request message received.
5870 if (DEBUG_FLAGS & DEBUG_NEGO) {
5871 sym_print_msg(cp, "sync msgin", np->msgin);
5875 * request or answer ?
5877 if (INB (HS_PRT) == HS_NEGOTIATE) {
5878 OUTB (HS_PRT, HS_BUSY);
5879 if (cp->nego_status && cp->nego_status != NS_SYNC)
5885 * get requested values.
5892 * check values against our limits.
5895 if (ofs > np->maxoffs)
5896 {chg = 1; ofs = np->maxoffs;}
5898 if (ofs > tp->tinfo.user.offset)
5899 {chg = 1; ofs = tp->tinfo.user.offset;}
5904 if (per < np->minsync)
5905 {chg = 1; per = np->minsync;}
5907 if (per < tp->tinfo.user.period)
5908 {chg = 1; per = tp->tinfo.user.period;}
5913 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5916 if (DEBUG_FLAGS & DEBUG_NEGO) {
5918 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5919 ofs, per, div, fak, chg);
5923 * This was an answer message
5926 if (chg) /* Answer wasn't acceptable. */
5928 sym_setsync (np, cp, ofs, per, div, fak);
5929 OUTL_DSP (SCRIPTA_BA (np, clrack));
5934 * It was a request. Set value and
5935 * prepare an answer message
5937 sym_setsync (np, cp, ofs, per, div, fak);
5939 np->msgout[0] = M_EXTENDED;
5941 np->msgout[2] = M_X_SYNC_REQ;
5942 np->msgout[3] = per;
5943 np->msgout[4] = ofs;
5945 cp->nego_status = NS_SYNC;
5947 if (DEBUG_FLAGS & DEBUG_NEGO) {
5948 sym_print_msg(cp, "sync msgout", np->msgout);
5951 np->msgin [0] = M_NOOP;
5953 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5956 sym_setsync (np, cp, 0, 0, 0, 0);
5957 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5961 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5963 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5965 u_char chg, ofs, per, fak, dt, div, wide;
5969 * Synchronous request message received.
5971 if (DEBUG_FLAGS & DEBUG_NEGO) {
5972 sym_print_msg(cp, "ppr msgin", np->msgin);
5976 * get requested values.
5981 wide = np->msgin[6];
5982 dt = np->msgin[7] & PPR_OPT_DT;
5985 * request or answer ?
5987 if (INB (HS_PRT) == HS_NEGOTIATE) {
5988 OUTB (HS_PRT, HS_BUSY);
5989 if (cp->nego_status && cp->nego_status != NS_PPR)
5995 * check values against our limits.
5997 if (wide > np->maxwide)
5998 {chg = 1; wide = np->maxwide;}
5999 if (!wide || !(np->features & FE_ULTRA3))
6002 if (wide > tp->tinfo.user.width)
6003 {chg = 1; wide = tp->tinfo.user.width;}
6006 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
6009 if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
6013 if (ofs > np->maxoffs_dt)
6014 {chg = 1; ofs = np->maxoffs_dt;}
6016 else if (ofs > np->maxoffs)
6017 {chg = 1; ofs = np->maxoffs;}
6019 if (ofs > tp->tinfo.user.offset)
6020 {chg = 1; ofs = tp->tinfo.user.offset;}
6026 if (per < np->minsync_dt)
6027 {chg = 1; per = np->minsync_dt;}
6029 else if (per < np->minsync)
6030 {chg = 1; per = np->minsync;}
6032 if (per < tp->tinfo.user.period)
6033 {chg = 1; per = tp->tinfo.user.period;}
6038 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
6041 if (DEBUG_FLAGS & DEBUG_NEGO) {
6044 "dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
6045 dt, ofs, per, wide, div, fak, chg);
6052 if (chg) /* Answer wasn't acceptable */
6054 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
6055 OUTL_DSP (SCRIPTA_BA (np, clrack));
6060 * It was a request. Set value and
6061 * prepare an answer message
6063 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
6065 np->msgout[0] = M_EXTENDED;
6067 np->msgout[2] = M_X_PPR_REQ;
6068 np->msgout[3] = per;
6070 np->msgout[5] = ofs;
6071 np->msgout[6] = wide;
6074 cp->nego_status = NS_PPR;
6076 if (DEBUG_FLAGS & DEBUG_NEGO) {
6077 sym_print_msg(cp, "ppr msgout", np->msgout);
6080 np->msgin [0] = M_NOOP;
6082 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
6085 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
6086 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6088 * If it was a device response that should result in
6089 * ST, we may want to try a legacy negotiation later.
6092 tp->tinfo.goal.options = 0;
6093 tp->tinfo.goal.width = wide;
6094 tp->tinfo.goal.period = per;
6095 tp->tinfo.goal.offset = ofs;
6101 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
6103 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
6109 * Wide request message received.
6111 if (DEBUG_FLAGS & DEBUG_NEGO) {
6112 sym_print_msg(cp, "wide msgin", np->msgin);
6116 * Is it an request from the device?
6118 if (INB (HS_PRT) == HS_NEGOTIATE) {
6119 OUTB (HS_PRT, HS_BUSY);
6120 if (cp->nego_status && cp->nego_status != NS_WIDE)
6126 * get requested values.
6129 wide = np->msgin[3];
6132 * check values against driver limits.
6134 if (wide > np->maxwide)
6135 {chg = 1; wide = np->maxwide;}
6137 if (wide > tp->tinfo.user.width)
6138 {chg = 1; wide = tp->tinfo.user.width;}
6141 if (DEBUG_FLAGS & DEBUG_NEGO) {
6143 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
6147 * This was an answer message
6150 if (chg) /* Answer wasn't acceptable. */
6152 sym_setwide (np, cp, wide);
6155 * Negotiate for SYNC immediately after WIDE response.
6156 * This allows to negotiate for both WIDE and SYNC on
6157 * a single SCSI command (Suggested by Justin Gibbs).
6159 if (tp->tinfo.goal.offset) {
6160 np->msgout[0] = M_EXTENDED;
6162 np->msgout[2] = M_X_SYNC_REQ;
6163 np->msgout[3] = tp->tinfo.goal.period;
6164 np->msgout[4] = tp->tinfo.goal.offset;
6166 if (DEBUG_FLAGS & DEBUG_NEGO) {
6167 sym_print_msg(cp, "sync msgout", np->msgout);
6170 cp->nego_status = NS_SYNC;
6171 OUTB (HS_PRT, HS_NEGOTIATE);
6172 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
6176 OUTL_DSP (SCRIPTA_BA (np, clrack));
6181 * It was a request, set value and
6182 * prepare an answer message
6184 sym_setwide (np, cp, wide);
6186 np->msgout[0] = M_EXTENDED;
6188 np->msgout[2] = M_X_WIDE_REQ;
6189 np->msgout[3] = wide;
6191 np->msgin [0] = M_NOOP;
6193 cp->nego_status = NS_WIDE;
6195 if (DEBUG_FLAGS & DEBUG_NEGO) {
6196 sym_print_msg(cp, "wide msgout", np->msgout);
6199 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
6202 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6206 * Reset SYNC or WIDE to default settings.
6208 * Called when a negotiation does not succeed either
6209 * on rejection or on protocol error.
6211 * If it was a PPR that made problems, we may want to
6212 * try a legacy negotiation later.
6214 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
6217 * any error in negotiation:
6218 * fall back to default mode.
6220 switch (cp->nego_status) {
6223 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
6225 tp->tinfo.goal.options = 0;
6226 if (tp->tinfo.goal.period < np->minsync)
6227 tp->tinfo.goal.period = np->minsync;
6228 if (tp->tinfo.goal.offset > np->maxoffs)
6229 tp->tinfo.goal.offset = np->maxoffs;
6233 sym_setsync (np, cp, 0, 0, 0, 0);
6236 sym_setwide (np, cp, 0);
6239 np->msgin [0] = M_NOOP;
6240 np->msgout[0] = M_NOOP;
6241 cp->nego_status = 0;
6245 * chip handler for MESSAGE REJECT received in response to
6246 * a WIDE or SYNCHRONOUS negotiation.
6248 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
6250 sym_nego_default(np, tp, cp);
6251 OUTB (HS_PRT, HS_BUSY);
6255 * chip exception handler for programmed interrupts.
6257 void sym_int_sir (hcb_p np)
6259 u_char num = INB (nc_dsps);
6260 u32 dsa = INL (nc_dsa);
6261 ccb_p cp = sym_ccb_from_dsa(np, dsa);
6262 u_char target = INB (nc_sdid) & 0x0f;
6263 tcb_p tp = &np->target[target];
6266 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
6270 * Command has been completed with error condition
6271 * or has been auto-sensed.
6273 case SIR_COMPLETE_ERROR:
6274 sym_complete_error(np, cp);
6277 * The C code is currently trying to recover from something.
6278 * Typically, user want to abort some command.
6280 case SIR_SCRIPT_STOPPED:
6281 case SIR_TARGET_SELECTED:
6282 case SIR_ABORT_SENT:
6283 sym_sir_task_recovery(np, num);
6286 * The device didn't go to MSG OUT phase after having
6287 * been selected with ATN. We donnot want to handle
6290 case SIR_SEL_ATN_NO_MSG_OUT:
6291 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6292 sym_name (np), target);
6295 * The device didn't switch to MSG IN phase after
6296 * having reseleted the initiator.
6298 case SIR_RESEL_NO_MSG_IN:
6299 printf ("%s:%d: No MSG IN phase after reselection.\n",
6300 sym_name (np), target);
6303 * After reselection, the device sent a message that wasn't
6306 case SIR_RESEL_NO_IDENTIFY:
6307 printf ("%s:%d: No IDENTIFY after reselection.\n",
6308 sym_name (np), target);
6311 * The device reselected a LUN we donnot know about.
6313 case SIR_RESEL_BAD_LUN:
6314 np->msgout[0] = M_RESET;
6317 * The device reselected for an untagged nexus and we
6320 case SIR_RESEL_BAD_I_T_L:
6321 np->msgout[0] = M_ABORT;
6324 * The device reselected for a tagged nexus that we donnot
6327 case SIR_RESEL_BAD_I_T_L_Q:
6328 np->msgout[0] = M_ABORT_TAG;
6331 * The SCRIPTS let us know that the device has grabbed
6332 * our message and will abort the job.
6334 case SIR_RESEL_ABORTED:
6335 np->lastmsg = np->msgout[0];
6336 np->msgout[0] = M_NOOP;
6337 printf ("%s:%d: message %x sent on bad reselection.\n",
6338 sym_name (np), target, np->lastmsg);
6341 * The SCRIPTS let us know that a message has been
6342 * successfully sent to the device.
6344 case SIR_MSG_OUT_DONE:
6345 np->lastmsg = np->msgout[0];
6346 np->msgout[0] = M_NOOP;
6347 /* Should we really care of that */
6348 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6350 cp->xerr_status &= ~XE_PARITY_ERR;
6351 if (!cp->xerr_status)
6352 OUTOFFB (HF_PRT, HF_EXT_ERR);
6357 * The device didn't send a GOOD SCSI status.
6358 * We may have some work to do prior to allow
6359 * the SCRIPTS processor to continue.
6361 case SIR_BAD_SCSI_STATUS:
6364 sym_sir_bad_scsi_status(np, num, cp);
6367 * We are asked by the SCRIPTS to prepare a
6370 case SIR_REJECT_TO_SEND:
6371 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6372 np->msgout[0] = M_REJECT;
6375 * We have been ODD at the end of a DATA IN
6376 * transfer and the device didn't send a
6377 * IGNORE WIDE RESIDUE message.
6378 * It is a data overrun condition.
6380 case SIR_SWIDE_OVERRUN:
6382 OUTONB (HF_PRT, HF_EXT_ERR);
6383 cp->xerr_status |= XE_SWIDE_OVRUN;
6387 * We have been ODD at the end of a DATA OUT
6389 * It is a data underrun condition.
6391 case SIR_SODL_UNDERRUN:
6393 OUTONB (HF_PRT, HF_EXT_ERR);
6394 cp->xerr_status |= XE_SODL_UNRUN;
6398 * The device wants us to tranfer more data than
6399 * expected or in the wrong direction.
6400 * The number of extra bytes is in scratcha.
6401 * It is a data overrun condition.
6403 case SIR_DATA_OVERRUN:
6405 OUTONB (HF_PRT, HF_EXT_ERR);
6406 cp->xerr_status |= XE_EXTRA_DATA;
6407 cp->extra_bytes += INL (nc_scratcha);
6411 * The device switched to an illegal phase (4/5).
6415 OUTONB (HF_PRT, HF_EXT_ERR);
6416 cp->xerr_status |= XE_BAD_PHASE;
6420 * We received a message.
6422 case SIR_MSG_RECEIVED:
6425 switch (np->msgin [0]) {
6427 * We received an extended message.
6428 * We handle MODIFY DATA POINTER, SDTR, WDTR
6429 * and reject all other extended messages.
6432 switch (np->msgin [2]) {
6434 if (DEBUG_FLAGS & DEBUG_POINTER)
6435 sym_print_msg(cp,"modify DP",np->msgin);
6436 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6437 (np->msgin[5]<<8) + (np->msgin[6]);
6438 sym_modify_dp(np, tp, cp, tmp);
6441 sym_sync_nego(np, tp, cp);
6444 sym_ppr_nego(np, tp, cp);
6447 sym_wide_nego(np, tp, cp);
6454 * We received a 1/2 byte message not handled from SCRIPTS.
6455 * We are only expecting MESSAGE REJECT and IGNORE WIDE
6456 * RESIDUE messages that haven't been anticipated by
6457 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6458 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6461 if (DEBUG_FLAGS & DEBUG_POINTER)
6462 sym_print_msg(cp,"ign wide residue", np->msgin);
6463 sym_modify_dp(np, tp, cp, -1);
6466 if (INB (HS_PRT) == HS_NEGOTIATE)
6467 sym_nego_rejected(np, tp, cp);
6470 printf ("M_REJECT received (%x:%x).\n",
6471 scr_to_cpu(np->lastmsg), np->msgout[0]);
6480 * We received an unknown message.
6481 * Ignore all MSG IN phases and reject it.
6484 sym_print_msg(cp, "WEIRD message received", np->msgin);
6485 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6488 * Negotiation failed.
6489 * Target does not send us the reply.
6490 * Remove the HS_NEGOTIATE status.
6492 case SIR_NEGO_FAILED:
6493 OUTB (HS_PRT, HS_BUSY);
6495 * Negotiation failed.
6496 * Target does not want answer message.
6498 case SIR_NEGO_PROTO:
6499 sym_nego_default(np, tp, cp);
6507 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6510 OUTL_DSP (SCRIPTA_BA (np, clrack));
6517 * Acquire a control block
6519 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6521 tcb_p tp = &np->target[tn];
6522 lcb_p lp = sym_lp(np, tp, ln);
6523 u_short tag = NO_TAG;
6525 ccb_p cp = (ccb_p) 0;
6528 * Look for a free CCB
6530 if (sym_que_empty(&np->free_ccbq))
6531 (void) sym_alloc_ccb(np);
6532 qp = sym_remque_head(&np->free_ccbq);
6535 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6538 * If the LCB is not yet available and the LUN
6539 * has been probed ok, try to allocate the LCB.
6541 if (!lp && sym_is_bit(tp->lun_map, ln)) {
6542 lp = sym_alloc_lcb(np, tn, ln);
6548 * If the LCB is not available here, then the
6549 * logical unit is not yet discovered. For those
6550 * ones only accept 1 SCSI IO per logical unit,
6551 * since we cannot allow disconnections.
6554 if (!sym_is_bit(tp->busy0_map, ln))
6555 sym_set_bit(tp->busy0_map, ln);
6560 * If we have been asked for a tagged command.
6564 * Debugging purpose.
6566 assert(lp->busy_itl == 0);
6568 * Allocate resources for tags if not yet.
6571 sym_alloc_lcb_tags(np, tn, ln);
6576 * Get a tag for this SCSI IO and set up
6577 * the CCB bus address for reselection,
6578 * and count it for this LUN.
6579 * Toggle reselect path to tagged.
6581 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6582 tag = lp->cb_tags[lp->ia_tag];
6583 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6585 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6588 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6594 * This command will not be tagged.
6595 * If we already have either a tagged or untagged
6596 * one, refuse to overlap this untagged one.
6600 * Debugging purpose.
6602 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6604 * Count this nexus for this LUN.
6605 * Set up the CCB bus address for reselection.
6606 * Toggle reselect path to untagged.
6608 if (++lp->busy_itl == 1) {
6609 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6611 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6618 * Put the CCB into the busy queue.
6620 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6623 * Remember all informations needed to free this CCB.
6630 if (DEBUG_FLAGS & DEBUG_TAGS) {
6631 PRINT_LUN(np, tn, ln);
6632 printf ("ccb @%p using tag %d.\n", cp, tag);
6638 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6643 * Release one control block
6645 static void sym_free_ccb (hcb_p np, ccb_p cp)
6647 tcb_p tp = &np->target[cp->target];
6648 lcb_p lp = sym_lp(np, tp, cp->lun);
6650 if (DEBUG_FLAGS & DEBUG_TAGS) {
6651 PRINT_LUN(np, cp->target, cp->lun);
6652 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6660 * If tagged, release the tag, set the relect path
6662 if (cp->tag != NO_TAG) {
6664 * Free the tag value.
6666 lp->cb_tags[lp->if_tag] = cp->tag;
6667 if (++lp->if_tag == SYM_CONF_MAX_TASK)
6670 * Make the reselect path invalid,
6671 * and uncount this CCB.
6673 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6675 } else { /* Untagged */
6677 * Make the reselect path invalid,
6678 * and uncount this CCB.
6680 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6684 * If no JOB active, make the LUN reselect path invalid.
6686 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6688 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6691 * Otherwise, we only accept 1 IO per LUN.
6692 * Clear the bit that keeps track of this IO.
6695 sym_clr_bit(tp->busy0_map, cp->lun);
6698 * We donnot queue more than 1 ccb per target
6699 * with negotiation at any time. If this ccb was
6700 * used for negotiation, clear this info in the tcb.
6702 if (cp == tp->nego_cp)
6705 #ifdef SYM_CONF_IARB_SUPPORT
6707 * If we just complete the last queued CCB,
6708 * clear this info that is no longer relevant.
6710 if (cp == np->last_cp)
6714 #ifdef FreeBSD_Bus_Dma_Abstraction
6716 * Unmap user data from DMA map if needed.
6718 if (cp->dmamapped) {
6719 bus_dmamap_unload(np->data_dmat, cp->dmamap);
6725 * Make this CCB available.
6728 cp->host_status = HS_IDLE;
6729 sym_remque(&cp->link_ccbq);
6730 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6734 * Allocate a CCB from memory and initialize its fixed part.
6736 static ccb_p sym_alloc_ccb(hcb_p np)
6742 * Prevent from allocating more CCBs than we can
6743 * queue to the controller.
6745 if (np->actccbs >= SYM_CONF_MAX_START)
6749 * Allocate memory for this CCB.
6751 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6756 * Allocate a bounce buffer for sense data.
6758 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6763 * Allocate a map for the DMA of user data.
6765 #ifdef FreeBSD_Bus_Dma_Abstraction
6766 if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6775 * Compute the bus address of this ccb.
6777 cp->ccb_ba = vtobus(cp);
6780 * Insert this ccb into the hashed list.
6782 hcode = CCB_HASH_CODE(cp->ccb_ba);
6783 cp->link_ccbh = np->ccbh[hcode];
6784 np->ccbh[hcode] = cp;
6787 * Initialyze the start and restart actions.
6789 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
6790 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6793 * Initilialyze some other fields.
6795 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6798 * Chain into free ccb queue.
6800 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6806 sym_mfree_dma(cp->sns_bbuf,SYM_SNS_BBUF_LEN,"SNS_BBUF");
6807 sym_mfree_dma(cp, sizeof(*cp), "CCB");
6813 * Look up a CCB from a DSA value.
6815 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6820 hcode = CCB_HASH_CODE(dsa);
6821 cp = np->ccbh[hcode];
6823 if (cp->ccb_ba == dsa)
6832 * Target control block initialisation.
6833 * Nothing important to do at the moment.
6835 static void sym_init_tcb (hcb_p np, u_char tn)
6838 * Check some alignments required by the chip.
6840 assert (((offsetof(struct sym_reg, nc_sxfer) ^
6841 offsetof(struct sym_tcb, head.sval)) &3) == 0);
6842 assert (((offsetof(struct sym_reg, nc_scntl3) ^
6843 offsetof(struct sym_tcb, head.wval)) &3) == 0);
6847 * Lun control block allocation and initialization.
6849 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6851 tcb_p tp = &np->target[tn];
6852 lcb_p lp = sym_lp(np, tp, ln);
6855 * Already done, just return.
6860 * Check against some race.
6862 assert(!sym_is_bit(tp->busy0_map, ln));
6865 * Initialize the target control block if not yet.
6867 sym_init_tcb (np, tn);
6870 * Allocate the LCB bus address array.
6871 * Compute the bus address of this table.
6873 if (ln && !tp->luntbl) {
6876 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6879 for (i = 0 ; i < 64 ; i++)
6880 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6881 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6885 * Allocate the table of pointers for LUN(s) > 0, if needed.
6887 if (ln && !tp->lunmp) {
6888 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6896 * Make it available to the chip.
6898 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6903 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6907 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6911 * Let the itl task point to error handling.
6913 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6916 * Set the reselect pattern to our default. :)
6918 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6921 * Set user capabilities.
6923 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6930 * Allocate LCB resources for tagged command queuing.
6932 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6934 tcb_p tp = &np->target[tn];
6935 lcb_p lp = sym_lp(np, tp, ln);
6939 * If LCB not available, try to allocate it.
6941 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6945 * Allocate the task table and and the tag allocation
6946 * circular buffer. We want both or none.
6948 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6951 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6953 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6959 * Initialize the task table with invalid entries.
6961 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6962 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6965 * Fill up the tag buffer with tag numbers.
6967 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6971 * Make the task table available to SCRIPTS,
6972 * And accept tagged commands now.
6974 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6980 * Test the pci bus snoop logic :-(
6982 * Has to be called with interrupts disabled.
6984 #ifndef SYM_CONF_IOMAPPED
6985 static int sym_regtest (hcb_p np)
6987 register volatile u32 data;
6989 * chip registers may NOT be cached.
6990 * write 0xffffffff to a read only register area,
6991 * and try to read it back.
6994 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
6995 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
6997 if (data == 0xffffffff) {
6999 if ((data & 0xe2f0fffd) != 0x02000080) {
7001 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
7009 static int sym_snooptest (hcb_p np)
7011 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
7013 #ifndef SYM_CONF_IOMAPPED
7014 err |= sym_regtest (np);
7015 if (err) return (err);
7019 * Enable Master Parity Checking as we intend
7020 * to enable it for normal operations.
7022 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
7026 pc = SCRIPTB0_BA (np, snooptest);
7030 * Set memory and register.
7032 np->cache = cpu_to_scr(host_wr);
7033 OUTL (nc_temp, sym_wr);
7035 * Start script (exchange values)
7037 OUTL (nc_dsa, np->hcb_ba);
7040 * Wait 'til done (with timeout)
7042 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
7043 if (INB(nc_istat) & (INTF|SIP|DIP))
7045 if (i>=SYM_SNOOP_TIMEOUT) {
7046 printf ("CACHE TEST FAILED: timeout.\n");
7050 * Check for fatal DMA errors.
7052 dstat = INB (nc_dstat);
7053 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
7054 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
7055 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
7056 "DISABLING MASTER DATA PARITY CHECKING.\n",
7058 np->rv_ctest4 &= ~MPEE;
7062 if (dstat & (MDPE|BF|IID)) {
7063 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
7067 * Save termination position.
7071 * Read memory and register.
7073 host_rd = scr_to_cpu(np->cache);
7074 sym_rd = INL (nc_scratcha);
7075 sym_bk = INL (nc_temp);
7078 * Check termination position.
7080 if (pc != SCRIPTB0_BA (np, snoopend)+8) {
7081 printf ("CACHE TEST FAILED: script execution failed.\n");
7082 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
7083 (u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
7084 (u_long) SCRIPTB0_BA (np, snoopend) +8);
7090 if (host_wr != sym_rd) {
7091 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
7092 (int) host_wr, (int) sym_rd);
7095 if (host_rd != sym_wr) {
7096 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
7097 (int) sym_wr, (int) host_rd);
7100 if (sym_bk != sym_wr) {
7101 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
7102 (int) sym_wr, (int) sym_bk);
7110 * Determine the chip's clock frequency.
7112 * This is essential for the negotiation of the synchronous
7115 * Note: we have to return the correct value.
7116 * THERE IS NO SAFE DEFAULT VALUE.
7118 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
7119 * 53C860 and 53C875 rev. 1 support fast20 transfers but
7120 * do not have a clock doubler and so are provided with a
7121 * 80 MHz clock. All other fast20 boards incorporate a doubler
7122 * and so should be delivered with a 40 MHz clock.
7123 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
7124 * clock and provide a clock quadrupler (160 Mhz).
7128 * Select SCSI clock frequency
7130 static void sym_selectclock(hcb_p np, u_char scntl3)
7133 * If multiplier not present or not selected, leave here.
7135 if (np->multiplier <= 1) {
7136 OUTB(nc_scntl3, scntl3);
7140 if (sym_verbose >= 2)
7141 printf ("%s: enabling clock multiplier\n", sym_name(np));
7143 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
7145 * Wait for the LCKFRQ bit to be set if supported by the chip.
7146 * Otherwise wait 20 micro-seconds.
7148 if (np->features & FE_LCKFRQ) {
7150 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
7153 printf("%s: the chip cannot lock the frequency\n",
7157 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
7158 OUTB(nc_scntl3, scntl3);
7159 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
7160 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
7164 * calculate SCSI clock frequency (in KHz)
7166 static unsigned getfreq (hcb_p np, int gen)
7168 unsigned int ms = 0;
7172 * Measure GEN timer delay in order
7173 * to calculate SCSI clock frequency
7175 * This code will never execute too
7176 * many loop iterations (if DELAY is
7177 * reasonably correct). It could get
7178 * too low a delay (too high a freq.)
7179 * if the CPU is slow executing the
7180 * loop for some reason (an NMI, for
7181 * example). For this reason we will
7182 * if multiple measurements are to be
7183 * performed trust the higher delay
7184 * (lower frequency returned).
7186 OUTW (nc_sien , 0); /* mask all scsi interrupts */
7187 (void) INW (nc_sist); /* clear pending scsi interrupt */
7188 OUTB (nc_dien , 0); /* mask all dma interrupts */
7189 (void) INW (nc_sist); /* another one, just to be sure :) */
7190 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
7191 OUTB (nc_stime1, 0); /* disable general purpose timer */
7192 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
7193 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
7194 UDELAY (1000); /* count ms */
7195 OUTB (nc_stime1, 0); /* disable general purpose timer */
7197 * set prescaler to divide by whatever 0 means
7198 * 0 ought to choose divide by 2, but appears
7199 * to set divide by 3.5 mode in my 53c810 ...
7201 OUTB (nc_scntl3, 0);
7204 * adjust for prescaler, and convert into KHz
7206 f = ms ? ((1 << gen) * 4340) / ms : 0;
7208 if (sym_verbose >= 2)
7209 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
7210 sym_name(np), gen, ms, f);
7215 static unsigned sym_getfreq (hcb_p np)
7220 (void) getfreq (np, gen); /* throw away first result */
7221 f1 = getfreq (np, gen);
7222 f2 = getfreq (np, gen);
7223 if (f1 > f2) f1 = f2; /* trust lower result */
7228 * Get/probe chip SCSI clock frequency
7230 static void sym_getclock (hcb_p np, int mult)
7232 unsigned char scntl3 = np->sv_scntl3;
7233 unsigned char stest1 = np->sv_stest1;
7237 * For the C10 core, assume 40 MHz.
7239 if (np->features & FE_C10) {
7240 np->multiplier = mult;
7241 np->clock_khz = 40000 * mult;
7248 * True with 875/895/896/895A with clock multiplier selected
7250 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7251 if (sym_verbose >= 2)
7252 printf ("%s: clock multiplier found\n", sym_name(np));
7253 np->multiplier = mult;
7257 * If multiplier not found or scntl3 not 7,5,3,
7258 * reset chip and get frequency from general purpose timer.
7259 * Otherwise trust scntl3 BIOS setting.
7261 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7262 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
7263 f1 = sym_getfreq (np);
7266 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
7268 if (f1 < 45000) f1 = 40000;
7269 else if (f1 < 55000) f1 = 50000;
7272 if (f1 < 80000 && mult > 1) {
7273 if (sym_verbose >= 2)
7274 printf ("%s: clock multiplier assumed\n",
7276 np->multiplier = mult;
7279 if ((scntl3 & 7) == 3) f1 = 40000;
7280 else if ((scntl3 & 7) == 5) f1 = 80000;
7283 f1 /= np->multiplier;
7287 * Compute controller synchronous parameters.
7289 f1 *= np->multiplier;
7294 * Get/probe PCI clock frequency
7296 static int sym_getpciclock (hcb_p np)
7301 * For the C1010-33, this doesn't work.
7302 * For the C1010-66, this will be tested when I'll have
7303 * such a beast to play with.
7305 if (!(np->features & FE_C10)) {
7306 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
7307 f = (int) sym_getfreq (np);
7308 OUTB (nc_stest1, 0);
7315 /*============= DRIVER ACTION/COMPLETION ====================*/
7318 * Print something that tells about extended errors.
7320 static void sym_print_xerr(ccb_p cp, int x_status)
7322 if (x_status & XE_PARITY_ERR) {
7324 printf ("unrecovered SCSI parity error.\n");
7326 if (x_status & XE_EXTRA_DATA) {
7328 printf ("extraneous data discarded.\n");
7330 if (x_status & XE_BAD_PHASE) {
7332 printf ("illegal scsi phase (4/5).\n");
7334 if (x_status & XE_SODL_UNRUN) {
7336 printf ("ODD transfer in DATA OUT phase.\n");
7338 if (x_status & XE_SWIDE_OVRUN) {
7340 printf ("ODD transfer in DATA IN phase.\n");
7345 * Choose the more appropriate CAM status if
7346 * the IO encountered an extended error.
7348 static int sym_xerr_cam_status(int cam_status, int x_status)
7351 if (x_status & XE_PARITY_ERR)
7352 cam_status = CAM_UNCOR_PARITY;
7353 else if (x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7354 cam_status = CAM_DATA_RUN_ERR;
7355 else if (x_status & XE_BAD_PHASE)
7356 cam_status = CAM_REQ_CMP_ERR;
7358 cam_status = CAM_REQ_CMP_ERR;
7364 * Complete execution of a SCSI command with extented
7365 * error, SCSI status error, or having been auto-sensed.
7367 * The SCRIPTS processor is not running there, so we
7368 * can safely access IO registers and remove JOBs from
7370 * SCRATCHA is assumed to have been loaded with STARTPOS
7371 * before the SCRIPTS called the C code.
7373 static void sym_complete_error (hcb_p np, ccb_p cp)
7375 struct ccb_scsiio *csio;
7380 * Paranoid check. :)
7382 if (!cp || !cp->cam_ccb)
7385 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7386 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7387 cp->host_status, cp->ssss_status, cp->host_flags,
7388 cp->target, cp->lun);
7393 * Get CAM command pointer.
7395 csio = &cp->cam_ccb->csio;
7398 * Check for extended errors.
7400 if (cp->xerr_status) {
7402 sym_print_xerr(cp, cp->xerr_status);
7403 if (cp->host_status == HS_COMPLETE)
7404 cp->host_status = HS_COMP_ERR;
7408 * Calculate the residual.
7410 csio->sense_resid = 0;
7411 csio->resid = sym_compute_residual(np, cp);
7413 if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7414 csio->resid = 0; /* throw them away. :) */
7418 if (cp->host_flags & HF_SENSE) { /* Auto sense */
7419 csio->scsi_status = cp->sv_scsi_status; /* Restore status */
7420 csio->sense_resid = csio->resid; /* Swap residuals */
7421 csio->resid = cp->sv_resid;
7423 if (sym_verbose && cp->sv_xerr_status)
7424 sym_print_xerr(cp, cp->sv_xerr_status);
7425 if (cp->host_status == HS_COMPLETE &&
7426 cp->ssss_status == S_GOOD &&
7427 cp->xerr_status == 0) {
7428 cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7429 cp->sv_xerr_status);
7430 cam_status |= CAM_AUTOSNS_VALID;
7432 * Bounce back the sense data to user and
7435 bzero(&csio->sense_data, csio->sense_len);
7436 bcopy(cp->sns_bbuf, &csio->sense_data,
7437 MIN(csio->sense_len, SYM_SNS_BBUF_LEN));
7438 csio->sense_resid += csio->sense_len;
7439 csio->sense_resid -= SYM_SNS_BBUF_LEN;
7442 * If the device reports a UNIT ATTENTION condition
7443 * due to a RESET condition, we should consider all
7444 * disconnect CCBs for this unit as aborted.
7448 p = (u_char *) csio->sense_data;
7449 if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7450 sym_clear_tasks(np, CAM_REQ_ABORTED,
7451 cp->target,cp->lun, -1);
7456 cam_status = CAM_AUTOSENSE_FAIL;
7458 else if (cp->host_status == HS_COMPLETE) { /* Bad SCSI status */
7459 csio->scsi_status = cp->ssss_status;
7460 cam_status = CAM_SCSI_STATUS_ERROR;
7462 else if (cp->host_status == HS_SEL_TIMEOUT) /* Selection timeout */
7463 cam_status = CAM_SEL_TIMEOUT;
7464 else if (cp->host_status == HS_UNEXPECTED) /* Unexpected BUS FREE*/
7465 cam_status = CAM_UNEXP_BUSFREE;
7466 else { /* Extended error */
7469 printf ("COMMAND FAILED (%x %x %x).\n",
7470 cp->host_status, cp->ssss_status,
7473 csio->scsi_status = cp->ssss_status;
7475 * Set the most appropriate value for CAM status.
7477 cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7482 * Dequeue all queued CCBs for that device
7483 * not yet started by SCRIPTS.
7485 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7486 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7489 * Restart the SCRIPTS processor.
7491 OUTL_DSP (SCRIPTA_BA (np, start));
7493 #ifdef FreeBSD_Bus_Dma_Abstraction
7495 * Synchronize DMA map if needed.
7497 if (cp->dmamapped) {
7498 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7499 (bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
7500 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7504 * Add this one to the COMP queue.
7505 * Complete all those commands with either error
7506 * or requeue condition.
7508 sym_set_cam_status((union ccb *) csio, cam_status);
7509 sym_remque(&cp->link_ccbq);
7510 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7511 sym_flush_comp_queue(np, 0);
7515 * Complete execution of a successful SCSI command.
7517 * Only successful commands go to the DONE queue,
7518 * since we need to have the SCRIPTS processor
7519 * stopped on any error condition.
7520 * The SCRIPTS processor is running while we are
7521 * completing successful commands.
7523 static void sym_complete_ok (hcb_p np, ccb_p cp)
7525 struct ccb_scsiio *csio;
7530 * Paranoid check. :)
7532 if (!cp || !cp->cam_ccb)
7534 assert (cp->host_status == HS_COMPLETE);
7537 * Get command, target and lun pointers.
7539 csio = &cp->cam_ccb->csio;
7540 tp = &np->target[cp->target];
7541 lp = sym_lp(np, tp, cp->lun);
7544 * Assume device discovered on first success.
7547 sym_set_bit(tp->lun_map, cp->lun);
7550 * If all data have been transferred, given than no
7551 * extended error did occur, there is no residual.
7554 if (cp->phys.head.lastp != cp->phys.head.goalp)
7555 csio->resid = sym_compute_residual(np, cp);
7558 * Wrong transfer residuals may be worse than just always
7559 * returning zero. User can disable this feature from
7560 * sym_conf.h. Residual support is enabled by default.
7562 if (!SYM_CONF_RESIDUAL_SUPPORT)
7565 #ifdef FreeBSD_Bus_Dma_Abstraction
7567 * Synchronize DMA map if needed.
7569 if (cp->dmamapped) {
7570 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7571 (bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
7572 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7576 * Set status and complete the command.
7578 csio->scsi_status = cp->ssss_status;
7579 sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7580 sym_free_ccb (np, cp);
7581 sym_xpt_done(np, (union ccb *) csio);
7585 * Our timeout handler.
7587 static void sym_timeout1(void *arg)
7589 union ccb *ccb = (union ccb *) arg;
7590 hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7593 * Check that the CAM CCB is still queued.
7598 switch(ccb->ccb_h.func_code) {
7600 (void) sym_abort_scsiio(np, ccb, 1);
7607 static void sym_timeout(void *arg)
7617 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7623 * Look up our CCB control block.
7626 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7627 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7628 if (cp2->cam_ccb == ccb) {
7633 if (!cp || cp->host_status == HS_WAIT)
7637 * If a previous abort didn't succeed in time,
7638 * perform a BUS reset.
7641 sym_reset_scsi_bus(np, 1);
7646 * Mark the CCB for abort and allow time for.
7648 cp->to_abort = timed_out ? 2 : 1;
7649 ccb->ccb_h.timeout_ch = timeout(sym_timeout, (caddr_t) ccb, 10*hz);
7652 * Tell the SCRIPTS processor to stop and synchronize with us.
7654 np->istat_sem = SEM;
7655 OUTB (nc_istat, SIGP|SEM);
7660 * Reset a SCSI device (all LUNs of a target).
7662 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7665 struct ccb_hdr *ccb_h = &ccb->ccb_h;
7667 if (ccb_h->target_id == np->myaddr ||
7668 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7669 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7670 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7674 tp = &np->target[ccb_h->target_id];
7677 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7679 np->istat_sem = SEM;
7680 OUTB (nc_istat, SIGP|SEM);
7685 * SIM action entry point.
7687 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7690 sym_action1(sim, ccb);
7694 static void sym_action1(struct cam_sim *sim, union ccb *ccb)
7701 u_char idmsg, *msgptr;
7703 struct ccb_scsiio *csio;
7704 struct ccb_hdr *ccb_h;
7706 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7709 * Retrieve our controller data structure.
7711 np = (hcb_p) cam_sim_softc(sim);
7714 * The common case is SCSI IO.
7715 * We deal with other ones elsewhere.
7717 if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7718 sym_action2(sim, ccb);
7722 ccb_h = &csio->ccb_h;
7725 * Work around races.
7727 if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7733 * Minimal checkings, so that we will not
7734 * go outside our tables.
7736 if (ccb_h->target_id == np->myaddr ||
7737 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7738 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7739 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7744 * Retreive the target and lun descriptors.
7746 tp = &np->target[ccb_h->target_id];
7747 lp = sym_lp(np, tp, ccb_h->target_lun);
7750 * Complete the 1st INQUIRY command with error
7751 * condition if the device is flagged NOSCAN
7752 * at BOOT in the NVRAM. This may speed up
7753 * the boot and maintain coherency with BIOS
7754 * device numbering. Clearing the flag allows
7755 * user to rescan skipped devices later.
7756 * We also return error for devices not flagged
7757 * for SCAN LUNS in the NVRAM since some mono-lun
7758 * devices behave badly when asked for some non
7759 * zero LUN. Btw, this is an absolute hack.:-)
7761 if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7762 (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7763 csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7764 if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7765 ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7766 ccb_h->target_lun != 0)) {
7767 tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7768 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7774 * Get a control block for this IO.
7776 tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7777 cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7779 sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7784 * Keep track of the IO in our CCB.
7789 * Build the IDENTIFY message.
7791 idmsg = M_IDENTIFY | cp->lun;
7792 if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7795 msgptr = cp->scsi_smsg;
7797 msgptr[msglen++] = idmsg;
7800 * Build the tag message if present.
7802 if (cp->tag != NO_TAG) {
7803 u_char order = csio->tag_action;
7811 order = M_SIMPLE_TAG;
7813 msgptr[msglen++] = order;
7816 * For less than 128 tags, actual tags are numbered
7817 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
7818 * with devices that have problems with #TAG 0 or too
7819 * great #TAG numbers. For more tags (up to 256),
7820 * we use directly our tag number.
7822 #if SYM_CONF_MAX_TASK > (512/4)
7823 msgptr[msglen++] = cp->tag;
7825 msgptr[msglen++] = (cp->tag << 1) + 1;
7830 * Build a negotiation message if needed.
7831 * (nego_status is filled by sym_prepare_nego())
7833 cp->nego_status = 0;
7834 if (tp->tinfo.current.width != tp->tinfo.goal.width ||
7835 tp->tinfo.current.period != tp->tinfo.goal.period ||
7836 tp->tinfo.current.offset != tp->tinfo.goal.offset ||
7837 tp->tinfo.current.options != tp->tinfo.goal.options) {
7838 if (!tp->nego_cp && lp)
7839 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7849 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
7850 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7855 cp->phys.select.sel_id = cp->target;
7856 cp->phys.select.sel_scntl3 = tp->head.wval;
7857 cp->phys.select.sel_sxfer = tp->head.sval;
7858 cp->phys.select.sel_scntl4 = tp->head.uval;
7863 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
7864 cp->phys.smsg.size = cpu_to_scr(msglen);
7869 if (sym_setup_cdb(np, csio, cp) < 0) {
7870 sym_free_ccb(np, cp);
7871 sym_xpt_done(np, ccb);
7878 #if 0 /* Provision */
7879 cp->actualquirks = tp->quirks;
7881 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
7882 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7883 cp->ssss_status = S_ILLEGAL;
7884 cp->xerr_status = 0;
7886 cp->extra_bytes = 0;
7889 * extreme data pointer.
7890 * shall be positive, so -1 is lower than lowest.:)
7896 * Build the data descriptor block
7899 sym_setup_data_and_start(np, csio, cp);
7903 * Setup buffers and pointers that address the CDB.
7904 * I bet, physical CDBs will never be used on the planet,
7905 * since they can be bounced without significant overhead.
7907 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7909 struct ccb_hdr *ccb_h;
7913 ccb_h = &csio->ccb_h;
7916 * CDB is 16 bytes max.
7918 if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7919 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7922 cmd_len = csio->cdb_len;
7924 if (ccb_h->flags & CAM_CDB_POINTER) {
7925 /* CDB is a pointer */
7926 if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7927 /* CDB pointer is virtual */
7928 bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7929 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7931 /* CDB pointer is physical */
7933 cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7935 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7940 /* CDB is in the CAM ccb (buffer) */
7941 bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7942 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7945 cp->phys.cmd.addr = cpu_to_scr(cmd_ba);
7946 cp->phys.cmd.size = cpu_to_scr(cmd_len);
7952 * Set up data pointers used by SCRIPTS.
7954 static void __inline
7955 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7960 * No segments means no data.
7966 * Set the data pointer.
7970 goalp = SCRIPTA_BA (np, data_out2) + 8;
7971 lastp = goalp - 8 - (cp->segments * (2*4));
7974 cp->host_flags |= HF_DATA_IN;
7975 goalp = SCRIPTA_BA (np, data_in2) + 8;
7976 lastp = goalp - 8 - (cp->segments * (2*4));
7980 lastp = goalp = SCRIPTB_BA (np, no_data);
7984 cp->phys.head.lastp = cpu_to_scr(lastp);
7985 cp->phys.head.goalp = cpu_to_scr(goalp);
7986 cp->phys.head.savep = cpu_to_scr(lastp);
7987 cp->startp = cp->phys.head.savep;
7991 #ifdef FreeBSD_Bus_Dma_Abstraction
7993 * Call back routine for the DMA map service.
7994 * If bounce buffers are used (why ?), we may sleep and then
7995 * be called there in another context.
7998 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
8009 np = (hcb_p) cp->arg;
8012 * Deal with weird races.
8014 if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
8018 * Deal with weird errors.
8022 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
8027 * Build the data descriptor for the chip.
8031 /* 896 rev 1 requires to be careful about boundaries */
8032 if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
8033 retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
8035 retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
8037 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
8043 * Synchronize the DMA map only if we have
8044 * actually mapped the data.
8046 if (cp->dmamapped) {
8047 bus_dmamap_sync(np->data_dmat, cp->dmamap,
8048 (bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
8049 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
8053 * Set host status to busy state.
8054 * May have been set back to HS_WAIT to avoid a race.
8056 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
8059 * Set data pointers.
8061 sym_setup_data_pointers(np, cp, (ccb->ccb_h.flags & CAM_DIR_MASK));
8064 * Enqueue this IO in our pending queue.
8066 sym_enqueue_cam_ccb(np, ccb);
8069 * When `#ifed 1', the code below makes the driver
8070 * panic on the first attempt to write to a SCSI device.
8071 * It is the first test we want to do after a driver
8072 * change that does not seem obviously safe. :)
8075 switch (cp->cdb_buf[0]) {
8076 case 0x0A: case 0x2A: case 0xAA:
8077 panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
8085 * Activate this job.
8087 sym_put_start_queue(np, cp);
8092 sym_free_ccb(np, cp);
8093 sym_xpt_done(np, ccb);
8098 * How complex it gets to deal with the data in CAM.
8099 * The Bus Dma stuff makes things still more complex.
8102 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
8104 struct ccb_hdr *ccb_h;
8107 ccb_h = &csio->ccb_h;
8110 * Now deal with the data.
8112 cp->data_len = csio->dxfer_len;
8116 * No direction means no data.
8118 dir = (ccb_h->flags & CAM_DIR_MASK);
8119 if (dir == CAM_DIR_NONE) {
8120 sym_execute_ccb(cp, NULL, 0, 0);
8124 if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
8126 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8127 /* Buffer is virtual */
8130 cp->dmamapped = (dir == CAM_DIR_IN) ?
8131 SYM_DMA_READ : SYM_DMA_WRITE;
8133 retv = bus_dmamap_load(np->data_dmat, cp->dmamap,
8134 csio->data_ptr, csio->dxfer_len,
8135 sym_execute_ccb, cp, 0);
8136 if (retv == EINPROGRESS) {
8137 cp->host_status = HS_WAIT;
8138 xpt_freeze_simq(np->sim, 1);
8139 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
8143 /* Buffer is physical */
8144 struct bus_dma_segment seg;
8146 seg.ds_addr = (bus_addr_t) csio->data_ptr;
8147 sym_execute_ccb(cp, &seg, 1, 0);
8150 /* Scatter/gather list */
8151 struct bus_dma_segment *segs;
8153 if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
8154 /* The SG list pointer is physical */
8155 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8159 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8160 /* SG buffer pointers are virtual */
8161 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8165 /* SG buffer pointers are physical */
8166 segs = (struct bus_dma_segment *)csio->data_ptr;
8167 sym_execute_ccb(cp, segs, csio->sglist_cnt, 0);
8171 sym_free_ccb(np, cp);
8172 sym_xpt_done(np, (union ccb *) csio);
8176 * Move the scatter list to our data block.
8179 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
8180 bus_dma_segment_t *psegs, int nsegs)
8182 struct sym_tblmove *data;
8183 bus_dma_segment_t *psegs2;
8185 if (nsegs > SYM_CONF_MAX_SG)
8188 data = &cp->phys.data[SYM_CONF_MAX_SG-1];
8189 psegs2 = &psegs[nsegs-1];
8190 cp->segments = nsegs;
8193 data->addr = cpu_to_scr(psegs2->ds_addr);
8194 data->size = cpu_to_scr(psegs2->ds_len);
8195 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8196 printf ("%s scatter: paddr=%lx len=%ld\n",
8197 sym_name(np), (long) psegs2->ds_addr,
8198 (long) psegs2->ds_len);
8200 if (psegs2 != psegs) {
8210 #else /* FreeBSD_Bus_Dma_Abstraction */
8213 * How complex it gets to deal with the data in CAM.
8214 * Variant without the Bus Dma Abstraction option.
8217 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
8219 struct ccb_hdr *ccb_h;
8222 ccb_h = &csio->ccb_h;
8225 * Now deal with the data.
8231 * No direction means no data.
8233 dir = (ccb_h->flags & CAM_DIR_MASK);
8234 if (dir == CAM_DIR_NONE)
8237 if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
8239 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8240 /* Buffer is virtual */
8241 retv = sym_scatter_virtual(np, cp,
8242 (vm_offset_t) csio->data_ptr,
8243 (vm_size_t) csio->dxfer_len);
8245 /* Buffer is physical */
8246 retv = sym_scatter_physical(np, cp,
8247 (vm_offset_t) csio->data_ptr,
8248 (vm_size_t) csio->dxfer_len);
8251 /* Scatter/gather list */
8253 struct bus_dma_segment *segs;
8254 segs = (struct bus_dma_segment *)csio->data_ptr;
8255 nsegs = csio->sglist_cnt;
8257 if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
8258 /* The SG list pointer is physical */
8259 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8262 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8263 /* SG buffer pointers are virtual */
8264 retv = sym_scatter_sg_virtual(np, cp, segs, nsegs);
8266 /* SG buffer pointers are physical */
8267 retv = sym_scatter_sg_physical(np, cp, segs, nsegs);
8271 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
8277 * Set data pointers.
8279 sym_setup_data_pointers(np, cp, dir);
8282 * Enqueue this IO in our pending queue.
8284 sym_enqueue_cam_ccb(np, (union ccb *) csio);
8287 * Activate this job.
8289 sym_put_start_queue(np, cp);
8292 * Command is successfully queued.
8296 sym_free_ccb(np, cp);
8297 sym_xpt_done(np, (union ccb *) csio);
8301 * Scatter a virtual buffer into bus addressable chunks.
8304 sym_scatter_virtual(hcb_p np, ccb_p cp, vm_offset_t vaddr, vm_size_t len)
8310 cp->data_len += len;
8314 s = SYM_CONF_MAX_SG - 1 - cp->segments;
8316 while (n && s >= 0) {
8317 pn = (pe - 1) & ~PAGE_MASK;
8323 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8324 printf ("%s scatter: va=%lx pa=%lx siz=%ld\n",
8325 sym_name(np), pn, (u_long) vtobus(pn), k);
8327 cp->phys.data[s].addr = cpu_to_scr(vtobus(pn));
8328 cp->phys.data[s].size = cpu_to_scr(k);
8333 cp->segments = SYM_CONF_MAX_SG - 1 - s;
8339 * Scatter a SG list with virtual addresses into bus addressable chunks.
8342 sym_scatter_sg_virtual(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
8346 for (i = nsegs - 1 ; i >= 0 ; --i) {
8347 retv = sym_scatter_virtual(np, cp,
8348 psegs[i].ds_addr, psegs[i].ds_len);
8356 * Scatter a physical buffer into bus addressable chunks.
8359 sym_scatter_physical(hcb_p np, ccb_p cp, vm_offset_t paddr, vm_size_t len)
8361 struct bus_dma_segment seg;
8363 seg.ds_addr = paddr;
8365 return sym_scatter_sg_physical(np, cp, &seg, 1);
8368 #endif /* FreeBSD_Bus_Dma_Abstraction */
8371 * Scatter a SG list with physical addresses into bus addressable chunks.
8372 * We need to ensure 16MB boundaries not to be crossed during DMA of
8373 * each segment, due to some chips being flawed.
8375 #define BOUND_MASK ((1UL<<24)-1)
8377 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
8383 #ifndef FreeBSD_Bus_Dma_Abstraction
8384 s = SYM_CONF_MAX_SG - 1 - cp->segments;
8386 s = SYM_CONF_MAX_SG - 1;
8389 ps = psegs[t].ds_addr;
8390 pe = ps + psegs[t].ds_len;
8393 pn = (pe - 1) & ~BOUND_MASK;
8397 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8398 printf ("%s scatter: paddr=%lx len=%ld\n",
8399 sym_name(np), pn, k);
8401 cp->phys.data[s].addr = cpu_to_scr(pn);
8402 cp->phys.data[s].size = cpu_to_scr(k);
8403 #ifndef FreeBSD_Bus_Dma_Abstraction
8410 ps = psegs[t].ds_addr;
8411 pe = ps + psegs[t].ds_len;
8417 cp->segments = SYM_CONF_MAX_SG - 1 - s;
8419 return t >= 0 ? -1 : 0;
8424 * SIM action for non performance critical stuff.
8426 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
8431 struct ccb_hdr *ccb_h;
8434 * Retrieve our controller data structure.
8436 np = (hcb_p) cam_sim_softc(sim);
8438 ccb_h = &ccb->ccb_h;
8440 switch (ccb_h->func_code) {
8441 case XPT_SET_TRAN_SETTINGS:
8443 struct ccb_trans_settings *cts;
8446 tp = &np->target[ccb_h->target_id];
8449 * Update SPI transport settings in TARGET control block.
8450 * Update SCSI device settings in LUN control block.
8452 lp = sym_lp(np, tp, ccb_h->target_lun);
8453 #ifdef FreeBSD_New_Tran_Settings
8454 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8456 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
8458 sym_update_trans(np, tp, &tp->tinfo.goal, cts);
8460 sym_update_dflags(np, &lp->current_flags, cts);
8462 #ifdef FreeBSD_New_Tran_Settings
8463 if (cts->type == CTS_TYPE_USER_SETTINGS) {
8465 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
8467 sym_update_trans(np, tp, &tp->tinfo.user, cts);
8469 sym_update_dflags(np, &lp->user_flags, cts);
8472 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8475 case XPT_GET_TRAN_SETTINGS:
8477 struct ccb_trans_settings *cts;
8478 struct sym_trans *tip;
8482 tp = &np->target[ccb_h->target_id];
8483 lp = sym_lp(np, tp, ccb_h->target_lun);
8485 #ifdef FreeBSD_New_Tran_Settings
8486 #define cts__scsi (&cts->proto_specific.scsi)
8487 #define cts__spi (&cts->xport_specific.spi)
8488 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8489 tip = &tp->tinfo.current;
8490 dflags = lp ? lp->current_flags : 0;
8493 tip = &tp->tinfo.user;
8494 dflags = lp ? lp->user_flags : tp->usrflags;
8497 cts->protocol = PROTO_SCSI;
8498 cts->transport = XPORT_SPI;
8499 cts->protocol_version = tip->scsi_version;
8500 cts->transport_version = tip->spi_version;
8502 cts__spi->sync_period = tip->period;
8503 cts__spi->sync_offset = tip->offset;
8504 cts__spi->bus_width = tip->width;
8505 cts__spi->ppr_options = tip->options;
8507 cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8508 | CTS_SPI_VALID_SYNC_OFFSET
8509 | CTS_SPI_VALID_BUS_WIDTH
8510 | CTS_SPI_VALID_PPR_OPTIONS;
8512 cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8513 if (dflags & SYM_DISC_ENABLED)
8514 cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8515 cts__spi->valid |= CTS_SPI_VALID_DISC;
8517 cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8518 if (dflags & SYM_TAGS_ENABLED)
8519 cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8520 cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8524 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
8525 tip = &tp->tinfo.current;
8526 dflags = lp ? lp->current_flags : 0;
8529 tip = &tp->tinfo.user;
8530 dflags = lp ? lp->user_flags : tp->usrflags;
8533 cts->sync_period = tip->period;
8534 cts->sync_offset = tip->offset;
8535 cts->bus_width = tip->width;
8537 cts->valid = CCB_TRANS_SYNC_RATE_VALID
8538 | CCB_TRANS_SYNC_OFFSET_VALID
8539 | CCB_TRANS_BUS_WIDTH_VALID;
8541 cts->flags &= ~(CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB);
8543 if (dflags & SYM_DISC_ENABLED)
8544 cts->flags |= CCB_TRANS_DISC_ENB;
8546 if (dflags & SYM_TAGS_ENABLED)
8547 cts->flags |= CCB_TRANS_TAG_ENB;
8549 cts->valid |= CCB_TRANS_DISC_VALID;
8550 cts->valid |= CCB_TRANS_TQ_VALID;
8552 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8555 case XPT_CALC_GEOMETRY:
8557 struct ccb_calc_geometry *ccg;
8559 u32 secs_per_cylinder;
8563 * Silly DOS geometry.
8566 size_mb = ccg->volume_size
8567 / ((1024L * 1024L) / ccg->block_size);
8570 if (size_mb > 1024 && extended) {
8572 ccg->secs_per_track = 63;
8575 ccg->secs_per_track = 32;
8577 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
8578 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
8579 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8584 struct ccb_pathinq *cpi = &ccb->cpi;
8585 cpi->version_num = 1;
8586 cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8587 if ((np->features & FE_WIDE) != 0)
8588 cpi->hba_inquiry |= PI_WIDE_16;
8589 cpi->target_sprt = 0;
8591 if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8592 cpi->hba_misc |= PIM_SCANHILO;
8593 if (np->usrflags & SYM_AVOID_BUS_RESET)
8594 cpi->hba_misc |= PIM_NOBUSRESET;
8595 cpi->hba_eng_cnt = 0;
8596 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8597 /* Semantic problem:)LUN number max = max number of LUNs - 1 */
8598 cpi->max_lun = SYM_CONF_MAX_LUN-1;
8599 if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8600 cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8601 cpi->bus_id = cam_sim_bus(sim);
8602 cpi->initiator_id = np->myaddr;
8603 cpi->base_transfer_speed = 3300;
8604 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8605 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8606 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8607 cpi->unit_number = cam_sim_unit(sim);
8609 #ifdef FreeBSD_New_Tran_Settings
8610 cpi->protocol = PROTO_SCSI;
8611 cpi->protocol_version = SCSI_REV_2;
8612 cpi->transport = XPORT_SPI;
8613 cpi->transport_version = 2;
8614 cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8615 if (np->features & FE_ULTRA3) {
8616 cpi->transport_version = 3;
8617 cpi->xport_specific.spi.ppr_options =
8618 SID_SPI_CLOCK_DT_ST;
8621 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8626 union ccb *abort_ccb = ccb->cab.abort_ccb;
8627 switch(abort_ccb->ccb_h.func_code) {
8629 if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8630 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8634 sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8641 sym_reset_dev(np, ccb);
8646 sym_reset_scsi_bus(np, 0);
8648 xpt_print_path(np->path);
8649 printf("SCSI BUS reset delivered.\n");
8652 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8655 case XPT_ACCEPT_TARGET_IO:
8656 case XPT_CONT_TARGET_IO:
8658 case XPT_NOTIFY_ACK:
8659 case XPT_IMMED_NOTIFY:
8662 sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8668 * Asynchronous notification handler.
8671 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *arg)
8674 struct cam_sim *sim;
8681 sim = (struct cam_sim *) cb_arg;
8682 np = (hcb_p) cam_sim_softc(sim);
8685 case AC_LOST_DEVICE:
8686 tn = xpt_path_target_id(path);
8687 if (tn >= SYM_CONF_MAX_TARGET)
8690 tp = &np->target[tn];
8694 tp->head.wval = np->rv_scntl3;
8697 tp->tinfo.current.period = tp->tinfo.goal.period = 0;
8698 tp->tinfo.current.offset = tp->tinfo.goal.offset = 0;
8699 tp->tinfo.current.width = tp->tinfo.goal.width = BUS_8_BIT;
8700 tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8711 * Update transfer settings of a target.
8713 static void sym_update_trans(hcb_p np, tcb_p tp, struct sym_trans *tip,
8714 struct ccb_trans_settings *cts)
8719 #ifdef FreeBSD_New_Tran_Settings
8720 #define cts__spi (&cts->xport_specific.spi)
8721 if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8722 tip->width = cts__spi->bus_width;
8723 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8724 tip->offset = cts__spi->sync_offset;
8725 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8726 tip->period = cts__spi->sync_period;
8727 if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8728 tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8729 if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8730 cts->protocol_version != PROTO_VERSION_UNKNOWN)
8731 tip->scsi_version = cts->protocol_version;
8732 if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8733 cts->transport_version != XPORT_VERSION_UNKNOWN)
8734 tip->spi_version = cts->transport_version;
8737 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
8738 tip->width = cts->bus_width;
8739 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
8740 tip->offset = cts->sync_offset;
8741 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
8742 tip->period = cts->sync_period;
8745 * Scale against driver configuration limits.
8747 if (tip->width > SYM_SETUP_MAX_WIDE) tip->width = SYM_SETUP_MAX_WIDE;
8748 if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8749 if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8752 * Scale against actual controller BUS width.
8754 if (tip->width > np->maxwide)
8755 tip->width = np->maxwide;
8757 #ifdef FreeBSD_New_Tran_Settings
8759 * Only accept DT if controller supports and SYNC/WIDE asked.
8761 if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8762 !(tip->width == BUS_16_BIT && tip->offset)) {
8763 tip->options &= ~PPR_OPT_DT;
8767 * For now, only assume DT if period <= 9, BUS 16 and offset != 0.
8770 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3) &&
8771 tip->period <= 9 && tip->width == BUS_16_BIT && tip->offset) {
8772 tip->options |= PPR_OPT_DT;
8777 * Scale period factor and offset against controller limits.
8779 if (tip->options & PPR_OPT_DT) {
8780 if (tip->period < np->minsync_dt)
8781 tip->period = np->minsync_dt;
8782 if (tip->period > np->maxsync_dt)
8783 tip->period = np->maxsync_dt;
8784 if (tip->offset > np->maxoffs_dt)
8785 tip->offset = np->maxoffs_dt;
8788 if (tip->period < np->minsync)
8789 tip->period = np->minsync;
8790 if (tip->period > np->maxsync)
8791 tip->period = np->maxsync;
8792 if (tip->offset > np->maxoffs)
8793 tip->offset = np->maxoffs;
8798 * Update flags for a device (logical unit).
8801 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8803 #ifdef FreeBSD_New_Tran_Settings
8804 #define cts__scsi (&cts->proto_specific.scsi)
8805 #define cts__spi (&cts->xport_specific.spi)
8806 if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8807 if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8808 *flags |= SYM_DISC_ENABLED;
8810 *flags &= ~SYM_DISC_ENABLED;
8813 if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8814 if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8815 *flags |= SYM_TAGS_ENABLED;
8817 *flags &= ~SYM_TAGS_ENABLED;
8822 if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
8823 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
8824 *flags |= SYM_DISC_ENABLED;
8826 *flags &= ~SYM_DISC_ENABLED;
8829 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
8830 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
8831 *flags |= SYM_TAGS_ENABLED;
8833 *flags &= ~SYM_TAGS_ENABLED;
8839 /*============= DRIVER INITIALISATION ==================*/
8841 #ifdef FreeBSD_Bus_Io_Abstraction
8843 static device_method_t sym_pci_methods[] = {
8844 DEVMETHOD(device_probe, sym_pci_probe),
8845 DEVMETHOD(device_attach, sym_pci_attach),
8849 static driver_t sym_pci_driver = {
8852 sizeof(struct sym_hcb)
8855 static devclass_t sym_devclass;
8857 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, 0, 0);
8859 #else /* Pre-FreeBSD_Bus_Io_Abstraction */
8861 static u_long sym_unit;
8863 static struct pci_device sym_pci_driver = {
8871 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
8872 COMPAT_PCI_DRIVER (sym, sym_pci_driver);
8874 DATA_SET (pcidevice_set, sym_pci_driver);
8877 #endif /* FreeBSD_Bus_Io_Abstraction */
8879 static struct sym_pci_chip sym_pci_dev_table[] = {
8880 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8883 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8884 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8888 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8889 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8892 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
8895 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
8896 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8898 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
8899 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8901 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
8902 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8904 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8905 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8908 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8909 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8912 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8913 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8916 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8917 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8920 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8921 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8922 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8926 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8927 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8931 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8932 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8933 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8935 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8936 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8937 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8939 {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8940 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8941 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8944 {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8945 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8946 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8949 {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8950 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8951 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8954 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8955 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8956 FE_RAM|FE_IO256|FE_LEDC}
8959 #define sym_pci_num_devs \
8960 (sizeof(sym_pci_dev_table) / sizeof(sym_pci_dev_table[0]))
8963 * Look up the chip table.
8965 * Return a pointer to the chip entry if found,
8968 static struct sym_pci_chip *
8969 #ifdef FreeBSD_Bus_Io_Abstraction
8970 sym_find_pci_chip(device_t dev)
8972 sym_find_pci_chip(pcici_t pci_tag)
8975 struct sym_pci_chip *chip;
8980 #ifdef FreeBSD_Bus_Io_Abstraction
8981 if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8984 device_id = pci_get_device(dev);
8985 revision = pci_get_revid(dev);
8987 if (pci_cfgread(pci_tag, PCIR_VENDOR, 2) != PCI_VENDOR_NCR)
8990 device_id = pci_cfgread(pci_tag, PCIR_DEVICE, 2);
8991 revision = pci_cfgread(pci_tag, PCIR_REVID, 1);
8994 for (i = 0; i < sym_pci_num_devs; i++) {
8995 chip = &sym_pci_dev_table[i];
8996 if (device_id != chip->device_id)
8998 if (revision > chip->revision_id)
9007 * Tell upper layer if the chip is supported.
9009 #ifdef FreeBSD_Bus_Io_Abstraction
9011 sym_pci_probe(device_t dev)
9013 struct sym_pci_chip *chip;
9015 chip = sym_find_pci_chip(dev);
9016 if (chip && sym_find_firmware(chip)) {
9017 device_set_desc(dev, chip->name);
9018 return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)? -2000 : 0;
9022 #else /* Pre-FreeBSD_Bus_Io_Abstraction */
9024 sym_pci_probe(pcici_t pci_tag, pcidi_t type)
9026 struct sym_pci_chip *chip;
9028 chip = sym_find_pci_chip(pci_tag);
9029 if (chip && sym_find_firmware(chip)) {
9031 /* Only claim chips we are allowed to take precedence over the ncr */
9032 if (!(chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP))
9043 * Attach a sym53c8xx device.
9045 #ifdef FreeBSD_Bus_Io_Abstraction
9047 sym_pci_attach(device_t dev)
9050 sym_pci_attach(pcici_t pci_tag, int unit)
9052 int err = sym_pci_attach2(pci_tag, unit);
9054 printf("sym: failed to attach unit %d - err=%d.\n", unit, err);
9057 sym_pci_attach2(pcici_t pci_tag, int unit)
9060 struct sym_pci_chip *chip;
9063 struct sym_hcb *np = 0;
9064 struct sym_nvram nvram;
9065 struct sym_fw *fw = 0;
9067 #ifdef FreeBSD_Bus_Dma_Abstraction
9068 bus_dma_tag_t bus_dmat;
9071 * I expected to be told about a parent
9072 * DMA tag, but didn't find any.
9078 * Only probed devices should be attached.
9079 * We just enjoy being paranoid. :)
9081 #ifdef FreeBSD_Bus_Io_Abstraction
9082 chip = sym_find_pci_chip(dev);
9084 chip = sym_find_pci_chip(pci_tag);
9086 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
9090 * Allocate immediately the host control block,
9091 * since we are only expecting to succeed. :)
9092 * We keep track in the HCB of all the resources that
9093 * are to be released on error.
9095 #ifdef FreeBSD_Bus_Dma_Abstraction
9096 np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
9098 np->bus_dmat = bus_dmat;
9102 np = sym_calloc_dma(sizeof(*np), "HCB");
9108 * Copy some useful infos to the HCB.
9110 np->hcb_ba = vtobus(np);
9111 np->verbose = bootverbose;
9112 #ifdef FreeBSD_Bus_Io_Abstraction
9114 np->unit = device_get_unit(dev);
9115 np->device_id = pci_get_device(dev);
9116 np->revision_id = pci_get_revid(dev);
9118 np->pci_tag = pci_tag;
9120 np->device_id = pci_cfgread(pci_tag, PCIR_DEVICE, 2);
9121 np->revision_id = pci_cfgread(pci_tag, PCIR_REVID, 1);
9123 np->features = chip->features;
9124 np->clock_divn = chip->nr_divisor;
9125 np->maxoffs = chip->offset_max;
9126 np->maxburst = chip->burst_max;
9127 np->scripta_sz = fw->a_size;
9128 np->scriptb_sz = fw->b_size;
9129 np->fw_setup = fw->setup;
9130 np->fw_patch = fw->patch;
9131 np->fw_name = fw->name;
9136 snprintf(np->inst_name, sizeof(np->inst_name), "sym%d", np->unit);
9139 * Initialyze the CCB free and busy queues.
9141 sym_que_init(&np->free_ccbq);
9142 sym_que_init(&np->busy_ccbq);
9143 sym_que_init(&np->comp_ccbq);
9144 sym_que_init(&np->cam_ccbq);
9147 * Allocate a tag for the DMA of user data.
9149 #ifdef FreeBSD_Bus_Dma_Abstraction
9150 if (bus_dma_tag_create(np->bus_dmat, 1, (1<<24),
9151 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
9153 BUS_SPACE_MAXSIZE, SYM_CONF_MAX_SG,
9154 (1<<24), 0, &np->data_dmat)) {
9155 device_printf(dev, "failed to create DMA tag.\n");
9160 * Read and apply some fix-ups to the PCI COMMAND
9161 * register. We want the chip to be enabled for:
9163 * - PCI parity checking (reporting would also be fine)
9164 * - Write And Invalidate.
9166 #ifdef FreeBSD_Bus_Io_Abstraction
9167 command = pci_read_config(dev, PCIR_COMMAND, 2);
9169 command = pci_cfgread(pci_tag, PCIR_COMMAND, 2);
9171 command |= PCIM_CMD_BUSMASTEREN;
9172 command |= PCIM_CMD_PERRESPEN;
9173 command |= /* PCIM_CMD_MWIEN */ 0x0010;
9174 #ifdef FreeBSD_Bus_Io_Abstraction
9175 pci_write_config(dev, PCIR_COMMAND, command, 2);
9177 pci_cfgwrite(pci_tag, PCIR_COMMAND, command, 2);
9181 * Let the device know about the cache line size,
9182 * if it doesn't yet.
9184 #ifdef FreeBSD_Bus_Io_Abstraction
9185 cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
9187 cachelnsz = pci_cfgread(pci_tag, PCIR_CACHELNSZ, 1);
9191 #ifdef FreeBSD_Bus_Io_Abstraction
9192 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
9194 pci_cfgwrite(pci_tag, PCIR_CACHELNSZ, cachelnsz, 1);
9199 * Alloc/get/map/retrieve everything that deals with MMIO.
9201 #ifdef FreeBSD_Bus_Io_Abstraction
9202 if ((command & PCIM_CMD_MEMEN) != 0) {
9203 int regs_id = SYM_PCI_MMIO;
9204 np->mmio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, ®s_id,
9205 0, ~0, 1, RF_ACTIVE);
9207 if (!np->mmio_res) {
9208 device_printf(dev, "failed to allocate MMIO resources\n");
9211 np->mmio_bsh = rman_get_bushandle(np->mmio_res);
9212 np->mmio_tag = rman_get_bustag(np->mmio_res);
9213 np->mmio_pa = rman_get_start(np->mmio_res);
9214 np->mmio_va = (vm_offset_t) rman_get_virtual(np->mmio_res);
9215 np->mmio_ba = np->mmio_pa;
9217 if ((command & PCIM_CMD_MEMEN) != 0) {
9218 vm_offset_t vaddr, paddr;
9219 if (!pci_map_mem(pci_tag, SYM_PCI_MMIO, &vaddr, &paddr)) {
9220 printf("%s: failed to map MMIO window\n", sym_name(np));
9223 np->mmio_va = vaddr;
9224 np->mmio_pa = paddr;
9225 np->mmio_ba = paddr;
9232 #ifdef FreeBSD_Bus_Io_Abstraction
9234 np->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &i,
9235 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
9237 device_printf(dev, "failed to allocate IRQ resource\n");
9242 #ifdef SYM_CONF_IOMAPPED
9244 * User want us to use normal IO with PCI.
9245 * Alloc/get/map/retrieve everything that deals with IO.
9247 #ifdef FreeBSD_Bus_Io_Abstraction
9248 if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
9249 int regs_id = SYM_PCI_IO;
9250 np->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, ®s_id,
9251 0, ~0, 1, RF_ACTIVE);
9254 device_printf(dev, "failed to allocate IO resources\n");
9257 np->io_bsh = rman_get_bushandle(np->io_res);
9258 np->io_tag = rman_get_bustag(np->io_res);
9259 np->io_port = rman_get_start(np->io_res);
9261 if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
9263 if (!pci_map_port (pci_tag, SYM_PCI_IO, &io_port)) {
9264 printf("%s: failed to map IO window\n", sym_name(np));
9267 np->io_port = io_port;
9271 #endif /* SYM_CONF_IOMAPPED */
9274 * If the chip has RAM.
9275 * Alloc/get/map/retrieve the corresponding resources.
9277 if ((np->features & (FE_RAM|FE_RAM8K)) &&
9278 (command & PCIM_CMD_MEMEN) != 0) {
9279 #ifdef FreeBSD_Bus_Io_Abstraction
9280 int regs_id = SYM_PCI_RAM;
9281 if (np->features & FE_64BIT)
9282 regs_id = SYM_PCI_RAM64;
9283 np->ram_res = bus_alloc_resource(dev, SYS_RES_MEMORY, ®s_id,
9284 0, ~0, 1, RF_ACTIVE);
9286 device_printf(dev,"failed to allocate RAM resources\n");
9289 np->ram_id = regs_id;
9290 np->ram_bsh = rman_get_bushandle(np->ram_res);
9291 np->ram_tag = rman_get_bustag(np->ram_res);
9292 np->ram_pa = rman_get_start(np->ram_res);
9293 np->ram_va = (vm_offset_t) rman_get_virtual(np->ram_res);
9294 np->ram_ba = np->ram_pa;
9296 vm_offset_t vaddr, paddr;
9297 int regs_id = SYM_PCI_RAM;
9298 if (np->features & FE_64BIT)
9299 regs_id = SYM_PCI_RAM64;
9300 if (!pci_map_mem(pci_tag, regs_id, &vaddr, &paddr)) {
9301 printf("%s: failed to map RAM window\n", sym_name(np));
9311 * Save setting of some IO registers, so we will
9312 * be able to probe specific implementations.
9314 sym_save_initial_setting (np);
9317 * Reset the chip now, since it has been reported
9318 * that SCSI clock calibration may not work properly
9319 * if the chip is currently active.
9321 sym_chip_reset (np);
9324 * Try to read the user set-up.
9326 (void) sym_read_nvram(np, &nvram);
9329 * Prepare controller and devices settings, according
9330 * to chip features, user set-up and driver set-up.
9332 (void) sym_prepare_setting(np, &nvram);
9335 * Check the PCI clock frequency.
9336 * Must be performed after prepare_setting since it destroys
9337 * STEST1 that is used to probe for the clock doubler.
9339 i = sym_getpciclock(np);
9341 #ifdef FreeBSD_Bus_Io_Abstraction
9342 device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
9344 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
9349 * Allocate the start queue.
9351 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
9354 np->squeue_ba = vtobus(np->squeue);
9357 * Allocate the done queue.
9359 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
9362 np->dqueue_ba = vtobus(np->dqueue);
9365 * Allocate the target bus address array.
9367 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
9370 np->targtbl_ba = vtobus(np->targtbl);
9373 * Allocate SCRIPTS areas.
9375 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
9376 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
9377 if (!np->scripta0 || !np->scriptb0)
9381 * Allocate some CCB. We need at least ONE.
9383 if (!sym_alloc_ccb(np))
9387 * Calculate BUS addresses where we are going
9388 * to load the SCRIPTS.
9390 np->scripta_ba = vtobus(np->scripta0);
9391 np->scriptb_ba = vtobus(np->scriptb0);
9392 np->scriptb0_ba = np->scriptb_ba;
9395 np->scripta_ba = np->ram_ba;
9396 if (np->features & FE_RAM8K) {
9398 np->scriptb_ba = np->scripta_ba + 4096;
9399 #if BITS_PER_LONG > 32
9400 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
9408 * Copy scripts to controller instance.
9410 bcopy(fw->a_base, np->scripta0, np->scripta_sz);
9411 bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
9414 * Setup variable parts in scripts and compute
9415 * scripts bus addresses used from the C code.
9417 np->fw_setup(np, fw);
9420 * Bind SCRIPTS with physical addresses usable by the
9421 * SCRIPTS processor (as seen from the BUS = BUS addresses).
9423 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
9424 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
9426 #ifdef SYM_CONF_IARB_SUPPORT
9428 * If user wants IARB to be set when we win arbitration
9429 * and have other jobs, compute the max number of consecutive
9430 * settings of IARB hints before we leave devices a chance to
9431 * arbitrate for reselection.
9433 #ifdef SYM_SETUP_IARB_MAX
9434 np->iarb_max = SYM_SETUP_IARB_MAX;
9441 * Prepare the idle and invalid task actions.
9443 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9444 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9445 np->idletask_ba = vtobus(&np->idletask);
9447 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9448 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9449 np->notask_ba = vtobus(&np->notask);
9451 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9452 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9453 np->bad_itl_ba = vtobus(&np->bad_itl);
9455 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9456 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
9457 np->bad_itlq_ba = vtobus(&np->bad_itlq);
9460 * Allocate and prepare the lun JUMP table that is used
9461 * for a target prior the probing of devices (bad lun table).
9462 * A private table will be allocated for the target on the
9463 * first INQUIRY response received.
9465 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
9469 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
9470 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
9471 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
9474 * Prepare the bus address array that contains the bus
9475 * address of each target control block.
9476 * For now, assume all logical units are wrong. :)
9478 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
9479 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
9480 np->target[i].head.luntbl_sa =
9481 cpu_to_scr(vtobus(np->badluntbl));
9482 np->target[i].head.lun0_sa =
9483 cpu_to_scr(vtobus(&np->badlun_sa));
9487 * Now check the cache handling of the pci chipset.
9489 if (sym_snooptest (np)) {
9490 #ifdef FreeBSD_Bus_Io_Abstraction
9491 device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
9493 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
9499 * Now deal with CAM.
9500 * Hopefully, we will succeed with that one.:)
9502 if (!sym_cam_attach(np))
9506 * Sigh! we are done.
9512 * We will try to free all the resources we have
9513 * allocated, but if we are a boot device, this
9514 * will not help that much.;)
9523 * Free everything that have been allocated for this device.
9525 static void sym_pci_free(hcb_p np)
9535 * First free CAM resources.
9542 * Now every should be quiet for us to
9543 * free other resources.
9545 #ifdef FreeBSD_Bus_Io_Abstraction
9547 bus_release_resource(np->device, SYS_RES_MEMORY,
9548 np->ram_id, np->ram_res);
9550 bus_release_resource(np->device, SYS_RES_MEMORY,
9551 SYM_PCI_MMIO, np->mmio_res);
9553 bus_release_resource(np->device, SYS_RES_IOPORT,
9554 SYM_PCI_IO, np->io_res);
9556 bus_release_resource(np->device, SYS_RES_IRQ,
9561 * It seems there is no means to free MMIO resources.
9566 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
9568 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
9570 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
9572 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
9574 while ((qp = sym_remque_head(&np->free_ccbq)) != 0) {
9575 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
9576 #ifdef FreeBSD_Bus_Dma_Abstraction
9577 bus_dmamap_destroy(np->data_dmat, cp->dmamap);
9579 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
9580 sym_mfree_dma(cp, sizeof(*cp), "CCB");
9584 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
9586 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
9587 tp = &np->target[target];
9588 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
9589 lp = sym_lp(np, tp, lun);
9593 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
9596 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
9598 sym_mfree_dma(lp, sizeof(*lp), "LCB");
9600 #if SYM_CONF_MAX_LUN > 1
9602 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
9607 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
9608 #ifdef FreeBSD_Bus_Dma_Abstraction
9610 bus_dma_tag_destroy(np->data_dmat);
9612 sym_mfree_dma(np, sizeof(*np), "HCB");
9616 * Allocate CAM resources and register a bus to CAM.
9618 int sym_cam_attach(hcb_p np)
9620 struct cam_devq *devq = 0;
9621 struct cam_sim *sim = 0;
9622 struct cam_path *path = 0;
9623 struct ccb_setasync csa;
9629 * Establish our interrupt handler.
9631 #ifdef FreeBSD_Bus_Io_Abstraction
9632 err = bus_setup_intr(np->device, np->irq_res, INTR_TYPE_CAM,
9633 sym_intr, np, &np->intr);
9635 device_printf(np->device, "bus_setup_intr() failed: %d\n",
9641 if (!pci_map_int (np->pci_tag, sym_intr, np, &cam_imask)) {
9642 printf("%s: failed to map interrupt\n", sym_name(np));
9648 * Create the device queue for our sym SIM.
9650 devq = cam_simq_alloc(SYM_CONF_MAX_START);
9656 * Construct our SIM entry.
9658 sim = cam_sim_alloc(sym_action, sym_poll, "sym", np, np->unit,
9659 1, SYM_SETUP_MAX_TAG, devq);
9660 cam_simq_release(devq);
9664 if (xpt_bus_register(sim, 0) != CAM_SUCCESS)
9669 if (xpt_create_path(&path, 0,
9670 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
9671 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
9677 * Hmmm... This should be useful, but I donnot want to
9680 #if defined(__FreeBSD__) && __FreeBSD_version < 400000
9682 #ifdef FreeBSD_Bus_Io_Abstraction
9683 alpha_register_pci_scsi(pci_get_bus(np->device),
9684 pci_get_slot(np->device), np->sim);
9686 alpha_register_pci_scsi(pci_tag->bus, pci_tag->slot, np->sim);
9692 * Establish our async notification handler.
9694 xpt_setup_ccb(&csa.ccb_h, np->path, 5);
9695 csa.ccb_h.func_code = XPT_SASYNC_CB;
9696 csa.event_enable = AC_LOST_DEVICE;
9697 csa.callback = sym_async;
9698 csa.callback_arg = np->sim;
9699 xpt_action((union ccb *)&csa);
9702 * Start the chip now, without resetting the BUS, since
9703 * it seems that this must stay under control of CAM.
9704 * With LVD/SE capable chips and BUS in SE mode, we may
9705 * get a spurious SMBC interrupt.
9722 * Free everything that deals with CAM.
9724 void sym_cam_free(hcb_p np)
9726 #ifdef FreeBSD_Bus_Io_Abstraction
9728 bus_teardown_intr(np->device, np->irq_res, np->intr);
9730 /* pci_unmap_int(np->pci_tag); */ /* Does nothing */
9734 xpt_bus_deregister(cam_sim_path(np->sim));
9735 cam_sim_free(np->sim);
9738 xpt_free_path(np->path);
9741 /*============ OPTIONNAL NVRAM SUPPORT =================*/
9744 * Get host setup from NVRAM.
9746 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
9748 #ifdef SYM_CONF_NVRAM_SUPPORT
9750 * Get parity checking, host ID, verbose mode
9751 * and miscellaneous host flags from NVRAM.
9753 switch(nvram->type) {
9754 case SYM_SYMBIOS_NVRAM:
9755 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
9756 np->rv_scntl0 &= ~0x0a;
9757 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
9758 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
9760 if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
9761 np->usrflags |= SYM_SCAN_TARGETS_HILO;
9762 if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
9763 np->usrflags |= SYM_AVOID_BUS_RESET;
9765 case SYM_TEKRAM_NVRAM:
9766 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
9775 * Get target setup from NVRAM.
9777 #ifdef SYM_CONF_NVRAM_SUPPORT
9778 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
9779 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9783 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9785 #ifdef SYM_CONF_NVRAM_SUPPORT
9787 case SYM_SYMBIOS_NVRAM:
9788 sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9790 case SYM_TEKRAM_NVRAM:
9791 sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9799 #ifdef SYM_CONF_NVRAM_SUPPORT
9801 * Get target set-up from Symbios format NVRAM.
9804 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9806 tcb_p tp = &np->target[target];
9807 Symbios_target *tn = &nvram->target[target];
9809 tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9810 tp->tinfo.user.width = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9812 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9814 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9815 tp->usrflags &= ~SYM_DISC_ENABLED;
9816 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9817 tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9818 if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9819 tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9823 * Get target set-up from Tekram format NVRAM.
9826 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9828 tcb_p tp = &np->target[target];
9829 struct Tekram_target *tn = &nvram->target[target];
9832 if (tn->flags & TEKRAM_SYNC_NEGO) {
9833 i = tn->sync_index & 0xf;
9834 tp->tinfo.user.period = Tekram_sync[i];
9837 tp->tinfo.user.width =
9838 (tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9840 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9841 tp->usrtags = 2 << nvram->max_tags_index;
9844 if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9845 tp->usrflags |= SYM_DISC_ENABLED;
9847 /* If any device does not support parity, we will not use this option */
9848 if (!(tn->flags & TEKRAM_PARITY_CHECK))
9849 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
9852 #ifdef SYM_CONF_DEBUG_NVRAM
9854 * Dump Symbios format NVRAM for debugging purpose.
9856 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9860 /* display Symbios nvram host data */
9861 printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9862 sym_name(np), nvram->host_id & 0x0f,
9863 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9864 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
9865 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
9866 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
9867 (nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
9868 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
9870 /* display Symbios nvram drive data */
9871 for (i = 0 ; i < 15 ; i++) {
9872 struct Symbios_target *tn = &nvram->target[i];
9873 printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9875 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
9876 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
9877 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
9878 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
9880 tn->sync_period / 4,
9886 * Dump TEKRAM format NVRAM for debugging purpose.
9888 static u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9889 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9891 int i, tags, boot_delay;
9894 /* display Tekram nvram host data */
9895 tags = 2 << nvram->max_tags_index;
9897 if (nvram->boot_delay_index < 6)
9898 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9899 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9901 case 0: rem = ""; break;
9902 case 1: rem = " REMOVABLE=boot device"; break;
9903 case 2: rem = " REMOVABLE=all"; break;
9906 printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9907 sym_name(np), nvram->host_id & 0x0f,
9908 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9909 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
9910 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
9911 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
9912 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
9913 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
9914 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
9915 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
9916 rem, boot_delay, tags);
9918 /* display Tekram nvram drive data */
9919 for (i = 0; i <= 15; i++) {
9921 struct Tekram_target *tn = &nvram->target[i];
9922 j = tn->sync_index & 0xf;
9923 sync = Tekram_sync[j];
9924 printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9926 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
9927 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
9928 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
9929 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
9930 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
9931 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
9935 #endif /* SYM_CONF_DEBUG_NVRAM */
9936 #endif /* SYM_CONF_NVRAM_SUPPORT */
9940 * Try reading Symbios or Tekram NVRAM
9942 #ifdef SYM_CONF_NVRAM_SUPPORT
9943 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9944 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram);
9947 int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9949 #ifdef SYM_CONF_NVRAM_SUPPORT
9951 * Try to read SYMBIOS nvram.
9952 * Try to read TEKRAM nvram if Symbios nvram not found.
9954 if (SYM_SETUP_SYMBIOS_NVRAM &&
9955 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9956 nvp->type = SYM_SYMBIOS_NVRAM;
9957 #ifdef SYM_CONF_DEBUG_NVRAM
9958 sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9961 else if (SYM_SETUP_TEKRAM_NVRAM &&
9962 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9963 nvp->type = SYM_TEKRAM_NVRAM;
9964 #ifdef SYM_CONF_DEBUG_NVRAM
9965 sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9977 #ifdef SYM_CONF_NVRAM_SUPPORT
9979 * 24C16 EEPROM reading.
9981 * GPOI0 - data in/data out
9983 * Symbios NVRAM wiring now also used by Tekram.
9992 * Set/clear data/clock bit in GPIO0
9994 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
10000 *gpreg |= write_bit;
10013 OUTB (nc_gpreg, *gpreg);
10018 * Send START condition to NVRAM to wake it up.
10020 static void S24C16_start(hcb_p np, u_char *gpreg)
10022 S24C16_set_bit(np, 1, gpreg, SET_BIT);
10023 S24C16_set_bit(np, 0, gpreg, SET_CLK);
10024 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
10025 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
10029 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
10031 static void S24C16_stop(hcb_p np, u_char *gpreg)
10033 S24C16_set_bit(np, 0, gpreg, SET_CLK);
10034 S24C16_set_bit(np, 1, gpreg, SET_BIT);
10038 * Read or write a bit to the NVRAM,
10039 * read if GPIO0 input else write if GPIO0 output
10041 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
10044 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
10045 S24C16_set_bit(np, 0, gpreg, SET_CLK);
10047 *read_bit = INB (nc_gpreg);
10048 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
10049 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
10053 * Output an ACK to the NVRAM after reading,
10054 * change GPIO0 to output and when done back to an input
10056 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
10059 OUTB (nc_gpcntl, *gpcntl & 0xfe);
10060 S24C16_do_bit(np, 0, write_bit, gpreg);
10061 OUTB (nc_gpcntl, *gpcntl);
10065 * Input an ACK from NVRAM after writing,
10066 * change GPIO0 to input and when done back to an output
10068 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
10071 OUTB (nc_gpcntl, *gpcntl | 0x01);
10072 S24C16_do_bit(np, read_bit, 1, gpreg);
10073 OUTB (nc_gpcntl, *gpcntl);
10077 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
10078 * GPIO0 must already be set as an output
10080 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
10081 u_char *gpreg, u_char *gpcntl)
10085 for (x = 0; x < 8; x++)
10086 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
10088 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
10092 * READ a byte from the NVRAM and then send an ACK to say we have got it,
10093 * GPIO0 must already be set as an input
10095 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
10096 u_char *gpreg, u_char *gpcntl)
10102 for (x = 0; x < 8; x++) {
10103 S24C16_do_bit(np, &read_bit, 1, gpreg);
10104 *read_data |= ((read_bit & 0x01) << (7 - x));
10107 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
10111 * Read 'len' bytes starting at 'offset'.
10113 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
10115 u_char gpcntl, gpreg;
10116 u_char old_gpcntl, old_gpreg;
10121 /* save current state of GPCNTL and GPREG */
10122 old_gpreg = INB (nc_gpreg);
10123 old_gpcntl = INB (nc_gpcntl);
10124 gpcntl = old_gpcntl & 0x1c;
10126 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
10127 OUTB (nc_gpreg, old_gpreg);
10128 OUTB (nc_gpcntl, gpcntl);
10130 /* this is to set NVRAM into a known state with GPIO0/1 both low */
10132 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
10133 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
10135 /* now set NVRAM inactive with GPIO0/1 both high */
10136 S24C16_stop(np, &gpreg);
10138 /* activate NVRAM */
10139 S24C16_start(np, &gpreg);
10141 /* write device code and random address MSB */
10142 S24C16_write_byte(np, &ack_data,
10143 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
10144 if (ack_data & 0x01)
10147 /* write random address LSB */
10148 S24C16_write_byte(np, &ack_data,
10149 offset & 0xff, &gpreg, &gpcntl);
10150 if (ack_data & 0x01)
10153 /* regenerate START state to set up for reading */
10154 S24C16_start(np, &gpreg);
10156 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
10157 S24C16_write_byte(np, &ack_data,
10158 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
10159 if (ack_data & 0x01)
10162 /* now set up GPIO0 for inputting data */
10164 OUTB (nc_gpcntl, gpcntl);
10166 /* input all requested data - only part of total NVRAM */
10167 for (x = 0; x < len; x++)
10168 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
10170 /* finally put NVRAM back in inactive mode */
10172 OUTB (nc_gpcntl, gpcntl);
10173 S24C16_stop(np, &gpreg);
10176 /* return GPIO0/1 to original states after having accessed NVRAM */
10177 OUTB (nc_gpcntl, old_gpcntl);
10178 OUTB (nc_gpreg, old_gpreg);
10189 * Try reading Symbios NVRAM.
10192 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
10194 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
10195 u_char *data = (u_char *) nvram;
10196 int len = sizeof(*nvram);
10200 /* probe the 24c16 and read the SYMBIOS 24c16 area */
10201 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
10204 /* check valid NVRAM signature, verify byte count and checksum */
10205 if (nvram->type != 0 ||
10206 bcmp(nvram->trailer, Symbios_trailer, 6) ||
10207 nvram->byte_count != len - 12)
10210 /* verify checksum */
10211 for (x = 6, csum = 0; x < len - 6; x++)
10213 if (csum != nvram->checksum)
10220 * 93C46 EEPROM reading.
10225 * GPIO4 - chip select
10231 * Pulse clock bit in GPIO0
10233 static void T93C46_Clk(hcb_p np, u_char *gpreg)
10235 OUTB (nc_gpreg, *gpreg | 0x04);
10237 OUTB (nc_gpreg, *gpreg);
10241 * Read bit from NVRAM
10243 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
10246 T93C46_Clk(np, gpreg);
10247 *read_bit = INB (nc_gpreg);
10251 * Write bit to GPIO0
10253 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
10255 if (write_bit & 0x01)
10262 OUTB (nc_gpreg, *gpreg);
10265 T93C46_Clk(np, gpreg);
10269 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
10271 static void T93C46_Stop(hcb_p np, u_char *gpreg)
10274 OUTB (nc_gpreg, *gpreg);
10277 T93C46_Clk(np, gpreg);
10281 * Send read command and address to NVRAM
10283 static void T93C46_Send_Command(hcb_p np, u_short write_data,
10284 u_char *read_bit, u_char *gpreg)
10288 /* send 9 bits, start bit (1), command (2), address (6) */
10289 for (x = 0; x < 9; x++)
10290 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
10292 *read_bit = INB (nc_gpreg);
10296 * READ 2 bytes from the NVRAM
10298 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
10304 for (x = 0; x < 16; x++) {
10305 T93C46_Read_Bit(np, &read_bit, gpreg);
10307 if (read_bit & 0x01)
10308 *nvram_data |= (0x01 << (15 - x));
10310 *nvram_data &= ~(0x01 << (15 - x));
10315 * Read Tekram NvRAM data.
10317 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
10322 for (x = 0; x < len; x++) {
10324 /* output read command and address */
10325 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
10326 if (read_bit & 0x01)
10327 return 1; /* Bad */
10328 T93C46_Read_Word(np, &data[x], gpreg);
10329 T93C46_Stop(np, gpreg);
10336 * Try reading 93C46 Tekram NVRAM.
10338 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
10340 u_char gpcntl, gpreg;
10341 u_char old_gpcntl, old_gpreg;
10344 /* save current state of GPCNTL and GPREG */
10345 old_gpreg = INB (nc_gpreg);
10346 old_gpcntl = INB (nc_gpcntl);
10348 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
10350 gpreg = old_gpreg & 0xe9;
10351 OUTB (nc_gpreg, gpreg);
10352 gpcntl = (old_gpcntl & 0xe9) | 0x09;
10353 OUTB (nc_gpcntl, gpcntl);
10355 /* input all of NVRAM, 64 words */
10356 retv = T93C46_Read_Data(np, (u_short *) nvram,
10357 sizeof(*nvram) / sizeof(short), &gpreg);
10359 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
10360 OUTB (nc_gpcntl, old_gpcntl);
10361 OUTB (nc_gpreg, old_gpreg);
10367 * Try reading Tekram NVRAM.
10370 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
10372 u_char *data = (u_char *) nvram;
10373 int len = sizeof(*nvram);
10377 switch (np->device_id) {
10378 case PCI_ID_SYM53C885:
10379 case PCI_ID_SYM53C895:
10380 case PCI_ID_SYM53C896:
10381 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
10384 case PCI_ID_SYM53C875:
10385 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
10390 x = sym_read_T93C46_nvram(np, nvram);
10396 /* verify checksum */
10397 for (x = 0, csum = 0; x < len - 1; x += 2)
10398 csum += data[x] + (data[x+1] << 8);
10399 if (csum != 0x1234)
10405 #endif /* SYM_CONF_NVRAM_SUPPORT */