2 * Copyright (c) 2000 Matthew N. Dodd <winter@jurai.net>
5 * Copyright (c) 1997 Simon Shapiro
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * $FreeBSD: src/sys/dev/dpt/dpt_pci.c,v 1.17.2.2 2000/08/26 22:21:21 peter Exp $
30 * $DragonFly: src/sys/dev/raid/dpt/dpt_pci.c,v 1.3 2003/08/07 21:17:08 dillon Exp $
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
39 #include <machine/bus_memio.h>
40 #include <machine/bus_pio.h>
41 #include <machine/bus.h>
42 #include <machine/resource.h>
45 #include <bus/pci/pcireg.h>
46 #include <bus/pci/pcivar.h>
48 #include <bus/cam/scsi/scsi_all.h>
52 #define DPT_VENDOR_ID 0x1044
53 #define DPT_DEVICE_ID 0xa400
55 #define DPT_PCI_IOADDR PCIR_MAPS /* I/O Address */
56 #define DPT_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
58 #define ISA_PRIMARY_WD_ADDRESS 0x1f8
60 static int dpt_pci_probe (device_t);
61 static int dpt_pci_attach (device_t);
64 dpt_pci_probe (device_t dev)
66 if ((pci_get_vendor(dev) == DPT_VENDOR_ID) &&
67 (pci_get_device(dev) == DPT_DEVICE_ID)) {
68 device_set_desc(dev, "DPT Caching SCSI RAID Controller");
75 dpt_pci_attach (device_t dev)
78 struct resource *io = 0;
79 struct resource *irq = 0;
88 command = pci_read_config(dev, PCIR_COMMAND, /*bytes*/1);
91 if ((command & PCIM_CMD_MEMEN) != 0) {
92 rid = DPT_PCI_MEMADDR;
93 iotype = SYS_RES_MEMORY;
94 io = bus_alloc_resource(dev, iotype, &rid, 0, ~0, 1, RF_ACTIVE);
97 if (io == NULL && (command & PCIM_CMD_PORTEN) != 0) {
99 iotype = SYS_RES_IOPORT;
100 io = bus_alloc_resource(dev, iotype, &rid, 0, ~0, 1, RF_ACTIVE);
104 device_printf(dev, "can't allocate register resources\n");
110 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
111 RF_ACTIVE | RF_SHAREABLE);
113 device_printf(dev, "No irq?!\n");
118 /* Ensure busmastering is enabled */
119 command |= PCIM_CMD_BUSMASTEREN;
120 pci_write_config(dev, PCIR_COMMAND, command, /*bytes*/1);
122 if (rman_get_start(io) == (ISA_PRIMARY_WD_ADDRESS - 0x10)) {
123 #ifdef DPT_DEBUG_WARN
124 device_printf(dev, "Mapped as an IDE controller. "
125 "Disabling SCSI setup\n");
131 /* Device registers are offset 0x10 into the register window. FEH */
132 dpt = dpt_alloc(dev, rman_get_bustag(io), rman_get_bushandle(io) + 0x10);
138 /* Allocate a dmatag representing the capabilities of this attachment */
139 /* XXX Should be a child of the PCI bus dma tag */
140 if (bus_dma_tag_create( /* parent */ NULL,
143 /* lowaddr */ BUS_SPACE_MAXADDR_32BIT,
144 /* highaddr */ BUS_SPACE_MAXADDR,
146 /* filterarg */ NULL,
147 /* maxsize */ BUS_SPACE_MAXSIZE_32BIT,
148 /* nsegments */ BUS_SPACE_UNRESTRICTED,
149 /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT,
151 &dpt->parent_dmat) != 0) {
159 if (dpt_init(dpt) != 0) {
165 /* Register with the XPT */
170 if (bus_setup_intr(dev, irq, INTR_TYPE_CAM, dpt_intr, dpt, &ih)) {
171 device_printf(dev, "Unable to register interrupt handler\n");
180 bus_release_resource(dev, iotype, 0, io);
182 bus_release_resource(dev, SYS_RES_IRQ, 0, irq);
187 static device_method_t dpt_pci_methods[] = {
188 /* Device interface */
189 DEVMETHOD(device_probe, dpt_pci_probe),
190 DEVMETHOD(device_attach, dpt_pci_attach),
195 static driver_t dpt_pci_driver = {
201 static devclass_t dpt_devclass;
203 DRIVER_MODULE(dpt, pci, dpt_pci_driver, dpt_devclass, 0, 0);