2 * Copyright (c) 1991 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $
34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.13 2004/01/30 05:42:15 dillon Exp $
35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91
36 * from: i386/isa sio.c,v 1.234
39 #include "opt_comconsole.h"
40 #include "opt_compat.h"
50 * Serial driver, based on 386BSD-0.1 com driver.
51 * Mostly rewritten to use pseudo-DMA.
52 * Works for National Semiconductor NS8250-NS16550AF UARTs.
53 * COM driver, based on HP dca driver.
55 * Changes for PC-Card integration:
56 * - Added PC-Card driver table and handlers
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/reboot.h>
61 #include <sys/malloc.h>
64 #include <sys/module.h>
66 #include <sys/dkstat.h>
67 #include <sys/fcntl.h>
68 #include <sys/interrupt.h>
69 #include <sys/kernel.h>
70 #include <sys/syslog.h>
71 #include <sys/sysctl.h>
73 #include <machine/bus_pio.h>
74 #include <machine/bus.h>
76 #include <sys/timepps.h>
78 #include <machine/limits.h>
80 #include <bus/isa/isareg.h>
81 #include <bus/isa/isavar.h>
83 #include <bus/pci/pcireg.h>
84 #include <bus/pci/pcivar.h>
87 #include <dev/misc/puc/pucvar.h>
89 #include <machine/lock.h>
91 #include <machine/clock.h>
92 #include <machine/ipl.h>
94 #include <machine/lock.h>
96 #include <machine/resource.h>
99 #include "sio_private.h"
102 #include "../ic_layer/esp.h"
105 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
107 #define CALLOUT_MASK 0x80
108 #define CONTROL_MASK 0x60
109 #define CONTROL_INIT_STATE 0x20
110 #define CONTROL_LOCK_STATE 0x40
111 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev)))
112 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \
114 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \
117 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */
119 #define sio_getreg(com, off) \
120 (bus_space_read_1((com)->bst, (com)->bsh, (off)))
121 #define sio_setreg(com, off, value) \
122 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
126 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
127 * than the other bits so that they can be tested as a group without masking
130 * The following com and tty flags correspond closely:
131 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
133 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
134 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
135 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
136 * TS_FLUSH is not used.
137 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
138 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
140 #define CS_BUSY 0x80 /* output in progress */
141 #define CS_TTGO 0x40 /* output not stopped by XOFF */
142 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
143 #define CS_CHECKMSR 1 /* check of MSR scheduled */
144 #define CS_CTS_OFLOW 2 /* use CTS output flow control */
145 #define CS_DTR_OFF 0x10 /* DTR held off */
146 #define CS_ODONE 4 /* output completed */
147 #define CS_RTS_IFLOW 8 /* use RTS input flow control */
148 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */
150 static char const * const error_desc[] = {
153 #define CE_INTERRUPT_BUF_OVERFLOW 1
154 "interrupt-level buffer overflow",
155 #define CE_TTY_BUF_OVERFLOW 2
156 "tty-level buffer overflow",
160 static int espattach (struct com_s *com, Port_t esp_port);
162 static int sio_isa_attach (device_t dev);
164 static timeout_t siobusycheck;
165 static u_int siodivisor (u_long rclk, speed_t speed);
166 static timeout_t siodtrwakeup;
167 static void comhardclose (struct com_s *com);
168 static void sioinput (struct com_s *com);
169 static void siointr1 (struct com_s *com);
170 static void siointr (void *arg);
171 static int commctl (struct com_s *com, int bits, int how);
172 static int comparam (struct tty *tp, struct termios *t);
173 static inthand2_t siopoll;
174 static int sio_isa_probe (device_t dev);
175 static void siosettimeout (void);
176 static int siosetwater (struct com_s *com, speed_t speed);
177 static void comstart (struct tty *tp);
178 static void comstop (struct tty *tp, int rw);
179 static timeout_t comwakeup;
180 static void disc_optim (struct tty *tp, struct termios *t,
184 static int sio_pci_attach (device_t dev);
185 static void sio_pci_kludge_unit (device_t dev);
186 static int sio_pci_probe (device_t dev);
187 #endif /* NPCI > 0 */
190 static int sio_puc_attach (device_t dev);
191 static int sio_puc_probe (device_t dev);
192 #endif /* NPUC > 0 */
194 static char driver_name[] = "sio";
196 /* table and macro for fast conversion from a unit number to its com struct */
197 devclass_t sio_devclass;
198 #define com_addr(unit) ((struct com_s *) \
199 devclass_get_softc(sio_devclass, unit))
201 static device_method_t sio_isa_methods[] = {
202 /* Device interface */
203 DEVMETHOD(device_probe, sio_isa_probe),
204 DEVMETHOD(device_attach, sio_isa_attach),
209 static driver_t sio_isa_driver = {
212 sizeof(struct com_s),
216 static device_method_t sio_pci_methods[] = {
217 /* Device interface */
218 DEVMETHOD(device_probe, sio_pci_probe),
219 DEVMETHOD(device_attach, sio_pci_attach),
224 static driver_t sio_pci_driver = {
227 sizeof(struct com_s),
229 #endif /* NPCI > 0 */
232 static device_method_t sio_puc_methods[] = {
233 /* Device interface */
234 DEVMETHOD(device_probe, sio_puc_probe),
235 DEVMETHOD(device_attach, sio_puc_attach),
240 static driver_t sio_puc_driver = {
243 sizeof(struct com_s),
245 #endif /* NPUC > 0 */
247 static d_open_t sioopen;
248 static d_close_t sioclose;
249 static d_read_t sioread;
250 static d_write_t siowrite;
251 static d_ioctl_t sioioctl;
253 #define CDEV_MAJOR 28
254 static struct cdevsw sio_cdevsw = {
255 /* name */ driver_name,
256 /* maj */ CDEV_MAJOR,
257 /* flags */ D_TTY | D_KQFILTER,
262 /* close */ sioclose,
264 /* write */ siowrite,
265 /* ioctl */ sioioctl,
268 /* strategy */ nostrategy,
271 /* kqfilter */ ttykqfilter
275 static volatile speed_t comdefaultrate = CONSPEED;
276 static u_long comdefaultrclk = DEFAULT_RCLK;
277 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, "");
279 static volatile speed_t gdbdefaultrate = CONSPEED;
281 static u_int com_events; /* input chars + weighted output completions */
282 static Port_t siocniobase;
283 static int siocnunit;
284 static Port_t siogdbiobase;
285 static int siogdbunit = -1;
286 static bool_t sio_registered;
287 static int sio_timeout;
288 static int sio_timeouts_until_log;
289 static struct callout_handle sio_timeout_handle
290 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
291 static int sio_numunits;
294 /* XXX configure this properly. */
295 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
296 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
300 * handle sysctl read/write requests for console speed
302 * In addition to setting comdefaultrate for I/O through /dev/console,
303 * also set the initial and lock values for the /dev/ttyXX device
304 * if there is one associated with the console. Finally, if the /dev/tty
305 * device has already been open, change the speed on the open running port
310 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS)
317 newspeed = comdefaultrate;
319 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
320 if (error || !req->newptr)
323 comdefaultrate = newspeed;
325 if (comconsole < 0) /* serial console not selected? */
328 com = com_addr(comconsole);
333 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
334 * (note, the lock rates really are boolean -- if non-zero, disallow
337 com->it_in.c_ispeed = com->it_in.c_ospeed =
338 com->lt_in.c_ispeed = com->lt_in.c_ospeed =
339 com->it_out.c_ispeed = com->it_out.c_ospeed =
340 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate;
343 * if we're open, change the running rate too
346 if (tp && (tp->t_state & TS_ISOPEN)) {
347 tp->t_termios.c_ispeed =
348 tp->t_termios.c_ospeed = comdefaultrate;
350 error = comparam(tp, &tp->t_termios);
356 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
357 0, 0, sysctl_machdep_comdefaultrate, "I", "");
366 static struct pci_ids pci_ids[] = {
367 { 0x100812b9, "3COM PCI FaxModem", 0x10 },
368 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 },
369 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
370 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
371 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 },
372 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 },
373 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 },
374 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 },
375 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 },
376 { 0x00000000, NULL, 0 }
386 type = pci_get_devid(dev);
388 while (id->type && id->type != type)
390 if (id->desc == NULL)
392 sio_pci_kludge_unit(dev);
393 return (sioattach(dev, id->rid, 0UL));
397 * Don't cut and paste this to other drivers. It is a horrible kludge
398 * which will fail to work and also be unnecessary in future versions.
401 sio_pci_kludge_unit(dev)
411 while (resource_int_value("sio", unit, "port", &start) == 0 &&
414 if (device_get_unit(dev) < unit) {
415 dc = device_get_devclass(dev);
416 while (devclass_get_device(dc, unit))
418 device_printf(dev, "moving to sio%d\n", unit);
419 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */
421 device_printf(dev, "error moving device %d\n", err);
432 type = pci_get_devid(dev);
434 while (id->type && id->type != type)
436 if (id->desc == NULL)
438 device_set_desc(dev, id->desc);
439 return (sioprobe(dev, id->rid, 0UL));
441 #endif /* NPCI > 0 */
450 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ,
453 return (sioattach(dev, 0, rclk));
462 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ,
465 return (sioprobe(dev, 0, rclk));
469 static struct isa_pnp_id sio_ids[] = {
470 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */
471 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */
472 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */
473 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */
474 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */
475 /* Devices that do not have a compatid */
476 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */
477 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */
478 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */
479 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */
480 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */
481 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */
482 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/
483 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */
484 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */
485 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */
486 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */
487 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */
488 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */
489 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */
490 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */
491 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */
492 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */
493 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */
494 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */
495 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */
496 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */
497 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */
498 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */
499 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */
500 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */
501 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */
502 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */
503 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/
504 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */
505 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */
506 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */
507 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */
508 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */
509 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */
510 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */
511 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */
512 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */
513 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */
514 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */
515 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */
516 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */
517 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */
518 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */
519 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */
520 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */
521 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */
522 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */
523 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */
524 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */
525 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */
526 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */
527 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */
528 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */
529 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */
530 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */
531 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */
532 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */
533 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */
534 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */
535 {0x11007256, NULL}, /* USR0011 - USR ? */
536 {0x01017256, NULL}, /* USR0101 - USR ? */
537 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */
538 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */
539 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */
540 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */
541 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */
542 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */
543 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */
544 {0x90307256, NULL}, /* USR3090 - USR ? */
545 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */
546 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */
547 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */
548 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */
549 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */
559 /* Check isapnp ids */
560 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO)
562 return (sioprobe(dev, 0, 0UL));
566 sioprobe(dev, xrid, rclk)
572 static bool_t already_init;
581 intrmask_t irqmap[4];
586 u_int flags = device_get_flags(dev);
588 struct resource *port;
591 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
592 0, ~0, IO_COMSIZE, RF_ACTIVE);
596 com = device_get_softc(dev);
597 com->bst = rman_get_bustag(port);
598 com->bsh = rman_get_bushandle(port);
605 * XXX this is broken - when we are first called, there are no
606 * previously configured IO ports. We could hard code
607 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
608 * This code has been doing nothing since the conversion since
609 * "count" is zero the first time around.
613 * Turn off MCR_IENABLE for all likely serial ports. An unused
614 * port with its MCR_IENABLE gate open will inhibit interrupts
615 * from any used port that shares the interrupt vector.
616 * XXX the gate enable is elsewhere for some multiports.
619 int count, i, xioport;
621 devclass_get_devices(sio_devclass, &devs, &count);
622 for (i = 0; i < count; i++) {
624 if (device_is_enabled(xdev) &&
625 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
627 outb(xioport + com_mcr, 0);
634 if (COM_LLCONSOLE(flags)) {
635 printf("sio%d: reserved for low-level i/o\n",
636 device_get_unit(dev));
637 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
642 * If the device is on a multiport card and has an AST/4
643 * compatible interrupt control register, initialize this
644 * register and prepare to leave MCR_IENABLE clear in the mcr.
645 * Otherwise, prepare to set MCR_IENABLE in the mcr.
646 * Point idev to the device struct giving the correct id_irq.
647 * This is the struct for the master device if there is one.
650 mcr_image = MCR_IENABLE;
652 if (COM_ISMULTIPORT(flags)) {
656 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
658 printf("sio%d: master device %d not configured\n",
659 device_get_unit(dev), COM_MPMASTER(flags));
662 if (!COM_NOTAST4(flags)) {
663 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
666 if (bus_get_resource(idev, SYS_RES_IRQ, 0,
668 outb(xiobase + com_scr, 0x80);
670 outb(xiobase + com_scr, 0);
675 #endif /* COM_MULTIPORT */
676 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
679 bzero(failures, sizeof failures);
680 iobase = rman_get_start(port);
683 * We don't want to get actual interrupts, just masked ones.
684 * Interrupts from this line should already be masked in the ICU,
685 * but mask them in the processor as well in case there are some
686 * (misconfigured) shared interrupts.
692 * For the TI16754 chips, set prescaler to 1 (4 is often the
693 * default after-reset value) as otherwise it's impossible to
694 * get highest baudrates.
696 if (COM_TI16754(flags)) {
699 cfcr = sio_getreg(com, com_cfcr);
700 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
701 efr = sio_getreg(com, com_efr);
702 /* Unlock extended features to turn off prescaler. */
703 sio_setreg(com, com_efr, efr | EFR_EFE);
705 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0);
706 /* Turn off prescaler. */
707 sio_setreg(com, com_mcr,
708 sio_getreg(com, com_mcr) & ~MCR_PRESCALE);
709 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
710 sio_setreg(com, com_efr, efr);
711 sio_setreg(com, com_cfcr, cfcr);
715 * Initialize the speed and the word size and wait long enough to
716 * drain the maximum of 16 bytes of junk in device output queues.
717 * The speed is undefined after a master reset and must be set
718 * before relying on anything related to output. There may be
719 * junk after a (very fast) soft reboot and (apparently) after
721 * XXX what about the UART bug avoided by waiting in comparam()?
722 * We don't want to to wait long enough to drain at 2 bps.
724 if (iobase == siocniobase)
725 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
727 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
728 divisor = siodivisor(rclk, SIO_TEST_SPEED);
729 sio_setreg(com, com_dlbl, divisor & 0xff);
730 sio_setreg(com, com_dlbh, divisor >> 8);
731 sio_setreg(com, com_cfcr, CFCR_8BITS);
732 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
736 * Enable the interrupt gate and disable device interupts. This
737 * should leave the device driving the interrupt line low and
738 * guarantee an edge trigger if an interrupt can be generated.
741 sio_setreg(com, com_mcr, mcr_image);
742 sio_setreg(com, com_ier, 0);
743 DELAY(1000); /* XXX */
744 irqmap[0] = isa_irq_pending();
747 * Attempt to set loopback mode so that we can send a null byte
748 * without annoying any external device.
751 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
754 * Attempt to generate an output interrupt. On 8250's, setting
755 * IER_ETXRDY generates an interrupt independent of the current
756 * setting and independent of whether the THR is empty. On 16450's,
757 * setting IER_ETXRDY generates an interrupt independent of the
758 * current setting. On 16550A's, setting IER_ETXRDY only
759 * generates an interrupt when IER_ETXRDY is not already set.
761 sio_setreg(com, com_ier, IER_ETXRDY);
764 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
765 * an interrupt. They'd better generate one for actually doing
766 * output. Loopback may be broken on the same incompatibles but
767 * it's unlikely to do more than allow the null byte out.
769 sio_setreg(com, com_data, 0);
770 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
773 * Turn off loopback mode so that the interrupt gate works again
774 * (MCR_IENABLE was hidden). This should leave the device driving
775 * an interrupt line high. It doesn't matter if the interrupt
776 * line oscillates while we are not looking at it, since interrupts
780 sio_setreg(com, com_mcr, mcr_image);
783 * Some pcmcia cards have the "TXRDY bug", so we check everyone
784 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... )
786 if (COM_NOPROBE(flags)) {
787 /* Reading IIR register twice */
788 for (fn = 0; fn < 2; fn ++) {
790 failures[6] = sio_getreg(com, com_iir);
792 /* Check IIR_TXRDY clear ? */
794 if (failures[6] & IIR_TXRDY) {
795 /* Nop, Double check with clearing IER */
796 sio_setreg(com, com_ier, 0);
797 if (sio_getreg(com, com_iir) & IIR_NOPEND) {
798 /* Ok. we're familia this gang */
799 SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
801 /* Unknown, Just omit this chip.. XXX */
803 sio_setreg(com, com_mcr, 0);
806 /* OK. this is well-known guys */
807 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
809 sio_setreg(com, com_ier, 0);
810 sio_setreg(com, com_cfcr, CFCR_8BITS);
812 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
813 return (iobase == siocniobase ? 0 : result);
818 * o the CFCR, IER and MCR in UART hold the values written to them
819 * (the values happen to be all distinct - this is good for
820 * avoiding false positive tests from bus echoes).
821 * o an output interrupt is generated and its vector is correct.
822 * o the interrupt goes away when the IIR in the UART is read.
825 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
826 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
827 failures[2] = sio_getreg(com, com_mcr) - mcr_image;
828 DELAY(10000); /* Some internal modems need this time */
829 irqmap[1] = isa_irq_pending();
830 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
831 DELAY(1000); /* XXX */
832 irqmap[2] = isa_irq_pending();
833 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
836 * Turn off all device interrupts and check that they go off properly.
837 * Leave MCR_IENABLE alone. For ports without a master port, it gates
838 * the OUT2 output of the UART to
839 * the ICU input. Closing the gate would give a floating ICU input
840 * (unless there is another device driving it) and spurious interrupts.
841 * (On the system that this was first tested on, the input floats high
842 * and gives a (masked) interrupt as soon as the gate is closed.)
844 sio_setreg(com, com_ier, 0);
845 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */
846 failures[7] = sio_getreg(com, com_ier);
847 DELAY(1000); /* XXX */
848 irqmap[3] = isa_irq_pending();
849 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
853 irqs = irqmap[1] & ~irqmap[0];
854 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
855 ((1 << xirq) & irqs) == 0)
857 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
858 device_get_unit(dev), xirq, irqs);
860 printf("sio%d: irq maps: %#x %#x %#x %#x\n",
861 device_get_unit(dev),
862 irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
865 for (fn = 0; fn < sizeof failures; ++fn)
867 sio_setreg(com, com_mcr, 0);
870 printf("sio%d: probe failed test(s):",
871 device_get_unit(dev));
872 for (fn = 0; fn < sizeof failures; ++fn)
879 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
880 return (iobase == siocniobase ? 0 : result);
885 espattach(com, esp_port)
893 * Check the ESP-specific I/O port to see if we're an ESP
894 * card. If not, return failure immediately.
896 if ((inb(esp_port) & 0xf3) == 0) {
897 printf(" port 0x%x is not an ESP board?\n", esp_port);
902 * We've got something that claims to be a Hayes ESP card.
906 /* Get the dip-switch configuration */
907 outb(esp_port + ESP_CMD1, ESP_GETDIPS);
908 dips = inb(esp_port + ESP_STATUS1);
911 * Bits 0,1 of dips say which COM port we are.
913 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
916 printf(" esp_port has com %d\n", dips & 0x03);
921 * Check for ESP version 2.0 or later: bits 4,5,6 = 010.
923 outb(esp_port + ESP_CMD1, ESP_GETTEST);
924 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */
925 val = inb(esp_port + ESP_STATUS2);
926 if ((val & 0x70) < 0x20) {
927 printf("-old (%o)", val & 0x70);
932 * Check for ability to emulate 16550: bit 7 == 1
934 if ((dips & 0x80) == 0) {
940 * Okay, we seem to be a Hayes ESP card. Whee.
943 com->esp_port = esp_port;
952 return (sioattach(dev, 0, 0UL));
956 sioattach(dev, xrid, rclk)
970 struct resource *port;
974 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
975 0, ~0, IO_COMSIZE, RF_ACTIVE);
979 iobase = rman_get_start(port);
980 unit = device_get_unit(dev);
981 com = device_get_softc(dev);
982 flags = device_get_flags(dev);
984 if (unit >= sio_numunits)
985 sio_numunits = unit + 1;
987 * sioprobe() has initialized the device registers as follows:
988 * o cfcr = CFCR_8BITS.
989 * It is most important that CFCR_DLAB is off, so that the
990 * data port is not hidden when we enable interrupts.
992 * Interrupts are only enabled when the line is open.
993 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
994 * interrupt control register or the config specifies no irq.
995 * Keeping MCR_DTR and MCR_RTS off might stop the external
996 * device from sending before we are ready.
998 bzero(com, sizeof *com);
1000 com->ioportres = port;
1001 com->bst = rman_get_bustag(port);
1002 com->bsh = rman_get_bushandle(port);
1003 com->cfcr_image = CFCR_8BITS;
1004 com->dtr_wait = 3 * hz;
1005 com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
1006 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
1007 com->tx_fifo_size = 1;
1008 com->obufs[0].l_head = com->obuf1;
1009 com->obufs[1].l_head = com->obuf2;
1011 com->data_port = iobase + com_data;
1012 com->int_id_port = iobase + com_iir;
1013 com->modem_ctl_port = iobase + com_mcr;
1014 com->mcr_image = inb(com->modem_ctl_port);
1015 com->line_status_port = iobase + com_lsr;
1016 com->modem_status_port = iobase + com_msr;
1017 com->intr_ctl_port = iobase + com_ier;
1020 rclk = DEFAULT_RCLK;
1024 * We don't use all the flags from <sys/ttydefaults.h> since they
1025 * are only relevant for logins. It's important to have echo off
1026 * initially so that the line doesn't start blathering before the
1027 * echo flag can be turned off.
1029 com->it_in.c_iflag = 0;
1030 com->it_in.c_oflag = 0;
1031 com->it_in.c_cflag = TTYDEF_CFLAG;
1032 com->it_in.c_lflag = 0;
1033 if (unit == comconsole) {
1034 com->it_in.c_iflag = TTYDEF_IFLAG;
1035 com->it_in.c_oflag = TTYDEF_OFLAG;
1036 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
1037 com->it_in.c_lflag = TTYDEF_LFLAG;
1038 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
1039 com->lt_out.c_ispeed = com->lt_out.c_ospeed =
1040 com->lt_in.c_ispeed = com->lt_in.c_ospeed =
1041 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
1043 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED;
1044 if (siosetwater(com, com->it_in.c_ispeed) != 0) {
1047 * Leave i/o resources allocated if this is a `cn'-level
1048 * console, so that other devices can't snarf them.
1050 if (iobase != siocniobase)
1051 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1055 termioschars(&com->it_in);
1056 com->it_out = com->it_in;
1058 /* attempt to determine UART type */
1059 printf("sio%d: type", unit);
1062 #ifdef COM_MULTIPORT
1063 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags))
1065 if (!COM_IIR_TXRDYBUG(flags))
1072 scr = sio_getreg(com, com_scr);
1073 sio_setreg(com, com_scr, 0xa5);
1074 scr1 = sio_getreg(com, com_scr);
1075 sio_setreg(com, com_scr, 0x5a);
1076 scr2 = sio_getreg(com, com_scr);
1077 sio_setreg(com, com_scr, scr);
1078 if (scr1 != 0xa5 || scr2 != 0x5a) {
1080 goto determined_type;
1083 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
1086 switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
1097 if (COM_NOFIFO(flags)) {
1098 printf(" 16550A fifo disabled");
1100 com->hasfifo = TRUE;
1101 if (COM_ST16650A(flags)) {
1103 com->tx_fifo_size = 32;
1104 printf(" ST16650A");
1105 } else if (COM_TI16754(flags)) {
1106 com->tx_fifo_size = 64;
1109 com->tx_fifo_size = COM_FIFOSIZE(flags);
1114 for (espp = likely_esp_ports; *espp != 0; espp++)
1115 if (espattach(com, *espp)) {
1116 com->tx_fifo_size = 1024;
1120 if (!com->st16650a && !COM_TI16754(flags)) {
1121 if (!com->tx_fifo_size)
1122 com->tx_fifo_size = 16;
1124 printf(" lookalike with %d bytes FIFO",
1134 * Set 16550 compatibility mode.
1135 * We don't use the ESP_MODE_SCALE bit to increase the
1136 * fifo trigger levels because we can't handle large
1138 * XXX flow control should be set in comparam(), not here.
1140 outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1141 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1143 /* Set RTS/CTS flow control. */
1144 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1145 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1146 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1148 /* Set flow-control levels. */
1149 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1150 outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1151 outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1152 outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1153 outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1155 #endif /* COM_ESP */
1156 sio_setreg(com, com_fifo, 0);
1159 #ifdef COM_MULTIPORT
1160 if (COM_ISMULTIPORT(flags)) {
1163 com->multiport = TRUE;
1164 printf(" (multiport");
1165 if (unit == COM_MPMASTER(flags))
1168 masterdev = devclass_get_device(sio_devclass,
1169 COM_MPMASTER(flags));
1170 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1171 SYS_RES_IRQ, 0, NULL, NULL) != 0);
1173 #endif /* COM_MULTIPORT */
1174 if (unit == comconsole)
1175 printf(", console");
1176 if (COM_IIR_TXRDYBUG(flags))
1177 printf(" with a bogus IIR_TXRDY register");
1180 if (!sio_registered) {
1181 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll");
1182 sio_registered = TRUE;
1184 minorbase = UNIT_TO_MINOR(unit);
1185 make_dev(&sio_cdevsw, minorbase,
1186 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit);
1187 make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE,
1188 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit);
1189 make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE,
1190 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit);
1191 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK,
1192 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit);
1193 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
1194 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit);
1195 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
1196 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit);
1198 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1199 pps_init(&com->pps);
1202 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1,
1205 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres,
1206 INTR_TYPE_TTY | INTR_TYPE_FAST,
1207 siointr, com, &com->cookie);
1209 ret = BUS_SETUP_INTR(device_get_parent(dev), dev,
1210 com->irqres, INTR_TYPE_TTY,
1211 siointr, com, &com->cookie);
1213 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n");
1216 device_printf(dev, "could not activate interrupt\n");
1217 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1218 defined(ALT_BREAK_TO_DEBUGGER))
1220 * Enable interrupts for early break-to-debugger support
1223 if (ret == 0 && unit == comconsole)
1224 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS |
1233 sioopen(dev_t dev, int flag, int mode, struct thread *td)
1243 unit = MINOR_TO_UNIT(mynor);
1244 com = com_addr(unit);
1249 if (mynor & CONTROL_MASK)
1251 tp = dev->si_tty = com->tp = ttymalloc(com->tp);
1254 * We jump to this label after all non-interrupted sleeps to pick
1255 * up any changes of the device state.
1258 while (com->state & CS_DTR_OFF) {
1259 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0);
1260 if (com_addr(unit) == NULL)
1262 if (error != 0 || com->gone)
1265 if (tp->t_state & TS_ISOPEN) {
1267 * The device is open, so everything has been initialized.
1270 if (mynor & CALLOUT_MASK) {
1271 if (!com->active_out) {
1276 if (com->active_out) {
1277 if (flag & O_NONBLOCK) {
1281 error = tsleep(&com->active_out,
1282 PCATCH, "siobi", 0);
1283 if (com_addr(unit) == NULL)
1285 if (error != 0 || com->gone)
1290 if (tp->t_state & TS_XCLUDE && suser(td)) {
1296 * The device isn't open, so there are no conflicts.
1297 * Initialize it. Initialization is done twice in many
1298 * cases: to preempt sleeping callin opens if we are
1299 * callout, and to complete a callin open after DCD rises.
1301 tp->t_oproc = comstart;
1302 tp->t_param = comparam;
1303 tp->t_stop = comstop;
1305 tp->t_termios = mynor & CALLOUT_MASK
1306 ? com->it_out : com->it_in;
1307 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET);
1308 com->poll = com->no_irq;
1309 com->poll_output = com->loses_outints;
1311 error = comparam(tp, &tp->t_termios);
1316 * XXX we should goto open_top if comparam() slept.
1320 * (Re)enable and drain fifos.
1322 * Certain SMC chips cause problems if the fifos
1323 * are enabled while input is ready. Turn off the
1324 * fifo if necessary to clear the input. We test
1325 * the input ready bit after enabling the fifos
1326 * since we've already enabled them in comparam()
1327 * and to handle races between enabling and fresh
1331 sio_setreg(com, com_fifo,
1332 FIFO_RCV_RST | FIFO_XMT_RST
1335 * XXX the delays are for superstitious
1336 * historical reasons. It must be less than
1337 * the character time at the maximum
1338 * supported speed (87 usec at 115200 bps
1339 * 8N1). Otherwise we might loop endlessly
1340 * if data is streaming in. We used to use
1341 * delays of 100. That usually worked
1342 * because DELAY(100) used to usually delay
1343 * for about 85 usec instead of 100.
1346 if (!(inb(com->line_status_port) & LSR_RXRDY))
1348 sio_setreg(com, com_fifo, 0);
1350 (void) inb(com->data_port);
1355 (void) inb(com->line_status_port);
1356 (void) inb(com->data_port);
1357 com->prev_modem_status = com->last_modem_status
1358 = inb(com->modem_status_port);
1359 if (COM_IIR_TXRDYBUG(com->flags)) {
1360 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS
1363 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY
1364 | IER_ERLS | IER_EMSC);
1368 * Handle initial DCD. Callout devices get a fake initial
1369 * DCD (trapdoor DCD). If we are callout, then any sleeping
1370 * callin opens get woken up and resume sleeping on "siobi"
1371 * instead of "siodcd".
1374 * XXX `mynor & CALLOUT_MASK' should be
1375 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1376 * TRAPDOOR_CARRIER is the default initial state for callout
1377 * devices and SOFT_CARRIER is like CLOCAL except it hides
1380 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
1381 (*linesw[tp->t_line].l_modem)(tp, 1);
1384 * Wait for DCD if necessary.
1386 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
1387 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) {
1389 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0);
1390 if (com_addr(unit) == NULL)
1393 if (error != 0 || com->gone)
1397 error = (*linesw[tp->t_line].l_open)(dev, tp);
1398 disc_optim(tp, &tp->t_termios, com);
1399 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
1400 com->active_out = TRUE;
1404 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
1410 sioclose(dev_t dev, int flag, int mode, struct thread *td)
1418 if (mynor & CONTROL_MASK)
1420 com = com_addr(MINOR_TO_UNIT(mynor));
1425 (*linesw[tp->t_line].l_close)(tp, flag);
1426 disc_optim(tp, &tp->t_termios, com);
1427 comstop(tp, FREAD | FWRITE);
1433 printf("sio%d: gone\n", com->unit);
1435 if (com->ibuf != NULL)
1436 free(com->ibuf, M_DEVBUF);
1437 bzero(tp, sizeof *tp);
1454 com->poll_output = FALSE;
1455 com->do_timestamp = FALSE;
1456 com->do_dcd_timestamp = FALSE;
1457 com->pps.ppsparam.mode = 0;
1458 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1461 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1462 defined(ALT_BREAK_TO_DEBUGGER))
1464 * Leave interrupts enabled and don't clear DTR if this is the
1465 * console. This allows us to detect break-to-debugger events
1466 * while the console device is closed.
1468 if (com->unit != comconsole)
1471 sio_setreg(com, com_ier, 0);
1472 if (tp->t_cflag & HUPCL
1474 * XXX we will miss any carrier drop between here and the
1475 * next open. Perhaps we should watch DCD even when the
1476 * port is closed; it is not sufficient to check it at
1477 * the next open because it might go up and down while
1478 * we're not watching.
1480 || (!com->active_out
1481 && !(com->prev_modem_status & MSR_DCD)
1482 && !(com->it_in.c_cflag & CLOCAL))
1483 || !(tp->t_state & TS_ISOPEN)) {
1484 (void)commctl(com, TIOCM_DTR, DMBIC);
1485 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
1486 timeout(siodtrwakeup, com, com->dtr_wait);
1487 com->state |= CS_DTR_OFF;
1493 * Disable fifos so that they are off after controlled
1494 * reboots. Some BIOSes fail to detect 16550s when the
1495 * fifos are enabled.
1497 sio_setreg(com, com_fifo, 0);
1499 com->active_out = FALSE;
1500 wakeup(&com->active_out);
1501 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */
1506 sioread(dev, uio, flag)
1515 if (mynor & CONTROL_MASK)
1517 com = com_addr(MINOR_TO_UNIT(mynor));
1518 if (com == NULL || com->gone)
1520 return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag));
1524 siowrite(dev, uio, flag)
1534 if (mynor & CONTROL_MASK)
1537 unit = MINOR_TO_UNIT(mynor);
1538 com = com_addr(unit);
1539 if (com == NULL || com->gone)
1542 * (XXX) We disallow virtual consoles if the physical console is
1543 * a serial port. This is in case there is a display attached that
1544 * is not the console. In that situation we don't need/want the X
1545 * server taking over the console.
1547 if (constty != NULL && unit == comconsole)
1549 return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag));
1559 com = (struct com_s *)chan;
1562 * Clear TS_BUSY if low-level output is complete.
1563 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1564 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1565 * called again. Reading the line status port outside of siointr1()
1566 * is safe because CS_BUSY is clear so there are no output interrupts
1570 if (com->state & CS_BUSY)
1571 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */
1572 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1573 == (LSR_TSRE | LSR_TXRDY)) {
1574 com->tp->t_state &= ~TS_BUSY;
1576 com->extra_state &= ~CSE_BUSYCHECK;
1578 timeout(siobusycheck, com, hz / 100);
1583 siodivisor(rclk, speed)
1591 if (speed == 0 || speed > (ULONG_MAX - 1) / 8)
1593 divisor = (rclk / (8UL * speed) + 1) / 2;
1594 if (divisor == 0 || divisor >= 65536)
1596 actual_speed = rclk / (16UL * divisor);
1598 /* 10 times error in percent: */
1599 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2;
1601 /* 3.0% maximum error tolerance: */
1602 if (error < -30 || error > 30)
1614 com = (struct com_s *)chan;
1615 com->state &= ~CS_DTR_OFF;
1616 wakeup(&com->dtr_wait);
1631 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1632 com_events -= (com->iptr - com->ibuf);
1633 com->iptr = com->ibuf;
1636 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1638 * Avoid the grotesquely inefficient lineswitch routine
1639 * (ttyinput) in "raw" mode. It usually takes about 450
1640 * instructions (that's without canonical processing or echo!).
1641 * slinput is reasonably fast (usually 40 instructions plus
1646 incc = com->iptr - buf;
1647 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1648 && (com->state & CS_RTS_IFLOW
1649 || tp->t_iflag & IXOFF)
1650 && !(tp->t_state & TS_TBLOCK))
1652 com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1653 += b_to_q((char *)buf, incc, &tp->t_rawq);
1657 tp->t_rawcc += incc;
1659 if (tp->t_state & TS_TTSTOP
1660 && (tp->t_iflag & IXANY
1661 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1662 tp->t_state &= ~TS_TTSTOP;
1663 tp->t_lflag &= ~FLUSHO;
1667 } while (buf < com->iptr);
1671 line_status = buf[com->ierroff];
1674 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1675 if (line_status & LSR_BI)
1676 recv_data |= TTY_BI;
1677 if (line_status & LSR_FE)
1678 recv_data |= TTY_FE;
1679 if (line_status & LSR_OE)
1680 recv_data |= TTY_OE;
1681 if (line_status & LSR_PE)
1682 recv_data |= TTY_PE;
1684 (*linesw[tp->t_line].l_rint)(recv_data, tp);
1686 } while (buf < com->iptr);
1688 com_events -= (com->iptr - com->ibuf);
1689 com->iptr = com->ibuf;
1692 * There is now room for another low-level buffer full of input,
1693 * so enable RTS if it is now disabled and there is room in the
1694 * high-level buffer.
1696 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1697 !(tp->t_state & TS_TBLOCK))
1698 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1705 #ifndef COM_MULTIPORT
1707 siointr1((struct com_s *) arg);
1709 #else /* COM_MULTIPORT */
1710 bool_t possibly_more_intrs;
1715 * Loop until there is no activity on any port. This is necessary
1716 * to get an interrupt edge more than to avoid another interrupt.
1717 * If the IRQ signal is just an OR of the IRQ signals from several
1718 * devices, then the edge from one may be lost because another is
1723 possibly_more_intrs = FALSE;
1724 for (unit = 0; unit < sio_numunits; ++unit) {
1725 com = com_addr(unit);
1728 * would it work here, or be counter-productive?
1732 && (inb(com->int_id_port) & IIR_IMASK)
1735 possibly_more_intrs = TRUE;
1737 /* XXX com_unlock(); */
1739 } while (possibly_more_intrs);
1741 #endif /* COM_MULTIPORT */
1749 u_char modem_status;
1756 int_ctl = inb(com->intr_ctl_port);
1757 int_ctl_new = int_ctl;
1759 while (!com->gone) {
1760 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1761 modem_status = inb(com->modem_status_port);
1762 if ((modem_status ^ com->last_modem_status) & MSR_DCD) {
1763 count = cputimer_count();
1764 pps_event(&com->pps, count,
1765 (modem_status & MSR_DCD) ?
1766 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1769 line_status = inb(com->line_status_port);
1771 /* input event? (check first to help avoid overruns) */
1772 while (line_status & LSR_RCV_MASK) {
1773 /* break/unnattached error bits or real input? */
1774 if (!(line_status & LSR_RXRDY))
1777 recv_data = inb(com->data_port);
1778 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER)
1780 * Solaris implements a new BREAK which is initiated
1781 * by a character sequence CR ~ ^b which is similar
1782 * to a familiar pattern used on Sun servers by the
1785 #define KEY_CRTLB 2 /* ^B */
1786 #define KEY_CR 13 /* CR '\r' */
1787 #define KEY_TILDE 126 /* ~ */
1789 if (com->unit == comconsole) {
1790 static int brk_state1 = 0, brk_state2 = 0;
1791 if (recv_data == KEY_CR) {
1792 brk_state1 = recv_data;
1794 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) {
1795 if (recv_data == KEY_TILDE)
1796 brk_state2 = recv_data;
1797 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) {
1799 brk_state1 = brk_state2 = 0;
1807 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1809 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1810 * Otherwise, push the work to a higher level
1811 * (to handle PARMRK) if we're bypassing.
1812 * Otherwise, convert BI/FE and PE+INPCK to 0.
1814 * This makes bypassing work right in the
1815 * usual "raw" case (IGNBRK set, and IGNPAR
1818 * Note: BI together with FE/PE means just BI.
1820 if (line_status & LSR_BI) {
1821 #if defined(DDB) && defined(BREAK_TO_DEBUGGER)
1822 if (com->unit == comconsole) {
1828 || com->tp->t_iflag & IGNBRK)
1832 || com->tp->t_iflag & IGNPAR)
1835 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1836 && (line_status & (LSR_BI | LSR_FE)
1837 || com->tp->t_iflag & INPCK))
1841 if (com->hotchar != 0 && recv_data == com->hotchar)
1844 if (ioptr >= com->ibufend)
1845 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1847 if (com->do_timestamp)
1848 microtime(&com->timestamp);
1851 #if 0 /* for testing input latency vs efficiency */
1852 if (com->iptr - com->ibuf == 8)
1855 ioptr[0] = recv_data;
1856 ioptr[com->ierroff] = line_status;
1857 com->iptr = ++ioptr;
1858 if (ioptr == com->ihighwater
1859 && com->state & CS_RTS_IFLOW)
1860 outb(com->modem_ctl_port,
1861 com->mcr_image &= ~MCR_RTS);
1862 if (line_status & LSR_OE)
1863 CE_RECORD(com, CE_OVERRUN);
1867 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1868 * jump from the top of the loop to here
1870 line_status = inb(com->line_status_port) & 0x7F;
1873 /* modem status change? (always check before doing output) */
1874 modem_status = inb(com->modem_status_port);
1875 if (modem_status != com->last_modem_status) {
1876 if (com->do_dcd_timestamp
1877 && !(com->last_modem_status & MSR_DCD)
1878 && modem_status & MSR_DCD)
1879 microtime(&com->dcd_timestamp);
1882 * Schedule high level to handle DCD changes. Note
1883 * that we don't use the delta bits anywhere. Some
1884 * UARTs mess them up, and it's easy to remember the
1885 * previous bits and calculate the delta.
1887 com->last_modem_status = modem_status;
1888 if (!(com->state & CS_CHECKMSR)) {
1889 com_events += LOTS_OF_EVENTS;
1890 com->state |= CS_CHECKMSR;
1894 /* handle CTS change immediately for crisp flow ctl */
1895 if (com->state & CS_CTS_OFLOW) {
1896 if (modem_status & MSR_CTS)
1897 com->state |= CS_ODEVREADY;
1899 com->state &= ~CS_ODEVREADY;
1903 /* output queued and everything ready? */
1904 if (line_status & LSR_TXRDY
1905 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1906 ioptr = com->obufq.l_head;
1907 if (com->tx_fifo_size > 1) {
1910 ocount = com->obufq.l_tail - ioptr;
1911 if (ocount > com->tx_fifo_size)
1912 ocount = com->tx_fifo_size;
1913 com->bytes_out += ocount;
1915 outb(com->data_port, *ioptr++);
1916 while (--ocount != 0);
1918 outb(com->data_port, *ioptr++);
1921 com->obufq.l_head = ioptr;
1922 if (COM_IIR_TXRDYBUG(com->flags)) {
1923 int_ctl_new = int_ctl | IER_ETXRDY;
1925 if (ioptr >= com->obufq.l_tail) {
1928 qp = com->obufq.l_next;
1929 qp->l_queued = FALSE;
1932 com->obufq.l_head = qp->l_head;
1933 com->obufq.l_tail = qp->l_tail;
1934 com->obufq.l_next = qp;
1936 /* output just completed */
1937 if (COM_IIR_TXRDYBUG(com->flags)) {
1938 int_ctl_new = int_ctl & ~IER_ETXRDY;
1940 com->state &= ~CS_BUSY;
1942 if (!(com->state & CS_ODONE)) {
1943 com_events += LOTS_OF_EVENTS;
1944 com->state |= CS_ODONE;
1945 setsofttty(); /* handle at high level ASAP */
1948 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) {
1949 outb(com->intr_ctl_port, int_ctl_new);
1954 #ifndef COM_MULTIPORT
1955 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
1956 #endif /* COM_MULTIPORT */
1962 sioioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td)
1969 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1971 struct termios term;
1975 com = com_addr(MINOR_TO_UNIT(mynor));
1976 if (com == NULL || com->gone)
1978 if (mynor & CONTROL_MASK) {
1981 switch (mynor & CONTROL_MASK) {
1982 case CONTROL_INIT_STATE:
1983 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
1985 case CONTROL_LOCK_STATE:
1986 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
1989 return (ENODEV); /* /dev/nodev */
1996 *ct = *(struct termios *)data;
1999 *(struct termios *)data = *ct;
2002 *(int *)data = TTYDISC;
2005 bzero(data, sizeof(struct winsize));
2012 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
2013 term = tp->t_termios;
2015 error = ttsetcompat(tp, &cmd, data, &term);
2019 data = (caddr_t)&term;
2021 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
2023 struct termios *dt = (struct termios *)data;
2024 struct termios *lt = mynor & CALLOUT_MASK
2025 ? &com->lt_out : &com->lt_in;
2027 dt->c_iflag = (tp->t_iflag & lt->c_iflag)
2028 | (dt->c_iflag & ~lt->c_iflag);
2029 dt->c_oflag = (tp->t_oflag & lt->c_oflag)
2030 | (dt->c_oflag & ~lt->c_oflag);
2031 dt->c_cflag = (tp->t_cflag & lt->c_cflag)
2032 | (dt->c_cflag & ~lt->c_cflag);
2033 dt->c_lflag = (tp->t_lflag & lt->c_lflag)
2034 | (dt->c_lflag & ~lt->c_lflag);
2035 for (cc = 0; cc < NCCS; ++cc)
2036 if (lt->c_cc[cc] != 0)
2037 dt->c_cc[cc] = tp->t_cc[cc];
2038 if (lt->c_ispeed != 0)
2039 dt->c_ispeed = tp->t_ispeed;
2040 if (lt->c_ospeed != 0)
2041 dt->c_ospeed = tp->t_ospeed;
2043 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td);
2044 if (error != ENOIOCTL)
2047 error = ttioctl(tp, cmd, data, flag);
2048 disc_optim(tp, &tp->t_termios, com);
2049 if (error != ENOIOCTL) {
2055 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
2058 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
2061 (void)commctl(com, TIOCM_DTR, DMBIS);
2064 (void)commctl(com, TIOCM_DTR, DMBIC);
2067 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The
2068 * changes get undone on the next call to comparam().
2071 (void)commctl(com, *(int *)data, DMSET);
2074 (void)commctl(com, *(int *)data, DMBIS);
2077 (void)commctl(com, *(int *)data, DMBIC);
2080 *(int *)data = commctl(com, 0, DMGET);
2083 /* must be root since the wait applies to following logins */
2089 com->dtr_wait = *(int *)data * hz / 100;
2092 *(int *)data = com->dtr_wait * 100 / hz;
2095 com->do_timestamp = TRUE;
2096 *(struct timeval *)data = com->timestamp;
2098 case TIOCDCDTIMESTAMP:
2099 com->do_dcd_timestamp = TRUE;
2100 *(struct timeval *)data = com->dcd_timestamp;
2104 error = pps_ioctl(cmd, data, &com->pps);
2105 if (error == ENODEV)
2114 siopoll(void *dummy)
2118 if (com_events == 0)
2121 for (unit = 0; unit < sio_numunits; ++unit) {
2126 com = com_addr(unit);
2130 if (tp == NULL || com->gone) {
2132 * Discard any events related to never-opened or
2133 * going-away devices.
2136 incc = com->iptr - com->ibuf;
2137 com->iptr = com->ibuf;
2138 if (com->state & CS_CHECKMSR) {
2139 incc += LOTS_OF_EVENTS;
2140 com->state &= ~CS_CHECKMSR;
2146 if (com->iptr != com->ibuf) {
2151 if (com->state & CS_CHECKMSR) {
2152 u_char delta_modem_status;
2155 delta_modem_status = com->last_modem_status
2156 ^ com->prev_modem_status;
2157 com->prev_modem_status = com->last_modem_status;
2158 com_events -= LOTS_OF_EVENTS;
2159 com->state &= ~CS_CHECKMSR;
2161 if (delta_modem_status & MSR_DCD)
2162 (*linesw[tp->t_line].l_modem)
2163 (tp, com->prev_modem_status & MSR_DCD);
2165 if (com->state & CS_ODONE) {
2167 com_events -= LOTS_OF_EVENTS;
2168 com->state &= ~CS_ODONE;
2170 if (!(com->state & CS_BUSY)
2171 && !(com->extra_state & CSE_BUSYCHECK)) {
2172 timeout(siobusycheck, com, hz / 100);
2173 com->extra_state |= CSE_BUSYCHECK;
2175 (*linesw[tp->t_line].l_start)(tp);
2177 if (com_events == 0)
2180 if (com_events >= LOTS_OF_EVENTS)
2198 unit = DEV_TO_UNIT(tp->t_dev);
2199 com = com_addr(unit);
2203 /* do historical conversions */
2204 if (t->c_ispeed == 0)
2205 t->c_ispeed = t->c_ospeed;
2207 /* check requested parameters */
2208 if (t->c_ospeed == 0)
2211 if (t->c_ispeed != t->c_ospeed)
2213 divisor = siodivisor(com->rclk, t->c_ispeed);
2218 /* parameters are OK, convert them to the com struct and the device */
2221 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */
2223 (void)commctl(com, TIOCM_DTR, DMBIS);
2225 switch (cflag & CSIZE) {
2239 if (cflag & PARENB) {
2241 if (!(cflag & PARODD))
2247 if (com->hasfifo && divisor != 0) {
2249 * Use a fifo trigger level low enough so that the input
2250 * latency from the fifo is less than about 16 msec and
2251 * the total latency is less than about 30 msec. These
2252 * latencies are reasonable for humans. Serial comms
2253 * protocols shouldn't expect anything better since modem
2254 * latencies are larger.
2256 * Interrupts can be held up for long periods of time
2257 * due to inefficiencies in other parts of the kernel,
2258 * certain video cards, etc. Setting the FIFO trigger
2259 * point to MEDH instead of HIGH gives us 694uS of slop
2260 * (8 character times) instead of 173uS (2 character times)
2263 com->fifo_image = t->c_ospeed <= 4800
2264 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH;
2267 * The Hayes ESP card needs the fifo DMA mode bit set
2268 * in compatibility mode. If not, it will interrupt
2269 * for each character received.
2272 com->fifo_image |= FIFO_DMA_MODE;
2274 sio_setreg(com, com_fifo, com->fifo_image);
2278 * This returns with interrupts disabled so that we can complete
2279 * the speed change atomically. Keeping interrupts disabled is
2280 * especially important while com_data is hidden.
2282 (void) siosetwater(com, t->c_ispeed);
2285 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
2287 * Only set the divisor registers if they would change,
2288 * since on some 16550 incompatibles (UMC8669F), setting
2289 * them while input is arriving them loses sync until
2290 * data stops arriving.
2292 dlbl = divisor & 0xFF;
2293 if (sio_getreg(com, com_dlbl) != dlbl)
2294 sio_setreg(com, com_dlbl, dlbl);
2295 dlbh = divisor >> 8;
2296 if (sio_getreg(com, com_dlbh) != dlbh)
2297 sio_setreg(com, com_dlbh, dlbh);
2300 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
2302 if (!(tp->t_state & TS_TTSTOP))
2303 com->state |= CS_TTGO;
2305 if (cflag & CRTS_IFLOW) {
2306 if (com->st16650a) {
2307 sio_setreg(com, com_cfcr, 0xbf);
2308 sio_setreg(com, com_fifo,
2309 sio_getreg(com, com_fifo) | 0x40);
2311 com->state |= CS_RTS_IFLOW;
2313 * If CS_RTS_IFLOW just changed from off to on, the change
2314 * needs to be propagated to MCR_RTS. This isn't urgent,
2315 * so do it later by calling comstart() instead of repeating
2316 * a lot of code from comstart() here.
2318 } else if (com->state & CS_RTS_IFLOW) {
2319 com->state &= ~CS_RTS_IFLOW;
2321 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
2322 * on here, since comstart() won't do it later.
2324 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2325 if (com->st16650a) {
2326 sio_setreg(com, com_cfcr, 0xbf);
2327 sio_setreg(com, com_fifo,
2328 sio_getreg(com, com_fifo) & ~0x40);
2334 * Set up state to handle output flow control.
2335 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2336 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2338 com->state |= CS_ODEVREADY;
2339 com->state &= ~CS_CTS_OFLOW;
2340 if (cflag & CCTS_OFLOW) {
2341 com->state |= CS_CTS_OFLOW;
2342 if (!(com->last_modem_status & MSR_CTS))
2343 com->state &= ~CS_ODEVREADY;
2344 if (com->st16650a) {
2345 sio_setreg(com, com_cfcr, 0xbf);
2346 sio_setreg(com, com_fifo,
2347 sio_getreg(com, com_fifo) | 0x80);
2350 if (com->st16650a) {
2351 sio_setreg(com, com_cfcr, 0xbf);
2352 sio_setreg(com, com_fifo,
2353 sio_getreg(com, com_fifo) & ~0x80);
2357 sio_setreg(com, com_cfcr, com->cfcr_image);
2359 /* XXX shouldn't call functions while intrs are disabled. */
2360 disc_optim(tp, t, com);
2362 * Recover from fiddling with CS_TTGO. We used to call siointr1()
2363 * unconditionally, but that defeated the careful discarding of
2364 * stale input in sioopen().
2366 if (com->state >= (CS_BUSY | CS_TTGO))
2372 if (com->ibufold != NULL) {
2373 free(com->ibufold, M_DEVBUF);
2374 com->ibufold = NULL;
2380 siosetwater(com, speed)
2390 * Make the buffer size large enough to handle a softtty interrupt
2391 * latency of about 2 ticks without loss of throughput or data
2392 * (about 3 ticks if input flow control is not used or not honoured,
2393 * but a bit less for CS5-CS7 modes).
2395 cp4ticks = speed / 10 / hz * 4;
2396 for (ibufsize = 128; ibufsize < cp4ticks;)
2398 if (ibufsize == com->ibufsize) {
2404 * Allocate input buffer. The extra factor of 2 in the size is
2405 * to allow for an error byte for each input byte.
2407 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
2413 /* Initialize non-critical variables. */
2414 com->ibufold = com->ibuf;
2415 com->ibufsize = ibufsize;
2418 tp->t_ififosize = 2 * ibufsize;
2419 tp->t_ispeedwat = (speed_t)-1;
2420 tp->t_ospeedwat = (speed_t)-1;
2424 * Read current input buffer, if any. Continue with interrupts
2428 if (com->iptr != com->ibuf)
2432 * Initialize critical variables, including input buffer watermarks.
2433 * The external device is asked to stop sending when the buffer
2434 * exactly reaches high water, or when the high level requests it.
2435 * The high level is notified immediately (rather than at a later
2436 * clock tick) when this watermark is reached.
2437 * The buffer size is chosen so the watermark should almost never
2439 * The low watermark is invisibly 0 since the buffer is always
2440 * emptied all at once.
2442 com->iptr = com->ibuf = ibuf;
2443 com->ibufend = ibuf + ibufsize;
2444 com->ierroff = ibufsize;
2445 com->ihighwater = ibuf + 3 * ibufsize / 4;
2457 unit = DEV_TO_UNIT(tp->t_dev);
2458 com = com_addr(unit);
2463 if (tp->t_state & TS_TTSTOP)
2464 com->state &= ~CS_TTGO;
2466 com->state |= CS_TTGO;
2467 if (tp->t_state & TS_TBLOCK) {
2468 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2469 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2471 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2472 && com->state & CS_RTS_IFLOW)
2473 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2476 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2481 if (tp->t_outq.c_cc != 0) {
2485 if (!com->obufs[0].l_queued) {
2486 com->obufs[0].l_tail
2487 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2489 com->obufs[0].l_next = NULL;
2490 com->obufs[0].l_queued = TRUE;
2492 if (com->state & CS_BUSY) {
2493 qp = com->obufq.l_next;
2494 while ((next = qp->l_next) != NULL)
2496 qp->l_next = &com->obufs[0];
2498 com->obufq.l_head = com->obufs[0].l_head;
2499 com->obufq.l_tail = com->obufs[0].l_tail;
2500 com->obufq.l_next = &com->obufs[0];
2501 com->state |= CS_BUSY;
2505 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2506 com->obufs[1].l_tail
2507 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2509 com->obufs[1].l_next = NULL;
2510 com->obufs[1].l_queued = TRUE;
2512 if (com->state & CS_BUSY) {
2513 qp = com->obufq.l_next;
2514 while ((next = qp->l_next) != NULL)
2516 qp->l_next = &com->obufs[1];
2518 com->obufq.l_head = com->obufs[1].l_head;
2519 com->obufq.l_tail = com->obufs[1].l_tail;
2520 com->obufq.l_next = &com->obufs[1];
2521 com->state |= CS_BUSY;
2525 tp->t_state |= TS_BUSY;
2528 if (com->state >= (CS_BUSY | CS_TTGO))
2529 siointr1(com); /* fake interrupt to start output */
2542 com = com_addr(DEV_TO_UNIT(tp->t_dev));
2543 if (com == NULL || com->gone)
2549 /* XXX avoid h/w bug. */
2552 sio_setreg(com, com_fifo,
2553 FIFO_XMT_RST | com->fifo_image);
2554 com->obufs[0].l_queued = FALSE;
2555 com->obufs[1].l_queued = FALSE;
2556 if (com->state & CS_ODONE)
2557 com_events -= LOTS_OF_EVENTS;
2558 com->state &= ~(CS_ODONE | CS_BUSY);
2559 com->tp->t_state &= ~TS_BUSY;
2564 /* XXX avoid h/w bug. */
2567 sio_setreg(com, com_fifo,
2568 FIFO_RCV_RST | com->fifo_image);
2569 com_events -= (com->iptr - com->ibuf);
2570 com->iptr = com->ibuf;
2577 commctl(com, bits, how)
2586 bits = TIOCM_LE; /* XXX - always enabled while open */
2587 mcr = com->mcr_image;
2592 msr = com->prev_modem_status;
2600 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI
2601 * more volatile by reading the modem status a lot. Perhaps
2602 * we should latch both bits until the status is read here.
2604 if (msr & (MSR_RI | MSR_TERI))
2609 if (bits & TIOCM_DTR)
2611 if (bits & TIOCM_RTS)
2618 outb(com->modem_ctl_port,
2619 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE));
2622 outb(com->modem_ctl_port, com->mcr_image |= mcr);
2625 outb(com->modem_ctl_port, com->mcr_image &= ~mcr);
2640 * Set our timeout period to 1 second if no polled devices are open.
2641 * Otherwise set it to max(1/200, 1/hz).
2642 * Enable timeouts iff some device is open.
2644 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2647 for (unit = 0; unit < sio_numunits; ++unit) {
2648 com = com_addr(unit);
2649 if (com != NULL && com->tp != NULL
2650 && com->tp->t_state & TS_ISOPEN && !com->gone) {
2652 if (com->poll || com->poll_output) {
2653 sio_timeout = hz > 200 ? hz / 200 : 1;
2659 sio_timeouts_until_log = hz / sio_timeout;
2660 sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2663 /* Flush error messages, if any. */
2664 sio_timeouts_until_log = 1;
2665 comwakeup((void *)NULL);
2666 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2677 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2680 * Recover from lost output interrupts.
2681 * Poll any lines that don't use interrupts.
2683 for (unit = 0; unit < sio_numunits; ++unit) {
2684 com = com_addr(unit);
2685 if (com != NULL && !com->gone
2686 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2694 * Check for and log errors, but not too often.
2696 if (--sio_timeouts_until_log > 0)
2698 sio_timeouts_until_log = hz / sio_timeout;
2699 for (unit = 0; unit < sio_numunits; ++unit) {
2702 com = com_addr(unit);
2707 for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2712 delta = com->delta_error_counts[errnum];
2713 com->delta_error_counts[errnum] = 0;
2717 total = com->error_counts[errnum] += delta;
2718 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2719 unit, delta, error_desc[errnum],
2720 delta == 1 ? "" : "s", total);
2726 disc_optim(tp, t, com)
2731 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON))
2732 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK))
2733 && (!(t->c_iflag & PARMRK)
2734 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
2735 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN))
2736 && linesw[tp->t_line].l_rint == ttyinput)
2737 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2739 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2740 com->hotchar = linesw[tp->t_line].l_hotchar;
2744 * Following are all routines needed for SIO to act as console
2746 #include <sys/cons.h>
2756 static speed_t siocngetspeed (Port_t, u_long rclk);
2757 static void siocnclose (struct siocnstate *sp, Port_t iobase);
2758 static void siocnopen (struct siocnstate *sp, Port_t iobase, int speed);
2759 static void siocntxwait (Port_t iobase);
2761 static cn_probe_t siocnprobe;
2762 static cn_init_t siocninit;
2763 static cn_checkc_t siocncheckc;
2764 static cn_getc_t siocngetc;
2765 static cn_putc_t siocnputc;
2768 CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc,
2772 /* To get the GDB related variables */
2774 #include <ddb/ddb.h>
2784 * Wait for any pending transmission to finish. Required to avoid
2785 * the UART lockup bug when the speed is changed, and for normal
2789 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2790 != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2795 * Read the serial port specified and try to figure out what speed
2796 * it's currently running at. We're assuming the serial port has
2797 * been initialized and is basicly idle. This routine is only intended
2798 * to be run at system startup.
2800 * If the value read from the serial port doesn't make sense, return 0.
2804 siocngetspeed(iobase, rclk)
2813 cfcr = inb(iobase + com_cfcr);
2814 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2816 dlbl = inb(iobase + com_dlbl);
2817 dlbh = inb(iobase + com_dlbh);
2819 outb(iobase + com_cfcr, cfcr);
2821 divisor = dlbh << 8 | dlbl;
2823 /* XXX there should be more sanity checking. */
2826 return (rclk / (16UL * divisor));
2830 siocnopen(sp, iobase, speed)
2831 struct siocnstate *sp;
2840 * Save all the device control registers except the fifo register
2841 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2842 * We can't save the fifo register since it is read-only.
2844 sp->ier = inb(iobase + com_ier);
2845 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */
2846 siocntxwait(iobase);
2847 sp->cfcr = inb(iobase + com_cfcr);
2848 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2849 sp->dlbl = inb(iobase + com_dlbl);
2850 sp->dlbh = inb(iobase + com_dlbh);
2852 * Only set the divisor registers if they would change, since on
2853 * some 16550 incompatibles (Startech), setting them clears the
2854 * data input register. This also reduces the effects of the
2857 divisor = siodivisor(comdefaultrclk, speed);
2858 dlbl = divisor & 0xFF;
2859 if (sp->dlbl != dlbl)
2860 outb(iobase + com_dlbl, dlbl);
2861 dlbh = divisor >> 8;
2862 if (sp->dlbh != dlbh)
2863 outb(iobase + com_dlbh, dlbh);
2864 outb(iobase + com_cfcr, CFCR_8BITS);
2865 sp->mcr = inb(iobase + com_mcr);
2867 * We don't want interrupts, but must be careful not to "disable"
2868 * them by clearing the MCR_IENABLE bit, since that might cause
2869 * an interrupt by floating the IRQ line.
2871 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
2875 siocnclose(sp, iobase)
2876 struct siocnstate *sp;
2880 * Restore the device control registers.
2882 siocntxwait(iobase);
2883 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2884 if (sp->dlbl != inb(iobase + com_dlbl))
2885 outb(iobase + com_dlbl, sp->dlbl);
2886 if (sp->dlbh != inb(iobase + com_dlbh))
2887 outb(iobase + com_dlbh, sp->dlbh);
2888 outb(iobase + com_cfcr, sp->cfcr);
2890 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2892 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
2893 outb(iobase + com_ier, sp->ier);
2904 struct siocnstate sp;
2907 * Find our first enabled console, if any. If it is a high-level
2908 * console device, then initialize it and return successfully.
2909 * If it is a low-level console device, then initialize it and
2910 * return unsuccessfully. It must be initialized in both cases
2911 * for early use by console drivers and debuggers. Initializing
2912 * the hardware is not necessary in all cases, since the i/o
2913 * routines initialize it on the fly, but it is necessary if
2914 * input might arrive while the hardware is switched back to an
2915 * uninitialized state. We can't handle multiple console devices
2916 * yet because our low-level routines don't take a device arg.
2917 * We trust the user to set the console flags properly so that we
2918 * don't need to probe.
2920 cp->cn_pri = CN_DEAD;
2922 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
2925 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) {
2929 if (resource_int_value("sio", unit, "flags", &flags))
2931 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
2935 if (resource_int_value("sio", unit, "port", &port))
2939 if (boothowto & RB_SERIAL) {
2941 siocngetspeed(iobase, comdefaultrclk);
2943 comdefaultrate = boot_speed;
2947 * Initialize the divisor latch. We can't rely on
2948 * siocnopen() to do this the first time, since it
2949 * avoids writing to the latch if the latch appears
2950 * to have the correct value. Also, if we didn't
2951 * just read the speed from the hardware, then we
2952 * need to set the speed in hardware so that
2953 * switching it later is null.
2955 cfcr = inb(iobase + com_cfcr);
2956 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2957 divisor = siodivisor(comdefaultrclk, comdefaultrate);
2958 outb(iobase + com_dlbl, divisor & 0xff);
2959 outb(iobase + com_dlbh, divisor >> 8);
2960 outb(iobase + com_cfcr, cfcr);
2962 siocnopen(&sp, iobase, comdefaultrate);
2965 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
2966 cp->cn_dev = makedev(CDEV_MAJOR, unit);
2967 cp->cn_pri = COM_FORCECONSOLE(flags)
2968 || boothowto & RB_SERIAL
2969 ? CN_REMOTE : CN_NORMAL;
2970 siocniobase = iobase;
2973 if (COM_DEBUGGER(flags)) {
2974 printf("sio%d: gdb debugging port\n", unit);
2975 siogdbiobase = iobase;
2978 gdbdev = makedev(CDEV_MAJOR, unit);
2979 gdb_getc = siocngetc;
2980 gdb_putc = siocnputc;
2988 * XXX Ugly Compatability.
2989 * If no gdb port has been specified, set it to be the console
2990 * as some configuration files don't specify the gdb port.
2992 if (gdbdev == NODEV && (boothowto & RB_GDB)) {
2993 printf("Warning: no GDB port specified. Defaulting to sio%d.\n",
2995 printf("Set flag 0x80 on desired GDB port in your\n");
2996 printf("configuration file (currently sio only).\n");
2997 siogdbiobase = siocniobase;
2998 siogdbunit = siocnunit;
2999 gdbdev = makedev(CDEV_MAJOR, siocnunit);
3000 gdb_getc = siocngetc;
3001 gdb_putc = siocnputc;
3009 CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL);
3012 siocnattach(port, speed)
3019 struct siocnstate sp;
3022 comdefaultrate = speed;
3023 sio_consdev.cn_pri = CN_NORMAL;
3024 sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0);
3029 * Initialize the divisor latch. We can't rely on
3030 * siocnopen() to do this the first time, since it
3031 * avoids writing to the latch if the latch appears
3032 * to have the correct value. Also, if we didn't
3033 * just read the speed from the hardware, then we
3034 * need to set the speed in hardware so that
3035 * switching it later is null.
3037 cfcr = inb(siocniobase + com_cfcr);
3038 outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr);
3039 divisor = siodivisor(comdefaultrclk, comdefaultrate);
3040 outb(siocniobase + com_dlbl, divisor & 0xff);
3041 outb(siocniobase + com_dlbh, divisor >> 8);
3042 outb(siocniobase + com_cfcr, cfcr);
3044 siocnopen(&sp, siocniobase, comdefaultrate);
3047 cn_tab = &sio_consdev;
3052 siogdbattach(port, speed)
3059 struct siocnstate sp;
3061 siogdbiobase = port;
3062 gdbdefaultrate = speed;
3067 * Initialize the divisor latch. We can't rely on
3068 * siocnopen() to do this the first time, since it
3069 * avoids writing to the latch if the latch appears
3070 * to have the correct value. Also, if we didn't
3071 * just read the speed from the hardware, then we
3072 * need to set the speed in hardware so that
3073 * switching it later is null.
3075 cfcr = inb(siogdbiobase + com_cfcr);
3076 outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr);
3077 divisor = siodivisor(comdefaultrclk, gdbdefaultrate);
3078 outb(siogdbiobase + com_dlbl, divisor & 0xff);
3079 outb(siogdbiobase + com_dlbh, divisor >> 8);
3080 outb(siogdbiobase + com_cfcr, cfcr);
3082 siocnopen(&sp, siogdbiobase, gdbdefaultrate);
3094 comconsole = DEV_TO_UNIT(cp->cn_dev);
3104 struct siocnstate sp;
3106 if (minor(dev) == siogdbunit)
3107 iobase = siogdbiobase;
3109 iobase = siocniobase;
3111 siocnopen(&sp, iobase, comdefaultrate);
3112 if (inb(iobase + com_lsr) & LSR_RXRDY)
3113 c = inb(iobase + com_data);
3116 siocnclose(&sp, iobase);
3129 struct siocnstate sp;
3131 if (minor(dev) == siogdbunit)
3132 iobase = siogdbiobase;
3134 iobase = siocniobase;
3136 siocnopen(&sp, iobase, comdefaultrate);
3137 while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3139 c = inb(iobase + com_data);
3140 siocnclose(&sp, iobase);
3151 struct siocnstate sp;
3154 if (minor(dev) == siogdbunit)
3155 iobase = siogdbiobase;
3157 iobase = siocniobase;
3159 siocnopen(&sp, iobase, comdefaultrate);
3160 siocntxwait(iobase);
3161 outb(iobase + com_data, c);
3162 siocnclose(&sp, iobase);
3173 struct siocnstate sp;
3175 iobase = siogdbiobase;
3177 siocnopen(&sp, iobase, gdbdefaultrate);
3178 while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3180 c = inb(iobase + com_data);
3181 siocnclose(&sp, iobase);
3191 struct siocnstate sp;
3194 siocnopen(&sp, siogdbiobase, gdbdefaultrate);
3195 siocntxwait(siogdbiobase);
3196 outb(siogdbiobase + com_data, c);
3197 siocnclose(&sp, siogdbiobase);
3202 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0);
3204 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0);
3207 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0);