1 /* $FreeBSD: src/sys/dev/asr/asr.c,v 1.3.2.2 2001/08/23 05:21:29 scottl Exp $ */
2 /* $DragonFly: src/sys/dev/raid/asr/asr.c,v 1.11 2003/11/20 22:07:33 dillon Exp $ */
4 * Copyright (c) 1996-2000 Distributed Processing Technology Corporation
5 * Copyright (c) 2000-2001 Adaptec Corporation
8 * TERMS AND CONDITIONS OF USE
10 * Redistribution and use in source form, with or without modification, are
11 * permitted provided that redistributions of source code must retain the
12 * above copyright notice, this list of conditions and the following disclaimer.
14 * This software is provided `as is' by Adaptec and any express or implied
15 * warranties, including, but not limited to, the implied warranties of
16 * merchantability and fitness for a particular purpose, are disclaimed. In no
17 * event shall Adaptec be liable for any direct, indirect, incidental, special,
18 * exemplary or consequential damages (including, but not limited to,
19 * procurement of substitute goods or services; loss of use, data, or profits;
20 * or business interruptions) however caused and on any theory of liability,
21 * whether in contract, strict liability, or tort (including negligence or
22 * otherwise) arising in any way out of the use of this driver software, even
23 * if advised of the possibility of such damage.
25 * SCSI I2O host adapter driver
27 * V1.08 2001/08/21 Mark_Salyzyn@adaptec.com
28 * - The 2000S and 2005S do not initialize on some machines,
29 * increased timeout to 255ms from 50ms for the StatusGet
31 * V1.07 2001/05/22 Mark_Salyzyn@adaptec.com
32 * - I knew this one was too good to be true. The error return
33 * on ioctl commands needs to be compared to CAM_REQ_CMP, not
34 * to the bit masked status.
35 * V1.06 2001/05/08 Mark_Salyzyn@adaptec.com
36 * - The 2005S that was supported is affectionately called the
37 * Conjoined BAR Firmware. In order to support RAID-5 in a
38 * 16MB low-cost configuration, Firmware was forced to go
39 * to a Split BAR Firmware. This requires a separate IOP and
40 * Messaging base address.
41 * V1.05 2001/04/25 Mark_Salyzyn@adaptec.com
42 * - Handle support for 2005S Zero Channel RAID solution.
43 * - System locked up if the Adapter locked up. Do not try
44 * to send other commands if the resetIOP command fails. The
45 * fail outstanding command discovery loop was flawed as the
46 * removal of the command from the list prevented discovering
48 * - Comment changes to clarify driver.
49 * - SysInfo searched for an EATA SmartROM, not an I2O SmartROM.
50 * - We do not use the AC_FOUND_DEV event because of I2O.
52 * V1.04 2000/09/22 Mark_Salyzyn@adaptec.com, msmith@freebsd.org,
53 * lampa@fee.vutbr.cz and Scott_Long@adaptec.com.
54 * - Removed support for PM1554, PM2554 and PM2654 in Mode-0
55 * mode as this is confused with competitor adapters in run
57 * - critical locking needed in ASR_ccbAdd and ASR_ccbRemove
58 * to prevent operating system panic.
59 * - moved default major number to 154 from 97.
60 * V1.03 2000/07/12 Mark_Salyzyn@adaptec.com
61 * - The controller is not actually an ASR (Adaptec SCSI RAID)
62 * series that is visible, it's more of an internal code name.
63 * remove any visible references within reason for now.
64 * - bus_ptr->LUN was not correctly zeroed when initially
65 * allocated causing a possible panic of the operating system
67 * V1.02 2000/06/26 Mark_Salyzyn@adaptec.com
68 * - Code always fails for ASR_getTid affecting performance.
69 * - initiated a set of changes that resulted from a formal
70 * code inspection by Mark_Salyzyn@adaptec.com,
71 * George_Dake@adaptec.com, Jeff_Zeak@adaptec.com,
72 * Martin_Wilson@adaptec.com and Vincent_Trandoan@adaptec.com.
73 * Their findings were focussed on the LCT & TID handler, and
74 * all resulting changes were to improve code readability,
75 * consistency or have a positive effect on performance.
76 * V1.01 2000/06/14 Mark_Salyzyn@adaptec.com
77 * - Passthrough returned an incorrect error.
78 * - Passthrough did not migrate the intrinsic scsi layer wakeup
79 * on command completion.
80 * - generate control device nodes using make_dev and delete_dev.
81 * - Performance affected by TID caching reallocing.
82 * - Made suggested changes by Justin_Gibbs@adaptec.com
83 * - use splcam instead of splbio.
84 * - use cam_imask instead of bio_imask.
85 * - use u_int8_t instead of u_char.
86 * - use u_int16_t instead of u_short.
87 * - use u_int32_t instead of u_long where appropriate.
88 * - use 64 bit context handler instead of 32 bit.
89 * - create_ccb should only allocate the worst case
90 * requirements for the driver since CAM may evolve
91 * making union ccb much larger than needed here.
92 * renamed create_ccb to asr_alloc_ccb.
93 * - go nutz justifying all debug prints as macros
94 * defined at the top and remove unsightly ifdefs.
95 * - INLINE STATIC viewed as confusing. Historically
96 * utilized to affect code performance and debug
97 * issues in OS, Compiler or OEM specific situations.
98 * V1.00 2000/05/31 Mark_Salyzyn@adaptec.com
99 * - Ported from FreeBSD 2.2.X DPT I2O driver.
100 * changed struct scsi_xfer to union ccb/struct ccb_hdr
101 * changed variable name xs to ccb
102 * changed struct scsi_link to struct cam_path
103 * changed struct scsibus_data to struct cam_sim
104 * stopped using fordriver for holding on to the TID
105 * use proprietary packet creation instead of scsi_inquire
106 * CAM layer sends synchronize commands.
109 #define ASR_VERSION 1
110 #define ASR_REVISION '0'
111 #define ASR_SUBREVISION '8'
114 #define ASR_YEAR 2001 - 1980
117 * Debug macros to reduce the unsightly ifdefs
119 #if (defined(DEBUG_ASR) || defined(DEBUG_ASR_USR_CMD) || defined(DEBUG_ASR_CMD))
120 # define debug_asr_message(message) \
122 u_int32_t * pointer = (u_int32_t *)message; \
123 u_int32_t length = I2O_MESSAGE_FRAME_getMessageSize(message);\
124 u_int32_t counter = 0; \
127 printf ("%08lx%c", (u_long)*(pointer++), \
128 (((++counter & 7) == 0) || (length == 0)) \
133 #endif /* DEBUG_ASR || DEBUG_ASR_USR_CMD || DEBUG_ASR_CMD */
135 #if (defined(DEBUG_ASR))
136 /* Breaks on none STDC based compilers :-( */
137 # define debug_asr_printf(fmt,args...) printf(fmt, ##args)
138 # define debug_asr_dump_message(message) debug_asr_message(message)
139 # define debug_asr_print_path(ccb) xpt_print_path(ccb->ccb_h.path);
140 /* None fatal version of the ASSERT macro */
141 # if (defined(__STDC__))
142 # define ASSERT(phrase) if(!(phrase))printf(#phrase " at line %d file %s\n",__LINE__,__FILE__)
144 # define ASSERT(phrase) if(!(phrase))printf("phrase" " at line %d file %s\n",__LINE__,__FILE__)
146 #else /* DEBUG_ASR */
147 # define debug_asr_printf(fmt,args...)
148 # define debug_asr_dump_message(message)
149 # define debug_asr_print_path(ccb)
151 #endif /* DEBUG_ASR */
154 * If DEBUG_ASR_CMD is defined:
155 * 0 - Display incoming SCSI commands
156 * 1 - add in a quick character before queueing.
157 * 2 - add in outgoing message frames.
159 #if (defined(DEBUG_ASR_CMD))
160 # define debug_asr_cmd_printf(fmt,args...) printf(fmt,##args)
161 # define debug_asr_dump_ccb(ccb) \
163 u_int8_t * cp = (unsigned char *)&(ccb->csio.cdb_io); \
164 int len = ccb->csio.cdb_len; \
167 debug_asr_cmd_printf (" %02x", *(cp++)); \
171 # if (DEBUG_ASR_CMD > 0)
172 # define debug_asr_cmd1_printf debug_asr_cmd_printf
174 # define debug_asr_cmd1_printf(fmt,args...)
176 # if (DEBUG_ASR_CMD > 1)
177 # define debug_asr_cmd2_printf debug_asr_cmd_printf
178 # define debug_asr_cmd2_dump_message(message) debug_asr_message(message)
180 # define debug_asr_cmd2_printf(fmt,args...)
181 # define debug_asr_cmd2_dump_message(message)
183 #else /* DEBUG_ASR_CMD */
184 # define debug_asr_cmd_printf(fmt,args...)
185 # define debug_asr_cmd_dump_ccb(ccb)
186 # define debug_asr_cmd1_printf(fmt,args...)
187 # define debug_asr_cmd2_printf(fmt,args...)
188 # define debug_asr_cmd2_dump_message(message)
189 #endif /* DEBUG_ASR_CMD */
191 #if (defined(DEBUG_ASR_USR_CMD))
192 # define debug_usr_cmd_printf(fmt,args...) printf(fmt,##args)
193 # define debug_usr_cmd_dump_message(message) debug_usr_message(message)
194 #else /* DEBUG_ASR_USR_CMD */
195 # define debug_usr_cmd_printf(fmt,args...)
196 # define debug_usr_cmd_dump_message(message)
197 #endif /* DEBUG_ASR_USR_CMD */
199 #define dsDescription_size 46 /* Snug as a bug in a rug */
202 static dpt_sig_S ASR_sig = {
203 { 'd', 'P', 't', 'S', 'i', 'G'}, SIG_VERSION, PROC_INTEL,
204 PROC_386 | PROC_486 | PROC_PENTIUM | PROC_SEXIUM, FT_HBADRVR, 0,
205 OEM_DPT, OS_FREE_BSD, CAP_ABOVE16MB, DEV_ALL,
207 0, 0, ASR_VERSION, ASR_REVISION, ASR_SUBREVISION,
208 ASR_MONTH, ASR_DAY, ASR_YEAR,
209 /* 01234567890123456789012345678901234567890123456789 < 50 chars */
210 "Adaptec FreeBSD 4.0.0 Unix SCSI I2O HBA Driver"
211 /* ^^^^^ asr_attach alters these to match OS */
214 #include <sys/param.h> /* TRUE=1 and FALSE=0 defined here */
215 #include <sys/kernel.h>
216 #include <sys/systm.h>
217 #include <sys/malloc.h>
218 #include <sys/proc.h>
219 #include <sys/conf.h>
220 #include <sys/disklabel.h>
222 #include <machine/resource.h>
223 #include <machine/bus.h>
224 #include <sys/rman.h>
225 #include <sys/stat.h>
226 #include <sys/device.h>
228 #include <bus/cam/cam.h>
229 #include <bus/cam/cam_ccb.h>
230 #include <bus/cam/cam_sim.h>
231 #include <bus/cam/cam_xpt_sim.h>
232 #include <bus/cam/cam_xpt_periph.h>
234 #include <bus/cam/scsi/scsi_all.h>
235 #include <bus/cam/scsi/scsi_message.h>
239 #include <machine/cputypes.h>
240 #include <machine/clock.h>
241 #include <i386/include/vmparam.h>
243 #include <bus/pci/pcivar.h>
244 #include <bus/pci/pcireg.h>
246 #define STATIC static
249 #if (defined(DEBUG_ASR) && (DEBUG_ASR > 0))
259 #define osdSwap4(x) ((u_long)ntohl((u_long)(x)))
260 #define KVTOPHYS(x) vtophys(x)
261 #include "dptalign.h"
263 #include "i2obscsi.h"
265 #include "i2oadptr.h"
268 #include "sys_info.h"
270 /* Configuration Definitions */
272 #define SG_SIZE 58 /* Scatter Gather list Size */
273 #define MAX_TARGET_ID 126 /* Maximum Target ID supported */
274 #define MAX_LUN 255 /* Maximum LUN Supported */
275 #define MAX_CHANNEL 7 /* Maximum Channel # Supported by driver */
276 #define MAX_INBOUND 2000 /* Max CCBs, Also Max Queue Size */
277 #define MAX_OUTBOUND 256 /* Maximum outbound frames/adapter */
278 #define MAX_INBOUND_SIZE 512 /* Maximum inbound frame size */
279 #define MAX_MAP 4194304L /* Maximum mapping size of IOP */
280 /* Also serves as the minimum map for */
281 /* the 2005S zero channel RAID product */
283 /**************************************************************************
284 ** ASR Host Adapter structure - One Structure For Each Host Adapter That **
285 ** Is Configured Into The System. The Structure Supplies Configuration **
286 ** Information, Status Info, Queue Info And An Active CCB List Pointer. **
287 ***************************************************************************/
289 /* I2O register set */
294 # define Mask_InterruptsDisabled 0x08
296 volatile U32 ToFIFO; /* In Bound FIFO */
297 volatile U32 FromFIFO; /* Out Bound FIFO */
301 * A MIX of performance and space considerations for TID lookups
303 typedef u_int16_t tid_t;
306 u_int32_t size; /* up to MAX_LUN */
311 u_int32_t size; /* up to MAX_TARGET */
316 * To ensure that we only allocate and use the worst case ccb here, lets
317 * make our own local ccb union. If asr_alloc_ccb is utilized for another
318 * ccb type, ensure that you add the additional structures into our local
319 * ccb union. To ensure strict type checking, we will utilize the local
320 * ccb definition wherever possible.
323 struct ccb_hdr ccb_h; /* For convenience */
324 struct ccb_scsiio csio;
325 struct ccb_setasync csa;
328 typedef struct Asr_softc {
330 void * ha_Base; /* base port for each board */
331 u_int8_t * volatile ha_blinkLED;
332 i2oRegs_t * ha_Virt; /* Base address of IOP */
333 U8 * ha_Fvirt; /* Base address of Frames */
334 I2O_IOP_ENTRY ha_SystemTable;
335 LIST_HEAD(,ccb_hdr) ha_ccb; /* ccbs in use */
336 struct cam_path * ha_path[MAX_CHANNEL+1];
337 struct cam_sim * ha_sim[MAX_CHANNEL+1];
338 #if __FreeBSD_version >= 400000
339 struct resource * ha_mem_res;
340 struct resource * ha_mes_res;
341 struct resource * ha_irq_res;
344 PI2O_LCT ha_LCT; /* Complete list of devices */
345 # define le_type IdentityTag[0]
346 # define I2O_BSA 0x20
347 # define I2O_FCA 0x40
348 # define I2O_SCSI 0x00
349 # define I2O_PORT 0x80
350 # define I2O_UNKNOWN 0x7F
351 # define le_bus IdentityTag[1]
352 # define le_target IdentityTag[2]
353 # define le_lun IdentityTag[3]
354 target2lun_t * ha_targets[MAX_CHANNEL+1];
355 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME ha_Msgs;
358 u_int8_t ha_in_reset;
359 # define HA_OPERATIONAL 0
360 # define HA_IN_RESET 1
361 # define HA_OFF_LINE 2
362 # define HA_OFF_LINE_RECOVERY 3
363 /* Configuration information */
364 /* The target id maximums we take */
365 u_int8_t ha_MaxBus; /* Maximum bus */
366 u_int8_t ha_MaxId; /* Maximum target ID */
367 u_int8_t ha_MaxLun; /* Maximum target LUN */
368 u_int8_t ha_SgSize; /* Max SG elements */
369 u_int8_t ha_pciBusNum;
370 u_int8_t ha_pciDeviceNum;
371 u_int8_t ha_adapter_target[MAX_CHANNEL+1];
372 u_int16_t ha_QueueSize; /* Max outstanding commands */
373 u_int16_t ha_Msgs_Count;
375 /* Links into other parents and HBAs */
376 struct Asr_softc * ha_next; /* HBA list */
378 #ifdef ASR_MEASURE_PERFORMANCE
379 #define MAX_TIMEQ_SIZE 256 // assumes MAX 256 scsi commands sent
380 asr_perf_t ha_performance;
381 u_int32_t ha_submitted_ccbs_count;
383 // Queueing macros for a circular queue
384 #define TIMEQ_FREE_LIST_EMPTY(head, tail) (-1 == (head) && -1 == (tail))
385 #define TIMEQ_FREE_LIST_FULL(head, tail) ((((tail) + 1) % MAX_TIMEQ_SIZE) == (head))
386 #define ENQ_TIMEQ_FREE_LIST(item, Q, head, tail) \
387 if (!TIMEQ_FREE_LIST_FULL((head), (tail))) { \
388 if TIMEQ_FREE_LIST_EMPTY((head),(tail)) { \
389 (head) = (tail) = 0; \
391 else (tail) = ((tail) + 1) % MAX_TIMEQ_SIZE; \
392 Q[(tail)] = (item); \
395 debug_asr_printf("asr: Enqueueing when TimeQ Free List is full... This should not happen!\n"); \
397 #define DEQ_TIMEQ_FREE_LIST(item, Q, head, tail) \
398 if (!TIMEQ_FREE_LIST_EMPTY((head), (tail))) { \
400 if ((head) == (tail)) { (head) = (tail) = -1; } \
401 else (head) = ((head) + 1) % MAX_TIMEQ_SIZE; \
405 debug_asr_printf("asr: Dequeueing when TimeQ Free List is empty... This should not happen!\n"); \
408 // Circular queue of time stamps
409 struct timeval ha_timeQ[MAX_TIMEQ_SIZE];
410 u_int32_t ha_timeQFreeList[MAX_TIMEQ_SIZE];
411 int ha_timeQFreeHead;
412 int ha_timeQFreeTail;
416 STATIC Asr_softc_t * Asr_softc;
419 * Prototypes of the routines we have in this object.
422 /* Externally callable routines */
423 #if __FreeBSD_version >= 400000
424 #define PROBE_ARGS IN device_t tag
425 #define PROBE_RET int
426 #define PROBE_SET() u_long id = (pci_get_device(tag)<<16)|pci_get_vendor(tag)
427 #define PROBE_RETURN(retval) if(retval){device_set_desc(tag,retval);return(0);}else{return(ENXIO);}
428 #define ATTACH_ARGS IN device_t tag
429 #define ATTACH_RET int
430 #define ATTACH_SET() int unit = device_get_unit(tag)
431 #define ATTACH_RETURN(retval) return(retval)
433 #define PROBE_ARGS IN pcici_t tag, IN pcidi_t id
434 #define PROBE_RET const char *
436 #define PROBE_RETURN(retval) return(retval)
437 #define ATTACH_ARGS IN pcici_t tag, IN int unit
438 #define ATTACH_RET void
440 #define ATTACH_RETURN(retval) return
442 /* I2O HDM interface */
443 STATIC PROBE_RET asr_probe (PROBE_ARGS);
444 STATIC ATTACH_RET asr_attach (ATTACH_ARGS);
445 /* DOMINO placeholder */
446 STATIC PROBE_RET domino_probe (PROBE_ARGS);
447 STATIC ATTACH_RET domino_attach (ATTACH_ARGS);
448 /* MODE0 adapter placeholder */
449 STATIC PROBE_RET mode0_probe (PROBE_ARGS);
450 STATIC ATTACH_RET mode0_attach (ATTACH_ARGS);
452 STATIC Asr_softc_t * ASR_get_sc (
454 STATIC int asr_ioctl (
460 STATIC int asr_open (
465 STATIC int asr_close (
470 STATIC int asr_intr (
471 IN Asr_softc_t * sc);
472 STATIC void asr_timeout (
474 STATIC int ASR_init (
475 IN Asr_softc_t * sc);
476 STATIC INLINE int ASR_acquireLct (
477 INOUT Asr_softc_t * sc);
478 STATIC INLINE int ASR_acquireHrt (
479 INOUT Asr_softc_t * sc);
480 STATIC void asr_action (
481 IN struct cam_sim * sim,
483 STATIC void asr_poll (
484 IN struct cam_sim * sim);
487 * Here is the auto-probe structure used to nest our tests appropriately
488 * during the startup phase of the operating system.
490 #if __FreeBSD_version >= 400000
491 STATIC device_method_t asr_methods[] = {
492 DEVMETHOD(device_probe, asr_probe),
493 DEVMETHOD(device_attach, asr_attach),
497 STATIC driver_t asr_driver = {
503 STATIC devclass_t asr_devclass;
505 DECLARE_DUMMY_MODULE(asr);
506 DRIVER_MODULE(asr, pci, asr_driver, asr_devclass, 0, 0);
508 STATIC device_method_t domino_methods[] = {
509 DEVMETHOD(device_probe, domino_probe),
510 DEVMETHOD(device_attach, domino_attach),
514 STATIC driver_t domino_driver = {
520 STATIC devclass_t domino_devclass;
522 DRIVER_MODULE(domino, pci, domino_driver, domino_devclass, 0, 0);
524 STATIC device_method_t mode0_methods[] = {
525 DEVMETHOD(device_probe, mode0_probe),
526 DEVMETHOD(device_attach, mode0_attach),
530 STATIC driver_t mode0_driver = {
536 STATIC devclass_t mode0_devclass;
538 DRIVER_MODULE(mode0, pci, mode0_driver, mode0_devclass, 0, 0);
540 STATIC u_long asr_pcicount = 0;
541 STATIC struct pci_device asr_pcidev = {
548 DATA_SET (asr_pciset, asr_pcidev);
550 STATIC u_long domino_pcicount = 0;
551 STATIC struct pci_device domino_pcidev = {
558 DATA_SET (domino_pciset, domino_pcidev);
560 STATIC u_long mode0_pcicount = 0;
561 STATIC struct pci_device mode0_pcidev = {
568 DATA_SET (mode0_pciset, mode0_pcidev);
572 * devsw for asr hba driver
574 * only ioctl is used. the sd driver provides all other access.
576 #define CDEV_MAJOR 154 /* prefered default character major */
577 STATIC struct cdevsw asr_cdevsw = {
579 CDEV_MAJOR, /* maj */
585 asr_close, /* close */
588 asr_ioctl, /* ioctl */
591 nostrategy, /* strategy */
596 #ifdef ASR_MEASURE_PERFORMANCE
597 STATIC u_int32_t asr_time_delta (IN struct timeval start,
598 IN struct timeval end);
602 * Initialize the dynamic cdevsw hooks.
608 static int asr_devsw_installed = 0;
610 if (asr_devsw_installed) {
613 asr_devsw_installed++;
615 * Find a free spot (the report during driver load used by
616 * osd layer in engine to generate the controlling nodes).
618 while ((asr_cdevsw.d_maj < NUMCDEVSW)
619 && (dev_dport(makedev(asr_cdevsw.d_maj,0)) != NULL)) {
622 if (asr_cdevsw.d_maj >= NUMCDEVSW) for (
623 asr_cdevsw.d_maj = 0;
624 (asr_cdevsw.d_maj < CDEV_MAJOR)
625 && (dev_dport(makedev(asr_cdevsw.d_maj,0)) != NULL);
630 cdevsw_add(&asr_cdevsw);
632 * delete any nodes that would attach to the primary adapter,
633 * let the adapter scans add them.
635 destroy_dev(makedev(asr_cdevsw.d_maj,0));
638 /* Must initialize before CAM layer picks up our HBA driver */
639 SYSINIT(asrdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,asr_drvinit,NULL)
641 /* I2O support routines */
642 #define defAlignLong(STRUCT,NAME) char NAME[sizeof(STRUCT)]
643 #define getAlignLong(STRUCT,NAME) ((STRUCT *)(NAME))
646 * Fill message with default.
648 STATIC PI2O_MESSAGE_FRAME
653 OUT PI2O_MESSAGE_FRAME Message_Ptr;
655 Message_Ptr = getAlignLong(I2O_MESSAGE_FRAME, Message);
656 bzero ((void *)Message_Ptr, size);
657 I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11);
658 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
659 (size + sizeof(U32) - 1) >> 2);
660 I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1);
661 return (Message_Ptr);
662 } /* ASR_fillMessage */
664 #define EMPTY_QUEUE ((U32)-1L)
670 OUT U32 MessageOffset;
672 if ((MessageOffset = virt->ToFIFO) == EMPTY_QUEUE) {
673 MessageOffset = virt->ToFIFO;
675 return (MessageOffset);
676 } /* ASR_getMessage */
678 /* Issue a polled command */
681 INOUT i2oRegs_t * virt,
683 IN PI2O_MESSAGE_FRAME Message)
690 * ASR_initiateCp is only used for synchronous commands and will
691 * be made more resiliant to adapter delays since commands like
692 * resetIOP can cause the adapter to be deaf for a little time.
694 while (((MessageOffset = ASR_getMessage(virt)) == EMPTY_QUEUE)
698 if (MessageOffset != EMPTY_QUEUE) {
699 bcopy (Message, fvirt + MessageOffset,
700 I2O_MESSAGE_FRAME_getMessageSize(Message) << 2);
702 * Disable the Interrupts
704 virt->Mask = (Mask = virt->Mask) | Mask_InterruptsDisabled;
705 virt->ToFIFO = MessageOffset;
708 } /* ASR_initiateCp */
715 INOUT i2oRegs_t * virt,
718 struct resetMessage {
719 I2O_EXEC_IOP_RESET_MESSAGE M;
722 defAlignLong(struct resetMessage,Message);
723 PI2O_EXEC_IOP_RESET_MESSAGE Message_Ptr;
724 OUT U32 * volatile Reply_Ptr;
728 * Build up our copy of the Message.
730 Message_Ptr = (PI2O_EXEC_IOP_RESET_MESSAGE)ASR_fillMessage(Message,
731 sizeof(I2O_EXEC_IOP_RESET_MESSAGE));
732 I2O_EXEC_IOP_RESET_MESSAGE_setFunction(Message_Ptr, I2O_EXEC_IOP_RESET);
734 * Reset the Reply Status
736 *(Reply_Ptr = (U32 *)((char *)Message_Ptr
737 + sizeof(I2O_EXEC_IOP_RESET_MESSAGE))) = 0;
738 I2O_EXEC_IOP_RESET_MESSAGE_setStatusWordLowAddress(Message_Ptr,
739 KVTOPHYS((void *)Reply_Ptr));
741 * Send the Message out
743 if ((Old = ASR_initiateCp (virt, fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
745 * Wait for a response (Poll), timeouts are dangerous if
746 * the card is truly responsive. We assume response in 2s.
748 u_int8_t Delay = 200;
750 while ((*Reply_Ptr == 0) && (--Delay != 0)) {
754 * Re-enable the interrupts.
760 ASSERT (Old != (U32)-1L);
765 * Get the curent state of the adapter
767 STATIC INLINE PI2O_EXEC_STATUS_GET_REPLY
769 INOUT i2oRegs_t * virt,
771 OUT PI2O_EXEC_STATUS_GET_REPLY buffer)
773 defAlignLong(I2O_EXEC_STATUS_GET_MESSAGE,Message);
774 PI2O_EXEC_STATUS_GET_MESSAGE Message_Ptr;
778 * Build up our copy of the Message.
780 Message_Ptr = (PI2O_EXEC_STATUS_GET_MESSAGE)ASR_fillMessage(Message,
781 sizeof(I2O_EXEC_STATUS_GET_MESSAGE));
782 I2O_EXEC_STATUS_GET_MESSAGE_setFunction(Message_Ptr,
783 I2O_EXEC_STATUS_GET);
784 I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferAddressLow(Message_Ptr,
785 KVTOPHYS((void *)buffer));
786 /* This one is a Byte Count */
787 I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferLength(Message_Ptr,
788 sizeof(I2O_EXEC_STATUS_GET_REPLY));
790 * Reset the Reply Status
792 bzero ((void *)buffer, sizeof(I2O_EXEC_STATUS_GET_REPLY));
794 * Send the Message out
796 if ((Old = ASR_initiateCp (virt, fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
798 * Wait for a response (Poll), timeouts are dangerous if
799 * the card is truly responsive. We assume response in 50ms.
801 u_int8_t Delay = 255;
803 while (*((U8 * volatile)&(buffer->SyncByte)) == 0) {
805 buffer = (PI2O_EXEC_STATUS_GET_REPLY)NULL;
811 * Re-enable the interrupts.
816 return ((PI2O_EXEC_STATUS_GET_REPLY)NULL);
817 } /* ASR_getStatus */
820 * Check if the device is a SCSI I2O HBA, and add it to the list.
824 * Probe for ASR controller. If we find it, we will use it.
828 asr_probe(PROBE_ARGS)
831 if ((id == 0xA5011044) || (id == 0xA5111044)) {
832 PROBE_RETURN ("Adaptec Caching SCSI RAID");
838 * Probe/Attach for DOMINO chipset.
841 domino_probe(PROBE_ARGS)
844 if (id == 0x10121044) {
845 PROBE_RETURN ("Adaptec Caching Memory Controller");
851 domino_attach (ATTACH_ARGS)
854 } /* domino_attach */
857 * Probe/Attach for MODE0 adapters.
860 mode0_probe(PROBE_ARGS)
865 * If/When we can get a business case to commit to a
866 * Mode0 driver here, we can make all these tests more
867 * specific and robust. Mode0 adapters have their processors
868 * turned off, this the chips are in a raw state.
871 /* This is a PLX9054 */
872 if (id == 0x905410B5) {
873 PROBE_RETURN ("Adaptec Mode0 PM3757");
875 /* This is a PLX9080 */
876 if (id == 0x908010B5) {
877 PROBE_RETURN ("Adaptec Mode0 PM3754/PM3755");
879 /* This is a ZION 80303 */
880 if (id == 0x53098086) {
881 PROBE_RETURN ("Adaptec Mode0 3010S");
883 /* This is an i960RS */
884 if (id == 0x39628086) {
885 PROBE_RETURN ("Adaptec Mode0 2100S");
887 /* This is an i960RN */
888 if (id == 0x19648086) {
889 PROBE_RETURN ("Adaptec Mode0 PM2865/2400A/3200S/3400S");
891 #if 0 /* this would match any generic i960 -- mjs */
892 /* This is an i960RP (typically also on Motherboards) */
893 if (id == 0x19608086) {
894 PROBE_RETURN ("Adaptec Mode0 PM2554/PM1554/PM2654");
901 mode0_attach (ATTACH_ARGS)
906 STATIC INLINE union asr_ccb *
910 OUT union asr_ccb * new_ccb;
912 if ((new_ccb = (union asr_ccb *)malloc(sizeof(*new_ccb),
913 M_DEVBUF, M_WAITOK)) != (union asr_ccb *)NULL) {
914 bzero (new_ccb, sizeof(*new_ccb));
915 new_ccb->ccb_h.pinfo.priority = 1;
916 new_ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX;
917 new_ccb->ccb_h.spriv_ptr0 = sc;
920 } /* asr_alloc_ccb */
924 IN union asr_ccb * free_ccb)
926 free(free_ccb, M_DEVBUF);
930 * Print inquiry data `carefully'
937 while ((--len >= 0) && (*s) && (*s != ' ') && (*s != '-')) {
938 printf ("%c", *(s++));
945 STATIC INLINE int ASR_queue (
947 IN PI2O_MESSAGE_FRAME Message);
949 * Send a message synchronously and without Interrupt to a ccb.
953 INOUT union asr_ccb * ccb,
954 IN PI2O_MESSAGE_FRAME Message)
958 Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
961 * We do not need any (optional byteswapping) method access to
962 * the Initiator context field.
964 I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb);
966 /* Prevent interrupt service */
968 sc->ha_Virt->Mask = (Mask = sc->ha_Virt->Mask)
969 | Mask_InterruptsDisabled;
971 if (ASR_queue (sc, Message) == EMPTY_QUEUE) {
972 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
973 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
977 * Wait for this board to report a finished instruction.
979 while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) {
983 /* Re-enable Interrupts */
984 sc->ha_Virt->Mask = Mask;
987 return (ccb->ccb_h.status);
991 * Send a message synchronously to a Asr_softc_t
996 IN PI2O_MESSAGE_FRAME Message)
1001 if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) {
1002 return (CAM_REQUEUE_REQ);
1005 status = ASR_queue_s (ccb, Message);
1013 * Add the specified ccb to the active queue
1017 IN Asr_softc_t * sc,
1018 INOUT union asr_ccb * ccb)
1023 LIST_INSERT_HEAD(&(sc->ha_ccb), &(ccb->ccb_h), sim_links.le);
1024 if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
1025 if (ccb->ccb_h.timeout == CAM_TIME_DEFAULT) {
1027 * RAID systems can take considerable time to
1028 * complete some commands given the large cache
1029 * flashes switching from write back to write thru.
1031 ccb->ccb_h.timeout = 6 * 60 * 1000;
1033 ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb,
1034 (ccb->ccb_h.timeout * hz) / 1000);
1040 * Remove the specified ccb from the active queue.
1044 IN Asr_softc_t * sc,
1045 INOUT union asr_ccb * ccb)
1050 untimeout(asr_timeout, (caddr_t)ccb, ccb->ccb_h.timeout_ch);
1051 LIST_REMOVE(&(ccb->ccb_h), sim_links.le);
1053 } /* ASR_ccbRemove */
1056 * Fail all the active commands, so they get re-issued by the operating
1060 ASR_failActiveCommands (
1061 IN Asr_softc_t * sc)
1063 struct ccb_hdr * ccb;
1066 #if 0 /* Currently handled by callers, unnecessary paranoia currently */
1067 /* Left in for historical perspective. */
1068 defAlignLong(I2O_EXEC_LCT_NOTIFY_MESSAGE,Message);
1069 PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr;
1071 /* Send a blind LCT command to wait for the enableSys to complete */
1072 Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)ASR_fillMessage(Message,
1073 sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) - sizeof(I2O_SG_ELEMENT));
1074 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
1075 I2O_EXEC_LCT_NOTIFY);
1076 I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr,
1077 I2O_CLASS_MATCH_ANYCLASS);
1078 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1083 * We do not need to inform the CAM layer that we had a bus
1084 * reset since we manage it on our own, this also prevents the
1085 * SCSI_DELAY settling that would be required on other systems.
1086 * The `SCSI_DELAY' has already been handled by the card via the
1087 * acquisition of the LCT table while we are at CAM priority level.
1088 * for (int bus = 0; bus <= sc->ha_MaxBus; ++bus) {
1089 * xpt_async (AC_BUS_RESET, sc->ha_path[bus], NULL);
1092 while ((ccb = LIST_FIRST(&(sc->ha_ccb))) != (struct ccb_hdr *)NULL) {
1093 ASR_ccbRemove (sc, (union asr_ccb *)ccb);
1095 ccb->status &= ~CAM_STATUS_MASK;
1096 ccb->status |= CAM_REQUEUE_REQ;
1097 /* Nothing Transfered */
1098 ((struct ccb_scsiio *)ccb)->resid
1099 = ((struct ccb_scsiio *)ccb)->dxfer_len;
1102 xpt_done ((union ccb *)ccb);
1104 wakeup ((caddr_t)ccb);
1108 } /* ASR_failActiveCommands */
1111 * The following command causes the HBA to reset the specific bus
1115 IN Asr_softc_t * sc,
1118 defAlignLong(I2O_HBA_BUS_RESET_MESSAGE,Message);
1119 I2O_HBA_BUS_RESET_MESSAGE * Message_Ptr;
1120 PI2O_LCT_ENTRY Device;
1122 Message_Ptr = (I2O_HBA_BUS_RESET_MESSAGE *)ASR_fillMessage(Message,
1123 sizeof(I2O_HBA_BUS_RESET_MESSAGE));
1124 I2O_MESSAGE_FRAME_setFunction(&Message_Ptr->StdMessageFrame,
1126 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
1127 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
1129 if (((Device->le_type & I2O_PORT) != 0)
1130 && (Device->le_bus == bus)) {
1131 I2O_MESSAGE_FRAME_setTargetAddress(
1132 &Message_Ptr->StdMessageFrame,
1133 I2O_LCT_ENTRY_getLocalTID(Device));
1134 /* Asynchronous command, with no expectations */
1135 (void)ASR_queue(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1139 } /* ASR_resetBus */
1142 ASR_getBlinkLedCode (
1143 IN Asr_softc_t * sc)
1145 if ((sc != (Asr_softc_t *)NULL)
1146 && (sc->ha_blinkLED != (u_int8_t *)NULL)
1147 && (sc->ha_blinkLED[1] == 0xBC)) {
1148 return (sc->ha_blinkLED[0]);
1151 } /* ASR_getBlinkCode */
1154 * Determine the address of an TID lookup. Must be done at high priority
1155 * since the address can be changed by other threads of execution.
1157 * Returns NULL pointer if not indexible (but will attempt to generate
1158 * an index if `new_entry' flag is set to TRUE).
1160 * All addressible entries are to be guaranteed zero if never initialized.
1162 STATIC INLINE tid_t *
1164 INOUT Asr_softc_t * sc,
1170 target2lun_t * bus_ptr;
1171 lun2tid_t * target_ptr;
1175 * Validity checking of incoming parameters. More of a bound
1176 * expansion limit than an issue with the code dealing with the
1179 * sc must be valid before it gets here, so that check could be
1180 * dropped if speed a critical issue.
1182 if ((sc == (Asr_softc_t *)NULL)
1183 || (bus > MAX_CHANNEL)
1184 || (target > sc->ha_MaxId)
1185 || (lun > sc->ha_MaxLun)) {
1186 debug_asr_printf("(%lx,%d,%d,%d) target out of range\n",
1187 (u_long)sc, bus, target, lun);
1188 return ((tid_t *)NULL);
1191 * See if there is an associated bus list.
1193 * for performance, allocate in size of BUS_CHUNK chunks.
1194 * BUS_CHUNK must be a power of two. This is to reduce
1195 * fragmentation effects on the allocations.
1197 # define BUS_CHUNK 8
1198 new_size = ((target + BUS_CHUNK - 1) & ~(BUS_CHUNK - 1));
1199 if ((bus_ptr = sc->ha_targets[bus]) == (target2lun_t *)NULL) {
1201 * Allocate a new structure?
1202 * Since one element in structure, the +1
1203 * needed for size has been abstracted.
1205 if ((new_entry == FALSE)
1206 || ((sc->ha_targets[bus] = bus_ptr = (target2lun_t *)malloc (
1207 sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size),
1209 == (target2lun_t *)NULL)) {
1210 debug_asr_printf("failed to allocate bus list\n");
1211 return ((tid_t *)NULL);
1213 bzero (bus_ptr, sizeof(*bus_ptr)
1214 + (sizeof(bus_ptr->LUN) * new_size));
1215 bus_ptr->size = new_size + 1;
1216 } else if (bus_ptr->size <= new_size) {
1217 target2lun_t * new_bus_ptr;
1220 * Reallocate a new structure?
1221 * Since one element in structure, the +1
1222 * needed for size has been abstracted.
1224 if ((new_entry == FALSE)
1225 || ((new_bus_ptr = (target2lun_t *)malloc (
1226 sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size),
1228 == (target2lun_t *)NULL)) {
1229 debug_asr_printf("failed to reallocate bus list\n");
1230 return ((tid_t *)NULL);
1233 * Zero and copy the whole thing, safer, simpler coding
1234 * and not really performance critical at this point.
1236 bzero (new_bus_ptr, sizeof(*bus_ptr)
1237 + (sizeof(bus_ptr->LUN) * new_size));
1238 bcopy (bus_ptr, new_bus_ptr, sizeof(*bus_ptr)
1239 + (sizeof(bus_ptr->LUN) * (bus_ptr->size - 1)));
1240 sc->ha_targets[bus] = new_bus_ptr;
1241 free (bus_ptr, M_TEMP);
1242 bus_ptr = new_bus_ptr;
1243 bus_ptr->size = new_size + 1;
1246 * We now have the bus list, lets get to the target list.
1247 * Since most systems have only *one* lun, we do not allocate
1248 * in chunks as above, here we allow one, then in chunk sizes.
1249 * TARGET_CHUNK must be a power of two. This is to reduce
1250 * fragmentation effects on the allocations.
1252 # define TARGET_CHUNK 8
1253 if ((new_size = lun) != 0) {
1254 new_size = ((lun + TARGET_CHUNK - 1) & ~(TARGET_CHUNK - 1));
1256 if ((target_ptr = bus_ptr->LUN[target]) == (lun2tid_t *)NULL) {
1258 * Allocate a new structure?
1259 * Since one element in structure, the +1
1260 * needed for size has been abstracted.
1262 if ((new_entry == FALSE)
1263 || ((bus_ptr->LUN[target] = target_ptr = (lun2tid_t *)malloc (
1264 sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size),
1266 == (lun2tid_t *)NULL)) {
1267 debug_asr_printf("failed to allocate target list\n");
1268 return ((tid_t *)NULL);
1270 bzero (target_ptr, sizeof(*target_ptr)
1271 + (sizeof(target_ptr->TID) * new_size));
1272 target_ptr->size = new_size + 1;
1273 } else if (target_ptr->size <= new_size) {
1274 lun2tid_t * new_target_ptr;
1277 * Reallocate a new structure?
1278 * Since one element in structure, the +1
1279 * needed for size has been abstracted.
1281 if ((new_entry == FALSE)
1282 || ((new_target_ptr = (lun2tid_t *)malloc (
1283 sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size),
1285 == (lun2tid_t *)NULL)) {
1286 debug_asr_printf("failed to reallocate target list\n");
1287 return ((tid_t *)NULL);
1290 * Zero and copy the whole thing, safer, simpler coding
1291 * and not really performance critical at this point.
1293 bzero (new_target_ptr, sizeof(*target_ptr)
1294 + (sizeof(target_ptr->TID) * new_size));
1295 bcopy (target_ptr, new_target_ptr,
1297 + (sizeof(target_ptr->TID) * (target_ptr->size - 1)));
1298 bus_ptr->LUN[target] = new_target_ptr;
1299 free (target_ptr, M_TEMP);
1300 target_ptr = new_target_ptr;
1301 target_ptr->size = new_size + 1;
1304 * Now, acquire the TID address from the LUN indexed list.
1306 return (&(target_ptr->TID[lun]));
1307 } /* ASR_getTidAddress */
1310 * Get a pre-existing TID relationship.
1312 * If the TID was never set, return (tid_t)-1.
1314 * should use mutex rather than spl.
1318 IN Asr_softc_t * sc,
1328 if (((tid_ptr = ASR_getTidAddress (sc, bus, target, lun, FALSE))
1330 /* (tid_t)0 or (tid_t)-1 indicate no TID */
1331 || (*tid_ptr == (tid_t)0)) {
1341 * Set a TID relationship.
1343 * If the TID was not set, return (tid_t)-1.
1345 * should use mutex rather than spl.
1349 INOUT Asr_softc_t * sc,
1358 if (TID != (tid_t)-1) {
1363 if ((tid_ptr = ASR_getTidAddress (sc, bus, target, lun, TRUE))
1374 /*-------------------------------------------------------------------------*/
1375 /* Function ASR_rescan */
1376 /*-------------------------------------------------------------------------*/
1377 /* The Parameters Passed To This Function Are : */
1378 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */
1380 /* This Function Will rescan the adapter and resynchronize any data */
1382 /* Return : 0 For OK, Error Code Otherwise */
1383 /*-------------------------------------------------------------------------*/
1387 IN Asr_softc_t * sc)
1393 * Re-acquire the LCT table and synchronize us to the adapter.
1395 if ((error = ASR_acquireLct(sc)) == 0) {
1396 error = ASR_acquireHrt(sc);
1403 bus = sc->ha_MaxBus;
1404 /* Reset all existing cached TID lookups */
1406 int target, event = 0;
1409 * Scan for all targets on this bus to see if they
1410 * got affected by the rescan.
1412 for (target = 0; target <= sc->ha_MaxId; ++target) {
1415 /* Stay away from the controller ID */
1416 if (target == sc->ha_adapter_target[bus]) {
1419 for (lun = 0; lun <= sc->ha_MaxLun; ++lun) {
1420 PI2O_LCT_ENTRY Device;
1421 tid_t TID = (tid_t)-1;
1425 * See if the cached TID changed. Search for
1426 * the device in our new LCT.
1428 for (Device = sc->ha_LCT->LCTEntry;
1429 Device < (PI2O_LCT_ENTRY)(((U32 *)sc->ha_LCT)
1430 + I2O_LCT_getTableSize(sc->ha_LCT));
1432 if ((Device->le_type != I2O_UNKNOWN)
1433 && (Device->le_bus == bus)
1434 && (Device->le_target == target)
1435 && (Device->le_lun == lun)
1436 && (I2O_LCT_ENTRY_getUserTID(Device)
1438 TID = I2O_LCT_ENTRY_getLocalTID(
1444 * Indicate to the OS that the label needs
1445 * to be recalculated, or that the specific
1446 * open device is no longer valid (Merde)
1447 * because the cached TID changed.
1449 LastTID = ASR_getTid (sc, bus, target, lun);
1450 if (LastTID != TID) {
1451 struct cam_path * path;
1453 if (xpt_create_path(&path,
1455 cam_sim_path(sc->ha_sim[bus]),
1456 target, lun) != CAM_REQ_CMP) {
1457 if (TID == (tid_t)-1) {
1458 event |= AC_LOST_DEVICE;
1460 event |= AC_INQ_CHANGED
1461 | AC_GETDEV_CHANGED;
1464 if (TID == (tid_t)-1) {
1468 } else if (LastTID == (tid_t)-1) {
1469 struct ccb_getdev ccb;
1473 path, /*priority*/5);
1489 * We have the option of clearing the
1490 * cached TID for it to be rescanned, or to
1491 * set it now even if the device never got
1492 * accessed. We chose the later since we
1493 * currently do not use the condition that
1494 * the TID ever got cached.
1496 ASR_setTid (sc, bus, target, lun, TID);
1500 * The xpt layer can not handle multiple events at the
1503 if (event & AC_LOST_DEVICE) {
1504 xpt_async(AC_LOST_DEVICE, sc->ha_path[bus], NULL);
1506 if (event & AC_INQ_CHANGED) {
1507 xpt_async(AC_INQ_CHANGED, sc->ha_path[bus], NULL);
1509 if (event & AC_GETDEV_CHANGED) {
1510 xpt_async(AC_GETDEV_CHANGED, sc->ha_path[bus], NULL);
1512 } while (--bus >= 0);
1516 /*-------------------------------------------------------------------------*/
1517 /* Function ASR_reset */
1518 /*-------------------------------------------------------------------------*/
1519 /* The Parameters Passed To This Function Are : */
1520 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */
1522 /* This Function Will reset the adapter and resynchronize any data */
1525 /*-------------------------------------------------------------------------*/
1529 IN Asr_softc_t * sc)
1534 if ((sc->ha_in_reset == HA_IN_RESET)
1535 || (sc->ha_in_reset == HA_OFF_LINE_RECOVERY)) {
1540 * Promotes HA_OPERATIONAL to HA_IN_RESET,
1541 * or HA_OFF_LINE to HA_OFF_LINE_RECOVERY.
1543 ++(sc->ha_in_reset);
1544 if (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0) {
1545 debug_asr_printf ("ASR_resetIOP failed\n");
1547 * We really need to take this card off-line, easier said
1548 * than make sense. Better to keep retrying for now since if a
1549 * UART cable is connected the blinkLEDs the adapter is now in
1550 * a hard state requiring action from the monitor commands to
1551 * the HBA to continue. For debugging waiting forever is a
1552 * good thing. In a production system, however, one may wish
1553 * to instead take the card off-line ...
1555 # if 0 && (defined(HA_OFF_LINE))
1557 * Take adapter off-line.
1559 printf ("asr%d: Taking adapter off-line\n",
1561 ? cam_sim_unit(xpt_path_sim(sc->ha_path[0]))
1563 sc->ha_in_reset = HA_OFF_LINE;
1568 while (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0);
1571 retVal = ASR_init (sc);
1574 debug_asr_printf ("ASR_init failed\n");
1575 sc->ha_in_reset = HA_OFF_LINE;
1578 if (ASR_rescan (sc) != 0) {
1579 debug_asr_printf ("ASR_rescan failed\n");
1581 ASR_failActiveCommands (sc);
1582 if (sc->ha_in_reset == HA_OFF_LINE_RECOVERY) {
1583 printf ("asr%d: Brining adapter back on-line\n",
1585 ? cam_sim_unit(xpt_path_sim(sc->ha_path[0]))
1588 sc->ha_in_reset = HA_OPERATIONAL;
1593 * Device timeout handler.
1599 union asr_ccb * ccb = (union asr_ccb *)arg;
1600 Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
1603 debug_asr_print_path(ccb);
1604 debug_asr_printf("timed out");
1607 * Check if the adapter has locked up?
1609 if ((s = ASR_getBlinkLedCode(sc)) != 0) {
1611 printf ("asr%d: Blink LED 0x%x resetting adapter\n",
1612 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), s);
1613 if (ASR_reset (sc) == ENXIO) {
1614 /* Try again later */
1615 ccb->ccb_h.timeout_ch = timeout(asr_timeout,
1617 (ccb->ccb_h.timeout * hz) / 1000);
1622 * Abort does not function on the ASR card!!! Walking away from
1623 * the SCSI command is also *very* dangerous. A SCSI BUS reset is
1624 * our best bet, followed by a complete adapter reset if that fails.
1627 /* Check if we already timed out once to raise the issue */
1628 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_CMD_TIMEOUT) {
1629 debug_asr_printf (" AGAIN\nreinitializing adapter\n");
1630 if (ASR_reset (sc) == ENXIO) {
1631 ccb->ccb_h.timeout_ch = timeout(asr_timeout,
1633 (ccb->ccb_h.timeout * hz) / 1000);
1638 debug_asr_printf ("\nresetting bus\n");
1639 /* If the BUS reset does not take, then an adapter reset is next! */
1640 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
1641 ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
1642 ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb,
1643 (ccb->ccb_h.timeout * hz) / 1000);
1644 ASR_resetBus (sc, cam_sim_bus(xpt_path_sim(ccb->ccb_h.path)));
1645 xpt_async (AC_BUS_RESET, ccb->ccb_h.path, NULL);
1650 * send a message asynchronously
1654 IN Asr_softc_t * sc,
1655 IN PI2O_MESSAGE_FRAME Message)
1657 OUT U32 MessageOffset;
1658 union asr_ccb * ccb;
1660 debug_asr_printf ("Host Command Dump:\n");
1661 debug_asr_dump_message (Message);
1663 ccb = (union asr_ccb *)(long)
1664 I2O_MESSAGE_FRAME_getInitiatorContext64(Message);
1666 if ((MessageOffset = ASR_getMessage(sc->ha_Virt)) != EMPTY_QUEUE) {
1667 #ifdef ASR_MEASURE_PERFORMANCE
1671 ++sc->ha_performance.command_count[
1672 (int) ccb->csio.cdb_io.cdb_bytes[0]];
1673 DEQ_TIMEQ_FREE_LIST(startTimeIndex,
1674 sc->ha_timeQFreeList,
1675 sc->ha_timeQFreeHead,
1676 sc->ha_timeQFreeTail);
1677 if (-1 != startTimeIndex) {
1678 microtime(&(sc->ha_timeQ[startTimeIndex]));
1680 /* Time stamp the command before we send it out */
1681 ((PRIVATE_SCSI_SCB_EXECUTE_MESSAGE *) Message)->
1682 PrivateMessageFrame.TransactionContext
1683 = (I2O_TRANSACTION_CONTEXT) startTimeIndex;
1685 ++sc->ha_submitted_ccbs_count;
1686 if (sc->ha_performance.max_submit_count
1687 < sc->ha_submitted_ccbs_count) {
1688 sc->ha_performance.max_submit_count
1689 = sc->ha_submitted_ccbs_count;
1693 bcopy (Message, sc->ha_Fvirt + MessageOffset,
1694 I2O_MESSAGE_FRAME_getMessageSize(Message) << 2);
1696 ASR_ccbAdd (sc, ccb);
1698 /* Post the command */
1699 sc->ha_Virt->ToFIFO = MessageOffset;
1701 if (ASR_getBlinkLedCode(sc)) {
1703 * Unlikely we can do anything if we can't grab a
1704 * message frame :-(, but lets give it a try.
1706 (void)ASR_reset (sc);
1709 return (MessageOffset);
1713 /* Simple Scatter Gather elements */
1714 #define SG(SGL,Index,Flags,Buffer,Size) \
1715 I2O_FLAGS_COUNT_setCount( \
1716 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \
1718 I2O_FLAGS_COUNT_setFlags( \
1719 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \
1720 I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | (Flags)); \
1721 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress( \
1722 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index]), \
1723 (Buffer == NULL) ? NULL : KVTOPHYS(Buffer))
1726 * Retrieve Parameter Group.
1727 * Buffer must be allocated using defAlignLong macro.
1731 IN Asr_softc_t * sc,
1735 IN unsigned BufferSize)
1737 struct paramGetMessage {
1738 I2O_UTIL_PARAMS_GET_MESSAGE M;
1740 sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT)];
1742 I2O_PARAM_OPERATIONS_LIST_HEADER Header;
1743 I2O_PARAM_OPERATION_ALL_TEMPLATE Template[1];
1746 defAlignLong(struct paramGetMessage, Message);
1747 struct Operations * Operations_Ptr;
1748 I2O_UTIL_PARAMS_GET_MESSAGE * Message_Ptr;
1749 struct ParamBuffer {
1750 I2O_PARAM_RESULTS_LIST_HEADER Header;
1751 I2O_PARAM_READ_OPERATION_RESULT Read;
1755 Message_Ptr = (I2O_UTIL_PARAMS_GET_MESSAGE *)ASR_fillMessage(Message,
1756 sizeof(I2O_UTIL_PARAMS_GET_MESSAGE)
1757 + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT));
1758 Operations_Ptr = (struct Operations *)((char *)Message_Ptr
1759 + sizeof(I2O_UTIL_PARAMS_GET_MESSAGE)
1760 + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT));
1761 bzero ((void *)Operations_Ptr, sizeof(struct Operations));
1762 I2O_PARAM_OPERATIONS_LIST_HEADER_setOperationCount(
1763 &(Operations_Ptr->Header), 1);
1764 I2O_PARAM_OPERATION_ALL_TEMPLATE_setOperation(
1765 &(Operations_Ptr->Template[0]), I2O_PARAMS_OPERATION_FIELD_GET);
1766 I2O_PARAM_OPERATION_ALL_TEMPLATE_setFieldCount(
1767 &(Operations_Ptr->Template[0]), 0xFFFF);
1768 I2O_PARAM_OPERATION_ALL_TEMPLATE_setGroupNumber(
1769 &(Operations_Ptr->Template[0]), Group);
1770 bzero ((void *)(Buffer_Ptr = getAlignLong(struct ParamBuffer, Buffer)),
1773 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
1775 + (((sizeof(I2O_UTIL_PARAMS_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
1776 / sizeof(U32)) << 4));
1777 I2O_MESSAGE_FRAME_setTargetAddress (&(Message_Ptr->StdMessageFrame),
1779 I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame),
1780 I2O_UTIL_PARAMS_GET);
1782 * Set up the buffers as scatter gather elements.
1784 SG(&(Message_Ptr->SGL), 0,
1785 I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER,
1786 Operations_Ptr, sizeof(struct Operations));
1787 SG(&(Message_Ptr->SGL), 1,
1788 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
1789 Buffer_Ptr, BufferSize);
1791 if ((ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) == CAM_REQ_CMP)
1792 && (Buffer_Ptr->Header.ResultCount)) {
1793 return ((void *)(Buffer_Ptr->Info));
1795 return ((void *)NULL);
1796 } /* ASR_getParams */
1799 * Acquire the LCT information.
1803 INOUT Asr_softc_t * sc)
1805 PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr;
1806 PI2O_SGE_SIMPLE_ELEMENT sg;
1807 int MessageSizeInBytes;
1811 PI2O_LCT_ENTRY Entry;
1814 * sc value assumed valid
1816 MessageSizeInBytes = sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE)
1817 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT);
1818 if ((Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)malloc (
1819 MessageSizeInBytes, M_TEMP, M_WAITOK))
1820 == (PI2O_EXEC_LCT_NOTIFY_MESSAGE)NULL) {
1823 (void)ASR_fillMessage((char *)Message_Ptr, MessageSizeInBytes);
1824 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
1826 (((sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) - sizeof(I2O_SG_ELEMENT))
1827 / sizeof(U32)) << 4)));
1828 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
1829 I2O_EXEC_LCT_NOTIFY);
1830 I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr,
1831 I2O_CLASS_MATCH_ANYCLASS);
1833 * Call the LCT table to determine the number of device entries
1834 * to reserve space for.
1836 SG(&(Message_Ptr->SGL), 0,
1837 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, &Table,
1840 * since this code is reused in several systems, code efficiency
1841 * is greater by using a shift operation rather than a divide by
1842 * sizeof(u_int32_t).
1844 I2O_LCT_setTableSize(&Table,
1845 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2);
1846 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1848 * Determine the size of the LCT table.
1851 free (sc->ha_LCT, M_TEMP);
1854 * malloc only generates contiguous memory when less than a
1855 * page is expected. We must break the request up into an SG list ...
1857 if (((len = (I2O_LCT_getTableSize(&Table) << 2)) <=
1858 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)))
1859 || (len > (128 * 1024))) { /* Arbitrary */
1860 free (Message_Ptr, M_TEMP);
1863 if ((sc->ha_LCT = (PI2O_LCT)malloc (len, M_TEMP, M_WAITOK))
1864 == (PI2O_LCT)NULL) {
1865 free (Message_Ptr, M_TEMP);
1869 * since this code is reused in several systems, code efficiency
1870 * is greater by using a shift operation rather than a divide by
1871 * sizeof(u_int32_t).
1873 I2O_LCT_setTableSize(sc->ha_LCT,
1874 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2);
1876 * Convert the access to the LCT table into a SG list.
1878 sg = Message_Ptr->SGL.u.Simple;
1879 v = (caddr_t)(sc->ha_LCT);
1881 int next, base, span;
1884 next = base = KVTOPHYS(v);
1885 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base);
1887 /* How far can we go contiguously */
1888 while ((len > 0) && (base == next)) {
1891 next = trunc_page(base) + PAGE_SIZE;
1902 /* Construct the Flags */
1903 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span);
1905 int rw = I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT;
1907 rw = (I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT
1908 | I2O_SGL_FLAGS_LAST_ELEMENT
1909 | I2O_SGL_FLAGS_END_OF_BUFFER);
1911 I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount), rw);
1919 * Incrementing requires resizing of the packet.
1922 MessageSizeInBytes += sizeof(*sg);
1923 I2O_MESSAGE_FRAME_setMessageSize(
1924 &(Message_Ptr->StdMessageFrame),
1925 I2O_MESSAGE_FRAME_getMessageSize(
1926 &(Message_Ptr->StdMessageFrame))
1927 + (sizeof(*sg) / sizeof(U32)));
1929 PI2O_EXEC_LCT_NOTIFY_MESSAGE NewMessage_Ptr;
1931 if ((NewMessage_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)
1932 malloc (MessageSizeInBytes, M_TEMP, M_WAITOK))
1933 == (PI2O_EXEC_LCT_NOTIFY_MESSAGE)NULL) {
1934 free (sc->ha_LCT, M_TEMP);
1935 sc->ha_LCT = (PI2O_LCT)NULL;
1936 free (Message_Ptr, M_TEMP);
1939 span = ((caddr_t)sg) - (caddr_t)Message_Ptr;
1940 bcopy ((caddr_t)Message_Ptr,
1941 (caddr_t)NewMessage_Ptr, span);
1942 free (Message_Ptr, M_TEMP);
1943 sg = (PI2O_SGE_SIMPLE_ELEMENT)
1944 (((caddr_t)NewMessage_Ptr) + span);
1945 Message_Ptr = NewMessage_Ptr;
1950 retval = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1951 free (Message_Ptr, M_TEMP);
1952 if (retval != CAM_REQ_CMP) {
1956 /* If the LCT table grew, lets truncate accesses */
1957 if (I2O_LCT_getTableSize(&Table) < I2O_LCT_getTableSize(sc->ha_LCT)) {
1958 I2O_LCT_setTableSize(sc->ha_LCT, I2O_LCT_getTableSize(&Table));
1960 for (Entry = sc->ha_LCT->LCTEntry; Entry < (PI2O_LCT_ENTRY)
1961 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
1963 Entry->le_type = I2O_UNKNOWN;
1964 switch (I2O_CLASS_ID_getClass(&(Entry->ClassID))) {
1966 case I2O_CLASS_RANDOM_BLOCK_STORAGE:
1967 Entry->le_type = I2O_BSA;
1970 case I2O_CLASS_SCSI_PERIPHERAL:
1971 Entry->le_type = I2O_SCSI;
1974 case I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL:
1975 Entry->le_type = I2O_FCA;
1978 case I2O_CLASS_BUS_ADAPTER_PORT:
1979 Entry->le_type = I2O_PORT | I2O_SCSI;
1981 case I2O_CLASS_FIBRE_CHANNEL_PORT:
1982 if (I2O_CLASS_ID_getClass(&(Entry->ClassID)) ==
1983 I2O_CLASS_FIBRE_CHANNEL_PORT) {
1984 Entry->le_type = I2O_PORT | I2O_FCA;
1986 { struct ControllerInfo {
1987 I2O_PARAM_RESULTS_LIST_HEADER Header;
1988 I2O_PARAM_READ_OPERATION_RESULT Read;
1989 I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info;
1991 defAlignLong(struct ControllerInfo, Buffer);
1992 PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info;
1994 Entry->le_bus = 0xff;
1995 Entry->le_target = 0xff;
1996 Entry->le_lun = 0xff;
1998 if ((Info = (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR)
2000 I2O_LCT_ENTRY_getLocalTID(Entry),
2001 I2O_HBA_SCSI_CONTROLLER_INFO_GROUP_NO,
2002 Buffer, sizeof(struct ControllerInfo)))
2003 == (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR)NULL) {
2007 = I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getInitiatorID(
2014 { struct DeviceInfo {
2015 I2O_PARAM_RESULTS_LIST_HEADER Header;
2016 I2O_PARAM_READ_OPERATION_RESULT Read;
2017 I2O_DPT_DEVICE_INFO_SCALAR Info;
2019 defAlignLong (struct DeviceInfo, Buffer);
2020 PI2O_DPT_DEVICE_INFO_SCALAR Info;
2022 Entry->le_bus = 0xff;
2023 Entry->le_target = 0xff;
2024 Entry->le_lun = 0xff;
2026 if ((Info = (PI2O_DPT_DEVICE_INFO_SCALAR)
2028 I2O_LCT_ENTRY_getLocalTID(Entry),
2029 I2O_DPT_DEVICE_INFO_GROUP_NO,
2030 Buffer, sizeof(struct DeviceInfo)))
2031 == (PI2O_DPT_DEVICE_INFO_SCALAR)NULL) {
2035 |= I2O_DPT_DEVICE_INFO_SCALAR_getDeviceType(Info);
2037 = I2O_DPT_DEVICE_INFO_SCALAR_getBus(Info);
2038 if ((Entry->le_bus > sc->ha_MaxBus)
2039 && (Entry->le_bus <= MAX_CHANNEL)) {
2040 sc->ha_MaxBus = Entry->le_bus;
2043 = I2O_DPT_DEVICE_INFO_SCALAR_getIdentifier(Info);
2045 = I2O_DPT_DEVICE_INFO_SCALAR_getLunInfo(Info);
2049 * A zero return value indicates success.
2052 } /* ASR_acquireLct */
2055 * Initialize a message frame.
2056 * We assume that the CDB has already been set up, so all we do here is
2057 * generate the Scatter Gather list.
2059 STATIC INLINE PI2O_MESSAGE_FRAME
2061 IN union asr_ccb * ccb,
2062 OUT PI2O_MESSAGE_FRAME Message)
2064 int next, span, base, rw;
2065 OUT PI2O_MESSAGE_FRAME Message_Ptr;
2066 Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
2067 PI2O_SGE_SIMPLE_ELEMENT sg;
2069 vm_size_t size, len;
2072 /* We only need to zero out the PRIVATE_SCSI_SCB_EXECUTE_MESSAGE */
2073 bzero (Message_Ptr = getAlignLong(I2O_MESSAGE_FRAME, Message),
2074 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT)));
2077 int target = ccb->ccb_h.target_id;
2078 int lun = ccb->ccb_h.target_lun;
2079 int bus = cam_sim_bus(xpt_path_sim(ccb->ccb_h.path));
2082 if ((TID = ASR_getTid (sc, bus, target, lun)) == (tid_t)-1) {
2083 PI2O_LCT_ENTRY Device;
2086 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
2087 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
2089 if ((Device->le_type != I2O_UNKNOWN)
2090 && (Device->le_bus == bus)
2091 && (Device->le_target == target)
2092 && (Device->le_lun == lun)
2093 && (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF)) {
2094 TID = I2O_LCT_ENTRY_getLocalTID(Device);
2095 ASR_setTid (sc, Device->le_bus,
2096 Device->le_target, Device->le_lun,
2102 if (TID == (tid_t)0) {
2103 return ((PI2O_MESSAGE_FRAME)NULL);
2105 I2O_MESSAGE_FRAME_setTargetAddress(Message_Ptr, TID);
2106 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(
2107 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, TID);
2109 I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11 |
2110 (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT))
2111 / sizeof(U32)) << 4));
2112 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
2113 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2114 - sizeof(I2O_SG_ELEMENT)) / sizeof(U32));
2115 I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1);
2116 I2O_MESSAGE_FRAME_setFunction(Message_Ptr, I2O_PRIVATE_MESSAGE);
2117 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
2118 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, I2O_SCSI_SCB_EXEC);
2119 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (
2120 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
2121 I2O_SCB_FLAG_ENABLE_DISCONNECT
2122 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2123 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
2125 * We do not need any (optional byteswapping) method access to
2126 * the Initiator & Transaction context field.
2128 I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb);
2130 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
2131 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, DPT_ORGANIZATION_ID);
2135 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(
2136 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, ccb->csio.cdb_len);
2137 bcopy (&(ccb->csio.cdb_io),
2138 ((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->CDB, ccb->csio.cdb_len);
2141 * Given a buffer describing a transfer, set up a scatter/gather map
2142 * in a ccb to map that SCSI transfer.
2145 rw = (ccb->ccb_h.flags & CAM_DIR_IN) ? 0 : I2O_SGL_FLAGS_DIR;
2147 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (
2148 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
2149 (ccb->csio.dxfer_len)
2150 ? ((rw) ? (I2O_SCB_FLAG_XFER_TO_DEVICE
2151 | I2O_SCB_FLAG_ENABLE_DISCONNECT
2152 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2153 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)
2154 : (I2O_SCB_FLAG_XFER_FROM_DEVICE
2155 | I2O_SCB_FLAG_ENABLE_DISCONNECT
2156 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2157 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER))
2158 : (I2O_SCB_FLAG_ENABLE_DISCONNECT
2159 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2160 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
2163 * Given a transfer described by a `data', fill in the SG list.
2165 sg = &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->SGL.u.Simple[0];
2167 len = ccb->csio.dxfer_len;
2168 v = ccb->csio.data_ptr;
2169 ASSERT (ccb->csio.dxfer_len >= 0);
2170 MessageSize = I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr);
2171 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount(
2172 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, len);
2173 while ((len > 0) && (sg < &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2174 Message_Ptr)->SGL.u.Simple[SG_SIZE])) {
2176 next = base = KVTOPHYS(v);
2177 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base);
2179 /* How far can we go contiguously */
2180 while ((len > 0) && (base == next)) {
2181 next = trunc_page(base) + PAGE_SIZE;
2192 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span);
2194 rw |= I2O_SGL_FLAGS_LAST_ELEMENT;
2196 I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount),
2197 I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | rw);
2199 MessageSize += sizeof(*sg) / sizeof(U32);
2201 /* We always do the request sense ... */
2202 if ((span = ccb->csio.sense_len) == 0) {
2203 span = sizeof(ccb->csio.sense_data);
2205 SG(sg, 0, I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
2206 &(ccb->csio.sense_data), span);
2207 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
2208 MessageSize + (sizeof(*sg) / sizeof(U32)));
2209 return (Message_Ptr);
2210 } /* ASR_init_message */
2213 * Reset the adapter.
2217 INOUT Asr_softc_t * sc)
2219 struct initOutBoundMessage {
2220 I2O_EXEC_OUTBOUND_INIT_MESSAGE M;
2223 defAlignLong(struct initOutBoundMessage,Message);
2224 PI2O_EXEC_OUTBOUND_INIT_MESSAGE Message_Ptr;
2225 OUT U32 * volatile Reply_Ptr;
2229 * Build up our copy of the Message.
2231 Message_Ptr = (PI2O_EXEC_OUTBOUND_INIT_MESSAGE)ASR_fillMessage(Message,
2232 sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE));
2233 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
2234 I2O_EXEC_OUTBOUND_INIT);
2235 I2O_EXEC_OUTBOUND_INIT_MESSAGE_setHostPageFrameSize(Message_Ptr, PAGE_SIZE);
2236 I2O_EXEC_OUTBOUND_INIT_MESSAGE_setOutboundMFrameSize(Message_Ptr,
2237 sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME));
2239 * Reset the Reply Status
2241 *(Reply_Ptr = (U32 *)((char *)Message_Ptr
2242 + sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE))) = 0;
2243 SG (&(Message_Ptr->SGL), 0, I2O_SGL_FLAGS_LAST_ELEMENT, Reply_Ptr,
2246 * Send the Message out
2248 if ((Old = ASR_initiateCp (sc->ha_Virt, sc->ha_Fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
2252 * Wait for a response (Poll).
2254 while (*Reply_Ptr < I2O_EXEC_OUTBOUND_INIT_REJECTED);
2256 * Re-enable the interrupts.
2258 sc->ha_Virt->Mask = Old;
2260 * Populate the outbound table.
2262 if (sc->ha_Msgs == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) {
2264 /* Allocate the reply frames */
2265 size = sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
2266 * sc->ha_Msgs_Count;
2269 * contigmalloc only works reliably at
2270 * initialization time.
2272 if ((sc->ha_Msgs = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
2273 contigmalloc (size, M_DEVBUF, M_WAITOK, 0ul,
2274 0xFFFFFFFFul, (u_long)sizeof(U32), 0ul))
2275 != (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) {
2276 (void)bzero ((char *)sc->ha_Msgs, size);
2277 sc->ha_Msgs_Phys = KVTOPHYS(sc->ha_Msgs);
2281 /* Initialize the outbound FIFO */
2282 if (sc->ha_Msgs != (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL)
2283 for (size = sc->ha_Msgs_Count, addr = sc->ha_Msgs_Phys;
2285 sc->ha_Virt->FromFIFO = addr;
2286 addr += sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME);
2288 return (*Reply_Ptr);
2291 } /* ASR_initOutBound */
2294 * Set the system table
2298 IN Asr_softc_t * sc)
2300 PI2O_EXEC_SYS_TAB_SET_MESSAGE Message_Ptr;
2301 PI2O_SET_SYSTAB_HEADER SystemTable;
2303 PI2O_SGE_SIMPLE_ELEMENT sg;
2306 if ((SystemTable = (PI2O_SET_SYSTAB_HEADER)malloc (
2307 sizeof(I2O_SET_SYSTAB_HEADER), M_TEMP, M_WAITOK))
2308 == (PI2O_SET_SYSTAB_HEADER)NULL) {
2311 bzero (SystemTable, sizeof(I2O_SET_SYSTAB_HEADER));
2312 for (ha = Asr_softc; ha; ha = ha->ha_next) {
2313 ++SystemTable->NumberEntries;
2315 if ((Message_Ptr = (PI2O_EXEC_SYS_TAB_SET_MESSAGE)malloc (
2316 sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
2317 + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT)),
2318 M_TEMP, M_WAITOK)) == (PI2O_EXEC_SYS_TAB_SET_MESSAGE)NULL) {
2319 free (SystemTable, M_TEMP);
2322 (void)ASR_fillMessage((char *)Message_Ptr,
2323 sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
2324 + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT)));
2325 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
2327 (((sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
2328 / sizeof(U32)) << 4)));
2329 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
2330 I2O_EXEC_SYS_TAB_SET);
2332 * Call the LCT table to determine the number of device entries
2333 * to reserve space for.
2334 * since this code is reused in several systems, code efficiency
2335 * is greater by using a shift operation rather than a divide by
2336 * sizeof(u_int32_t).
2338 sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr
2339 + ((I2O_MESSAGE_FRAME_getVersionOffset(
2340 &(Message_Ptr->StdMessageFrame)) & 0xF0) >> 2));
2341 SG(sg, 0, I2O_SGL_FLAGS_DIR, SystemTable, sizeof(I2O_SET_SYSTAB_HEADER));
2343 for (ha = Asr_softc; ha; ha = ha->ha_next) {
2346 ? (I2O_SGL_FLAGS_DIR)
2347 : (I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER)),
2348 &(ha->ha_SystemTable), sizeof(ha->ha_SystemTable));
2351 SG(sg, 0, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0);
2352 SG(sg, 1, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_LAST_ELEMENT
2353 | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0);
2354 retVal = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
2355 free (Message_Ptr, M_TEMP);
2356 free (SystemTable, M_TEMP);
2358 } /* ASR_setSysTab */
2362 INOUT Asr_softc_t * sc)
2364 defAlignLong(I2O_EXEC_HRT_GET_MESSAGE,Message);
2365 I2O_EXEC_HRT_GET_MESSAGE * Message_Ptr;
2368 I2O_HRT_ENTRY Entry[MAX_CHANNEL];
2370 u_int8_t NumberOfEntries;
2371 PI2O_HRT_ENTRY Entry;
2373 bzero ((void *)&Hrt, sizeof (Hrt));
2374 Message_Ptr = (I2O_EXEC_HRT_GET_MESSAGE *)ASR_fillMessage(Message,
2375 sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
2376 + sizeof(I2O_SGE_SIMPLE_ELEMENT));
2377 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
2379 + (((sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
2380 / sizeof(U32)) << 4)));
2381 I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame),
2385 * Set up the buffers as scatter gather elements.
2387 SG(&(Message_Ptr->SGL), 0,
2388 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
2390 if (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != CAM_REQ_CMP) {
2393 if ((NumberOfEntries = I2O_HRT_getNumberEntries(&Hrt.Header))
2394 > (MAX_CHANNEL + 1)) {
2395 NumberOfEntries = MAX_CHANNEL + 1;
2397 for (Entry = Hrt.Header.HRTEntry;
2398 NumberOfEntries != 0;
2399 ++Entry, --NumberOfEntries) {
2400 PI2O_LCT_ENTRY Device;
2402 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
2403 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
2405 if (I2O_LCT_ENTRY_getLocalTID(Device)
2406 == (I2O_HRT_ENTRY_getAdapterID(Entry) & 0xFFF)) {
2407 Device->le_bus = I2O_HRT_ENTRY_getAdapterID(
2409 if ((Device->le_bus > sc->ha_MaxBus)
2410 && (Device->le_bus <= MAX_CHANNEL)) {
2411 sc->ha_MaxBus = Device->le_bus;
2417 } /* ASR_acquireHrt */
2420 * Enable the adapter.
2424 IN Asr_softc_t * sc)
2426 defAlignLong(I2O_EXEC_SYS_ENABLE_MESSAGE,Message);
2427 PI2O_EXEC_SYS_ENABLE_MESSAGE Message_Ptr;
2429 Message_Ptr = (PI2O_EXEC_SYS_ENABLE_MESSAGE)ASR_fillMessage(Message,
2430 sizeof(I2O_EXEC_SYS_ENABLE_MESSAGE));
2431 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
2432 I2O_EXEC_SYS_ENABLE);
2433 return (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != 0);
2434 } /* ASR_enableSys */
2437 * Perform the stages necessary to initialize the adapter
2441 IN Asr_softc_t * sc)
2443 return ((ASR_initOutBound(sc) == 0)
2444 || (ASR_setSysTab(sc) != CAM_REQ_CMP)
2445 || (ASR_enableSys(sc) != CAM_REQ_CMP));
2449 * Send a Synchronize Cache command to the target device.
2453 IN Asr_softc_t * sc,
2461 * We will not synchronize the device when there are outstanding
2462 * commands issued by the OS (this is due to a locked up device,
2463 * as the OS normally would flush all outstanding commands before
2464 * issuing a shutdown or an adapter reset).
2466 if ((sc != (Asr_softc_t *)NULL)
2467 && (LIST_FIRST(&(sc->ha_ccb)) != (struct ccb_hdr *)NULL)
2468 && ((TID = ASR_getTid (sc, bus, target, lun)) != (tid_t)-1)
2469 && (TID != (tid_t)0)) {
2470 defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message);
2471 PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message_Ptr;
2474 = getAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, Message),
2475 sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2476 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT));
2478 I2O_MESSAGE_FRAME_setVersionOffset(
2479 (PI2O_MESSAGE_FRAME)Message_Ptr,
2481 | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2482 - sizeof(I2O_SG_ELEMENT))
2483 / sizeof(U32)) << 4));
2484 I2O_MESSAGE_FRAME_setMessageSize(
2485 (PI2O_MESSAGE_FRAME)Message_Ptr,
2486 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2487 - sizeof(I2O_SG_ELEMENT))
2489 I2O_MESSAGE_FRAME_setInitiatorAddress (
2490 (PI2O_MESSAGE_FRAME)Message_Ptr, 1);
2491 I2O_MESSAGE_FRAME_setFunction(
2492 (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE);
2493 I2O_MESSAGE_FRAME_setTargetAddress(
2494 (PI2O_MESSAGE_FRAME)Message_Ptr, TID);
2495 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
2496 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
2498 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(Message_Ptr, TID);
2499 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2500 I2O_SCB_FLAG_ENABLE_DISCONNECT
2501 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2502 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
2503 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
2504 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
2505 DPT_ORGANIZATION_ID);
2506 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6);
2507 Message_Ptr->CDB[0] = SYNCHRONIZE_CACHE;
2508 Message_Ptr->CDB[1] = (lun << 5);
2510 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2511 (I2O_SCB_FLAG_XFER_FROM_DEVICE
2512 | I2O_SCB_FLAG_ENABLE_DISCONNECT
2513 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2514 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
2516 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
2523 IN Asr_softc_t * sc)
2525 int bus, target, lun;
2527 for (bus = 0; bus <= sc->ha_MaxBus; ++bus) {
2528 for (target = 0; target <= sc->ha_MaxId; ++target) {
2529 for (lun = 0; lun <= sc->ha_MaxLun; ++lun) {
2530 ASR_sync(sc,bus,target,lun);
2537 * Reset the HBA, targets and BUS.
2538 * Currently this resets *all* the SCSI busses.
2542 IN Asr_softc_t * sc)
2544 ASR_synchronize (sc);
2545 (void)ASR_reset (sc);
2546 } /* asr_hbareset */
2549 * A reduced copy of the real pci_map_mem, incorporating the MAX_MAP
2550 * limit and a reduction in error checking (in the pre 4.0 case).
2554 #if __FreeBSD_version >= 400000
2559 IN Asr_softc_t * sc)
2564 #if __FreeBSD_version >= 400000
2566 * I2O specification says we must find first *memory* mapped BAR
2568 for (rid = PCIR_MAPS;
2569 rid < (PCIR_MAPS + 4 * sizeof(u_int32_t));
2570 rid += sizeof(u_int32_t)) {
2571 p = pci_read_config(tag, rid, sizeof(p));
2579 if (rid >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) {
2582 p = pci_read_config(tag, rid, sizeof(p));
2583 pci_write_config(tag, rid, -1, sizeof(p));
2584 l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15);
2585 pci_write_config(tag, rid, p, sizeof(p));
2590 * The 2005S Zero Channel RAID solution is not a perfect PCI
2591 * citizen. It asks for 4MB on BAR0, and 0MB on BAR1, once
2592 * enabled it rewrites the size of BAR0 to 2MB, sets BAR1 to
2593 * BAR0+2MB and sets it's size to 2MB. The IOP registers are
2594 * accessible via BAR0, the messaging registers are accessible
2595 * via BAR1. If the subdevice code is 50 to 59 decimal.
2597 s = pci_read_config(tag, PCIR_DEVVENDOR, sizeof(s));
2598 if (s != 0xA5111044) {
2599 s = pci_read_config(tag, PCIR_SUBVEND_0, sizeof(s));
2600 if ((((ADPTDOMINATOR_SUB_ID_START ^ s) & 0xF000FFFF) == 0)
2601 && (ADPTDOMINATOR_SUB_ID_START <= s)
2602 && (s <= ADPTDOMINATOR_SUB_ID_END)) {
2603 l = MAX_MAP; /* Conjoined BAR Raptor Daptor */
2607 sc->ha_mem_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid,
2608 p, p + l, l, RF_ACTIVE);
2609 if (sc->ha_mem_res == (struct resource *)NULL) {
2612 sc->ha_Base = (void *)rman_get_start(sc->ha_mem_res);
2613 if (sc->ha_Base == (void *)NULL) {
2616 sc->ha_Virt = (i2oRegs_t *) rman_get_virtual(sc->ha_mem_res);
2617 if (s == 0xA5111044) { /* Split BAR Raptor Daptor */
2618 if ((rid += sizeof(u_int32_t))
2619 >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) {
2622 p = pci_read_config(tag, rid, sizeof(p));
2623 pci_write_config(tag, rid, -1, sizeof(p));
2624 l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15);
2625 pci_write_config(tag, rid, p, sizeof(p));
2630 sc->ha_mes_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid,
2631 p, p + l, l, RF_ACTIVE);
2632 if (sc->ha_mes_res == (struct resource *)NULL) {
2635 if ((void *)rman_get_start(sc->ha_mes_res) == (void *)NULL) {
2638 sc->ha_Fvirt = (U8 *) rman_get_virtual(sc->ha_mes_res);
2640 sc->ha_Fvirt = (U8 *)(sc->ha_Virt);
2643 vm_size_t psize, poffs;
2646 * I2O specification says we must find first *memory* mapped BAR
2648 for (rid = PCI_MAP_REG_START;
2649 rid < (PCI_MAP_REG_START + 4 * sizeof(u_int32_t));
2650 rid += sizeof(u_int32_t)) {
2651 p = pci_conf_read (tag, rid);
2656 if (rid >= (PCI_MAP_REG_START + 4 * sizeof(u_int32_t))) {
2657 rid = PCI_MAP_REG_START;
2660 ** save old mapping, get size and type of memory
2662 ** type is in the lowest four bits.
2663 ** If device requires 2^n bytes, the next
2664 ** n-4 bits are read as 0.
2667 sc->ha_Base = (void *)((p = pci_conf_read (tag, rid))
2668 & PCI_MAP_MEMORY_ADDRESS_MASK);
2669 pci_conf_write (tag, rid, 0xfffffffful);
2670 l = pci_conf_read (tag, rid);
2671 pci_conf_write (tag, rid, p);
2677 if (!((l & PCI_MAP_MEMORY_TYPE_MASK) == PCI_MAP_MEMORY_TYPE_32BIT_1M
2678 && ((u_long)sc->ha_Base & ~0xfffff) == 0)
2679 && ((l & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT)) {
2681 "asr_pci_map_mem failed: bad memory type=0x%x\n",
2690 psize = -(l & PCI_MAP_MEMORY_ADDRESS_MASK);
2691 if (psize > MAX_MAP) {
2695 * The 2005S Zero Channel RAID solution is not a perfect PCI
2696 * citizen. It asks for 4MB on BAR0, and 0MB on BAR1, once
2697 * enabled it rewrites the size of BAR0 to 2MB, sets BAR1 to
2698 * BAR0+2MB and sets it's size to 2MB. The IOP registers are
2699 * accessible via BAR0, the messaging registers are accessible
2700 * via BAR1. If the subdevice code is 50 to 59 decimal.
2702 s = pci_read_config(tag, PCIR_DEVVENDOR, sizeof(s));
2703 if (s != 0xA5111044) {
2704 s = pci_conf_read (tag, PCIR_SUBVEND_0)
2705 if ((((ADPTDOMINATOR_SUB_ID_START ^ s) & 0xF000FFFF) == 0)
2706 && (ADPTDOMINATOR_SUB_ID_START <= s)
2707 && (s <= ADPTDOMINATOR_SUB_ID_END)) {
2712 if ((sc->ha_Base == (void *)NULL)
2713 || (sc->ha_Base == (void *)PCI_MAP_MEMORY_ADDRESS_MASK)) {
2714 debug_asr_printf ("asr_pci_map_mem: not configured by bios.\n");
2719 ** Truncate sc->ha_Base to page boundary.
2720 ** (Or does pmap_mapdev the job?)
2723 poffs = (u_long)sc->ha_Base - trunc_page ((u_long)sc->ha_Base);
2724 sc->ha_Virt = (i2oRegs_t *)pmap_mapdev ((u_long)sc->ha_Base - poffs,
2727 if (sc->ha_Virt == (i2oRegs_t *)NULL) {
2731 sc->ha_Virt = (i2oRegs_t *)((u_long)sc->ha_Virt + poffs);
2732 if (s == 0xA5111044) {
2733 if ((rid += sizeof(u_int32_t))
2734 >= (PCI_MAP_REG_START + 4 * sizeof(u_int32_t))) {
2739 ** save old mapping, get size and type of memory
2741 ** type is in the lowest four bits.
2742 ** If device requires 2^n bytes, the next
2743 ** n-4 bits are read as 0.
2746 if ((((p = pci_conf_read (tag, rid))
2747 & PCI_MAP_MEMORY_ADDRESS_MASK) == 0L)
2748 || ((p & PCI_MAP_MEMORY_ADDRESS_MASK)
2749 == PCI_MAP_MEMORY_ADDRESS_MASK)) {
2750 debug_asr_printf ("asr_pci_map_mem: not configured by bios.\n");
2752 pci_conf_write (tag, rid, 0xfffffffful);
2753 l = pci_conf_read (tag, rid);
2754 pci_conf_write (tag, rid, p);
2755 p &= PCI_MAP_MEMORY_TYPE_MASK;
2761 if (!((l & PCI_MAP_MEMORY_TYPE_MASK)
2762 == PCI_MAP_MEMORY_TYPE_32BIT_1M
2763 && (p & ~0xfffff) == 0)
2764 && ((l & PCI_MAP_MEMORY_TYPE_MASK)
2765 != PCI_MAP_MEMORY_TYPE_32BIT)) {
2767 "asr_pci_map_mem failed: bad memory type=0x%x\n",
2776 psize = -(l & PCI_MAP_MEMORY_ADDRESS_MASK);
2777 if (psize > MAX_MAP) {
2782 ** Truncate p to page boundary.
2783 ** (Or does pmap_mapdev the job?)
2786 poffs = p - trunc_page (p);
2787 sc->ha_Fvirt = (U8 *)pmap_mapdev (p - poffs, psize + poffs);
2789 if (sc->ha_Fvirt == (U8 *)NULL) {
2793 sc->ha_Fvirt = (U8 *)((u_long)sc->ha_Fvirt + poffs);
2795 sc->ha_Fvirt = (U8 *)(sc->ha_Virt);
2799 } /* asr_pci_map_mem */
2802 * A simplified copy of the real pci_map_int with additional
2803 * registration requirements.
2807 #if __FreeBSD_version >= 400000
2812 IN Asr_softc_t * sc)
2814 #if __FreeBSD_version >= 400000
2817 sc->ha_irq_res = bus_alloc_resource(tag, SYS_RES_IRQ, &rid,
2818 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
2819 if (sc->ha_irq_res == (struct resource *)NULL) {
2822 if (bus_setup_intr(tag, sc->ha_irq_res, INTR_TYPE_CAM,
2823 (driver_intr_t *)asr_intr, (void *)sc, &(sc->ha_intr))) {
2826 sc->ha_irq = pci_read_config(tag, PCIR_INTLINE, sizeof(char));
2828 if (!pci_map_int(tag, (pci_inthand_t *)asr_intr,
2829 (void *)sc, &cam_imask)) {
2832 sc->ha_irq = pci_conf_read(tag, PCIR_INTLINE);
2835 } /* asr_pci_map_int */
2838 * Attach the devices, and virtual devices to the driver list.
2841 asr_attach (ATTACH_ARGS)
2844 struct scsi_inquiry_data * iq;
2847 if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT)) == (Asr_softc_t *)NULL) {
2848 ATTACH_RETURN(ENOMEM);
2850 if (Asr_softc == (Asr_softc_t *)NULL) {
2852 * Fixup the OS revision as saved in the dptsig for the
2853 * engine (dptioctl.h) to pick up.
2855 bcopy (osrelease, &ASR_sig.dsDescription[16], 5);
2856 printf ("asr%d: major=%d\n", unit, asr_cdevsw.d_maj);
2859 * Initialize the software structure
2861 bzero (sc, sizeof(*sc));
2862 LIST_INIT(&(sc->ha_ccb));
2863 # ifdef ASR_MEASURE_PERFORMANCE
2867 // initialize free list for timeQ
2868 sc->ha_timeQFreeHead = 0;
2869 sc->ha_timeQFreeTail = MAX_TIMEQ_SIZE - 1;
2870 for (i = 0; i < MAX_TIMEQ_SIZE; i++) {
2871 sc->ha_timeQFreeList[i] = i;
2875 /* Link us into the HA list */
2879 for (ha = &Asr_softc; *ha; ha = &((*ha)->ha_next));
2883 PI2O_EXEC_STATUS_GET_REPLY status;
2887 * This is the real McCoy!
2889 if (!asr_pci_map_mem(tag, sc)) {
2890 printf ("asr%d: could not map memory\n", unit);
2891 ATTACH_RETURN(ENXIO);
2893 /* Enable if not formerly enabled */
2894 #if __FreeBSD_version >= 400000
2895 pci_write_config (tag, PCIR_COMMAND,
2896 pci_read_config (tag, PCIR_COMMAND, sizeof(char))
2897 | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN, sizeof(char));
2898 /* Knowledge is power, responsibility is direct */
2900 struct pci_devinfo {
2901 STAILQ_ENTRY(pci_devinfo) pci_links;
2902 struct resource_list resources;
2904 } * dinfo = device_get_ivars(tag);
2905 sc->ha_pciBusNum = dinfo->cfg.bus;
2906 sc->ha_pciDeviceNum = (dinfo->cfg.slot << 3)
2910 pci_conf_write (tag, PCIR_COMMAND,
2911 pci_conf_read (tag, PCIR_COMMAND)
2912 | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
2913 /* Knowledge is power, responsibility is direct */
2914 switch (pci_mechanism) {
2917 sc->ha_pciBusNum = tag.cfg1 >> 16;
2918 sc->ha_pciDeviceNum = tag.cfg1 >> 8;
2921 sc->ha_pciBusNum = tag.cfg2.forward;
2922 sc->ha_pciDeviceNum = ((tag.cfg2.enable >> 1) & 7)
2923 | (tag.cfg2.port >> 5);
2926 /* Check if the device is there? */
2927 if ((ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt) == 0)
2928 || ((status = (PI2O_EXEC_STATUS_GET_REPLY)malloc (
2929 sizeof(I2O_EXEC_STATUS_GET_REPLY), M_TEMP, M_WAITOK))
2930 == (PI2O_EXEC_STATUS_GET_REPLY)NULL)
2931 || (ASR_getStatus(sc->ha_Virt, sc->ha_Fvirt, status) == NULL)) {
2932 printf ("asr%d: could not initialize hardware\n", unit);
2933 ATTACH_RETURN(ENODEV); /* Get next, maybe better luck */
2935 sc->ha_SystemTable.OrganizationID = status->OrganizationID;
2936 sc->ha_SystemTable.IOP_ID = status->IOP_ID;
2937 sc->ha_SystemTable.I2oVersion = status->I2oVersion;
2938 sc->ha_SystemTable.IopState = status->IopState;
2939 sc->ha_SystemTable.MessengerType = status->MessengerType;
2940 sc->ha_SystemTable.InboundMessageFrameSize
2941 = status->InboundMFrameSize;
2942 sc->ha_SystemTable.MessengerInfo.InboundMessagePortAddressLow
2943 = (U32)(sc->ha_Base) + (U32)(&(((i2oRegs_t *)NULL)->ToFIFO));
2945 if (!asr_pci_map_int(tag, (void *)sc)) {
2946 printf ("asr%d: could not map interrupt\n", unit);
2947 ATTACH_RETURN(ENXIO);
2950 /* Adjust the maximim inbound count */
2951 if (((sc->ha_QueueSize
2952 = I2O_EXEC_STATUS_GET_REPLY_getMaxInboundMFrames(status))
2954 || (sc->ha_QueueSize == 0)) {
2955 sc->ha_QueueSize = MAX_INBOUND;
2958 /* Adjust the maximum outbound count */
2959 if (((sc->ha_Msgs_Count
2960 = I2O_EXEC_STATUS_GET_REPLY_getMaxOutboundMFrames(status))
2962 || (sc->ha_Msgs_Count == 0)) {
2963 sc->ha_Msgs_Count = MAX_OUTBOUND;
2965 if (sc->ha_Msgs_Count > sc->ha_QueueSize) {
2966 sc->ha_Msgs_Count = sc->ha_QueueSize;
2969 /* Adjust the maximum SG size to adapter */
2970 if ((size = (I2O_EXEC_STATUS_GET_REPLY_getInboundMFrameSize(
2971 status) << 2)) > MAX_INBOUND_SIZE) {
2972 size = MAX_INBOUND_SIZE;
2974 free (status, M_TEMP);
2975 sc->ha_SgSize = (size - sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2976 + sizeof(I2O_SG_ELEMENT)) / sizeof(I2O_SGE_SIMPLE_ELEMENT);
2980 * Only do a bus/HBA reset on the first time through. On this
2981 * first time through, we do not send a flush to the devices.
2983 if (ASR_init(sc) == 0) {
2985 I2O_PARAM_RESULTS_LIST_HEADER Header;
2986 I2O_PARAM_READ_OPERATION_RESULT Read;
2987 I2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info;
2989 defAlignLong (struct BufferInfo, Buffer);
2990 PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info;
2991 # define FW_DEBUG_BLED_OFFSET 8
2993 if ((Info = (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)
2994 ASR_getParams(sc, 0,
2995 I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO,
2996 Buffer, sizeof(struct BufferInfo)))
2997 != (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)NULL) {
2998 sc->ha_blinkLED = sc->ha_Fvirt
2999 + I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputOffset(Info)
3000 + FW_DEBUG_BLED_OFFSET;
3002 if (ASR_acquireLct(sc) == 0) {
3003 (void)ASR_acquireHrt(sc);
3006 printf ("asr%d: failed to initialize\n", unit);
3007 ATTACH_RETURN(ENXIO);
3010 * Add in additional probe responses for more channels. We
3011 * are reusing the variable `target' for a channel loop counter.
3012 * Done here because of we need both the acquireLct and
3015 { PI2O_LCT_ENTRY Device;
3017 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
3018 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
3020 if (Device->le_type == I2O_UNKNOWN) {
3023 if (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF) {
3024 if (Device->le_target > sc->ha_MaxId) {
3025 sc->ha_MaxId = Device->le_target;
3027 if (Device->le_lun > sc->ha_MaxLun) {
3028 sc->ha_MaxLun = Device->le_lun;
3031 if (((Device->le_type & I2O_PORT) != 0)
3032 && (Device->le_bus <= MAX_CHANNEL)) {
3033 /* Do not increase MaxId for efficiency */
3034 sc->ha_adapter_target[Device->le_bus]
3035 = Device->le_target;
3042 * Print the HBA model number as inquired from the card.
3045 printf ("asr%d:", unit);
3047 if ((iq = (struct scsi_inquiry_data *)malloc (
3048 sizeof(struct scsi_inquiry_data), M_TEMP, M_WAITOK))
3049 != (struct scsi_inquiry_data *)NULL) {
3050 defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message);
3051 PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message_Ptr;
3054 bzero (iq, sizeof(struct scsi_inquiry_data));
3056 = getAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, Message),
3057 sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
3058 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT));
3060 I2O_MESSAGE_FRAME_setVersionOffset(
3061 (PI2O_MESSAGE_FRAME)Message_Ptr,
3063 | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
3064 - sizeof(I2O_SG_ELEMENT))
3065 / sizeof(U32)) << 4));
3066 I2O_MESSAGE_FRAME_setMessageSize(
3067 (PI2O_MESSAGE_FRAME)Message_Ptr,
3068 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
3069 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT))
3071 I2O_MESSAGE_FRAME_setInitiatorAddress (
3072 (PI2O_MESSAGE_FRAME)Message_Ptr, 1);
3073 I2O_MESSAGE_FRAME_setFunction(
3074 (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE);
3075 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
3076 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
3078 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
3079 I2O_SCB_FLAG_ENABLE_DISCONNECT
3080 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
3081 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
3082 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setInterpret(Message_Ptr, 1);
3083 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
3084 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
3085 DPT_ORGANIZATION_ID);
3086 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6);
3087 Message_Ptr->CDB[0] = INQUIRY;
3088 Message_Ptr->CDB[4] = (unsigned char)sizeof(struct scsi_inquiry_data);
3089 if (Message_Ptr->CDB[4] == 0) {
3090 Message_Ptr->CDB[4] = 255;
3093 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
3094 (I2O_SCB_FLAG_XFER_FROM_DEVICE
3095 | I2O_SCB_FLAG_ENABLE_DISCONNECT
3096 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
3097 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
3099 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount(
3100 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
3101 sizeof(struct scsi_inquiry_data));
3102 SG(&(Message_Ptr->SGL), 0,
3103 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
3104 iq, sizeof(struct scsi_inquiry_data));
3105 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
3107 if (iq->vendor[0] && (iq->vendor[0] != ' ')) {
3109 ASR_prstring (iq->vendor, 8);
3112 if (iq->product[0] && (iq->product[0] != ' ')) {
3114 ASR_prstring (iq->product, 16);
3117 if (iq->revision[0] && (iq->revision[0] != ' ')) {
3118 printf (" FW Rev. ");
3119 ASR_prstring (iq->revision, 4);
3122 free ((caddr_t)iq, M_TEMP);
3127 printf (" %d channel, %d CCBs, Protocol I2O\n", sc->ha_MaxBus + 1,
3128 (sc->ha_QueueSize > MAX_INBOUND) ? MAX_INBOUND : sc->ha_QueueSize);
3131 * fill in the prototype cam_path.
3135 union asr_ccb * ccb;
3137 if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) {
3138 printf ("asr%d: CAM could not be notified of asynchronous callback parameters\n", unit);
3139 ATTACH_RETURN(ENOMEM);
3141 for (bus = 0; bus <= sc->ha_MaxBus; ++bus) {
3142 struct cam_devq * devq;
3143 int QueueSize = sc->ha_QueueSize;
3145 if (QueueSize > MAX_INBOUND) {
3146 QueueSize = MAX_INBOUND;
3150 * Create the device queue for our SIM(s).
3152 if ((devq = cam_simq_alloc(QueueSize)) == NULL) {
3157 * Construct our first channel SIM entry
3159 sc->ha_sim[bus] = cam_sim_alloc(
3160 asr_action, asr_poll, "asr", sc,
3161 unit, 1, QueueSize, devq);
3162 if (sc->ha_sim[bus] == NULL) {
3166 if (xpt_bus_register(sc->ha_sim[bus], bus)
3168 cam_sim_free(sc->ha_sim[bus],
3170 sc->ha_sim[bus] = NULL;
3174 if (xpt_create_path(&(sc->ha_path[bus]), /*periph*/NULL,
3175 cam_sim_path(sc->ha_sim[bus]), CAM_TARGET_WILDCARD,
3176 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3178 cam_sim_path(sc->ha_sim[bus]));
3179 cam_sim_free(sc->ha_sim[bus],
3181 sc->ha_sim[bus] = NULL;
3188 * Generate the device node information
3190 (void)make_dev(&asr_cdevsw, unit, 0, 0, S_IRWXU, "rasr%d", unit);
3191 destroy_dev(makedev(asr_cdevsw.d_maj,unit+1));
3197 IN struct cam_sim *sim)
3199 asr_intr(cam_sim_softc(sim));
3204 IN struct cam_sim * sim,
3207 struct Asr_softc * sc;
3209 debug_asr_printf ("asr_action(%lx,%lx{%x})\n",
3210 (u_long)sim, (u_long)ccb, ccb->ccb_h.func_code);
3212 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("asr_action\n"));
3214 ccb->ccb_h.spriv_ptr0 = sc = (struct Asr_softc *)cam_sim_softc(sim);
3216 switch (ccb->ccb_h.func_code) {
3218 /* Common cases first */
3219 case XPT_SCSI_IO: /* Execute the requested I/O operation */
3222 char M[MAX_INBOUND_SIZE];
3224 defAlignLong(struct Message,Message);
3225 PI2O_MESSAGE_FRAME Message_Ptr;
3227 /* Reject incoming commands while we are resetting the card */
3228 if (sc->ha_in_reset != HA_OPERATIONAL) {
3229 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3230 if (sc->ha_in_reset >= HA_OFF_LINE) {
3231 /* HBA is now off-line */
3232 ccb->ccb_h.status |= CAM_UNREC_HBA_ERROR;
3234 /* HBA currently resetting, try again later. */
3235 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
3237 debug_asr_cmd_printf (" e\n");
3239 debug_asr_cmd_printf (" q\n");
3242 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3244 "asr%d WARNING: scsi_cmd(%x) already done on b%dt%du%d\n",
3245 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)),
3246 ccb->csio.cdb_io.cdb_bytes[0],
3248 ccb->ccb_h.target_id,
3249 ccb->ccb_h.target_lun);
3251 debug_asr_cmd_printf ("(%d,%d,%d,%d)",
3254 ccb->ccb_h.target_id,
3255 ccb->ccb_h.target_lun);
3256 debug_asr_cmd_dump_ccb(ccb);
3258 if ((Message_Ptr = ASR_init_message ((union asr_ccb *)ccb,
3259 (PI2O_MESSAGE_FRAME)Message)) != (PI2O_MESSAGE_FRAME)NULL) {
3260 debug_asr_cmd2_printf ("TID=%x:\n",
3261 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getTID(
3262 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr));
3263 debug_asr_cmd2_dump_message(Message_Ptr);
3264 debug_asr_cmd1_printf (" q");
3266 if (ASR_queue (sc, Message_Ptr) == EMPTY_QUEUE) {
3267 #ifdef ASR_MEASURE_PERFORMANCE
3268 ++sc->ha_performance.command_too_busy;
3270 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3271 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
3272 debug_asr_cmd_printf (" E\n");
3275 debug_asr_cmd_printf (" Q\n");
3279 * We will get here if there is no valid TID for the device
3280 * referenced in the scsi command packet.
3282 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3283 ccb->ccb_h.status |= CAM_SEL_TIMEOUT;
3284 debug_asr_cmd_printf (" B\n");
3289 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
3290 /* Rese HBA device ... */
3292 ccb->ccb_h.status = CAM_REQ_CMP;
3296 # if (defined(REPORT_LUNS))
3299 case XPT_ABORT: /* Abort the specified CCB */
3301 ccb->ccb_h.status = CAM_REQ_INVALID;
3305 case XPT_SET_TRAN_SETTINGS:
3307 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
3311 case XPT_GET_TRAN_SETTINGS:
3312 /* Get default/user set transfer settings for the target */
3314 struct ccb_trans_settings *cts;
3318 target_mask = 0x01 << ccb->ccb_h.target_id;
3319 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
3320 cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB;
3321 cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
3322 cts->sync_period = 6; /* 40MHz */
3323 cts->sync_offset = 15;
3325 cts->valid = CCB_TRANS_SYNC_RATE_VALID
3326 | CCB_TRANS_SYNC_OFFSET_VALID
3327 | CCB_TRANS_BUS_WIDTH_VALID
3328 | CCB_TRANS_DISC_VALID
3329 | CCB_TRANS_TQ_VALID;
3330 ccb->ccb_h.status = CAM_REQ_CMP;
3332 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
3338 case XPT_CALC_GEOMETRY:
3340 struct ccb_calc_geometry *ccg;
3342 u_int32_t secs_per_cylinder;
3345 size_mb = ccg->volume_size
3346 / ((1024L * 1024L) / ccg->block_size);
3348 if (size_mb > 4096) {
3350 ccg->secs_per_track = 63;
3351 } else if (size_mb > 2048) {
3353 ccg->secs_per_track = 63;
3354 } else if (size_mb > 1024) {
3356 ccg->secs_per_track = 63;
3359 ccg->secs_per_track = 32;
3361 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
3362 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
3363 ccb->ccb_h.status = CAM_REQ_CMP;
3368 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
3369 ASR_resetBus (sc, cam_sim_bus(sim));
3370 ccb->ccb_h.status = CAM_REQ_CMP;
3374 case XPT_TERM_IO: /* Terminate the I/O process */
3376 ccb->ccb_h.status = CAM_REQ_INVALID;
3380 case XPT_PATH_INQ: /* Path routing inquiry */
3382 struct ccb_pathinq *cpi = &(ccb->cpi);
3384 cpi->version_num = 1; /* XXX??? */
3385 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
3386 cpi->target_sprt = 0;
3387 /* Not necessary to reset bus, done by HDM initialization */
3388 cpi->hba_misc = PIM_NOBUSRESET;
3389 cpi->hba_eng_cnt = 0;
3390 cpi->max_target = sc->ha_MaxId;
3391 cpi->max_lun = sc->ha_MaxLun;
3392 cpi->initiator_id = sc->ha_adapter_target[cam_sim_bus(sim)];
3393 cpi->bus_id = cam_sim_bus(sim);
3394 cpi->base_transfer_speed = 3300;
3395 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
3396 strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
3397 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
3398 cpi->unit_number = cam_sim_unit(sim);
3399 cpi->ccb_h.status = CAM_REQ_CMP;
3404 ccb->ccb_h.status = CAM_REQ_INVALID;
3410 #ifdef ASR_MEASURE_PERFORMANCE
3413 #define min_submitR sc->ha_performance.read_by_size_min_time[index]
3414 #define max_submitR sc->ha_performance.read_by_size_max_time[index]
3415 #define min_submitW sc->ha_performance.write_by_size_min_time[index]
3416 #define max_submitW sc->ha_performance.write_by_size_max_time[index]
3420 IN Asr_softc_t * sc,
3421 IN u_int32_t submitted_time,
3425 struct timeval submitted_timeval;
3427 submitted_timeval.tv_sec = 0;
3428 submitted_timeval.tv_usec = submitted_time;
3430 if ( op == READ_OP ) {
3431 ++sc->ha_performance.read_by_size_count[index];
3433 if ( submitted_time != 0xffffffff ) {
3435 &(sc->ha_performance.read_by_size_total_time[index]),
3436 &submitted_timeval);
3437 if ( (min_submitR == 0)
3438 || (submitted_time < min_submitR) ) {
3439 min_submitR = submitted_time;
3442 if ( submitted_time > max_submitR ) {
3443 max_submitR = submitted_time;
3447 ++sc->ha_performance.write_by_size_count[index];
3448 if ( submitted_time != 0xffffffff ) {
3450 &(sc->ha_performance.write_by_size_total_time[index]),
3451 &submitted_timeval);
3452 if ( (submitted_time < min_submitW)
3453 || (min_submitW == 0) ) {
3454 min_submitW = submitted_time;
3457 if ( submitted_time > max_submitW ) {
3458 max_submitW = submitted_time;
3462 } /* asr_IObySize */
3466 * Handle processing of current CCB as pointed to by the Status.
3470 IN Asr_softc_t * sc)
3474 #ifdef ASR_MEASURE_PERFORMANCE
3475 struct timeval junk;
3478 sc->ha_performance.intr_started = junk;
3482 sc->ha_Virt->Status & Mask_InterruptsDisabled;
3484 union asr_ccb * ccb;
3486 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply;
3488 if (((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE)
3489 && ((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE)) {
3492 Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)(ReplyOffset
3493 - sc->ha_Msgs_Phys + (char *)(sc->ha_Msgs));
3495 * We do not need any (optional byteswapping) method access to
3496 * the Initiator context field.
3498 ccb = (union asr_ccb *)(long)
3499 I2O_MESSAGE_FRAME_getInitiatorContext64(
3500 &(Reply->StdReplyFrame.StdMessageFrame));
3501 if (I2O_MESSAGE_FRAME_getMsgFlags(
3502 &(Reply->StdReplyFrame.StdMessageFrame))
3503 & I2O_MESSAGE_FLAGS_FAIL) {
3504 defAlignLong(I2O_UTIL_NOP_MESSAGE,Message);
3505 PI2O_UTIL_NOP_MESSAGE Message_Ptr;
3508 MessageOffset = (u_long)
3509 I2O_FAILURE_REPLY_MESSAGE_FRAME_getPreservedMFA(
3510 (PI2O_FAILURE_REPLY_MESSAGE_FRAME)Reply);
3512 * Get the Original Message Frame's address, and get
3513 * it's Transaction Context into our space. (Currently
3514 * unused at original authorship, but better to be
3515 * safe than sorry). Straight copy means that we
3516 * need not concern ourselves with the (optional
3517 * byteswapping) method access.
3519 Reply->StdReplyFrame.TransactionContext
3520 = ((PI2O_SINGLE_REPLY_MESSAGE_FRAME)
3521 (sc->ha_Fvirt + MessageOffset))->TransactionContext;
3523 * For 64 bit machines, we need to reconstruct the
3526 ccb = (union asr_ccb *)(long)
3527 I2O_MESSAGE_FRAME_getInitiatorContext64(
3528 &(Reply->StdReplyFrame.StdMessageFrame));
3530 * Unique error code for command failure.
3532 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
3533 &(Reply->StdReplyFrame), (u_int16_t)-2);
3535 * Modify the message frame to contain a NOP and
3536 * re-issue it to the controller.
3538 Message_Ptr = (PI2O_UTIL_NOP_MESSAGE)ASR_fillMessage(
3539 Message, sizeof(I2O_UTIL_NOP_MESSAGE));
3540 # if (I2O_UTIL_NOP != 0)
3541 I2O_MESSAGE_FRAME_setFunction (
3542 &(Message_Ptr->StdMessageFrame),
3546 * Copy the packet out to the Original Message
3548 bcopy ((caddr_t)Message_Ptr,
3549 sc->ha_Fvirt + MessageOffset,
3550 sizeof(I2O_UTIL_NOP_MESSAGE));
3554 sc->ha_Virt->ToFIFO = MessageOffset;
3558 * Asynchronous command with no return requirements,
3559 * and a generic handler for immunity against odd error
3560 * returns from the adapter.
3562 if (ccb == (union asr_ccb *)NULL) {
3564 * Return Reply so that it can be used for the
3567 sc->ha_Virt->FromFIFO = ReplyOffset;
3571 /* Welease Wadjah! (and stop timeouts) */
3572 ASR_ccbRemove (sc, ccb);
3575 I2O_SINGLE_REPLY_MESSAGE_FRAME_getDetailedStatusCode(
3576 &(Reply->StdReplyFrame))) {
3578 case I2O_SCSI_DSC_SUCCESS:
3579 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3580 ccb->ccb_h.status |= CAM_REQ_CMP;
3583 case I2O_SCSI_DSC_CHECK_CONDITION:
3584 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3585 ccb->ccb_h.status |= CAM_REQ_CMP|CAM_AUTOSNS_VALID;
3588 case I2O_SCSI_DSC_BUSY:
3590 case I2O_SCSI_HBA_DSC_ADAPTER_BUSY:
3592 case I2O_SCSI_HBA_DSC_SCSI_BUS_RESET:
3594 case I2O_SCSI_HBA_DSC_BUS_BUSY:
3595 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3596 ccb->ccb_h.status |= CAM_SCSI_BUSY;
3599 case I2O_SCSI_HBA_DSC_SELECTION_TIMEOUT:
3600 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3601 ccb->ccb_h.status |= CAM_SEL_TIMEOUT;
3604 case I2O_SCSI_HBA_DSC_COMMAND_TIMEOUT:
3606 case I2O_SCSI_HBA_DSC_DEVICE_NOT_PRESENT:
3608 case I2O_SCSI_HBA_DSC_LUN_INVALID:
3610 case I2O_SCSI_HBA_DSC_SCSI_TID_INVALID:
3611 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3612 ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
3615 case I2O_SCSI_HBA_DSC_DATA_OVERRUN:
3617 case I2O_SCSI_HBA_DSC_REQUEST_LENGTH_ERROR:
3618 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3619 ccb->ccb_h.status |= CAM_DATA_RUN_ERR;
3623 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3624 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
3627 if ((ccb->csio.resid = ccb->csio.dxfer_len) != 0) {
3629 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getTransferCount(
3633 #ifdef ASR_MEASURE_PERFORMANCE
3635 struct timeval endTime;
3636 u_int32_t submitted_time;
3641 --sc->ha_submitted_ccbs_count;
3643 = (int)Reply->StdReplyFrame.TransactionContext;
3644 if (-1 != startTimeIndex) {
3645 /* Compute the time spent in device/adapter */
3646 microtime(&endTime);
3647 submitted_time = asr_time_delta(sc->ha_timeQ[
3648 startTimeIndex], endTime);
3649 /* put the startTimeIndex back on free list */
3650 ENQ_TIMEQ_FREE_LIST(startTimeIndex,
3651 sc->ha_timeQFreeList,
3652 sc->ha_timeQFreeHead,
3653 sc->ha_timeQFreeTail);
3655 submitted_time = 0xffffffff;
3658 #define maxctime sc->ha_performance.max_command_time[ccb->csio.cdb_io.cdb_bytes[0]]
3659 #define minctime sc->ha_performance.min_command_time[ccb->csio.cdb_io.cdb_bytes[0]]
3660 if (submitted_time != 0xffffffff) {
3661 if ( maxctime < submitted_time ) {
3662 maxctime = submitted_time;
3664 if ( (minctime == 0)
3665 || (minctime > submitted_time) ) {
3666 minctime = submitted_time;
3669 if ( sc->ha_performance.max_submit_time
3670 < submitted_time ) {
3671 sc->ha_performance.max_submit_time
3674 if ( sc->ha_performance.min_submit_time == 0
3675 || sc->ha_performance.min_submit_time
3677 sc->ha_performance.min_submit_time
3681 switch ( ccb->csio.cdb_io.cdb_bytes[0] ) {
3683 case 0xa8: /* 12-byte READ */
3685 case 0x08: /* 6-byte READ */
3687 case 0x28: /* 10-byte READ */
3691 case 0x0a: /* 6-byte WRITE */
3693 case 0xaa: /* 12-byte WRITE */
3695 case 0x2a: /* 10-byte WRITE */
3704 if ( op_type != 0 ) {
3705 struct scsi_rw_big * cmd;
3707 cmd = (struct scsi_rw_big *)
3708 &(ccb->csio.cdb_io);
3710 size = (((u_int32_t) cmd->length2 << 8)
3711 | ((u_int32_t) cmd->length1)) << 9;
3717 submitted_time, op_type,
3723 submitted_time, op_type,
3729 submitted_time, op_type,
3735 submitted_time, op_type,
3741 submitted_time, op_type,
3747 submitted_time, op_type,
3753 submitted_time, op_type,
3759 submitted_time, op_type,
3764 if ( size > (1 << 16) ) {
3781 /* Sense data in reply packet */
3782 if (ccb->ccb_h.status & CAM_AUTOSNS_VALID) {
3783 u_int16_t size = I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getAutoSenseTransferCount(Reply);
3786 if (size > sizeof(ccb->csio.sense_data)) {
3787 size = sizeof(ccb->csio.sense_data);
3789 if (size > I2O_SCSI_SENSE_DATA_SZ) {
3790 size = I2O_SCSI_SENSE_DATA_SZ;
3792 if ((ccb->csio.sense_len)
3793 && (size > ccb->csio.sense_len)) {
3794 size = ccb->csio.sense_len;
3796 bcopy ((caddr_t)Reply->SenseData,
3797 (caddr_t)&(ccb->csio.sense_data), size);
3802 * Return Reply so that it can be used for the next command
3803 * since we have no more need for it now
3805 sc->ha_Virt->FromFIFO = ReplyOffset;
3807 if (ccb->ccb_h.path) {
3808 xpt_done ((union ccb *)ccb);
3810 wakeup ((caddr_t)ccb);
3813 #ifdef ASR_MEASURE_PERFORMANCE
3818 result = asr_time_delta(sc->ha_performance.intr_started, junk);
3820 if (result != 0xffffffff) {
3821 if ( sc->ha_performance.max_intr_time < result ) {
3822 sc->ha_performance.max_intr_time = result;
3825 if ( (sc->ha_performance.min_intr_time == 0)
3826 || (sc->ha_performance.min_intr_time > result) ) {
3827 sc->ha_performance.min_intr_time = result;
3835 #undef QueueSize /* Grrrr */
3836 #undef SG_Size /* Grrrr */
3839 * Meant to be included at the bottom of asr.c !!!
3843 * Included here as hard coded. Done because other necessary include
3844 * files utilize C++ comment structures which make them a nuisance to
3845 * included here just to pick up these three typedefs.
3847 typedef U32 DPT_TAG_T;
3848 typedef U32 DPT_MSG_T;
3849 typedef U32 DPT_RTN_T;
3851 #undef SCSI_RESET /* Conflicts with "scsi/scsiconf.h" defintion */
3852 #include "osd_unix.h"
3854 #define asr_unit(dev) minor(dev)
3856 STATIC INLINE Asr_softc_t *
3860 int unit = asr_unit(dev);
3861 OUT Asr_softc_t * sc = Asr_softc;
3863 while (sc && sc->ha_sim[0] && (cam_sim_unit(sc->ha_sim[0]) != unit)) {
3869 STATIC u_int8_t ASR_ctlr_held;
3870 #if (!defined(UNREFERENCED_PARAMETER))
3871 # define UNREFERENCED_PARAMETER(x) (void)(x)
3883 UNREFERENCED_PARAMETER(flags);
3884 UNREFERENCED_PARAMETER(ifmt);
3886 if (ASR_get_sc (dev) == (Asr_softc_t *)NULL) {
3889 KKASSERT(td->td_proc);
3891 if (ASR_ctlr_held) {
3893 } else if ((error = suser_cred(td->td_proc->p_ucred, 0)) == 0) {
3907 UNREFERENCED_PARAMETER(dev);
3908 UNREFERENCED_PARAMETER(flags);
3909 UNREFERENCED_PARAMETER(ifmt);
3910 UNREFERENCED_PARAMETER(td);
3917 /*-------------------------------------------------------------------------*/
3918 /* Function ASR_queue_i */
3919 /*-------------------------------------------------------------------------*/
3920 /* The Parameters Passed To This Function Are : */
3921 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */
3922 /* PI2O_MESSAGE_FRAME : Msg Structure Pointer For This Command */
3923 /* I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME following the Msg Structure */
3925 /* This Function Will Take The User Request Packet And Convert It To An */
3926 /* I2O MSG And Send It Off To The Adapter. */
3928 /* Return : 0 For OK, Error Code Otherwise */
3929 /*-------------------------------------------------------------------------*/
3932 IN Asr_softc_t * sc,
3933 INOUT PI2O_MESSAGE_FRAME Packet)
3935 union asr_ccb * ccb;
3936 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply;
3937 PI2O_MESSAGE_FRAME Message_Ptr;
3938 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply_Ptr;
3939 int MessageSizeInBytes;
3940 int ReplySizeInBytes;
3943 /* Scatter Gather buffer list */
3944 struct ioctlSgList_S {
3945 SLIST_ENTRY(ioctlSgList_S) link;
3947 I2O_FLAGS_COUNT FlagsCount;
3948 char KernelSpace[sizeof(long)];
3950 /* Generates a `first' entry */
3951 SLIST_HEAD(ioctlSgListHead_S, ioctlSgList_S) sgList;
3953 if (ASR_getBlinkLedCode(sc)) {
3954 debug_usr_cmd_printf ("Adapter currently in BlinkLed %x\n",
3955 ASR_getBlinkLedCode(sc));
3958 /* Copy in the message into a local allocation */
3959 if ((Message_Ptr = (PI2O_MESSAGE_FRAME)malloc (
3960 sizeof(I2O_MESSAGE_FRAME), M_TEMP, M_WAITOK))
3961 == (PI2O_MESSAGE_FRAME)NULL) {
3962 debug_usr_cmd_printf (
3963 "Failed to acquire I2O_MESSAGE_FRAME memory\n");
3966 if ((error = copyin ((caddr_t)Packet, (caddr_t)Message_Ptr,
3967 sizeof(I2O_MESSAGE_FRAME))) != 0) {
3968 free (Message_Ptr, M_TEMP);
3969 debug_usr_cmd_printf ("Can't copy in packet errno=%d\n", error);
3972 /* Acquire information to determine type of packet */
3973 MessageSizeInBytes = (I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr)<<2);
3974 /* The offset of the reply information within the user packet */
3975 Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)((char *)Packet
3976 + MessageSizeInBytes);
3978 /* Check if the message is a synchronous initialization command */
3979 s = I2O_MESSAGE_FRAME_getFunction(Message_Ptr);
3980 free (Message_Ptr, M_TEMP);
3983 case I2O_EXEC_IOP_RESET:
3986 status = ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt);
3987 ReplySizeInBytes = sizeof(status);
3988 debug_usr_cmd_printf ("resetIOP done\n");
3989 return (copyout ((caddr_t)&status, (caddr_t)Reply,
3993 case I2O_EXEC_STATUS_GET:
3994 { I2O_EXEC_STATUS_GET_REPLY status;
3996 if (ASR_getStatus (sc->ha_Virt, sc->ha_Fvirt, &status)
3997 == (PI2O_EXEC_STATUS_GET_REPLY)NULL) {
3998 debug_usr_cmd_printf ("getStatus failed\n");
4001 ReplySizeInBytes = sizeof(status);
4002 debug_usr_cmd_printf ("getStatus done\n");
4003 return (copyout ((caddr_t)&status, (caddr_t)Reply,
4007 case I2O_EXEC_OUTBOUND_INIT:
4010 status = ASR_initOutBound(sc);
4011 ReplySizeInBytes = sizeof(status);
4012 debug_usr_cmd_printf ("intOutBound done\n");
4013 return (copyout ((caddr_t)&status, (caddr_t)Reply,
4018 /* Determine if the message size is valid */
4019 if ((MessageSizeInBytes < sizeof(I2O_MESSAGE_FRAME))
4020 || (MAX_INBOUND_SIZE < MessageSizeInBytes)) {
4021 debug_usr_cmd_printf ("Packet size %d incorrect\n",
4022 MessageSizeInBytes);
4026 if ((Message_Ptr = (PI2O_MESSAGE_FRAME)malloc (MessageSizeInBytes,
4027 M_TEMP, M_WAITOK)) == (PI2O_MESSAGE_FRAME)NULL) {
4028 debug_usr_cmd_printf ("Failed to acquire frame[%d] memory\n",
4029 MessageSizeInBytes);
4032 if ((error = copyin ((caddr_t)Packet, (caddr_t)Message_Ptr,
4033 MessageSizeInBytes)) != 0) {
4034 free (Message_Ptr, M_TEMP);
4035 debug_usr_cmd_printf ("Can't copy in packet[%d] errno=%d\n",
4036 MessageSizeInBytes, error);
4040 /* Check the size of the reply frame, and start constructing */
4042 if ((Reply_Ptr = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)malloc (
4043 sizeof(I2O_MESSAGE_FRAME), M_TEMP, M_WAITOK))
4044 == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) {
4045 free (Message_Ptr, M_TEMP);
4046 debug_usr_cmd_printf (
4047 "Failed to acquire I2O_MESSAGE_FRAME memory\n");
4050 if ((error = copyin ((caddr_t)Reply, (caddr_t)Reply_Ptr,
4051 sizeof(I2O_MESSAGE_FRAME))) != 0) {
4052 free (Reply_Ptr, M_TEMP);
4053 free (Message_Ptr, M_TEMP);
4054 debug_usr_cmd_printf (
4055 "Failed to copy in reply frame, errno=%d\n",
4059 ReplySizeInBytes = (I2O_MESSAGE_FRAME_getMessageSize(
4060 &(Reply_Ptr->StdReplyFrame.StdMessageFrame)) << 2);
4061 free (Reply_Ptr, M_TEMP);
4062 if (ReplySizeInBytes < sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME)) {
4063 free (Message_Ptr, M_TEMP);
4064 debug_usr_cmd_printf (
4065 "Failed to copy in reply frame[%d], errno=%d\n",
4066 ReplySizeInBytes, error);
4070 if ((Reply_Ptr = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)malloc (
4071 ((ReplySizeInBytes > sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME))
4073 : sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)),
4074 M_TEMP, M_WAITOK)) == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) {
4075 free (Message_Ptr, M_TEMP);
4076 debug_usr_cmd_printf ("Failed to acquire frame[%d] memory\n",
4080 (void)ASR_fillMessage ((char *)Reply_Ptr, ReplySizeInBytes);
4081 Reply_Ptr->StdReplyFrame.StdMessageFrame.InitiatorContext
4082 = Message_Ptr->InitiatorContext;
4083 Reply_Ptr->StdReplyFrame.TransactionContext
4084 = ((PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr)->TransactionContext;
4085 I2O_MESSAGE_FRAME_setMsgFlags(
4086 &(Reply_Ptr->StdReplyFrame.StdMessageFrame),
4087 I2O_MESSAGE_FRAME_getMsgFlags(
4088 &(Reply_Ptr->StdReplyFrame.StdMessageFrame))
4089 | I2O_MESSAGE_FLAGS_REPLY);
4091 /* Check if the message is a special case command */
4092 switch (I2O_MESSAGE_FRAME_getFunction(Message_Ptr)) {
4093 case I2O_EXEC_SYS_TAB_SET: /* Special Case of empty Scatter Gather */
4094 if (MessageSizeInBytes == ((I2O_MESSAGE_FRAME_getVersionOffset(
4095 Message_Ptr) & 0xF0) >> 2)) {
4096 free (Message_Ptr, M_TEMP);
4097 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
4098 &(Reply_Ptr->StdReplyFrame),
4099 (ASR_setSysTab(sc) != CAM_REQ_CMP));
4100 I2O_MESSAGE_FRAME_setMessageSize(
4101 &(Reply_Ptr->StdReplyFrame.StdMessageFrame),
4102 sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME));
4103 error = copyout ((caddr_t)Reply_Ptr, (caddr_t)Reply,
4105 free (Reply_Ptr, M_TEMP);
4110 /* Deal in the general case */
4111 /* First allocate and optionally copy in each scatter gather element */
4112 SLIST_INIT(&sgList);
4113 if ((I2O_MESSAGE_FRAME_getVersionOffset(Message_Ptr) & 0xF0) != 0) {
4114 PI2O_SGE_SIMPLE_ELEMENT sg;
4117 * since this code is reused in several systems, code
4118 * efficiency is greater by using a shift operation rather
4119 * than a divide by sizeof(u_int32_t).
4121 sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr
4122 + ((I2O_MESSAGE_FRAME_getVersionOffset(Message_Ptr) & 0xF0)
4124 while (sg < (PI2O_SGE_SIMPLE_ELEMENT)(((caddr_t)Message_Ptr)
4125 + MessageSizeInBytes)) {
4129 if ((I2O_FLAGS_COUNT_getFlags(&(sg->FlagsCount))
4130 & I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT) == 0) {
4134 len = I2O_FLAGS_COUNT_getCount(&(sg->FlagsCount));
4135 debug_usr_cmd_printf ("SG[%d] = %x[%d]\n",
4136 sg - (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr
4137 + ((I2O_MESSAGE_FRAME_getVersionOffset(
4138 Message_Ptr) & 0xF0) >> 2)),
4139 I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg), len);
4141 if ((elm = (struct ioctlSgList_S *)malloc (
4142 sizeof(*elm) - sizeof(elm->KernelSpace) + len,
4144 == (struct ioctlSgList_S *)NULL) {
4145 debug_usr_cmd_printf (
4146 "Failed to allocate SG[%d]\n", len);
4150 SLIST_INSERT_HEAD(&sgList, elm, link);
4151 elm->FlagsCount = sg->FlagsCount;
4152 elm->UserSpace = (caddr_t)
4153 (I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg));
4154 v = elm->KernelSpace;
4155 /* Copy in outgoing data (DIR bit could be invalid) */
4156 if ((error = copyin (elm->UserSpace, (caddr_t)v, len))
4161 * If the buffer is not contiguous, lets
4162 * break up the scatter/gather entries.
4165 && (sg < (PI2O_SGE_SIMPLE_ELEMENT)
4166 (((caddr_t)Message_Ptr) + MAX_INBOUND_SIZE))) {
4167 int next, base, span;
4170 next = base = KVTOPHYS(v);
4171 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg,
4174 /* How far can we go physically contiguously */
4175 while ((len > 0) && (base == next)) {
4178 next = trunc_page(base) + PAGE_SIZE;
4189 /* Construct the Flags */
4190 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount),
4193 int flags = I2O_FLAGS_COUNT_getFlags(
4194 &(elm->FlagsCount));
4195 /* Any remaining length? */
4198 ~(I2O_SGL_FLAGS_END_OF_BUFFER
4199 | I2O_SGL_FLAGS_LAST_ELEMENT);
4201 I2O_FLAGS_COUNT_setFlags(
4202 &(sg->FlagsCount), flags);
4205 debug_usr_cmd_printf ("sg[%d] = %x[%d]\n",
4206 sg - (PI2O_SGE_SIMPLE_ELEMENT)
4207 ((char *)Message_Ptr
4208 + ((I2O_MESSAGE_FRAME_getVersionOffset(
4209 Message_Ptr) & 0xF0) >> 2)),
4210 I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg),
4217 * Incrementing requires resizing of the
4218 * packet, and moving up the existing SG
4222 MessageSizeInBytes += sizeof(*sg);
4223 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
4224 I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr)
4225 + (sizeof(*sg) / sizeof(U32)));
4227 PI2O_MESSAGE_FRAME NewMessage_Ptr;
4230 = (PI2O_MESSAGE_FRAME)
4231 malloc (MessageSizeInBytes,
4233 == (PI2O_MESSAGE_FRAME)NULL) {
4234 debug_usr_cmd_printf (
4235 "Failed to acquire frame[%d] memory\n",
4236 MessageSizeInBytes);
4240 span = ((caddr_t)sg)
4241 - (caddr_t)Message_Ptr;
4242 bcopy ((caddr_t)Message_Ptr,
4243 (caddr_t)NewMessage_Ptr, span);
4244 bcopy ((caddr_t)(sg-1),
4245 ((caddr_t)NewMessage_Ptr) + span,
4246 MessageSizeInBytes - span);
4247 free (Message_Ptr, M_TEMP);
4248 sg = (PI2O_SGE_SIMPLE_ELEMENT)
4249 (((caddr_t)NewMessage_Ptr) + span);
4250 Message_Ptr = NewMessage_Ptr;
4254 || ((I2O_FLAGS_COUNT_getFlags(&(sg->FlagsCount))
4255 & I2O_SGL_FLAGS_LAST_ELEMENT) != 0)) {
4261 while ((elm = SLIST_FIRST(&sgList))
4262 != (struct ioctlSgList_S *)NULL) {
4263 SLIST_REMOVE_HEAD(&sgList, link);
4266 free (Reply_Ptr, M_TEMP);
4267 free (Message_Ptr, M_TEMP);
4272 debug_usr_cmd_printf ("Inbound: ");
4273 debug_usr_cmd_dump_message(Message_Ptr);
4275 /* Send the command */
4276 if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) {
4277 /* Free up in-kernel buffers */
4278 while ((elm = SLIST_FIRST(&sgList))
4279 != (struct ioctlSgList_S *)NULL) {
4280 SLIST_REMOVE_HEAD(&sgList, link);
4283 free (Reply_Ptr, M_TEMP);
4284 free (Message_Ptr, M_TEMP);
4289 * We do not need any (optional byteswapping) method access to
4290 * the Initiator context field.
4292 I2O_MESSAGE_FRAME_setInitiatorContext64(
4293 (PI2O_MESSAGE_FRAME)Message_Ptr, (long)ccb);
4295 (void)ASR_queue (sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
4297 free (Message_Ptr, M_TEMP);
4300 * Wait for the board to report a finished instruction.
4303 while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) {
4304 if (ASR_getBlinkLedCode(sc)) {
4306 printf ("asr%d: Blink LED 0x%x resetting adapter\n",
4307 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)),
4308 ASR_getBlinkLedCode(sc));
4309 if (ASR_reset (sc) == ENXIO) {
4310 /* Command Cleanup */
4311 ASR_ccbRemove(sc, ccb);
4314 /* Free up in-kernel buffers */
4315 while ((elm = SLIST_FIRST(&sgList))
4316 != (struct ioctlSgList_S *)NULL) {
4317 SLIST_REMOVE_HEAD(&sgList, link);
4320 free (Reply_Ptr, M_TEMP);
4324 /* Check every second for BlinkLed */
4325 tsleep((caddr_t)ccb, 0, "asr", hz);
4329 debug_usr_cmd_printf ("Outbound: ");
4330 debug_usr_cmd_dump_message(Reply_Ptr);
4332 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
4333 &(Reply_Ptr->StdReplyFrame),
4334 (ccb->ccb_h.status != CAM_REQ_CMP));
4336 if (ReplySizeInBytes >= (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
4337 - I2O_SCSI_SENSE_DATA_SZ - sizeof(U32))) {
4338 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setTransferCount(Reply_Ptr,
4339 ccb->csio.dxfer_len - ccb->csio.resid);
4341 if ((ccb->ccb_h.status & CAM_AUTOSNS_VALID) && (ReplySizeInBytes
4342 > (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
4343 - I2O_SCSI_SENSE_DATA_SZ))) {
4344 int size = ReplySizeInBytes
4345 - sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
4346 - I2O_SCSI_SENSE_DATA_SZ;
4348 if (size > sizeof(ccb->csio.sense_data)) {
4349 size = sizeof(ccb->csio.sense_data);
4351 bcopy ((caddr_t)&(ccb->csio.sense_data), (caddr_t)Reply_Ptr->SenseData,
4353 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setAutoSenseTransferCount(
4357 /* Free up in-kernel buffers */
4358 while ((elm = SLIST_FIRST(&sgList)) != (struct ioctlSgList_S *)NULL) {
4359 /* Copy out as necessary */
4361 /* DIR bit considered `valid', error due to ignorance works */
4362 && ((I2O_FLAGS_COUNT_getFlags(&(elm->FlagsCount))
4363 & I2O_SGL_FLAGS_DIR) == 0)) {
4364 error = copyout ((caddr_t)(elm->KernelSpace),
4366 I2O_FLAGS_COUNT_getCount(&(elm->FlagsCount)));
4368 SLIST_REMOVE_HEAD(&sgList, link);
4372 /* Copy reply frame to user space */
4373 error = copyout ((caddr_t)Reply_Ptr, (caddr_t)Reply,
4376 free (Reply_Ptr, M_TEMP);
4382 /*----------------------------------------------------------------------*/
4383 /* Function asr_ioctl */
4384 /*----------------------------------------------------------------------*/
4385 /* The parameters passed to this function are : */
4386 /* dev : Device number. */
4387 /* cmd : Ioctl Command */
4388 /* data : User Argument Passed In. */
4389 /* flag : Mode Parameter */
4390 /* proc : Process Parameter */
4392 /* This function is the user interface into this adapter driver */
4394 /* Return : zero if OK, error code if not */
4395 /*----------------------------------------------------------------------*/
4407 Asr_softc_t * sc = ASR_get_sc (dev);
4408 UNREFERENCED_PARAMETER(flag);
4409 UNREFERENCED_PARAMETER(td);
4411 if (sc != (Asr_softc_t *)NULL)
4415 # if (dsDescription_size != 50)
4416 case DPT_SIGNATURE + ((50 - dsDescription_size) << 16):
4418 if (cmd & 0xFFFF0000) {
4419 (void)bcopy ((caddr_t)(&ASR_sig), data,
4423 /* Traditional version of the ioctl interface */
4424 case DPT_SIGNATURE & 0x0000FFFF:
4425 return (copyout ((caddr_t)(&ASR_sig), *((caddr_t *)data),
4426 sizeof(dpt_sig_S)));
4428 /* Traditional version of the ioctl interface */
4429 case DPT_CTRLINFO & 0x0000FFFF:
4430 case DPT_CTRLINFO: {
4433 u_int16_t drvrHBAnum;
4435 u_int16_t blinkState;
4437 u_int8_t pciDeviceNum;
4439 u_int16_t Interrupt;
4440 u_int32_t reserved1;
4441 u_int32_t reserved2;
4442 u_int32_t reserved3;
4445 bzero (&CtlrInfo, sizeof(CtlrInfo));
4446 CtlrInfo.length = sizeof(CtlrInfo) - sizeof(u_int16_t);
4447 CtlrInfo.drvrHBAnum = asr_unit(dev);
4448 CtlrInfo.baseAddr = (u_long)sc->ha_Base;
4449 i = ASR_getBlinkLedCode (sc);
4453 CtlrInfo.blinkState = i;
4454 CtlrInfo.pciBusNum = sc->ha_pciBusNum;
4455 CtlrInfo.pciDeviceNum = sc->ha_pciDeviceNum;
4456 #define FLG_OSD_PCI_VALID 0x0001
4457 #define FLG_OSD_DMA 0x0002
4458 #define FLG_OSD_I2O 0x0004
4459 CtlrInfo.hbaFlags = FLG_OSD_PCI_VALID | FLG_OSD_DMA | FLG_OSD_I2O;
4460 CtlrInfo.Interrupt = sc->ha_irq;
4461 if (cmd & 0xFFFF0000) {
4462 bcopy (&CtlrInfo, data, sizeof(CtlrInfo));
4464 error = copyout (&CtlrInfo, *(caddr_t *)data, sizeof(CtlrInfo));
4468 /* Traditional version of the ioctl interface */
4469 case DPT_SYSINFO & 0x0000FFFF:
4473 /* Kernel Specific ptok `hack' */
4474 # define ptok(a) ((char *)(a) + KERNBASE)
4476 bzero (&Info, sizeof(Info));
4478 /* Appears I am the only person in the Kernel doing this */
4486 Info.drive0CMOS = j;
4493 Info.drive1CMOS = j;
4495 Info.numDrives = *((char *)ptok(0x475));
4497 Info.processorFamily = ASR_sig.dsProcessorFamily;
4499 case CPU_386SX: case CPU_386:
4500 Info.processorType = PROC_386; break;
4501 case CPU_486SX: case CPU_486:
4502 Info.processorType = PROC_486; break;
4504 Info.processorType = PROC_PENTIUM; break;
4506 Info.processorType = PROC_SEXIUM; break;
4508 Info.osType = OS_BSDI_UNIX;
4509 Info.osMajorVersion = osrelease[0] - '0';
4510 Info.osMinorVersion = osrelease[2] - '0';
4511 /* Info.osRevision = 0; */
4512 /* Info.osSubRevision = 0; */
4513 Info.busType = SI_PCI_BUS;
4514 Info.flags = SI_CMOS_Valid | SI_NumDrivesValid
4515 | SI_OSversionValid | SI_BusTypeValid | SI_NO_SmartROM;
4517 /* Go Out And Look For I2O SmartROM */
4518 for(j = 0xC8000; j < 0xE0000; j += 2048) {
4522 if (*((unsigned short *)cp) != 0xAA55) {
4525 j += (cp[2] * 512) - 2048;
4526 if ((*((u_long *)(cp + 6))
4527 != ('S' + (' ' * 256) + (' ' * 65536L)))
4528 || (*((u_long *)(cp + 10))
4529 != ('I' + ('2' * 256) + ('0' * 65536L)))) {
4533 for (k = 0; k < 64; ++k) {
4534 if (*((unsigned short *)cp)
4535 == (' ' + ('v' * 256))) {
4540 Info.smartROMMajorVersion
4541 = *((unsigned char *)(cp += 4)) - '0';
4542 Info.smartROMMinorVersion
4543 = *((unsigned char *)(cp += 2));
4544 Info.smartROMRevision
4545 = *((unsigned char *)(++cp));
4546 Info.flags |= SI_SmartROMverValid;
4547 Info.flags &= ~SI_NO_SmartROM;
4551 /* Get The Conventional Memory Size From CMOS */
4557 Info.conventionalMemSize = j;
4559 /* Get The Extended Memory Found At Power On From CMOS */
4565 Info.extendedMemSize = j;
4566 Info.flags |= SI_MemorySizeValid;
4568 # if (defined(THIS_IS_BROKEN))
4569 /* If There Is 1 or 2 Drives Found, Set Up Drive Parameters */
4570 if (Info.numDrives > 0) {
4572 * Get The Pointer From Int 41 For The First
4575 j = ((unsigned)(*((unsigned short *)ptok(0x104+2))) << 4)
4576 + (unsigned)(*((unsigned short *)ptok(0x104+0)));
4578 * It appears that SmartROM's Int41/Int46 pointers
4579 * use memory that gets stepped on by the kernel
4580 * loading. We no longer have access to this
4581 * geometry information but try anyways (!?)
4583 Info.drives[0].cylinders = *((unsigned char *)ptok(j));
4585 Info.drives[0].cylinders += ((int)*((unsigned char *)
4588 Info.drives[0].heads = *((unsigned char *)ptok(j));
4590 Info.drives[0].sectors = *((unsigned char *)ptok(j));
4591 Info.flags |= SI_DriveParamsValid;
4592 if ((Info.drives[0].cylinders == 0)
4593 || (Info.drives[0].heads == 0)
4594 || (Info.drives[0].sectors == 0)) {
4595 Info.flags &= ~SI_DriveParamsValid;
4597 if (Info.numDrives > 1) {
4599 * Get The Pointer From Int 46 For The
4600 * Second Drive Parameters
4602 j = ((unsigned)(*((unsigned short *)ptok(0x118+2))) << 4)
4603 + (unsigned)(*((unsigned short *)ptok(0x118+0)));
4604 Info.drives[1].cylinders = *((unsigned char *)
4607 Info.drives[1].cylinders += ((int)
4608 *((unsigned char *)ptok(j))) << 8;
4610 Info.drives[1].heads = *((unsigned char *)
4613 Info.drives[1].sectors = *((unsigned char *)
4615 if ((Info.drives[1].cylinders == 0)
4616 || (Info.drives[1].heads == 0)
4617 || (Info.drives[1].sectors == 0)) {
4618 Info.flags &= ~SI_DriveParamsValid;
4623 /* Copy Out The Info Structure To The User */
4624 if (cmd & 0xFFFF0000) {
4625 bcopy (&Info, data, sizeof(Info));
4627 error = copyout (&Info, *(caddr_t *)data, sizeof(Info));
4631 /* Get The BlinkLED State */
4633 i = ASR_getBlinkLedCode (sc);
4637 if (cmd & 0xFFFF0000) {
4638 bcopy ((caddr_t)(&i), data, sizeof(i));
4640 error = copyout (&i, *(caddr_t *)data, sizeof(i));
4644 /* Get performance metrics */
4645 #ifdef ASR_MEASURE_PERFORMANCE
4647 bcopy((caddr_t) &(sc->ha_performance), data,
4648 sizeof(sc->ha_performance));
4652 /* Send an I2O command */
4654 return (ASR_queue_i (sc, *((PI2O_MESSAGE_FRAME *)data)));
4656 /* Reset and re-initialize the adapter */
4658 return (ASR_reset (sc));
4660 /* Rescan the LCT table and resynchronize the information */
4662 return (ASR_rescan (sc));
4667 #ifdef ASR_MEASURE_PERFORMANCE
4669 * This function subtracts one timeval structure from another,
4670 * Returning the result in usec.
4671 * It assumes that less than 4 billion usecs passed form start to end.
4672 * If times are sensless, 0xffffffff is returned.
4677 IN struct timeval start,
4678 IN struct timeval end)
4680 OUT u_int32_t result;
4682 if (start.tv_sec > end.tv_sec) {
4683 result = 0xffffffff;
4686 if (start.tv_sec == end.tv_sec) {
4687 if (start.tv_usec > end.tv_usec) {
4688 result = 0xffffffff;
4690 return (end.tv_usec - start.tv_usec);
4693 return (end.tv_sec - start.tv_sec) * 1000000 +
4694 end.tv_usec + (1000000 - start.tv_usec);
4698 } /* asr_time_delta */