1 /**************************************************************************
3 ** $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $
4 ** $DragonFly: src/sys/dev/disk/ncr/ncr.c,v 1.9 2005/05/24 20:58:59 dillon Exp $
6 ** Device driver for the NCR 53C8XX PCI-SCSI-Controller Family.
8 **-------------------------------------------------------------------------
10 ** Written for 386bsd and FreeBSD by
11 ** Wolfgang Stanglmeier <wolf@cologne.de>
12 ** Stefan Esser <se@mi.Uni-Koeln.de>
14 **-------------------------------------------------------------------------
16 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved.
18 ** Redistribution and use in source and binary forms, with or without
19 ** modification, are permitted provided that the following conditions
21 ** 1. Redistributions of source code must retain the above copyright
22 ** notice, this list of conditions and the following disclaimer.
23 ** 2. Redistributions in binary form must reproduce the above copyright
24 ** notice, this list of conditions and the following disclaimer in the
25 ** documentation and/or other materials provided with the distribution.
26 ** 3. The name of the author may not be used to endorse or promote products
27 ** derived from this software without specific prior written permission.
29 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
30 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
31 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
32 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
33 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
34 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
38 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 ***************************************************************************
43 #define NCR_DATE "pl30 98/1/1"
45 #define NCR_VERSION (2)
46 #define MAX_UNITS (16)
48 #define NCR_GETCC_WITHMSG
50 #if (defined(__DragonFly__) || defined (__FreeBSD__)) && defined(_KERNEL)
54 /*==========================================================
56 ** Configuration and Debugging
58 ** May be overwritten in <arch/conf/xxxx>
60 **==========================================================
64 ** SCSI address of this device.
65 ** The boot routines should have set it.
69 #ifndef SCSI_NCR_MYADDR
70 #define SCSI_NCR_MYADDR (7)
71 #endif /* SCSI_NCR_MYADDR */
74 ** The default synchronous period factor
76 ** If maximum synchronous frequency is defined, use it instead.
79 #ifndef SCSI_NCR_MAX_SYNC
81 #ifndef SCSI_NCR_DFLT_SYNC
82 #define SCSI_NCR_DFLT_SYNC (12)
83 #endif /* SCSI_NCR_DFLT_SYNC */
87 #if SCSI_NCR_MAX_SYNC == 0
88 #define SCSI_NCR_DFLT_SYNC 0
90 #define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC)
96 ** The minimal asynchronous pre-scaler period (ns)
100 #ifndef SCSI_NCR_MIN_ASYNC
101 #define SCSI_NCR_MIN_ASYNC (40)
102 #endif /* SCSI_NCR_MIN_ASYNC */
105 ** The maximal bus with (in log2 byte)
106 ** (0=8 bit, 1=16 bit)
109 #ifndef SCSI_NCR_MAX_WIDE
110 #define SCSI_NCR_MAX_WIDE (1)
111 #endif /* SCSI_NCR_MAX_WIDE */
113 /*==========================================================
115 ** Configuration and Debugging
117 **==========================================================
121 ** Number of targets supported by the driver.
122 ** n permits target numbers 0..n-1.
123 ** Default is 7, meaning targets #0..#6.
127 #define MAX_TARGET (16)
130 ** Number of logic units supported by the driver.
131 ** n enables logic unit numbers 0..n-1.
132 ** The common SCSI devices require only
133 ** one lun, so take 1 as the default.
141 ** The maximum number of jobs scheduled for starting.
142 ** There should be one slot per target, and one slot
143 ** for each tag of each target in use.
146 #define MAX_START (256)
149 ** The maximum number of segments a transfer is split into.
152 #define MAX_SCATTER (33)
155 ** The maximum transfer length (should be >= 64k).
156 ** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE.
159 #define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE)
165 #define NCR_SNOOP_TIMEOUT (1000000)
167 /*==========================================================
171 **==========================================================
174 #include <sys/param.h>
175 #include <sys/time.h>
178 #include <sys/systm.h>
179 #include <sys/malloc.h>
181 #include <sys/kernel.h>
182 #include <sys/sysctl.h>
184 #include <machine/clock.h>
185 #include <machine/md_var.h>
186 #include <machine/bus.h>
187 #include <machine/resource.h>
188 #include <sys/rman.h>
191 #include <vm/vm_extern.h>
194 #include <bus/pci/pcivar.h>
195 #include <bus/pci/pcireg.h>
198 #include <bus/cam/cam.h>
199 #include <bus/cam/cam_ccb.h>
200 #include <bus/cam/cam_sim.h>
201 #include <bus/cam/cam_xpt_sim.h>
202 #include <bus/cam/cam_debug.h>
204 #include <bus/cam/scsi/scsi_all.h>
205 #include <bus/cam/scsi/scsi_message.h>
207 /*==========================================================
211 **==========================================================
214 #define DEBUG_ALLOC (0x0001)
215 #define DEBUG_PHASE (0x0002)
216 #define DEBUG_POLL (0x0004)
217 #define DEBUG_QUEUE (0x0008)
218 #define DEBUG_RESULT (0x0010)
219 #define DEBUG_SCATTER (0x0020)
220 #define DEBUG_SCRIPT (0x0040)
221 #define DEBUG_TINY (0x0080)
222 #define DEBUG_TIMING (0x0100)
223 #define DEBUG_NEGO (0x0200)
224 #define DEBUG_TAGS (0x0400)
225 #define DEBUG_FREEZE (0x0800)
226 #define DEBUG_RESTART (0x1000)
229 ** Enable/Disable debug messages.
230 ** Can be changed at runtime too.
232 #ifdef SCSI_NCR_DEBUG
233 #define DEBUG_FLAGS ncr_debug
234 #else /* SCSI_NCR_DEBUG */
235 #define SCSI_NCR_DEBUG 0
236 #define DEBUG_FLAGS 0
237 #endif /* SCSI_NCR_DEBUG */
241 /*==========================================================
245 **==========================================================
247 ** modified copy from 386bsd:/usr/include/sys/assert.h
249 **----------------------------------------------------------
253 #define assert(expression) { \
254 if (!(expression)) { \
255 (void)printf("assertion \"%s\" failed: " \
256 "file \"%s\", line %d\n", \
257 #expression, __FILE__, __LINE__); \
262 #define assert(expression) { \
263 if (!(expression)) { \
264 (void)printf("assertion \"%s\" failed: " \
265 "file \"%s\", line %d\n", \
266 #expression, __FILE__, __LINE__); \
271 /*==========================================================
273 ** Access to the controller chip.
275 **==========================================================
281 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
284 #define INB(r) bus_space_read_1(np->bst, np->bsh, offsetof(struct ncr_reg, r))
285 #define INW(r) bus_space_read_2(np->bst, np->bsh, offsetof(struct ncr_reg, r))
286 #define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r))
288 #define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \
289 offsetof(struct ncr_reg, r), val)
290 #define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \
291 offsetof(struct ncr_reg, r), val)
292 #define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \
293 offsetof(struct ncr_reg, r), val)
294 #define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val)
296 #define INB_OFF(o) bus_space_read_1(np->bst, np->bsh, o)
297 #define INW_OFF(o) bus_space_read_2(np->bst, np->bsh, o)
298 #define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o)
300 #define READSCRIPT_OFF(base, off) \
301 (base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \
302 bus_space_read_4(np->bst2, np->bsh2, off))
304 #define WRITESCRIPT_OFF(base, off, val) \
307 *((volatile u_int32_t *) \
308 ((volatile char *)base + (off))) = (val); \
310 bus_space_write_4(np->bst2, np->bsh2, off, val); \
313 #define READSCRIPT(r) \
314 READSCRIPT_OFF(np->script, offsetof(struct script, r))
316 #define WRITESCRIPT(r, val) \
317 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val)
320 ** Set bit field ON, OFF
323 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
324 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
325 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
326 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
327 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
328 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
330 /*==========================================================
332 ** Command control block states.
334 **==========================================================
339 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
340 #define HS_DISCONNECT (3) /* Disconnected by target */
342 #define HS_COMPLETE (4)
343 #define HS_SEL_TIMEOUT (5) /* Selection timeout */
344 #define HS_RESET (6) /* SCSI reset */
345 #define HS_ABORTED (7) /* Transfer aborted */
346 #define HS_TIMEOUT (8) /* Software timeout */
347 #define HS_FAIL (9) /* SCSI or PCI bus errors */
348 #define HS_UNEXPECTED (10) /* Unexpected disconnect */
349 #define HS_STALL (11) /* QUEUE FULL or BUSY */
351 #define HS_DONEMASK (0xfc)
353 /*==========================================================
355 ** Software Interrupt Codes
357 **==========================================================
360 #define SIR_SENSE_RESTART (1)
361 #define SIR_SENSE_FAILED (2)
362 #define SIR_STALL_RESTART (3)
363 #define SIR_STALL_QUEUE (4)
364 #define SIR_NEGO_SYNC (5)
365 #define SIR_NEGO_WIDE (6)
366 #define SIR_NEGO_FAILED (7)
367 #define SIR_NEGO_PROTO (8)
368 #define SIR_REJECT_RECEIVED (9)
369 #define SIR_REJECT_SENT (10)
370 #define SIR_IGN_RESIDUE (11)
371 #define SIR_MISSING_SAVE (12)
374 /*==========================================================
376 ** Extended error codes.
377 ** xerr_status field of struct nccb.
379 **==========================================================
383 #define XE_EXTRA_DATA (1) /* unexpected data phase */
384 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
386 /*==========================================================
388 ** Negotiation status.
389 ** nego_status field of struct nccb.
391 **==========================================================
397 /*==========================================================
399 ** XXX These are no longer used. Remove once the
400 ** script is updated.
401 ** "Special features" of targets.
402 ** quirks field of struct tcb.
403 ** actualquirks field of struct nccb.
405 **==========================================================
408 #define QUIRK_AUTOSAVE (0x01)
409 #define QUIRK_NOMSG (0x02)
410 #define QUIRK_NOSYNC (0x10)
411 #define QUIRK_NOWIDE16 (0x20)
412 #define QUIRK_NOTAGS (0x40)
413 #define QUIRK_UPDATE (0x80)
415 /*==========================================================
419 **==========================================================
422 #define CCB_MAGIC (0xf2691ad2)
423 #define MAX_TAGS (32) /* hard limit */
425 /*==========================================================
429 **==========================================================
432 #define PRINT_ADDR(ccb) xpt_print_path((ccb)->ccb_h.path)
434 /*==========================================================
436 ** Declaration of structs.
438 **==========================================================
447 typedef struct ncb * ncb_p;
448 typedef struct tcb * tcb_p;
449 typedef struct lcb * lcb_p;
450 typedef struct nccb * nccb_p;
464 #define UC_SETSYNC 10
465 #define UC_SETTAGS 11
466 #define UC_SETDEBUG 12
467 #define UC_SETORDER 13
468 #define UC_SETWIDE 14
469 #define UC_SETFLAG 15
471 #define UF_TRACE (0x01)
473 /*---------------------------------------
475 ** Timestamps for profiling
477 **---------------------------------------
480 /* Type of the kernel variable `ticks'. XXX should be declared with the var. */
494 ** profiling data (per device)
510 /*==========================================================
512 ** Declaration of structs: target control block
514 **==========================================================
517 #define NCR_TRANS_CUR 0x01 /* Modify current neogtiation status */
518 #define NCR_TRANS_ACTIVE 0x03 /* Assume this is the active target */
519 #define NCR_TRANS_GOAL 0x04 /* Modify negotiation goal */
520 #define NCR_TRANS_USER 0x08 /* Modify user negotiation settings */
522 struct ncr_transinfo {
528 struct ncr_target_tinfo {
529 /* Hardware version of our sync settings */
531 #define NCR_CUR_DISCENB 0x01
532 #define NCR_CUR_TAGENB 0x02
533 #define NCR_USR_DISCENB 0x04
534 #define NCR_USR_TAGENB 0x08
536 struct ncr_transinfo current;
537 struct ncr_transinfo goal;
538 struct ncr_transinfo user;
539 /* Hardware version of our wide settings */
545 ** during reselection the ncr jumps to this point
546 ** with SFBR set to the encoded target number
548 ** if it's not this target, jump to the next.
550 ** JUMP IF (SFBR != #target#)
554 struct link jump_tcb;
557 ** load the actual values for the sxfer and the scntl3
558 ** register (sync/wide mode).
561 ** @(sval field of this tcb)
564 ** @(wval field of this tcb)
565 ** @(scntl3 register)
571 ** if next message is "identify"
572 ** then load the message to SFBR,
573 ** else load 0 to SFBR.
579 struct link call_lun;
582 ** now look for the right lun.
585 ** @(first nccb of this lun)
588 struct link jump_lcb;
591 ** pointer to interrupted getcc nccb
597 ** pointer to nccb used for negotiating.
598 ** Avoid to start a nego for all queued commands
599 ** when tagged command queuing is enabled.
612 ** user settable limits for sync transfer
613 ** and tagged commands.
616 struct ncr_target_tinfo tinfo;
619 ** the lcb's of this tcb
625 /*==========================================================
627 ** Declaration of structs: lun control block
629 **==========================================================
634 ** during reselection the ncr jumps to this point
635 ** with SFBR set to the "Identify" message.
636 ** if it's not this lun, jump to the next.
638 ** JUMP IF (SFBR != #lun#)
639 ** @(next lcb of this target)
642 struct link jump_lcb;
645 ** if next message is "simple tag",
646 ** then load the tag to SFBR,
647 ** else load 0 to SFBR.
653 struct link call_tag;
656 ** now look for the right nccb.
659 ** @(first nccb of this lun)
662 struct link jump_nccb;
665 ** start of the nccb chain
671 ** Control of tagged queueing
681 /*==========================================================
683 ** Declaration of structs: COMMAND control block
685 **==========================================================
687 ** This substructure is copied from the nccb to a
688 ** global address after selection (or reselection)
689 ** and copied back before disconnect.
691 ** These fields are accessible to the script processor.
693 **----------------------------------------------------------
698 ** Execution of a nccb starts at this point.
699 ** It's a jump to the "SELECT" label
702 ** After successful selection the script
703 ** processor overwrites it with a jump to
704 ** the IDLE label of the script.
710 ** Saved data pointer.
711 ** Points to the position in the script
712 ** responsible for the actual transfer
714 ** It's written after reception of a
715 ** "SAVE_DATA_POINTER" message.
716 ** The goalpointer points after
717 ** the last transfer command.
725 ** The virtual address of the nccb
726 ** containing this header.
732 ** space for some timestamps to gather
733 ** profiling data about devices and this driver.
746 ** The status bytes are used by the host and the script processor.
748 ** The first four byte are copied to the scratchb register
749 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
750 ** and copied back just after disconnecting.
751 ** Inside the script the XX_REG are used.
753 ** The last four bytes are used inside the script by "COPY" commands.
754 ** Because source and destination must have the same alignment
755 ** in a longword, the fields HAVE to be at the choosen offsets.
756 ** xerr_st (4) 0 (0x34) scratcha
757 ** sync_st (5) 1 (0x05) sxfer
758 ** wide_st (7) 3 (0x03) scntl3
762 ** First four bytes (script)
766 #define HS_PRT nc_scr1
771 ** First four bytes (host)
773 #define actualquirks phys.header.status[0]
774 #define host_status phys.header.status[1]
775 #define s_status phys.header.status[2]
776 #define parity_status phys.header.status[3]
779 ** Last four bytes (script)
781 #define xerr_st header.status[4] /* MUST be ==0 mod 4 */
782 #define sync_st header.status[5] /* MUST be ==1 mod 4 */
783 #define nego_st header.status[6]
784 #define wide_st header.status[7] /* MUST be ==3 mod 4 */
787 ** Last four bytes (host)
789 #define xerr_status phys.xerr_st
790 #define sync_status phys.sync_st
791 #define nego_status phys.nego_st
792 #define wide_status phys.wide_st
794 /*==========================================================
796 ** Declaration of structs: Data structure block
798 **==========================================================
800 ** During execution of a nccb by the script processor,
801 ** the DSA (data structure address) register points
802 ** to this substructure of the nccb.
803 ** This substructure contains the header with
804 ** the script-processor-changable data and
805 ** data blocks for the indirect move commands.
807 **----------------------------------------------------------
814 ** Has to be the first entry,
815 ** because it's jumped to by the
822 ** Table data for Script
825 struct scr_tblsel select;
826 struct scr_tblmove smsg ;
827 struct scr_tblmove smsg2 ;
828 struct scr_tblmove cmd ;
829 struct scr_tblmove scmd ;
830 struct scr_tblmove sense ;
831 struct scr_tblmove data [MAX_SCATTER];
834 /*==========================================================
836 ** Declaration of structs: Command control block.
838 **==========================================================
840 ** During execution of a nccb by the script processor,
841 ** the DSA (data structure address) register points
842 ** to this substructure of the nccb.
843 ** This substructure contains the header with
844 ** the script-processor-changable data and then
845 ** data blocks for the indirect move commands.
847 **----------------------------------------------------------
853 ** This filler ensures that the global header is
854 ** cache line size aligned.
859 ** during reselection the ncr jumps to this point.
860 ** If a "SIMPLE_TAG" message was received,
861 ** then SFBR is set to the tag.
862 ** else SFBR is set to 0
863 ** If looking for another tag, jump to the next nccb.
865 ** JUMP IF (SFBR != #TAG#)
866 ** @(next nccb of this lun)
869 struct link jump_nccb;
872 ** After execution of this call, the return address
873 ** (in the TEMP register) points to the following
874 ** data structure block.
875 ** So copy it to the DSA register, and start
876 ** processing of this data structure.
882 struct link call_tmp;
885 ** This is the data structure which is
886 ** to be executed by the script processor.
892 ** If a data transfer phase is terminated too early
893 ** (after reception of a message (i.e. DISCONNECT)),
894 ** we have to prepare a mini script to transfer
895 ** the rest of the data.
901 ** The general SCSI driver provides a
902 ** pointer to a control block.
908 ** We prepare a message to be sent after selection,
909 ** and a second one to be sent after getcc selection.
910 ** Contents are IDENTIFY and SIMPLE_TAG.
911 ** While negotiating sync or wide transfer,
912 ** a SDTM or WDTM message is appended.
915 u_char scsi_smsg [8];
916 u_char scsi_smsg2[8];
920 ** Flag is used while looking for a free nccb.
926 ** Physical address of this instance of nccb
932 ** Completion time out for this job.
933 ** It's set to time of start + allowed number of seconds.
939 ** All nccbs of one hostadapter are chained.
945 ** All nccbs of one target/lun are chained.
957 ** Tag for this transfer.
958 ** It's patched into jump_nccb.
959 ** If it's not zero, a SIMPLE_TAG
960 ** message is included in smsg.
966 #define CCB_PHYS(cp,lbl) (cp->p_nccb + offsetof(struct nccb, lbl))
968 /*==========================================================
970 ** Declaration of structs: NCR device descriptor
972 **==========================================================
977 ** The global header.
978 ** Accessible to both the host and the
980 ** We assume it is cache line size aligned.
986 /*-----------------------------------------------
988 **-----------------------------------------------
990 ** During reselection the ncr jumps to this point.
991 ** The SFBR register is loaded with the encoded target id.
993 ** Jump to the first target.
998 struct link jump_tcb;
1000 /*-----------------------------------------------
1002 **-----------------------------------------------
1004 ** virtual and physical addresses
1005 ** of the 53c810 chip.
1008 struct resource *reg_res;
1009 bus_space_tag_t bst;
1010 bus_space_handle_t bsh;
1013 struct resource *sram_res;
1014 bus_space_tag_t bst2;
1015 bus_space_handle_t bsh2;
1017 struct resource *irq_res;
1021 ** Scripts instance virtual address.
1023 struct script *script;
1024 struct scripth *scripth;
1027 ** Scripts instance physical address.
1033 ** The SCSI address of the host adapter.
1038 ** timing parameters
1040 u_char minsync; /* Minimum sync period factor */
1041 u_char maxsync; /* Maximum sync period factor */
1042 u_char maxoffs; /* Max scsi offset */
1043 u_char clock_divn; /* Number of clock divisors */
1044 u_long clock_khz; /* SCSI clock frequency in KHz */
1045 u_long features; /* Chip features map */
1046 u_char multiplier; /* Clock multiplier (1,2,4) */
1048 u_char maxburst; /* log base 2 of dwords burst */
1051 ** BIOS supplied PCI bus options
1062 /*-----------------------------------------------
1063 ** CAM SIM information for this instance
1064 **-----------------------------------------------
1067 struct cam_sim *sim;
1068 struct cam_path *path;
1070 /*-----------------------------------------------
1072 **-----------------------------------------------
1074 ** Commands from user
1081 struct tcb target[MAX_TARGET];
1086 u_int32_t squeue [MAX_START];
1096 struct callout timeout_ch;
1098 /*-----------------------------------------------
1099 ** Debug and profiling
1100 **-----------------------------------------------
1104 struct ncr_reg regdump;
1110 struct profile profile;
1115 ** Head of list of all nccbs for this controller.
1121 ** Should be longword aligned,
1122 ** because they're written with a
1123 ** COPY script command.
1130 ** Buffer for STATUS_IN phase.
1135 ** controller chip dependent maximal transfer width.
1141 ** address of the ncr control registers in io space
1147 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1148 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1150 /*==========================================================
1153 ** Script for NCR-Processor.
1155 ** Use ncr_script_fill() to create the variable parts.
1156 ** Use ncr_script_copy_and_bind() to make a copy and
1157 ** bind to physical addresses.
1160 **==========================================================
1162 ** We have to know the offsets of all labels before
1163 ** we reach them (for forward jumps).
1164 ** Therefore we declare a struct here.
1165 ** If you make changes inside the script,
1166 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
1168 **----------------------------------------------------------
1172 ** Script fragments which are loaded into the on-board RAM
1173 ** of 825A, 875 and 895 chips.
1179 ncrcmd startpos [ 1];
1184 ncrcmd select [ 18];
1185 ncrcmd prepare [ 4];
1186 ncrcmd loadpos [ 14];
1187 ncrcmd prepare2 [ 24];
1190 ncrcmd dispatch [ 33];
1191 ncrcmd no_data [ 17];
1192 ncrcmd checkatn [ 10];
1193 ncrcmd command [ 15];
1194 ncrcmd status [ 27];
1195 ncrcmd msg_in [ 26];
1196 ncrcmd msg_bad [ 6];
1197 ncrcmd complete [ 13];
1198 ncrcmd cleanup [ 12];
1199 ncrcmd cleanup0 [ 9];
1200 ncrcmd signal [ 12];
1201 ncrcmd save_dp [ 5];
1202 ncrcmd restore_dp [ 5];
1203 ncrcmd disconnect [ 12];
1204 ncrcmd disconnect0 [ 5];
1205 ncrcmd disconnect1 [ 23];
1206 ncrcmd msg_out [ 9];
1207 ncrcmd msg_out_done [ 7];
1208 ncrcmd badgetcc [ 6];
1209 ncrcmd reselect [ 8];
1210 ncrcmd reselect1 [ 8];
1211 ncrcmd reselect2 [ 8];
1212 ncrcmd resel_tmp [ 5];
1213 ncrcmd resel_lun [ 18];
1214 ncrcmd resel_tag [ 24];
1215 ncrcmd data_in [MAX_SCATTER * 4 + 7];
1216 ncrcmd data_out [MAX_SCATTER * 4 + 7];
1220 ** Script fragments which stay in main memory for all chips.
1223 ncrcmd tryloop [MAX_START*5+2];
1224 ncrcmd msg_parity [ 6];
1225 ncrcmd msg_reject [ 8];
1226 ncrcmd msg_ign_residue [ 32];
1227 ncrcmd msg_extended [ 18];
1228 ncrcmd msg_ext_2 [ 18];
1229 ncrcmd msg_wdtr [ 27];
1230 ncrcmd msg_ext_3 [ 18];
1231 ncrcmd msg_sdtr [ 27];
1232 ncrcmd msg_out_abort [ 10];
1235 #ifdef NCR_GETCC_WITHMSG
1236 ncrcmd getcc2 [ 29];
1238 ncrcmd getcc2 [ 14];
1241 ncrcmd aborttag [ 4];
1243 ncrcmd snooptest [ 9];
1244 ncrcmd snoopend [ 2];
1247 /*==========================================================
1250 ** Function headers.
1253 **==========================================================
1257 static nccb_p ncr_alloc_nccb (ncb_p np, u_long target, u_long lun);
1258 static void ncr_complete (ncb_p np, nccb_p cp);
1259 static int ncr_delta (int * from, int * to);
1260 static void ncr_exception (ncb_p np);
1261 static void ncr_free_nccb (ncb_p np, nccb_p cp);
1262 static void ncr_freeze_devq (ncb_p np, struct cam_path *path);
1263 static void ncr_selectclock (ncb_p np, u_char scntl3);
1264 static void ncr_getclock (ncb_p np, u_char multiplier);
1265 static nccb_p ncr_get_nccb (ncb_p np, u_long t,u_long l);
1267 static u_int32_t ncr_info (int unit);
1269 static void ncr_init (ncb_p np, char * msg, u_long code);
1270 static void ncr_intr (void *vnp);
1271 static void ncr_int_ma (ncb_p np, u_char dstat);
1272 static void ncr_int_sir (ncb_p np);
1273 static void ncr_int_sto (ncb_p np);
1275 static void ncr_min_phys (struct buf *bp);
1277 static void ncr_poll (struct cam_sim *sim);
1278 static void ncb_profile (ncb_p np, nccb_p cp);
1279 static void ncr_script_copy_and_bind
1280 (ncb_p np, ncrcmd *src, ncrcmd *dst, int len);
1281 static void ncr_script_fill (struct script * scr, struct scripth *scrh);
1282 static int ncr_scatter (struct dsb* phys, vm_offset_t vaddr,
1284 static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp,
1286 static void ncr_setsync (ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer,
1288 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack);
1289 static int ncr_show_msg (u_char * msg);
1290 static int ncr_snooptest (ncb_p np);
1291 static void ncr_action (struct cam_sim *sim, union ccb *ccb);
1292 static void ncr_timeout (void *arg);
1293 static void ncr_wakeup (ncb_p np, u_long code);
1295 static int ncr_probe (device_t dev);
1296 static int ncr_attach (device_t dev);
1298 #endif /* _KERNEL */
1300 /*==========================================================
1303 ** Global static data.
1306 **==========================================================
1311 * $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $
1313 static const u_long ncr_version = NCR_VERSION * 11
1314 + (u_long) sizeof (struct ncb) * 7
1315 + (u_long) sizeof (struct nccb) * 5
1316 + (u_long) sizeof (struct lcb) * 3
1317 + (u_long) sizeof (struct tcb) * 2;
1321 static int ncr_debug = SCSI_NCR_DEBUG;
1322 SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0, "");
1324 static int ncr_cache; /* to be aligned _NOT_ static */
1326 /*==========================================================
1329 ** Global static data: auto configure
1332 **==========================================================
1335 #define NCR_810_ID (0x00011000ul)
1336 #define NCR_815_ID (0x00041000ul)
1337 #define NCR_820_ID (0x00021000ul)
1338 #define NCR_825_ID (0x00031000ul)
1339 #define NCR_860_ID (0x00061000ul)
1340 #define NCR_875_ID (0x000f1000ul)
1341 #define NCR_875_ID2 (0x008f1000ul)
1342 #define NCR_885_ID (0x000d1000ul)
1343 #define NCR_895_ID (0x000c1000ul)
1344 #define NCR_896_ID (0x000b1000ul)
1345 #define NCR_895A_ID (0x00121000ul)
1346 #define NCR_1510D_ID (0x000a1000ul)
1349 static char *ncr_name (ncb_p np)
1351 static char name[10];
1352 snprintf(name, sizeof(name), "ncr%d", np->unit);
1356 /*==========================================================
1359 ** Scripts for NCR-Processor.
1361 ** Use ncr_script_bind for binding to physical addresses.
1364 **==========================================================
1366 ** NADDR generates a reference to a field of the controller data.
1367 ** PADDR generates a reference to another part of the script.
1368 ** RADDR generates a reference to a script processor register.
1369 ** FADDR generates a reference to a script processor register
1372 **----------------------------------------------------------
1375 #define RELOC_SOFTC 0x40000000
1376 #define RELOC_LABEL 0x50000000
1377 #define RELOC_REGISTER 0x60000000
1378 #define RELOC_KVAR 0x70000000
1379 #define RELOC_LABELH 0x80000000
1380 #define RELOC_MASK 0xf0000000
1382 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1383 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1384 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1385 #define RADDR(label) (RELOC_REGISTER | REG(label))
1386 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1387 #define KVAR(which) (RELOC_KVAR | (which))
1389 #define KVAR_SECOND (0)
1390 #define KVAR_TICKS (1)
1391 #define KVAR_NCR_CACHE (2)
1393 #define SCRIPT_KVAR_FIRST (0)
1394 #define SCRIPT_KVAR_LAST (3)
1397 * Kernel variables referenced in the scripts.
1398 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
1400 static void *script_kvars[] =
1401 { &time_second, &ticks, &ncr_cache };
1403 static struct script script0 = {
1404 /*--------------------------< START >-----------------------*/ {
1406 ** Claim to be still alive ...
1408 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)),
1412 ** Make data structure address invalid.
1415 SCR_LOAD_REG (dsa, 0xff),
1417 SCR_FROM_REG (ctest2),
1419 }/*-------------------------< START0 >----------------------*/,{
1421 ** Hook for interrupted GetConditionCode.
1422 ** Will be patched to ... IFTRUE by
1423 ** the interrupt handler.
1425 SCR_INT ^ IFFALSE (0),
1428 }/*-------------------------< START1 >----------------------*/,{
1430 ** Hook for stalled start queue.
1431 ** Will be patched to IFTRUE by the interrupt handler.
1433 SCR_INT ^ IFFALSE (0),
1436 ** Then jump to a certain point in tryloop.
1437 ** Due to the lack of indirect addressing the code
1438 ** is self modifying here.
1441 }/*-------------------------< STARTPOS >--------------------*/,{
1444 }/*-------------------------< TRYSEL >----------------------*/,{
1447 ** DSA: Address of a Data Structure
1448 ** or Address of the IDLE-Label.
1450 ** TEMP: Address of a script, which tries to
1451 ** start the NEXT entry.
1453 ** Save the TEMP register into the SCRATCHA register.
1454 ** Then copy the DSA to TEMP and RETURN.
1455 ** This is kind of an indirect jump.
1456 ** (The script processor has NO stack, so the
1457 ** CALL is actually a jump and link, and the
1458 ** RETURN is an indirect jump.)
1460 ** If the slot was empty, DSA contains the address
1461 ** of the IDLE part of this script. The processor
1462 ** jumps to IDLE and waits for a reselect.
1463 ** It will wake up and try the same slot again
1464 ** after the SIGP bit becomes set by the host.
1466 ** If the slot was not empty, DSA contains
1467 ** the address of the phys-part of a nccb.
1468 ** The processor jumps to this address.
1469 ** phys starts with head,
1470 ** head starts with launch,
1471 ** so actually the processor jumps to
1473 ** If the entry is scheduled for execution,
1474 ** then launch contains a jump to SELECT.
1475 ** If it's not scheduled, it contains a jump to IDLE.
1486 }/*-------------------------< SKIP >------------------------*/,{
1488 ** This entry has been canceled.
1489 ** Next time use the next slot.
1495 ** patch the launch field.
1496 ** should look like an idle process.
1503 }/*-------------------------< SKIP2 >-----------------------*/,{
1507 }/*-------------------------< IDLE >------------------------*/,{
1510 ** Wait for reselect.
1515 }/*-------------------------< SELECT >----------------------*/,{
1517 ** DSA contains the address of a scheduled
1520 ** SCRATCHA contains the address of the script,
1521 ** which starts the next entry.
1523 ** Set Initiator mode.
1525 ** (Target mode is left as an exercise for the reader)
1530 SCR_LOAD_REG (HS_REG, 0xff),
1534 ** And try to select this target.
1536 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
1540 ** Now there are 4 possibilities:
1542 ** (1) The ncr looses arbitration.
1543 ** This is ok, because it will try again,
1544 ** when the bus becomes idle.
1545 ** (But beware of the timeout function!)
1547 ** (2) The ncr is reselected.
1548 ** Then the script processor takes the jump
1549 ** to the RESELECT label.
1551 ** (3) The ncr completes the selection.
1552 ** Then it will execute the next statement.
1554 ** (4) There is a selection timeout.
1555 ** Then the ncr should interrupt the host and stop.
1556 ** Unfortunately, it seems to continue execution
1557 ** of the script. But it will fail with an
1558 ** IID-interrupt on the next WHEN.
1561 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
1565 ** Send the IDENTIFY and SIMPLE_TAG messages
1566 ** (and the MSG_EXT_SDTR message)
1568 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1569 offsetof (struct dsb, smsg),
1570 #ifdef undef /* XXX better fail than try to deal with this ... */
1571 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1580 ** Selection complete.
1581 ** Next time use the next slot.
1586 }/*-------------------------< PREPARE >----------------------*/,{
1588 ** The ncr doesn't have an indirect load
1589 ** or store command. So we have to
1590 ** copy part of the control block to a
1591 ** fixed place, where we can access it.
1593 ** We patch the address part of a
1594 ** COPY command with the DSA-register.
1600 ** then we do the actual copy.
1602 SCR_COPY (sizeof (struct head)),
1604 ** continued after the next label ...
1607 }/*-------------------------< LOADPOS >---------------------*/,{
1611 ** Mark this nccb as not scheduled.
1615 NADDR (header.launch),
1617 ** Set a time stamp for this selection
1619 SCR_COPY (sizeof (ticks)),
1621 NADDR (header.stamp.select),
1623 ** load the savep (saved pointer) into
1624 ** the TEMP register (actual pointer)
1627 NADDR (header.savep),
1630 ** Initialize the status registers
1633 NADDR (header.status),
1636 }/*-------------------------< PREPARE2 >---------------------*/,{
1638 ** Load the synchronous mode register
1644 ** Load the wide mode and timing register
1650 ** Initialize the msgout buffer with a NOOP message.
1652 SCR_LOAD_REG (scratcha, MSG_NOOP),
1661 ** Message in phase ?
1663 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1666 ** Extended or reject message ?
1668 SCR_FROM_REG (sbdl),
1670 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1672 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1673 PADDRH (msg_reject),
1675 ** normal processing
1679 }/*-------------------------< SETMSG >----------------------*/,{
1685 }/*-------------------------< CLRACK >----------------------*/,{
1687 ** Terminate possible pending message phase.
1692 }/*-----------------------< DISPATCH >----------------------*/,{
1693 SCR_FROM_REG (HS_REG),
1695 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
1698 ** remove bogus output signals
1700 SCR_REG_REG (socl, SCR_AND, CACK|CATN),
1702 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)),
1704 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)),
1706 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
1708 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)),
1710 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
1712 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
1715 ** Discard one illegal phase byte, if required.
1717 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
1722 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
1724 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
1726 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
1728 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
1733 }/*-------------------------< NO_DATA >--------------------*/,{
1735 ** The target wants to tranfer too much data
1736 ** or in the wrong direction.
1737 ** Remember that in extended error.
1739 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
1745 ** Discard one data byte, if required.
1747 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1749 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
1751 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
1753 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
1756 ** .. and repeat as required.
1762 }/*-------------------------< CHECKATN >--------------------*/,{
1764 ** If AAP (bit 1 of scntl0 register) is set
1765 ** and a parity error is detected,
1766 ** the script processor asserts ATN.
1768 ** The target should switch to a MSG_OUT phase
1769 ** to get the message.
1771 SCR_FROM_REG (socl),
1773 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)),
1778 SCR_REG_REG (PS_REG, SCR_ADD, 1),
1781 ** Prepare a MSG_INITIATOR_DET_ERR message
1782 ** (initiator detected error).
1783 ** The target should retry the transfer.
1785 SCR_LOAD_REG (scratcha, MSG_INITIATOR_DET_ERR),
1790 }/*-------------------------< COMMAND >--------------------*/,{
1792 ** If this is not a GETCC transfer ...
1794 SCR_FROM_REG (SS_REG),
1796 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1799 ** ... set a timestamp ...
1801 SCR_COPY (sizeof (ticks)),
1803 NADDR (header.stamp.command),
1805 ** ... and send the command
1807 SCR_MOVE_TBL ^ SCR_COMMAND,
1808 offsetof (struct dsb, cmd),
1812 ** Send the GETCC command
1814 /*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND,
1815 offsetof (struct dsb, scmd),
1819 }/*-------------------------< STATUS >--------------------*/,{
1821 ** set the timestamp.
1823 SCR_COPY (sizeof (ticks)),
1825 NADDR (header.stamp.status),
1827 ** If this is a GETCC transfer,
1829 SCR_FROM_REG (SS_REG),
1831 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (SCSI_STATUS_CHECK_COND)),
1836 SCR_MOVE_ABS (1) ^ SCR_STATUS,
1839 ** Save status to scsi_status.
1840 ** Mark as complete.
1841 ** And wait for disconnect.
1843 SCR_TO_REG (SS_REG),
1845 SCR_REG_REG (SS_REG, SCR_OR, SCSI_STATUS_SENSE),
1847 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1852 ** If it was no GETCC transfer,
1853 ** save the status to scsi_status.
1855 /*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS,
1857 SCR_TO_REG (SS_REG),
1860 ** if it was no check condition ...
1862 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1865 ** ... mark as complete.
1867 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1872 }/*-------------------------< MSG_IN >--------------------*/,{
1874 ** Get the first byte of the message
1875 ** and save it to SCRATCHA.
1877 ** The script processor doesn't negate the
1878 ** ACK signal after this transfer.
1880 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1883 ** Check for message parity error.
1885 SCR_TO_REG (scratcha),
1887 SCR_FROM_REG (socl),
1889 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
1890 PADDRH (msg_parity),
1891 SCR_FROM_REG (scratcha),
1894 ** Parity was ok, handle this message.
1896 SCR_JUMP ^ IFTRUE (DATA (MSG_CMDCOMPLETE)),
1898 SCR_JUMP ^ IFTRUE (DATA (MSG_SAVEDATAPOINTER)),
1900 SCR_JUMP ^ IFTRUE (DATA (MSG_RESTOREPOINTERS)),
1902 SCR_JUMP ^ IFTRUE (DATA (MSG_DISCONNECT)),
1904 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1905 PADDRH (msg_extended),
1906 SCR_JUMP ^ IFTRUE (DATA (MSG_NOOP)),
1908 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1909 PADDRH (msg_reject),
1910 SCR_JUMP ^ IFTRUE (DATA (MSG_IGN_WIDE_RESIDUE)),
1911 PADDRH (msg_ign_residue),
1913 ** Rest of the messages left as
1916 ** Unimplemented messages:
1917 ** fall through to MSG_BAD.
1919 }/*-------------------------< MSG_BAD >------------------*/,{
1921 ** unimplemented message - reject it.
1925 SCR_LOAD_REG (scratcha, MSG_MESSAGE_REJECT),
1930 }/*-------------------------< COMPLETE >-----------------*/,{
1932 ** Complete message.
1934 ** If it's not the get condition code,
1935 ** copy TEMP register to LASTP in header.
1937 SCR_FROM_REG (SS_REG),
1939 /*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (SCSI_STATUS_SENSE, SCSI_STATUS_SENSE)),
1943 NADDR (header.lastp),
1945 ** When we terminate the cycle by clearing ACK,
1946 ** the target may disconnect immediately.
1948 ** We don't want to be told of an
1949 ** "unexpected disconnect",
1950 ** so we disable this feature.
1952 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1955 ** Terminate cycle ...
1957 SCR_CLR (SCR_ACK|SCR_ATN),
1960 ** ... and wait for the disconnect.
1964 }/*-------------------------< CLEANUP >-------------------*/,{
1966 ** dsa: Pointer to nccb
1967 ** or xxxxxxFF (no nccb)
1969 ** HS_REG: Host-Status (<>0!)
1973 SCR_JUMP ^ IFTRUE (DATA (0xff)),
1977 ** save the status registers
1981 NADDR (header.status),
1983 ** and copy back the header to the nccb.
1988 SCR_COPY (sizeof (struct head)),
1990 }/*-------------------------< CLEANUP0 >--------------------*/,{
1994 ** If command resulted in "check condition"
1995 ** status and is not yet completed,
1996 ** try to get the condition code.
1998 SCR_FROM_REG (HS_REG),
2000 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
2002 SCR_FROM_REG (SS_REG),
2004 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
2006 }/*-------------------------< SIGNAL >----------------------*/,{
2008 ** if status = queue full,
2009 ** reinsert in startqueue and stall queue.
2011 /*>>>*/ SCR_FROM_REG (SS_REG),
2013 SCR_INT ^ IFTRUE (DATA (SCSI_STATUS_QUEUE_FULL)),
2016 ** And make the DSA register invalid.
2018 SCR_LOAD_REG (dsa, 0xff), /* invalid */
2021 ** if job completed ...
2023 SCR_FROM_REG (HS_REG),
2026 ** ... signal completion to the host
2028 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)),
2031 ** Auf zu neuen Schandtaten!
2036 }/*-------------------------< SAVE_DP >------------------*/,{
2039 ** Copy TEMP register to SAVEP in header.
2043 NADDR (header.savep),
2046 }/*-------------------------< RESTORE_DP >---------------*/,{
2048 ** RESTORE_DP message:
2049 ** Copy SAVEP in header to TEMP register.
2052 NADDR (header.savep),
2057 }/*-------------------------< DISCONNECT >---------------*/,{
2059 ** If QUIRK_AUTOSAVE is set,
2060 ** do an "save pointer" operation.
2062 SCR_FROM_REG (QU_REG),
2064 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
2067 ** like SAVE_DP message:
2068 ** Copy TEMP register to SAVEP in header.
2072 NADDR (header.savep),
2074 ** Check if temp==savep or temp==goalp:
2075 ** if not, log a missing save pointer message.
2076 ** In fact, it's a comparison mod 256.
2078 ** Hmmm, I hadn't thought that I would be urged to
2079 ** write this kind of ugly self modifying code.
2081 ** It's unbelievable, but the ncr53c8xx isn't able
2082 ** to subtract one register from another.
2084 SCR_FROM_REG (temp),
2087 ** You are not expected to understand this ..
2089 ** CAUTION: only little endian architectures supported! XXX
2092 NADDR (header.savep),
2093 PADDR (disconnect0),
2094 }/*-------------------------< DISCONNECT0 >--------------*/,{
2095 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)),
2101 NADDR (header.goalp),
2102 PADDR (disconnect1),
2103 }/*-------------------------< DISCONNECT1 >--------------*/,{
2104 SCR_INT ^ IFFALSE (DATA (1)),
2109 ** DISCONNECTing ...
2111 ** disable the "unexpected disconnect" feature,
2112 ** and remove the ACK signal.
2114 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2116 SCR_CLR (SCR_ACK|SCR_ATN),
2119 ** Wait for the disconnect.
2125 ** Set a time stamp,
2126 ** and count the disconnects.
2128 SCR_COPY (sizeof (ticks)),
2130 NADDR (header.stamp.disconnect),
2134 SCR_REG_REG (temp, SCR_ADD, 0x01),
2140 ** Status is: DISCONNECTED.
2142 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2147 }/*-------------------------< MSG_OUT >-------------------*/,{
2149 ** The target requests a message.
2151 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2157 ** If it was no ABORT message ...
2159 SCR_JUMP ^ IFTRUE (DATA (MSG_ABORT)),
2160 PADDRH (msg_out_abort),
2162 ** ... wait for the next phase
2163 ** if it's a message out, send it again, ...
2165 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2167 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2169 ** ... else clear the message ...
2171 SCR_LOAD_REG (scratcha, MSG_NOOP),
2177 ** ... and process the next phase
2182 }/*------------------------< BADGETCC >---------------------*/,{
2184 ** If SIGP was set, clear it and try again.
2186 SCR_FROM_REG (ctest2),
2188 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2192 }/*-------------------------< RESELECT >--------------------*/,{
2194 ** This NOP will be patched with LED OFF
2195 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2201 ** make the DSA invalid.
2203 SCR_LOAD_REG (dsa, 0xff),
2208 ** Sleep waiting for a reselection.
2209 ** If SIGP is set, special treatment.
2211 ** Zu allem bereit ..
2215 }/*-------------------------< RESELECT1 >--------------------*/,{
2217 ** This NOP will be patched with LED ON
2218 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2223 ** ... zu nichts zu gebrauchen ?
2225 ** load the target id into the SFBR
2226 ** and jump to the control block.
2228 ** Look at the declarations of
2233 ** to understand what's going on.
2235 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2241 }/*-------------------------< RESELECT2 >-------------------*/,{
2243 ** This NOP will be patched with LED ON
2244 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2249 ** If it's not connected :(
2250 ** -> interrupted by SIGP bit.
2253 SCR_FROM_REG (ctest2),
2255 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2260 }/*-------------------------< RESEL_TMP >-------------------*/,{
2262 ** The return address in TEMP
2263 ** is in fact the data structure address,
2264 ** so copy it to the DSA register.
2272 }/*-------------------------< RESEL_LUN >-------------------*/,{
2274 ** come back to this point
2275 ** to get an IDENTIFY message
2276 ** Wait for a msg_in phase.
2278 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2282 ** It's not a sony, it's a trick:
2283 ** read the data without acknowledging it.
2285 SCR_FROM_REG (sbdl),
2287 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (MSG_IDENTIFYFLAG, 0x98)),
2290 ** It WAS an Identify message.
2291 ** get it and ack it!
2293 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2298 ** Mask out the lun.
2300 SCR_REG_REG (sfbr, SCR_AND, 0x07),
2305 ** No message phase or no IDENTIFY message:
2308 /*>>>*/ SCR_LOAD_SFBR (0),
2313 }/*-------------------------< RESEL_TAG >-------------------*/,{
2315 ** come back to this point
2316 ** to get a SIMPLE_TAG message
2317 ** Wait for a MSG_IN phase.
2319 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2323 ** It's a trick - read the data
2324 ** without acknowledging it.
2326 SCR_FROM_REG (sbdl),
2328 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (MSG_SIMPLE_Q_TAG)),
2331 ** It WAS a SIMPLE_TAG message.
2332 ** get it and ack it!
2334 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2339 ** Wait for the second byte (the tag)
2341 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2344 ** Get it and ack it!
2346 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2348 SCR_CLR (SCR_ACK|SCR_CARRY),
2353 ** No message phase or no SIMPLE_TAG message
2354 ** or no second byte: return 0.
2356 /*>>>*/ SCR_LOAD_SFBR (0),
2358 SCR_SET (SCR_CARRY),
2363 }/*-------------------------< DATA_IN >--------------------*/,{
2365 ** Because the size depends on the
2366 ** #define MAX_SCATTER parameter,
2367 ** it is filled in at runtime.
2369 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2371 ** SCR_COPY (sizeof (ticks)),
2372 ** KVAR (KVAR_TICKS),
2373 ** NADDR (header.stamp.data),
2374 ** SCR_MOVE_TBL ^ SCR_DATA_IN,
2375 ** offsetof (struct dsb, data[ 0]),
2377 ** ##===========< i=1; i<MAX_SCATTER >=========
2378 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2379 ** || PADDR (checkatn),
2380 ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2381 ** || offsetof (struct dsb, data[ i]),
2382 ** ##==========================================
2385 ** PADDR (checkatn),
2390 }/*-------------------------< DATA_OUT >-------------------*/,{
2392 ** Because the size depends on the
2393 ** #define MAX_SCATTER parameter,
2394 ** it is filled in at runtime.
2396 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2398 ** SCR_COPY (sizeof (ticks)),
2399 ** KVAR (KVAR_TICKS),
2400 ** NADDR (header.stamp.data),
2401 ** SCR_MOVE_TBL ^ SCR_DATA_OUT,
2402 ** offsetof (struct dsb, data[ 0]),
2404 ** ##===========< i=1; i<MAX_SCATTER >=========
2405 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2406 ** || PADDR (dispatch),
2407 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2408 ** || offsetof (struct dsb, data[ i]),
2409 ** ##==========================================
2412 ** PADDR (dispatch),
2416 **---------------------------------------------------------
2420 }/*--------------------------------------------------------*/
2424 static struct scripth scripth0 = {
2425 /*-------------------------< TRYLOOP >---------------------*/{
2427 ** Load an entry of the start queue into dsa
2428 ** and try to start it by jumping to TRYSEL.
2430 ** Because the size depends on the
2431 ** #define MAX_START parameter, it is filled
2434 **-----------------------------------------------------------
2436 ** ##===========< I=0; i<MAX_START >===========
2438 ** || NADDR (squeue[i]),
2441 ** || PADDR (trysel),
2442 ** ##==========================================
2447 **-----------------------------------------------------------
2450 }/*-------------------------< MSG_PARITY >---------------*/,{
2454 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2457 ** send a "message parity error" message.
2459 SCR_LOAD_REG (scratcha, MSG_PARITY_ERROR),
2463 }/*-------------------------< MSG_MESSAGE_REJECT >---------------*/,{
2465 ** If a negotiation was in progress,
2466 ** negotiation failed.
2468 SCR_FROM_REG (HS_REG),
2470 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2473 ** else make host log this message
2475 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2476 SIR_REJECT_RECEIVED,
2480 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2486 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2489 ** get residue size.
2491 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2494 ** Check for message parity error.
2496 SCR_TO_REG (scratcha),
2498 SCR_FROM_REG (socl),
2500 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2501 PADDRH (msg_parity),
2502 SCR_FROM_REG (scratcha),
2505 ** Size is 0 .. ignore message.
2507 SCR_JUMP ^ IFTRUE (DATA (0)),
2510 ** Size is not 1 .. have to interrupt.
2512 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)),
2515 ** Check for residue byte in swide register
2517 SCR_FROM_REG (scntl2),
2519 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2522 ** There IS data in the swide register.
2525 SCR_REG_REG (scntl2, SCR_OR, WSR),
2530 ** Load again the size to the sfbr register.
2532 /*>>>*/ SCR_FROM_REG (scratcha),
2539 }/*-------------------------< MSG_EXTENDED >-------------*/,{
2545 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2550 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2553 ** Check for message parity error.
2555 SCR_TO_REG (scratcha),
2557 SCR_FROM_REG (socl),
2559 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2560 PADDRH (msg_parity),
2561 SCR_FROM_REG (scratcha),
2565 SCR_JUMP ^ IFTRUE (DATA (3)),
2567 SCR_JUMP ^ IFFALSE (DATA (2)),
2569 }/*-------------------------< MSG_EXT_2 >----------------*/,{
2572 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2575 ** get extended message code.
2577 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2580 ** Check for message parity error.
2582 SCR_TO_REG (scratcha),
2584 SCR_FROM_REG (socl),
2586 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2587 PADDRH (msg_parity),
2588 SCR_FROM_REG (scratcha),
2590 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_WDTR)),
2593 ** unknown extended message
2597 }/*-------------------------< MSG_WDTR >-----------------*/,{
2600 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2603 ** get data bus width
2605 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2607 SCR_FROM_REG (socl),
2609 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2610 PADDRH (msg_parity),
2612 ** let the host do the real work.
2617 ** let the target fetch our answer.
2624 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2627 ** Send the MSG_EXT_WDTR
2629 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
2637 PADDR (msg_out_done),
2639 }/*-------------------------< MSG_EXT_3 >----------------*/,{
2642 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2645 ** get extended message code.
2647 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2650 ** Check for message parity error.
2652 SCR_TO_REG (scratcha),
2654 SCR_FROM_REG (socl),
2656 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2657 PADDRH (msg_parity),
2658 SCR_FROM_REG (scratcha),
2660 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_SDTR)),
2663 ** unknown extended message
2668 }/*-------------------------< MSG_SDTR >-----------------*/,{
2671 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2674 ** get period and offset
2676 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2678 SCR_FROM_REG (socl),
2680 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2681 PADDRH (msg_parity),
2683 ** let the host do the real work.
2688 ** let the target fetch our answer.
2695 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2698 ** Send the MSG_EXT_SDTR
2700 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
2708 PADDR (msg_out_done),
2710 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
2712 ** After ABORT message,
2714 ** expect an immediate disconnect, ...
2716 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2718 SCR_CLR (SCR_ACK|SCR_ATN),
2723 ** ... and set the status to "ABORTED"
2725 SCR_LOAD_REG (HS_REG, HS_ABORTED),
2730 }/*-------------------------< GETCC >-----------------------*/,{
2732 ** The ncr doesn't have an indirect load
2733 ** or store command. So we have to
2734 ** copy part of the control block to a
2735 ** fixed place, where we can modify it.
2737 ** We patch the address part of a COPY command
2738 ** with the address of the dsa register ...
2744 ** ... then we do the actual copy.
2746 SCR_COPY (sizeof (struct head)),
2747 }/*-------------------------< GETCC1 >----------------------*/,{
2751 ** Initialize the status registers
2754 NADDR (header.status),
2756 }/*-------------------------< GETCC2 >----------------------*/,{
2758 ** Get the condition code from a target.
2760 ** DSA points to a data structure.
2761 ** Set TEMP to the script location
2762 ** that receives the condition code.
2764 ** Because there is no script command
2765 ** to load a longword into a register,
2766 ** we use a CALL command.
2771 ** Get the condition code.
2773 SCR_MOVE_TBL ^ SCR_DATA_IN,
2774 offsetof (struct dsb, sense),
2776 ** No data phase may follow!
2785 ** The CALL jumps to this point.
2786 ** Prepare for a RESTORE_POINTER message.
2787 ** Save the TEMP register into the saved pointer.
2791 NADDR (header.savep),
2793 ** Load scratcha, because in case of a selection timeout,
2794 ** the host will expect a new value for startpos in
2795 ** the scratcha register.
2800 #ifdef NCR_GETCC_WITHMSG
2802 ** If QUIRK_NOMSG is set, select without ATN.
2803 ** and don't send a message.
2805 SCR_FROM_REG (QU_REG),
2807 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)),
2810 ** Then try to connect to the target.
2811 ** If we are reselected, special treatment
2812 ** of the current job is required before
2813 ** accepting the reselection.
2815 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2818 ** Send the IDENTIFY message.
2819 ** In case of short transfer, remove ATN.
2821 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2822 offsetof (struct dsb, smsg2),
2826 ** save the first byte of the message.
2835 }/*-------------------------< GETCC3 >----------------------*/,{
2837 ** Try to connect to the target.
2838 ** If we are reselected, special treatment
2839 ** of the current job is required before
2840 ** accepting the reselection.
2842 ** Silly target won't accept a message.
2843 ** Select without ATN.
2845 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2848 ** Force error if selection timeout
2850 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
2857 }/*-------------------------< ABORTTAG >-------------------*/,{
2859 ** Abort a bad reselection.
2860 ** Set the message to ABORT vs. ABORT_TAG
2862 SCR_LOAD_REG (scratcha, MSG_ABORT_TAG),
2864 SCR_JUMPR ^ IFFALSE (CARRYSET),
2866 }/*-------------------------< ABORT >----------------------*/,{
2867 SCR_LOAD_REG (scratcha, MSG_ABORT),
2878 ** we expect an immediate disconnect
2880 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2882 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2887 SCR_CLR (SCR_ACK|SCR_ATN),
2893 }/*-------------------------< SNOOPTEST >-------------------*/,{
2895 ** Read the variable.
2898 KVAR (KVAR_NCR_CACHE),
2901 ** Write the variable.
2905 KVAR (KVAR_NCR_CACHE),
2907 ** Read back the variable.
2910 KVAR (KVAR_NCR_CACHE),
2912 }/*-------------------------< SNOOPEND >-------------------*/,{
2918 }/*--------------------------------------------------------*/
2922 /*==========================================================
2925 ** Fill in #define dependent parts of the script
2928 **==========================================================
2931 void ncr_script_fill (struct script * scr, struct scripth * scrh)
2937 for (i=0; i<MAX_START; i++) {
2939 *p++ =NADDR (squeue[i]);
2942 *p++ =PADDR (trysel);
2945 *p++ =PADDRH(tryloop);
2947 assert ((char *)p == (char *)&scrh->tryloop + sizeof (scrh->tryloop));
2951 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN));
2952 *p++ =PADDR (no_data);
2953 *p++ =SCR_COPY (sizeof (ticks));
2954 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2955 *p++ =NADDR (header.stamp.data);
2956 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2957 *p++ =offsetof (struct dsb, data[ 0]);
2959 for (i=1; i<MAX_SCATTER; i++) {
2960 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
2961 *p++ =PADDR (checkatn);
2962 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2963 *p++ =offsetof (struct dsb, data[i]);
2967 *p++ =PADDR (checkatn);
2969 *p++ =PADDR (no_data);
2971 assert ((char *)p == (char *)&scr->data_in + sizeof (scr->data_in));
2975 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT));
2976 *p++ =PADDR (no_data);
2977 *p++ =SCR_COPY (sizeof (ticks));
2978 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2979 *p++ =NADDR (header.stamp.data);
2980 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2981 *p++ =offsetof (struct dsb, data[ 0]);
2983 for (i=1; i<MAX_SCATTER; i++) {
2984 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
2985 *p++ =PADDR (dispatch);
2986 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2987 *p++ =offsetof (struct dsb, data[i]);
2991 *p++ =PADDR (dispatch);
2993 *p++ =PADDR (no_data);
2995 assert ((char *)p == (char *)&scr->data_out + sizeof (scr->data_out));
2998 /*==========================================================
3001 ** Copy and rebind a script.
3004 **==========================================================
3007 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len)
3009 ncrcmd opcode, new, old, tmp1, tmp2;
3010 ncrcmd *start, *end;
3020 WRITESCRIPT_OFF(dst, offset, opcode);
3024 ** If we forget to change the length
3025 ** in struct script, a field will be
3026 ** padded with 0. This is an illegal
3031 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
3032 ncr_name(np), (int) (src-start-1));
3036 if (DEBUG_FLAGS & DEBUG_SCRIPT)
3037 printf ("%p: <%x>\n",
3038 (src-1), (unsigned)opcode);
3041 ** We don't have to decode ALL commands
3043 switch (opcode >> 28) {
3047 ** COPY has TWO arguments.
3051 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3054 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3056 if ((tmp1 ^ tmp2) & 3) {
3057 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
3058 ncr_name(np), (int) (src-start-1));
3062 ** If PREFETCH feature not enabled, remove
3063 ** the NO FLUSH bit if present.
3065 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN))
3066 WRITESCRIPT_OFF(dst, offset - 4,
3067 (opcode & ~SCR_NO_FLUSH));
3072 ** MOVE (absolute address)
3080 ** dont't relocate if relative :-)
3082 if (opcode & 0x00800000)
3104 switch (old & RELOC_MASK) {
3105 case RELOC_REGISTER:
3106 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res);
3109 new = (old & ~RELOC_MASK) + np->p_script;
3112 new = (old & ~RELOC_MASK) + np->p_scripth;
3115 new = (old & ~RELOC_MASK) + vtophys(np);
3118 if (((old & ~RELOC_MASK) <
3119 SCRIPT_KVAR_FIRST) ||
3120 ((old & ~RELOC_MASK) >
3122 panic("ncr KVAR out of range");
3123 new = vtophys(script_kvars[old &
3127 /* Don't relocate a 0 address. */
3134 panic("ncr_script_copy_and_bind: weird relocation %x @ %d\n", old, (int)(src - start));
3138 WRITESCRIPT_OFF(dst, offset, new);
3142 WRITESCRIPT_OFF(dst, offset, *src++);
3149 /*==========================================================
3152 ** Auto configuration.
3155 **==========================================================
3159 /*----------------------------------------------------------
3161 ** Reduce the transfer length to the max value
3162 ** we can transfer safely.
3164 ** Reading a block greater then MAX_SIZE from the
3165 ** raw (character) device exercises a memory leak
3166 ** in the vm subsystem. This is common to ALL devices.
3167 ** We have submitted a description of this bug to
3168 ** <FreeBSD-bugs@freefall.cdrom.com>.
3169 ** It should be fixed in the current release.
3171 **----------------------------------------------------------
3174 void ncr_min_phys (struct buf *bp)
3176 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE;
3182 /*----------------------------------------------------------
3184 ** Maximal number of outstanding requests per target.
3186 **----------------------------------------------------------
3189 u_int32_t ncr_info (int unit)
3191 return (1); /* may be changed later */
3196 /*----------------------------------------------------------
3198 ** NCR chip devices table and chip look up function.
3199 ** Features bit are defined in ncrreg.h. Is it the
3202 **----------------------------------------------------------
3205 unsigned long device_id;
3206 unsigned short minrevid;
3208 unsigned char maxburst;
3209 unsigned char maxoffs;
3210 unsigned char clock_divn;
3211 unsigned int features;
3214 static ncr_chip ncr_chip_table[] = {
3215 {NCR_810_ID, 0x00, "ncr 53c810 fast10 scsi", 4, 8, 4,
3218 {NCR_810_ID, 0x10, "ncr 53c810a fast10 scsi", 4, 8, 4,
3219 FE_ERL|FE_LDSTR|FE_PFEN|FE_BOF}
3221 {NCR_815_ID, 0x00, "ncr 53c815 fast10 scsi", 4, 8, 4,
3224 {NCR_820_ID, 0x00, "ncr 53c820 fast10 wide scsi", 4, 8, 4,
3227 {NCR_825_ID, 0x00, "ncr 53c825 fast10 wide scsi", 4, 8, 4,
3228 FE_WIDE|FE_ERL|FE_BOF}
3230 {NCR_825_ID, 0x10, "ncr 53c825a fast10 wide scsi", 7, 8, 4,
3231 FE_WIDE|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3233 {NCR_860_ID, 0x00, "ncr 53c860 fast20 scsi", 4, 8, 5,
3234 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_LDSTR|FE_PFEN}
3236 {NCR_875_ID, 0x00, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3237 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3239 {NCR_875_ID, 0x02, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3240 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3242 {NCR_875_ID2, 0x00, "ncr 53c875j fast20 wide scsi", 7, 16, 5,
3243 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3245 {NCR_885_ID, 0x00, "ncr 53c885 fast20 wide scsi", 7, 16, 5,
3246 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3248 {NCR_895_ID, 0x00, "ncr 53c895 fast40 wide scsi", 7, 31, 7,
3249 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3251 {NCR_896_ID, 0x00, "ncr 53c896 fast40 wide scsi", 7, 31, 7,
3252 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3254 {NCR_895A_ID, 0x00, "ncr 53c895a fast40 wide scsi", 7, 31, 7,
3255 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3257 {NCR_1510D_ID, 0x00, "ncr 53c1510d fast40 wide scsi", 7, 31, 7,
3258 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3261 static int ncr_chip_lookup(u_long device_id, u_char revision_id)
3266 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
3267 if (device_id == ncr_chip_table[i].device_id &&
3268 ncr_chip_table[i].minrevid <= revision_id) {
3270 ncr_chip_table[found].minrevid
3271 < ncr_chip_table[i].minrevid) {
3279 /*----------------------------------------------------------
3281 ** Probe the hostadapter.
3283 **----------------------------------------------------------
3288 static int ncr_probe (device_t dev)
3292 i = ncr_chip_lookup(pci_get_devid(dev), pci_get_revid(dev));
3294 device_set_desc(dev, ncr_chip_table[i].name);
3295 return (-1000); /* Allows to use both ncr and sym */
3303 /*==========================================================
3305 ** NCR chip clock divisor table.
3306 ** Divisors are multiplied by 10,000,000 in order to make
3307 ** calculations more simple.
3309 **==========================================================
3313 static u_long div_10M[] =
3314 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3316 /*===============================================================
3318 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3319 ** transfers. 32,64,128 are only supported by 875 and 895 chips.
3320 ** We use log base 2 (burst length) as internal code, with
3321 ** value 0 meaning "burst disabled".
3323 **===============================================================
3327 * Burst length from burst code.
3329 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3332 * Burst code from io register bits.
3334 #define burst_code(dmode, ctest4, ctest5) \
3335 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
3338 * Set initial io register bits from burst code.
3341 ncr_init_burst(ncb_p np, u_char bc)
3343 np->rv_ctest4 &= ~0x80;
3344 np->rv_dmode &= ~(0x3 << 6);
3345 np->rv_ctest5 &= ~0x4;
3348 np->rv_ctest4 |= 0x80;
3352 np->rv_dmode |= ((bc & 0x3) << 6);
3353 np->rv_ctest5 |= (bc & 0x4);
3357 /*==========================================================
3360 ** Auto configuration: attach and init a host adapter.
3363 **==========================================================
3368 ncr_attach (device_t dev)
3370 ncb_p np = (struct ncb*) device_get_softc(dev);
3376 struct cam_devq *devq;
3379 ** allocate and initialize structures.
3382 np->unit = device_get_unit(dev);
3385 ** Try to map the controller chip to
3386 ** virtual and physical memory.
3390 np->reg_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &np->reg_rid,
3391 0, ~0, 1, RF_ACTIVE);
3393 device_printf(dev, "could not map memory\n");
3398 ** Make the controller's registers available.
3399 ** Now the INB INW INL OUTB OUTW OUTL macros
3400 ** can be used safely.
3403 np->bst = rman_get_bustag(np->reg_res);
3404 np->bsh = rman_get_bushandle(np->reg_res);
3409 ** Try to map the controller chip into iospace.
3412 if (!pci_map_port (config_id, 0x10, &np->port))
3418 ** Save some controller register default values
3421 np->rv_scntl3 = INB(nc_scntl3) & 0x77;
3422 np->rv_dmode = INB(nc_dmode) & 0xce;
3423 np->rv_dcntl = INB(nc_dcntl) & 0xa9;
3424 np->rv_ctest3 = INB(nc_ctest3) & 0x01;
3425 np->rv_ctest4 = INB(nc_ctest4) & 0x88;
3426 np->rv_ctest5 = INB(nc_ctest5) & 0x24;
3427 np->rv_gpcntl = INB(nc_gpcntl);
3428 np->rv_stest2 = INB(nc_stest2) & 0x20;
3430 if (bootverbose >= 2) {
3431 printf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
3432 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
3433 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
3434 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3437 np->rv_dcntl |= NOCOM;
3440 ** Do chip dependent initialization.
3443 rev = pci_get_revid(dev);
3446 ** Get chip features from chips table.
3448 i = ncr_chip_lookup(pci_get_devid(dev), rev);
3451 np->maxburst = ncr_chip_table[i].maxburst;
3452 np->maxoffs = ncr_chip_table[i].maxoffs;
3453 np->clock_divn = ncr_chip_table[i].clock_divn;
3454 np->features = ncr_chip_table[i].features;
3455 } else { /* Should'nt happen if probe() is ok */
3459 np->features = FE_ERL;
3462 np->maxwide = np->features & FE_WIDE ? 1 : 0;
3463 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000;
3464 if (np->features & FE_QUAD) np->multiplier = 4;
3465 else if (np->features & FE_DBLR) np->multiplier = 2;
3466 else np->multiplier = 1;
3469 ** Get the frequency of the chip's clock.
3470 ** Find the right value for scntl3.
3472 if (np->features & (FE_ULTRA|FE_ULTRA2))
3473 ncr_getclock(np, np->multiplier);
3475 #ifdef NCR_TEKRAM_EEPROM
3477 printf ("%s: Tekram EEPROM read %s\n",
3479 read_tekram_eeprom (np, NULL) ?
3480 "succeeded" : "failed");
3482 #endif /* NCR_TEKRAM_EEPROM */
3485 * If scntl3 != 0, we assume BIOS is present.
3488 np->features |= FE_BIOS;
3491 * Divisor to be used for async (timer pre-scaler).
3493 i = np->clock_divn - 1;
3496 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3501 np->rv_scntl3 = i+1;
3504 * Minimum synchronous period factor supported by the chip.
3505 * Btw, 'period' is in tenths of nanoseconds.
3508 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3509 if (period <= 250) np->minsync = 10;
3510 else if (period <= 303) np->minsync = 11;
3511 else if (period <= 500) np->minsync = 12;
3512 else np->minsync = (period + 40 - 1) / 40;
3515 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3518 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
3520 else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
3524 * Maximum synchronous period factor supported by the chip.
3527 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3528 np->maxsync = period > 2540 ? 254 : period / 10;
3531 * Now, some features available with Symbios compatible boards.
3532 * LED support through GPIO0 and DIFF support.
3535 #ifdef SCSI_NCR_SYMBIOS_COMPAT
3536 if (!(np->rv_gpcntl & 0x01))
3537 np->features |= FE_LED0;
3538 #if 0 /* Not safe enough without NVRAM support or user settable option */
3539 if (!(INB(nc_gpreg) & 0x08))
3540 np->features |= FE_DIFF;
3542 #endif /* SCSI_NCR_SYMBIOS_COMPAT */
3545 * Prepare initial IO registers settings.
3546 * Trust BIOS only if we believe we have one and if we want to.
3548 #ifdef SCSI_NCR_TRUST_BIOS
3549 if (!(np->features & FE_BIOS)) {
3554 np->rv_dcntl = NOCOM;
3556 np->rv_ctest4 = MPEE;
3560 if (np->features & FE_ERL)
3561 np->rv_dmode |= ERL; /* Enable Read Line */
3562 if (np->features & FE_BOF)
3563 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3564 if (np->features & FE_ERMP)
3565 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3566 if (np->features & FE_CLSE)
3567 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3568 if (np->features & FE_WRIE)
3569 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3570 if (np->features & FE_PFEN)
3571 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3572 if (np->features & FE_DFS)
3573 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3574 if (np->features & FE_DIFF)
3575 np->rv_stest2 |= 0x20; /* Differential mode */
3576 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */
3579 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5);
3583 ** Get on-chip SRAM address, if supported
3585 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) {
3586 np->sram_rid = 0x18;
3587 np->sram_res = bus_alloc_resource(dev, SYS_RES_MEMORY,
3589 0, ~0, 1, RF_ACTIVE);
3593 ** Allocate structure for script relocation.
3595 if (np->sram_res != NULL) {
3597 np->p_script = rman_get_start(np->sram_res);
3598 np->bst2 = rman_get_bustag(np->sram_res);
3599 np->bsh2 = rman_get_bushandle(np->sram_res);
3600 } else if (sizeof (struct script) > PAGE_SIZE) {
3601 np->script = (struct script*) vm_page_alloc_contig
3602 (round_page(sizeof (struct script)),
3603 0, 0xffffffff, PAGE_SIZE);
3605 np->script = (struct script *)
3606 malloc (sizeof (struct script), M_DEVBUF, M_WAITOK);
3609 /* XXX JGibbs - Use contigmalloc */
3610 if (sizeof (struct scripth) > PAGE_SIZE) {
3611 np->scripth = (struct scripth*) vm_page_alloc_contig
3612 (round_page(sizeof (struct scripth)),
3613 0, 0xffffffff, PAGE_SIZE);
3616 np->scripth = (struct scripth *)
3617 malloc (sizeof (struct scripth), M_DEVBUF, M_WAITOK);
3620 #ifdef SCSI_NCR_PCI_CONFIG_FIXUP
3622 ** If cache line size is enabled, check PCI config space and
3623 ** try to fix it up if necessary.
3625 #ifdef PCIR_CACHELNSZ /* To be sure that new PCI stuff is present */
3627 u_char cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
3628 u_short command = pci_read_config(dev, PCIR_COMMAND, 2);
3632 printf("%s: setting PCI cache line size register to %d.\n",
3633 ncr_name(np), (int)cachelnsz);
3634 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
3637 if (!(command & (1<<4))) {
3639 printf("%s: setting PCI command write and invalidate.\n",
3641 pci_write_config(dev, PCIR_COMMAND, command, 2);
3644 #endif /* PCIR_CACHELNSZ */
3646 #endif /* SCSI_NCR_PCI_CONFIG_FIXUP */
3648 /* Initialize per-target user settings */
3650 if (SCSI_NCR_DFLT_SYNC) {
3651 usrsync = SCSI_NCR_DFLT_SYNC;
3652 if (usrsync > np->maxsync)
3653 usrsync = np->maxsync;
3654 if (usrsync < np->minsync)
3655 usrsync = np->minsync;
3658 usrwide = (SCSI_NCR_MAX_WIDE);
3659 if (usrwide > np->maxwide) usrwide=np->maxwide;
3661 for (i=0;i<MAX_TARGET;i++) {
3662 tcb_p tp = &np->target[i];
3664 tp->tinfo.user.period = usrsync;
3665 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0;
3666 tp->tinfo.user.width = usrwide;
3667 tp->tinfo.disc_tag = NCR_CUR_DISCENB
3674 ** Bells and whistles ;-)
3677 printf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n",
3678 ncr_name(np), np->minsync, np->maxsync, np->maxoffs,
3679 burst_length(np->maxburst),
3680 (np->rv_ctest5 & DFS) ? "large" : "normal");
3683 ** Print some complementary information that can be helpfull.
3686 printf("%s: %s, %s IRQ driver%s\n",
3688 np->rv_stest2 & 0x20 ? "differential" : "single-ended",
3689 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3690 np->sram_res ? ", using on-chip SRAM" : "");
3693 ** Patch scripts to physical addresses
3695 ncr_script_fill (&script0, &scripth0);
3698 np->p_script = vtophys(np->script);
3699 np->p_scripth = vtophys(np->scripth);
3701 ncr_script_copy_and_bind (np, (ncrcmd *) &script0,
3702 (ncrcmd *) np->script, sizeof(struct script));
3704 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0,
3705 (ncrcmd *) np->scripth, sizeof(struct scripth));
3708 ** Patch the script for LED support.
3711 if (np->features & FE_LED0) {
3712 WRITESCRIPT(reselect[0], SCR_REG_REG(gpreg, SCR_OR, 0x01));
3713 WRITESCRIPT(reselect1[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3714 WRITESCRIPT(reselect2[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3718 ** init data structure
3721 np->jump_tcb.l_cmd = SCR_JUMP;
3722 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
3725 ** Get SCSI addr of host adapter (set by bios?).
3728 np->myaddr = INB(nc_scid) & 0x07;
3729 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR;
3733 ** Log the initial register contents
3737 for (reg=0; reg<256; reg+=4) {
3738 if (reg%16==0) printf ("reg[%2x]", reg);
3739 printf (" %08x", (int)pci_conf_read (config_id, reg));
3740 if (reg%16==12) printf ("\n");
3743 #endif /* NCR_DUMP_REG */
3749 OUTB (nc_istat, SRST);
3751 OUTB (nc_istat, 0 );
3755 ** Now check the cache handling of the pci chipset.
3758 if (ncr_snooptest (np)) {
3759 printf ("CACHE INCORRECTLY CONFIGURED.\n");
3764 ** Install the interrupt handler.
3768 np->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
3769 RF_SHAREABLE | RF_ACTIVE);
3770 if (np->irq_res == NULL) {
3772 "interruptless mode: reduced performance.\n");
3774 bus_setup_intr(dev, np->irq_res, INTR_TYPE_CAM,
3775 ncr_intr, np, &np->irq_handle, NULL);
3779 ** Create the device queue. We only allow MAX_START-1 concurrent
3780 ** transactions so we can be sure to have one element free in our
3781 ** start queue to reset to the idle loop.
3783 devq = cam_simq_alloc(MAX_START - 1);
3788 ** Now tell the generic SCSI layer
3791 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np, np->unit,
3793 cam_simq_release(devq);
3794 if (np->sim == NULL)
3798 if (xpt_bus_register(np->sim, 0) != CAM_SUCCESS) {
3799 cam_sim_free(np->sim);
3803 if (xpt_create_path(&np->path, /*periph*/NULL,
3804 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
3805 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3806 xpt_bus_deregister(cam_sim_path(np->sim));
3807 cam_sim_free(np->sim);
3812 ** start the timeout daemon
3814 callout_init(&np->timeout_ch);
3821 /*==========================================================
3824 ** Process pending device interrupts.
3827 **==========================================================
3835 int oldspl = splcam();
3837 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3839 if (INB(nc_istat) & (INTF|SIP|DIP)) {
3841 ** Repeat until no outstanding ints
3845 } while (INB(nc_istat) & (INTF|SIP|DIP));
3850 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]\n");
3855 /*==========================================================
3858 ** Start execution of a SCSI command.
3859 ** This is called from the generic SCSI driver.
3862 **==========================================================
3866 ncr_action (struct cam_sim *sim, union ccb *ccb)
3870 np = (ncb_p) cam_sim_softc(sim);
3872 switch (ccb->ccb_h.func_code) {
3873 /* Common cases first */
3874 case XPT_SCSI_IO: /* Execute the requested I/O operation */
3880 struct ccb_scsiio *csio;
3889 tp = &np->target[ccb->ccb_h.target_id];
3895 * Last time we need to check if this CCB needs to
3898 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3903 ccb->ccb_h.status |= CAM_SIM_QUEUED;
3905 /*---------------------------------------------------
3907 ** Assign an nccb / bind ccb
3909 **----------------------------------------------------
3911 cp = ncr_get_nccb (np, ccb->ccb_h.target_id,
3912 ccb->ccb_h.target_lun);
3914 /* XXX JGibbs - Freeze SIMQ */
3915 ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
3922 /*---------------------------------------------------
3926 **----------------------------------------------------
3929 ** XXX JGibbs - Isn't this expensive
3930 ** enough to be conditionalized??
3933 bzero (&cp->phys.header.stamp, sizeof (struct tstamp));
3934 cp->phys.header.stamp.start = ticks;
3937 if (tp->nego_cp == NULL) {
3939 if (tp->tinfo.current.width
3940 != tp->tinfo.goal.width) {
3943 } else if ((tp->tinfo.current.period
3944 != tp->tinfo.goal.period)
3945 || (tp->tinfo.current.offset
3946 != tp->tinfo.goal.offset)) {
3952 /*---------------------------------------------------
3954 ** choose a new tag ...
3956 **----------------------------------------------------
3958 lp = tp->lp[ccb->ccb_h.target_lun];
3960 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
3961 && (ccb->csio.tag_action != CAM_TAG_ACTION_NONE)
3964 ** assign a tag to this nccb
3967 nccb_p cp2 = lp->next_nccb;
3968 lp->lasttag = lp->lasttag % 255 + 1;
3969 while (cp2 && cp2->tag != lp->lasttag)
3970 cp2 = cp2->next_nccb;
3972 cp->tag=lp->lasttag;
3973 if (DEBUG_FLAGS & DEBUG_TAGS) {
3975 printf ("using tag #%d.\n", cp->tag);
3982 /*----------------------------------------------------
3984 ** Build the identify / tag / sdtr message
3986 **----------------------------------------------------
3988 idmsg = MSG_IDENTIFYFLAG | ccb->ccb_h.target_lun;
3989 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
3990 idmsg |= MSG_IDENTIFY_DISCFLAG;
3992 msgptr = cp->scsi_smsg;
3994 msgptr[msglen++] = idmsg;
3997 msgptr[msglen++] = ccb->csio.tag_action;
3998 msgptr[msglen++] = cp->tag;
4003 msgptr[msglen++] = MSG_EXTENDED;
4004 msgptr[msglen++] = MSG_EXT_SDTR_LEN;
4005 msgptr[msglen++] = MSG_EXT_SDTR;
4006 msgptr[msglen++] = tp->tinfo.goal.period;
4007 msgptr[msglen++] = tp->tinfo.goal.offset;;
4008 if (DEBUG_FLAGS & DEBUG_NEGO) {
4010 printf ("sync msgout: ");
4011 ncr_show_msg (&cp->scsi_smsg [msglen-5]);
4016 msgptr[msglen++] = MSG_EXTENDED;
4017 msgptr[msglen++] = MSG_EXT_WDTR_LEN;
4018 msgptr[msglen++] = MSG_EXT_WDTR;
4019 msgptr[msglen++] = tp->tinfo.goal.width;
4020 if (DEBUG_FLAGS & DEBUG_NEGO) {
4022 printf ("wide msgout: ");
4023 ncr_show_msg (&cp->scsi_smsg [msglen-4]);
4029 /*----------------------------------------------------
4031 ** Build the identify message for getcc.
4033 **----------------------------------------------------
4036 cp->scsi_smsg2 [0] = idmsg;
4039 /*----------------------------------------------------
4041 ** Build the data descriptors
4043 **----------------------------------------------------
4046 /* XXX JGibbs - Handle other types of I/O */
4047 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
4048 segments = ncr_scatter(&cp->phys,
4049 (vm_offset_t)csio->data_ptr,
4050 (vm_size_t)csio->dxfer_len);
4053 ccb->ccb_h.status = CAM_REQ_TOO_BIG;
4054 ncr_free_nccb(np, cp);
4059 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
4060 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in);
4061 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4062 } else { /* CAM_DIR_OUT */
4063 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out);
4064 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4067 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data);
4068 cp->phys.header.goalp = cp->phys.header.savep;
4071 cp->phys.header.lastp = cp->phys.header.savep;
4074 /*----------------------------------------------------
4078 **----------------------------------------------------
4081 ** physical -> virtual backlink
4082 ** Generic SCSI command
4084 cp->phys.header.cp = cp;
4088 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select);
4089 cp->phys.header.launch.l_cmd = SCR_JUMP;
4093 cp->phys.select.sel_id = ccb->ccb_h.target_id;
4094 cp->phys.select.sel_scntl3 = tp->tinfo.wval;
4095 cp->phys.select.sel_sxfer = tp->tinfo.sval;
4099 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg);
4100 cp->phys.smsg.size = msglen;
4102 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2);
4103 cp->phys.smsg2.size = msglen2;
4107 /* XXX JGibbs - Support other command types */
4108 cp->phys.cmd.addr = vtophys (csio->cdb_io.cdb_bytes);
4109 cp->phys.cmd.size = csio->cdb_len;
4113 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd);
4114 cp->phys.scmd.size = 6;
4116 ** patch requested size into sense command
4118 cp->sensecmd[0] = 0x03;
4119 cp->sensecmd[1] = ccb->ccb_h.target_lun << 5;
4120 cp->sensecmd[4] = sizeof(struct scsi_sense_data);
4121 cp->sensecmd[4] = csio->sense_len;
4125 cp->phys.sense.addr = vtophys (&csio->sense_data);
4126 cp->phys.sense.size = csio->sense_len;
4130 cp->actualquirks = QUIRK_NOMSG;
4131 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY;
4132 cp->s_status = SCSI_STATUS_ILLEGAL;
4133 cp->parity_status = 0;
4135 cp->xerr_status = XE_OK;
4136 cp->sync_status = tp->tinfo.sval;
4137 cp->nego_status = nego;
4138 cp->wide_status = tp->tinfo.wval;
4140 /*----------------------------------------------------
4142 ** Critical region: start this job.
4144 **----------------------------------------------------
4148 ** reselect pattern and activate this job.
4151 cp->jump_nccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag)));
4152 cp->tlimit = time_second
4153 + ccb->ccb_h.timeout / 1000 + 2;
4154 cp->magic = CCB_MAGIC;
4157 ** insert into start queue.
4160 qidx = np->squeueput + 1;
4161 if (qidx >= MAX_START)
4163 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle);
4164 np->squeue [np->squeueput] = CCB_PHYS (cp, phys);
4165 np->squeueput = qidx;
4167 if(DEBUG_FLAGS & DEBUG_QUEUE)
4168 printf("%s: queuepos=%d tryoffset=%d.\n",
4169 ncr_name (np), np->squeueput,
4170 (unsigned)(READSCRIPT(startpos[0]) -
4171 (NCB_SCRIPTH_PHYS (np, tryloop))));
4174 ** Script processor may be waiting for reselect.
4177 OUTB (nc_istat, SIGP);
4180 ** and reenable interrupts
4185 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
4186 case XPT_EN_LUN: /* Enable LUN as a target */
4187 case XPT_TARGET_IO: /* Execute target I/O request */
4188 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
4189 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
4190 case XPT_ABORT: /* Abort the specified CCB */
4192 ccb->ccb_h.status = CAM_REQ_INVALID;
4195 case XPT_SET_TRAN_SETTINGS:
4197 struct ccb_trans_settings *cts;
4204 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0)
4205 update_type |= NCR_TRANS_GOAL;
4206 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0)
4207 update_type |= NCR_TRANS_USER;
4210 tp = &np->target[ccb->ccb_h.target_id];
4211 /* Tag and disc enables */
4212 if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
4213 if (update_type & NCR_TRANS_GOAL) {
4214 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
4215 tp->tinfo.disc_tag |= NCR_CUR_DISCENB;
4217 tp->tinfo.disc_tag &= ~NCR_CUR_DISCENB;
4220 if (update_type & NCR_TRANS_USER) {
4221 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
4222 tp->tinfo.disc_tag |= NCR_USR_DISCENB;
4224 tp->tinfo.disc_tag &= ~NCR_USR_DISCENB;
4229 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
4230 if (update_type & NCR_TRANS_GOAL) {
4231 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
4232 tp->tinfo.disc_tag |= NCR_CUR_TAGENB;
4234 tp->tinfo.disc_tag &= ~NCR_CUR_TAGENB;
4237 if (update_type & NCR_TRANS_USER) {
4238 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
4239 tp->tinfo.disc_tag |= NCR_USR_TAGENB;
4241 tp->tinfo.disc_tag &= ~NCR_USR_TAGENB;
4245 /* Filter bus width and sync negotiation settings */
4246 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0) {
4247 if (cts->bus_width > np->maxwide)
4248 cts->bus_width = np->maxwide;
4251 if (((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4252 || ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)) {
4253 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0) {
4254 if (cts->sync_period != 0
4255 && (cts->sync_period < np->minsync))
4256 cts->sync_period = np->minsync;
4258 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0) {
4259 if (cts->sync_offset == 0)
4260 cts->sync_period = 0;
4261 if (cts->sync_offset > np->maxoffs)
4262 cts->sync_offset = np->maxoffs;
4265 if ((update_type & NCR_TRANS_USER) != 0) {
4266 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4267 tp->tinfo.user.period = cts->sync_period;
4268 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
4269 tp->tinfo.user.offset = cts->sync_offset;
4270 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
4271 tp->tinfo.user.width = cts->bus_width;
4273 if ((update_type & NCR_TRANS_GOAL) != 0) {
4274 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4275 tp->tinfo.goal.period = cts->sync_period;
4277 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
4278 tp->tinfo.goal.offset = cts->sync_offset;
4280 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
4281 tp->tinfo.goal.width = cts->bus_width;
4284 ccb->ccb_h.status = CAM_REQ_CMP;
4288 case XPT_GET_TRAN_SETTINGS:
4289 /* Get default/user set transfer settings for the target */
4291 struct ccb_trans_settings *cts;
4292 struct ncr_transinfo *tinfo;
4297 tp = &np->target[ccb->ccb_h.target_id];
4300 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
4301 tinfo = &tp->tinfo.current;
4302 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
4303 cts->flags |= CCB_TRANS_DISC_ENB;
4305 cts->flags &= ~CCB_TRANS_DISC_ENB;
4307 if (tp->tinfo.disc_tag & NCR_CUR_TAGENB)
4308 cts->flags |= CCB_TRANS_TAG_ENB;
4310 cts->flags &= ~CCB_TRANS_TAG_ENB;
4312 tinfo = &tp->tinfo.user;
4313 if (tp->tinfo.disc_tag & NCR_USR_DISCENB)
4314 cts->flags |= CCB_TRANS_DISC_ENB;
4316 cts->flags &= ~CCB_TRANS_DISC_ENB;
4318 if (tp->tinfo.disc_tag & NCR_USR_TAGENB)
4319 cts->flags |= CCB_TRANS_TAG_ENB;
4321 cts->flags &= ~CCB_TRANS_TAG_ENB;
4324 cts->sync_period = tinfo->period;
4325 cts->sync_offset = tinfo->offset;
4326 cts->bus_width = tinfo->width;
4330 cts->valid = CCB_TRANS_SYNC_RATE_VALID
4331 | CCB_TRANS_SYNC_OFFSET_VALID
4332 | CCB_TRANS_BUS_WIDTH_VALID
4333 | CCB_TRANS_DISC_VALID
4334 | CCB_TRANS_TQ_VALID;
4336 ccb->ccb_h.status = CAM_REQ_CMP;
4340 case XPT_CALC_GEOMETRY:
4342 struct ccb_calc_geometry *ccg;
4344 u_int32_t secs_per_cylinder;
4347 /* XXX JGibbs - I'm sure the NCR uses a different strategy,
4348 * but it should be able to deal with Adaptec
4353 size_mb = ccg->volume_size
4354 / ((1024L * 1024L) / ccg->block_size);
4356 if (size_mb > 1024 && extended) {
4358 ccg->secs_per_track = 63;
4361 ccg->secs_per_track = 32;
4363 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
4364 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
4365 ccb->ccb_h.status = CAM_REQ_CMP;
4369 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
4371 OUTB (nc_scntl1, CRST);
4372 ccb->ccb_h.status = CAM_REQ_CMP;
4373 DELAY(10000); /* Wait until our interrupt handler sees it */
4377 case XPT_TERM_IO: /* Terminate the I/O process */
4379 ccb->ccb_h.status = CAM_REQ_INVALID;
4382 case XPT_PATH_INQ: /* Path routing inquiry */
4384 struct ccb_pathinq *cpi = &ccb->cpi;
4386 cpi->version_num = 1; /* XXX??? */
4387 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
4388 if ((np->features & FE_WIDE) != 0)
4389 cpi->hba_inquiry |= PI_WIDE_16;
4390 cpi->target_sprt = 0;
4392 cpi->hba_eng_cnt = 0;
4393 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
4394 cpi->max_lun = MAX_LUN - 1;
4395 cpi->initiator_id = np->myaddr;
4396 cpi->bus_id = cam_sim_bus(sim);
4397 cpi->base_transfer_speed = 3300;
4398 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
4399 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
4400 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
4401 cpi->unit_number = cam_sim_unit(sim);
4402 cpi->ccb_h.status = CAM_REQ_CMP;
4407 ccb->ccb_h.status = CAM_REQ_INVALID;
4413 /*==========================================================
4416 ** Complete execution of a SCSI command.
4417 ** Signal completion to the generic SCSI driver.
4420 **==========================================================
4424 ncr_complete (ncb_p np, nccb_p cp)
4434 if (!cp || (cp->magic!=CCB_MAGIC) || !cp->ccb) return;
4439 ** No Reselect anymore.
4441 cp->jump_nccb.l_cmd = (SCR_JUMP);
4446 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle);
4451 ncb_profile (np, cp);
4453 if (DEBUG_FLAGS & DEBUG_TINY)
4454 printf ("CCB=%x STAT=%x/%x\n", (int)(intptr_t)cp & 0xfff,
4455 cp->host_status,cp->s_status);
4459 tp = &np->target[ccb->ccb_h.target_id];
4460 lp = tp->lp[ccb->ccb_h.target_lun];
4463 ** We do not queue more than 1 nccb per target
4464 ** with negotiation at any time. If this nccb was
4465 ** used for negotiation, clear this info in the tcb.
4468 if (cp == tp->nego_cp)
4472 ** Check for parity errors.
4474 /* XXX JGibbs - What about reporting them??? */
4476 if (cp->parity_status) {
4478 printf ("%d parity error(s), fallback.\n", cp->parity_status);
4480 ** fallback to asynch transfer.
4482 tp->tinfo.goal.period = 0;
4483 tp->tinfo.goal.offset = 0;
4487 ** Check for extended errors.
4490 if (cp->xerr_status != XE_OK) {
4492 switch (cp->xerr_status) {
4494 printf ("extraneous data discarded.\n");
4497 printf ("illegal scsi phase (4/5).\n");
4500 printf ("extended error %d.\n", cp->xerr_status);
4503 if (cp->host_status==HS_COMPLETE)
4504 cp->host_status = HS_FAIL;
4508 ** Check the status.
4510 if (cp->host_status == HS_COMPLETE) {
4512 if (cp->s_status == SCSI_STATUS_OK) {
4517 /* XXX JGibbs - Properly calculate residual */
4519 tp->bytes += ccb->csio.dxfer_len;
4522 ccb->ccb_h.status = CAM_REQ_CMP;
4523 } else if ((cp->s_status & SCSI_STATUS_SENSE) != 0) {
4526 * XXX Could be TERMIO too. Should record
4529 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
4530 cp->s_status &= ~SCSI_STATUS_SENSE;
4531 if (cp->s_status == SCSI_STATUS_OK) {
4533 CAM_AUTOSNS_VALID|CAM_SCSI_STATUS_ERROR;
4535 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
4538 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
4539 ccb->csio.scsi_status = cp->s_status;
4543 } else if (cp->host_status == HS_SEL_TIMEOUT) {
4546 ** Device failed selection
4548 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
4550 } else if (cp->host_status == HS_TIMEOUT) {
4555 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4556 } else if (cp->host_status == HS_STALL) {
4557 ccb->ccb_h.status = CAM_REQUEUE_REQ;
4561 ** Other protocol messes
4564 printf ("COMMAND FAILED (%x %x) @%p.\n",
4565 cp->host_status, cp->s_status, cp);
4567 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4570 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
4571 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
4572 ccb->ccb_h.status |= CAM_DEV_QFRZN;
4578 ncr_free_nccb (np, cp);
4581 ** signal completion to generic driver.
4586 /*==========================================================
4589 ** Signal all (or one) control block done.
4592 **==========================================================
4596 ncr_wakeup (ncb_p np, u_long code)
4599 ** Starting at the default nccb and following
4600 ** the links, complete all jobs with a
4601 ** host_status greater than "disconnect".
4603 ** If the "code" parameter is not zero,
4604 ** complete all jobs that are not IDLE.
4607 nccb_p cp = np->link_nccb;
4609 switch (cp->host_status) {
4615 if(DEBUG_FLAGS & DEBUG_TINY) printf ("D");
4621 cp->host_status = code;
4626 ncr_complete (np, cp);
4629 cp = cp -> link_nccb;
4634 ncr_freeze_devq (ncb_p np, struct cam_path *path)
4641 ** Starting at the first nccb and following
4642 ** the links, complete all jobs that match
4643 ** the passed in path and are in the start queue.
4650 switch (cp->host_status) {
4654 if ((cp->phys.header.launch.l_paddr
4655 == NCB_SCRIPT_PHYS (np, select))
4656 && (xpt_path_comp(path, cp->ccb->ccb_h.path) >= 0)) {
4658 /* Mark for removal from the start queue */
4659 for (i = 1; i < MAX_START; i++) {
4662 idx = np->squeueput - i;
4665 idx = MAX_START + idx;
4667 == CCB_PHYS(cp, phys)) {
4669 NCB_SCRIPT_PHYS (np, skip);
4675 cp->host_status=HS_STALL;
4676 ncr_complete (np, cp);
4690 /* Compress the start queue */
4692 bidx = np->squeueput;
4693 i = np->squeueput - firstskip;
4700 bidx = MAX_START + bidx;
4702 if (np->squeue[i] == NCB_SCRIPT_PHYS (np, skip)) {
4704 } else if (j != 0) {
4705 np->squeue[bidx] = np->squeue[i];
4706 if (np->squeue[bidx]
4707 == NCB_SCRIPT_PHYS(np, idle))
4710 i = (i + 1) % MAX_START;
4712 np->squeueput = bidx;
4716 /*==========================================================
4722 **==========================================================
4726 ncr_init(ncb_p np, char * msg, u_long code)
4734 OUTB (nc_istat, SRST);
4742 if (msg) printf ("%s: restart (%s).\n", ncr_name (np), msg);
4745 ** Clear Start Queue
4748 for (i=0;i<MAX_START;i++)
4749 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle);
4752 ** Start at first entry.
4756 WRITESCRIPT(startpos[0], NCB_SCRIPTH_PHYS (np, tryloop));
4757 WRITESCRIPT(start0 [0], SCR_INT ^ IFFALSE (0));
4760 ** Wakeup all pending jobs.
4763 ncr_wakeup (np, code);
4769 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort ... */
4770 OUTB (nc_scntl0, 0xca ); /* full arb., ena parity, par->ATN */
4771 OUTB (nc_scntl1, 0x00 ); /* odd parity, and remove CRST!! */
4772 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
4773 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */
4774 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */
4775 OUTB (nc_istat , SIGP ); /* Signal Process */
4776 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */
4777 OUTB (nc_dcntl , np->rv_dcntl);
4778 OUTB (nc_ctest3, np->rv_ctest3);
4779 OUTB (nc_ctest5, np->rv_ctest5);
4780 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */
4781 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */
4782 OUTB (nc_stest3, TE ); /* TolerANT enable */
4783 OUTB (nc_stime0, 0x0b ); /* HTH = disabled, STO = 0.1 sec. */
4785 if (bootverbose >= 2) {
4786 printf ("\tACTUAL values:SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
4787 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
4788 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
4789 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
4793 ** Enable GPIO0 pin for writing if LED support.
4796 if (np->features & FE_LED0) {
4797 OUTOFFB (nc_gpcntl, 0x01);
4801 ** Fill in target structure.
4803 for (i=0;i<MAX_TARGET;i++) {
4804 tcb_p tp = &np->target[i];
4807 tp->tinfo.wval = np->rv_scntl3;
4809 tp->tinfo.current.period = 0;
4810 tp->tinfo.current.offset = 0;
4811 tp->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
4818 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST);
4819 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
4822 ** Start script processor.
4825 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
4828 * Notify the XPT of the event
4830 if (code == HS_RESET)
4831 xpt_async(AC_BUS_RESET, np->path, NULL);
4835 ncr_poll(struct cam_sim *sim)
4837 ncr_intr(cam_sim_softc(sim));
4841 /*==========================================================
4843 ** Get clock factor and sync divisor for a given
4844 ** synchronous factor period.
4845 ** Returns the clock factor (in sxfer) and scntl3
4846 ** synchronous divisor field.
4848 **==========================================================
4851 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
4853 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
4854 int div = np->clock_divn; /* Number of divisors supported */
4855 u_long fak; /* Sync factor in sxfer */
4856 u_long per; /* Period in tenths of ns */
4857 u_long kpc; /* (per * clk) */
4860 ** Compute the synchronous period in tenths of nano-seconds
4862 if (sfac <= 10) per = 250;
4863 else if (sfac == 11) per = 303;
4864 else if (sfac == 12) per = 500;
4865 else per = 40 * sfac;
4868 ** Look for the greatest clock divisor that allows an
4869 ** input speed faster than the period.
4873 if (kpc >= (div_10M[div] * 4)) break;
4876 ** Calculate the lowest clock factor that allows an output
4877 ** speed not faster than the period.
4879 fak = (kpc - 1) / div_10M[div] + 1;
4881 #if 0 /* You can #if 1 if you think this optimization is usefull */
4883 per = (fak * div_10M[div]) / clk;
4886 ** Why not to try the immediate lower divisor and to choose
4887 ** the one that allows the fastest output speed ?
4888 ** We dont want input speed too much greater than output speed.
4890 if (div >= 1 && fak < 6) {
4892 fak2 = (kpc - 1) / div_10M[div-1] + 1;
4893 per2 = (fak2 * div_10M[div-1]) / clk;
4894 if (per2 < per && fak2 <= 6) {
4902 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
4905 ** Compute and return sync parameters for the ncr
4908 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
4911 /*==========================================================
4913 ** Switch sync mode for current job and its target
4915 **==========================================================
4919 ncr_setsync(ncb_p np, nccb_p cp, u_char scntl3, u_char sxfer, u_char period)
4922 struct ccb_trans_settings neg;
4925 u_int target = INB (nc_sdid) & 0x0f;
4934 assert (target == ccb->ccb_h.target_id);
4936 tp = &np->target[target];
4938 if (!scntl3 || !(sxfer & 0x1f))
4939 scntl3 = np->rv_scntl3;
4940 scntl3 = (scntl3 & 0xf0) | (tp->tinfo.wval & EWS)
4941 | (np->rv_scntl3 & 0x07);
4944 ** Deduce the value of controller sync period from scntl3.
4945 ** period is in tenths of nano-seconds.
4948 div = ((scntl3 >> 4) & 0x7);
4949 if ((sxfer & 0x1f) && div)
4951 (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz;
4955 tp->tinfo.goal.period = period;
4956 tp->tinfo.goal.offset = sxfer & 0x1f;
4957 tp->tinfo.current.period = period;
4958 tp->tinfo.current.offset = sxfer & 0x1f;
4961 ** Stop there if sync parameters are unchanged
4963 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
4964 tp->tinfo.sval = sxfer;
4965 tp->tinfo.wval = scntl3;
4969 ** Disable extended Sreq/Sack filtering
4971 if (period_10ns <= 2000) OUTOFFB (nc_stest2, EXT);
4975 ** Tell the SCSI layer about the
4976 ** new transfer parameters.
4978 neg.sync_period = period;
4979 neg.sync_offset = sxfer & 0x1f;
4980 neg.valid = CCB_TRANS_SYNC_RATE_VALID
4981 | CCB_TRANS_SYNC_OFFSET_VALID;
4982 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path,
4984 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
4987 ** set actual value and sync_status
4989 OUTB (nc_sxfer, sxfer);
4990 np->sync_st = sxfer;
4991 OUTB (nc_scntl3, scntl3);
4992 np->wide_st = scntl3;
4995 ** patch ALL nccbs of this target.
4997 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
4998 if (!cp->ccb) continue;
4999 if (cp->ccb->ccb_h.target_id != target) continue;
5000 cp->sync_status = sxfer;
5001 cp->wide_status = scntl3;
5005 /*==========================================================
5007 ** Switch wide mode for current job and its target
5008 ** SCSI specs say: a SCSI device that accepts a WDTR
5009 ** message shall reset the synchronous agreement to
5010 ** asynchronous mode.
5012 **==========================================================
5015 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack)
5018 struct ccb_trans_settings neg;
5019 u_int target = INB (nc_sdid) & 0x0f;
5030 assert (target == ccb->ccb_h.target_id);
5032 tp = &np->target[target];
5033 tp->tinfo.current.width = wide;
5034 tp->tinfo.goal.width = wide;
5035 tp->tinfo.current.period = 0;
5036 tp->tinfo.current.offset = 0;
5038 scntl3 = (tp->tinfo.wval & (~EWS)) | (wide ? EWS : 0);
5040 sxfer = ack ? 0 : tp->tinfo.sval;
5043 ** Stop there if sync/wide parameters are unchanged
5045 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
5046 tp->tinfo.sval = sxfer;
5047 tp->tinfo.wval = scntl3;
5049 /* Tell the SCSI layer about the new transfer params */
5050 neg.bus_width = (scntl3 & EWS) ? MSG_EXT_WDTR_BUS_16_BIT
5051 : MSG_EXT_WDTR_BUS_8_BIT;
5052 neg.sync_period = 0;
5053 neg.sync_offset = 0;
5054 neg.valid = CCB_TRANS_BUS_WIDTH_VALID
5055 | CCB_TRANS_SYNC_RATE_VALID
5056 | CCB_TRANS_SYNC_OFFSET_VALID;
5057 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path,
5059 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
5062 ** set actual value and sync_status
5064 OUTB (nc_sxfer, sxfer);
5065 np->sync_st = sxfer;
5066 OUTB (nc_scntl3, scntl3);
5067 np->wide_st = scntl3;
5070 ** patch ALL nccbs of this target.
5072 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
5073 if (!cp->ccb) continue;
5074 if (cp->ccb->ccb_h.target_id != target) continue;
5075 cp->sync_status = sxfer;
5076 cp->wide_status = scntl3;
5080 /*==========================================================
5083 ** ncr timeout handler.
5086 **==========================================================
5088 ** Misused to keep the driver running when
5089 ** interrupts are not configured correctly.
5091 **----------------------------------------------------------
5095 ncr_timeout (void *arg)
5098 time_t thistime = time_second;
5099 ticks_t step = np->ticks;
5104 if (np->lasttime != thistime) {
5106 ** block ncr interrupts
5108 int oldspl = splcam();
5109 np->lasttime = thistime;
5111 /*----------------------------------------------------
5113 ** handle ncr chip timeouts
5116 ** We have a chance to arbitrate for the
5117 ** SCSI bus at least every 10 seconds.
5119 **----------------------------------------------------
5122 t = thistime - np->heartbeat;
5124 if (t<2) np->latetime=0; else np->latetime++;
5126 if (np->latetime>2) {
5128 ** If there are no requests, the script
5129 ** processor will sleep on SEL_WAIT_RESEL.
5130 ** But we have to check whether it died.
5131 ** Let's try to wake it up.
5133 OUTB (nc_istat, SIGP);
5136 /*----------------------------------------------------
5138 ** handle nccb timeouts
5140 **----------------------------------------------------
5143 for (cp=np->link_nccb; cp; cp=cp->link_nccb) {
5145 ** look for timed out nccbs.
5147 if (!cp->host_status) continue;
5149 if (cp->tlimit > thistime) continue;
5152 ** Disable reselect.
5153 ** Remove it from startqueue.
5155 cp->jump_nccb.l_cmd = (SCR_JUMP);
5156 if (cp->phys.header.launch.l_paddr ==
5157 NCB_SCRIPT_PHYS (np, select)) {
5158 printf ("%s: timeout nccb=%p (skip)\n",
5160 cp->phys.header.launch.l_paddr
5161 = NCB_SCRIPT_PHYS (np, skip);
5164 switch (cp->host_status) {
5170 cp->host_status=HS_TIMEOUT;
5175 ** wakeup this nccb.
5177 ncr_complete (np, cp);
5182 callout_reset(&np->timeout_ch, step ? step : 1, ncr_timeout, np);
5184 if (INB(nc_istat) & (INTF|SIP|DIP)) {
5187 ** Process pending interrupts.
5190 int oldspl = splcam();
5191 if (DEBUG_FLAGS & DEBUG_TINY) printf ("{");
5193 if (DEBUG_FLAGS & DEBUG_TINY) printf ("}");
5198 /*==========================================================
5200 ** log message for real hard errors
5202 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5203 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5205 ** exception register:
5210 ** so: control lines as driver by NCR.
5211 ** si: control lines as seen by NCR.
5212 ** sd: scsi data lines as seen by NCR.
5215 ** sxfer: (see the manual)
5216 ** scntl3: (see the manual)
5218 ** current script command:
5219 ** dsp: script adress (relative to start of script).
5220 ** dbc: first word of script command.
5222 ** First 16 register of the chip:
5225 **==========================================================
5228 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
5234 u_char *script_base;
5239 if (np->p_script < dsp &&
5240 dsp <= np->p_script + sizeof(struct script)) {
5241 script_ofs = dsp - np->p_script;
5242 script_size = sizeof(struct script);
5243 script_base = (u_char *) np->script;
5244 script_name = "script";
5246 else if (np->p_scripth < dsp &&
5247 dsp <= np->p_scripth + sizeof(struct scripth)) {
5248 script_ofs = dsp - np->p_scripth;
5249 script_size = sizeof(struct scripth);
5250 script_base = (u_char *) np->scripth;
5251 script_name = "scripth";
5256 script_name = "mem";
5259 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5260 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5261 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5262 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5263 (unsigned)INL (nc_dbc));
5265 if (((script_ofs & 3) == 0) &&
5266 (unsigned)script_ofs < script_size) {
5267 printf ("%s: script cmd = %08x\n", ncr_name(np),
5268 (int)READSCRIPT_OFF(script_base, script_ofs));
5271 printf ("%s: regdump:", ncr_name(np));
5273 printf (" %02x", (unsigned)INB_OFF(i));
5277 /*==========================================================
5280 ** ncr chip exception handler.
5283 **==========================================================
5286 void ncr_exception (ncb_p np)
5288 u_char istat, dstat;
5292 ** interrupt on the fly ?
5294 while ((istat = INB (nc_istat)) & INTF) {
5295 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
5296 OUTB (nc_istat, INTF);
5297 np->profile.num_fly++;
5300 if (!(istat & (SIP|DIP))) {
5305 ** Steinbach's Guideline for Systems Programming:
5306 ** Never test for an error condition you don't know how to handle.
5309 sist = (istat & SIP) ? INW (nc_sist) : 0;
5310 dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5311 np->profile.num_int++;
5313 if (DEBUG_FLAGS & DEBUG_TINY)
5314 printf ("<%d|%x:%x|%x:%x>",
5317 (unsigned)INL(nc_dsp),
5318 (unsigned)INL(nc_dbc));
5319 if ((dstat==DFE) && (sist==PAR)) return;
5321 /*==========================================================
5323 ** First the normal cases.
5325 **==========================================================
5327 /*-------------------------------------------
5329 **-------------------------------------------
5333 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET);
5337 /*-------------------------------------------
5338 ** selection timeout
5340 ** IID excluded from dstat mask!
5342 **-------------------------------------------
5346 !(sist & (GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5347 !(dstat & (MDPE|BF|ABRT|SIR))) {
5352 /*-------------------------------------------
5354 **-------------------------------------------
5358 !(sist & (STO|GEN|HTH|SGE|UDC|RST|PAR)) &&
5359 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5360 ncr_int_ma (np, dstat);
5364 /*----------------------------------------
5365 ** move command with length 0
5366 **----------------------------------------
5369 if ((dstat & IID) &&
5370 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5371 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5372 ((INL(nc_dbc) & 0xf8000000) == SCR_MOVE_TBL)) {
5374 ** Target wants more data than available.
5375 ** The "no_data" script will do it.
5377 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data));
5381 /*-------------------------------------------
5382 ** Programmed interrupt
5383 **-------------------------------------------
5386 if ((dstat & SIR) &&
5387 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5388 !(dstat & (MDPE|BF|ABRT|IID)) &&
5389 (INB(nc_dsps) <= SIR_MAX)) {
5394 /*========================================
5395 ** log message for real hard errors
5396 **========================================
5399 ncr_log_hard_error(np, sist, dstat);
5401 /*========================================
5402 ** do the register dump
5403 **========================================
5406 if (time_second - np->regtime > 10) {
5408 np->regtime = time_second;
5409 for (i=0; i<sizeof(np->regdump); i++)
5410 ((volatile char*)&np->regdump)[i] = INB_OFF(i);
5411 np->regdump.nc_dstat = dstat;
5412 np->regdump.nc_sist = sist;
5416 /*----------------------------------------
5417 ** clean up the dma fifo
5418 **----------------------------------------
5421 if ( (INB(nc_sstat0) & (ILF|ORF|OLF) ) ||
5422 (INB(nc_sstat1) & (FF3210) ) ||
5423 (INB(nc_sstat2) & (ILF1|ORF1|OLF1)) || /* wide .. */
5425 printf ("%s: have to clear fifos.\n", ncr_name (np));
5426 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5427 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5428 /* clear dma fifo */
5431 /*----------------------------------------
5432 ** handshake timeout
5433 **----------------------------------------
5437 printf ("%s: handshake timeout\n", ncr_name(np));
5438 OUTB (nc_scntl1, CRST);
5440 OUTB (nc_scntl1, 0x00);
5441 OUTB (nc_scr0, HS_FAIL);
5442 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5446 /*----------------------------------------
5447 ** unexpected disconnect
5448 **----------------------------------------
5452 !(sist & (STO|GEN|HTH|MA|SGE|RST|PAR)) &&
5453 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5454 OUTB (nc_scr0, HS_UNEXPECTED);
5455 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5459 /*----------------------------------------
5460 ** cannot disconnect
5461 **----------------------------------------
5464 if ((dstat & IID) &&
5465 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5466 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5467 ((INL(nc_dbc) & 0xf8000000) == SCR_WAIT_DISC)) {
5469 ** Unexpected data cycle while waiting for disconnect.
5471 if (INB(nc_sstat2) & LDSC) {
5473 ** It's an early reconnect.
5474 ** Let's continue ...
5476 OUTB (nc_dcntl, np->rv_dcntl | STD);
5480 printf ("%s: INFO: LDSC while IID.\n",
5484 printf ("%s: target %d doesn't release the bus.\n",
5485 ncr_name (np), INB (nc_sdid)&0x0f);
5487 ** return without restarting the NCR.
5488 ** timeout will do the real work.
5493 /*----------------------------------------
5495 **----------------------------------------
5498 if ((dstat & SSI) &&
5499 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5500 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5501 OUTB (nc_dcntl, np->rv_dcntl | STD);
5506 ** @RECOVER@ HTH, SGE, ABRT.
5508 ** We should try to recover from these interrupts.
5509 ** They may occur if there are problems with synch transfers, or
5510 ** if targets are switched on or off while the driver is running.
5514 /* clear scsi offsets */
5515 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5519 ** Freeze controller to be able to read the messages.
5522 if (DEBUG_FLAGS & DEBUG_FREEZE) {
5525 for (i=0; i<0x60; i++) {
5529 printf ("%s: reg[%d0]: ",
5538 val = bus_space_read_1(np->bst, np->bsh, i);
5539 printf (" %x%x", val/16, val%16);
5540 if (i%16==15) printf (".\n");
5543 callout_stop(&np->timeout_ch);
5545 printf ("%s: halted!\n", ncr_name(np));
5547 ** don't restart controller ...
5549 OUTB (nc_istat, SRST);
5555 ** Freeze system to be able to read the messages.
5557 printf ("ncr: fatal error: system halted - press reset to reboot ...");
5563 ** sorry, have to kill ALL jobs ...
5566 ncr_init (np, "fatal error", HS_FAIL);
5569 /*==========================================================
5571 ** ncr chip exception handler for selection timeout
5573 **==========================================================
5575 ** There seems to be a bug in the 53c810.
5576 ** Although a STO-Interrupt is pending,
5577 ** it continues executing script commands.
5578 ** But it will fail and interrupt (IID) on
5579 ** the next instruction where it's looking
5580 ** for a valid phase.
5582 **----------------------------------------------------------
5585 void ncr_int_sto (ncb_p np)
5587 u_long dsa, scratcha, diff;
5589 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
5592 ** look for nccb and set the status.
5597 while (cp && (CCB_PHYS (cp, phys) != dsa))
5601 cp-> host_status = HS_SEL_TIMEOUT;
5602 ncr_complete (np, cp);
5606 ** repair start queue
5609 scratcha = INL (nc_scratcha);
5610 diff = scratcha - NCB_SCRIPTH_PHYS (np, tryloop);
5612 /* assert ((diff <= MAX_START * 20) && !(diff % 20));*/
5614 if ((diff <= MAX_START * 20) && !(diff % 20)) {
5615 WRITESCRIPT(startpos[0], scratcha);
5616 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
5619 ncr_init (np, "selection timeout", HS_FAIL);
5622 /*==========================================================
5625 ** ncr chip exception handler for phase errors.
5628 **==========================================================
5630 ** We have to construct a new transfer descriptor,
5631 ** to transfer the rest of the current block.
5633 **----------------------------------------------------------
5636 static void ncr_int_ma (ncb_p np, u_char dstat)
5643 volatile void *vdsp_base;
5645 u_int32_t oadr, olen;
5646 u_int32_t *tblp, *newcmd;
5647 u_char cmd, sbcl, ss0, ss2, ctest5;
5654 ss0 = INB (nc_sstat0);
5655 ss2 = INB (nc_sstat2);
5656 sbcl= INB (nc_sbcl);
5659 rest= dbc & 0xffffff;
5661 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
5663 delta=(((ctest5<<8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
5665 delta=(INB (nc_dfifo) - rest) & 0x7f;
5669 ** The data in the dma fifo has not been transfered to
5670 ** the target -> add the amount to the rest
5671 ** and clear the data.
5672 ** Check the sstat2 register in case of wide transfer.
5675 if (!(dstat & DFE)) rest += delta;
5676 if (ss0 & OLF) rest++;
5677 if (ss0 & ORF) rest++;
5678 if (INB(nc_scntl3) & EWS) {
5679 if (ss2 & OLF1) rest++;
5680 if (ss2 & ORF1) rest++;
5682 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
5683 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5686 ** locate matching cp
5689 while (cp && (CCB_PHYS (cp, phys) != dsa))
5693 printf ("%s: SCSI phase error fixup: CCB already dequeued (%p)\n",
5694 ncr_name (np), (void *) np->header.cp);
5697 if (cp != np->header.cp) {
5698 printf ("%s: SCSI phase error fixup: CCB address mismatch "
5699 "(%p != %p) np->nccb = %p\n",
5700 ncr_name (np), (void *)cp, (void *)np->header.cp,
5701 (void *)np->link_nccb);
5706 ** find the interrupted script command,
5707 ** and the address at which to continue.
5710 if (dsp == vtophys (&cp->patch[2])) {
5712 vdsp_off = offsetof(struct nccb, patch[0]);
5713 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5714 } else if (dsp == vtophys (&cp->patch[6])) {
5716 vdsp_off = offsetof(struct nccb, patch[4]);
5717 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5718 } else if (dsp > np->p_script &&
5719 dsp <= np->p_script + sizeof(struct script)) {
5720 vdsp_base = np->script;
5721 vdsp_off = dsp - np->p_script - 8;
5724 vdsp_base = np->scripth;
5725 vdsp_off = dsp - np->p_scripth - 8;
5730 ** log the information
5732 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) {
5733 printf ("P%x%x ",cmd&7, sbcl&7);
5734 printf ("RL=%d D=%d SS0=%x ",
5735 (unsigned) rest, (unsigned) delta, ss0);
5737 if (DEBUG_FLAGS & DEBUG_PHASE) {
5738 printf ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
5741 nxtdsp, (volatile char*)vdsp_base+vdsp_off, cmd);
5745 ** get old startaddress and old length.
5748 oadr = READSCRIPT_OFF(vdsp_base, vdsp_off + 1*4);
5750 if (cmd & 0x10) { /* Table indirect */
5751 tblp = (u_int32_t *) ((char*) &cp->phys + oadr);
5755 tblp = (u_int32_t *) 0;
5756 olen = READSCRIPT_OFF(vdsp_base, vdsp_off) & 0xffffff;
5759 if (DEBUG_FLAGS & DEBUG_PHASE) {
5760 printf ("OCMD=%x\nTBLP=%p OLEN=%lx OADR=%lx\n",
5761 (unsigned) (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24),
5768 ** if old phase not dataphase, leave here.
5771 if (cmd != (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24)) {
5772 PRINT_ADDR(cp->ccb);
5773 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
5775 (unsigned)READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24);
5780 PRINT_ADDR(cp->ccb);
5781 printf ("phase change %x-%x %d@%08x resid=%d.\n",
5782 cmd&7, sbcl&7, (unsigned)olen,
5783 (unsigned)oadr, (unsigned)rest);
5785 OUTB (nc_dcntl, np->rv_dcntl | STD);
5790 ** choose the correct patch area.
5791 ** if savep points to one, choose the other.
5795 if (cp->phys.header.savep == vtophys (newcmd)) newcmd+=4;
5798 ** fillin the commands
5801 newcmd[0] = ((cmd & 0x0f) << 24) | rest;
5802 newcmd[1] = oadr + olen - rest;
5803 newcmd[2] = SCR_JUMP;
5806 if (DEBUG_FLAGS & DEBUG_PHASE) {
5807 PRINT_ADDR(cp->ccb);
5808 printf ("newcmd[%d] %x %x %x %x.\n",
5809 (int)(newcmd - cp->patch),
5810 (unsigned)newcmd[0],
5811 (unsigned)newcmd[1],
5812 (unsigned)newcmd[2],
5813 (unsigned)newcmd[3]);
5816 ** fake the return address (to the patch).
5817 ** and restart script processor at dispatcher.
5819 np->profile.num_break++;
5820 OUTL (nc_temp, vtophys (newcmd));
5822 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
5824 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn));
5827 /*==========================================================
5830 ** ncr chip exception handler for programmed interrupts.
5833 **==========================================================
5836 static int ncr_show_msg (u_char * msg)
5840 if (*msg==MSG_EXTENDED) {
5842 if (i-1>msg[1]) break;
5843 printf ("-%x",msg[i]);
5846 } else if ((*msg & 0xf0) == 0x20) {
5847 printf ("-%x",msg[1]);
5853 void ncr_int_sir (ncb_p np)
5856 u_char chg, ofs, per, fak, wide;
5857 u_char num = INB (nc_dsps);
5860 u_int target = INB (nc_sdid) & 0x0f;
5861 tcb_p tp = &np->target[target];
5863 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
5866 case SIR_SENSE_RESTART:
5867 case SIR_STALL_RESTART:
5876 while (cp && (CCB_PHYS (cp, phys) != dsa))
5882 assert (cp == np->header.cp);
5883 if (cp != np->header.cp)
5889 /*--------------------------------------------------------------------
5891 ** Processing of interrupted getcc selects
5893 **--------------------------------------------------------------------
5896 case SIR_SENSE_RESTART:
5897 /*------------------------------------------
5898 ** Script processor is idle.
5899 ** Look for interrupted "check cond"
5900 **------------------------------------------
5903 if (DEBUG_FLAGS & DEBUG_RESTART)
5904 printf ("%s: int#%d",ncr_name (np),num);
5906 for (i=0; i<MAX_TARGET; i++) {
5907 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" t%d", i);
5908 tp = &np->target[i];
5909 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+");
5912 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+");
5913 if ((cp->host_status==HS_BUSY) &&
5914 (cp->s_status==SCSI_STATUS_CHECK_COND))
5916 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("- (remove)");
5917 tp->hold_cp = cp = (nccb_p) 0;
5921 if (DEBUG_FLAGS & DEBUG_RESTART)
5922 printf ("+ restart job ..\n");
5923 OUTL (nc_dsa, CCB_PHYS (cp, phys));
5924 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, getcc));
5929 ** no job, resume normal processing
5931 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" -- remove trap\n");
5932 WRITESCRIPT(start0[0], SCR_INT ^ IFFALSE (0));
5935 case SIR_SENSE_FAILED:
5936 /*-------------------------------------------
5937 ** While trying to select for
5938 ** getting the condition code,
5939 ** a target reselected us.
5940 **-------------------------------------------
5942 if (DEBUG_FLAGS & DEBUG_RESTART) {
5943 PRINT_ADDR(cp->ccb);
5944 printf ("in getcc reselect by t%d.\n",
5945 INB(nc_ssid) & 0x0f);
5951 cp->host_status = HS_BUSY;
5952 cp->s_status = SCSI_STATUS_CHECK_COND;
5953 np->target[cp->ccb->ccb_h.target_id].hold_cp = cp;
5956 ** And patch code to restart it.
5958 WRITESCRIPT(start0[0], SCR_INT);
5961 /*-----------------------------------------------------------------------------
5963 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
5965 ** We try to negotiate sync and wide transfer only after
5966 ** a successfull inquire command. We look at byte 7 of the
5967 ** inquire data to determine the capabilities if the target.
5969 ** When we try to negotiate, we append the negotiation message
5970 ** to the identify and (maybe) simple tag message.
5971 ** The host status field is set to HS_NEGOTIATE to mark this
5974 ** If the target doesn't answer this message immidiately
5975 ** (as required by the standard), the SIR_NEGO_FAIL interrupt
5976 ** will be raised eventually.
5977 ** The handler removes the HS_NEGOTIATE status, and sets the
5978 ** negotiated value to the default (async / nowide).
5980 ** If we receive a matching answer immediately, we check it
5981 ** for validity, and set the values.
5983 ** If we receive a Reject message immediately, we assume the
5984 ** negotiation has failed, and fall back to standard values.
5986 ** If we receive a negotiation message while not in HS_NEGOTIATE
5987 ** state, it's a target initiated negotiation. We prepare a
5988 ** (hopefully) valid answer, set our parameters, and send back
5989 ** this answer to the target.
5991 ** If the target doesn't fetch the answer (no message out phase),
5992 ** we assume the negotiation has failed, and fall back to default
5995 ** When we set the values, we adjust them in all nccbs belonging
5996 ** to this target, in the controller's register, and in the "phys"
5997 ** field of the controller's struct ncb.
5999 ** Possible cases: hs sir msg_in value send goto
6000 ** We try try to negotiate:
6001 ** -> target doesnt't msgin NEG FAIL noop defa. - dispatch
6002 ** -> target rejected our msg NEG FAIL reject defa. - dispatch
6003 ** -> target answered (ok) NEG SYNC sdtr set - clrack
6004 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
6005 ** -> target answered (ok) NEG WIDE wdtr set - clrack
6006 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
6007 ** -> any other msgin NEG FAIL noop defa. - dispatch
6009 ** Target tries to negotiate:
6010 ** -> incoming message --- SYNC sdtr set SDTR -
6011 ** -> incoming message --- WIDE wdtr set WDTR -
6012 ** We sent our answer:
6013 ** -> target doesn't msgout --- PROTO ? defa. - dispatch
6015 **-----------------------------------------------------------------------------
6018 case SIR_NEGO_FAILED:
6019 /*-------------------------------------------------------
6021 ** Negotiation failed.
6022 ** Target doesn't send an answer message,
6023 ** or target rejected our message.
6025 ** Remove negotiation request.
6027 **-------------------------------------------------------
6029 OUTB (HS_PRT, HS_BUSY);
6033 case SIR_NEGO_PROTO:
6034 /*-------------------------------------------------------
6036 ** Negotiation failed.
6037 ** Target doesn't fetch the answer message.
6039 **-------------------------------------------------------
6042 if (DEBUG_FLAGS & DEBUG_NEGO) {
6043 PRINT_ADDR(cp->ccb);
6044 printf ("negotiation failed sir=%x status=%x.\n",
6045 num, cp->nego_status);
6049 ** any error in negotiation:
6050 ** fall back to default mode.
6052 switch (cp->nego_status) {
6055 ncr_setsync (np, cp, 0, 0xe0, 0);
6059 ncr_setwide (np, cp, 0, 0);
6063 np->msgin [0] = MSG_NOOP;
6064 np->msgout[0] = MSG_NOOP;
6065 cp->nego_status = 0;
6066 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
6071 ** Synchronous request message received.
6074 if (DEBUG_FLAGS & DEBUG_NEGO) {
6075 PRINT_ADDR(cp->ccb);
6076 printf ("sync msgin: ");
6077 (void) ncr_show_msg (np->msgin);
6082 ** get requested values.
6088 if (ofs==0) per=255;
6091 ** check values against driver limits.
6093 if (per < np->minsync)
6094 {chg = 1; per = np->minsync;}
6095 if (per < tp->tinfo.user.period)
6096 {chg = 1; per = tp->tinfo.user.period;}
6097 if (ofs > tp->tinfo.user.offset)
6098 {chg = 1; ofs = tp->tinfo.user.offset;}
6101 ** Check against controller limits.
6107 ncr_getsync(np, per, &fak, &scntl3);
6119 if (DEBUG_FLAGS & DEBUG_NEGO) {
6120 PRINT_ADDR(cp->ccb);
6121 printf ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n",
6122 per, scntl3, ofs, fak, chg);
6125 if (INB (HS_PRT) == HS_NEGOTIATE) {
6126 OUTB (HS_PRT, HS_BUSY);
6127 switch (cp->nego_status) {
6131 ** This was an answer message
6135 ** Answer wasn't acceptable.
6137 ncr_setsync (np, cp, 0, 0xe0, 0);
6138 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6143 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs, per);
6144 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6149 ncr_setwide (np, cp, 0, 0);
6155 ** It was a request. Set value and
6156 ** prepare an answer message
6159 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs, per);
6161 np->msgout[0] = MSG_EXTENDED;
6163 np->msgout[2] = MSG_EXT_SDTR;
6164 np->msgout[3] = per;
6165 np->msgout[4] = ofs;
6167 cp->nego_status = NS_SYNC;
6169 if (DEBUG_FLAGS & DEBUG_NEGO) {
6170 PRINT_ADDR(cp->ccb);
6171 printf ("sync msgout: ");
6172 (void) ncr_show_msg (np->msgout);
6177 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6180 np->msgin [0] = MSG_NOOP;
6186 ** Wide request message received.
6188 if (DEBUG_FLAGS & DEBUG_NEGO) {
6189 PRINT_ADDR(cp->ccb);
6190 printf ("wide msgin: ");
6191 (void) ncr_show_msg (np->msgin);
6196 ** get requested values.
6200 wide = np->msgin[3];
6203 ** check values against driver limits.
6206 if (wide > tp->tinfo.user.width)
6207 {chg = 1; wide = tp->tinfo.user.width;}
6209 if (DEBUG_FLAGS & DEBUG_NEGO) {
6210 PRINT_ADDR(cp->ccb);
6211 printf ("wide: wide=%d chg=%d.\n", wide, chg);
6214 if (INB (HS_PRT) == HS_NEGOTIATE) {
6215 OUTB (HS_PRT, HS_BUSY);
6216 switch (cp->nego_status) {
6220 ** This was an answer message
6224 ** Answer wasn't acceptable.
6226 ncr_setwide (np, cp, 0, 1);
6227 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6232 ncr_setwide (np, cp, wide, 1);
6233 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6238 ncr_setsync (np, cp, 0, 0xe0, 0);
6244 ** It was a request, set value and
6245 ** prepare an answer message
6248 ncr_setwide (np, cp, wide, 1);
6250 np->msgout[0] = MSG_EXTENDED;
6252 np->msgout[2] = MSG_EXT_WDTR;
6253 np->msgout[3] = wide;
6255 np->msgin [0] = MSG_NOOP;
6257 cp->nego_status = NS_WIDE;
6259 if (DEBUG_FLAGS & DEBUG_NEGO) {
6260 PRINT_ADDR(cp->ccb);
6261 printf ("wide msgout: ");
6262 (void) ncr_show_msg (np->msgout);
6267 /*--------------------------------------------------------------------
6269 ** Processing of special messages
6271 **--------------------------------------------------------------------
6274 case SIR_REJECT_RECEIVED:
6275 /*-----------------------------------------------
6277 ** We received a MSG_MESSAGE_REJECT message.
6279 **-----------------------------------------------
6282 PRINT_ADDR(cp->ccb);
6283 printf ("MSG_MESSAGE_REJECT received (%x:%x).\n",
6284 (unsigned)np->lastmsg, np->msgout[0]);
6287 case SIR_REJECT_SENT:
6288 /*-----------------------------------------------
6290 ** We received an unknown message
6292 **-----------------------------------------------
6295 PRINT_ADDR(cp->ccb);
6296 printf ("MSG_MESSAGE_REJECT sent for ");
6297 (void) ncr_show_msg (np->msgin);
6301 /*--------------------------------------------------------------------
6303 ** Processing of special messages
6305 **--------------------------------------------------------------------
6308 case SIR_IGN_RESIDUE:
6309 /*-----------------------------------------------
6311 ** We received an IGNORE RESIDUE message,
6312 ** which couldn't be handled by the script.
6314 **-----------------------------------------------
6317 PRINT_ADDR(cp->ccb);
6318 printf ("MSG_IGN_WIDE_RESIDUE received, but not yet implemented.\n");
6321 case SIR_MISSING_SAVE:
6322 /*-----------------------------------------------
6324 ** We received an DISCONNECT message,
6325 ** but the datapointer wasn't saved before.
6327 **-----------------------------------------------
6330 PRINT_ADDR(cp->ccb);
6331 printf ("MSG_DISCONNECT received, but datapointer not saved:\n"
6332 "\tdata=%x save=%x goal=%x.\n",
6333 (unsigned) INL (nc_temp),
6334 (unsigned) np->header.savep,
6335 (unsigned) np->header.goalp);
6338 /*--------------------------------------------------------------------
6340 ** Processing of a "SCSI_STATUS_QUEUE_FULL" status.
6342 ** XXX JGibbs - We should do the same thing for BUSY status.
6344 ** The current command has been rejected,
6345 ** because there are too many in the command queue.
6346 ** We have started too many commands for that target.
6348 **--------------------------------------------------------------------
6350 case SIR_STALL_QUEUE:
6351 cp->xerr_status = XE_OK;
6352 cp->host_status = HS_COMPLETE;
6353 cp->s_status = SCSI_STATUS_QUEUE_FULL;
6354 ncr_freeze_devq(np, cp->ccb->ccb_h.path);
6355 ncr_complete(np, cp);
6359 case SIR_STALL_RESTART:
6360 /*-----------------------------------------------
6362 ** Enable selecting again,
6363 ** if NO disconnected jobs.
6365 **-----------------------------------------------
6368 ** Look for a disconnected job.
6371 while (cp && cp->host_status != HS_DISCONNECT)
6375 ** if there is one, ...
6379 ** wait for reselection
6381 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect));
6386 ** else remove the interrupt.
6389 printf ("%s: queue empty.\n", ncr_name (np));
6390 WRITESCRIPT(start1[0], SCR_INT ^ IFFALSE (0));
6395 OUTB (nc_dcntl, np->rv_dcntl | STD);
6398 /*==========================================================
6401 ** Aquire a control block
6404 **==========================================================
6407 static nccb_p ncr_get_nccb
6408 (ncb_p np, u_long target, u_long lun)
6414 /* Keep our timeout handler out */
6418 ** Lun structure available ?
6421 lp = np->target[target].lp[lun];
6426 ** Look for free CCB
6429 while (cp && cp->magic) {
6435 ** if nothing available, create one.
6439 cp = ncr_alloc_nccb(np, target, lun);
6443 printf("%s: Bogus free cp found\n", ncr_name(np));
6453 /*==========================================================
6456 ** Release one control block
6459 **==========================================================
6462 void ncr_free_nccb (ncb_p np, nccb_p cp)
6468 assert (cp != NULL);
6470 cp -> host_status = HS_IDLE;
6474 /*==========================================================
6477 ** Allocation of resources for Targets/Luns/Tags.
6480 **==========================================================
6484 ncr_alloc_nccb (ncb_p np, u_long target, u_long lun)
6490 assert (np != NULL);
6492 if (target>=MAX_TARGET) return(NULL);
6493 if (lun >=MAX_LUN ) return(NULL);
6495 tp=&np->target[target];
6497 if (!tp->jump_tcb.l_cmd) {
6502 tp->jump_tcb.l_cmd = (SCR_JUMP^IFFALSE (DATA (0x80 + target)));
6503 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr;
6506 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6507 tp->getscr[1] = vtophys (&tp->tinfo.sval);
6508 tp->getscr[2] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_sxfer);
6510 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6511 tp->getscr[4] = vtophys (&tp->tinfo.wval);
6512 tp->getscr[5] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_scntl3);
6514 assert (((offsetof(struct ncr_reg, nc_sxfer) ^
6515 (offsetof(struct tcb ,tinfo)
6516 + offsetof(struct ncr_target_tinfo, sval))) & 3) == 0);
6517 assert (((offsetof(struct ncr_reg, nc_scntl3) ^
6518 (offsetof(struct tcb, tinfo)
6519 + offsetof(struct ncr_target_tinfo, wval))) &3) == 0);
6521 tp->call_lun.l_cmd = (SCR_CALL);
6522 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun);
6524 tp->jump_lcb.l_cmd = (SCR_JUMP);
6525 tp->jump_lcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
6526 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb);
6530 ** Logic unit control block
6537 lp = malloc (sizeof (struct lcb), M_DEVBUF, M_WAITOK | M_ZERO);
6542 lp->jump_lcb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (lun)));
6543 lp->jump_lcb.l_paddr = tp->jump_lcb.l_paddr;
6545 lp->call_tag.l_cmd = (SCR_CALL);
6546 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag);
6548 lp->jump_nccb.l_cmd = (SCR_JUMP);
6549 lp->jump_nccb.l_paddr = NCB_SCRIPTH_PHYS (np, aborttag);
6554 ** Chain into LUN list
6556 tp->jump_lcb.l_paddr = vtophys (&lp->jump_lcb);
6564 cp = malloc (sizeof (struct nccb), M_DEVBUF, M_WAITOK | M_ZERO);
6566 if (DEBUG_FLAGS & DEBUG_ALLOC) {
6567 printf ("new nccb @%p.\n", cp);
6571 ** Fill in physical addresses
6574 cp->p_nccb = vtophys (cp);
6577 ** Chain into reselect list
6579 cp->jump_nccb.l_cmd = SCR_JUMP;
6580 cp->jump_nccb.l_paddr = lp->jump_nccb.l_paddr;
6581 lp->jump_nccb.l_paddr = CCB_PHYS (cp, jump_nccb);
6582 cp->call_tmp.l_cmd = SCR_CALL;
6583 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp);
6586 ** Chain into wakeup list
6588 cp->link_nccb = np->link_nccb;
6592 ** Chain into CCB list
6594 cp->next_nccb = lp->next_nccb;
6600 /*==========================================================
6603 ** Build Scatter Gather Block
6606 **==========================================================
6608 ** The transfer area may be scattered among
6609 ** several non adjacent physical pages.
6611 ** We may use MAX_SCATTER blocks.
6613 **----------------------------------------------------------
6616 static int ncr_scatter
6617 (struct dsb* phys, vm_offset_t vaddr, vm_size_t datalen)
6619 u_long paddr, pnext;
6621 u_short segment = 0;
6622 u_long segsize, segaddr;
6623 u_long size, csize = 0;
6624 u_long chunk = MAX_SIZE;
6627 bzero (&phys->data, sizeof (phys->data));
6628 if (!datalen) return (0);
6630 paddr = vtophys (vaddr);
6633 ** insert extra break points at a distance of chunk.
6634 ** We try to reduce the number of interrupts caused
6635 ** by unexpected phase changes due to disconnects.
6636 ** A typical harddisk may disconnect before ANY block.
6637 ** If we wanted to avoid unexpected phase changes at all
6638 ** we had to use a break point every 512 bytes.
6639 ** Of course the number of scatter/gather blocks is
6643 free = MAX_SCATTER - 1;
6645 if (vaddr & PAGE_MASK) free -= datalen / PAGE_SIZE;
6648 while ((chunk * free >= 2 * datalen) && (chunk>=1024))
6651 if(DEBUG_FLAGS & DEBUG_SCATTER)
6652 printf("ncr?:\tscattering virtual=%p size=%d chunk=%d.\n",
6653 (void *) vaddr, (unsigned) datalen, (unsigned) chunk);
6656 ** Build data descriptors.
6658 while (datalen && (segment < MAX_SCATTER)) {
6661 ** this segment is empty
6667 if (!csize) csize = chunk;
6669 while ((datalen) && (paddr == pnext) && (csize)) {
6672 ** continue this segment
6674 pnext = (paddr & (~PAGE_MASK)) + PAGE_SIZE;
6680 size = pnext - paddr; /* page size */
6681 if (size > datalen) size = datalen; /* data size */
6682 if (size > csize ) size = csize ; /* chunksize */
6688 paddr = vtophys (vaddr);
6691 if(DEBUG_FLAGS & DEBUG_SCATTER)
6692 printf ("\tseg #%d addr=%x size=%d (rest=%d).\n",
6696 (unsigned) datalen);
6698 phys->data[segment].addr = segaddr;
6699 phys->data[segment].size = segsize;
6704 printf("ncr?: scatter/gather failed (residue=%d).\n",
6705 (unsigned) datalen);
6712 /*==========================================================
6715 ** Test the pci bus snoop logic :-(
6717 ** Has to be called with interrupts disabled.
6720 **==========================================================
6723 #ifndef NCR_IOMAPPED
6724 static int ncr_regtest (struct ncb* np)
6726 volatile u_int32_t data;
6728 ** ncr registers may NOT be cached.
6729 ** write 0xffffffff to a read only register area,
6730 ** and try to read it back.
6733 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
6734 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
6736 if (data == 0xffffffff) {
6738 if ((data & 0xe2f0fffd) != 0x02000080) {
6740 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6748 static int ncr_snooptest (struct ncb* np)
6750 u_int32_t ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
6752 #ifndef NCR_IOMAPPED
6753 err |= ncr_regtest (np);
6754 if (err) return (err);
6759 pc = NCB_SCRIPTH_PHYS (np, snooptest);
6763 ** Set memory and register.
6765 ncr_cache = host_wr;
6766 OUTL (nc_temp, ncr_wr);
6768 ** Start script (exchange values)
6772 ** Wait 'til done (with timeout)
6774 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
6775 if (INB(nc_istat) & (INTF|SIP|DIP))
6778 ** Save termination position.
6782 ** Read memory and register.
6784 host_rd = ncr_cache;
6785 ncr_rd = INL (nc_scratcha);
6786 ncr_bk = INL (nc_temp);
6790 OUTB (nc_istat, SRST);
6792 OUTB (nc_istat, 0 );
6794 ** check for timeout
6796 if (i>=NCR_SNOOP_TIMEOUT) {
6797 printf ("CACHE TEST FAILED: timeout.\n");
6801 ** Check termination position.
6803 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
6804 printf ("CACHE TEST FAILED: script execution failed.\n");
6805 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6806 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
6807 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
6813 if (host_wr != ncr_rd) {
6814 printf ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
6815 (int) host_wr, (int) ncr_rd);
6818 if (host_rd != ncr_wr) {
6819 printf ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
6820 (int) ncr_wr, (int) host_rd);
6823 if (ncr_bk != ncr_wr) {
6824 printf ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
6825 (int) ncr_wr, (int) ncr_bk);
6831 /*==========================================================
6834 ** Profiling the drivers and targets performance.
6837 **==========================================================
6841 ** Compute the difference in milliseconds.
6844 static int ncr_delta (int *from, int *to)
6846 if (!from) return (-1);
6847 if (!to) return (-2);
6848 return ((to - from) * 1000 / hz);
6851 #define PROFILE cp->phys.header.stamp
6852 static void ncb_profile (ncb_p np, nccb_p cp)
6854 int co, da, st, en, di, se, post,work,disc;
6857 PROFILE.end = ticks;
6859 st = ncr_delta (&PROFILE.start,&PROFILE.status);
6860 if (st<0) return; /* status not reached */
6862 da = ncr_delta (&PROFILE.start,&PROFILE.data);
6863 if (da<0) return; /* No data transfer phase */
6865 co = ncr_delta (&PROFILE.start,&PROFILE.command);
6866 if (co<0) return; /* command not executed */
6868 en = ncr_delta (&PROFILE.start,&PROFILE.end),
6869 di = ncr_delta (&PROFILE.start,&PROFILE.disconnect),
6870 se = ncr_delta (&PROFILE.start,&PROFILE.select);
6874 ** @PROFILE@ Disconnect time invalid if multiple disconnects
6877 if (di>=0) disc = se-di; else disc = 0;
6879 work = (st - co) - disc;
6881 diff = (np->disc_phys - np->disc_ref) & 0xff;
6882 np->disc_ref += diff;
6884 np->profile.num_trans += 1;
6886 np->profile.num_bytes += cp->ccb->csio.dxfer_len;
6887 np->profile.num_disc += diff;
6888 np->profile.ms_setup += co;
6889 np->profile.ms_data += work;
6890 np->profile.ms_disc += disc;
6891 np->profile.ms_post += post;
6895 /*==========================================================
6897 ** Determine the ncr's clock frequency.
6898 ** This is essential for the negotiation
6899 ** of the synchronous transfer rate.
6901 **==========================================================
6903 ** Note: we have to return the correct value.
6904 ** THERE IS NO SAVE DEFAULT VALUE.
6906 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6907 ** 53C860 and 53C875 rev. 1 support fast20 transfers but
6908 ** do not have a clock doubler and so are provided with a
6909 ** 80 MHz clock. All other fast20 boards incorporate a doubler
6910 ** and so should be delivered with a 40 MHz clock.
6911 ** The future fast40 chips (895/895) use a 40 Mhz base clock
6912 ** and provide a clock quadrupler (160 Mhz). The code below
6913 ** tries to deal as cleverly as possible with all this stuff.
6915 **----------------------------------------------------------
6919 * Select NCR SCSI clock frequency
6921 static void ncr_selectclock(ncb_p np, u_char scntl3)
6923 if (np->multiplier < 2) {
6924 OUTB(nc_scntl3, scntl3);
6928 if (bootverbose >= 2)
6929 printf ("%s: enabling clock multiplier\n", ncr_name(np));
6931 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6932 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
6934 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6937 printf("%s: the chip cannot lock the frequency\n", ncr_name(np));
6938 } else /* Wait 20 micro-seconds for doubler */
6940 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6941 OUTB(nc_scntl3, scntl3);
6942 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6943 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6947 * calculate NCR SCSI clock frequency (in KHz)
6950 ncrgetfreq (ncb_p np, int gen)
6954 * Measure GEN timer delay in order
6955 * to calculate SCSI clock frequency
6957 * This code will never execute too
6958 * many loop iterations (if DELAY is
6959 * reasonably correct). It could get
6960 * too low a delay (too high a freq.)
6961 * if the CPU is slow executing the
6962 * loop for some reason (an NMI, for
6963 * example). For this reason we will
6964 * if multiple measurements are to be
6965 * performed trust the higher delay
6966 * (lower frequency returned).
6968 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
6969 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6970 (void) INW (nc_sist); /* clear pending scsi interrupt */
6971 OUTB (nc_dien , 0); /* mask all dma interrupts */
6972 (void) INW (nc_sist); /* another one, just to be sure :) */
6973 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6974 OUTB (nc_stime1, 0); /* disable general purpose timer */
6975 OUTB (nc_stime1, gen); /* set to nominal delay of (1<<gen) * 125us */
6976 while (!(INW(nc_sist) & GEN) && ms++ < 1000)
6977 DELAY(1000); /* count ms */
6978 OUTB (nc_stime1, 0); /* disable general purpose timer */
6979 OUTB (nc_scntl3, 0);
6981 * Set prescaler to divide by whatever "0" means.
6982 * "0" ought to choose divide by 2, but appears
6983 * to set divide by 3.5 mode in my 53c810 ...
6985 OUTB (nc_scntl3, 0);
6987 if (bootverbose >= 2)
6988 printf ("\tDelay (GEN=%d): %u msec\n", gen, ms);
6990 * adjust for prescaler, and convert into KHz
6992 return ms ? ((1 << gen) * 4440) / ms : 0;
6995 static void ncr_getclock (ncb_p np, u_char multiplier)
6997 unsigned char scntl3;
6998 unsigned char stest1;
6999 scntl3 = INB(nc_scntl3);
7000 stest1 = INB(nc_stest1);
7004 if (multiplier > 1) {
7005 np->multiplier = multiplier;
7006 np->clock_khz = 40000 * multiplier;
7008 if ((scntl3 & 7) == 0) {
7010 /* throw away first result */
7011 (void) ncrgetfreq (np, 11);
7012 f1 = ncrgetfreq (np, 11);
7013 f2 = ncrgetfreq (np, 11);
7015 if (bootverbose >= 2)
7016 printf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2);
7017 if (f1 > f2) f1 = f2; /* trust lower result */
7019 scntl3 = 5; /* >45Mhz: assume 80MHz */
7021 scntl3 = 3; /* <45Mhz: assume 40MHz */
7024 else if ((scntl3 & 7) == 5)
7025 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */
7029 /*=========================================================================*/
7031 #ifdef NCR_TEKRAM_EEPROM
7033 struct tekram_eeprom_dev {
7035 #define TKR_PARCHK 0x01
7036 #define TKR_TRYSYNC 0x02
7037 #define TKR_ENDISC 0x04
7038 #define TKR_STARTUNIT 0x08
7039 #define TKR_USETAGS 0x10
7040 #define TKR_TRYWIDE 0x20
7041 u_char syncparam; /* max. sync transfer rate (table ?) */
7047 struct tekram_eeprom {
7048 struct tekram_eeprom_dev
7052 #define TKR_ADPT_GT2DRV 0x01
7053 #define TKR_ADPT_GT1GB 0x02
7054 #define TKR_ADPT_RSTBUS 0x04
7055 #define TKR_ADPT_ACTNEG 0x08
7056 #define TKR_ADPT_NOSEEK 0x10
7057 #define TKR_ADPT_MORLUN 0x20
7058 u_char delay; /* unit ? ( table ??? ) */
7059 u_char tags; /* use 4 times as many ... */
7064 tekram_write_bit (ncb_p np, int bit)
7066 u_char val = 0x10 + ((bit & 1) << 1);
7069 OUTB (nc_gpreg, val);
7071 OUTB (nc_gpreg, val | 0x04);
7073 OUTB (nc_gpreg, val);
7078 tekram_read_bit (ncb_p np)
7080 OUTB (nc_gpreg, 0x10);
7082 OUTB (nc_gpreg, 0x14);
7084 return INB (nc_gpreg) & 1;
7088 read_tekram_eeprom_reg (ncb_p np, int reg)
7092 int cmd = 0x80 | reg;
7094 OUTB (nc_gpreg, 0x10);
7096 tekram_write_bit (np, 1);
7097 for (bit = 7; bit >= 0; bit--)
7099 tekram_write_bit (np, cmd >> bit);
7102 for (bit = 0; bit < 16; bit++)
7105 result |= tekram_read_bit (np);
7108 OUTB (nc_gpreg, 0x00);
7113 read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer)
7115 u_short *p = (u_short *) buffer;
7119 if (INB (nc_gpcntl) != 0x09)
7123 for (i = 0; i < 64; i++)
7126 if((i&0x0f) == 0) printf ("%02x:", i*2);
7127 val = read_tekram_eeprom_reg (np, i);
7131 if((i&0x01) == 0x00) printf (" ");
7132 printf ("%02x%02x", val & 0xff, (val >> 8) & 0xff);
7133 if((i&0x0f) == 0x0f) printf ("\n");
7135 printf ("Sum = %04x\n", sum);
7136 return sum == 0x1234;
7138 #endif /* NCR_TEKRAM_EEPROM */
7140 static device_method_t ncr_methods[] = {
7141 /* Device interface */
7142 DEVMETHOD(device_probe, ncr_probe),
7143 DEVMETHOD(device_attach, ncr_attach),
7148 static driver_t ncr_driver = {
7154 static devclass_t ncr_devclass;
7156 DRIVER_MODULE(if_ncr, pci, ncr_driver, ncr_devclass, 0, 0);
7158 /*=========================================================================*/
7159 #endif /* _KERNEL */