sys/dev/drm/i915/i915_debugfs.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Keith Packard <keithp@keithp.com>
  26  *
  27  */
  28
  29 #include <linux/export.h>
  30 #include <drm/drmP.h>
  31 #include "intel_drv.h"
  32 #include "intel_ringbuffer.h"
  33 #include <drm/i915_drm.h>
  34 #include "i915_drv.h"
  35
  36 #define DRM_I915_RING_DEBUG 1
  37
  38
  39 #if defined(CONFIG_DEBUG_FS)
  40
  41 enum {
  42         ACTIVE_LIST,
  43         INACTIVE_LIST,
  44         PINNED_LIST,
  45 };
  46
  47 static const char *yesno(int v)
  48 {
  49         return v ? "yes" : "no";
  50 }
  51
  52 static int i915_capabilities(struct seq_file *m, void *data)
  53 {
  54         struct drm_info_node *node = (struct drm_info_node *) m->private;
  55         struct drm_device *dev = node->minor->dev;
  56         const struct intel_device_info *info = INTEL_INFO(dev);
  57
  58         seq_printf(m, "gen: %d\n", info->gen);
  59         seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
  60 #define PRINT_FLAG(x)  seq_printf(m, #x ": %s\n", yesno(info->x))
  61 #define SEP_SEMICOLON ;
  62         DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_SEMICOLON);
  63 #undef PRINT_FLAG
  64 #undef SEP_SEMICOLON
  65
  66         return 0;
  67 }
  68
  69 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
  70 {
  71         if (obj->user_pin_count > 0)
  72                 return "P";
  73         else if (obj->pin_count > 0)
  74                 return "p";
  75         else
  76                 return " ";
  77 }
  78
  79 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
  80 {
  81         switch (obj->tiling_mode) {
  82         default:
  83         case I915_TILING_NONE: return " ";
  84         case I915_TILING_X: return "X";
  85         case I915_TILING_Y: return "Y";
  86         }
  87 }
  88
  89 static const char *cache_level_str(int type)
  90 {
  91         switch (type) {
  92         case I915_CACHE_NONE: return " uncached";
  93         case I915_CACHE_LLC: return " snooped (LLC)";
  94         case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
  95         default: return "";
  96         }
  97 }
  98
  99 static void
 100 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
 101 {
 102         seq_printf(m, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
 103                    &obj->base,
 104                    get_pin_flag(obj),
 105                    get_tiling_flag(obj),
 106                    obj->base.size / 1024,
 107                    obj->base.read_domains,
 108                    obj->base.write_domain,
 109                    obj->last_read_seqno,
 110                    obj->last_write_seqno,
 111                    obj->last_fenced_seqno,
 112                    cache_level_str(obj->cache_level),
 113                    obj->dirty ? " dirty" : "",
 114                    obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
 115         if (obj->base.name)
 116                 seq_printf(m, " (name: %d)", obj->base.name);
 117         if (obj->pin_count)
 118                 seq_printf(m, " (pinned x %d)", obj->pin_count);
 119         if (obj->fence_reg != I915_FENCE_REG_NONE)
 120                 seq_printf(m, " (fence: %d)", obj->fence_reg);
 121         if (obj->gtt_space != NULL)
 122                 seq_printf(m, " (gtt offset: %08x, size: %08x)",
 123                            obj->gtt_offset, (unsigned int)obj->gtt_space->size);
 124         if (obj->stolen)
 125                 seq_printf(m, " (stolen: %08lx)", obj->stolen->start);
 126         if (obj->pin_mappable || obj->fault_mappable) {
 127                 char s[3], *t = s;
 128                 if (obj->pin_mappable)
 129                         *t++ = 'p';
 130                 if (obj->fault_mappable)
 131                         *t++ = 'f';
 132                 *t = '\0';
 133                 seq_printf(m, " (%s mappable)", s);
 134         }
 135         if (obj->ring != NULL)
 136                 seq_printf(m, " (%s)", obj->ring->name);
 137 }
 138
 139 static int i915_gem_object_list_info(struct seq_file *m, void *data)
 140 {
 141         struct drm_info_node *node = (struct drm_info_node *) m->private;
 142         uintptr_t list = (uintptr_t) node->info_ent->data;
 143         struct list_head *head;
 144         struct drm_device *dev = node->minor->dev;
 145         drm_i915_private_t *dev_priv = dev->dev_private;
 146         struct drm_i915_gem_object *obj;
 147         size_t total_obj_size, total_gtt_size;
 148         int count, ret;
 149
 150         ret = mutex_lock_interruptible(&dev->struct_mutex);
 151         if (ret)
 152                 return ret;
 153
 154         switch (list) {
 155         case ACTIVE_LIST:
 156                 seq_printf(m, "Active:\n");
 157                 head = &dev_priv->mm.active_list;
 158                 break;
 159         case INACTIVE_LIST:
 160                 seq_printf(m, "Inactive:\n");
 161                 head = &dev_priv->mm.inactive_list;
 162                 break;
 163         default:
 164                 mutex_unlock(&dev->struct_mutex);
 165                 return -EINVAL;
 166         }
 167
 168         total_obj_size = total_gtt_size = count = 0;
 169         list_for_each_entry(obj, head, mm_list) {
 170                 seq_printf(m, "   ");
 171                 describe_obj(m, obj);
 172                 seq_printf(m, "\n");
 173                 total_obj_size += obj->base.size;
 174                 total_gtt_size += obj->gtt_space->size;
 175                 count++;
 176         }
 177         mutex_unlock(&dev->struct_mutex);
 178
 179         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 180                    count, total_obj_size, total_gtt_size);
 181         return 0;
 182 }
 183
 184 #define count_objects(list, member) do { \
 185         list_for_each_entry(obj, list, member) { \
 186                 size += obj->gtt_space->size; \
 187                 ++count; \
 188                 if (obj->map_and_fenceable) { \
 189                         mappable_size += obj->gtt_space->size; \
 190                         ++mappable_count; \
 191                 } \
 192         } \
 193 } while (0)
 194
 195 struct file_stats {
 196         int count;
 197         size_t total, active, inactive, unbound;
 198 };
 199
 200 static int per_file_stats(int id, void *ptr, void *data)
 201 {
 202         struct drm_i915_gem_object *obj = ptr;
 203         struct file_stats *stats = data;
 204
 205         stats->count++;
 206         stats->total += obj->base.size;
 207
 208         if (obj->gtt_space) {
 209                 if (!list_empty(&obj->ring_list))
 210                         stats->active += obj->base.size;
 211                 else
 212                         stats->inactive += obj->base.size;
 213         } else {
 214                 if (!list_empty(&obj->global_list))
 215                         stats->unbound += obj->base.size;
 216         }
 217
 218         return 0;
 219 }
 220
 221 static int i915_gem_object_info(struct seq_file *m, void* data)
 222 {
 223         struct drm_info_node *node = (struct drm_info_node *) m->private;
 224         struct drm_device *dev = node->minor->dev;
 225         struct drm_i915_private *dev_priv = dev->dev_private;
 226         u32 count, mappable_count, purgeable_count;
 227         size_t size, mappable_size, purgeable_size;
 228         struct drm_i915_gem_object *obj;
 229         struct drm_file *file;
 230         int ret;
 231
 232         ret = mutex_lock_interruptible(&dev->struct_mutex);
 233         if (ret)
 234                 return ret;
 235
 236         seq_printf(m, "%u objects, %zu bytes\n",
 237                    dev_priv->mm.object_count,
 238                    dev_priv->mm.object_memory);
 239
 240         size = count = mappable_size = mappable_count = 0;
 241         count_objects(&dev_priv->mm.bound_list, global_list);
 242         seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
 243                    count, mappable_count, size, mappable_size);
 244
 245         size = count = mappable_size = mappable_count = 0;
 246         count_objects(&dev_priv->mm.active_list, mm_list);
 247         seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
 248                    count, mappable_count, size, mappable_size);
 249
 250         size = count = mappable_size = mappable_count = 0;
 251         count_objects(&dev_priv->mm.inactive_list, mm_list);
 252         seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
 253                    count, mappable_count, size, mappable_size);
 254
 255         size = count = purgeable_size = purgeable_count = 0;
 256         list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list) {
 257                 size += obj->base.size, ++count;
 258                 if (obj->madv == I915_MADV_DONTNEED)
 259                         purgeable_size += obj->base.size, ++purgeable_count;
 260         }
 261         seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
 262
 263         size = count = mappable_size = mappable_count = 0;
 264         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
 265                 if (obj->fault_mappable) {
 266                         size += obj->gtt_space->size;
 267                         ++count;
 268                 }
 269                 if (obj->pin_mappable) {
 270                         mappable_size += obj->gtt_space->size;
 271                         ++mappable_count;
 272                 }
 273                 if (obj->madv == I915_MADV_DONTNEED) {
 274                         purgeable_size += obj->base.size;
 275                         ++purgeable_count;
 276                 }
 277         }
 278         seq_printf(m, "%u purgeable objects, %zu bytes\n",
 279                    purgeable_count, purgeable_size);
 280         seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
 281                    mappable_count, mappable_size);
 282         seq_printf(m, "%u fault mappable objects, %zu bytes\n",
 283                    count, size);
 284
 285         seq_printf(m, "%zu [%lu] gtt total\n",
 286                    dev_priv->gtt.total,
 287                    dev_priv->gtt.mappable_end - dev_priv->gtt.start);
 288
 289         seq_printf(m, "\n");
 290         list_for_each_entry_reverse(file, &dev->filelist, lhead) {
 291                 struct file_stats stats;
 292
 293                 memset(&stats, 0, sizeof(stats));
 294                 idr_for_each(&file->object_idr, per_file_stats, &stats);
 295                 seq_printf(m, "%s: %u objects, %zu bytes (%zu active, %zu inactive, %zu unbound)\n",
 296                            get_pid_task(file->pid, PIDTYPE_PID)->comm,
 297                            stats.count,
 298                            stats.total,
 299                            stats.active,
 300                            stats.inactive,
 301                            stats.unbound);
 302         }
 303
 304         mutex_unlock(&dev->struct_mutex);
 305
 306         return 0;
 307 }
 308
 309 static int i915_gem_gtt_info(struct seq_file *m, void* data)
 310 {
 311         struct drm_info_node *node = (struct drm_info_node *) m->private;
 312         struct drm_device *dev = node->minor->dev;
 313         uintptr_t list = (uintptr_t) node->info_ent->data;
 314         struct drm_i915_private *dev_priv = dev->dev_private;
 315         struct drm_i915_gem_object *obj;
 316         size_t total_obj_size, total_gtt_size;
 317         int count, ret;
 318
 319         ret = mutex_lock_interruptible(&dev->struct_mutex);
 320         if (ret)
 321                 return ret;
 322
 323         total_obj_size = total_gtt_size = count = 0;
 324         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
 325                 if (list == PINNED_LIST && obj->pin_count == 0)
 326                         continue;
 327
 328                 seq_printf(m, "   ");
 329                 describe_obj(m, obj);
 330                 seq_printf(m, "\n");
 331                 total_obj_size += obj->base.size;
 332                 total_gtt_size += obj->gtt_space->size;
 333                 count++;
 334         }
 335
 336         mutex_unlock(&dev->struct_mutex);
 337
 338         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 339                    count, total_obj_size, total_gtt_size);
 340
 341         return 0;
 342 }
 343
 344 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
 345 {
 346         struct drm_info_node *node = (struct drm_info_node *) m->private;
 347         struct drm_device *dev = node->minor->dev;
 348         unsigned long flags;
 349         struct intel_crtc *crtc;
 350
 351         list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
 352                 const char pipe = pipe_name(crtc->pipe);
 353                 const char plane = plane_name(crtc->plane);
 354                 struct intel_unpin_work *work;
 355
 356                 spin_lock_irqsave(&dev->event_lock, flags);
 357                 work = crtc->unpin_work;
 358                 if (work == NULL) {
 359                         seq_printf(m, "No flip due on pipe %c (plane %c)\n",
 360                                    pipe, plane);
 361                 } else {
 362                         if (atomic_read(&work->pending) < INTEL_FLIP_COMPLETE) {
 363                                 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
 364                                            pipe, plane);
 365                         } else {
 366                                 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
 367                                            pipe, plane);
 368                         }
 369                         if (work->enable_stall_check)
 370                                 seq_printf(m, "Stall check enabled, ");
 371                         else
 372                                 seq_printf(m, "Stall check waiting for page flip ioctl, ");
 373                         seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
 374
 375                         if (work->old_fb_obj) {
 376                                 struct drm_i915_gem_object *obj = work->old_fb_obj;
 377                                 if (obj)
 378                                         seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 379                         }
 380                         if (work->pending_flip_obj) {
 381                                 struct drm_i915_gem_object *obj = work->pending_flip_obj;
 382                                 if (obj)
 383                                         seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 384                         }
 385                 }
 386                 spin_unlock_irqrestore(&dev->event_lock, flags);
 387         }
 388
 389         return 0;
 390 }
 391
 392 static int i915_gem_request_info(struct seq_file *m, void *data)
 393 {
 394         struct drm_info_node *node = (struct drm_info_node *) m->private;
 395         struct drm_device *dev = node->minor->dev;
 396         drm_i915_private_t *dev_priv = dev->dev_private;
 397         struct intel_ring_buffer *ring;
 398         struct drm_i915_gem_request *gem_request;
 399         int ret, count, i;
 400
 401         ret = mutex_lock_interruptible(&dev->struct_mutex);
 402         if (ret)
 403                 return ret;
 404
 405         count = 0;
 406         for_each_ring(ring, dev_priv, i) {
 407                 if (list_empty(&ring->request_list))
 408                         continue;
 409
 410                 seq_printf(m, "%s requests:\n", ring->name);
 411                 list_for_each_entry(gem_request,
 412                                     &ring->request_list,
 413                                     list) {
 414                         seq_printf(m, "    %d @ %d\n",
 415                                    gem_request->seqno,
 416                                    (int) (jiffies - gem_request->emitted_jiffies));
 417                 }
 418                 count++;
 419         }
 420         mutex_unlock(&dev->struct_mutex);
 421
 422         if (count == 0)
 423                 seq_printf(m, "No requests\n");
 424
 425         return 0;
 426 }
 427
 428 static void i915_ring_seqno_info(struct seq_file *m,
 429                                  struct intel_ring_buffer *ring)
 430 {
 431         if (ring->get_seqno) {
 432                 seq_printf(m, "Current sequence (%s): %u\n",
 433                            ring->name, ring->get_seqno(ring, false));
 434         }
 435 }
 436
 437 static int i915_gem_seqno_info(struct seq_file *m, void *data)
 438 {
 439         struct drm_info_node *node = (struct drm_info_node *) m->private;
 440         struct drm_device *dev = node->minor->dev;
 441         drm_i915_private_t *dev_priv = dev->dev_private;
 442         struct intel_ring_buffer *ring;
 443         int ret, i;
 444
 445         ret = mutex_lock_interruptible(&dev->struct_mutex);
 446         if (ret)
 447                 return ret;
 448
 449         for_each_ring(ring, dev_priv, i)
 450                 i915_ring_seqno_info(m, ring);
 451
 452         mutex_unlock(&dev->struct_mutex);
 453
 454         return 0;
 455 }
 456
 457
 458 static int i915_interrupt_info(struct seq_file *m, void *data)
 459 {
 460         struct drm_info_node *node = (struct drm_info_node *) m->private;
 461         struct drm_device *dev = node->minor->dev;
 462         drm_i915_private_t *dev_priv = dev->dev_private;
 463         struct intel_ring_buffer *ring;
 464         int ret, i, pipe;
 465
 466         ret = mutex_lock_interruptible(&dev->struct_mutex);
 467         if (ret)
 468                 return ret;
 469
 470         if (IS_VALLEYVIEW(dev)) {
 471                 seq_printf(m, "Display IER:\t%08x\n",
 472                            I915_READ(VLV_IER));
 473                 seq_printf(m, "Display IIR:\t%08x\n",
 474                            I915_READ(VLV_IIR));
 475                 seq_printf(m, "Display IIR_RW:\t%08x\n",
 476                            I915_READ(VLV_IIR_RW));
 477                 seq_printf(m, "Display IMR:\t%08x\n",
 478                            I915_READ(VLV_IMR));
 479                 for_each_pipe(pipe)
 480                         seq_printf(m, "Pipe %c stat:\t%08x\n",
 481                                    pipe_name(pipe),
 482                                    I915_READ(PIPESTAT(pipe)));
 483
 484                 seq_printf(m, "Master IER:\t%08x\n",
 485                            I915_READ(VLV_MASTER_IER));
 486
 487                 seq_printf(m, "Render IER:\t%08x\n",
 488                            I915_READ(GTIER));
 489                 seq_printf(m, "Render IIR:\t%08x\n",
 490                            I915_READ(GTIIR));
 491                 seq_printf(m, "Render IMR:\t%08x\n",
 492                            I915_READ(GTIMR));
 493
 494                 seq_printf(m, "PM IER:\t\t%08x\n",
 495                            I915_READ(GEN6_PMIER));
 496                 seq_printf(m, "PM IIR:\t\t%08x\n",
 497                            I915_READ(GEN6_PMIIR));
 498                 seq_printf(m, "PM IMR:\t\t%08x\n",
 499                            I915_READ(GEN6_PMIMR));
 500
 501                 seq_printf(m, "Port hotplug:\t%08x\n",
 502                            I915_READ(PORT_HOTPLUG_EN));
 503                 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
 504                            I915_READ(VLV_DPFLIPSTAT));
 505                 seq_printf(m, "DPINVGTT:\t%08x\n",
 506                            I915_READ(DPINVGTT));
 507
 508         } else if (!HAS_PCH_SPLIT(dev)) {
 509                 seq_printf(m, "Interrupt enable:    %08x\n",
 510                            I915_READ(IER));
 511                 seq_printf(m, "Interrupt identity:  %08x\n",
 512                            I915_READ(IIR));
 513                 seq_printf(m, "Interrupt mask:      %08x\n",
 514                            I915_READ(IMR));
 515                 for_each_pipe(pipe)
 516                         seq_printf(m, "Pipe %c stat:         %08x\n",
 517                                    pipe_name(pipe),
 518                                    I915_READ(PIPESTAT(pipe)));
 519         } else {
 520                 seq_printf(m, "North Display Interrupt enable:          %08x\n",
 521                            I915_READ(DEIER));
 522                 seq_printf(m, "North Display Interrupt identity:        %08x\n",
 523                            I915_READ(DEIIR));
 524                 seq_printf(m, "North Display Interrupt mask:            %08x\n",
 525                            I915_READ(DEIMR));
 526                 seq_printf(m, "South Display Interrupt enable:          %08x\n",
 527                            I915_READ(SDEIER));
 528                 seq_printf(m, "South Display Interrupt identity:        %08x\n",
 529                            I915_READ(SDEIIR));
 530                 seq_printf(m, "South Display Interrupt mask:            %08x\n",
 531                            I915_READ(SDEIMR));
 532                 seq_printf(m, "Graphics Interrupt enable:               %08x\n",
 533                            I915_READ(GTIER));
 534                 seq_printf(m, "Graphics Interrupt identity:             %08x\n",
 535                            I915_READ(GTIIR));
 536                 seq_printf(m, "Graphics Interrupt mask:         %08x\n",
 537                            I915_READ(GTIMR));
 538         }
 539         seq_printf(m, "Interrupts received: %d\n",
 540                    atomic_read(&dev_priv->irq_received));
 541         for_each_ring(ring, dev_priv, i) {
 542                 if (IS_GEN6(dev) || IS_GEN7(dev)) {
 543                         seq_printf(m,
 544                                    "Graphics Interrupt mask (%s):       %08x\n",
 545                                    ring->name, I915_READ_IMR(ring));
 546                 }
 547                 i915_ring_seqno_info(m, ring);
 548         }
 549         mutex_unlock(&dev->struct_mutex);
 550
 551         return 0;
 552 }
 553
 554 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
 555 {
 556         struct drm_info_node *node = (struct drm_info_node *) m->private;
 557         struct drm_device *dev = node->minor->dev;
 558         drm_i915_private_t *dev_priv = dev->dev_private;
 559         int i, ret;
 560
 561         ret = mutex_lock_interruptible(&dev->struct_mutex);
 562         if (ret)
 563                 return ret;
 564
 565         seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
 566         seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
 567         for (i = 0; i < dev_priv->num_fence_regs; i++) {
 568                 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
 569
 570                 seq_printf(m, "Fence %d, pin count = %d, object = ",
 571                            i, dev_priv->fence_regs[i].pin_count);
 572                 if (obj == NULL)
 573                         seq_printf(m, "unused");
 574                 else
 575                         describe_obj(m, obj);
 576                 seq_printf(m, "\n");
 577         }
 578
 579         mutex_unlock(&dev->struct_mutex);
 580         return 0;
 581 }
 582
 583 static int i915_hws_info(struct seq_file *m, void *data)
 584 {
 585         struct drm_info_node *node = (struct drm_info_node *) m->private;
 586         struct drm_device *dev = node->minor->dev;
 587         drm_i915_private_t *dev_priv = dev->dev_private;
 588         struct intel_ring_buffer *ring;
 589         const u32 *hws;
 590         int i;
 591
 592         ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
 593         hws = ring->status_page.page_addr;
 594         if (hws == NULL)
 595                 return 0;
 596
 597         for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
 598                 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
 599                            i * 4,
 600                            hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
 601         }
 602         return 0;
 603 }
 604
 605 static const char *ring_str(int ring)
 606 {
 607         switch (ring) {
 608         case RCS: return "render";
 609         case VCS: return "bsd";
 610         case BCS: return "blt";
 611         case VECS: return "vebox";
 612         default: return "";
 613         }
 614 }
 615
 616 static const char *pin_flag(int pinned)
 617 {
 618         if (pinned > 0)
 619                 return " P";
 620         else if (pinned < 0)
 621                 return " p";
 622         else
 623                 return "";
 624 }
 625
 626 static const char *tiling_flag(int tiling)
 627 {
 628         switch (tiling) {
 629         default:
 630         case I915_TILING_NONE: return "";
 631         case I915_TILING_X: return " X";
 632         case I915_TILING_Y: return " Y";
 633         }
 634 }
 635
 636 static const char *dirty_flag(int dirty)
 637 {
 638         return dirty ? " dirty" : "";
 639 }
 640
 641 static const char *purgeable_flag(int purgeable)
 642 {
 643         return purgeable ? " purgeable" : "";
 644 }
 645
 646 static bool __i915_error_ok(struct drm_i915_error_state_buf *e)
 647 {
 648
 649         if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) {
 650                 e->err = -ENOSPC;
 651                 return false;
 652         }
 653
 654         if (e->bytes == e->size - 1 || e->err)
 655                 return false;
 656
 657         return true;
 658 }
 659
 660 static bool __i915_error_seek(struct drm_i915_error_state_buf *e,
 661                               unsigned len)
 662 {
 663         if (e->pos + len <= e->start) {
 664                 e->pos += len;
 665                 return false;
 666         }
 667
 668         /* First vsnprintf needs to fit in its entirety for memmove */
 669         if (len >= e->size) {
 670                 e->err = -EIO;
 671                 return false;
 672         }
 673
 674         return true;
 675 }
 676
 677 static void __i915_error_advance(struct drm_i915_error_state_buf *e,
 678                                  unsigned len)
 679 {
 680         /* If this is first printf in this window, adjust it so that
 681          * start position matches start of the buffer
 682          */
 683
 684         if (e->pos < e->start) {
 685                 const size_t off = e->start - e->pos;
 686
 687                 /* Should not happen but be paranoid */
 688                 if (off > len || e->bytes) {
 689                         e->err = -EIO;
 690                         return;
 691                 }
 692
 693                 memmove(e->buf, e->buf + off, len - off);
 694                 e->bytes = len - off;
 695                 e->pos = e->start;
 696                 return;
 697         }
 698
 699         e->bytes += len;
 700         e->pos += len;
 701 }
 702
 703 static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
 704                                const char *f, va_list args)
 705 {
 706         unsigned len;
 707
 708         if (!__i915_error_ok(e))
 709                 return;
 710
 711         /* Seek the first printf which is hits start position */
 712         if (e->pos < e->start) {
 713                 len = vsnprintf(NULL, 0, f, args);
 714                 if (!__i915_error_seek(e, len))
 715                         return;
 716         }
 717
 718         len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args);
 719         if (len >= e->size - e->bytes)
 720                 len = e->size - e->bytes - 1;
 721
 722         __i915_error_advance(e, len);
 723 }
 724
 725 static void i915_error_puts(struct drm_i915_error_state_buf *e,
 726                             const char *str)
 727 {
 728         unsigned len;
 729
 730         if (!__i915_error_ok(e))
 731                 return;
 732
 733         len = strlen(str);
 734
 735         /* Seek the first printf which is hits start position */
 736         if (e->pos < e->start) {
 737                 if (!__i915_error_seek(e, len))
 738                         return;
 739         }
 740
 741         if (len >= e->size - e->bytes)
 742                 len = e->size - e->bytes - 1;
 743         memcpy(e->buf + e->bytes, str, len);
 744
 745         __i915_error_advance(e, len);
 746 }
 747
 748 void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
 749 {
 750         va_list args;
 751
 752         va_start(args, f);
 753         i915_error_vprintf(e, f, args);
 754         va_end(args);
 755 }
 756
 757 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
 758 #define err_puts(e, s) i915_error_puts(e, s)
 759
 760 static void print_error_buffers(struct drm_i915_error_state_buf *m,
 761                                 const char *name,
 762                                 struct drm_i915_error_buffer *err,
 763                                 int count)
 764 {
 765         err_printf(m, "%s [%d]:\n", name, count);
 766
 767         while (count--) {
 768                 err_printf(m, "  %08x %8u %02x %02x %x %x",
 769                            err->gtt_offset,
 770                            err->size,
 771                            err->read_domains,
 772                            err->write_domain,
 773                            err->rseqno, err->wseqno);
 774                 err_puts(m, pin_flag(err->pinned));
 775                 err_puts(m, tiling_flag(err->tiling));
 776                 err_puts(m, dirty_flag(err->dirty));
 777                 err_puts(m, purgeable_flag(err->purgeable));
 778                 err_puts(m, err->ring != -1 ? " " : "");
 779                 err_puts(m, ring_str(err->ring));
 780                 err_puts(m, cache_level_str(err->cache_level));
 781
 782                 if (err->name)
 783                         err_printf(m, " (name: %d)", err->name);
 784                 if (err->fence_reg != I915_FENCE_REG_NONE)
 785                         err_printf(m, " (fence: %d)", err->fence_reg);
 786
 787                 err_puts(m, "\n");
 788                 err++;
 789         }
 790 }
 791
 792 static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
 793                                   struct drm_device *dev,
 794                                   struct drm_i915_error_state *error,
 795                                   unsigned ring)
 796 {
 797         BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
 798         err_printf(m, "%s command stream:\n", ring_str(ring));
 799         err_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
 800         err_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
 801         err_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);
 802         err_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
 803         err_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
 804         err_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
 805         err_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
 806         if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
 807                 err_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
 808
 809         if (INTEL_INFO(dev)->gen >= 4)
 810                 err_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
 811         err_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
 812         err_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
 813         if (INTEL_INFO(dev)->gen >= 6) {
 814                 err_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
 815                 err_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
 816                 err_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
 817                            error->semaphore_mboxes[ring][0],
 818                            error->semaphore_seqno[ring][0]);
 819                 err_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
 820                            error->semaphore_mboxes[ring][1],
 821                            error->semaphore_seqno[ring][1]);
 822         }
 823         err_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
 824         err_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
 825         err_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
 826         err_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
 827 }
 828
 829 struct i915_error_state_file_priv {
 830         struct drm_device *dev;
 831         struct drm_i915_error_state *error;
 832 };
 833
 834
 835 static int i915_error_state(struct i915_error_state_file_priv *error_priv,
 836                             struct drm_i915_error_state_buf *m)
 837
 838 {
 839         struct drm_device *dev = error_priv->dev;
 840         drm_i915_private_t *dev_priv = dev->dev_private;
 841         struct drm_i915_error_state *error = error_priv->error;
 842         struct intel_ring_buffer *ring;
 843         int i, j, page, offset, elt;
 844
 845         if (!error) {
 846                 err_printf(m, "no error state collected\n");
 847                 return 0;
 848         }
 849
 850         err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
 851                    error->time.tv_usec);
 852         err_printf(m, "Kernel: " UTS_RELEASE "\n");
 853         err_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
 854         err_printf(m, "EIR: 0x%08x\n", error->eir);
 855         err_printf(m, "IER: 0x%08x\n", error->ier);
 856         err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
 857         err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
 858         err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
 859         err_printf(m, "CCID: 0x%08x\n", error->ccid);
 860
 861         for (i = 0; i < dev_priv->num_fence_regs; i++)
 862                 err_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
 863
 864         for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
 865                 err_printf(m, "  INSTDONE_%d: 0x%08x\n", i,
 866                            error->extra_instdone[i]);
 867
 868         if (INTEL_INFO(dev)->gen >= 6) {
 869                 err_printf(m, "ERROR: 0x%08x\n", error->error);
 870                 err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
 871         }
 872
 873         if (INTEL_INFO(dev)->gen == 7)
 874                 err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
 875
 876         for_each_ring(ring, dev_priv, i)
 877                 i915_ring_error_state(m, dev, error, i);
 878
 879         if (error->active_bo)
 880                 print_error_buffers(m, "Active",
 881                                     error->active_bo,
 882                                     error->active_bo_count);
 883
 884         if (error->pinned_bo)
 885                 print_error_buffers(m, "Pinned",
 886                                     error->pinned_bo,
 887                                     error->pinned_bo_count);
 888
 889         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 890                 struct drm_i915_error_object *obj;
 891
 892                 if ((obj = error->ring[i].batchbuffer)) {
 893                         err_printf(m, "%s --- gtt_offset = 0x%08x\n",
 894                                    dev_priv->ring[i].name,
 895                                    obj->gtt_offset);
 896                         offset = 0;
 897                         for (page = 0; page < obj->page_count; page++) {
 898                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 899                                         err_printf(m, "%08x :  %08x\n", offset,
 900                                                    obj->pages[page][elt]);
 901                                         offset += 4;
 902                                 }
 903                         }
 904                 }
 905
 906                 if (error->ring[i].num_requests) {
 907                         err_printf(m, "%s --- %d requests\n",
 908                                    dev_priv->ring[i].name,
 909                                    error->ring[i].num_requests);
 910                         for (j = 0; j < error->ring[i].num_requests; j++) {
 911                                 err_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
 912                                            error->ring[i].requests[j].seqno,
 913                                            error->ring[i].requests[j].jiffies,
 914                                            error->ring[i].requests[j].tail);
 915                         }
 916                 }
 917
 918                 if ((obj = error->ring[i].ringbuffer)) {
 919                         err_printf(m, "%s --- ringbuffer = 0x%08x\n",
 920                                    dev_priv->ring[i].name,
 921                                    obj->gtt_offset);
 922                         offset = 0;
 923                         for (page = 0; page < obj->page_count; page++) {
 924                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 925                                         err_printf(m, "%08x :  %08x\n",
 926                                                    offset,
 927                                                    obj->pages[page][elt]);
 928                                         offset += 4;
 929                                 }
 930                         }
 931                 }
 932
 933                 obj = error->ring[i].ctx;
 934                 if (obj) {
 935                         err_printf(m, "%s --- HW Context = 0x%08x\n",
 936                                    dev_priv->ring[i].name,
 937                                    obj->gtt_offset);
 938                         offset = 0;
 939                         for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
 940                                 err_printf(m, "[%04x] %08x %08x %08x %08x\n",
 941                                            offset,
 942                                            obj->pages[0][elt],
 943                                            obj->pages[0][elt+1],
 944                                            obj->pages[0][elt+2],
 945                                            obj->pages[0][elt+3]);
 946                                         offset += 16;
 947                         }
 948                 }
 949         }
 950
 951         if (error->overlay)
 952                 intel_overlay_print_error_state(m, error->overlay);
 953
 954         if (error->display)
 955                 intel_display_print_error_state(m, dev, error->display);
 956
 957         return 0;
 958 }
 959
 960 static ssize_t
 961 i915_error_state_write(struct file *filp,
 962                        const char __user *ubuf,
 963                        size_t cnt,
 964                        loff_t *ppos)
 965 {
 966         struct i915_error_state_file_priv *error_priv = filp->private_data;
 967         struct drm_device *dev = error_priv->dev;
 968         int ret;
 969
 970         DRM_DEBUG_DRIVER("Resetting error state\n");
 971
 972         ret = mutex_lock_interruptible(&dev->struct_mutex);
 973         if (ret)
 974                 return ret;
 975
 976         i915_destroy_error_state(dev);
 977         mutex_unlock(&dev->struct_mutex);
 978
 979         return cnt;
 980 }
 981
 982 static int i915_error_state_open(struct inode *inode, struct file *file)
 983 {
 984         struct drm_device *dev = inode->i_private;
 985         drm_i915_private_t *dev_priv = dev->dev_private;
 986         struct i915_error_state_file_priv *error_priv;
 987         unsigned long flags;
 988
 989         error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
 990         if (!error_priv)
 991                 return -ENOMEM;
 992
 993         error_priv->dev = dev;
 994
 995         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
 996         error_priv->error = dev_priv->gpu_error.first_error;
 997         if (error_priv->error)
 998                 kref_get(&error_priv->error->ref);
 999         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
1000
1001         file->private_data = error_priv;
1002
1003         return 0;
1004 }
1005
1006 static int i915_error_state_release(struct inode *inode, struct file *file)
1007 {
1008         struct i915_error_state_file_priv *error_priv = file->private_data;
1009
1010         if (error_priv->error)
1011                 kref_put(&error_priv->error->ref, i915_error_state_free);
1012         kfree(error_priv);
1013
1014         return 0;
1015 }
1016
1017 static ssize_t i915_error_state_read(struct file *file, char __user *userbuf,
1018                                      size_t count, loff_t *pos)
1019 {
1020         struct i915_error_state_file_priv *error_priv = file->private_data;
1021         struct drm_i915_error_state_buf error_str;
1022         loff_t tmp_pos = 0;
1023         ssize_t ret_count = 0;
1024         int ret = 0;
1025
1026         memset(&error_str, 0, sizeof(error_str));
1027
1028         /* We need to have enough room to store any i915_error_state printf
1029          * so that we can move it to start position.
1030          */
1031         error_str.size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE;
1032         error_str.buf = kmalloc(error_str.size,
1033                                 GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN);
1034
1035         if (error_str.buf == NULL) {
1036                 error_str.size = PAGE_SIZE;
1037                 error_str.buf = kmalloc(error_str.size, GFP_TEMPORARY);
1038         }
1039
1040         if (error_str.buf == NULL) {
1041                 error_str.size = 128;
1042                 error_str.buf = kmalloc(error_str.size, GFP_TEMPORARY);
1043         }
1044
1045         if (error_str.buf == NULL)
1046                 return -ENOMEM;
1047
1048         error_str.start = *pos;
1049
1050         ret = i915_error_state(error_priv, &error_str);
1051         if (ret)
1052                 goto out;
1053
1054         if (error_str.bytes == 0 && error_str.err) {
1055                 ret = error_str.err;
1056                 goto out;
1057         }
1058
1059         ret_count = simple_read_from_buffer(userbuf, count, &tmp_pos,
1060                                             error_str.buf,
1061                                             error_str.bytes);
1062
1063         if (ret_count < 0)
1064                 ret = ret_count;
1065         else
1066                 *pos = error_str.start + ret_count;
1067 out:
1068         kfree(error_str.buf);
1069         return ret ?: ret_count;
1070 }
1071
1072 static const struct file_operations i915_error_state_fops = {
1073         .owner = THIS_MODULE,
1074         .open = i915_error_state_open,
1075         .read = i915_error_state_read,
1076         .write = i915_error_state_write,
1077         .llseek = default_llseek,
1078         .release = i915_error_state_release,
1079 };
1080
1081 static int
1082 i915_next_seqno_get(void *data, u64 *val)
1083 {
1084         struct drm_device *dev = data;
1085         drm_i915_private_t *dev_priv = dev->dev_private;
1086         int ret;
1087
1088         ret = mutex_lock_interruptible(&dev->struct_mutex);
1089         if (ret)
1090                 return ret;
1091
1092         *val = dev_priv->next_seqno;
1093         mutex_unlock(&dev->struct_mutex);
1094
1095         return 0;
1096 }
1097
1098 static int
1099 i915_next_seqno_set(void *data, u64 val)
1100 {
1101         struct drm_device *dev = data;
1102         int ret;
1103
1104         ret = mutex_lock_interruptible(&dev->struct_mutex);
1105         if (ret)
1106                 return ret;
1107
1108         ret = i915_gem_set_seqno(dev, val);
1109         mutex_unlock(&dev->struct_mutex);
1110
1111         return ret;
1112 }
1113
1114 DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops,
1115                         i915_next_seqno_get, i915_next_seqno_set,
1116                         "0x%llx\n");
1117
1118 static int i915_rstdby_delays(struct seq_file *m, void *unused)
1119 {
1120         struct drm_info_node *node = (struct drm_info_node *) m->private;
1121         struct drm_device *dev = node->minor->dev;
1122         drm_i915_private_t *dev_priv = dev->dev_private;
1123         u16 crstanddelay;
1124         int ret;
1125
1126         ret = mutex_lock_interruptible(&dev->struct_mutex);
1127         if (ret)
1128                 return ret;
1129
1130         crstanddelay = I915_READ16(CRSTANDVID);
1131
1132         mutex_unlock(&dev->struct_mutex);
1133
1134         seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
1135
1136         return 0;
1137 }
1138
1139 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
1140 {
1141         struct drm_info_node *node = (struct drm_info_node *) m->private;
1142         struct drm_device *dev = node->minor->dev;
1143         drm_i915_private_t *dev_priv = dev->dev_private;
1144         int ret;
1145
1146         if (IS_GEN5(dev)) {
1147                 u16 rgvswctl = I915_READ16(MEMSWCTL);
1148                 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
1149
1150                 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
1151                 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
1152                 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
1153                            MEMSTAT_VID_SHIFT);
1154                 seq_printf(m, "Current P-state: %d\n",
1155                            (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
1156         } else if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
1157                 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
1158                 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
1159                 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
1160                 u32 rpstat, cagf;
1161                 u32 rpupei, rpcurup, rpprevup;
1162                 u32 rpdownei, rpcurdown, rpprevdown;
1163                 int max_freq;
1164
1165                 /* RPSTAT1 is in the GT power well */
1166                 ret = mutex_lock_interruptible(&dev->struct_mutex);
1167                 if (ret)
1168                         return ret;
1169
1170                 gen6_gt_force_wake_get(dev_priv);
1171
1172                 rpstat = I915_READ(GEN6_RPSTAT1);
1173                 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
1174                 rpcurup = I915_READ(GEN6_RP_CUR_UP);
1175                 rpprevup = I915_READ(GEN6_RP_PREV_UP);
1176                 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
1177                 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
1178                 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
1179                 if (IS_HASWELL(dev))
1180                         cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
1181                 else
1182                         cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
1183                 cagf *= GT_FREQUENCY_MULTIPLIER;
1184
1185                 gen6_gt_force_wake_put(dev_priv);
1186                 mutex_unlock(&dev->struct_mutex);
1187
1188                 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
1189                 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
1190                 seq_printf(m, "Render p-state ratio: %d\n",
1191                            (gt_perf_status & 0xff00) >> 8);
1192                 seq_printf(m, "Render p-state VID: %d\n",
1193                            gt_perf_status & 0xff);
1194                 seq_printf(m, "Render p-state limit: %d\n",
1195                            rp_state_limits & 0xff);
1196                 seq_printf(m, "CAGF: %dMHz\n", cagf);
1197                 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
1198                            GEN6_CURICONT_MASK);
1199                 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
1200                            GEN6_CURBSYTAVG_MASK);
1201                 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
1202                            GEN6_CURBSYTAVG_MASK);
1203                 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
1204                            GEN6_CURIAVG_MASK);
1205                 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
1206                            GEN6_CURBSYTAVG_MASK);
1207                 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
1208                            GEN6_CURBSYTAVG_MASK);
1209
1210                 max_freq = (rp_state_cap & 0xff0000) >> 16;
1211                 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
1212                            max_freq * GT_FREQUENCY_MULTIPLIER);
1213
1214                 max_freq = (rp_state_cap & 0xff00) >> 8;
1215                 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
1216                            max_freq * GT_FREQUENCY_MULTIPLIER);
1217
1218                 max_freq = rp_state_cap & 0xff;
1219                 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
1220                            max_freq * GT_FREQUENCY_MULTIPLIER);
1221
1222                 seq_printf(m, "Max overclocked frequency: %dMHz\n",
1223                            dev_priv->rps.hw_max * GT_FREQUENCY_MULTIPLIER);
1224         } else if (IS_VALLEYVIEW(dev)) {
1225                 u32 freq_sts, val;
1226
1227                 mutex_lock(&dev_priv->rps.hw_lock);
1228                 freq_sts = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
1229                 seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
1230                 seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq);
1231
1232                 val = vlv_punit_read(dev_priv, PUNIT_FUSE_BUS1);
1233                 seq_printf(m, "max GPU freq: %d MHz\n",
1234                            vlv_gpu_freq(dev_priv->mem_freq, val));
1235
1236                 val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM);
1237                 seq_printf(m, "min GPU freq: %d MHz\n",
1238                            vlv_gpu_freq(dev_priv->mem_freq, val));
1239
1240                 seq_printf(m, "current GPU freq: %d MHz\n",
1241                            vlv_gpu_freq(dev_priv->mem_freq,
1242                                         (freq_sts >> 8) & 0xff));
1243                 mutex_unlock(&dev_priv->rps.hw_lock);
1244         } else {
1245                 seq_printf(m, "no P-state info available\n");
1246         }
1247
1248         return 0;
1249 }
1250
1251 static int i915_delayfreq_table(struct seq_file *m, void *unused)
1252 {
1253         struct drm_info_node *node = (struct drm_info_node *) m->private;
1254         struct drm_device *dev = node->minor->dev;
1255         drm_i915_private_t *dev_priv = dev->dev_private;
1256         u32 delayfreq;
1257         int ret, i;
1258
1259         ret = mutex_lock_interruptible(&dev->struct_mutex);
1260         if (ret)
1261                 return ret;
1262
1263         for (i = 0; i < 16; i++) {
1264                 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
1265                 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
1266                            (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
1267         }
1268
1269         mutex_unlock(&dev->struct_mutex);
1270
1271         return 0;
1272 }
1273
1274 static inline int MAP_TO_MV(int map)
1275 {
1276         return 1250 - (map * 25);
1277 }
1278
1279 static int i915_inttoext_table(struct seq_file *m, void *unused)
1280 {
1281         struct drm_info_node *node = (struct drm_info_node *) m->private;
1282         struct drm_device *dev = node->minor->dev;
1283         drm_i915_private_t *dev_priv = dev->dev_private;
1284         u32 inttoext;
1285         int ret, i;
1286
1287         ret = mutex_lock_interruptible(&dev->struct_mutex);
1288         if (ret)
1289                 return ret;
1290
1291         for (i = 1; i <= 32; i++) {
1292                 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1293                 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1294         }
1295
1296         mutex_unlock(&dev->struct_mutex);
1297
1298         return 0;
1299 }
1300
1301 static int ironlake_drpc_info(struct seq_file *m)
1302 {
1303         struct drm_info_node *node = (struct drm_info_node *) m->private;
1304         struct drm_device *dev = node->minor->dev;
1305         drm_i915_private_t *dev_priv = dev->dev_private;
1306         u32 rgvmodectl, rstdbyctl;
1307         u16 crstandvid;
1308         int ret;
1309
1310         ret = mutex_lock_interruptible(&dev->struct_mutex);
1311         if (ret)
1312                 return ret;
1313
1314         rgvmodectl = I915_READ(MEMMODECTL);
1315         rstdbyctl = I915_READ(RSTDBYCTL);
1316         crstandvid = I915_READ16(CRSTANDVID);
1317
1318         mutex_unlock(&dev->struct_mutex);
1319
1320         seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1321                    "yes" : "no");
1322         seq_printf(m, "Boost freq: %d\n",
1323                    (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1324                    MEMMODE_BOOST_FREQ_SHIFT);
1325         seq_printf(m, "HW control enabled: %s\n",
1326                    rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1327         seq_printf(m, "SW control enabled: %s\n",
1328                    rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1329         seq_printf(m, "Gated voltage change: %s\n",
1330                    rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1331         seq_printf(m, "Starting frequency: P%d\n",
1332                    (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1333         seq_printf(m, "Max P-state: P%d\n",
1334                    (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1335         seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1336         seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1337         seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1338         seq_printf(m, "Render standby enabled: %s\n",
1339                    (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1340         seq_printf(m, "Current RS state: ");
1341         switch (rstdbyctl & RSX_STATUS_MASK) {
1342         case RSX_STATUS_ON:
1343                 seq_printf(m, "on\n");
1344                 break;
1345         case RSX_STATUS_RC1:
1346                 seq_printf(m, "RC1\n");
1347                 break;
1348         case RSX_STATUS_RC1E:
1349                 seq_printf(m, "RC1E\n");
1350                 break;
1351         case RSX_STATUS_RS1:
1352                 seq_printf(m, "RS1\n");
1353                 break;
1354         case RSX_STATUS_RS2:
1355                 seq_printf(m, "RS2 (RC6)\n");
1356                 break;
1357         case RSX_STATUS_RS3:
1358                 seq_printf(m, "RC3 (RC6+)\n");
1359                 break;
1360         default:
1361                 seq_printf(m, "unknown\n");
1362                 break;
1363         }
1364
1365         return 0;
1366 }
1367
1368 static int gen6_drpc_info(struct seq_file *m)
1369 {
1370
1371         struct drm_info_node *node = (struct drm_info_node *) m->private;
1372         struct drm_device *dev = node->minor->dev;
1373         struct drm_i915_private *dev_priv = dev->dev_private;
1374         u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
1375         unsigned forcewake_count;
1376         int count=0, ret;
1377
1378
1379         ret = mutex_lock_interruptible(&dev->struct_mutex);
1380         if (ret)
1381                 return ret;
1382
1383         spin_lock_irq(&dev_priv->gt_lock);
1384         forcewake_count = dev_priv->forcewake_count;
1385         spin_unlock_irq(&dev_priv->gt_lock);
1386
1387         if (forcewake_count) {
1388                 seq_printf(m, "RC information inaccurate because somebody "
1389                               "holds a forcewake reference \n");
1390         } else {
1391                 /* NB: we cannot use forcewake, else we read the wrong values */
1392                 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1393                         udelay(10);
1394                 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1395         }
1396
1397         gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1398         trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1399
1400         rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1401         rcctl1 = I915_READ(GEN6_RC_CONTROL);
1402         mutex_unlock(&dev->struct_mutex);
1403         mutex_lock(&dev_priv->rps.hw_lock);
1404         sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
1405         mutex_unlock(&dev_priv->rps.hw_lock);
1406
1407         seq_printf(m, "Video Turbo Mode: %s\n",
1408                    yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1409         seq_printf(m, "HW control enabled: %s\n",
1410                    yesno(rpmodectl1 & GEN6_RP_ENABLE));
1411         seq_printf(m, "SW control enabled: %s\n",
1412                    yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1413                           GEN6_RP_MEDIA_SW_MODE));
1414         seq_printf(m, "RC1e Enabled: %s\n",
1415                    yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1416         seq_printf(m, "RC6 Enabled: %s\n",
1417                    yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1418         seq_printf(m, "Deep RC6 Enabled: %s\n",
1419                    yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1420         seq_printf(m, "Deepest RC6 Enabled: %s\n",
1421                    yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1422         seq_printf(m, "Current RC state: ");
1423         switch (gt_core_status & GEN6_RCn_MASK) {
1424         case GEN6_RC0:
1425                 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1426                         seq_printf(m, "Core Power Down\n");
1427                 else
1428                         seq_printf(m, "on\n");
1429                 break;
1430         case GEN6_RC3:
1431                 seq_printf(m, "RC3\n");
1432                 break;
1433         case GEN6_RC6:
1434                 seq_printf(m, "RC6\n");
1435                 break;
1436         case GEN6_RC7:
1437                 seq_printf(m, "RC7\n");
1438                 break;
1439         default:
1440                 seq_printf(m, "Unknown\n");
1441                 break;
1442         }
1443
1444         seq_printf(m, "Core Power Down: %s\n",
1445                    yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1446
1447         /* Not exactly sure what this is */
1448         seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1449                    I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1450         seq_printf(m, "RC6 residency since boot: %u\n",
1451                    I915_READ(GEN6_GT_GFX_RC6));
1452         seq_printf(m, "RC6+ residency since boot: %u\n",
1453                    I915_READ(GEN6_GT_GFX_RC6p));
1454         seq_printf(m, "RC6++ residency since boot: %u\n",
1455                    I915_READ(GEN6_GT_GFX_RC6pp));
1456
1457         seq_printf(m, "RC6   voltage: %dmV\n",
1458                    GEN6_DECODE_RC6_VID(((rc6vids >> 0) & 0xff)));
1459         seq_printf(m, "RC6+  voltage: %dmV\n",
1460                    GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff)));
1461         seq_printf(m, "RC6++ voltage: %dmV\n",
1462                    GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));
1463         return 0;
1464 }
1465
1466 static int i915_drpc_info(struct seq_file *m, void *unused)
1467 {
1468         struct drm_info_node *node = (struct drm_info_node *) m->private;
1469         struct drm_device *dev = node->minor->dev;
1470
1471         if (IS_GEN6(dev) || IS_GEN7(dev))
1472                 return gen6_drpc_info(m);
1473         else
1474                 return ironlake_drpc_info(m);
1475 }
1476
1477 static int i915_fbc_status(struct seq_file *m, void *unused)
1478 {
1479         struct drm_info_node *node = (struct drm_info_node *) m->private;
1480         struct drm_device *dev = node->minor->dev;
1481         drm_i915_private_t *dev_priv = dev->dev_private;
1482
1483         if (!I915_HAS_FBC(dev)) {
1484                 seq_printf(m, "FBC unsupported on this chipset\n");
1485                 return 0;
1486         }
1487
1488         if (intel_fbc_enabled(dev)) {
1489                 seq_printf(m, "FBC enabled\n");
1490         } else {
1491                 seq_printf(m, "FBC disabled: ");
1492                 switch (dev_priv->no_fbc_reason) {
1493                 case FBC_NO_OUTPUT:
1494                         seq_printf(m, "no outputs");
1495                         break;
1496                 case FBC_STOLEN_TOO_SMALL:
1497                         seq_printf(m, "not enough stolen memory");
1498                         break;
1499                 case FBC_UNSUPPORTED_MODE:
1500                         seq_printf(m, "mode not supported");
1501                         break;
1502                 case FBC_MODE_TOO_LARGE:
1503                         seq_printf(m, "mode too large");
1504                         break;
1505                 case FBC_BAD_PLANE:
1506                         seq_printf(m, "FBC unsupported on plane");
1507                         break;
1508                 case FBC_NOT_TILED:
1509                         seq_printf(m, "scanout buffer not tiled");
1510                         break;
1511                 case FBC_MULTIPLE_PIPES:
1512                         seq_printf(m, "multiple pipes are enabled");
1513                         break;
1514                 case FBC_MODULE_PARAM:
1515                         seq_printf(m, "disabled per module param (default off)");
1516                         break;
1517                 default:
1518                         seq_printf(m, "unknown reason");
1519                 }
1520                 seq_printf(m, "\n");
1521         }
1522         return 0;
1523 }
1524
1525 static int i915_ips_status(struct seq_file *m, void *unused)
1526 {
1527         struct drm_info_node *node = (struct drm_info_node *) m->private;
1528         struct drm_device *dev = node->minor->dev;
1529         struct drm_i915_private *dev_priv = dev->dev_private;
1530
1531         if (!HAS_IPS(dev)) {
1532                 seq_puts(m, "not supported\n");
1533                 return 0;
1534         }
1535
1536         if (I915_READ(IPS_CTL) & IPS_ENABLE)
1537                 seq_puts(m, "enabled\n");
1538         else
1539                 seq_puts(m, "disabled\n");
1540
1541         return 0;
1542 }
1543
1544 static int i915_sr_status(struct seq_file *m, void *unused)
1545 {
1546         struct drm_info_node *node = (struct drm_info_node *) m->private;
1547         struct drm_device *dev = node->minor->dev;
1548         drm_i915_private_t *dev_priv = dev->dev_private;
1549         bool sr_enabled = false;
1550
1551         if (HAS_PCH_SPLIT(dev))
1552                 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1553         else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1554                 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1555         else if (IS_I915GM(dev))
1556                 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1557         else if (IS_PINEVIEW(dev))
1558                 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1559
1560         seq_printf(m, "self-refresh: %s\n",
1561                    sr_enabled ? "enabled" : "disabled");
1562
1563         return 0;
1564 }
1565
1566 static int i915_emon_status(struct seq_file *m, void *unused)
1567 {
1568         struct drm_info_node *node = (struct drm_info_node *) m->private;
1569         struct drm_device *dev = node->minor->dev;
1570         drm_i915_private_t *dev_priv = dev->dev_private;
1571         unsigned long temp, chipset, gfx;
1572         int ret;
1573
1574         if (!IS_GEN5(dev))
1575                 return -ENODEV;
1576
1577         ret = mutex_lock_interruptible(&dev->struct_mutex);
1578         if (ret)
1579                 return ret;
1580
1581         temp = i915_mch_val(dev_priv);
1582         chipset = i915_chipset_val(dev_priv);
1583         gfx = i915_gfx_val(dev_priv);
1584         mutex_unlock(&dev->struct_mutex);
1585
1586         seq_printf(m, "GMCH temp: %ld\n", temp);
1587         seq_printf(m, "Chipset power: %ld\n", chipset);
1588         seq_printf(m, "GFX power: %ld\n", gfx);
1589         seq_printf(m, "Total power: %ld\n", chipset + gfx);
1590
1591         return 0;
1592 }
1593
1594 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1595 {
1596         struct drm_info_node *node = (struct drm_info_node *) m->private;
1597         struct drm_device *dev = node->minor->dev;
1598         drm_i915_private_t *dev_priv = dev->dev_private;
1599         int ret;
1600         int gpu_freq, ia_freq;
1601
1602         if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1603                 seq_printf(m, "unsupported on this chipset\n");
1604                 return 0;
1605         }
1606
1607         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1608         if (ret)
1609                 return ret;
1610
1611         seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");
1612
1613         for (gpu_freq = dev_priv->rps.min_delay;
1614              gpu_freq <= dev_priv->rps.max_delay;
1615              gpu_freq++) {
1616                 ia_freq = gpu_freq;
1617                 sandybridge_pcode_read(dev_priv,
1618                                        GEN6_PCODE_READ_MIN_FREQ_TABLE,
1619                                        &ia_freq);
1620                 seq_printf(m, "%d\t\t%d\t\t\t\t%d\n",
1621                            gpu_freq * GT_FREQUENCY_MULTIPLIER,
1622                            ((ia_freq >> 0) & 0xff) * 100,
1623                            ((ia_freq >> 8) & 0xff) * 100);
1624         }
1625
1626         mutex_unlock(&dev_priv->rps.hw_lock);
1627
1628         return 0;
1629 }
1630
1631 static int i915_gfxec(struct seq_file *m, void *unused)
1632 {
1633         struct drm_info_node *node = (struct drm_info_node *) m->private;
1634         struct drm_device *dev = node->minor->dev;
1635         drm_i915_private_t *dev_priv = dev->dev_private;
1636         int ret;
1637
1638         ret = mutex_lock_interruptible(&dev->struct_mutex);
1639         if (ret)
1640                 return ret;
1641
1642         seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1643
1644         mutex_unlock(&dev->struct_mutex);
1645
1646         return 0;
1647 }
1648
1649 static int i915_opregion(struct seq_file *m, void *unused)
1650 {
1651         struct drm_info_node *node = (struct drm_info_node *) m->private;
1652         struct drm_device *dev = node->minor->dev;
1653         drm_i915_private_t *dev_priv = dev->dev_private;
1654         struct intel_opregion *opregion = &dev_priv->opregion;
1655         void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1656         int ret;
1657
1658         if (data == NULL)
1659                 return -ENOMEM;
1660
1661         ret = mutex_lock_interruptible(&dev->struct_mutex);
1662         if (ret)
1663                 goto out;
1664
1665         if (opregion->header) {
1666                 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1667                 seq_write(m, data, OPREGION_SIZE);
1668         }
1669
1670         mutex_unlock(&dev->struct_mutex);
1671
1672 out:
1673         kfree(data);
1674         return 0;
1675 }
1676
1677 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1678 {
1679         struct drm_info_node *node = (struct drm_info_node *) m->private;
1680         struct drm_device *dev = node->minor->dev;
1681         drm_i915_private_t *dev_priv = dev->dev_private;
1682         struct intel_fbdev *ifbdev;
1683         struct intel_framebuffer *fb;
1684         int ret;
1685
1686         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1687         if (ret)
1688                 return ret;
1689
1690         ifbdev = dev_priv->fbdev;
1691         fb = to_intel_framebuffer(ifbdev->helper.fb);
1692
1693         seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1694                    fb->base.width,
1695                    fb->base.height,
1696                    fb->base.depth,
1697                    fb->base.bits_per_pixel,
1698                    atomic_read(&fb->base.refcount.refcount));
1699         describe_obj(m, fb->obj);
1700         seq_printf(m, "\n");
1701         mutex_unlock(&dev->mode_config.mutex);
1702
1703         mutex_lock(&dev->mode_config.fb_lock);
1704         list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1705                 if (&fb->base == ifbdev->helper.fb)
1706                         continue;
1707
1708                 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1709                            fb->base.width,
1710                            fb->base.height,
1711                            fb->base.depth,
1712                            fb->base.bits_per_pixel,
1713                            atomic_read(&fb->base.refcount.refcount));
1714                 describe_obj(m, fb->obj);
1715                 seq_printf(m, "\n");
1716         }
1717         mutex_unlock(&dev->mode_config.fb_lock);
1718
1719         return 0;
1720 }
1721
1722 static int i915_context_status(struct seq_file *m, void *unused)
1723 {
1724         struct drm_info_node *node = (struct drm_info_node *) m->private;
1725         struct drm_device *dev = node->minor->dev;
1726         drm_i915_private_t *dev_priv = dev->dev_private;
1727         struct intel_ring_buffer *ring;
1728         int ret, i;
1729
1730         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1731         if (ret)
1732                 return ret;
1733
1734         if (dev_priv->ips.pwrctx) {
1735                 seq_printf(m, "power context ");
1736                 describe_obj(m, dev_priv->ips.pwrctx);
1737                 seq_printf(m, "\n");
1738         }
1739
1740         if (dev_priv->ips.renderctx) {
1741                 seq_printf(m, "render context ");
1742                 describe_obj(m, dev_priv->ips.renderctx);
1743                 seq_printf(m, "\n");
1744         }
1745
1746         for_each_ring(ring, dev_priv, i) {
1747                 if (ring->default_context) {
1748                         seq_printf(m, "HW default context %s ring ", ring->name);
1749                         describe_obj(m, ring->default_context->obj);
1750                         seq_printf(m, "\n");
1751                 }
1752         }
1753
1754         mutex_unlock(&dev->mode_config.mutex);
1755
1756         return 0;
1757 }
1758
1759 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1760 {
1761         struct drm_info_node *node = (struct drm_info_node *) m->private;
1762         struct drm_device *dev = node->minor->dev;
1763         struct drm_i915_private *dev_priv = dev->dev_private;
1764         unsigned forcewake_count;
1765
1766         spin_lock_irq(&dev_priv->gt_lock);
1767         forcewake_count = dev_priv->forcewake_count;
1768         spin_unlock_irq(&dev_priv->gt_lock);
1769
1770         seq_printf(m, "forcewake count = %u\n", forcewake_count);
1771
1772         return 0;
1773 }
1774
1775 static const char *swizzle_string(unsigned swizzle)
1776 {
1777         switch(swizzle) {
1778         case I915_BIT_6_SWIZZLE_NONE:
1779                 return "none";
1780         case I915_BIT_6_SWIZZLE_9:
1781                 return "bit9";
1782         case I915_BIT_6_SWIZZLE_9_10:
1783                 return "bit9/bit10";
1784         case I915_BIT_6_SWIZZLE_9_11:
1785                 return "bit9/bit11";
1786         case I915_BIT_6_SWIZZLE_9_10_11:
1787                 return "bit9/bit10/bit11";
1788         case I915_BIT_6_SWIZZLE_9_17:
1789                 return "bit9/bit17";
1790         case I915_BIT_6_SWIZZLE_9_10_17:
1791                 return "bit9/bit10/bit17";
1792         case I915_BIT_6_SWIZZLE_UNKNOWN:
1793                 return "unknown";
1794         }
1795
1796         return "bug";
1797 }
1798
1799 static int i915_swizzle_info(struct seq_file *m, void *data)
1800 {
1801         struct drm_info_node *node = (struct drm_info_node *) m->private;
1802         struct drm_device *dev = node->minor->dev;
1803         struct drm_i915_private *dev_priv = dev->dev_private;
1804         int ret;
1805
1806         ret = mutex_lock_interruptible(&dev->struct_mutex);
1807         if (ret)
1808                 return ret;
1809
1810         seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1811                    swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1812         seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1813                    swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1814
1815         if (IS_GEN3(dev) || IS_GEN4(dev)) {
1816                 seq_printf(m, "DDC = 0x%08x\n",
1817                            I915_READ(DCC));
1818                 seq_printf(m, "C0DRB3 = 0x%04x\n",
1819                            I915_READ16(C0DRB3));
1820                 seq_printf(m, "C1DRB3 = 0x%04x\n",
1821                            I915_READ16(C1DRB3));
1822         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1823                 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1824                            I915_READ(MAD_DIMM_C0));
1825                 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1826                            I915_READ(MAD_DIMM_C1));
1827                 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1828                            I915_READ(MAD_DIMM_C2));
1829                 seq_printf(m, "TILECTL = 0x%08x\n",
1830                            I915_READ(TILECTL));
1831                 seq_printf(m, "ARB_MODE = 0x%08x\n",
1832                            I915_READ(ARB_MODE));
1833                 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1834                            I915_READ(DISP_ARB_CTL));
1835         }
1836         mutex_unlock(&dev->struct_mutex);
1837
1838         return 0;
1839 }
1840
1841 static int i915_ppgtt_info(struct seq_file *m, void *data)
1842 {
1843         struct drm_info_node *node = (struct drm_info_node *) m->private;
1844         struct drm_device *dev = node->minor->dev;
1845         struct drm_i915_private *dev_priv = dev->dev_private;
1846         struct intel_ring_buffer *ring;
1847         int i, ret;
1848
1849
1850         ret = mutex_lock_interruptible(&dev->struct_mutex);
1851         if (ret)
1852                 return ret;
1853         if (INTEL_INFO(dev)->gen == 6)
1854                 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1855
1856         for_each_ring(ring, dev_priv, i) {
1857                 seq_printf(m, "%s\n", ring->name);
1858                 if (INTEL_INFO(dev)->gen == 7)
1859                         seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1860                 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1861                 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1862                 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1863         }
1864         if (dev_priv->mm.aliasing_ppgtt) {
1865                 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1866
1867                 seq_printf(m, "aliasing PPGTT:\n");
1868                 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1869         }
1870         seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1871         mutex_unlock(&dev->struct_mutex);
1872
1873         return 0;
1874 }
1875
1876 static int i915_dpio_info(struct seq_file *m, void *data)
1877 {
1878         struct drm_info_node *node = (struct drm_info_node *) m->private;
1879         struct drm_device *dev = node->minor->dev;
1880         struct drm_i915_private *dev_priv = dev->dev_private;
1881         int ret;
1882
1883
1884         if (!IS_VALLEYVIEW(dev)) {
1885                 seq_printf(m, "unsupported\n");
1886                 return 0;
1887         }
1888
1889         ret = mutex_lock_interruptible(&dev_priv->dpio_lock);
1890         if (ret)
1891                 return ret;
1892
1893         seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1894
1895         seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1896                    vlv_dpio_read(dev_priv, _DPIO_DIV_A));
1897         seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1898                    vlv_dpio_read(dev_priv, _DPIO_DIV_B));
1899
1900         seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1901                    vlv_dpio_read(dev_priv, _DPIO_REFSFR_A));
1902         seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1903                    vlv_dpio_read(dev_priv, _DPIO_REFSFR_B));
1904
1905         seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1906                    vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1907         seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1908                    vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1909
1910         seq_printf(m, "DPIO_LPF_COEFF_A: 0x%08x\n",
1911                    vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A));
1912         seq_printf(m, "DPIO_LPF_COEFF_B: 0x%08x\n",
1913                    vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B));
1914
1915         seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1916                    vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1917
1918         mutex_unlock(&dev_priv->dpio_lock);
1919
1920         return 0;
1921 }
1922
1923 static int
1924 i915_wedged_get(void *data, u64 *val)
1925 {
1926         struct drm_device *dev = data;
1927         drm_i915_private_t *dev_priv = dev->dev_private;
1928
1929         *val = atomic_read(&dev_priv->gpu_error.reset_counter);
1930
1931         return 0;
1932 }
1933
1934 static int
1935 i915_wedged_set(void *data, u64 val)
1936 {
1937         struct drm_device *dev = data;
1938
1939         DRM_INFO("Manually setting wedged to %llu\n", val);
1940         i915_handle_error(dev, val);
1941
1942         return 0;
1943 }
1944
1945 DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
1946                         i915_wedged_get, i915_wedged_set,
1947                         "%llu\n");
1948
1949 static int
1950 i915_ring_stop_get(void *data, u64 *val)
1951 {
1952         struct drm_device *dev = data;
1953         drm_i915_private_t *dev_priv = dev->dev_private;
1954
1955         *val = dev_priv->gpu_error.stop_rings;
1956
1957         return 0;
1958 }
1959
1960 static int
1961 i915_ring_stop_set(void *data, u64 val)
1962 {
1963         struct drm_device *dev = data;
1964         struct drm_i915_private *dev_priv = dev->dev_private;
1965         int ret;
1966
1967         DRM_DEBUG_DRIVER("Stopping rings 0x%08llx\n", val);
1968
1969         ret = mutex_lock_interruptible(&dev->struct_mutex);
1970         if (ret)
1971                 return ret;
1972
1973         dev_priv->gpu_error.stop_rings = val;
1974         mutex_unlock(&dev->struct_mutex);
1975
1976         return 0;
1977 }
1978
1979 DEFINE_SIMPLE_ATTRIBUTE(i915_ring_stop_fops,
1980                         i915_ring_stop_get, i915_ring_stop_set,
1981                         "0x%08llx\n");
1982
1983 #define DROP_UNBOUND 0x1
1984 #define DROP_BOUND 0x2
1985 #define DROP_RETIRE 0x4
1986 #define DROP_ACTIVE 0x8
1987 #define DROP_ALL (DROP_UNBOUND | \
1988                   DROP_BOUND | \
1989                   DROP_RETIRE | \
1990                   DROP_ACTIVE)
1991 static int
1992 i915_drop_caches_get(void *data, u64 *val)
1993 {
1994         *val = DROP_ALL;
1995
1996         return 0;
1997 }
1998
1999 static int
2000 i915_drop_caches_set(void *data, u64 val)
2001 {
2002         struct drm_device *dev = data;
2003         struct drm_i915_private *dev_priv = dev->dev_private;
2004         struct drm_i915_gem_object *obj, *next;
2005         int ret;
2006
2007         DRM_DEBUG_DRIVER("Dropping caches: 0x%08llx\n", val);
2008
2009         /* No need to check and wait for gpu resets, only libdrm auto-restarts
2010          * on ioctls on -EAGAIN. */
2011         ret = mutex_lock_interruptible(&dev->struct_mutex);
2012         if (ret)
2013                 return ret;
2014
2015         if (val & DROP_ACTIVE) {
2016                 ret = i915_gpu_idle(dev);
2017                 if (ret)
2018                         goto unlock;
2019         }
2020
2021         if (val & (DROP_RETIRE | DROP_ACTIVE))
2022                 i915_gem_retire_requests(dev);
2023
2024         if (val & DROP_BOUND) {
2025                 list_for_each_entry_safe(obj, next, &dev_priv->mm.inactive_list, mm_list)
2026                         if (obj->pin_count == 0) {
2027                                 ret = i915_gem_object_unbind(obj);
2028                                 if (ret)
2029                                         goto unlock;
2030                         }
2031         }
2032
2033         if (val & DROP_UNBOUND) {
2034                 list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list,
2035                                          global_list)
2036                         if (obj->pages_pin_count == 0) {
2037                                 ret = i915_gem_object_put_pages(obj);
2038                                 if (ret)
2039                                         goto unlock;
2040                         }
2041         }
2042
2043 unlock:
2044         mutex_unlock(&dev->struct_mutex);
2045
2046         return ret;
2047 }
2048
2049 DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops,
2050                         i915_drop_caches_get, i915_drop_caches_set,
2051                         "0x%08llx\n");
2052
2053 static int
2054 i915_max_freq_get(void *data, u64 *val)
2055 {
2056         struct drm_device *dev = data;
2057         drm_i915_private_t *dev_priv = dev->dev_private;
2058         int ret;
2059
2060         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2061                 return -ENODEV;
2062
2063         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2064         if (ret)
2065                 return ret;
2066
2067         if (IS_VALLEYVIEW(dev))
2068                 *val = vlv_gpu_freq(dev_priv->mem_freq,
2069                                     dev_priv->rps.max_delay);
2070         else
2071                 *val = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
2072         mutex_unlock(&dev_priv->rps.hw_lock);
2073
2074         return 0;
2075 }
2076
2077 static int
2078 i915_max_freq_set(void *data, u64 val)
2079 {
2080         struct drm_device *dev = data;
2081         struct drm_i915_private *dev_priv = dev->dev_private;
2082         int ret;
2083
2084         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2085                 return -ENODEV;
2086
2087         DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);
2088
2089         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2090         if (ret)
2091                 return ret;
2092
2093         /*
2094          * Turbo will still be enabled, but won't go above the set value.
2095          */
2096         if (IS_VALLEYVIEW(dev)) {
2097                 val = vlv_freq_opcode(dev_priv->mem_freq, val);
2098                 dev_priv->rps.max_delay = val;
2099                 gen6_set_rps(dev, val);
2100         } else {
2101                 do_div(val, GT_FREQUENCY_MULTIPLIER);
2102                 dev_priv->rps.max_delay = val;
2103                 gen6_set_rps(dev, val);
2104         }
2105
2106         mutex_unlock(&dev_priv->rps.hw_lock);
2107
2108         return 0;
2109 }
2110
2111 DEFINE_SIMPLE_ATTRIBUTE(i915_max_freq_fops,
2112                         i915_max_freq_get, i915_max_freq_set,
2113                         "%llu\n");
2114
2115 static int
2116 i915_min_freq_get(void *data, u64 *val)
2117 {
2118         struct drm_device *dev = data;
2119         drm_i915_private_t *dev_priv = dev->dev_private;
2120         int ret;
2121
2122         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2123                 return -ENODEV;
2124
2125         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2126         if (ret)
2127                 return ret;
2128
2129         if (IS_VALLEYVIEW(dev))
2130                 *val = vlv_gpu_freq(dev_priv->mem_freq,
2131                                     dev_priv->rps.min_delay);
2132         else
2133                 *val = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
2134         mutex_unlock(&dev_priv->rps.hw_lock);
2135
2136         return 0;
2137 }
2138
2139 static int
2140 i915_min_freq_set(void *data, u64 val)
2141 {
2142         struct drm_device *dev = data;
2143         struct drm_i915_private *dev_priv = dev->dev_private;
2144         int ret;
2145
2146         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2147                 return -ENODEV;
2148
2149         DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val);
2150
2151         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2152         if (ret)
2153                 return ret;
2154
2155         /*
2156          * Turbo will still be enabled, but won't go below the set value.
2157          */
2158         if (IS_VALLEYVIEW(dev)) {
2159                 val = vlv_freq_opcode(dev_priv->mem_freq, val);
2160                 dev_priv->rps.min_delay = val;
2161                 valleyview_set_rps(dev, val);
2162         } else {
2163                 do_div(val, GT_FREQUENCY_MULTIPLIER);
2164                 dev_priv->rps.min_delay = val;
2165                 gen6_set_rps(dev, val);
2166         }
2167         mutex_unlock(&dev_priv->rps.hw_lock);
2168
2169         return 0;
2170 }
2171
2172 DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops,
2173                         i915_min_freq_get, i915_min_freq_set,
2174                         "%llu\n");
2175
2176 static int
2177 i915_cache_sharing_get(void *data, u64 *val)
2178 {
2179         struct drm_device *dev = data;
2180         drm_i915_private_t *dev_priv = dev->dev_private;
2181         u32 snpcr;
2182         int ret;
2183
2184         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2185                 return -ENODEV;
2186
2187         ret = mutex_lock_interruptible(&dev->struct_mutex);
2188         if (ret)
2189                 return ret;
2190
2191         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
2192         mutex_unlock(&dev_priv->dev->struct_mutex);
2193
2194         *val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT;
2195
2196         return 0;
2197 }
2198
2199 static int
2200 i915_cache_sharing_set(void *data, u64 val)
2201 {
2202         struct drm_device *dev = data;
2203         struct drm_i915_private *dev_priv = dev->dev_private;
2204         u32 snpcr;
2205
2206         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2207                 return -ENODEV;
2208
2209         if (val > 3)
2210                 return -EINVAL;
2211
2212         DRM_DEBUG_DRIVER("Manually setting uncore sharing to %llu\n", val);
2213
2214         /* Update the cache sharing policy here as well */
2215         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
2216         snpcr &= ~GEN6_MBC_SNPCR_MASK;
2217         snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
2218         I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
2219
2220         return 0;
2221 }
2222
2223 DEFINE_SIMPLE_ATTRIBUTE(i915_cache_sharing_fops,
2224                         i915_cache_sharing_get, i915_cache_sharing_set,
2225                         "%llu\n");
2226
2227 /* As the drm_debugfs_init() routines are called before dev->dev_private is
2228  * allocated we need to hook into the minor for release. */
2229 static int
2230 drm_add_fake_info_node(struct drm_minor *minor,
2231                        struct dentry *ent,
2232                        const void *key)
2233 {
2234         struct drm_info_node *node;
2235
2236         node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
2237         if (node == NULL) {
2238                 debugfs_remove(ent);
2239                 return -ENOMEM;
2240         }
2241
2242         node->minor = minor;
2243         node->dent = ent;
2244         node->info_ent = (void *) key;
2245
2246         mutex_lock(&minor->debugfs_lock);
2247         list_add(&node->list, &minor->debugfs_list);
2248         mutex_unlock(&minor->debugfs_lock);
2249
2250         return 0;
2251 }
2252
2253 static int i915_forcewake_open(struct inode *inode, struct file *file)
2254 {
2255         struct drm_device *dev = inode->i_private;
2256         struct drm_i915_private *dev_priv = dev->dev_private;
2257
2258         if (INTEL_INFO(dev)->gen < 6)
2259                 return 0;
2260
2261         gen6_gt_force_wake_get(dev_priv);
2262
2263         return 0;
2264 }
2265
2266 static int i915_forcewake_release(struct inode *inode, struct file *file)
2267 {
2268         struct drm_device *dev = inode->i_private;
2269         struct drm_i915_private *dev_priv = dev->dev_private;
2270
2271         if (INTEL_INFO(dev)->gen < 6)
2272                 return 0;
2273
2274         gen6_gt_force_wake_put(dev_priv);
2275
2276         return 0;
2277 }
2278
2279 static const struct file_operations i915_forcewake_fops = {
2280         .owner = THIS_MODULE,
2281         .open = i915_forcewake_open,
2282         .release = i915_forcewake_release,
2283 };
2284
2285 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
2286 {
2287         struct drm_device *dev = minor->dev;
2288         struct dentry *ent;
2289
2290         ent = debugfs_create_file("i915_forcewake_user",
2291                                   S_IRUSR,
2292                                   root, dev,
2293                                   &i915_forcewake_fops);
2294         if (IS_ERR(ent))
2295                 return PTR_ERR(ent);
2296
2297         return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
2298 }
2299
2300 static int i915_debugfs_create(struct dentry *root,
2301                                struct drm_minor *minor,
2302                                const char *name,
2303                                const struct file_operations *fops)
2304 {
2305         struct drm_device *dev = minor->dev;
2306         struct dentry *ent;
2307
2308         ent = debugfs_create_file(name,
2309                                   S_IRUGO | S_IWUSR,
2310                                   root, dev,
2311                                   fops);
2312         if (IS_ERR(ent))
2313                 return PTR_ERR(ent);
2314
2315         return drm_add_fake_info_node(minor, ent, fops);
2316 }
2317
2318 static struct drm_info_list i915_debugfs_list[] = {
2319         {"i915_capabilities", i915_capabilities, 0},
2320         {"i915_gem_objects", i915_gem_object_info, 0},
2321         {"i915_gem_gtt", i915_gem_gtt_info, 0},
2322         {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2323         {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2324         {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2325         {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2326         {"i915_gem_request", i915_gem_request_info, 0},
2327         {"i915_gem_seqno", i915_gem_seqno_info, 0},
2328         {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2329         {"i915_gem_interrupt", i915_interrupt_info, 0},
2330         {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2331         {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2332         {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2333         {"i915_gem_hws_vebox", i915_hws_info, 0, (void *)VECS},
2334         {"i915_rstdby_delays", i915_rstdby_delays, 0},
2335         {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2336         {"i915_delayfreq_table", i915_delayfreq_table, 0},
2337         {"i915_inttoext_table", i915_inttoext_table, 0},
2338         {"i915_drpc_info", i915_drpc_info, 0},
2339         {"i915_emon_status", i915_emon_status, 0},
2340         {"i915_ring_freq_table", i915_ring_freq_table, 0},
2341         {"i915_gfxec", i915_gfxec, 0},
2342         {"i915_fbc_status", i915_fbc_status, 0},
2343         {"i915_ips_status", i915_ips_status, 0},
2344         {"i915_sr_status", i915_sr_status, 0},
2345         {"i915_opregion", i915_opregion, 0},
2346         {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2347         {"i915_context_status", i915_context_status, 0},
2348         {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2349         {"i915_swizzle_info", i915_swizzle_info, 0},
2350         {"i915_ppgtt_info", i915_ppgtt_info, 0},
2351         {"i915_dpio", i915_dpio_info, 0},
2352 };
2353 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2354
2355 int i915_debugfs_init(struct drm_minor *minor)
2356 {
2357         int ret;
2358
2359         ret = i915_debugfs_create(minor->debugfs_root, minor,
2360                                   "i915_wedged",
2361                                   &i915_wedged_fops);
2362         if (ret)
2363                 return ret;
2364
2365         ret = i915_forcewake_create(minor->debugfs_root, minor);
2366         if (ret)
2367                 return ret;
2368
2369         ret = i915_debugfs_create(minor->debugfs_root, minor,
2370                                   "i915_max_freq",
2371                                   &i915_max_freq_fops);
2372         if (ret)
2373                 return ret;
2374
2375         ret = i915_debugfs_create(minor->debugfs_root, minor,
2376                                   "i915_min_freq",
2377                                   &i915_min_freq_fops);
2378         if (ret)
2379                 return ret;
2380
2381         ret = i915_debugfs_create(minor->debugfs_root, minor,
2382                                   "i915_cache_sharing",
2383                                   &i915_cache_sharing_fops);
2384         if (ret)
2385                 return ret;
2386
2387         ret = i915_debugfs_create(minor->debugfs_root, minor,
2388                                   "i915_ring_stop",
2389                                   &i915_ring_stop_fops);
2390         if (ret)
2391                 return ret;
2392
2393         ret = i915_debugfs_create(minor->debugfs_root, minor,
2394                                   "i915_gem_drop_caches",
2395                                   &i915_drop_caches_fops);
2396         if (ret)
2397                 return ret;
2398
2399         ret = i915_debugfs_create(minor->debugfs_root, minor,
2400                                   "i915_error_state",
2401                                   &i915_error_state_fops);
2402         if (ret)
2403                 return ret;
2404
2405         ret = i915_debugfs_create(minor->debugfs_root, minor,
2406                                  "i915_next_seqno",
2407                                  &i915_next_seqno_fops);
2408         if (ret)
2409                 return ret;
2410
2411         return drm_debugfs_create_files(i915_debugfs_list,
2412                                         I915_DEBUGFS_ENTRIES,
2413                                         minor->debugfs_root, minor);
2414 }
2415
2416 void i915_debugfs_cleanup(struct drm_minor *minor)
2417 {
2418         drm_debugfs_remove_files(i915_debugfs_list,
2419                                  I915_DEBUGFS_ENTRIES, minor);
2420         drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2421                                  1, minor);
2422         drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2423                                  1, minor);
2424         drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2425                                  1, minor);
2426         drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2427                                  1, minor);
2428         drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2429                                  1, minor);
2430         drm_debugfs_remove_files((struct drm_info_list *) &i915_drop_caches_fops,
2431                                  1, minor);
2432         drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2433                                  1, minor);
2434         drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2435                                  1, minor);
2436         drm_debugfs_remove_files((struct drm_info_list *) &i915_next_seqno_fops,
2437                                  1, minor);
2438 }
2439
2440 #endif /* CONFIG_DEBUG_FS */