Replace the the buffer cache's B_READ, B_WRITE, B_FORMAT, and B_FREEBUF
[dragonfly.git] / sys / dev / raid / ips / ips.h
1 /*-
2  * Copyright (c) 2002 Adaptec Inc.
3  * All rights reserved.
4  *
5  * Written by: David Jeffery
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD: src/sys/dev/ips/ips.h,v 1.10 2004/05/30 20:08:34 phk Exp $
29  * $DragonFly: src/sys/dev/raid/ips/ips.h,v 1.9 2006/04/30 17:22:16 dillon Exp $
30  */
31
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/bus.h>
38 #include <sys/conf.h>
39 #include <sys/types.h>
40 #include <sys/thread.h>
41 #include <sys/thread2.h>
42 #include <sys/queue.h>
43 #include <sys/buf.h>
44 #include <sys/buf2.h>
45 #include <sys/malloc.h>
46 #include <sys/time.h>
47
48 #include <machine/bus_memio.h>
49 #include <machine/bus.h>
50 #include <sys/rman.h>
51 #include <machine/resource.h>
52
53 #include <bus/pci/pcireg.h>
54 #include <bus/pci/pcivar.h>
55
56 MALLOC_DECLARE(M_IPSBUF);
57
58 /*
59  *   IPS CONSTANTS
60  */
61 #define IPS_VENDOR_ID                   0x1014
62 #define IPS_VENDOR_ID_ADAPTEC           0x9005
63 #define IPS_MORPHEUS_DEVICE_ID          0x01BD
64 #define IPS_COPPERHEAD_DEVICE_ID        0x002E
65 #define IPS_MARCO_DEVICE_ID             0x0250
66 #define IPS_CSL                         0xff
67 #define IPS_POCL                        0x30
68
69 /* amounts of memory to allocate for certain commands */
70 #define IPS_ADAPTER_INFO_LEN            (sizeof(ips_adapter_info_t))
71 #define IPS_DRIVE_INFO_LEN              (sizeof(ips_drive_info_t))
72 #define IPS_COMMAND_LEN                 24
73 #define IPS_MAX_SG_LEN                  (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS)
74 #define IPS_NVRAM_PAGE_SIZE             128
75 /* various flags */
76 #define IPS_STATIC_FLAG                 1
77
78 /* states for the card to be in */
79 #define IPS_DEV_OPEN                    0x01
80 #define IPS_TIMEOUT                     0x02 /* command time out, need reset */
81 #define IPS_OFFLINE                     0x04 /* can't reset card/card failure */
82 #define IPS_STATIC_BUSY                 0x08 /* static command slot in use */
83
84 /* max number of commands set to something low for now */
85 #define IPS_MAX_CMD_NUM                 128
86 #define IPS_MAX_NUM_DRIVES              8
87 #define IPS_MAX_SG_ELEMENTS             32
88 #define IPS_MAX_IOBUF_SIZE              (64 * 1024)
89 #define IPS_BLKSIZE                     512
90
91 /* logical drive states */
92
93 #define IPS_LD_OFFLINE                  0x02
94 #define IPS_LD_OKAY                     0x03
95 #define IPS_LD_DEGRADED                 0x04
96 #define IPS_LD_FREE                     0x00
97 #define IPS_LD_SYS                      0x06
98 #define IPS_LD_CRS                      0x24
99
100 /* register offsets */
101 #define MORPHEUS_REG_OMR0               0x0018 /* Outbound Msg. Reg. 0 */
102 #define MORPHEUS_REG_OMR1               0x001C /* Outbound Msg. Reg. 1 */
103 #define MORPHEUS_REG_IDR                0x0020 /* Inbound Doorbell Reg. */
104 #define MORPHEUS_REG_IISR               0x0024 /* Inbound IRQ Status Reg. */
105 #define MORPHEUS_REG_IIMR               0x0028 /* Inbound IRQ Mask Reg. */
106 #define MORPHEUS_REG_OISR               0x0030 /* Outbound IRQ Status Reg. */
107 #define MORPHEUS_REG_OIMR               0x0034 /* Outbound IRQ Status Reg. */
108 #define MORPHEUS_REG_IQPR               0x0040 /* Inbound Queue Port Reg. */
109 #define MORPHEUS_REG_OQPR               0x0044 /* Outbound Queue Port Reg. */
110
111 #define COPPER_REG_SCPR                 0x05    /* Subsystem Ctrl. Port Reg. */
112 #define COPPER_REG_ISPR                 0x06    /* IRQ Status Port Reg. */
113 #define COPPER_REG_CBSP                 0x07    /* ? Reg. */
114 #define COPPER_REG_HISR                 0x08    /* Host IRQ Status Reg.    */
115 #define COPPER_REG_CCSAR                0x10    /* Cmd. Channel Sys Addr Reg.*/
116 #define COPPER_REG_CCCR                 0x14    /* Cmd. Channel Ctrl. Reg. */
117 #define COPPER_REG_SQHR                 0x20    /* Status Queue Head Reg.  */
118 #define COPPER_REG_SQTR                 0x24    /* Status Queue Tail Reg.  */
119 #define COPPER_REG_SQER                 0x28    /* Status Queue End Reg.   */
120 #define COPPER_REG_SQSR                 0x2C    /* Status Queue Start Reg. */
121
122 /* bit definitions */
123 #define MORPHEUS_BIT_POST1              0x01
124 #define MORPHEUS_BIT_POST2              0x02
125 #define MORPHEUS_BIT_CMD_IRQ            0x08
126
127 #define COPPER_CMD_START                0x101A
128 #define COPPER_SEM_BIT                  0x08
129 #define COPPER_EI_BIT                   0x80
130 #define COPPER_EBM_BIT                  0x02
131 #define COPPER_RESET_BIT                0x80
132 #define COPPER_GHI_BIT                  0x04
133 #define COPPER_SCE_BIT                  0x01
134 #define COPPER_OP_BIT                   0x01
135 #define COPPER_ILE_BIT                  0x10
136
137 /* status defines */
138 #define IPS_POST1_OK                    0x8000
139 #define IPS_POST2_OK                    0x000f
140
141 /* command op codes */
142 #define IPS_READ_CMD                    0x02
143 #define IPS_WRITE_CMD                   0x03
144 #define IPS_ADAPTER_INFO_CMD            0x05
145 #define IPS_CACHE_FLUSH_CMD             0x0A
146 #define IPS_REBUILD_STATUS_CMD          0x0C
147 #define IPS_ERROR_TABLE_CMD             0x17
148 #define IPS_DRIVE_INFO_CMD              0x19
149 #define IPS_SUBSYS_PARAM_CMD            0x40
150 #define IPS_CONFIG_SYNC_CMD             0x58
151 #define IPS_SG_READ_CMD                 0x82
152 #define IPS_SG_WRITE_CMD                0x83
153 #define IPS_RW_NVRAM_CMD                0xBC
154 #define IPS_FFDC_CMD                    0xD7
155
156 /* error information returned by the adapter */
157 #define IPS_MIN_ERROR                   0x02
158 #define IPS_ERROR_STATUS                0x13000200 /* ahh, magic numbers */
159
160 #define IPS_OS_FREEBSD                  8
161 #define IPS_VERSION_MAJOR               "0.90"
162 #define IPS_VERSION_MINOR               ".10"
163
164 /* Adapter Types */
165 #define IPS_ADAPTER_COPPERHEAD          0x01
166 #define IPS_ADAPTER_COPPERHEAD2         0x02
167 #define IPS_ADAPTER_COPPERHEADOB1       0x03
168 #define IPS_ADAPTER_COPPERHEADOB2       0x04
169 #define IPS_ADAPTER_CLARINET            0x05
170 #define IPS_ADAPTER_CLARINETLITE        0x06
171 #define IPS_ADAPTER_TROMBONE            0x07
172 #define IPS_ADAPTER_MORPHEUS            0x08
173 #define IPS_ADAPTER_MORPHEUSLITE        0x09
174 #define IPS_ADAPTER_NEO                 0x0A
175 #define IPS_ADAPTER_NEOLITE             0x0B
176 #define IPS_ADAPTER_SARASOTA2           0x0C
177 #define IPS_ADAPTER_SARASOTA1           0x0D
178 #define IPS_ADAPTER_MARCO               0x0E
179 #define IPS_ADAPTER_SEBRING             0x0F
180 #define IPS_ADAPTER_MAX_T               IPS_ADAPTER_SEBRING
181
182 /* values for ffdc_settime (from gmtime) */
183 #define IPS_SECSPERMIN      60
184 #define IPS_MINSPERHOUR     60
185 #define IPS_HOURSPERDAY     24
186 #define IPS_DAYSPERWEEK     7
187 #define IPS_DAYSPERNYEAR    365
188 #define IPS_DAYSPERLYEAR    366
189 #define IPS_SECSPERHOUR     (IPS_SECSPERMIN * IPS_MINSPERHOUR)
190 #define IPS_SECSPERDAY      ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY)
191 #define IPS_MONSPERYEAR     12
192 #define IPS_EPOCH_YEAR      1970
193 #define IPS_LEAPS_THRU_END_OF(y)    ((y) / 4 - (y) / 100 + (y) / 400)
194 #define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0))
195
196
197 /*
198  * for compatibility
199  */
200 /* struct buf to struct bio changes */
201
202 #define d_maxsize       si_iosize_max
203
204 #define disk_open_t     d_open_t
205 #define disk_close_t    d_close_t
206 #define disk_strategy_t d_strategy_t
207
208 #if defined(PCIR_MAPS) && !defined(PCIR_BARS)
209 # define PCIR_BAR(x)    (PCIR_BARS + (x) * 4)
210 # define PCIR_BARS      PCIR_MAPS
211 #endif
212
213
214 /*
215  *  IPS MACROS
216  */
217
218 #define ips_read_1(sc,offset)           bus_space_read_1(sc->bustag, sc->bushandle, offset)
219 #define ips_read_2(sc,offset)           bus_space_read_2(sc->bustag, sc->bushandle, offset)
220 #define ips_read_4(sc,offset)           bus_space_read_4(sc->bustag, sc->bushandle, offset)
221
222 #define ips_write_1(sc,offset,value)    bus_space_write_1(sc->bustag, sc->bushandle, offset, value)
223 #define ips_write_2(sc,offset,value)    bus_space_write_2(sc->bustag, sc->bushandle, offset, value)
224 #define ips_write_4(sc,offset,value)    bus_space_write_4(sc->bustag, sc->bushandle, offset, value)
225
226 #define ips_read_request(iobuf)         ((bio)->bio_buf->b_cmd == BUF_CMD_READ)
227
228 #define COMMAND_ERROR(status)           (((status)->fields.basic_status & 0x0f) >= IPS_MIN_ERROR)
229
230 #ifndef IPS_DEBUG
231 #define DEVICE_PRINTF(x...)
232 #define PRINTF(x...)
233 #else
234 #define DEVICE_PRINTF(level,x...)       if(IPS_DEBUG >= level)device_printf(x)
235 #define PRINTF(level,x...)              if(IPS_DEBUG >= level)printf(x)
236 #endif
237
238 /*
239  *   IPS STRUCTS
240  */
241 struct ips_softc;
242
243 typedef struct {
244         u_int8_t        command;
245         u_int8_t        id;
246         u_int8_t        drivenum;
247         u_int8_t        reserve2;
248         u_int32_t       lba;
249         u_int32_t       buffaddr;
250         u_int32_t       reserve3;
251 } __attribute__ ((packed)) ips_generic_cmd;
252
253 typedef struct {
254         u_int8_t        command;
255         u_int8_t        id;
256         u_int8_t        drivenum;
257         u_int8_t        segnum;
258         u_int32_t       lba;
259         u_int32_t       buffaddr;
260         u_int16_t       length;
261         u_int16_t       reserve1;
262 } __attribute__ ((packed)) ips_io_cmd;
263
264 typedef struct {
265         u_int8_t        command;
266         u_int8_t        id;
267         u_int8_t        pagenum;
268         u_int8_t        rw;
269         u_int32_t       reserve1;
270         u_int32_t       buffaddr;
271         u_int32_t       reserve3;
272 } __attribute__ ((packed)) ips_rw_nvram_cmd;
273
274 typedef struct {
275         u_int8_t        command;
276         u_int8_t        id;
277         u_int8_t        drivenum;
278         u_int8_t        reserve1;
279         u_int32_t       reserve2;
280         u_int32_t       buffaddr;
281         u_int32_t       reserve3;
282 } __attribute__ ((packed)) ips_drive_cmd;
283
284 typedef struct {
285         u_int8_t        command;
286         u_int8_t        id;
287         u_int8_t        reserve1;
288         u_int8_t        commandtype;
289         u_int32_t       reserve2;
290         u_int32_t       buffaddr;
291         u_int32_t       reserve3;
292 } __attribute__((packed)) ips_adapter_info_cmd;
293
294 typedef struct {
295         u_int8_t        command;
296         u_int8_t        id;
297         u_int8_t        reset_count;
298         u_int8_t        reset_type;
299         u_int8_t        second;
300         u_int8_t        minute;
301         u_int8_t        hour;
302         u_int8_t        day;
303         u_int8_t        reserve1[4];
304         u_int8_t        month;
305         u_int8_t        yearH;
306         u_int8_t        yearL;
307         u_int8_t        reserve2;
308 } __attribute__((packed)) ips_adapter_ffdc_cmd;
309
310 typedef union{
311         ips_generic_cmd         generic_cmd;
312         ips_drive_cmd           drive_cmd;
313         ips_adapter_info_cmd    adapter_info_cmd;
314 } ips_cmd_buff_t;
315
316 typedef struct {
317    u_int32_t  signature;
318    u_int8_t   reserved;
319    u_int8_t   adapter_slot;
320    u_int16_t  adapter_type;
321    u_int8_t   bios_high[4];
322    u_int8_t   bios_low[4];
323    u_int16_t  reserve2;
324    u_int8_t   reserve3;
325    u_int8_t   operating_system;
326    u_int8_t   driver_high[4];
327    u_int8_t   driver_low[4];
328    u_int8_t   reserve4[100];
329 } __attribute__((packed)) ips_nvram_page5;
330
331 typedef struct {
332         u_int32_t       addr;
333         u_int32_t       len;
334 } ips_sg_element_t;
335
336 typedef struct {
337         u_int8_t        drivenum;
338         u_int8_t        merge_id;
339         u_int8_t        raid_lvl;
340         u_int8_t        state;
341         u_int32_t       sector_count;
342 } __attribute__((packed)) ips_drive_t;
343
344 typedef struct {
345         u_int8_t        drivecount;
346         u_int8_t        reserve1;
347         u_int16_t       reserve2;
348         ips_drive_t drives[IPS_MAX_NUM_DRIVES];
349 } __attribute__((packed)) ips_drive_info_t;
350
351 typedef struct {
352         u_int8_t        drivecount;
353         u_int8_t        miscflags;
354         u_int8_t        SLTflags;
355         u_int8_t        BSTflags;
356         u_int8_t        pwr_chg_count;
357         u_int8_t        wrong_addr_count;
358         u_int8_t        unident_count;
359         u_int8_t        nvram_dev_chg_count;
360         u_int8_t        codeblock_version[8];
361         u_int8_t        bootblock_version[8];
362         u_int32_t       drive_sector_count[IPS_MAX_NUM_DRIVES];
363         u_int8_t        max_concurrent_cmds;
364         u_int8_t        max_phys_devices;
365         u_int16_t       flash_prog_count;
366         u_int8_t        defunct_disks;
367         u_int8_t        rebuildflags;
368         u_int8_t        offline_drivecount;
369         u_int8_t        critical_drivecount;
370         u_int16_t       config_update_count;
371         u_int8_t        blockedflags;
372         u_int8_t        psdn_error;
373         u_int16_t       addr_dead_disk[4*16];   /* ugly, max # channels * max # scsi devices per channel */
374 } __attribute__((packed)) ips_adapter_info_t;
375
376 typedef struct {
377         u_int32_t       status[IPS_MAX_CMD_NUM];
378         u_int32_t       base_phys_addr;
379         int             nextstatus;
380         bus_dma_tag_t   dmatag;
381         bus_dmamap_t    dmamap;
382 } ips_copper_queue_t;
383
384 typedef union {
385    struct {
386       u_int8_t  reserved;
387       u_int8_t  command_id;
388       u_int8_t  basic_status;
389       u_int8_t  extended_status;
390    } fields;
391    volatile u_int32_t    value;
392 } ips_cmd_status_t;
393
394 /* used to keep track of current commands to the card */
395 typedef struct ips_command {
396         u_int8_t                command_number;
397         u_int8_t                id;
398         u_int8_t                timeout;
399         struct ips_softc        *sc;
400         bus_dmamap_t            command_dmamap;
401         void                    *command_buffer;
402         u_int32_t               command_phys_addr;      /*WARNING! must be changed if 64bit addressing ever used*/
403         bus_dma_tag_t           data_dmatag;
404         bus_dmamap_t            data_dmamap;
405         /* members below are zero'd when handed out */
406         ips_cmd_status_t        status;
407         SLIST_ENTRY(ips_command)        next;
408         void                    *data_buffer;
409         void                    *arg;
410         void                    (*callback)(struct ips_command *command);
411         int                     completed;
412 } ips_command_t;
413
414 typedef struct ips_wait_list {
415         STAILQ_ENTRY(ips_wait_list) next;
416         void                    *data;
417         int                     (* callback)(ips_command_t *command);
418 } ips_wait_list_t;
419
420 typedef struct ips_softc {
421         struct resource         *iores;
422         struct resource         *irqres;
423         struct intr_config_hook ips_ich;
424         int                     configured;
425         int                     state;
426         int                     iotype;
427         int                     rid;
428         int                     irqrid;
429         void                    *irqcookie;
430         bus_space_tag_t         bustag;
431         bus_space_handle_t      bushandle;
432         bus_dma_tag_t           adapter_dmatag;
433         bus_dma_tag_t           command_dmatag;
434         bus_dma_tag_t           sg_dmatag;
435         device_t                dev;
436         struct callout          timer;
437         u_int16_t               adapter_type;
438         ips_adapter_info_t      adapter_info;
439         device_t                diskdev[IPS_MAX_NUM_DRIVES];
440         ips_drive_t             drives[IPS_MAX_NUM_DRIVES];
441         u_int8_t                drivecount;
442         u_int16_t               ffdc_resetcount;
443         struct timeval          ffdc_resettime;
444         u_int8_t                next_drive;
445         u_int8_t                max_cmds;
446         volatile u_int8_t       used_commands;
447         ips_command_t           *commandarray;
448         ips_command_t           *staticcmd;
449         SLIST_HEAD(command_list, ips_command) free_cmd_list;
450         int                     (*ips_adapter_reinit)(struct ips_softc *sc,
451                                                        int force);
452         void                    (*ips_adapter_intr)(void *sc);
453         void                    (*ips_issue_cmd)(ips_command_t *command);
454         void                    (*ips_poll_cmd)(ips_command_t *command);
455         ips_copper_queue_t      *copper_queue;
456
457         struct lwkt_rwlock      queue_lock;
458         struct bio_queue_head   bio_queue;
459 } ips_softc_t;
460
461 /* function defines from ips_ioctl.c */
462 extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr,
463                                 int32_t flags);
464 /* function defines from ips_disk.c */
465 extern void ipsd_finish(struct bio *iobuf);
466
467 /* function defines from ips_commands.c */
468 extern int ips_flush_cache(ips_softc_t *sc);
469 extern void ips_start_io_request(ips_softc_t *sc);
470 extern int ips_get_drive_info(ips_softc_t *sc);
471 extern int ips_get_adapter_info(ips_softc_t *sc);
472 extern int ips_ffdc_reset(ips_softc_t *sc);
473 extern int ips_update_nvram(ips_softc_t *sc);
474 extern int ips_clear_adapter(ips_softc_t *sc);
475
476 /* function defines from ips.c */
477 extern int ips_get_free_cmd(ips_softc_t *sc, ips_command_t **command,
478                             unsigned long flags);
479 extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command);
480 extern int ips_adapter_init(ips_softc_t *sc);
481 extern int ips_morpheus_reinit(ips_softc_t *sc, int force);
482 extern int ips_adapter_free(ips_softc_t *sc);
483 extern void ips_morpheus_intr(void *sc);
484 extern void ips_issue_morpheus_cmd(ips_command_t *command);
485 extern void ips_morpheus_poll(ips_command_t *command);
486 extern int ips_copperhead_reinit(ips_softc_t *sc, int force);
487 extern void ips_copperhead_intr(void *sc);
488 extern void ips_issue_copperhead_cmd(ips_command_t *command);
489 extern void ips_copperhead_poll(ips_command_t *command);
490 int ips_timed_wait(ips_command_t *, const char *, int);
491
492 #define IPS_CDEV_MAJOR 175
493 #define IPSD_CDEV_MAJOR 176