sys/dev/drm/i915/intel_drv.h

   1 /*
   2  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007-2008 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23  * IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #ifndef DRM_INTEL_DRV_H
  28 #define DRM_INTEL_DRV_H
  29
  30 #include <linux/delay.h>
  31 #include <drm/i915_drm.h>
  32 #include "i915_drv.h"
  33 #include <drm/drm_crtc.h>
  34 #include <drm/drm_crtc_helper.h>
  35 #include <drm/drm_fb_helper.h>
  36 #include <drm/drm_dp_helper.h>
  37
  38 #define _wait_for(COND, MS, W) ({ \
  39         unsigned long timeout__ = jiffies + msecs_to_jiffies(MS);       \
  40         int ret__ = 0;                                                  \
  41         while (!(COND)) {                                               \
  42                 if (time_after(jiffies, timeout__)) {                   \
  43                         ret__ = -ETIMEDOUT;                             \
  44                         break;                                          \
  45                 }                                                       \
  46                 if (W && drm_can_sleep())  {                            \
  47                         msleep(W);                                      \
  48                 } else {                                                \
  49                         cpu_pause();                                    \
  50                 }                                                       \
  51         }                                                               \
  52         ret__;                                                          \
  53 })
  54
  55 /* XXX: poor substitute for the Linux version of this routine */
  56 static inline
  57 unsigned long usecs_to_jiffies(const unsigned int u)
  58 {
  59         unsigned long jiffies;
  60
  61         jiffies = (u * hz) / 1000000;
  62         if (jiffies < 1)
  63                 return 1;
  64         else
  65                 return jiffies;
  66 }
  67
  68 #define wait_for_atomic_us(COND, US) ({ \
  69         unsigned long timeout__ = jiffies + usecs_to_jiffies(US);       \
  70         int ret__ = 0;                                                  \
  71         while (!(COND)) {                                               \
  72                 if (time_after(jiffies, timeout__)) {                   \
  73                         ret__ = -ETIMEDOUT;                             \
  74                         break;                                          \
  75                 }                                                       \
  76                 cpu_pause();                                            \
  77         }                                                               \
  78         ret__;                                                          \
  79 })
  80
  81 #define _intel_wait_for(DEV, COND, MS, W, WMSG)                         \
  82 ({                                                                      \
  83         int end, ret;                                                   \
  84                                                                         \
  85         end = ticks + (MS) * hz / 1000;                                 \
  86         ret = 0;                                                        \
  87                                                                         \
  88         while (!(COND)) {                                               \
  89                 if (time_after(ticks, end)) {                           \
  90                         ret = -ETIMEDOUT;                               \
  91                         break;                                          \
  92                 }                                                       \
  93                 DELAY(1000);                                            \
  94         }                                                               \
  95                                                                         \
  96         ret;                                                            \
  97 })
  98
  99 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
 100 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
 101
 102 #define KHz(x) (1000*x)
 103 #define MHz(x) KHz(1000*x)
 104
 105 /* store information about an Ixxx DVO */
 106 /* The i830->i865 use multiple DVOs with multiple i2cs */
 107 /* the i915, i945 have a single sDVO i2c bus - which is different */
 108 #define MAX_OUTPUTS 6
 109 /* maximum connectors per crtcs in the mode set */
 110 #define INTELFB_CONN_LIMIT 4
 111
 112 #define INTEL_I2C_BUS_DVO 1
 113 #define INTEL_I2C_BUS_SDVO 2
 114
 115 /* these are outputs from the chip - integrated only
 116    external chips are via DVO or SDVO output */
 117 #define INTEL_OUTPUT_UNUSED 0
 118 #define INTEL_OUTPUT_ANALOG 1
 119 #define INTEL_OUTPUT_DVO 2
 120 #define INTEL_OUTPUT_SDVO 3
 121 #define INTEL_OUTPUT_LVDS 4
 122 #define INTEL_OUTPUT_TVOUT 5
 123 #define INTEL_OUTPUT_HDMI 6
 124 #define INTEL_OUTPUT_DISPLAYPORT 7
 125 #define INTEL_OUTPUT_EDP 8
 126 #define INTEL_OUTPUT_UNKNOWN 9
 127
 128 #define INTEL_DVO_CHIP_NONE 0
 129 #define INTEL_DVO_CHIP_LVDS 1
 130 #define INTEL_DVO_CHIP_TMDS 2
 131 #define INTEL_DVO_CHIP_TVOUT 4
 132
 133 /* drm_display_mode->private_flags */
 134 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
 135 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
 136 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
 137 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
 138  * timings in the mode to prevent the crtc fixup from overwriting them.
 139  * Currently only lvds needs that. */
 140 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
 141
 142 static inline void
 143 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
 144                                 int multiplier)
 145 {
 146         mode->clock *= multiplier;
 147         mode->private_flags |= multiplier;
 148 }
 149
 150 static inline int
 151 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
 152 {
 153         return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
 154 }
 155
 156 struct intel_framebuffer {
 157         struct drm_framebuffer base;
 158         struct drm_i915_gem_object *obj;
 159 };
 160
 161 struct intel_fbdev {
 162         struct drm_fb_helper helper;
 163         struct intel_framebuffer ifb;
 164         struct list_head fbdev_list;
 165         struct drm_display_mode *our_mode;
 166 };
 167
 168 struct intel_encoder {
 169         struct drm_encoder base;
 170         /*
 171          * The new crtc this encoder will be driven from. Only differs from
 172          * base->crtc while a modeset is in progress.
 173          */
 174         struct intel_crtc *new_crtc;
 175
 176         int type;
 177         bool needs_tv_clock;
 178         /*
 179          * Intel hw has only one MUX where encoders could be clone, hence a
 180          * simple flag is enough to compute the possible_clones mask.
 181          */
 182         bool cloneable;
 183         bool connectors_active;
 184         void (*hot_plug)(struct intel_encoder *);
 185         void (*enable)(struct intel_encoder *);
 186         void (*pre_enable)(struct intel_encoder *);
 187         void (*disable)(struct intel_encoder *);
 188         void (*post_disable)(struct intel_encoder *);
 189         /* Read out the current hw state of this connector, returning true if
 190          * the encoder is active. If the encoder is enabled it also set the pipe
 191          * it is connected to in the pipe parameter. */
 192         bool (*get_hw_state)(struct intel_encoder *, enum i915_pipe *pipe);
 193         int crtc_mask;
 194 };
 195
 196 struct intel_panel {
 197         struct drm_display_mode *fixed_mode;
 198         int fitting_mode;
 199 };
 200
 201 struct intel_connector {
 202         struct drm_connector base;
 203         /*
 204          * The fixed encoder this connector is connected to.
 205          */
 206         struct intel_encoder *encoder;
 207
 208         /*
 209          * The new encoder this connector will be driven. Only differs from
 210          * encoder while a modeset is in progress.
 211          */
 212         struct intel_encoder *new_encoder;
 213
 214         /* Reads out the current hw, returning true if the connector is enabled
 215          * and active (i.e. dpms ON state). */
 216         bool (*get_hw_state)(struct intel_connector *);
 217
 218         /* Panel info for eDP and LVDS */
 219         struct intel_panel panel;
 220
 221         /* Cached EDID for eDP and LVDS. May hold ERR_PTR for invalid EDID. */
 222         struct edid *edid;
 223 };
 224
 225 struct intel_crtc {
 226         struct drm_crtc base;
 227         enum i915_pipe pipe;
 228         enum plane plane;
 229         enum transcoder cpu_transcoder;
 230         u8 lut_r[256], lut_g[256], lut_b[256];
 231         /*
 232          * Whether the crtc and the connected output pipeline is active. Implies
 233          * that crtc->enabled is set, i.e. the current mode configuration has
 234          * some outputs connected to this crtc.
 235          */
 236         bool active;
 237         bool primary_disabled; /* is the crtc obscured by a plane? */
 238         bool lowfreq_avail;
 239         struct intel_overlay *overlay;
 240         struct intel_unpin_work *unpin_work;
 241         int fdi_lanes;
 242
 243         atomic_t unpin_work_count;
 244
 245         /* Display surface base address adjustement for pageflips. Note that on
 246          * gen4+ this only adjusts up to a tile, offsets within a tile are
 247          * handled in the hw itself (with the TILEOFF register). */
 248         unsigned long dspaddr_offset;
 249
 250         struct drm_i915_gem_object *cursor_bo;
 251         uint32_t cursor_addr;
 252         int16_t cursor_x, cursor_y;
 253         int16_t cursor_width, cursor_height;
 254         bool cursor_visible;
 255         unsigned int bpp;
 256
 257         /* We can share PLLs across outputs if the timings match */
 258         struct intel_pch_pll *pch_pll;
 259         uint32_t ddi_pll_sel;
 260 };
 261
 262 struct intel_plane {
 263         struct drm_plane base;
 264         enum i915_pipe pipe;
 265         struct drm_i915_gem_object *obj;
 266         bool can_scale;
 267         int max_downscale;
 268         u32 lut_r[1024], lut_g[1024], lut_b[1024];
 269         void (*update_plane)(struct drm_plane *plane,
 270                              struct drm_framebuffer *fb,
 271                              struct drm_i915_gem_object *obj,
 272                              int crtc_x, int crtc_y,
 273                              unsigned int crtc_w, unsigned int crtc_h,
 274                              uint32_t x, uint32_t y,
 275                              uint32_t src_w, uint32_t src_h);
 276         void (*disable_plane)(struct drm_plane *plane);
 277         int (*update_colorkey)(struct drm_plane *plane,
 278                                struct drm_intel_sprite_colorkey *key);
 279         void (*get_colorkey)(struct drm_plane *plane,
 280                              struct drm_intel_sprite_colorkey *key);
 281 };
 282
 283 struct intel_watermark_params {
 284         unsigned long fifo_size;
 285         unsigned long max_wm;
 286         unsigned long default_wm;
 287         unsigned long guard_size;
 288         unsigned long cacheline_size;
 289 };
 290
 291 struct cxsr_latency {
 292         int is_desktop;
 293         int is_ddr3;
 294         unsigned long fsb_freq;
 295         unsigned long mem_freq;
 296         unsigned long display_sr;
 297         unsigned long display_hpll_disable;
 298         unsigned long cursor_sr;
 299         unsigned long cursor_hpll_disable;
 300 };
 301
 302 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
 303 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
 304 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
 305 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 306 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
 307
 308 #define DIP_HEADER_SIZE 5
 309
 310 #define DIP_TYPE_AVI    0x82
 311 #define DIP_VERSION_AVI 0x2
 312 #define DIP_LEN_AVI     13
 313 #define DIP_AVI_PR_1    0
 314 #define DIP_AVI_PR_2    1
 315
 316 #define DIP_TYPE_SPD    0x83
 317 #define DIP_VERSION_SPD 0x1
 318 #define DIP_LEN_SPD     25
 319 #define DIP_SPD_UNKNOWN 0
 320 #define DIP_SPD_DSTB    0x1
 321 #define DIP_SPD_DVDP    0x2
 322 #define DIP_SPD_DVHS    0x3
 323 #define DIP_SPD_HDDVR   0x4
 324 #define DIP_SPD_DVC     0x5
 325 #define DIP_SPD_DSC     0x6
 326 #define DIP_SPD_VCD     0x7
 327 #define DIP_SPD_GAME    0x8
 328 #define DIP_SPD_PC      0x9
 329 #define DIP_SPD_BD      0xa
 330 #define DIP_SPD_SCD     0xb
 331
 332 struct dip_infoframe {
 333         uint8_t type;           /* HB0 */
 334         uint8_t ver;            /* HB1 */
 335         uint8_t len;            /* HB2 - body len, not including checksum */
 336         uint8_t ecc;            /* Header ECC */
 337         uint8_t checksum;       /* PB0 */
 338         union {
 339                 struct {
 340                         /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
 341                         uint8_t Y_A_B_S;
 342                         /* PB2 - C 7:6, M 5:4, R 3:0 */
 343                         uint8_t C_M_R;
 344                         /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
 345                         uint8_t ITC_EC_Q_SC;
 346                         /* PB4 - VIC 6:0 */
 347                         uint8_t VIC;
 348                         /* PB5 - PR 3:0 */
 349                         uint8_t YQ_CN_PR;
 350                         /* PB6 to PB13 */
 351                         uint16_t top_bar_end;
 352                         uint16_t bottom_bar_start;
 353                         uint16_t left_bar_end;
 354                         uint16_t right_bar_start;
 355                 } __attribute__ ((packed)) avi;
 356                 struct {
 357                         uint8_t vn[8];
 358                         uint8_t pd[16];
 359                         uint8_t sdi;
 360                 } __attribute__ ((packed)) spd;
 361                 uint8_t payload[27];
 362         } __attribute__ ((packed)) body;
 363 } __attribute__((packed));
 364
 365 struct intel_hdmi {
 366         u32 sdvox_reg;
 367         int ddc_bus;
 368         uint32_t color_range;
 369         bool has_hdmi_sink;
 370         bool has_audio;
 371         enum hdmi_force_audio force_audio;
 372         void (*write_infoframe)(struct drm_encoder *encoder,
 373                                 struct dip_infoframe *frame);
 374         void (*set_infoframes)(struct drm_encoder *encoder,
 375                                struct drm_display_mode *adjusted_mode);
 376 };
 377
 378 #define DP_MAX_DOWNSTREAM_PORTS         0x10
 379 #define DP_LINK_CONFIGURATION_SIZE      9
 380
 381 struct intel_dp {
 382         uint32_t output_reg;
 383         uint32_t DP;
 384         uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
 385         bool has_audio;
 386         enum hdmi_force_audio force_audio;
 387         uint32_t color_range;
 388         uint8_t link_bw;
 389         uint8_t lane_count;
 390         uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
 391         uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
 392         device_t dp_iic_bus;
 393         device_t adapter;
 394         bool is_pch_edp;
 395         uint8_t train_set[4];
 396         int panel_power_up_delay;
 397         int panel_power_down_delay;
 398         int panel_power_cycle_delay;
 399         int backlight_on_delay;
 400         int backlight_off_delay;
 401         struct delayed_work panel_vdd_work;
 402         bool want_panel_vdd;
 403         struct intel_connector *attached_connector;
 404 };
 405
 406 struct intel_digital_port {
 407         struct intel_encoder base;
 408         enum port port;
 409         u32 port_reversal;
 410         struct intel_dp dp;
 411         struct intel_hdmi hdmi;
 412 };
 413
 414 static inline struct drm_crtc *
 415 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 416 {
 417         struct drm_i915_private *dev_priv = dev->dev_private;
 418         return dev_priv->pipe_to_crtc_mapping[pipe];
 419 }
 420
 421 static inline struct drm_crtc *
 422 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 423 {
 424         struct drm_i915_private *dev_priv = dev->dev_private;
 425         return dev_priv->plane_to_crtc_mapping[plane];
 426 }
 427
 428 struct intel_unpin_work {
 429         struct work_struct work;
 430         struct drm_crtc *crtc;
 431         struct drm_device *dev;
 432         struct drm_i915_gem_object *old_fb_obj;
 433         struct drm_i915_gem_object *pending_flip_obj;
 434         struct drm_pending_vblank_event *event;
 435         atomic_t pending;
 436 #define INTEL_FLIP_INACTIVE     0
 437 #define INTEL_FLIP_PENDING      1
 438 #define INTEL_FLIP_COMPLETE     2
 439         bool enable_stall_check;
 440 };
 441
 442 struct intel_fbc_work {
 443         struct delayed_work work;
 444         struct drm_crtc *crtc;
 445         struct drm_framebuffer *fb;
 446         int interval;
 447 };
 448
 449 int intel_pch_rawclk(struct drm_device *dev);
 450
 451 int intel_connector_update_modes(struct drm_connector *connector,
 452                                 struct edid *edid);
 453 int intel_ddc_get_modes(struct drm_connector *c, device_t adapter);
 454
 455 extern void intel_attach_force_audio_property(struct drm_connector *connector);
 456 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
 457
 458 extern void intel_crt_init(struct drm_device *dev);
 459 extern void intel_hdmi_init(struct drm_device *dev,
 460                             int sdvox_reg, enum port port);
 461 extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
 462                                       struct intel_connector *intel_connector);
 463 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
 464 extern bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
 465                                   const struct drm_display_mode *mode,
 466                                   struct drm_display_mode *adjusted_mode);
 467 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 468 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
 469                             bool is_sdvob);
 470 extern void intel_dvo_init(struct drm_device *dev);
 471 extern void intel_tv_init(struct drm_device *dev);
 472 extern void intel_mark_busy(struct drm_device *dev);
 473 extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj);
 474 extern void intel_mark_idle(struct drm_device *dev);
 475 extern bool intel_lvds_init(struct drm_device *dev);
 476 extern void intel_dp_init(struct drm_device *dev, int output_reg,
 477                           enum port port);
 478 extern void intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
 479                                     struct intel_connector *intel_connector);
 480 void
 481 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
 482                  struct drm_display_mode *adjusted_mode);
 483 extern void intel_dp_init_link_config(struct intel_dp *intel_dp);
 484 extern void intel_dp_start_link_train(struct intel_dp *intel_dp);
 485 extern void intel_dp_complete_link_train(struct intel_dp *intel_dp);
 486 extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
 487 extern void intel_dp_encoder_destroy(struct drm_encoder *encoder);
 488 extern void intel_dp_check_link_status(struct intel_dp *intel_dp);
 489 extern bool intel_dp_mode_fixup(struct drm_encoder *encoder,
 490                                 const struct drm_display_mode *mode,
 491                                 struct drm_display_mode *adjusted_mode);
 492 extern bool intel_dpd_is_edp(struct drm_device *dev);
 493 extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
 494 extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
 495 extern void ironlake_edp_panel_on(struct intel_dp *intel_dp);
 496 extern void ironlake_edp_panel_off(struct intel_dp *intel_dp);
 497 extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp);
 498 extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
 499 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
 500 extern int intel_edp_target_clock(struct intel_encoder *,
 501                                   struct drm_display_mode *mode);
 502 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
 503 extern int intel_plane_init(struct drm_device *dev, enum i915_pipe pipe);
 504 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
 505                                       enum plane plane);
 506
 507 /* intel_panel.c */
 508 extern int intel_panel_init(struct intel_panel *panel,
 509                             struct drm_display_mode *fixed_mode);
 510 extern void intel_panel_fini(struct intel_panel *panel);
 511
 512 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
 513                                    struct drm_display_mode *adjusted_mode);
 514 extern void intel_pch_panel_fitting(struct drm_device *dev,
 515                                     int fitting_mode,
 516                                     const struct drm_display_mode *mode,
 517                                     struct drm_display_mode *adjusted_mode);
 518 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
 519 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
 520 extern int intel_panel_setup_backlight(struct drm_connector *connector);
 521 extern void intel_panel_enable_backlight(struct drm_device *dev,
 522                                          enum i915_pipe pipe);
 523 extern void intel_panel_disable_backlight(struct drm_device *dev);
 524 extern void intel_panel_destroy_backlight(struct drm_device *dev);
 525 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
 526
 527 struct intel_set_config {
 528         struct drm_encoder **save_connector_encoders;
 529         struct drm_crtc **save_encoder_crtcs;
 530
 531         bool fb_changed;
 532         bool mode_changed;
 533 };
 534
 535 extern bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
 536                            int x, int y, struct drm_framebuffer *old_fb);
 537 extern void intel_modeset_disable(struct drm_device *dev);
 538 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 539 extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
 540 extern void intel_encoder_noop(struct drm_encoder *encoder);
 541 extern void intel_encoder_destroy(struct drm_encoder *encoder);
 542 extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
 543 extern bool intel_encoder_check_is_cloned(struct intel_encoder *encoder);
 544 extern void intel_connector_dpms(struct drm_connector *, int mode);
 545 extern bool intel_connector_get_hw_state(struct intel_connector *connector);
 546 extern void intel_modeset_check_state(struct drm_device *dev);
 547
 548 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
 549 {
 550         return to_intel_connector(connector)->encoder;
 551 }
 552
 553 static inline struct intel_dp *enc_to_intel_dp(struct drm_encoder *encoder)
 554 {
 555         struct intel_digital_port *intel_dig_port =
 556                 container_of(encoder, struct intel_digital_port, base.base);
 557         return &intel_dig_port->dp;
 558 }
 559
 560 static inline struct intel_digital_port *
 561 enc_to_dig_port(struct drm_encoder *encoder)
 562 {
 563         return container_of(encoder, struct intel_digital_port, base.base);
 564 }
 565
 566 static inline struct intel_digital_port *
 567 dp_to_dig_port(struct intel_dp *intel_dp)
 568 {
 569         return container_of(intel_dp, struct intel_digital_port, dp);
 570 }
 571
 572 static inline struct intel_digital_port *
 573 hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
 574 {
 575         return container_of(intel_hdmi, struct intel_digital_port, hdmi);
 576 }
 577
 578 extern void intel_connector_attach_encoder(struct intel_connector *connector,
 579                                            struct intel_encoder *encoder);
 580 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
 581
 582 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 583                                                     struct drm_crtc *crtc);
 584 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
 585                                 struct drm_file *file_priv);
 586 extern enum transcoder
 587 intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
 588                              enum i915_pipe pipe);
 589 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
 590 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
 591 extern int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
 592
 593 struct intel_load_detect_pipe {
 594         struct drm_framebuffer *release_fb;
 595         bool load_detect_temp;
 596         int dpms_mode;
 597 };
 598 extern bool intel_get_load_detect_pipe(struct drm_connector *connector,
 599                                        struct drm_display_mode *mode,
 600                                        struct intel_load_detect_pipe *old);
 601 extern void intel_release_load_detect_pipe(struct drm_connector *connector,
 602                                            struct intel_load_detect_pipe *old);
 603
 604 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 605                                     u16 blue, int regno);
 606 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 607                                     u16 *blue, int regno);
 608 extern void intel_enable_clock_gating(struct drm_device *dev);
 609
 610 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
 611                                       struct drm_i915_gem_object *obj,
 612                                       struct intel_ring_buffer *pipelined);
 613 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
 614
 615 extern int intel_framebuffer_init(struct drm_device *dev,
 616                                   struct intel_framebuffer *ifb,
 617                                   struct drm_mode_fb_cmd2 *mode_cmd,
 618                                   struct drm_i915_gem_object *obj);
 619 extern int intel_fbdev_init(struct drm_device *dev);
 620 extern void intel_fbdev_fini(struct drm_device *dev);
 621
 622 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
 623 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
 624 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
 625
 626 extern void intel_setup_overlay(struct drm_device *dev);
 627 extern void intel_cleanup_overlay(struct drm_device *dev);
 628 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
 629 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
 630                                    struct drm_file *file_priv);
 631 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
 632                                struct drm_file *file_priv);
 633
 634 extern void intel_fb_output_poll_changed(struct drm_device *dev);
 635 extern void intel_fb_restore_mode(struct drm_device *dev);
 636
 637 extern void assert_pipe(struct drm_i915_private *dev_priv, enum i915_pipe pipe,
 638                         bool state);
 639 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
 640 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
 641
 642 extern void intel_init_clock_gating(struct drm_device *dev);
 643 extern void intel_write_eld(struct drm_encoder *encoder,
 644                             struct drm_display_mode *mode);
 645 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
 646 extern void intel_prepare_ddi(struct drm_device *dev);
 647 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
 648 extern void intel_ddi_init(struct drm_device *dev, enum port port);
 649
 650 /* For use by IVB LP watermark workaround in intel_sprite.c */
 651 extern void intel_update_watermarks(struct drm_device *dev);
 652 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
 653                                            uint32_t sprite_width,
 654                                            int pixel_size);
 655 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
 656                          struct drm_display_mode *mode);
 657
 658 extern unsigned long intel_gen4_compute_page_offset(int *x, int *y,
 659                                                     unsigned int tiling_mode,
 660                                                     unsigned int bpp,
 661                                                     unsigned int pitch);
 662
 663 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 664                                      struct drm_file *file_priv);
 665 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
 666                                      struct drm_file *file_priv);
 667
 668 extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
 669
 670 /* Power-related functions, located in intel_pm.c */
 671 extern void intel_init_pm(struct drm_device *dev);
 672 /* FBC */
 673 extern bool intel_fbc_enabled(struct drm_device *dev);
 674 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
 675 extern void intel_update_fbc(struct drm_device *dev);
 676 /* IPS */
 677 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 678 extern void intel_gpu_ips_teardown(void);
 679
 680 extern void intel_init_power_wells(struct drm_device *dev);
 681 extern void intel_enable_gt_powersave(struct drm_device *dev);
 682 extern void intel_disable_gt_powersave(struct drm_device *dev);
 683 extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
 684 extern void ironlake_teardown_rc6(struct drm_device *dev);
 685
 686 extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
 687                                    enum i915_pipe *pipe);
 688 extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv);
 689 extern void intel_ddi_pll_init(struct drm_device *dev);
 690 extern void intel_ddi_enable_pipe_func(struct drm_crtc *crtc);
 691 extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
 692                                               enum transcoder cpu_transcoder);
 693 extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
 694 extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
 695 extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev);
 696 extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock);
 697 extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc);
 698 extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
 699 extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
 700 extern bool
 701 intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
 702 extern void intel_ddi_fdi_disable(struct drm_crtc *crtc);
 703
 704 #endif /* __INTEL_DRV_H__ */