5 * \author Gareth Hughes <gareth@valinux.com>
9 * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
12 * All Rights Reserved.
14 * Permission is hereby granted, free of charge, to any person obtaining a
15 * copy of this software and associated documentation files (the "Software"),
16 * to deal in the Software without restriction, including without limitation
17 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
18 * and/or sell copies of the Software, and to permit persons to whom the
19 * Software is furnished to do so, subject to the following conditions:
21 * The above copyright notice and this permission notice (including the next
22 * paragraph) shall be included in all copies or substantial portions of the
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
26 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
27 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
28 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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31 * DEALINGS IN THE SOFTWARE.
33 * $FreeBSD: head/sys/dev/drm2/ati_pcigart.c 254885 2013-08-25 19:37:15Z dumbbell $
38 #define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
40 static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
41 struct drm_ati_pcigart_info *gart_info)
43 gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
45 if (gart_info->table_handle == NULL)
51 static void drm_ati_free_pcigart_table(struct drm_device *dev,
52 struct drm_ati_pcigart_info *gart_info)
54 drm_pci_free(dev, gart_info->table_handle);
55 gart_info->table_handle = NULL;
58 int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
60 struct drm_sg_mem *entry = dev->sg;
67 /* we need to support large memory configurations */
69 DRM_ERROR("no scatter/gather memory!\n");
73 if (gart_info->bus_addr) {
76 max_pages = (gart_info->table_size / sizeof(u32));
77 pages = (entry->pages <= max_pages)
78 ? entry->pages : max_pages;
80 for (i = 0; i < pages; i++) {
81 if (!entry->busaddr[i])
83 pci_unmap_page(dev->pdev, entry->busaddr[i],
84 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
88 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
89 gart_info->bus_addr = 0;
92 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN &&
93 gart_info->table_handle) {
94 drm_ati_free_pcigart_table(dev, gart_info);
100 int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
102 struct drm_local_map *map = &gart_info->mapping;
103 struct drm_sg_mem *entry = dev->sg;
104 void *address = NULL;
106 u32 *pci_gart = NULL, page_base, gart_idx;
107 dma_addr_t bus_address = 0;
109 int max_ati_pages, max_real_pages;
112 DRM_ERROR("no scatter/gather memory!\n");
116 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
117 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
120 if (pci_set_dma_mask(dev->pdev, gart_info->table_mask)) {
121 DRM_ERROR("fail to set dma mask to 0x%Lx\n",
122 (unsigned long long)gart_info->table_mask);
128 ret = drm_ati_alloc_pcigart_table(dev, gart_info);
130 DRM_ERROR("cannot allocate PCI GART page!\n");
134 pci_gart = gart_info->table_handle->vaddr;
135 address = gart_info->table_handle->vaddr;
136 bus_address = gart_info->table_handle->busaddr;
138 address = gart_info->addr;
139 bus_address = gart_info->bus_addr;
140 DRM_DEBUG("PCI: Gart Table: VRAM %08LX mapped at %08lX\n",
141 (unsigned long long)bus_address,
142 (unsigned long)address);
146 max_ati_pages = (gart_info->table_size / sizeof(u32));
147 max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE);
148 pages = (entry->pages <= max_real_pages)
149 ? entry->pages : max_real_pages;
151 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
152 memset(pci_gart, 0, max_ati_pages * sizeof(u32));
154 memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u32));
158 for (i = 0; i < pages; i++) {
160 /* we need to support large memory configurations */
161 entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
162 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
163 if (pci_dma_mapping_error(dev->pdev, entry->busaddr[i])) {
164 DRM_ERROR("unable to map PCIGART pages!\n");
165 drm_ati_pcigart_cleanup(dev, gart_info);
171 page_base = (u32) entry->busaddr[i];
173 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
176 switch(gart_info->gart_reg_if) {
177 case DRM_ATI_GART_IGP:
178 val = page_base | 0xc;
180 case DRM_ATI_GART_PCIE:
181 val = (page_base >> 8) | 0xc;
184 case DRM_ATI_GART_PCI:
188 if (gart_info->gart_table_location ==
190 pci_gart[gart_idx] = cpu_to_le32(val);
192 DRM_WRITE32(map, gart_idx * sizeof(u32), val);
194 page_base += ATI_PCIGART_PAGE_SIZE;
202 gart_info->addr = address;
203 gart_info->bus_addr = bus_address;