2 * Copyright (c) 2004-2005 HighPoint Technologies, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $FreeBSD: src/sys/dev/hptmv/osbsd.h,v 1.7 2009/04/07 16:38:25 delphij Exp $
32 #include <sys/resource.h>
33 #include <sys/eventhandler.h>
34 #include <sys/devicestat.h>
38 #include <vm/vm_extern.h>
42 #include <bus/cam/cam.h>
43 #include <bus/cam/cam_ccb.h>
44 #include <bus/cam/cam_debug.h>
45 #include <bus/cam/cam_sim.h>
46 #include <bus/cam/cam_xpt_sim.h>
47 #include <bus/cam/cam_periph.h>
49 #include <bus/cam/scsi/scsi_all.h>
50 #include <bus/cam/scsi/scsi_message.h>
54 extern void lock_driver(void);
55 extern void unlock_driver(void);
59 UCHAR status; /* 0 nonbootable; 80h bootable */
65 ULONG start_abs_sector;
69 typedef struct _INQUIRYDATA {
71 UCHAR DeviceTypeQualifier : 3;
72 UCHAR DeviceTypeModifier : 7;
73 UCHAR RemovableMedia : 1;
75 UCHAR ResponseDataFormat;
76 UCHAR AdditionalLength;
79 UCHAR CommandQueue : 1;
81 UCHAR LinkedCommands : 1;
82 UCHAR Synchronous : 1;
85 UCHAR RelativeAddressing : 1;
88 UCHAR ProductRevisionLevel[4];
89 UCHAR VendorSpecific[20];
91 } INQUIRYDATA, *PINQUIRYDATA;
93 #define MV_IAL_HT_SACOALT_DEFAULT 1
94 #define MV_IAL_HT_SAITMTH_DEFAULT 1
96 /****************************************/
97 /* GENERAL Definitions */
98 /****************************************/
100 /* Bits for HD_ERROR */
101 #define NM_ERR 0x02 /* media present */
102 #define ABRT_ERR 0x04 /* Command aborted */
103 #define MCR_ERR 0x08 /* media change request */
104 #define IDNF_ERR 0x10 /* ID field not found */
105 #define MC_ERR 0x20 /* media changed */
106 #define UNC_ERR 0x40 /* Uncorrect data */
107 #define WP_ERR 0x40 /* write protect */
108 #define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
110 #define REQUESTS_ARRAY_SIZE (9 * MV_EDMA_REQUEST_QUEUE_SIZE) /* 9 K bytes */
111 #define RESPONSES_ARRAY_SIZE (12 * MV_EDMA_RESPONSE_QUEUE_SIZE) /* 3 K bytes */
113 #define PRD_ENTRIES_PER_CMD (MAX_SG_DESCRIPTORS+1)
114 #define PRD_ENTRIES_SIZE (MV_EDMA_PRD_ENTRY_SIZE*PRD_ENTRIES_PER_CMD)
115 #define PRD_TABLES_FOR_VBUS (MV_SATA_CHANNELS_NUM*MV_EDMA_QUEUE_LENGTH)
117 typedef enum _SataEvent
119 SATA_EVENT_NO_CHANGE = 0,
120 SATA_EVENT_CHANNEL_CONNECTED,
121 SATA_EVENT_CHANNEL_DISCONNECTED
124 typedef ULONG_PTR dma_addr_t;
126 typedef struct _MV_CHANNEL
128 unsigned int maxUltraDmaModeSupported;
129 unsigned int maxDmaModeSupported;
130 unsigned int maxPioModeSupported;
132 MV_BOOLEAN writeCacheSupported;
133 MV_BOOLEAN writeCacheEnabled;
134 MV_BOOLEAN readAheadSupported;
135 MV_BOOLEAN readAheadEnabled;
140 typedef struct _BUS_DMAMAP
141 { struct _BUS_DMAMAP *next;
142 struct IALAdapter *pAdapter;
143 bus_dmamap_t dma_map;
144 SCAT_GATH psg[MAX_SG_DESCRIPTORS];
145 } BUS_DMAMAP, *PBUS_DMAMAP;
147 typedef struct IALAdapter
149 struct cam_path *path;
151 bus_dma_tag_t io_dma_parent; /* I/O buffer DMA tag */
152 PBUS_DMAMAP pbus_dmamap_list;
153 PBUS_DMAMAP pbus_dmamap;
155 device_t hpt_dev; /* bus device */
156 struct resource *hpt_irq; /* interrupt */
157 struct resource *mem_res;
158 void *hpt_intr; /* interrupt handle */
159 struct IALAdapter *next;
161 MV_SATA_ADAPTER mvSataAdapter;
162 MV_CHANNEL mvChannel[MV_SATA_CHANNELS_NUM];
163 MV_U8 *requestsArrayBaseAddr;
164 MV_U8 *requestsArrayBaseAlignedAddr;
165 dma_addr_t requestsArrayBaseDmaAddr;
166 dma_addr_t requestsArrayBaseDmaAlignedAddr;
167 MV_U8 *responsesArrayBaseAddr;
168 MV_U8 *responsesArrayBaseAlignedAddr;
169 dma_addr_t responsesArrayBaseDmaAddr;
170 dma_addr_t responsesArrayBaseDmaAlignedAddr;
171 SATA_EVENT sataEvents[MV_SATA_CHANNELS_NUM];
173 struct callout event_timer_connect;
174 struct callout event_timer_disconnect;
177 struct _VDevice VDevices[MV_SATA_CHANNELS_NUM];
178 PCommand pCommandBlocks;
180 PUCHAR prdTableAlignedAddr;
183 union ccb *pending_Q;
185 MV_U8 outstandingCommands;
195 extern IAL_ADAPTER_T *gIal_Adapter;
198 typedef void (*HPT_DPC)(IAL_ADAPTER_T *,void*,UCHAR);
200 int hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T *pAdapter, void *arg, UCHAR flags);
201 void hpt_rebuild_data_block(IAL_ADAPTER_T *pAdapter, PVDevice pArray, UCHAR flags);
202 void Check_Idle_Call(IAL_ADAPTER_T *pAdapter);
203 void fRescanAllDevice(_VBUS_ARG0);
204 int hpt_add_disk_to_array(_VBUS_ARG DEVICEID idArray, DEVICEID idDisk);
206 int Kernel_DeviceIoControl(_VBUS_ARG
207 DWORD dwIoControlCode, /* operation control code */
208 PVOID lpInBuffer, /* input data buffer */
209 DWORD nInBufferSize, /* size of input data buffer */
210 PVOID lpOutBuffer, /* output data buffer */
211 DWORD nOutBufferSize, /* size of output data buffer */
212 PDWORD lpBytesReturned /* byte count */
216 #define __str_direct(x) #x
217 #define __str(x) __str_direct(x)
218 #define KMSG_LEADING __str(PROC_DIR_NAME) ": "
219 #define hpt_printk(_x_) do { kprintf(KMSG_LEADING); kprintf _x_ ; } while (0)
223 #define REBUILD_PARITY 2
226 /***********************************************************/
228 static __inline struct cam_periph *
229 hpt_get_periph(int path_id,int target_id)
231 struct cam_periph *periph = NULL;
232 struct cam_path *path;
235 status = xpt_create_path(&path, NULL, path_id, target_id, 0);
236 if (status == CAM_REQ_CMP) {
237 periph = cam_periph_find(path, "da");
245 #define BITS_PER_LONG 32
246 #define VDEV_TO_ID(pVDev) (DEVICEID)(pVDev)
247 #define ID_TO_VDEV(id) (PVDevice)(id)
248 #else /*Only support x86_64(AMD64 and EM64T)*/
249 #define BITS_PER_LONG 64
250 #define VDEV_TO_ID(pVDev) (DEVICEID)(ULONG_PTR)(pVDev)
251 #define ID_TO_VDEV(id) (PVDevice)(((ULONG_PTR)gIal_Adapter & 0xffffffff00000000) | (id))
254 #define INVALID_DEVICEID (-1)
255 #define INVALID_STRIPSIZE (-1)
257 #define shortswap(w) ((WORD)((w)>>8 | ((w) & 0xFF)<<8))
259 #ifndef MinBlockSizeShift
260 #define MinBlockSizeShift 5
261 #define MaxBlockSizeShift 12
265 typedef struct _HPT_IOCTL_TRANSFER_PARAM
268 ULONG nOutBufferSize;
270 }HPT_IOCTL_TRANSFER_PARAM, *PHPT_IOCTL_TRANSFER_PARAM;
272 typedef struct _HPT_SET_STATE_PARAM
276 } HPT_SET_STATE_PARAM, *PHPT_SET_STATE_PARAM;
278 typedef struct _HPT_SET_ARRAY_INFO
281 ALTERABLE_ARRAY_INFO Info;
282 } HPT_SET_ARRAY_INFO, *PHPT_SET_ARRAY_INFO;
284 typedef struct _HPT_SET_DEVICE_INFO
287 ALTERABLE_DEVICE_INFO Info;
288 } HPT_SET_DEVICE_INFO, *PHPT_SET_DEVICE_INFO;
290 typedef struct _HPT_SET_DEVICE_INFO_V2
293 ALTERABLE_DEVICE_INFO_V2 Info;
294 } HPT_SET_DEVICE_INFO_V2, *PHPT_SET_DEVICE_INFO_V2;
296 typedef struct _HPT_ADD_DISK_TO_ARRAY
300 } HPT_ADD_DISK_TO_ARRAY, *PHPT_ADD_DISK_TO_ARRAY;
302 typedef struct _HPT_DEVICE_IO
309 } HPT_DEVICE_IO, *PHPT_DEVICE_IO;
311 int check_VDevice_valid(PVDevice);
312 int hpt_default_ioctl(_VBUS_ARG DWORD, PVOID, DWORD, PVOID, DWORD, PDWORD);
314 #define HPT_NULL_ID 0