sys/dev/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <linux/dmi.h>
  31 #include <linux/i2c.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_crtc.h>
  34 #include <drm/drm_edid.h>
  35 #include "intel_drv.h"
  36 #include <drm/i915_drm.h>
  37 #include "i915_drv.h"
  38
  39 /* Private structure for the integrated LVDS support */
  40 struct intel_lvds_connector {
  41         struct intel_connector base;
  42
  43         struct notifier_block lid_notifier;
  44 };
  45
  46 struct intel_lvds_encoder {
  47         struct intel_encoder base;
  48
  49         bool is_dual_link;
  50         u32 reg;
  51         u32 a3_power;
  52
  53         struct intel_lvds_connector *attached_connector;
  54 };
  55
  56 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  57 {
  58         return container_of(encoder, struct intel_lvds_encoder, base.base);
  59 }
  60
  61 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  62 {
  63         return container_of(connector, struct intel_lvds_connector, base.base);
  64 }
  65
  66 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  67                                     enum i915_pipe *pipe)
  68 {
  69         struct drm_device *dev = encoder->base.dev;
  70         struct drm_i915_private *dev_priv = dev->dev_private;
  71         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  72         enum intel_display_power_domain power_domain;
  73         u32 tmp;
  74
  75         power_domain = intel_display_port_power_domain(encoder);
  76         if (!intel_display_power_enabled(dev_priv, power_domain))
  77                 return false;
  78
  79         tmp = I915_READ(lvds_encoder->reg);
  80
  81         if (!(tmp & LVDS_PORT_EN))
  82                 return false;
  83
  84         if (HAS_PCH_CPT(dev))
  85                 *pipe = PORT_TO_PIPE_CPT(tmp);
  86         else
  87                 *pipe = PORT_TO_PIPE(tmp);
  88
  89         return true;
  90 }
  91
  92 static void intel_lvds_get_config(struct intel_encoder *encoder,
  93                                   struct intel_crtc_config *pipe_config)
  94 {
  95         struct drm_device *dev = encoder->base.dev;
  96         struct drm_i915_private *dev_priv = dev->dev_private;
  97         u32 lvds_reg, tmp, flags = 0;
  98         int dotclock;
  99
 100         if (HAS_PCH_SPLIT(dev))
 101                 lvds_reg = PCH_LVDS;
 102         else
 103                 lvds_reg = LVDS;
 104
 105         tmp = I915_READ(lvds_reg);
 106         if (tmp & LVDS_HSYNC_POLARITY)
 107                 flags |= DRM_MODE_FLAG_NHSYNC;
 108         else
 109                 flags |= DRM_MODE_FLAG_PHSYNC;
 110         if (tmp & LVDS_VSYNC_POLARITY)
 111                 flags |= DRM_MODE_FLAG_NVSYNC;
 112         else
 113                 flags |= DRM_MODE_FLAG_PVSYNC;
 114
 115         pipe_config->adjusted_mode.flags |= flags;
 116
 117         /* gen2/3 store dither state in pfit control, needs to match */
 118         if (INTEL_INFO(dev)->gen < 4) {
 119                 tmp = I915_READ(PFIT_CONTROL);
 120
 121                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
 122         }
 123
 124         dotclock = pipe_config->port_clock;
 125
 126         if (HAS_PCH_SPLIT(dev_priv->dev))
 127                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 128
 129         pipe_config->adjusted_mode.crtc_clock = dotclock;
 130 }
 131
 132 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
 133 {
 134         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 135         struct drm_device *dev = encoder->base.dev;
 136         struct drm_i915_private *dev_priv = dev->dev_private;
 137         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 138         const struct drm_display_mode *adjusted_mode =
 139                 &crtc->config.adjusted_mode;
 140         int pipe = crtc->pipe;
 141         u32 temp;
 142
 143         if (HAS_PCH_SPLIT(dev)) {
 144                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
 145                 assert_shared_dpll_disabled(dev_priv,
 146                                             intel_crtc_to_shared_dpll(crtc));
 147         } else {
 148                 assert_pll_disabled(dev_priv, pipe);
 149         }
 150
 151         temp = I915_READ(lvds_encoder->reg);
 152         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 153
 154         if (HAS_PCH_CPT(dev)) {
 155                 temp &= ~PORT_TRANS_SEL_MASK;
 156                 temp |= PORT_TRANS_SEL_CPT(pipe);
 157         } else {
 158                 if (pipe == 1) {
 159                         temp |= LVDS_PIPEB_SELECT;
 160                 } else {
 161                         temp &= ~LVDS_PIPEB_SELECT;
 162                 }
 163         }
 164
 165         /* set the corresponsding LVDS_BORDER bit */
 166         temp &= ~LVDS_BORDER_ENABLE;
 167         temp |= crtc->config.gmch_pfit.lvds_border_bits;
 168         /* Set the B0-B3 data pairs corresponding to whether we're going to
 169          * set the DPLLs for dual-channel mode or not.
 170          */
 171         if (lvds_encoder->is_dual_link)
 172                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 173         else
 174                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 175
 176         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 177          * appropriately here, but we need to look more thoroughly into how
 178          * panels behave in the two modes. For now, let's just maintain the
 179          * value we got from the BIOS.
 180          */
 181          temp &= ~LVDS_A3_POWER_MASK;
 182          temp |= lvds_encoder->a3_power;
 183
 184         /* Set the dithering flag on LVDS as needed, note that there is no
 185          * special lvds dither control bit on pch-split platforms, dithering is
 186          * only controlled through the PIPECONF reg. */
 187         if (INTEL_INFO(dev)->gen == 4) {
 188                 /* Bspec wording suggests that LVDS port dithering only exists
 189                  * for 18bpp panels. */
 190                 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
 191                         temp |= LVDS_ENABLE_DITHER;
 192                 else
 193                         temp &= ~LVDS_ENABLE_DITHER;
 194         }
 195         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 196         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 197                 temp |= LVDS_HSYNC_POLARITY;
 198         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 199                 temp |= LVDS_VSYNC_POLARITY;
 200
 201         I915_WRITE(lvds_encoder->reg, temp);
 202 }
 203
 204 /**
 205  * Sets the power state for the panel.
 206  */
 207 static void intel_enable_lvds(struct intel_encoder *encoder)
 208 {
 209         struct drm_device *dev = encoder->base.dev;
 210         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 211         struct intel_connector *intel_connector =
 212                 &lvds_encoder->attached_connector->base;
 213         struct drm_i915_private *dev_priv = dev->dev_private;
 214         u32 ctl_reg, stat_reg;
 215
 216         if (HAS_PCH_SPLIT(dev)) {
 217                 ctl_reg = PCH_PP_CONTROL;
 218                 stat_reg = PCH_PP_STATUS;
 219         } else {
 220                 ctl_reg = PP_CONTROL;
 221                 stat_reg = PP_STATUS;
 222         }
 223
 224         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 225
 226         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 227         POSTING_READ(lvds_encoder->reg);
 228         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 229                 DRM_ERROR("timed out waiting for panel to power on\n");
 230
 231         intel_panel_enable_backlight(intel_connector);
 232 }
 233
 234 static void intel_disable_lvds(struct intel_encoder *encoder)
 235 {
 236         struct drm_device *dev = encoder->base.dev;
 237         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 238         struct intel_connector *intel_connector =
 239                 &lvds_encoder->attached_connector->base;
 240         struct drm_i915_private *dev_priv = dev->dev_private;
 241         u32 ctl_reg, stat_reg;
 242
 243         if (HAS_PCH_SPLIT(dev)) {
 244                 ctl_reg = PCH_PP_CONTROL;
 245                 stat_reg = PCH_PP_STATUS;
 246         } else {
 247                 ctl_reg = PP_CONTROL;
 248                 stat_reg = PP_STATUS;
 249         }
 250
 251         intel_panel_disable_backlight(intel_connector);
 252
 253         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 254         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 255                 DRM_ERROR("timed out waiting for panel to power off\n");
 256
 257         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 258         POSTING_READ(lvds_encoder->reg);
 259 }
 260
 261 static enum drm_mode_status
 262 intel_lvds_mode_valid(struct drm_connector *connector,
 263                       struct drm_display_mode *mode)
 264 {
 265         struct intel_connector *intel_connector = to_intel_connector(connector);
 266         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 267
 268         if (mode->hdisplay > fixed_mode->hdisplay)
 269                 return MODE_PANEL;
 270         if (mode->vdisplay > fixed_mode->vdisplay)
 271                 return MODE_PANEL;
 272
 273         return MODE_OK;
 274 }
 275
 276 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 277                                       struct intel_crtc_config *pipe_config)
 278 {
 279         struct drm_device *dev = intel_encoder->base.dev;
 280         struct intel_lvds_encoder *lvds_encoder =
 281                 to_lvds_encoder(&intel_encoder->base);
 282         struct intel_connector *intel_connector =
 283                 &lvds_encoder->attached_connector->base;
 284         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
 285         struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
 286         unsigned int lvds_bpp;
 287
 288         /* Should never happen!! */
 289         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 290                 DRM_ERROR("Can't support LVDS on pipe A\n");
 291                 return false;
 292         }
 293
 294         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
 295                 lvds_bpp = 8*3;
 296         else
 297                 lvds_bpp = 6*3;
 298
 299         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 300                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 301                               pipe_config->pipe_bpp, lvds_bpp);
 302                 pipe_config->pipe_bpp = lvds_bpp;
 303         }
 304
 305         /*
 306          * We have timings from the BIOS for the panel, put them in
 307          * to the adjusted mode.  The CRTC will be set up for this mode,
 308          * with the panel scaling set up to source from the H/VDisplay
 309          * of the original mode.
 310          */
 311         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 312                                adjusted_mode);
 313
 314         if (HAS_PCH_SPLIT(dev)) {
 315                 pipe_config->has_pch_encoder = true;
 316
 317                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 318                                         intel_connector->panel.fitting_mode);
 319         } else {
 320                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 321                                          intel_connector->panel.fitting_mode);
 322
 323         }
 324
 325         /*
 326          * XXX: It would be nice to support lower refresh rates on the
 327          * panels to reduce power consumption, and perhaps match the
 328          * user's requested refresh rate.
 329          */
 330
 331         return true;
 332 }
 333
 334 /**
 335  * Detect the LVDS connection.
 336  *
 337  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 338  * connected and closed means disconnected.  We also send hotplug events as
 339  * needed, using lid status notification from the input layer.
 340  */
 341 static enum drm_connector_status
 342 intel_lvds_detect(struct drm_connector *connector, bool force)
 343 {
 344         struct drm_device *dev = connector->dev;
 345         enum drm_connector_status status;
 346
 347         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 348                       connector->base.id, connector->name);
 349
 350         status = intel_panel_detect(dev);
 351         if (status != connector_status_unknown)
 352                 return status;
 353
 354         return connector_status_connected;
 355 }
 356
 357 /**
 358  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 359  */
 360 static int intel_lvds_get_modes(struct drm_connector *connector)
 361 {
 362         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 363         struct drm_device *dev = connector->dev;
 364         struct drm_display_mode *mode;
 365
 366         /* use cached edid if we have one */
 367         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 368                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 369
 370         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 371         if (mode == NULL)
 372                 return 0;
 373
 374         drm_mode_probed_add(connector, mode);
 375         return 1;
 376 }
 377
 378 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 379 {
 380         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 381         return 1;
 382 }
 383
 384 /* The GPU hangs up on these systems if modeset is performed on LID open */
 385 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 386         {
 387                 .callback = intel_no_modeset_on_lid_dmi_callback,
 388                 .ident = "Toshiba Tecra A11",
 389                 .matches = {
 390                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 391                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 392                 },
 393         },
 394
 395         { }     /* terminating entry */
 396 };
 397
 398 #if 0
 399 /*
 400  * Lid events. Note the use of 'modeset':
 401  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 402  *    and set it to MODESET_DONE on open
 403  *  - we use it as a "only once" bit (ie we ignore
 404  *    duplicate events where it was already properly set)
 405  *  - the suspend/resume paths will set it to
 406  *    MODESET_SUSPENDED and ignore the lid open event,
 407  *    because they restore the mode ("lid open").
 408  */
 409 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 410                             void *unused)
 411 {
 412         struct intel_lvds_connector *lvds_connector =
 413                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 414         struct drm_connector *connector = &lvds_connector->base.base;
 415         struct drm_device *dev = connector->dev;
 416         struct drm_i915_private *dev_priv = dev->dev_private;
 417
 418         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 419                 return NOTIFY_OK;
 420
 421         mutex_lock(&dev_priv->modeset_restore_lock);
 422         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 423                 goto exit;
 424         /*
 425          * check and update the status of LVDS connector after receiving
 426          * the LID nofication event.
 427          */
 428         connector->status = connector->funcs->detect(connector, false);
 429
 430         /* Don't force modeset on machines where it causes a GPU lockup */
 431         if (dmi_check_system(intel_no_modeset_on_lid))
 432                 goto exit;
 433         if (!acpi_lid_open()) {
 434                 /* do modeset on next lid open event */
 435                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 436                 goto exit;
 437         }
 438
 439         if (dev_priv->modeset_restore == MODESET_DONE)
 440                 goto exit;
 441
 442         /*
 443          * Some old platform's BIOS love to wreak havoc while the lid is closed.
 444          * We try to detect this here and undo any damage. The split for PCH
 445          * platforms is rather conservative and a bit arbitrary expect that on
 446          * those platforms VGA disabling requires actual legacy VGA I/O access,
 447          * and as part of the cleanup in the hw state restore we also redisable
 448          * the vga plane.
 449          */
 450         if (!HAS_PCH_SPLIT(dev)) {
 451                 drm_modeset_lock_all(dev);
 452                 intel_modeset_setup_hw_state(dev, true);
 453                 drm_modeset_unlock_all(dev);
 454         }
 455
 456         dev_priv->modeset_restore = MODESET_DONE;
 457
 458 exit:
 459         mutex_unlock(&dev_priv->modeset_restore_lock);
 460         return NOTIFY_OK;
 461 }
 462 #endif
 463
 464 /**
 465  * intel_lvds_destroy - unregister and free LVDS structures
 466  * @connector: connector to free
 467  *
 468  * Unregister the DDC bus for this connector then free the driver private
 469  * structure.
 470  */
 471 static void intel_lvds_destroy(struct drm_connector *connector)
 472 {
 473         struct intel_lvds_connector *lvds_connector =
 474                 to_lvds_connector(connector);
 475
 476 #if 0
 477         if (lvds_connector->lid_notifier.notifier_call)
 478                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 479 #endif
 480
 481         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 482                 kfree(lvds_connector->base.edid);
 483
 484         intel_panel_fini(&lvds_connector->base.panel);
 485
 486         drm_connector_cleanup(connector);
 487         kfree(connector);
 488 }
 489
 490 static int intel_lvds_set_property(struct drm_connector *connector,
 491                                    struct drm_property *property,
 492                                    uint64_t value)
 493 {
 494         struct intel_connector *intel_connector = to_intel_connector(connector);
 495         struct drm_device *dev = connector->dev;
 496
 497         if (property == dev->mode_config.scaling_mode_property) {
 498                 struct drm_crtc *crtc;
 499
 500                 if (value == DRM_MODE_SCALE_NONE) {
 501                         DRM_DEBUG_KMS("no scaling not supported\n");
 502                         return -EINVAL;
 503                 }
 504
 505                 if (intel_connector->panel.fitting_mode == value) {
 506                         /* the LVDS scaling property is not changed */
 507                         return 0;
 508                 }
 509                 intel_connector->panel.fitting_mode = value;
 510
 511                 crtc = intel_attached_encoder(connector)->base.crtc;
 512                 if (crtc && crtc->enabled) {
 513                         /*
 514                          * If the CRTC is enabled, the display will be changed
 515                          * according to the new panel fitting mode.
 516                          */
 517                         intel_crtc_restore_mode(crtc);
 518                 }
 519         }
 520
 521         return 0;
 522 }
 523
 524 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 525         .get_modes = intel_lvds_get_modes,
 526         .mode_valid = intel_lvds_mode_valid,
 527         .best_encoder = intel_best_encoder,
 528 };
 529
 530 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 531         .dpms = intel_connector_dpms,
 532         .detect = intel_lvds_detect,
 533         .fill_modes = drm_helper_probe_single_connector_modes,
 534         .set_property = intel_lvds_set_property,
 535         .destroy = intel_lvds_destroy,
 536 };
 537
 538 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 539         .destroy = intel_encoder_destroy,
 540 };
 541
 542 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 543 {
 544         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 545         return 1;
 546 }
 547
 548 /* These systems claim to have LVDS, but really don't */
 549 static const struct dmi_system_id intel_no_lvds[] = {
 550         {
 551                 .callback = intel_no_lvds_dmi_callback,
 552                 .ident = "Apple Mac Mini (Core series)",
 553                 .matches = {
 554                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 555                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 556                 },
 557         },
 558         {
 559                 .callback = intel_no_lvds_dmi_callback,
 560                 .ident = "Apple Mac Mini (Core 2 series)",
 561                 .matches = {
 562                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 563                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 564                 },
 565         },
 566         {
 567                 .callback = intel_no_lvds_dmi_callback,
 568                 .ident = "MSI IM-945GSE-A",
 569                 .matches = {
 570                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 571                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 572                 },
 573         },
 574         {
 575                 .callback = intel_no_lvds_dmi_callback,
 576                 .ident = "Dell Studio Hybrid",
 577                 .matches = {
 578                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 579                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 580                 },
 581         },
 582         {
 583                 .callback = intel_no_lvds_dmi_callback,
 584                 .ident = "Dell OptiPlex FX170",
 585                 .matches = {
 586                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 587                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 588                 },
 589         },
 590         {
 591                 .callback = intel_no_lvds_dmi_callback,
 592                 .ident = "AOpen Mini PC",
 593                 .matches = {
 594                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 595                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 596                 },
 597         },
 598         {
 599                 .callback = intel_no_lvds_dmi_callback,
 600                 .ident = "AOpen Mini PC MP915",
 601                 .matches = {
 602                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 603                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 604                 },
 605         },
 606         {
 607                 .callback = intel_no_lvds_dmi_callback,
 608                 .ident = "AOpen i915GMm-HFS",
 609                 .matches = {
 610                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 611                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 612                 },
 613         },
 614         {
 615                 .callback = intel_no_lvds_dmi_callback,
 616                 .ident = "AOpen i45GMx-I",
 617                 .matches = {
 618                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 619                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 620                 },
 621         },
 622         {
 623                 .callback = intel_no_lvds_dmi_callback,
 624                 .ident = "Aopen i945GTt-VFA",
 625                 .matches = {
 626                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 627                 },
 628         },
 629         {
 630                 .callback = intel_no_lvds_dmi_callback,
 631                 .ident = "Clientron U800",
 632                 .matches = {
 633                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 634                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 635                 },
 636         },
 637         {
 638                 .callback = intel_no_lvds_dmi_callback,
 639                 .ident = "Clientron E830",
 640                 .matches = {
 641                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 642                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 643                 },
 644         },
 645         {
 646                 .callback = intel_no_lvds_dmi_callback,
 647                 .ident = "Asus EeeBox PC EB1007",
 648                 .matches = {
 649                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 650                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 651                 },
 652         },
 653         {
 654                 .callback = intel_no_lvds_dmi_callback,
 655                 .ident = "Asus AT5NM10T-I",
 656                 .matches = {
 657                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 658                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 659                 },
 660         },
 661         {
 662                 .callback = intel_no_lvds_dmi_callback,
 663                 .ident = "Hewlett-Packard HP t5740",
 664                 .matches = {
 665                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 666                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 667                 },
 668         },
 669         {
 670                 .callback = intel_no_lvds_dmi_callback,
 671                 .ident = "Hewlett-Packard t5745",
 672                 .matches = {
 673                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 674                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 675                 },
 676         },
 677         {
 678                 .callback = intel_no_lvds_dmi_callback,
 679                 .ident = "Hewlett-Packard st5747",
 680                 .matches = {
 681                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 682                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 683                 },
 684         },
 685         {
 686                 .callback = intel_no_lvds_dmi_callback,
 687                 .ident = "MSI Wind Box DC500",
 688                 .matches = {
 689                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 690                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 691                 },
 692         },
 693         {
 694                 .callback = intel_no_lvds_dmi_callback,
 695                 .ident = "Gigabyte GA-D525TUD",
 696                 .matches = {
 697                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 698                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 699                 },
 700         },
 701         {
 702                 .callback = intel_no_lvds_dmi_callback,
 703                 .ident = "Supermicro X7SPA-H",
 704                 .matches = {
 705                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 706                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 707                 },
 708         },
 709         {
 710                 .callback = intel_no_lvds_dmi_callback,
 711                 .ident = "Fujitsu Esprimo Q900",
 712                 .matches = {
 713                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 714                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 715                 },
 716         },
 717         {
 718                 .callback = intel_no_lvds_dmi_callback,
 719                 .ident = "Intel D410PT",
 720                 .matches = {
 721                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 722                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
 723                 },
 724         },
 725         {
 726                 .callback = intel_no_lvds_dmi_callback,
 727                 .ident = "Intel D425KT",
 728                 .matches = {
 729                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 730                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
 731                 },
 732         },
 733         {
 734                 .callback = intel_no_lvds_dmi_callback,
 735                 .ident = "Intel D510MO",
 736                 .matches = {
 737                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 738                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 739                 },
 740         },
 741         {
 742                 .callback = intel_no_lvds_dmi_callback,
 743                 .ident = "Intel D525MW",
 744                 .matches = {
 745                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 746                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 747                 },
 748         },
 749
 750         { }     /* terminating entry */
 751 };
 752
 753 /*
 754  * Enumerate the child dev array parsed from VBT to check whether
 755  * the LVDS is present.
 756  * If it is present, return 1.
 757  * If it is not present, return false.
 758  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 759  */
 760 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 761                                    u8 *i2c_pin)
 762 {
 763         struct drm_i915_private *dev_priv = dev->dev_private;
 764         int i;
 765
 766         if (!dev_priv->vbt.child_dev_num)
 767                 return true;
 768
 769         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
 770                 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
 771                 struct old_child_dev_config *child = &uchild->old;
 772
 773                 /* If the device type is not LFP, continue.
 774                  * We have to check both the new identifiers as well as the
 775                  * old for compatibility with some BIOSes.
 776                  */
 777                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 778                     child->device_type != DEVICE_TYPE_LFP)
 779                         continue;
 780
 781                 if (intel_gmbus_is_port_valid(child->i2c_pin))
 782                         *i2c_pin = child->i2c_pin;
 783
 784                 /* However, we cannot trust the BIOS writers to populate
 785                  * the VBT correctly.  Since LVDS requires additional
 786                  * information from AIM blocks, a non-zero addin offset is
 787                  * a good indicator that the LVDS is actually present.
 788                  */
 789                 if (child->addin_offset)
 790                         return true;
 791
 792                 /* But even then some BIOS writers perform some black magic
 793                  * and instantiate the device without reference to any
 794                  * additional data.  Trust that if the VBT was written into
 795                  * the OpRegion then they have validated the LVDS's existence.
 796                  */
 797                 if (dev_priv->opregion.vbt)
 798                         return true;
 799         }
 800
 801         return false;
 802 }
 803
 804 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 805 {
 806         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 807         return 1;
 808 }
 809
 810 static const struct dmi_system_id intel_dual_link_lvds[] = {
 811         {
 812                 .callback = intel_dual_link_lvds_callback,
 813                 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
 814                 .matches = {
 815                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 816                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 817                 },
 818         },
 819         { }     /* terminating entry */
 820 };
 821
 822 bool intel_is_dual_link_lvds(struct drm_device *dev)
 823 {
 824         struct intel_encoder *encoder;
 825         struct intel_lvds_encoder *lvds_encoder;
 826
 827         list_for_each_entry(encoder, &dev->mode_config.encoder_list,
 828                             base.head) {
 829                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 830                         lvds_encoder = to_lvds_encoder(&encoder->base);
 831
 832                         return lvds_encoder->is_dual_link;
 833                 }
 834         }
 835
 836         return false;
 837 }
 838
 839 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 840 {
 841         struct drm_device *dev = lvds_encoder->base.base.dev;
 842         unsigned int val;
 843         struct drm_i915_private *dev_priv = dev->dev_private;
 844
 845         /* use the module option value if specified */
 846         if (i915.lvds_channel_mode > 0)
 847                 return i915.lvds_channel_mode == 2;
 848
 849         if (dmi_check_system(intel_dual_link_lvds))
 850                 return true;
 851
 852         /* BIOS should set the proper LVDS register value at boot, but
 853          * in reality, it doesn't set the value when the lid is closed;
 854          * we need to check "the value to be set" in VBT when LVDS
 855          * register is uninitialized.
 856          */
 857         val = I915_READ(lvds_encoder->reg);
 858         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 859                 val = dev_priv->vbt.bios_lvds_val;
 860
 861         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 862 }
 863
 864 static bool intel_lvds_supported(struct drm_device *dev)
 865 {
 866         /* With the introduction of the PCH we gained a dedicated
 867          * LVDS presence pin, use it. */
 868         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
 869                 return true;
 870
 871         /* Otherwise LVDS was only attached to mobile products,
 872          * except for the inglorious 830gm */
 873         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
 874                 return true;
 875
 876         return false;
 877 }
 878
 879 /**
 880  * intel_lvds_init - setup LVDS connectors on this device
 881  * @dev: drm device
 882  *
 883  * Create the connector, register the LVDS DDC bus, and try to figure out what
 884  * modes we can display on the LVDS panel (if present).
 885  */
 886 void intel_lvds_init(struct drm_device *dev)
 887 {
 888         struct drm_i915_private *dev_priv = dev->dev_private;
 889         struct intel_lvds_encoder *lvds_encoder;
 890         struct intel_encoder *intel_encoder;
 891         struct intel_lvds_connector *lvds_connector;
 892         struct intel_connector *intel_connector;
 893         struct drm_connector *connector;
 894         struct drm_encoder *encoder;
 895         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 896         struct drm_display_mode *fixed_mode = NULL;
 897         struct drm_display_mode *downclock_mode = NULL;
 898         struct edid *edid;
 899         struct drm_crtc *crtc;
 900         u32 lvds;
 901         int pipe;
 902         u8 pin;
 903
 904         if (!intel_lvds_supported(dev))
 905                 return;
 906
 907         /* Skip init on machines we know falsely report LVDS */
 908         if (dmi_check_system(intel_no_lvds))
 909                 return;
 910
 911         pin = GMBUS_PORT_PANEL;
 912         if (!lvds_is_present_in_vbt(dev, &pin)) {
 913                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 914                 return;
 915         }
 916
 917         if (HAS_PCH_SPLIT(dev)) {
 918                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 919                         return;
 920                 if (dev_priv->vbt.edp_support) {
 921                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 922                         return;
 923                 }
 924         }
 925
 926         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
 927         if (!lvds_encoder)
 928                 return;
 929
 930         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
 931         if (!lvds_connector) {
 932                 kfree(lvds_encoder);
 933                 return;
 934         }
 935
 936         lvds_encoder->attached_connector = lvds_connector;
 937
 938         intel_encoder = &lvds_encoder->base;
 939         encoder = &intel_encoder->base;
 940         intel_connector = &lvds_connector->base;
 941         connector = &intel_connector->base;
 942         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 943                            DRM_MODE_CONNECTOR_LVDS);
 944
 945         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 946                          DRM_MODE_ENCODER_LVDS);
 947
 948         intel_encoder->enable = intel_enable_lvds;
 949         intel_encoder->pre_enable = intel_pre_enable_lvds;
 950         intel_encoder->compute_config = intel_lvds_compute_config;
 951         intel_encoder->disable = intel_disable_lvds;
 952         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
 953         intel_encoder->get_config = intel_lvds_get_config;
 954         intel_connector->get_hw_state = intel_connector_get_hw_state;
 955         intel_connector->unregister = intel_connector_unregister;
 956
 957         intel_connector_attach_encoder(intel_connector, intel_encoder);
 958         intel_encoder->type = INTEL_OUTPUT_LVDS;
 959
 960         intel_encoder->cloneable = 0;
 961         if (HAS_PCH_SPLIT(dev))
 962                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 963         else if (IS_GEN4(dev))
 964                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 965         else
 966                 intel_encoder->crtc_mask = (1 << 1);
 967
 968         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 969         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 970         connector->interlace_allowed = false;
 971         connector->doublescan_allowed = false;
 972
 973         if (HAS_PCH_SPLIT(dev)) {
 974                 lvds_encoder->reg = PCH_LVDS;
 975         } else {
 976                 lvds_encoder->reg = LVDS;
 977         }
 978
 979         /* create the scaling mode property */
 980         drm_mode_create_scaling_mode_property(dev);
 981         drm_object_attach_property(&connector->base,
 982                                       dev->mode_config.scaling_mode_property,
 983                                       DRM_MODE_SCALE_ASPECT);
 984         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
 985         /*
 986          * LVDS discovery:
 987          * 1) check for EDID on DDC
 988          * 2) check for VBT data
 989          * 3) check to see if LVDS is already on
 990          *    if none of the above, no panel
 991          * 4) make sure lid is open
 992          *    if closed, act like it's not there for now
 993          */
 994
 995         /*
 996          * Attempt to get the fixed panel mode from DDC.  Assume that the
 997          * preferred mode is the right one.
 998          */
 999         mutex_lock(&dev->mode_config.mutex);
1000         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1001         if (edid) {
1002                 if (drm_add_edid_modes(connector, edid)) {
1003                         drm_mode_connector_update_edid_property(connector,
1004                                                                 edid);
1005                 } else {
1006                         kfree(edid);
1007                         edid = ERR_PTR(-EINVAL);
1008                 }
1009         } else {
1010                 edid = ERR_PTR(-ENOENT);
1011         }
1012         lvds_connector->base.edid = edid;
1013
1014         if (IS_ERR_OR_NULL(edid)) {
1015                 /* Didn't get an EDID, so
1016                  * Set wide sync ranges so we get all modes
1017                  * handed to valid_mode for checking
1018                  */
1019                 connector->display_info.min_vfreq = 0;
1020                 connector->display_info.max_vfreq = 200;
1021                 connector->display_info.min_hfreq = 0;
1022                 connector->display_info.max_hfreq = 200;
1023         }
1024
1025         list_for_each_entry(scan, &connector->probed_modes, head) {
1026                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1027                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1028                         drm_mode_debug_printmodeline(scan);
1029
1030                         fixed_mode = drm_mode_duplicate(dev, scan);
1031                         if (fixed_mode) {
1032                                 downclock_mode =
1033                                         intel_find_panel_downclock(dev,
1034                                         fixed_mode, connector);
1035                                 if (downclock_mode != NULL &&
1036                                         i915.lvds_downclock) {
1037                                         /* We found the downclock for LVDS. */
1038                                         dev_priv->lvds_downclock_avail = true;
1039                                         dev_priv->lvds_downclock =
1040                                                 downclock_mode->clock;
1041                                         DRM_DEBUG_KMS("LVDS downclock is found"
1042                                         " in EDID. Normal clock %dKhz, "
1043                                         "downclock %dKhz\n",
1044                                         fixed_mode->clock,
1045                                         dev_priv->lvds_downclock);
1046                                 }
1047                                 goto out;
1048                         }
1049                 }
1050         }
1051
1052         /* Failed to get EDID, what about VBT? */
1053         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1054                 DRM_DEBUG_KMS("using mode from VBT: ");
1055                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1056
1057                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1058                 if (fixed_mode) {
1059                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1060                         goto out;
1061                 }
1062         }
1063
1064         /*
1065          * If we didn't get EDID, try checking if the panel is already turned
1066          * on.  If so, assume that whatever is currently programmed is the
1067          * correct mode.
1068          */
1069
1070         /* Ironlake: FIXME if still fail, not try pipe mode now */
1071         if (HAS_PCH_SPLIT(dev))
1072                 goto failed;
1073
1074         lvds = I915_READ(LVDS);
1075         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1076         crtc = intel_get_crtc_for_pipe(dev, pipe);
1077
1078         if (crtc && (lvds & LVDS_PORT_EN)) {
1079                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1080                 if (fixed_mode) {
1081                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1082                         drm_mode_debug_printmodeline(fixed_mode);
1083                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1084                         goto out;
1085                 }
1086         }
1087
1088         /* If we still don't have a mode after all that, give up. */
1089         if (!fixed_mode)
1090                 goto failed;
1091
1092 out:
1093         mutex_unlock(&dev->mode_config.mutex);
1094
1095         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1096         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1097                       lvds_encoder->is_dual_link ? "dual" : "single");
1098
1099         lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) &
1100                                  LVDS_A3_POWER_MASK;
1101
1102         /*
1103          * Unlock registers and just
1104          * leave them unlocked
1105          */
1106         if (HAS_PCH_SPLIT(dev)) {
1107                 I915_WRITE(PCH_PP_CONTROL,
1108                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1109         } else {
1110                 I915_WRITE(PP_CONTROL,
1111                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1112         }
1113 #if 0
1114         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1115         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1116                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1117                 lvds_connector->lid_notifier.notifier_call = NULL;
1118         }
1119         drm_connector_register(connector);
1120 #endif
1121
1122         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1123         intel_panel_setup_backlight(connector);
1124
1125         return;
1126
1127 failed:
1128         mutex_unlock(&dev->mode_config.mutex);
1129
1130         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1131         drm_connector_cleanup(connector);
1132         drm_encoder_cleanup(encoder);
1133         kfree(lvds_encoder);
1134         kfree(lvds_connector);
1135         return;
1136 }