2 * Copyright (c) 2005 Jeffrey M. Hsu. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of The DragonFly Project nor the names of its
16 * contributors may be used to endorse or promote products derived
17 * from this software without specific, prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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32 * $DragonFly: src/sys/sys/spinlock.h,v 1.5 2006/05/26 02:26:26 dillon Exp $
35 #ifndef _SYS_SPINLOCK_H_
36 #define _SYS_SPINLOCK_H_
39 * Note that the spinlock structure is retained whether we are SMP or not,
40 * so structures using embedded spinlocks do not change size for SMP vs UP
43 * DragonFly spinlocks use a chasing counter. A core desiring a spinlock
44 * does a atomic_fetchadd_int() on countb and then waits for counta to
45 * reach its value using MWAIT. Releasing the spinlock involves an
46 * atomic_add_int() on counta. If no MWAIT is available the core can spin
47 * waiting for the value to change which is still represented by a shared+ro
55 #define SPINLOCK_INITIALIZER(head) { 0, 0 }
57 #define SPINLOCK_SHARED 0x80000000
58 #define SPINLOCK_EXCLWAIT 0x00100000 /* high bits counter */