2 * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>. All rights reserved.
4 * Copyright (c) 2001-2008, Intel Corporation
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived from
19 * this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
34 * Copyright (c) 2005 The DragonFly Project. All rights reserved.
36 * This code is derived from software contributed to The DragonFly Project
37 * by Matthew Dillon <dillon@backplane.com>
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
49 * 3. Neither the name of The DragonFly Project nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific, prior written permission.
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
56 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
57 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
58 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
59 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
61 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
62 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
63 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68 * SERIALIZATION API RULES:
70 * - If the driver uses the same serializer for the interrupt as for the
71 * ifnet, most of the serialization will be done automatically for the
74 * - ifmedia entry points will be serialized by the ifmedia code using the
77 * - if_* entry points except for if_input will be serialized by the IF
78 * and protocol layers.
80 * - The device driver must be sure to serialize access from timeout code
81 * installed by the device driver.
83 * - The device driver typically holds the serializer at the time it wishes
86 * - We must call lwkt_serialize_handler_enable() prior to enabling the
87 * hardware interrupt and lwkt_serialize_handler_disable() after disabling
88 * the hardware interrupt in order to avoid handler execution races from
89 * scheduled interrupt threads.
91 * NOTE! Since callers into the device driver hold the ifnet serializer,
92 * the device driver may be holding a serializer at the time it calls
93 * if_input even if it is not serializer-aware.
99 * MSI-X MUST NOT be enabled on 82574:
100 * <<82574 specification update>> errata #15
103 #include "opt_polling.h"
105 #include <sys/param.h>
107 #include <sys/endian.h>
108 #include <sys/interrupt.h>
109 #include <sys/kernel.h>
111 #include <sys/malloc.h>
112 #include <sys/mbuf.h>
113 #include <sys/proc.h>
114 #include <sys/rman.h>
115 #include <sys/serialize.h>
116 #include <sys/socket.h>
117 #include <sys/sockio.h>
118 #include <sys/sysctl.h>
119 #include <sys/systm.h>
122 #include <net/ethernet.h>
124 #include <net/if_arp.h>
125 #include <net/if_dl.h>
126 #include <net/if_media.h>
127 #include <net/ifq_var.h>
128 #include <net/vlan/if_vlan_var.h>
129 #include <net/vlan/if_vlan_ether.h>
131 #include <netinet/in_systm.h>
132 #include <netinet/in.h>
133 #include <netinet/ip.h>
134 #include <netinet/tcp.h>
135 #include <netinet/udp.h>
137 #include <bus/pci/pcivar.h>
138 #include <bus/pci/pcireg.h>
140 #include <dev/netif/ig_hal/e1000_api.h>
141 #include <dev/netif/ig_hal/e1000_82571.h>
142 #include <dev/netif/em/if_em.h>
144 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
145 #define EM_VER " 7.2.4"
147 #define _EM_DEVICE(id, ret) \
148 { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
149 #define EM_EMX_DEVICE(id) _EM_DEVICE(id, -100)
150 #define EM_DEVICE(id) _EM_DEVICE(id, 0)
151 #define EM_DEVICE_NULL { 0, 0, 0, NULL }
153 static const struct em_vendor_info em_vendor_info_array[] = {
155 EM_DEVICE(82540EM_LOM),
157 EM_DEVICE(82540EP_LOM),
158 EM_DEVICE(82540EP_LP),
162 EM_DEVICE(82541ER_LOM),
163 EM_DEVICE(82541EI_MOBILE),
165 EM_DEVICE(82541GI_LF),
166 EM_DEVICE(82541GI_MOBILE),
170 EM_DEVICE(82543GC_FIBER),
171 EM_DEVICE(82543GC_COPPER),
173 EM_DEVICE(82544EI_COPPER),
174 EM_DEVICE(82544EI_FIBER),
175 EM_DEVICE(82544GC_COPPER),
176 EM_DEVICE(82544GC_LOM),
178 EM_DEVICE(82545EM_COPPER),
179 EM_DEVICE(82545EM_FIBER),
180 EM_DEVICE(82545GM_COPPER),
181 EM_DEVICE(82545GM_FIBER),
182 EM_DEVICE(82545GM_SERDES),
184 EM_DEVICE(82546EB_COPPER),
185 EM_DEVICE(82546EB_FIBER),
186 EM_DEVICE(82546EB_QUAD_COPPER),
187 EM_DEVICE(82546GB_COPPER),
188 EM_DEVICE(82546GB_FIBER),
189 EM_DEVICE(82546GB_SERDES),
190 EM_DEVICE(82546GB_PCIE),
191 EM_DEVICE(82546GB_QUAD_COPPER),
192 EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
195 EM_DEVICE(82547EI_MOBILE),
198 EM_EMX_DEVICE(82571EB_COPPER),
199 EM_EMX_DEVICE(82571EB_FIBER),
200 EM_EMX_DEVICE(82571EB_SERDES),
201 EM_EMX_DEVICE(82571EB_SERDES_DUAL),
202 EM_EMX_DEVICE(82571EB_SERDES_QUAD),
203 EM_EMX_DEVICE(82571EB_QUAD_COPPER),
204 EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
205 EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
206 EM_EMX_DEVICE(82571EB_QUAD_FIBER),
207 EM_EMX_DEVICE(82571PT_QUAD_COPPER),
209 EM_EMX_DEVICE(82572EI_COPPER),
210 EM_EMX_DEVICE(82572EI_FIBER),
211 EM_EMX_DEVICE(82572EI_SERDES),
212 EM_EMX_DEVICE(82572EI),
214 EM_EMX_DEVICE(82573E),
215 EM_EMX_DEVICE(82573E_IAMT),
216 EM_EMX_DEVICE(82573L),
220 EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
221 EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
222 EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
223 EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
225 EM_DEVICE(ICH8_IGP_M_AMT),
226 EM_DEVICE(ICH8_IGP_AMT),
227 EM_DEVICE(ICH8_IGP_C),
229 EM_DEVICE(ICH8_IFE_GT),
230 EM_DEVICE(ICH8_IFE_G),
231 EM_DEVICE(ICH8_IGP_M),
232 EM_DEVICE(ICH8_82567V_3),
234 EM_DEVICE(ICH9_IGP_M_AMT),
235 EM_DEVICE(ICH9_IGP_AMT),
236 EM_DEVICE(ICH9_IGP_C),
237 EM_DEVICE(ICH9_IGP_M),
238 EM_DEVICE(ICH9_IGP_M_V),
240 EM_DEVICE(ICH9_IFE_GT),
241 EM_DEVICE(ICH9_IFE_G),
244 EM_EMX_DEVICE(82574L),
245 EM_EMX_DEVICE(82574LA),
247 EM_DEVICE(ICH10_R_BM_LM),
248 EM_DEVICE(ICH10_R_BM_LF),
249 EM_DEVICE(ICH10_R_BM_V),
250 EM_DEVICE(ICH10_D_BM_LM),
251 EM_DEVICE(ICH10_D_BM_LF),
252 EM_DEVICE(ICH10_D_BM_V),
254 EM_DEVICE(PCH_M_HV_LM),
255 EM_DEVICE(PCH_M_HV_LC),
256 EM_DEVICE(PCH_D_HV_DM),
257 EM_DEVICE(PCH_D_HV_DC),
259 EM_DEVICE(PCH2_LV_LM),
260 EM_DEVICE(PCH2_LV_V),
262 /* required last entry */
266 static int em_probe(device_t);
267 static int em_attach(device_t);
268 static int em_detach(device_t);
269 static int em_shutdown(device_t);
270 static int em_suspend(device_t);
271 static int em_resume(device_t);
273 static void em_init(void *);
274 static void em_stop(struct adapter *);
275 static int em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
276 static void em_start(struct ifnet *);
277 #ifdef DEVICE_POLLING
278 static void em_poll(struct ifnet *, enum poll_cmd, int);
280 static void em_watchdog(struct ifnet *);
281 static void em_media_status(struct ifnet *, struct ifmediareq *);
282 static int em_media_change(struct ifnet *);
283 static void em_timer(void *);
285 static void em_intr(void *);
286 static void em_rxeof(struct adapter *, int);
287 static void em_txeof(struct adapter *);
288 static void em_tx_collect(struct adapter *);
289 static void em_tx_purge(struct adapter *);
290 static void em_enable_intr(struct adapter *);
291 static void em_disable_intr(struct adapter *);
293 static int em_dma_malloc(struct adapter *, bus_size_t,
294 struct em_dma_alloc *);
295 static void em_dma_free(struct adapter *, struct em_dma_alloc *);
296 static void em_init_tx_ring(struct adapter *);
297 static int em_init_rx_ring(struct adapter *);
298 static int em_create_tx_ring(struct adapter *);
299 static int em_create_rx_ring(struct adapter *);
300 static void em_destroy_tx_ring(struct adapter *, int);
301 static void em_destroy_rx_ring(struct adapter *, int);
302 static int em_newbuf(struct adapter *, int, int);
303 static int em_encap(struct adapter *, struct mbuf **);
304 static void em_rxcsum(struct adapter *, struct e1000_rx_desc *,
306 static int em_txcsum_pullup(struct adapter *, struct mbuf **);
307 static int em_txcsum(struct adapter *, struct mbuf *,
308 uint32_t *, uint32_t *);
310 static int em_get_hw_info(struct adapter *);
311 static int em_is_valid_eaddr(const uint8_t *);
312 static int em_alloc_pci_res(struct adapter *);
313 static void em_free_pci_res(struct adapter *);
314 static int em_reset(struct adapter *);
315 static void em_setup_ifp(struct adapter *);
316 static void em_init_tx_unit(struct adapter *);
317 static void em_init_rx_unit(struct adapter *);
318 static void em_update_stats(struct adapter *);
319 static void em_set_promisc(struct adapter *);
320 static void em_disable_promisc(struct adapter *);
321 static void em_set_multi(struct adapter *);
322 static void em_update_link_status(struct adapter *);
323 static void em_smartspeed(struct adapter *);
324 static void em_set_itr(struct adapter *, uint32_t);
325 static void em_disable_aspm(struct adapter *);
327 /* Hardware workarounds */
328 static int em_82547_fifo_workaround(struct adapter *, int);
329 static void em_82547_update_fifo_head(struct adapter *, int);
330 static int em_82547_tx_fifo_reset(struct adapter *);
331 static void em_82547_move_tail(void *);
332 static void em_82547_move_tail_serialized(struct adapter *);
333 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
335 static void em_print_debug_info(struct adapter *);
336 static void em_print_nvm_info(struct adapter *);
337 static void em_print_hw_stats(struct adapter *);
339 static int em_sysctl_stats(SYSCTL_HANDLER_ARGS);
340 static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
341 static int em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
342 static int em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
343 static void em_add_sysctl(struct adapter *adapter);
345 /* Management and WOL Support */
346 static void em_get_mgmt(struct adapter *);
347 static void em_rel_mgmt(struct adapter *);
348 static void em_get_hw_control(struct adapter *);
349 static void em_rel_hw_control(struct adapter *);
350 static void em_enable_wol(device_t);
352 static device_method_t em_methods[] = {
353 /* Device interface */
354 DEVMETHOD(device_probe, em_probe),
355 DEVMETHOD(device_attach, em_attach),
356 DEVMETHOD(device_detach, em_detach),
357 DEVMETHOD(device_shutdown, em_shutdown),
358 DEVMETHOD(device_suspend, em_suspend),
359 DEVMETHOD(device_resume, em_resume),
363 static driver_t em_driver = {
366 sizeof(struct adapter),
369 static devclass_t em_devclass;
371 DECLARE_DUMMY_MODULE(if_em);
372 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
373 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
378 static int em_int_throttle_ceil = EM_DEFAULT_ITR;
379 static int em_rxd = EM_DEFAULT_RXD;
380 static int em_txd = EM_DEFAULT_TXD;
381 static int em_smart_pwr_down = 0;
383 /* Controls whether promiscuous also shows bad packets */
384 static int em_debug_sbp = FALSE;
386 static int em_82573_workaround = 1;
387 static int em_msi_enable = 1;
389 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
390 TUNABLE_INT("hw.em.rxd", &em_rxd);
391 TUNABLE_INT("hw.em.txd", &em_txd);
392 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
393 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
394 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
395 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
397 /* Global used in WOL setup with multiport cards */
398 static int em_global_quad_port_a = 0;
400 /* Set this to one to display debug statistics */
401 static int em_display_debug_stats = 0;
403 #if !defined(KTR_IF_EM)
404 #define KTR_IF_EM KTR_ALL
406 KTR_INFO_MASTER(if_em);
407 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
408 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
409 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
410 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
411 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
412 #define logif(name) KTR_LOG(if_em_ ## name)
415 em_probe(device_t dev)
417 const struct em_vendor_info *ent;
420 vid = pci_get_vendor(dev);
421 did = pci_get_device(dev);
423 for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
424 if (vid == ent->vendor_id && did == ent->device_id) {
425 device_set_desc(dev, ent->desc);
426 device_set_async_attach(dev, TRUE);
434 em_attach(device_t dev)
436 struct adapter *adapter = device_get_softc(dev);
437 struct ifnet *ifp = &adapter->arpcom.ac_if;
440 uint16_t eeprom_data, device_id, apme_mask;
442 adapter->dev = adapter->osdep.dev = dev;
444 callout_init_mp(&adapter->timer);
445 callout_init_mp(&adapter->tx_fifo_timer);
447 /* Determine hardware and mac info */
448 error = em_get_hw_info(adapter);
450 device_printf(dev, "Identify hardware failed\n");
454 /* Setup PCI resources */
455 error = em_alloc_pci_res(adapter);
457 device_printf(dev, "Allocation of PCI resources failed\n");
462 * For ICH8 and family we need to map the flash memory,
463 * and this must happen after the MAC is identified.
465 if (adapter->hw.mac.type == e1000_ich8lan ||
466 adapter->hw.mac.type == e1000_ich9lan ||
467 adapter->hw.mac.type == e1000_ich10lan ||
468 adapter->hw.mac.type == e1000_pchlan ||
469 adapter->hw.mac.type == e1000_pch2lan) {
470 adapter->flash_rid = EM_BAR_FLASH;
472 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
473 &adapter->flash_rid, RF_ACTIVE);
474 if (adapter->flash == NULL) {
475 device_printf(dev, "Mapping of Flash failed\n");
479 adapter->osdep.flash_bus_space_tag =
480 rman_get_bustag(adapter->flash);
481 adapter->osdep.flash_bus_space_handle =
482 rman_get_bushandle(adapter->flash);
485 * This is used in the shared code
486 * XXX this goof is actually not used.
488 adapter->hw.flash_address = (uint8_t *)adapter->flash;
491 /* Do Shared Code initialization */
492 if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
493 device_printf(dev, "Setup of Shared code failed\n");
498 e1000_get_bus_info(&adapter->hw);
501 * Validate number of transmit and receive descriptors. It
502 * must not exceed hardware maximum, and must be multiple
503 * of E1000_DBA_ALIGN.
505 if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
506 (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
507 (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
508 em_txd < EM_MIN_TXD) {
509 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
510 EM_DEFAULT_TXD, em_txd);
511 adapter->num_tx_desc = EM_DEFAULT_TXD;
513 adapter->num_tx_desc = em_txd;
515 if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
516 (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
517 (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
518 em_rxd < EM_MIN_RXD) {
519 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
520 EM_DEFAULT_RXD, em_rxd);
521 adapter->num_rx_desc = EM_DEFAULT_RXD;
523 adapter->num_rx_desc = em_rxd;
526 adapter->hw.mac.autoneg = DO_AUTO_NEG;
527 adapter->hw.phy.autoneg_wait_to_complete = FALSE;
528 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
529 adapter->rx_buffer_len = MCLBYTES;
532 * Interrupt throttle rate
534 if (em_int_throttle_ceil == 0) {
535 adapter->int_throttle_ceil = 0;
537 int throttle = em_int_throttle_ceil;
540 throttle = EM_DEFAULT_ITR;
542 /* Recalculate the tunable value to get the exact frequency. */
543 throttle = 1000000000 / 256 / throttle;
545 /* Upper 16bits of ITR is reserved and should be zero */
546 if (throttle & 0xffff0000)
547 throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
549 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
552 e1000_init_script_state_82541(&adapter->hw, TRUE);
553 e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
556 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
557 adapter->hw.phy.mdix = AUTO_ALL_MODES;
558 adapter->hw.phy.disable_polarity_correction = FALSE;
559 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
562 /* Set the frame limits assuming standard ethernet sized frames. */
563 adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
564 adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
566 /* This controls when hardware reports transmit completion status. */
567 adapter->hw.mac.report_tx_early = 1;
570 * Create top level busdma tag
572 error = bus_dma_tag_create(NULL, 1, 0,
573 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
575 BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
576 0, &adapter->parent_dtag);
578 device_printf(dev, "could not create top level DMA tag\n");
583 * Allocate Transmit Descriptor ring
585 tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
587 error = em_dma_malloc(adapter, tsize, &adapter->txdma);
589 device_printf(dev, "Unable to allocate tx_desc memory\n");
592 adapter->tx_desc_base = adapter->txdma.dma_vaddr;
595 * Allocate Receive Descriptor ring
597 rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
599 error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
601 device_printf(dev, "Unable to allocate rx_desc memory\n");
604 adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
606 /* Allocate multicast array memory. */
607 adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
610 /* Indicate SOL/IDER usage */
611 if (e1000_check_reset_block(&adapter->hw)) {
613 "PHY reset is blocked due to SOL/IDER session.\n");
617 * Start from a known state, this is important in reading the
618 * nvm and mac from that.
620 e1000_reset_hw(&adapter->hw);
622 /* Make sure we have a good EEPROM before we read from it */
623 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
625 * Some PCI-E parts fail the first check due to
626 * the link being in sleep state, call it again,
627 * if it fails a second time its a real issue.
629 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
631 "The EEPROM Checksum Is Not Valid\n");
637 /* Copy the permanent MAC address out of the EEPROM */
638 if (e1000_read_mac_addr(&adapter->hw) < 0) {
639 device_printf(dev, "EEPROM read error while reading MAC"
644 if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
645 device_printf(dev, "Invalid MAC address\n");
650 /* Allocate transmit descriptors and buffers */
651 error = em_create_tx_ring(adapter);
653 device_printf(dev, "Could not setup transmit structures\n");
657 /* Allocate receive descriptors and buffers */
658 error = em_create_rx_ring(adapter);
660 device_printf(dev, "Could not setup receive structures\n");
664 /* Manually turn off all interrupts */
665 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
667 /* Determine if we have to control management hardware */
668 adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw);
673 apme_mask = EM_EEPROM_APME;
675 switch (adapter->hw.mac.type) {
682 adapter->has_amt = 1;
686 case e1000_82546_rev_3:
689 case e1000_80003es2lan:
690 if (adapter->hw.bus.func == 1) {
691 e1000_read_nvm(&adapter->hw,
692 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
694 e1000_read_nvm(&adapter->hw,
695 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
704 apme_mask = E1000_WUC_APME;
705 adapter->has_amt = TRUE;
706 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
710 e1000_read_nvm(&adapter->hw,
711 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
714 if (eeprom_data & apme_mask)
715 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
718 * We have the eeprom settings, now apply the special cases
719 * where the eeprom may be wrong or the board won't support
720 * wake on lan on a particular port
722 device_id = pci_get_device(dev);
724 case E1000_DEV_ID_82546GB_PCIE:
728 case E1000_DEV_ID_82546EB_FIBER:
729 case E1000_DEV_ID_82546GB_FIBER:
730 case E1000_DEV_ID_82571EB_FIBER:
732 * Wake events only supported on port A for dual fiber
733 * regardless of eeprom setting
735 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
740 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
741 case E1000_DEV_ID_82571EB_QUAD_COPPER:
742 case E1000_DEV_ID_82571EB_QUAD_FIBER:
743 case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
744 /* if quad port adapter, disable WoL on all but port A */
745 if (em_global_quad_port_a != 0)
747 /* Reset for multiple quad port adapters */
748 if (++em_global_quad_port_a == 4)
749 em_global_quad_port_a = 0;
753 /* XXX disable wol */
756 /* Setup OS specific network interface */
757 em_setup_ifp(adapter);
759 /* Add sysctl tree, must after em_setup_ifp() */
760 em_add_sysctl(adapter);
762 /* Reset the hardware */
763 error = em_reset(adapter);
765 device_printf(dev, "Unable to reset the hardware\n");
769 /* Initialize statistics */
770 em_update_stats(adapter);
772 adapter->hw.mac.get_link_status = 1;
773 em_update_link_status(adapter);
775 /* Do we need workaround for 82544 PCI-X adapter? */
776 if (adapter->hw.bus.type == e1000_bus_type_pcix &&
777 adapter->hw.mac.type == e1000_82544)
778 adapter->pcix_82544 = TRUE;
780 adapter->pcix_82544 = FALSE;
782 if (adapter->pcix_82544) {
784 * 82544 on PCI-X may split one TX segment
785 * into two TX descs, so we double its number
786 * of spare TX desc here.
788 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
790 adapter->spare_tx_desc = EM_TX_SPARE;
794 * Keep following relationship between spare_tx_desc, oact_tx_desc
796 * (spare_tx_desc + EM_TX_RESERVED) <=
797 * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
799 adapter->oact_tx_desc = adapter->num_tx_desc / 8;
800 if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
801 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
802 if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
803 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
805 adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
806 if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
807 adapter->tx_int_nsegs = adapter->oact_tx_desc;
809 /* Non-AMT based hardware can now take control from firmware */
810 if (adapter->has_manage && !adapter->has_amt &&
811 adapter->hw.mac.type >= e1000_82571)
812 em_get_hw_control(adapter);
814 error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
815 em_intr, adapter, &adapter->intr_tag,
818 device_printf(dev, "Failed to register interrupt handler");
819 ether_ifdetach(&adapter->arpcom.ac_if);
823 ifp->if_cpuid = rman_get_cpuid(adapter->intr_res);
824 KKASSERT(ifp->if_cpuid >= 0 && ifp->if_cpuid < ncpus);
832 em_detach(device_t dev)
834 struct adapter *adapter = device_get_softc(dev);
836 if (device_is_attached(dev)) {
837 struct ifnet *ifp = &adapter->arpcom.ac_if;
839 lwkt_serialize_enter(ifp->if_serializer);
843 e1000_phy_hw_reset(&adapter->hw);
845 em_rel_mgmt(adapter);
846 em_rel_hw_control(adapter);
849 E1000_WRITE_REG(&adapter->hw, E1000_WUC,
851 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
855 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
857 lwkt_serialize_exit(ifp->if_serializer);
861 em_rel_hw_control(adapter);
863 bus_generic_detach(dev);
865 em_free_pci_res(adapter);
867 em_destroy_tx_ring(adapter, adapter->num_tx_desc);
868 em_destroy_rx_ring(adapter, adapter->num_rx_desc);
870 /* Free Transmit Descriptor ring */
871 if (adapter->tx_desc_base)
872 em_dma_free(adapter, &adapter->txdma);
874 /* Free Receive Descriptor ring */
875 if (adapter->rx_desc_base)
876 em_dma_free(adapter, &adapter->rxdma);
878 /* Free top level busdma tag */
879 if (adapter->parent_dtag != NULL)
880 bus_dma_tag_destroy(adapter->parent_dtag);
882 /* Free sysctl tree */
883 if (adapter->sysctl_tree != NULL)
884 sysctl_ctx_free(&adapter->sysctl_ctx);
890 em_shutdown(device_t dev)
892 return em_suspend(dev);
896 em_suspend(device_t dev)
898 struct adapter *adapter = device_get_softc(dev);
899 struct ifnet *ifp = &adapter->arpcom.ac_if;
901 lwkt_serialize_enter(ifp->if_serializer);
905 em_rel_mgmt(adapter);
906 em_rel_hw_control(adapter);
909 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
910 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
914 lwkt_serialize_exit(ifp->if_serializer);
916 return bus_generic_suspend(dev);
920 em_resume(device_t dev)
922 struct adapter *adapter = device_get_softc(dev);
923 struct ifnet *ifp = &adapter->arpcom.ac_if;
925 lwkt_serialize_enter(ifp->if_serializer);
928 em_get_mgmt(adapter);
931 lwkt_serialize_exit(ifp->if_serializer);
933 return bus_generic_resume(dev);
937 em_start(struct ifnet *ifp)
939 struct adapter *adapter = ifp->if_softc;
942 ASSERT_SERIALIZED(ifp->if_serializer);
944 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
947 if (!adapter->link_active) {
948 ifq_purge(&ifp->if_snd);
952 while (!ifq_is_empty(&ifp->if_snd)) {
953 /* Now do we at least have a minimal? */
954 if (EM_IS_OACTIVE(adapter)) {
955 em_tx_collect(adapter);
956 if (EM_IS_OACTIVE(adapter)) {
957 ifp->if_flags |= IFF_OACTIVE;
958 adapter->no_tx_desc_avail1++;
964 m_head = ifq_dequeue(&ifp->if_snd, NULL);
968 if (em_encap(adapter, &m_head)) {
970 em_tx_collect(adapter);
974 /* Send a copy of the frame to the BPF listener */
975 ETHER_BPF_MTAP(ifp, m_head);
977 /* Set timeout in case hardware has problems transmitting. */
978 ifp->if_timer = EM_TX_TIMEOUT;
983 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
985 struct adapter *adapter = ifp->if_softc;
986 struct ifreq *ifr = (struct ifreq *)data;
987 uint16_t eeprom_data = 0;
988 int max_frame_size, mask, reinit;
991 ASSERT_SERIALIZED(ifp->if_serializer);
995 switch (adapter->hw.mac.type) {
998 * 82573 only supports jumbo frames
999 * if ASPM is disabled.
1001 e1000_read_nvm(&adapter->hw,
1002 NVM_INIT_3GIO_3, 1, &eeprom_data);
1003 if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1004 max_frame_size = ETHER_MAX_LEN;
1009 /* Limit Jumbo Frame size */
1013 case e1000_ich10lan:
1017 case e1000_80003es2lan:
1018 max_frame_size = 9234;
1022 max_frame_size = 4096;
1025 /* Adapters that do not support jumbo frames */
1028 max_frame_size = ETHER_MAX_LEN;
1032 max_frame_size = MAX_JUMBO_FRAME_SIZE;
1035 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1041 ifp->if_mtu = ifr->ifr_mtu;
1042 adapter->max_frame_size =
1043 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1045 if (ifp->if_flags & IFF_RUNNING)
1050 if (ifp->if_flags & IFF_UP) {
1051 if ((ifp->if_flags & IFF_RUNNING)) {
1052 if ((ifp->if_flags ^ adapter->if_flags) &
1053 (IFF_PROMISC | IFF_ALLMULTI)) {
1054 em_disable_promisc(adapter);
1055 em_set_promisc(adapter);
1060 } else if (ifp->if_flags & IFF_RUNNING) {
1063 adapter->if_flags = ifp->if_flags;
1068 if (ifp->if_flags & IFF_RUNNING) {
1069 em_disable_intr(adapter);
1070 em_set_multi(adapter);
1071 if (adapter->hw.mac.type == e1000_82542 &&
1072 adapter->hw.revision_id == E1000_REVISION_2)
1073 em_init_rx_unit(adapter);
1074 #ifdef DEVICE_POLLING
1075 if (!(ifp->if_flags & IFF_POLLING))
1077 em_enable_intr(adapter);
1082 /* Check SOL/IDER usage */
1083 if (e1000_check_reset_block(&adapter->hw)) {
1084 device_printf(adapter->dev, "Media change is"
1085 " blocked due to SOL/IDER session.\n");
1091 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1096 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1097 if (mask & IFCAP_HWCSUM) {
1098 ifp->if_capenable ^= (mask & IFCAP_HWCSUM);
1101 if (mask & IFCAP_VLAN_HWTAGGING) {
1102 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1105 if (reinit && (ifp->if_flags & IFF_RUNNING))
1110 error = ether_ioctl(ifp, command, data);
1117 em_watchdog(struct ifnet *ifp)
1119 struct adapter *adapter = ifp->if_softc;
1121 ASSERT_SERIALIZED(ifp->if_serializer);
1124 * The timer is set to 5 every time start queues a packet.
1125 * Then txeof keeps resetting it as long as it cleans at
1126 * least one descriptor.
1127 * Finally, anytime all descriptors are clean the timer is
1131 if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1132 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1134 * If we reach here, all TX jobs are completed and
1135 * the TX engine should have been idled for some time.
1136 * We don't need to call if_devstart() here.
1138 ifp->if_flags &= ~IFF_OACTIVE;
1144 * If we are in this routine because of pause frames, then
1145 * don't reset the hardware.
1147 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1148 E1000_STATUS_TXOFF) {
1149 ifp->if_timer = EM_TX_TIMEOUT;
1153 if (e1000_check_for_link(&adapter->hw) == 0)
1154 if_printf(ifp, "watchdog timeout -- resetting\n");
1157 adapter->watchdog_events++;
1161 if (!ifq_is_empty(&ifp->if_snd))
1168 struct adapter *adapter = xsc;
1169 struct ifnet *ifp = &adapter->arpcom.ac_if;
1170 device_t dev = adapter->dev;
1173 ASSERT_SERIALIZED(ifp->if_serializer);
1178 * Packet Buffer Allocation (PBA)
1179 * Writing PBA sets the receive portion of the buffer
1180 * the remainder is used for the transmit buffer.
1182 * Devices before the 82547 had a Packet Buffer of 64K.
1183 * Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1184 * After the 82547 the buffer was reduced to 40K.
1185 * Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1186 * Note: default does not leave enough room for Jumbo Frame >10k.
1188 switch (adapter->hw.mac.type) {
1190 case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1191 if (adapter->max_frame_size > 8192)
1192 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1194 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1195 adapter->tx_fifo_head = 0;
1196 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1197 adapter->tx_fifo_size =
1198 (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1201 /* Total Packet Buffer on these is 48K */
1204 case e1000_80003es2lan:
1205 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1208 case e1000_82573: /* 82573: Total Packet Buffer is 32K */
1209 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1214 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
1222 case e1000_ich10lan:
1223 #define E1000_PBA_10K 0x000A
1224 pba = E1000_PBA_10K;
1229 pba = E1000_PBA_26K;
1233 /* Devices before 82547 had a Packet Buffer of 64K. */
1234 if (adapter->max_frame_size > 8192)
1235 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1237 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1239 E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
1241 /* Get the latest mac address, User can use a LAA */
1242 bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1244 /* Put the address into the Receive Address Array */
1245 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1248 * With the 82571 adapter, RAR[0] may be overwritten
1249 * when the other port is reset, we make a duplicate
1250 * in RAR[14] for that eventuality, this assures
1251 * the interface continues to function.
1253 if (adapter->hw.mac.type == e1000_82571) {
1254 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1255 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1256 E1000_RAR_ENTRIES - 1);
1259 /* Reset the hardware */
1260 if (em_reset(adapter)) {
1261 device_printf(dev, "Unable to reset the hardware\n");
1262 /* XXX em_stop()? */
1265 em_update_link_status(adapter);
1267 /* Setup VLAN support, basic and offload if available */
1268 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1270 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1273 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1274 ctrl |= E1000_CTRL_VME;
1275 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1278 /* Set hardware offload abilities */
1279 if (ifp->if_capenable & IFCAP_TXCSUM)
1280 ifp->if_hwassist = EM_CSUM_FEATURES;
1282 ifp->if_hwassist = 0;
1284 /* Configure for OS presence */
1285 em_get_mgmt(adapter);
1287 /* Prepare transmit descriptors and buffers */
1288 em_init_tx_ring(adapter);
1289 em_init_tx_unit(adapter);
1291 /* Setup Multicast table */
1292 em_set_multi(adapter);
1294 /* Prepare receive descriptors and buffers */
1295 if (em_init_rx_ring(adapter)) {
1296 device_printf(dev, "Could not setup receive structures\n");
1300 em_init_rx_unit(adapter);
1302 /* Don't lose promiscuous settings */
1303 em_set_promisc(adapter);
1305 ifp->if_flags |= IFF_RUNNING;
1306 ifp->if_flags &= ~IFF_OACTIVE;
1308 callout_reset(&adapter->timer, hz, em_timer, adapter);
1309 e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1311 /* MSI/X configuration for 82574 */
1312 if (adapter->hw.mac.type == e1000_82574) {
1315 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1316 tmp |= E1000_CTRL_EXT_PBA_CLR;
1317 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1320 * Set the IVAR - interrupt vector routing.
1321 * Each nibble represents a vector, high bit
1322 * is enable, other 3 bits are the MSIX table
1323 * entry, we map RXQ0 to 0, TXQ0 to 1, and
1324 * Link (other) to 2, hence the magic number.
1326 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1329 #ifdef DEVICE_POLLING
1331 * Only enable interrupts if we are not polling, make sure
1332 * they are off otherwise.
1334 if (ifp->if_flags & IFF_POLLING)
1335 em_disable_intr(adapter);
1337 #endif /* DEVICE_POLLING */
1338 em_enable_intr(adapter);
1340 /* AMT based hardware can now take control from firmware */
1341 if (adapter->has_manage && adapter->has_amt &&
1342 adapter->hw.mac.type >= e1000_82571)
1343 em_get_hw_control(adapter);
1345 /* Don't reset the phy next time init gets called */
1346 adapter->hw.phy.reset_disable = TRUE;
1349 #ifdef DEVICE_POLLING
1352 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1354 struct adapter *adapter = ifp->if_softc;
1357 ASSERT_SERIALIZED(ifp->if_serializer);
1361 em_disable_intr(adapter);
1364 case POLL_DEREGISTER:
1365 em_enable_intr(adapter);
1368 case POLL_AND_CHECK_STATUS:
1369 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1370 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1371 callout_stop(&adapter->timer);
1372 adapter->hw.mac.get_link_status = 1;
1373 em_update_link_status(adapter);
1374 callout_reset(&adapter->timer, hz, em_timer, adapter);
1378 if (ifp->if_flags & IFF_RUNNING) {
1379 em_rxeof(adapter, count);
1382 if (!ifq_is_empty(&ifp->if_snd))
1389 #endif /* DEVICE_POLLING */
1394 struct adapter *adapter = xsc;
1395 struct ifnet *ifp = &adapter->arpcom.ac_if;
1399 ASSERT_SERIALIZED(ifp->if_serializer);
1401 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1403 if ((adapter->hw.mac.type >= e1000_82571 &&
1404 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1411 * XXX: some laptops trigger several spurious interrupts
1412 * on em(4) when in the resume cycle. The ICR register
1413 * reports all-ones value in this case. Processing such
1414 * interrupts would lead to a freeze. I don't know why.
1416 if (reg_icr == 0xffffffff) {
1421 if (ifp->if_flags & IFF_RUNNING) {
1423 (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1424 em_rxeof(adapter, -1);
1425 if (reg_icr & E1000_ICR_TXDW) {
1427 if (!ifq_is_empty(&ifp->if_snd))
1432 /* Link status change */
1433 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1434 callout_stop(&adapter->timer);
1435 adapter->hw.mac.get_link_status = 1;
1436 em_update_link_status(adapter);
1438 /* Deal with TX cruft when link lost */
1439 em_tx_purge(adapter);
1441 callout_reset(&adapter->timer, hz, em_timer, adapter);
1444 if (reg_icr & E1000_ICR_RXO)
1445 adapter->rx_overruns++;
1451 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1453 struct adapter *adapter = ifp->if_softc;
1454 u_char fiber_type = IFM_1000_SX;
1456 ASSERT_SERIALIZED(ifp->if_serializer);
1458 em_update_link_status(adapter);
1460 ifmr->ifm_status = IFM_AVALID;
1461 ifmr->ifm_active = IFM_ETHER;
1463 if (!adapter->link_active)
1466 ifmr->ifm_status |= IFM_ACTIVE;
1468 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1469 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1470 if (adapter->hw.mac.type == e1000_82545)
1471 fiber_type = IFM_1000_LX;
1472 ifmr->ifm_active |= fiber_type | IFM_FDX;
1474 switch (adapter->link_speed) {
1476 ifmr->ifm_active |= IFM_10_T;
1479 ifmr->ifm_active |= IFM_100_TX;
1483 ifmr->ifm_active |= IFM_1000_T;
1486 if (adapter->link_duplex == FULL_DUPLEX)
1487 ifmr->ifm_active |= IFM_FDX;
1489 ifmr->ifm_active |= IFM_HDX;
1494 em_media_change(struct ifnet *ifp)
1496 struct adapter *adapter = ifp->if_softc;
1497 struct ifmedia *ifm = &adapter->media;
1499 ASSERT_SERIALIZED(ifp->if_serializer);
1501 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1504 switch (IFM_SUBTYPE(ifm->ifm_media)) {
1506 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1507 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1513 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1514 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1518 adapter->hw.mac.autoneg = FALSE;
1519 adapter->hw.phy.autoneg_advertised = 0;
1520 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1521 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1523 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1527 adapter->hw.mac.autoneg = FALSE;
1528 adapter->hw.phy.autoneg_advertised = 0;
1529 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1530 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1532 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1536 if_printf(ifp, "Unsupported media type\n");
1541 * As the speed/duplex settings my have changed we need to
1544 adapter->hw.phy.reset_disable = FALSE;
1552 em_encap(struct adapter *adapter, struct mbuf **m_headp)
1554 bus_dma_segment_t segs[EM_MAX_SCATTER];
1556 struct em_buffer *tx_buffer, *tx_buffer_mapped;
1557 struct e1000_tx_desc *ctxd = NULL;
1558 struct mbuf *m_head = *m_headp;
1559 uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1560 int maxsegs, nsegs, i, j, first, last = 0, error;
1562 if (m_head->m_len < EM_TXCSUM_MINHL &&
1563 (m_head->m_flags & EM_CSUM_FEATURES)) {
1565 * Make sure that ethernet header and ip.ip_hl are in
1566 * contiguous memory, since if TXCSUM is enabled, later
1567 * TX context descriptor's setup need to access ip.ip_hl.
1569 error = em_txcsum_pullup(adapter, m_headp);
1571 KKASSERT(*m_headp == NULL);
1577 txd_upper = txd_lower = 0;
1581 * Capture the first descriptor index, this descriptor
1582 * will have the index of the EOP which is the only one
1583 * that now gets a DONE bit writeback.
1585 first = adapter->next_avail_tx_desc;
1586 tx_buffer = &adapter->tx_buffer_area[first];
1587 tx_buffer_mapped = tx_buffer;
1588 map = tx_buffer->map;
1590 maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1591 KASSERT(maxsegs >= adapter->spare_tx_desc,
1592 ("not enough spare TX desc"));
1593 if (adapter->pcix_82544) {
1594 /* Half it; see the comment in em_attach() */
1597 if (maxsegs > EM_MAX_SCATTER)
1598 maxsegs = EM_MAX_SCATTER;
1600 error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1601 segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1603 if (error == ENOBUFS)
1604 adapter->mbuf_alloc_failed++;
1606 adapter->no_tx_dma_setup++;
1612 bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1615 adapter->tx_nsegs += nsegs;
1617 if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1618 /* TX csum offloading will consume one TX desc */
1619 adapter->tx_nsegs += em_txcsum(adapter, m_head,
1620 &txd_upper, &txd_lower);
1622 i = adapter->next_avail_tx_desc;
1624 /* Set up our transmit descriptors */
1625 for (j = 0; j < nsegs; j++) {
1626 /* If adapter is 82544 and on PCIX bus */
1627 if(adapter->pcix_82544) {
1628 DESC_ARRAY desc_array;
1629 uint32_t array_elements, counter;
1632 * Check the Address and Length combination and
1633 * split the data accordingly
1635 array_elements = em_82544_fill_desc(segs[j].ds_addr,
1636 segs[j].ds_len, &desc_array);
1637 for (counter = 0; counter < array_elements; counter++) {
1638 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1640 tx_buffer = &adapter->tx_buffer_area[i];
1641 ctxd = &adapter->tx_desc_base[i];
1643 ctxd->buffer_addr = htole64(
1644 desc_array.descriptor[counter].address);
1645 ctxd->lower.data = htole32(
1646 E1000_TXD_CMD_IFCS | txd_lower |
1647 desc_array.descriptor[counter].length);
1648 ctxd->upper.data = htole32(txd_upper);
1651 if (++i == adapter->num_tx_desc)
1657 tx_buffer = &adapter->tx_buffer_area[i];
1658 ctxd = &adapter->tx_desc_base[i];
1660 ctxd->buffer_addr = htole64(segs[j].ds_addr);
1661 ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1662 txd_lower | segs[j].ds_len);
1663 ctxd->upper.data = htole32(txd_upper);
1666 if (++i == adapter->num_tx_desc)
1671 adapter->next_avail_tx_desc = i;
1672 if (adapter->pcix_82544) {
1673 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1674 adapter->num_tx_desc_avail -= txd_used;
1676 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1677 adapter->num_tx_desc_avail -= nsegs;
1680 /* Handle VLAN tag */
1681 if (m_head->m_flags & M_VLANTAG) {
1682 /* Set the vlan id. */
1683 ctxd->upper.fields.special =
1684 htole16(m_head->m_pkthdr.ether_vlantag);
1686 /* Tell hardware to add tag */
1687 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1690 tx_buffer->m_head = m_head;
1691 tx_buffer_mapped->map = tx_buffer->map;
1692 tx_buffer->map = map;
1694 if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1695 adapter->tx_nsegs = 0;
1698 * Report Status (RS) is turned on
1699 * every tx_int_nsegs descriptors.
1701 cmd = E1000_TXD_CMD_RS;
1704 * Keep track of the descriptor, which will
1705 * be written back by hardware.
1707 adapter->tx_dd[adapter->tx_dd_tail] = last;
1708 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1709 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1713 * Last Descriptor of Packet needs End Of Packet (EOP)
1715 ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1718 * Advance the Transmit Descriptor Tail (TDT), this tells the E1000
1719 * that this frame is available to transmit.
1721 if (adapter->hw.mac.type == e1000_82547 &&
1722 adapter->link_duplex == HALF_DUPLEX) {
1723 em_82547_move_tail_serialized(adapter);
1725 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1726 if (adapter->hw.mac.type == e1000_82547) {
1727 em_82547_update_fifo_head(adapter,
1728 m_head->m_pkthdr.len);
1735 * 82547 workaround to avoid controller hang in half-duplex environment.
1736 * The workaround is to avoid queuing a large packet that would span
1737 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers
1738 * in this case. We do that only when FIFO is quiescent.
1741 em_82547_move_tail_serialized(struct adapter *adapter)
1743 struct e1000_tx_desc *tx_desc;
1744 uint16_t hw_tdt, sw_tdt, length = 0;
1747 ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1749 hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1750 sw_tdt = adapter->next_avail_tx_desc;
1752 while (hw_tdt != sw_tdt) {
1753 tx_desc = &adapter->tx_desc_base[hw_tdt];
1754 length += tx_desc->lower.flags.length;
1755 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1756 if (++hw_tdt == adapter->num_tx_desc)
1760 if (em_82547_fifo_workaround(adapter, length)) {
1761 adapter->tx_fifo_wrk_cnt++;
1762 callout_reset(&adapter->tx_fifo_timer, 1,
1763 em_82547_move_tail, adapter);
1766 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1767 em_82547_update_fifo_head(adapter, length);
1774 em_82547_move_tail(void *xsc)
1776 struct adapter *adapter = xsc;
1777 struct ifnet *ifp = &adapter->arpcom.ac_if;
1779 lwkt_serialize_enter(ifp->if_serializer);
1780 em_82547_move_tail_serialized(adapter);
1781 lwkt_serialize_exit(ifp->if_serializer);
1785 em_82547_fifo_workaround(struct adapter *adapter, int len)
1787 int fifo_space, fifo_pkt_len;
1789 fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1791 if (adapter->link_duplex == HALF_DUPLEX) {
1792 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1794 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1795 if (em_82547_tx_fifo_reset(adapter))
1805 em_82547_update_fifo_head(struct adapter *adapter, int len)
1807 int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1809 /* tx_fifo_head is always 16 byte aligned */
1810 adapter->tx_fifo_head += fifo_pkt_len;
1811 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1812 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1816 em_82547_tx_fifo_reset(struct adapter *adapter)
1820 if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1821 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1822 (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1823 E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1824 (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1825 E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1826 (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1827 /* Disable TX unit */
1828 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1829 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1830 tctl & ~E1000_TCTL_EN);
1832 /* Reset FIFO pointers */
1833 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1834 adapter->tx_head_addr);
1835 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1836 adapter->tx_head_addr);
1837 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1838 adapter->tx_head_addr);
1839 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1840 adapter->tx_head_addr);
1842 /* Re-enable TX unit */
1843 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1844 E1000_WRITE_FLUSH(&adapter->hw);
1846 adapter->tx_fifo_head = 0;
1847 adapter->tx_fifo_reset_cnt++;
1856 em_set_promisc(struct adapter *adapter)
1858 struct ifnet *ifp = &adapter->arpcom.ac_if;
1861 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1863 if (ifp->if_flags & IFF_PROMISC) {
1864 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1865 /* Turn this on if you want to see bad packets */
1867 reg_rctl |= E1000_RCTL_SBP;
1868 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1869 } else if (ifp->if_flags & IFF_ALLMULTI) {
1870 reg_rctl |= E1000_RCTL_MPE;
1871 reg_rctl &= ~E1000_RCTL_UPE;
1872 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1877 em_disable_promisc(struct adapter *adapter)
1881 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1883 reg_rctl &= ~E1000_RCTL_UPE;
1884 reg_rctl &= ~E1000_RCTL_MPE;
1885 reg_rctl &= ~E1000_RCTL_SBP;
1886 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1890 em_set_multi(struct adapter *adapter)
1892 struct ifnet *ifp = &adapter->arpcom.ac_if;
1893 struct ifmultiaddr *ifma;
1894 uint32_t reg_rctl = 0;
1899 bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1901 if (adapter->hw.mac.type == e1000_82542 &&
1902 adapter->hw.revision_id == E1000_REVISION_2) {
1903 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1904 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1905 e1000_pci_clear_mwi(&adapter->hw);
1906 reg_rctl |= E1000_RCTL_RST;
1907 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1911 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1912 if (ifma->ifma_addr->sa_family != AF_LINK)
1915 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1918 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1919 &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1923 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1924 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1925 reg_rctl |= E1000_RCTL_MPE;
1926 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1928 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
1931 if (adapter->hw.mac.type == e1000_82542 &&
1932 adapter->hw.revision_id == E1000_REVISION_2) {
1933 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1934 reg_rctl &= ~E1000_RCTL_RST;
1935 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1937 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1938 e1000_pci_set_mwi(&adapter->hw);
1943 * This routine checks for link status and updates statistics.
1948 struct adapter *adapter = xsc;
1949 struct ifnet *ifp = &adapter->arpcom.ac_if;
1951 lwkt_serialize_enter(ifp->if_serializer);
1953 em_update_link_status(adapter);
1954 em_update_stats(adapter);
1956 /* Reset LAA into RAR[0] on 82571 */
1957 if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
1958 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1960 if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
1961 em_print_hw_stats(adapter);
1963 em_smartspeed(adapter);
1965 callout_reset(&adapter->timer, hz, em_timer, adapter);
1967 lwkt_serialize_exit(ifp->if_serializer);
1971 em_update_link_status(struct adapter *adapter)
1973 struct e1000_hw *hw = &adapter->hw;
1974 struct ifnet *ifp = &adapter->arpcom.ac_if;
1975 device_t dev = adapter->dev;
1976 uint32_t link_check = 0;
1978 /* Get the cached link value or read phy for real */
1979 switch (hw->phy.media_type) {
1980 case e1000_media_type_copper:
1981 if (hw->mac.get_link_status) {
1982 /* Do the work to read phy */
1983 e1000_check_for_link(hw);
1984 link_check = !hw->mac.get_link_status;
1985 if (link_check) /* ESB2 fix */
1986 e1000_cfg_on_link_up(hw);
1992 case e1000_media_type_fiber:
1993 e1000_check_for_link(hw);
1995 E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
1998 case e1000_media_type_internal_serdes:
1999 e1000_check_for_link(hw);
2000 link_check = adapter->hw.mac.serdes_has_link;
2003 case e1000_media_type_unknown:
2008 /* Now check for a transition */
2009 if (link_check && adapter->link_active == 0) {
2010 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2011 &adapter->link_duplex);
2014 * Check if we should enable/disable SPEED_MODE bit on
2017 if (adapter->link_speed != SPEED_1000 &&
2018 (hw->mac.type == e1000_82571 ||
2019 hw->mac.type == e1000_82572)) {
2022 tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2023 tarc0 &= ~SPEED_MODE_BIT;
2024 E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2027 device_printf(dev, "Link is up %d Mbps %s\n",
2028 adapter->link_speed,
2029 ((adapter->link_duplex == FULL_DUPLEX) ?
2030 "Full Duplex" : "Half Duplex"));
2032 adapter->link_active = 1;
2033 adapter->smartspeed = 0;
2034 ifp->if_baudrate = adapter->link_speed * 1000000;
2035 ifp->if_link_state = LINK_STATE_UP;
2036 if_link_state_change(ifp);
2037 } else if (!link_check && adapter->link_active == 1) {
2038 ifp->if_baudrate = adapter->link_speed = 0;
2039 adapter->link_duplex = 0;
2041 device_printf(dev, "Link is Down\n");
2042 adapter->link_active = 0;
2044 /* Link down, disable watchdog */
2047 ifp->if_link_state = LINK_STATE_DOWN;
2048 if_link_state_change(ifp);
2053 em_stop(struct adapter *adapter)
2055 struct ifnet *ifp = &adapter->arpcom.ac_if;
2058 ASSERT_SERIALIZED(ifp->if_serializer);
2060 em_disable_intr(adapter);
2062 callout_stop(&adapter->timer);
2063 callout_stop(&adapter->tx_fifo_timer);
2065 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2068 e1000_reset_hw(&adapter->hw);
2069 if (adapter->hw.mac.type >= e1000_82544)
2070 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2072 for (i = 0; i < adapter->num_tx_desc; i++) {
2073 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2075 if (tx_buffer->m_head != NULL) {
2076 bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2077 m_freem(tx_buffer->m_head);
2078 tx_buffer->m_head = NULL;
2082 for (i = 0; i < adapter->num_rx_desc; i++) {
2083 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2085 if (rx_buffer->m_head != NULL) {
2086 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2087 m_freem(rx_buffer->m_head);
2088 rx_buffer->m_head = NULL;
2092 if (adapter->fmp != NULL)
2093 m_freem(adapter->fmp);
2094 adapter->fmp = NULL;
2095 adapter->lmp = NULL;
2097 adapter->csum_flags = 0;
2098 adapter->csum_ehlen = 0;
2099 adapter->csum_iphlen = 0;
2101 adapter->tx_dd_head = 0;
2102 adapter->tx_dd_tail = 0;
2103 adapter->tx_nsegs = 0;
2107 em_get_hw_info(struct adapter *adapter)
2109 device_t dev = adapter->dev;
2111 /* Save off the information about this board */
2112 adapter->hw.vendor_id = pci_get_vendor(dev);
2113 adapter->hw.device_id = pci_get_device(dev);
2114 adapter->hw.revision_id = pci_get_revid(dev);
2115 adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2116 adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2118 /* Do Shared Code Init and Setup */
2119 if (e1000_set_mac_type(&adapter->hw))
2125 em_alloc_pci_res(struct adapter *adapter)
2127 device_t dev = adapter->dev;
2131 /* Enable bus mastering */
2132 pci_enable_busmaster(dev);
2134 adapter->memory_rid = EM_BAR_MEM;
2135 adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2136 &adapter->memory_rid, RF_ACTIVE);
2137 if (adapter->memory == NULL) {
2138 device_printf(dev, "Unable to allocate bus resource: memory\n");
2141 adapter->osdep.mem_bus_space_tag =
2142 rman_get_bustag(adapter->memory);
2143 adapter->osdep.mem_bus_space_handle =
2144 rman_get_bushandle(adapter->memory);
2146 /* XXX This is quite goofy, it is not actually used */
2147 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2149 /* Only older adapters use IO mapping */
2150 if (adapter->hw.mac.type > e1000_82543 &&
2151 adapter->hw.mac.type < e1000_82571) {
2152 /* Figure our where our IO BAR is ? */
2153 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2154 val = pci_read_config(dev, rid, 4);
2155 if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2156 adapter->io_rid = rid;
2160 /* check for 64bit BAR */
2161 if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2164 if (rid >= PCIR_CARDBUSCIS) {
2165 device_printf(dev, "Unable to locate IO BAR\n");
2168 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2169 &adapter->io_rid, RF_ACTIVE);
2170 if (adapter->ioport == NULL) {
2171 device_printf(dev, "Unable to allocate bus resource: "
2175 adapter->hw.io_base = 0;
2176 adapter->osdep.io_bus_space_tag =
2177 rman_get_bustag(adapter->ioport);
2178 adapter->osdep.io_bus_space_handle =
2179 rman_get_bushandle(adapter->ioport);
2182 adapter->intr_type = pci_alloc_1intr(dev, em_msi_enable,
2183 &adapter->intr_rid, &intr_flags);
2185 adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2186 &adapter->intr_rid, intr_flags);
2187 if (adapter->intr_res == NULL) {
2188 device_printf(dev, "Unable to allocate bus resource: "
2193 adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2194 adapter->hw.back = &adapter->osdep;
2199 em_free_pci_res(struct adapter *adapter)
2201 device_t dev = adapter->dev;
2203 if (adapter->intr_res != NULL) {
2204 bus_release_resource(dev, SYS_RES_IRQ,
2205 adapter->intr_rid, adapter->intr_res);
2208 if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2209 pci_release_msi(dev);
2211 if (adapter->memory != NULL) {
2212 bus_release_resource(dev, SYS_RES_MEMORY,
2213 adapter->memory_rid, adapter->memory);
2216 if (adapter->flash != NULL) {
2217 bus_release_resource(dev, SYS_RES_MEMORY,
2218 adapter->flash_rid, adapter->flash);
2221 if (adapter->ioport != NULL) {
2222 bus_release_resource(dev, SYS_RES_IOPORT,
2223 adapter->io_rid, adapter->ioport);
2228 em_reset(struct adapter *adapter)
2230 device_t dev = adapter->dev;
2231 uint16_t rx_buffer_size;
2233 /* When hardware is reset, fifo_head is also reset */
2234 adapter->tx_fifo_head = 0;
2236 /* Set up smart power down as default off on newer adapters. */
2237 if (!em_smart_pwr_down &&
2238 (adapter->hw.mac.type == e1000_82571 ||
2239 adapter->hw.mac.type == e1000_82572)) {
2240 uint16_t phy_tmp = 0;
2242 /* Speed up time to link by disabling smart power down. */
2243 e1000_read_phy_reg(&adapter->hw,
2244 IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2245 phy_tmp &= ~IGP02E1000_PM_SPD;
2246 e1000_write_phy_reg(&adapter->hw,
2247 IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2251 * These parameters control the automatic generation (Tx) and
2252 * response (Rx) to Ethernet PAUSE frames.
2253 * - High water mark should allow for at least two frames to be
2254 * received after sending an XOFF.
2255 * - Low water mark works best when it is very near the high water mark.
2256 * This allows the receiver to restart by sending XON when it has
2257 * drained a bit. Here we use an arbitary value of 1500 which will
2258 * restart after one full frame is pulled from the buffer. There
2259 * could be several smaller frames in the buffer and if so they will
2260 * not trigger the XON until their total number reduces the buffer
2262 * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2265 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2267 adapter->hw.fc.high_water = rx_buffer_size -
2268 roundup2(adapter->max_frame_size, 1024);
2269 adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2271 if (adapter->hw.mac.type == e1000_80003es2lan)
2272 adapter->hw.fc.pause_time = 0xFFFF;
2274 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2276 adapter->hw.fc.send_xon = TRUE;
2278 adapter->hw.fc.requested_mode = e1000_fc_full;
2280 /* Workaround: no TX flow ctrl for PCH */
2281 if (adapter->hw.mac.type == e1000_pchlan)
2282 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2284 /* Override - settings for PCH2LAN, ya its magic :) */
2285 if (adapter->hw.mac.type == e1000_pch2lan) {
2286 adapter->hw.fc.high_water = 0x5C20;
2287 adapter->hw.fc.low_water = 0x5048;
2288 adapter->hw.fc.pause_time = 0x0650;
2289 adapter->hw.fc.refresh_time = 0x0400;
2291 /* Jumbos need adjusted PBA */
2292 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2293 E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2295 E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2298 /* Issue a global reset */
2299 e1000_reset_hw(&adapter->hw);
2300 if (adapter->hw.mac.type >= e1000_82544)
2301 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2302 em_disable_aspm(adapter);
2304 if (e1000_init_hw(&adapter->hw) < 0) {
2305 device_printf(dev, "Hardware Initialization Failed\n");
2309 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2310 e1000_get_phy_info(&adapter->hw);
2311 e1000_check_for_link(&adapter->hw);
2317 em_setup_ifp(struct adapter *adapter)
2319 struct ifnet *ifp = &adapter->arpcom.ac_if;
2321 if_initname(ifp, device_get_name(adapter->dev),
2322 device_get_unit(adapter->dev));
2323 ifp->if_softc = adapter;
2324 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2325 ifp->if_init = em_init;
2326 ifp->if_ioctl = em_ioctl;
2327 ifp->if_start = em_start;
2328 #ifdef DEVICE_POLLING
2329 ifp->if_poll = em_poll;
2331 ifp->if_watchdog = em_watchdog;
2332 ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2333 ifq_set_ready(&ifp->if_snd);
2335 ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2337 if (adapter->hw.mac.type >= e1000_82543)
2338 ifp->if_capabilities = IFCAP_HWCSUM;
2340 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2341 ifp->if_capenable = ifp->if_capabilities;
2343 if (ifp->if_capenable & IFCAP_TXCSUM)
2344 ifp->if_hwassist = EM_CSUM_FEATURES;
2347 * Tell the upper layer(s) we support long frames.
2349 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2352 * Specify the media types supported by this adapter and register
2353 * callbacks to update media and link information
2355 ifmedia_init(&adapter->media, IFM_IMASK,
2356 em_media_change, em_media_status);
2357 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2358 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2359 u_char fiber_type = IFM_1000_SX; /* default type */
2361 if (adapter->hw.mac.type == e1000_82545)
2362 fiber_type = IFM_1000_LX;
2363 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2365 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2367 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2368 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2370 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2372 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2374 if (adapter->hw.phy.type != e1000_phy_ife) {
2375 ifmedia_add(&adapter->media,
2376 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2377 ifmedia_add(&adapter->media,
2378 IFM_ETHER | IFM_1000_T, 0, NULL);
2381 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2382 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2387 * Workaround for SmartSpeed on 82541 and 82547 controllers
2390 em_smartspeed(struct adapter *adapter)
2394 if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2395 adapter->hw.mac.autoneg == 0 ||
2396 (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2399 if (adapter->smartspeed == 0) {
2401 * If Master/Slave config fault is asserted twice,
2402 * we assume back-to-back
2404 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2405 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2407 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2408 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2409 e1000_read_phy_reg(&adapter->hw,
2410 PHY_1000T_CTRL, &phy_tmp);
2411 if (phy_tmp & CR_1000T_MS_ENABLE) {
2412 phy_tmp &= ~CR_1000T_MS_ENABLE;
2413 e1000_write_phy_reg(&adapter->hw,
2414 PHY_1000T_CTRL, phy_tmp);
2415 adapter->smartspeed++;
2416 if (adapter->hw.mac.autoneg &&
2417 !e1000_phy_setup_autoneg(&adapter->hw) &&
2418 !e1000_read_phy_reg(&adapter->hw,
2419 PHY_CONTROL, &phy_tmp)) {
2420 phy_tmp |= MII_CR_AUTO_NEG_EN |
2421 MII_CR_RESTART_AUTO_NEG;
2422 e1000_write_phy_reg(&adapter->hw,
2423 PHY_CONTROL, phy_tmp);
2428 } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2429 /* If still no link, perhaps using 2/3 pair cable */
2430 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2431 phy_tmp |= CR_1000T_MS_ENABLE;
2432 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2433 if (adapter->hw.mac.autoneg &&
2434 !e1000_phy_setup_autoneg(&adapter->hw) &&
2435 !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2436 phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2437 e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2441 /* Restart process after EM_SMARTSPEED_MAX iterations */
2442 if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2443 adapter->smartspeed = 0;
2447 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2448 struct em_dma_alloc *dma)
2450 dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2451 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2452 &dma->dma_tag, &dma->dma_map,
2454 if (dma->dma_vaddr == NULL)
2461 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2463 if (dma->dma_tag == NULL)
2465 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2466 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2467 bus_dma_tag_destroy(dma->dma_tag);
2471 em_create_tx_ring(struct adapter *adapter)
2473 device_t dev = adapter->dev;
2474 struct em_buffer *tx_buffer;
2477 adapter->tx_buffer_area =
2478 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2479 M_DEVBUF, M_WAITOK | M_ZERO);
2482 * Create DMA tags for tx buffers
2484 error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2485 1, 0, /* alignment, bounds */
2486 BUS_SPACE_MAXADDR, /* lowaddr */
2487 BUS_SPACE_MAXADDR, /* highaddr */
2488 NULL, NULL, /* filter, filterarg */
2489 EM_TSO_SIZE, /* maxsize */
2490 EM_MAX_SCATTER, /* nsegments */
2491 EM_MAX_SEGSIZE, /* maxsegsize */
2492 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2493 BUS_DMA_ONEBPAGE, /* flags */
2496 device_printf(dev, "Unable to allocate TX DMA tag\n");
2497 kfree(adapter->tx_buffer_area, M_DEVBUF);
2498 adapter->tx_buffer_area = NULL;
2503 * Create DMA maps for tx buffers
2505 for (i = 0; i < adapter->num_tx_desc; i++) {
2506 tx_buffer = &adapter->tx_buffer_area[i];
2508 error = bus_dmamap_create(adapter->txtag,
2509 BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2512 device_printf(dev, "Unable to create TX DMA map\n");
2513 em_destroy_tx_ring(adapter, i);
2521 em_init_tx_ring(struct adapter *adapter)
2523 /* Clear the old ring contents */
2524 bzero(adapter->tx_desc_base,
2525 (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2528 adapter->next_avail_tx_desc = 0;
2529 adapter->next_tx_to_clean = 0;
2530 adapter->num_tx_desc_avail = adapter->num_tx_desc;
2534 em_init_tx_unit(struct adapter *adapter)
2536 uint32_t tctl, tarc, tipg = 0;
2539 /* Setup the Base and Length of the Tx Descriptor Ring */
2540 bus_addr = adapter->txdma.dma_paddr;
2541 E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2542 adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2543 E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2544 (uint32_t)(bus_addr >> 32));
2545 E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2546 (uint32_t)bus_addr);
2547 /* Setup the HW Tx Head and Tail descriptor pointers */
2548 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2549 E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2551 /* Set the default values for the Tx Inter Packet Gap timer */
2552 switch (adapter->hw.mac.type) {
2554 tipg = DEFAULT_82542_TIPG_IPGT;
2555 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2556 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2559 case e1000_80003es2lan:
2560 tipg = DEFAULT_82543_TIPG_IPGR1;
2561 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2562 E1000_TIPG_IPGR2_SHIFT;
2566 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2567 adapter->hw.phy.media_type ==
2568 e1000_media_type_internal_serdes)
2569 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2571 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2572 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2573 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2577 E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2579 /* NOTE: 0 is not allowed for TIDV */
2580 E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2581 if(adapter->hw.mac.type >= e1000_82540)
2582 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2584 if (adapter->hw.mac.type == e1000_82571 ||
2585 adapter->hw.mac.type == e1000_82572) {
2586 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2587 tarc |= SPEED_MODE_BIT;
2588 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2589 } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2590 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2592 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2593 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2595 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2598 /* Program the Transmit Control Register */
2599 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2600 tctl &= ~E1000_TCTL_CT;
2601 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2602 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2604 if (adapter->hw.mac.type >= e1000_82571)
2605 tctl |= E1000_TCTL_MULR;
2607 /* This write will effectively turn on the transmit unit. */
2608 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2612 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2614 struct em_buffer *tx_buffer;
2617 if (adapter->tx_buffer_area == NULL)
2620 for (i = 0; i < ndesc; i++) {
2621 tx_buffer = &adapter->tx_buffer_area[i];
2623 KKASSERT(tx_buffer->m_head == NULL);
2624 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2626 bus_dma_tag_destroy(adapter->txtag);
2628 kfree(adapter->tx_buffer_area, M_DEVBUF);
2629 adapter->tx_buffer_area = NULL;
2633 * The offload context needs to be set when we transfer the first
2634 * packet of a particular protocol (TCP/UDP). This routine has been
2635 * enhanced to deal with inserted VLAN headers.
2637 * If the new packet's ether header length, ip header length and
2638 * csum offloading type are same as the previous packet, we should
2639 * avoid allocating a new csum context descriptor; mainly to take
2640 * advantage of the pipeline effect of the TX data read request.
2642 * This function returns number of TX descrptors allocated for
2646 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2647 uint32_t *txd_upper, uint32_t *txd_lower)
2649 struct e1000_context_desc *TXD;
2650 struct em_buffer *tx_buffer;
2651 struct ether_vlan_header *eh;
2653 int curr_txd, ehdrlen, csum_flags;
2654 uint32_t cmd, hdr_len, ip_hlen;
2658 * Determine where frame payload starts.
2659 * Jump over vlan headers if already present,
2660 * helpful for QinQ too.
2662 KASSERT(mp->m_len >= ETHER_HDR_LEN,
2663 ("em_txcsum_pullup is not called (eh)?"));
2664 eh = mtod(mp, struct ether_vlan_header *);
2665 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
2666 KASSERT(mp->m_len >= ETHER_HDR_LEN + EVL_ENCAPLEN,
2667 ("em_txcsum_pullup is not called (evh)?"));
2668 etype = ntohs(eh->evl_proto);
2669 ehdrlen = ETHER_HDR_LEN + EVL_ENCAPLEN;
2671 etype = ntohs(eh->evl_encap_proto);
2672 ehdrlen = ETHER_HDR_LEN;
2676 * We only support TCP/UDP for IPv4 for the moment.
2677 * TODO: Support SCTP too when it hits the tree.
2679 if (etype != ETHERTYPE_IP)
2682 KASSERT(mp->m_len >= ehdrlen + EM_IPVHL_SIZE,
2683 ("em_txcsum_pullup is not called (eh+ip_vhl)?"));
2685 /* NOTE: We could only safely access ip.ip_vhl part */
2686 ip = (struct ip *)(mp->m_data + ehdrlen);
2687 ip_hlen = ip->ip_hl << 2;
2689 csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2691 if (adapter->csum_ehlen == ehdrlen &&
2692 adapter->csum_iphlen == ip_hlen &&
2693 adapter->csum_flags == csum_flags) {
2695 * Same csum offload context as the previous packets;
2698 *txd_upper = adapter->csum_txd_upper;
2699 *txd_lower = adapter->csum_txd_lower;
2704 * Setup a new csum offload context.
2707 curr_txd = adapter->next_avail_tx_desc;
2708 tx_buffer = &adapter->tx_buffer_area[curr_txd];
2709 TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2713 /* Setup of IP header checksum. */
2714 if (csum_flags & CSUM_IP) {
2716 * Start offset for header checksum calculation.
2717 * End offset for header checksum calculation.
2718 * Offset of place to put the checksum.
2720 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2721 TXD->lower_setup.ip_fields.ipcse =
2722 htole16(ehdrlen + ip_hlen - 1);
2723 TXD->lower_setup.ip_fields.ipcso =
2724 ehdrlen + offsetof(struct ip, ip_sum);
2725 cmd |= E1000_TXD_CMD_IP;
2726 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2728 hdr_len = ehdrlen + ip_hlen;
2730 if (csum_flags & CSUM_TCP) {
2732 * Start offset for payload checksum calculation.
2733 * End offset for payload checksum calculation.
2734 * Offset of place to put the checksum.
2736 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2737 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2738 TXD->upper_setup.tcp_fields.tucso =
2739 hdr_len + offsetof(struct tcphdr, th_sum);
2740 cmd |= E1000_TXD_CMD_TCP;
2741 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2742 } else if (csum_flags & CSUM_UDP) {
2744 * Start offset for header checksum calculation.
2745 * End offset for header checksum calculation.
2746 * Offset of place to put the checksum.
2748 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2749 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2750 TXD->upper_setup.tcp_fields.tucso =
2751 hdr_len + offsetof(struct udphdr, uh_sum);
2752 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2755 *txd_lower = E1000_TXD_CMD_DEXT | /* Extended descr type */
2756 E1000_TXD_DTYP_D; /* Data descr */
2758 /* Save the information for this csum offloading context */
2759 adapter->csum_ehlen = ehdrlen;
2760 adapter->csum_iphlen = ip_hlen;
2761 adapter->csum_flags = csum_flags;
2762 adapter->csum_txd_upper = *txd_upper;
2763 adapter->csum_txd_lower = *txd_lower;
2765 TXD->tcp_seg_setup.data = htole32(0);
2766 TXD->cmd_and_length =
2767 htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2769 if (++curr_txd == adapter->num_tx_desc)
2772 KKASSERT(adapter->num_tx_desc_avail > 0);
2773 adapter->num_tx_desc_avail--;
2775 adapter->next_avail_tx_desc = curr_txd;
2780 em_txcsum_pullup(struct adapter *adapter, struct mbuf **m0)
2782 struct mbuf *m = *m0;
2783 struct ether_header *eh;
2786 adapter->tx_csum_try_pullup++;
2788 len = ETHER_HDR_LEN + EM_IPVHL_SIZE;
2790 if (__predict_false(!M_WRITABLE(m))) {
2791 if (__predict_false(m->m_len < ETHER_HDR_LEN)) {
2792 adapter->tx_csum_drop1++;
2797 eh = mtod(m, struct ether_header *);
2799 if (eh->ether_type == htons(ETHERTYPE_VLAN))
2800 len += EVL_ENCAPLEN;
2802 if (m->m_len < len) {
2803 adapter->tx_csum_drop2++;
2811 if (__predict_false(m->m_len < ETHER_HDR_LEN)) {
2812 adapter->tx_csum_pullup1++;
2813 m = m_pullup(m, ETHER_HDR_LEN);
2815 adapter->tx_csum_pullup1_failed++;
2821 eh = mtod(m, struct ether_header *);
2823 if (eh->ether_type == htons(ETHERTYPE_VLAN))
2824 len += EVL_ENCAPLEN;
2826 if (m->m_len < len) {
2827 adapter->tx_csum_pullup2++;
2828 m = m_pullup(m, len);
2830 adapter->tx_csum_pullup2_failed++;
2840 em_txeof(struct adapter *adapter)
2842 struct ifnet *ifp = &adapter->arpcom.ac_if;
2843 struct em_buffer *tx_buffer;
2844 int first, num_avail;
2846 if (adapter->tx_dd_head == adapter->tx_dd_tail)
2849 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2852 num_avail = adapter->num_tx_desc_avail;
2853 first = adapter->next_tx_to_clean;
2855 while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2856 struct e1000_tx_desc *tx_desc;
2857 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2859 tx_desc = &adapter->tx_desc_base[dd_idx];
2860 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2861 EM_INC_TXDD_IDX(adapter->tx_dd_head);
2863 if (++dd_idx == adapter->num_tx_desc)
2866 while (first != dd_idx) {
2871 tx_buffer = &adapter->tx_buffer_area[first];
2872 if (tx_buffer->m_head) {
2874 bus_dmamap_unload(adapter->txtag,
2876 m_freem(tx_buffer->m_head);
2877 tx_buffer->m_head = NULL;
2880 if (++first == adapter->num_tx_desc)
2887 adapter->next_tx_to_clean = first;
2888 adapter->num_tx_desc_avail = num_avail;
2890 if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2891 adapter->tx_dd_head = 0;
2892 adapter->tx_dd_tail = 0;
2895 if (!EM_IS_OACTIVE(adapter)) {
2896 ifp->if_flags &= ~IFF_OACTIVE;
2898 /* All clean, turn off the timer */
2899 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2905 em_tx_collect(struct adapter *adapter)
2907 struct ifnet *ifp = &adapter->arpcom.ac_if;
2908 struct em_buffer *tx_buffer;
2909 int tdh, first, num_avail, dd_idx = -1;
2911 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2914 tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
2915 if (tdh == adapter->next_tx_to_clean)
2918 if (adapter->tx_dd_head != adapter->tx_dd_tail)
2919 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2921 num_avail = adapter->num_tx_desc_avail;
2922 first = adapter->next_tx_to_clean;
2924 while (first != tdh) {
2929 tx_buffer = &adapter->tx_buffer_area[first];
2930 if (tx_buffer->m_head) {
2932 bus_dmamap_unload(adapter->txtag,
2934 m_freem(tx_buffer->m_head);
2935 tx_buffer->m_head = NULL;
2938 if (first == dd_idx) {
2939 EM_INC_TXDD_IDX(adapter->tx_dd_head);
2940 if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2941 adapter->tx_dd_head = 0;
2942 adapter->tx_dd_tail = 0;
2945 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2949 if (++first == adapter->num_tx_desc)
2952 adapter->next_tx_to_clean = first;
2953 adapter->num_tx_desc_avail = num_avail;
2955 if (!EM_IS_OACTIVE(adapter)) {
2956 ifp->if_flags &= ~IFF_OACTIVE;
2958 /* All clean, turn off the timer */
2959 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2965 * When Link is lost sometimes there is work still in the TX ring
2966 * which will result in a watchdog, rather than allow that do an
2967 * attempted cleanup and then reinit here. Note that this has been
2968 * seens mostly with fiber adapters.
2971 em_tx_purge(struct adapter *adapter)
2973 struct ifnet *ifp = &adapter->arpcom.ac_if;
2975 if (!adapter->link_active && ifp->if_timer) {
2976 em_tx_collect(adapter);
2977 if (ifp->if_timer) {
2978 if_printf(ifp, "Link lost, TX pending, reinit\n");
2986 em_newbuf(struct adapter *adapter, int i, int init)
2989 bus_dma_segment_t seg;
2991 struct em_buffer *rx_buffer;
2994 m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2996 adapter->mbuf_cluster_failed++;
2998 if_printf(&adapter->arpcom.ac_if,
2999 "Unable to allocate RX mbuf\n");
3003 m->m_len = m->m_pkthdr.len = MCLBYTES;
3005 if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
3006 m_adj(m, ETHER_ALIGN);
3008 error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3009 adapter->rx_sparemap, m,
3010 &seg, 1, &nseg, BUS_DMA_NOWAIT);
3014 if_printf(&adapter->arpcom.ac_if,
3015 "Unable to load RX mbuf\n");
3020 rx_buffer = &adapter->rx_buffer_area[i];
3021 if (rx_buffer->m_head != NULL)
3022 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3024 map = rx_buffer->map;
3025 rx_buffer->map = adapter->rx_sparemap;
3026 adapter->rx_sparemap = map;
3028 rx_buffer->m_head = m;
3030 adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3035 em_create_rx_ring(struct adapter *adapter)
3037 device_t dev = adapter->dev;
3038 struct em_buffer *rx_buffer;
3041 adapter->rx_buffer_area =
3042 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3043 M_DEVBUF, M_WAITOK | M_ZERO);
3046 * Create DMA tag for rx buffers
3048 error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3049 1, 0, /* alignment, bounds */
3050 BUS_SPACE_MAXADDR, /* lowaddr */
3051 BUS_SPACE_MAXADDR, /* highaddr */
3052 NULL, NULL, /* filter, filterarg */
3053 MCLBYTES, /* maxsize */
3055 MCLBYTES, /* maxsegsize */
3056 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3059 device_printf(dev, "Unable to allocate RX DMA tag\n");
3060 kfree(adapter->rx_buffer_area, M_DEVBUF);
3061 adapter->rx_buffer_area = NULL;
3066 * Create spare DMA map for rx buffers
3068 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3069 &adapter->rx_sparemap);
3071 device_printf(dev, "Unable to create spare RX DMA map\n");
3072 bus_dma_tag_destroy(adapter->rxtag);
3073 kfree(adapter->rx_buffer_area, M_DEVBUF);
3074 adapter->rx_buffer_area = NULL;
3079 * Create DMA maps for rx buffers
3081 for (i = 0; i < adapter->num_rx_desc; i++) {
3082 rx_buffer = &adapter->rx_buffer_area[i];
3084 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3087 device_printf(dev, "Unable to create RX DMA map\n");
3088 em_destroy_rx_ring(adapter, i);
3096 em_init_rx_ring(struct adapter *adapter)
3100 /* Reset descriptor ring */
3101 bzero(adapter->rx_desc_base,
3102 (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3104 /* Allocate new ones. */
3105 for (i = 0; i < adapter->num_rx_desc; i++) {
3106 error = em_newbuf(adapter, i, 1);
3111 /* Setup our descriptor pointers */
3112 adapter->next_rx_desc_to_check = 0;
3118 em_init_rx_unit(struct adapter *adapter)
3120 struct ifnet *ifp = &adapter->arpcom.ac_if;
3125 * Make sure receives are disabled while setting
3126 * up the descriptor ring
3128 rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3129 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3131 if (adapter->hw.mac.type >= e1000_82540) {
3135 * Set the interrupt throttling rate. Value is calculated
3136 * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3138 if (adapter->int_throttle_ceil)
3139 itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3142 em_set_itr(adapter, itr);
3145 /* Disable accelerated ackknowledge */
3146 if (adapter->hw.mac.type == e1000_82574) {
3147 E1000_WRITE_REG(&adapter->hw,
3148 E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3151 /* Receive Checksum Offload for TCP and UDP */
3152 if (ifp->if_capenable & IFCAP_RXCSUM) {
3155 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3156 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3157 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3161 * XXX TEMPORARY WORKAROUND: on some systems with 82573
3162 * long latencies are observed, like Lenovo X60. This
3163 * change eliminates the problem, but since having positive
3164 * values in RDTR is a known source of problems on other
3165 * platforms another solution is being sought.
3167 if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3168 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3169 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3173 * Setup the Base and Length of the Rx Descriptor Ring
3175 bus_addr = adapter->rxdma.dma_paddr;
3176 E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3177 adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3178 E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3179 (uint32_t)(bus_addr >> 32));
3180 E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3181 (uint32_t)bus_addr);
3184 * Setup the HW Rx Head and Tail Descriptor Pointers
3186 E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3187 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3189 /* Set early receive threshold on appropriate hw */
3190 if (((adapter->hw.mac.type == e1000_ich9lan) ||
3191 (adapter->hw.mac.type == e1000_pch2lan) ||
3192 (adapter->hw.mac.type == e1000_ich10lan)) &&
3193 (ifp->if_mtu > ETHERMTU)) {
3196 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3197 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3198 E1000_WRITE_REG(&adapter->hw, E1000_ERT, 0x100 | (1 << 13));
3201 if (adapter->hw.mac.type == e1000_pch2lan) {
3202 if (ifp->if_mtu > ETHERMTU)
3203 e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3205 e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3208 /* Setup the Receive Control Register */
3209 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3210 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3211 E1000_RCTL_RDMTS_HALF |
3212 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3214 /* Make sure VLAN Filters are off */
3215 rctl &= ~E1000_RCTL_VFE;
3217 if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3218 rctl |= E1000_RCTL_SBP;
3220 rctl &= ~E1000_RCTL_SBP;
3222 switch (adapter->rx_buffer_len) {
3225 rctl |= E1000_RCTL_SZ_2048;
3229 rctl |= E1000_RCTL_SZ_4096 |
3230 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3234 rctl |= E1000_RCTL_SZ_8192 |
3235 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3239 rctl |= E1000_RCTL_SZ_16384 |
3240 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3244 if (ifp->if_mtu > ETHERMTU)
3245 rctl |= E1000_RCTL_LPE;
3247 rctl &= ~E1000_RCTL_LPE;
3249 /* Enable Receives */
3250 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3254 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3256 struct em_buffer *rx_buffer;
3259 if (adapter->rx_buffer_area == NULL)
3262 for (i = 0; i < ndesc; i++) {
3263 rx_buffer = &adapter->rx_buffer_area[i];
3265 KKASSERT(rx_buffer->m_head == NULL);
3266 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3268 bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3269 bus_dma_tag_destroy(adapter->rxtag);
3271 kfree(adapter->rx_buffer_area, M_DEVBUF);
3272 adapter->rx_buffer_area = NULL;
3276 em_rxeof(struct adapter *adapter, int count)
3278 struct ifnet *ifp = &adapter->arpcom.ac_if;
3279 uint8_t status, accept_frame = 0, eop = 0;
3280 uint16_t len, desc_len, prev_len_adj;
3281 struct e1000_rx_desc *current_desc;
3285 i = adapter->next_rx_desc_to_check;
3286 current_desc = &adapter->rx_desc_base[i];
3288 if (!(current_desc->status & E1000_RXD_STAT_DD))
3291 while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3292 struct mbuf *m = NULL;
3296 mp = adapter->rx_buffer_area[i].m_head;
3299 * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3300 * needs to access the last received byte in the mbuf.
3302 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3303 BUS_DMASYNC_POSTREAD);
3307 desc_len = le16toh(current_desc->length);
3308 status = current_desc->status;
3309 if (status & E1000_RXD_STAT_EOP) {
3312 if (desc_len < ETHER_CRC_LEN) {
3314 prev_len_adj = ETHER_CRC_LEN - desc_len;
3316 len = desc_len - ETHER_CRC_LEN;
3323 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3325 uint32_t pkt_len = desc_len;
3327 if (adapter->fmp != NULL)
3328 pkt_len += adapter->fmp->m_pkthdr.len;
3330 last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3331 if (TBI_ACCEPT(&adapter->hw, status,
3332 current_desc->errors, pkt_len, last_byte,
3333 adapter->min_frame_size, adapter->max_frame_size)) {
3334 e1000_tbi_adjust_stats_82543(&adapter->hw,
3335 &adapter->stats, pkt_len,
3336 adapter->hw.mac.addr,
3337 adapter->max_frame_size);
3346 if (em_newbuf(adapter, i, 0) != 0) {
3351 /* Assign correct length to the current fragment */
3354 if (adapter->fmp == NULL) {
3355 mp->m_pkthdr.len = len;
3356 adapter->fmp = mp; /* Store the first mbuf */
3360 * Chain mbuf's together
3364 * Adjust length of previous mbuf in chain if
3365 * we received less than 4 bytes in the last
3368 if (prev_len_adj > 0) {
3369 adapter->lmp->m_len -= prev_len_adj;
3370 adapter->fmp->m_pkthdr.len -=
3373 adapter->lmp->m_next = mp;
3374 adapter->lmp = adapter->lmp->m_next;
3375 adapter->fmp->m_pkthdr.len += len;
3379 adapter->fmp->m_pkthdr.rcvif = ifp;
3382 if (ifp->if_capenable & IFCAP_RXCSUM) {
3383 em_rxcsum(adapter, current_desc,
3387 if (status & E1000_RXD_STAT_VP) {
3388 adapter->fmp->m_pkthdr.ether_vlantag =
3389 (le16toh(current_desc->special) &
3390 E1000_RXD_SPC_VLAN_MASK);
3391 adapter->fmp->m_flags |= M_VLANTAG;
3394 adapter->fmp = NULL;
3395 adapter->lmp = NULL;
3401 /* Reuse loaded DMA map and just update mbuf chain */
3402 mp = adapter->rx_buffer_area[i].m_head;
3403 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3404 mp->m_data = mp->m_ext.ext_buf;
3406 if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3407 m_adj(mp, ETHER_ALIGN);
3409 if (adapter->fmp != NULL) {
3410 m_freem(adapter->fmp);
3411 adapter->fmp = NULL;
3412 adapter->lmp = NULL;
3417 /* Zero out the receive descriptors status. */
3418 current_desc->status = 0;
3421 ifp->if_input(ifp, m);
3423 /* Advance our pointers to the next descriptor. */
3424 if (++i == adapter->num_rx_desc)
3426 current_desc = &adapter->rx_desc_base[i];
3428 adapter->next_rx_desc_to_check = i;
3430 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */
3432 i = adapter->num_rx_desc - 1;
3433 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3437 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3440 /* 82543 or newer only */
3441 if (adapter->hw.mac.type < e1000_82543 ||
3442 /* Ignore Checksum bit is set */
3443 (rx_desc->status & E1000_RXD_STAT_IXSM))
3446 if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3447 !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3448 /* IP Checksum Good */
3449 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3452 if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3453 !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3454 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3456 CSUM_FRAG_NOT_CHECKED;
3457 mp->m_pkthdr.csum_data = htons(0xffff);
3462 em_enable_intr(struct adapter *adapter)
3464 uint32_t ims_mask = IMS_ENABLE_MASK;
3466 lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3470 if (adapter->hw.mac.type == e1000_82574) {
3471 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3472 ims_mask |= EM_MSIX_MASK;
3475 E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3479 em_disable_intr(struct adapter *adapter)
3481 uint32_t clear = 0xffffffff;
3484 * The first version of 82542 had an errata where when link was forced
3485 * it would stay up even up even if the cable was disconnected.
3486 * Sequence errors were used to detect the disconnect and then the
3487 * driver would unforce the link. This code in the in the ISR. For
3488 * this to work correctly the Sequence error interrupt had to be
3489 * enabled all the time.
3491 if (adapter->hw.mac.type == e1000_82542 &&
3492 adapter->hw.revision_id == E1000_REVISION_2)
3493 clear &= ~E1000_ICR_RXSEQ;
3494 else if (adapter->hw.mac.type == e1000_82574)
3495 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3497 E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3499 lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3503 * Bit of a misnomer, what this really means is
3504 * to enable OS management of the system... aka
3505 * to disable special hardware management features
3508 em_get_mgmt(struct adapter *adapter)
3510 /* A shared code workaround */
3511 #define E1000_82542_MANC2H E1000_MANC2H
3512 if (adapter->has_manage) {
3513 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3514 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3516 /* disable hardware interception of ARP */
3517 manc &= ~(E1000_MANC_ARP_EN);
3519 /* enable receiving management packets to the host */
3520 if (adapter->hw.mac.type >= e1000_82571) {
3521 manc |= E1000_MANC_EN_MNG2HOST;
3522 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3523 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3524 manc2h |= E1000_MNG2HOST_PORT_623;
3525 manc2h |= E1000_MNG2HOST_PORT_664;
3526 E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3529 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3534 * Give control back to hardware management
3535 * controller if there is one.
3538 em_rel_mgmt(struct adapter *adapter)
3540 if (adapter->has_manage) {
3541 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3543 /* re-enable hardware interception of ARP */
3544 manc |= E1000_MANC_ARP_EN;
3546 if (adapter->hw.mac.type >= e1000_82571)
3547 manc &= ~E1000_MANC_EN_MNG2HOST;
3549 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3554 * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3555 * For ASF and Pass Through versions of f/w this means that
3556 * the driver is loaded. For AMT version (only with 82573)
3557 * of the f/w this means that the network i/f is open.
3560 em_get_hw_control(struct adapter *adapter)
3562 /* Let firmware know the driver has taken over */
3563 if (adapter->hw.mac.type == e1000_82573) {
3566 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3567 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3568 swsm | E1000_SWSM_DRV_LOAD);
3572 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3573 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3574 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3576 adapter->control_hw = 1;
3580 * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3581 * For ASF and Pass Through versions of f/w this means that the
3582 * driver is no longer loaded. For AMT version (only with 82573)
3583 * of the f/w this means that the network i/f is closed.
3586 em_rel_hw_control(struct adapter *adapter)
3588 if (!adapter->control_hw)
3590 adapter->control_hw = 0;
3592 /* Let firmware taken over control of h/w */
3593 if (adapter->hw.mac.type == e1000_82573) {
3596 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3597 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3598 swsm & ~E1000_SWSM_DRV_LOAD);
3602 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3603 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3604 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3609 em_is_valid_eaddr(const uint8_t *addr)
3611 char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3613 if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3620 * Enable PCI Wake On Lan capability
3623 em_enable_wol(device_t dev)
3625 uint16_t cap, status;
3628 /* First find the capabilities pointer*/
3629 cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3631 /* Read the PM Capabilities */
3632 id = pci_read_config(dev, cap, 1);
3633 if (id != PCIY_PMG) /* Something wrong */
3637 * OK, we have the power capabilities,
3638 * so now get the status register
3640 cap += PCIR_POWER_STATUS;
3641 status = pci_read_config(dev, cap, 2);
3642 status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3643 pci_write_config(dev, cap, status, 2);
3648 * 82544 Coexistence issue workaround.
3649 * There are 2 issues.
3650 * 1. Transmit Hang issue.
3651 * To detect this issue, following equation can be used...
3652 * SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3653 * If SUM[3:0] is in between 1 to 4, we will have this issue.
3656 * To detect this issue, following equation can be used...
3657 * SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3658 * If SUM[3:0] is in between 9 to c, we will have this issue.
3661 * Make sure we do not have ending address
3662 * as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3665 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3667 uint32_t safe_terminator;
3670 * Since issue is sensitive to length and address.
3671 * Let us first check the address...
3674 desc_array->descriptor[0].address = address;
3675 desc_array->descriptor[0].length = length;
3676 desc_array->elements = 1;
3677 return (desc_array->elements);
3681 (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3683 /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3684 if (safe_terminator == 0 ||
3685 (safe_terminator > 4 && safe_terminator < 9) ||
3686 (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3687 desc_array->descriptor[0].address = address;
3688 desc_array->descriptor[0].length = length;
3689 desc_array->elements = 1;
3690 return (desc_array->elements);
3693 desc_array->descriptor[0].address = address;
3694 desc_array->descriptor[0].length = length - 4;
3695 desc_array->descriptor[1].address = address + (length - 4);
3696 desc_array->descriptor[1].length = 4;
3697 desc_array->elements = 2;
3698 return (desc_array->elements);
3702 em_update_stats(struct adapter *adapter)
3704 struct ifnet *ifp = &adapter->arpcom.ac_if;
3706 if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3707 (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3708 adapter->stats.symerrs +=
3709 E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3710 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3712 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3713 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3714 adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3715 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3717 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3718 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3719 adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3720 adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3721 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3722 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3723 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3724 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3725 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3726 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3727 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3728 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3729 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3730 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3731 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3732 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3733 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3734 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3735 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3736 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3738 /* For the 64-bit byte counters the low dword must be read first. */
3739 /* Both registers clear on the read of the high dword */
3741 adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3742 adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3744 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3745 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3746 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3747 adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3748 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3750 adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3751 adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3753 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3754 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3755 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3756 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3757 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3758 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3759 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3760 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3761 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3762 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3764 if (adapter->hw.mac.type >= e1000_82543) {
3765 adapter->stats.algnerrc +=
3766 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3767 adapter->stats.rxerrc +=
3768 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3769 adapter->stats.tncrs +=
3770 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3771 adapter->stats.cexterr +=
3772 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3773 adapter->stats.tsctc +=
3774 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3775 adapter->stats.tsctfc +=
3776 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3779 ifp->if_collisions = adapter->stats.colc;
3783 adapter->dropped_pkts + adapter->stats.rxerrc +
3784 adapter->stats.crcerrs + adapter->stats.algnerrc +
3785 adapter->stats.ruc + adapter->stats.roc +
3786 adapter->stats.mpc + adapter->stats.cexterr;
3790 adapter->stats.ecol + adapter->stats.latecol +
3791 adapter->watchdog_events;
3795 em_print_debug_info(struct adapter *adapter)
3797 device_t dev = adapter->dev;
3798 uint8_t *hw_addr = adapter->hw.hw_addr;
3800 device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3801 device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3802 E1000_READ_REG(&adapter->hw, E1000_CTRL),
3803 E1000_READ_REG(&adapter->hw, E1000_RCTL));
3804 device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3805 ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3806 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3807 device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3808 adapter->hw.fc.high_water,
3809 adapter->hw.fc.low_water);
3810 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3811 E1000_READ_REG(&adapter->hw, E1000_TIDV),
3812 E1000_READ_REG(&adapter->hw, E1000_TADV));
3813 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3814 E1000_READ_REG(&adapter->hw, E1000_RDTR),
3815 E1000_READ_REG(&adapter->hw, E1000_RADV));
3816 device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3817 (long long)adapter->tx_fifo_wrk_cnt,
3818 (long long)adapter->tx_fifo_reset_cnt);
3819 device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3820 E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3821 E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3822 device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3823 E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3824 E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3825 device_printf(dev, "Num Tx descriptors avail = %d\n",
3826 adapter->num_tx_desc_avail);
3827 device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3828 adapter->no_tx_desc_avail1);
3829 device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3830 adapter->no_tx_desc_avail2);
3831 device_printf(dev, "Std mbuf failed = %ld\n",
3832 adapter->mbuf_alloc_failed);
3833 device_printf(dev, "Std mbuf cluster failed = %ld\n",
3834 adapter->mbuf_cluster_failed);
3835 device_printf(dev, "Driver dropped packets = %ld\n",
3836 adapter->dropped_pkts);
3837 device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3838 adapter->no_tx_dma_setup);
3840 device_printf(dev, "TXCSUM try pullup = %lu\n",
3841 adapter->tx_csum_try_pullup);
3842 device_printf(dev, "TXCSUM m_pullup(eh) called = %lu\n",
3843 adapter->tx_csum_pullup1);
3844 device_printf(dev, "TXCSUM m_pullup(eh) failed = %lu\n",
3845 adapter->tx_csum_pullup1_failed);
3846 device_printf(dev, "TXCSUM m_pullup(eh+ip) called = %lu\n",
3847 adapter->tx_csum_pullup2);
3848 device_printf(dev, "TXCSUM m_pullup(eh+ip) failed = %lu\n",
3849 adapter->tx_csum_pullup2_failed);
3850 device_printf(dev, "TXCSUM non-writable(eh) droped = %lu\n",
3851 adapter->tx_csum_drop1);
3852 device_printf(dev, "TXCSUM non-writable(eh+ip) droped = %lu\n",
3853 adapter->tx_csum_drop2);
3857 em_print_hw_stats(struct adapter *adapter)
3859 device_t dev = adapter->dev;
3861 device_printf(dev, "Excessive collisions = %lld\n",
3862 (long long)adapter->stats.ecol);
3863 #if (DEBUG_HW > 0) /* Dont output these errors normally */
3864 device_printf(dev, "Symbol errors = %lld\n",
3865 (long long)adapter->stats.symerrs);
3867 device_printf(dev, "Sequence errors = %lld\n",
3868 (long long)adapter->stats.sec);
3869 device_printf(dev, "Defer count = %lld\n",
3870 (long long)adapter->stats.dc);
3871 device_printf(dev, "Missed Packets = %lld\n",
3872 (long long)adapter->stats.mpc);
3873 device_printf(dev, "Receive No Buffers = %lld\n",
3874 (long long)adapter->stats.rnbc);
3875 /* RLEC is inaccurate on some hardware, calculate our own. */
3876 device_printf(dev, "Receive Length Errors = %lld\n",
3877 ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3878 device_printf(dev, "Receive errors = %lld\n",
3879 (long long)adapter->stats.rxerrc);
3880 device_printf(dev, "Crc errors = %lld\n",
3881 (long long)adapter->stats.crcerrs);
3882 device_printf(dev, "Alignment errors = %lld\n",
3883 (long long)adapter->stats.algnerrc);
3884 device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3885 (long long)adapter->stats.cexterr);
3886 device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3887 device_printf(dev, "watchdog timeouts = %ld\n",
3888 adapter->watchdog_events);
3889 device_printf(dev, "XON Rcvd = %lld\n",
3890 (long long)adapter->stats.xonrxc);
3891 device_printf(dev, "XON Xmtd = %lld\n",
3892 (long long)adapter->stats.xontxc);
3893 device_printf(dev, "XOFF Rcvd = %lld\n",
3894 (long long)adapter->stats.xoffrxc);
3895 device_printf(dev, "XOFF Xmtd = %lld\n",
3896 (long long)adapter->stats.xofftxc);
3897 device_printf(dev, "Good Packets Rcvd = %lld\n",
3898 (long long)adapter->stats.gprc);
3899 device_printf(dev, "Good Packets Xmtd = %lld\n",
3900 (long long)adapter->stats.gptc);
3904 em_print_nvm_info(struct adapter *adapter)
3906 uint16_t eeprom_data;
3909 /* Its a bit crude, but it gets the job done */
3910 kprintf("\nInterface EEPROM Dump:\n");
3911 kprintf("Offset\n0x0000 ");
3912 for (i = 0, j = 0; i < 32; i++, j++) {
3913 if (j == 8) { /* Make the offset block */
3915 kprintf("\n0x00%x0 ",row);
3917 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3918 kprintf("%04x ", eeprom_data);
3924 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3926 struct adapter *adapter;
3931 error = sysctl_handle_int(oidp, &result, 0, req);
3932 if (error || !req->newptr)
3935 adapter = (struct adapter *)arg1;
3936 ifp = &adapter->arpcom.ac_if;
3938 lwkt_serialize_enter(ifp->if_serializer);
3941 em_print_debug_info(adapter);
3944 * This value will cause a hex dump of the
3945 * first 32 16-bit words of the EEPROM to
3949 em_print_nvm_info(adapter);
3951 lwkt_serialize_exit(ifp->if_serializer);
3957 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3962 error = sysctl_handle_int(oidp, &result, 0, req);
3963 if (error || !req->newptr)
3967 struct adapter *adapter = (struct adapter *)arg1;
3968 struct ifnet *ifp = &adapter->arpcom.ac_if;
3970 lwkt_serialize_enter(ifp->if_serializer);
3971 em_print_hw_stats(adapter);
3972 lwkt_serialize_exit(ifp->if_serializer);
3978 em_add_sysctl(struct adapter *adapter)
3980 sysctl_ctx_init(&adapter->sysctl_ctx);
3981 adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
3982 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
3983 device_get_nameunit(adapter->dev),
3985 if (adapter->sysctl_tree == NULL) {
3986 device_printf(adapter->dev, "can't add sysctl node\n");
3988 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3989 SYSCTL_CHILDREN(adapter->sysctl_tree),
3990 OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3991 em_sysctl_debug_info, "I", "Debug Information");
3993 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3994 SYSCTL_CHILDREN(adapter->sysctl_tree),
3995 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3996 em_sysctl_stats, "I", "Statistics");
3998 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3999 SYSCTL_CHILDREN(adapter->sysctl_tree),
4000 OID_AUTO, "rxd", CTLFLAG_RD,
4001 &adapter->num_rx_desc, 0, NULL);
4002 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4003 SYSCTL_CHILDREN(adapter->sysctl_tree),
4004 OID_AUTO, "txd", CTLFLAG_RD,
4005 &adapter->num_tx_desc, 0, NULL);
4007 if (adapter->hw.mac.type >= e1000_82540) {
4008 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4009 SYSCTL_CHILDREN(adapter->sysctl_tree),
4010 OID_AUTO, "int_throttle_ceil",
4011 CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4012 em_sysctl_int_throttle, "I",
4013 "interrupt throttling rate");
4015 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4016 SYSCTL_CHILDREN(adapter->sysctl_tree),
4017 OID_AUTO, "int_tx_nsegs",
4018 CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4019 em_sysctl_int_tx_nsegs, "I",
4020 "# segments per TX interrupt");
4025 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4027 struct adapter *adapter = (void *)arg1;
4028 struct ifnet *ifp = &adapter->arpcom.ac_if;
4029 int error, throttle;
4031 throttle = adapter->int_throttle_ceil;
4032 error = sysctl_handle_int(oidp, &throttle, 0, req);
4033 if (error || req->newptr == NULL)
4035 if (throttle < 0 || throttle > 1000000000 / 256)
4040 * Set the interrupt throttling rate in 256ns increments,
4041 * recalculate sysctl value assignment to get exact frequency.
4043 throttle = 1000000000 / 256 / throttle;
4045 /* Upper 16bits of ITR is reserved and should be zero */
4046 if (throttle & 0xffff0000)
4050 lwkt_serialize_enter(ifp->if_serializer);
4053 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4055 adapter->int_throttle_ceil = 0;
4057 if (ifp->if_flags & IFF_RUNNING)
4058 em_set_itr(adapter, throttle);
4060 lwkt_serialize_exit(ifp->if_serializer);
4063 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4064 adapter->int_throttle_ceil);
4070 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4072 struct adapter *adapter = (void *)arg1;
4073 struct ifnet *ifp = &adapter->arpcom.ac_if;
4076 segs = adapter->tx_int_nsegs;
4077 error = sysctl_handle_int(oidp, &segs, 0, req);
4078 if (error || req->newptr == NULL)
4083 lwkt_serialize_enter(ifp->if_serializer);
4086 * Don't allow int_tx_nsegs to become:
4087 * o Less the oact_tx_desc
4088 * o Too large that no TX desc will cause TX interrupt to
4089 * be generated (OACTIVE will never recover)
4090 * o Too small that will cause tx_dd[] overflow
4092 if (segs < adapter->oact_tx_desc ||
4093 segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4094 segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4098 adapter->tx_int_nsegs = segs;
4101 lwkt_serialize_exit(ifp->if_serializer);
4107 em_set_itr(struct adapter *adapter, uint32_t itr)
4109 E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4110 if (adapter->hw.mac.type == e1000_82574) {
4114 * When using MSIX interrupts we need to
4115 * throttle using the EITR register
4117 for (i = 0; i < 4; ++i) {
4118 E1000_WRITE_REG(&adapter->hw,
4119 E1000_EITR_82574(i), itr);
4125 * Disable the L0s, Errata #20
4128 em_disable_aspm(struct adapter *adapter)
4130 uint16_t link_cap, link_ctrl;
4131 uint8_t pcie_ptr, reg;
4132 device_t dev = adapter->dev;
4134 switch (adapter->hw.mac.type) {
4144 pcie_ptr = pci_get_pciecap_ptr(dev);
4148 link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4149 if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4153 if_printf(&adapter->arpcom.ac_if, "disable L0s\n");
4155 reg = pcie_ptr + PCIER_LINKCTRL;
4156 link_ctrl = pci_read_config(dev, reg, 2);
4157 link_ctrl &= ~PCIEM_LNKCTL_ASPM_L0S;
4158 pci_write_config(dev, reg, link_ctrl, 2);