Merge branch 'vendor/OPENSSH'
[dragonfly.git] / sys / dev / drm / i915 / i915_debugfs.c
1 /*
2  * Copyright © 2008 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <eric@anholt.net>
25  *    Keith Packard <keithp@keithp.com>
26  *
27  */
28
29 #include <linux/export.h>
30 #include <drm/drmP.h>
31 #include "intel_drv.h"
32 #include "intel_ringbuffer.h"
33 #include <drm/i915_drm.h>
34 #include "i915_drv.h"
35
36 #define DRM_I915_RING_DEBUG 1
37
38
39 #if defined(CONFIG_DEBUG_FS)
40
41 enum {
42         ACTIVE_LIST,
43         INACTIVE_LIST,
44         PINNED_LIST,
45 };
46
47 static const char *yesno(int v)
48 {
49         return v ? "yes" : "no";
50 }
51
52 static int i915_capabilities(struct seq_file *m, void *data)
53 {
54         struct drm_info_node *node = (struct drm_info_node *) m->private;
55         struct drm_device *dev = node->minor->dev;
56         const struct intel_device_info *info = INTEL_INFO(dev);
57
58         seq_printf(m, "gen: %d\n", info->gen);
59         seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
60 #define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
61 #define DEV_INFO_SEP ;
62         DEV_INFO_FLAGS;
63 #undef DEV_INFO_FLAG
64 #undef DEV_INFO_SEP
65
66         return 0;
67 }
68
69 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
70 {
71         if (obj->user_pin_count > 0)
72                 return "P";
73         else if (obj->pin_count > 0)
74                 return "p";
75         else
76                 return " ";
77 }
78
79 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
80 {
81         switch (obj->tiling_mode) {
82         default:
83         case I915_TILING_NONE: return " ";
84         case I915_TILING_X: return "X";
85         case I915_TILING_Y: return "Y";
86         }
87 }
88
89 static const char *cache_level_str(int type)
90 {
91         switch (type) {
92         case I915_CACHE_NONE: return " uncached";
93         case I915_CACHE_LLC: return " snooped (LLC)";
94         case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
95         default: return "";
96         }
97 }
98
99 static void
100 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
101 {
102         seq_printf(m, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
103                    &obj->base,
104                    get_pin_flag(obj),
105                    get_tiling_flag(obj),
106                    obj->base.size / 1024,
107                    obj->base.read_domains,
108                    obj->base.write_domain,
109                    obj->last_read_seqno,
110                    obj->last_write_seqno,
111                    obj->last_fenced_seqno,
112                    cache_level_str(obj->cache_level),
113                    obj->dirty ? " dirty" : "",
114                    obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
115         if (obj->base.name)
116                 seq_printf(m, " (name: %d)", obj->base.name);
117         if (obj->pin_count)
118                 seq_printf(m, " (pinned x %d)", obj->pin_count);
119         if (obj->fence_reg != I915_FENCE_REG_NONE)
120                 seq_printf(m, " (fence: %d)", obj->fence_reg);
121         if (obj->gtt_space != NULL)
122                 seq_printf(m, " (gtt offset: %08x, size: %08x)",
123                            obj->gtt_offset, (unsigned int)obj->gtt_space->size);
124         if (obj->stolen)
125                 seq_printf(m, " (stolen: %08lx)", obj->stolen->start);
126         if (obj->pin_mappable || obj->fault_mappable) {
127                 char s[3], *t = s;
128                 if (obj->pin_mappable)
129                         *t++ = 'p';
130                 if (obj->fault_mappable)
131                         *t++ = 'f';
132                 *t = '\0';
133                 seq_printf(m, " (%s mappable)", s);
134         }
135         if (obj->ring != NULL)
136                 seq_printf(m, " (%s)", obj->ring->name);
137 }
138
139 static int i915_gem_object_list_info(struct seq_file *m, void *data)
140 {
141         struct drm_info_node *node = (struct drm_info_node *) m->private;
142         uintptr_t list = (uintptr_t) node->info_ent->data;
143         struct list_head *head;
144         struct drm_device *dev = node->minor->dev;
145         drm_i915_private_t *dev_priv = dev->dev_private;
146         struct drm_i915_gem_object *obj;
147         size_t total_obj_size, total_gtt_size;
148         int count, ret;
149
150         ret = mutex_lock_interruptible(&dev->struct_mutex);
151         if (ret)
152                 return ret;
153
154         switch (list) {
155         case ACTIVE_LIST:
156                 seq_printf(m, "Active:\n");
157                 head = &dev_priv->mm.active_list;
158                 break;
159         case INACTIVE_LIST:
160                 seq_printf(m, "Inactive:\n");
161                 head = &dev_priv->mm.inactive_list;
162                 break;
163         default:
164                 mutex_unlock(&dev->struct_mutex);
165                 return -EINVAL;
166         }
167
168         total_obj_size = total_gtt_size = count = 0;
169         list_for_each_entry(obj, head, mm_list) {
170                 seq_printf(m, "   ");
171                 describe_obj(m, obj);
172                 seq_printf(m, "\n");
173                 total_obj_size += obj->base.size;
174                 total_gtt_size += obj->gtt_space->size;
175                 count++;
176         }
177         mutex_unlock(&dev->struct_mutex);
178
179         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
180                    count, total_obj_size, total_gtt_size);
181         return 0;
182 }
183
184 #define count_objects(list, member) do { \
185         list_for_each_entry(obj, list, member) { \
186                 size += obj->gtt_space->size; \
187                 ++count; \
188                 if (obj->map_and_fenceable) { \
189                         mappable_size += obj->gtt_space->size; \
190                         ++mappable_count; \
191                 } \
192         } \
193 } while (0)
194
195 static int i915_gem_object_info(struct seq_file *m, void* data)
196 {
197         struct drm_info_node *node = (struct drm_info_node *) m->private;
198         struct drm_device *dev = node->minor->dev;
199         struct drm_i915_private *dev_priv = dev->dev_private;
200         u32 count, mappable_count, purgeable_count;
201         size_t size, mappable_size, purgeable_size;
202         struct drm_i915_gem_object *obj;
203         int ret;
204
205         ret = mutex_lock_interruptible(&dev->struct_mutex);
206         if (ret)
207                 return ret;
208
209         seq_printf(m, "%u objects, %zu bytes\n",
210                    dev_priv->mm.object_count,
211                    dev_priv->mm.object_memory);
212
213         size = count = mappable_size = mappable_count = 0;
214         count_objects(&dev_priv->mm.bound_list, gtt_list);
215         seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
216                    count, mappable_count, size, mappable_size);
217
218         size = count = mappable_size = mappable_count = 0;
219         count_objects(&dev_priv->mm.active_list, mm_list);
220         seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
221                    count, mappable_count, size, mappable_size);
222
223         size = count = mappable_size = mappable_count = 0;
224         count_objects(&dev_priv->mm.inactive_list, mm_list);
225         seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
226                    count, mappable_count, size, mappable_size);
227
228         size = count = purgeable_size = purgeable_count = 0;
229         list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) {
230                 size += obj->base.size, ++count;
231                 if (obj->madv == I915_MADV_DONTNEED)
232                         purgeable_size += obj->base.size, ++purgeable_count;
233         }
234         seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
235
236         size = count = mappable_size = mappable_count = 0;
237         list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
238                 if (obj->fault_mappable) {
239                         size += obj->gtt_space->size;
240                         ++count;
241                 }
242                 if (obj->pin_mappable) {
243                         mappable_size += obj->gtt_space->size;
244                         ++mappable_count;
245                 }
246                 if (obj->madv == I915_MADV_DONTNEED) {
247                         purgeable_size += obj->base.size;
248                         ++purgeable_count;
249                 }
250         }
251         seq_printf(m, "%u purgeable objects, %zu bytes\n",
252                    purgeable_count, purgeable_size);
253         seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
254                    mappable_count, mappable_size);
255         seq_printf(m, "%u fault mappable objects, %zu bytes\n",
256                    count, size);
257
258         seq_printf(m, "%zu [%lu] gtt total\n",
259                    dev_priv->gtt.total,
260                    dev_priv->gtt.mappable_end - dev_priv->gtt.start);
261
262         mutex_unlock(&dev->struct_mutex);
263
264         return 0;
265 }
266
267 static int i915_gem_gtt_info(struct seq_file *m, void* data)
268 {
269         struct drm_info_node *node = (struct drm_info_node *) m->private;
270         struct drm_device *dev = node->minor->dev;
271         uintptr_t list = (uintptr_t) node->info_ent->data;
272         struct drm_i915_private *dev_priv = dev->dev_private;
273         struct drm_i915_gem_object *obj;
274         size_t total_obj_size, total_gtt_size;
275         int count, ret;
276
277         ret = mutex_lock_interruptible(&dev->struct_mutex);
278         if (ret)
279                 return ret;
280
281         total_obj_size = total_gtt_size = count = 0;
282         list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
283                 if (list == PINNED_LIST && obj->pin_count == 0)
284                         continue;
285
286                 seq_printf(m, "   ");
287                 describe_obj(m, obj);
288                 seq_printf(m, "\n");
289                 total_obj_size += obj->base.size;
290                 total_gtt_size += obj->gtt_space->size;
291                 count++;
292         }
293
294         mutex_unlock(&dev->struct_mutex);
295
296         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
297                    count, total_obj_size, total_gtt_size);
298
299         return 0;
300 }
301
302 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
303 {
304         struct drm_info_node *node = (struct drm_info_node *) m->private;
305         struct drm_device *dev = node->minor->dev;
306         unsigned long flags;
307         struct intel_crtc *crtc;
308
309         list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
310                 const char pipe = pipe_name(crtc->pipe);
311                 const char plane = plane_name(crtc->plane);
312                 struct intel_unpin_work *work;
313
314                 spin_lock_irqsave(&dev->event_lock, flags);
315                 work = crtc->unpin_work;
316                 if (work == NULL) {
317                         seq_printf(m, "No flip due on pipe %c (plane %c)\n",
318                                    pipe, plane);
319                 } else {
320                         if (atomic_read(&work->pending) < INTEL_FLIP_COMPLETE) {
321                                 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
322                                            pipe, plane);
323                         } else {
324                                 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
325                                            pipe, plane);
326                         }
327                         if (work->enable_stall_check)
328                                 seq_printf(m, "Stall check enabled, ");
329                         else
330                                 seq_printf(m, "Stall check waiting for page flip ioctl, ");
331                         seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
332
333                         if (work->old_fb_obj) {
334                                 struct drm_i915_gem_object *obj = work->old_fb_obj;
335                                 if (obj)
336                                         seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
337                         }
338                         if (work->pending_flip_obj) {
339                                 struct drm_i915_gem_object *obj = work->pending_flip_obj;
340                                 if (obj)
341                                         seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
342                         }
343                 }
344                 spin_unlock_irqrestore(&dev->event_lock, flags);
345         }
346
347         return 0;
348 }
349
350 static int i915_gem_request_info(struct seq_file *m, void *data)
351 {
352         struct drm_info_node *node = (struct drm_info_node *) m->private;
353         struct drm_device *dev = node->minor->dev;
354         drm_i915_private_t *dev_priv = dev->dev_private;
355         struct intel_ring_buffer *ring;
356         struct drm_i915_gem_request *gem_request;
357         int ret, count, i;
358
359         ret = mutex_lock_interruptible(&dev->struct_mutex);
360         if (ret)
361                 return ret;
362
363         count = 0;
364         for_each_ring(ring, dev_priv, i) {
365                 if (list_empty(&ring->request_list))
366                         continue;
367
368                 seq_printf(m, "%s requests:\n", ring->name);
369                 list_for_each_entry(gem_request,
370                                     &ring->request_list,
371                                     list) {
372                         seq_printf(m, "    %d @ %d\n",
373                                    gem_request->seqno,
374                                    (int) (jiffies - gem_request->emitted_jiffies));
375                 }
376                 count++;
377         }
378         mutex_unlock(&dev->struct_mutex);
379
380         if (count == 0)
381                 seq_printf(m, "No requests\n");
382
383         return 0;
384 }
385
386 static void i915_ring_seqno_info(struct seq_file *m,
387                                  struct intel_ring_buffer *ring)
388 {
389         if (ring->get_seqno) {
390                 seq_printf(m, "Current sequence (%s): %u\n",
391                            ring->name, ring->get_seqno(ring, false));
392         }
393 }
394
395 static int i915_gem_seqno_info(struct seq_file *m, void *data)
396 {
397         struct drm_info_node *node = (struct drm_info_node *) m->private;
398         struct drm_device *dev = node->minor->dev;
399         drm_i915_private_t *dev_priv = dev->dev_private;
400         struct intel_ring_buffer *ring;
401         int ret, i;
402
403         ret = mutex_lock_interruptible(&dev->struct_mutex);
404         if (ret)
405                 return ret;
406
407         for_each_ring(ring, dev_priv, i)
408                 i915_ring_seqno_info(m, ring);
409
410         mutex_unlock(&dev->struct_mutex);
411
412         return 0;
413 }
414
415
416 static int i915_interrupt_info(struct seq_file *m, void *data)
417 {
418         struct drm_info_node *node = (struct drm_info_node *) m->private;
419         struct drm_device *dev = node->minor->dev;
420         drm_i915_private_t *dev_priv = dev->dev_private;
421         struct intel_ring_buffer *ring;
422         int ret, i, pipe;
423
424         ret = mutex_lock_interruptible(&dev->struct_mutex);
425         if (ret)
426                 return ret;
427
428         if (IS_VALLEYVIEW(dev)) {
429                 seq_printf(m, "Display IER:\t%08x\n",
430                            I915_READ(VLV_IER));
431                 seq_printf(m, "Display IIR:\t%08x\n",
432                            I915_READ(VLV_IIR));
433                 seq_printf(m, "Display IIR_RW:\t%08x\n",
434                            I915_READ(VLV_IIR_RW));
435                 seq_printf(m, "Display IMR:\t%08x\n",
436                            I915_READ(VLV_IMR));
437                 for_each_pipe(pipe)
438                         seq_printf(m, "Pipe %c stat:\t%08x\n",
439                                    pipe_name(pipe),
440                                    I915_READ(PIPESTAT(pipe)));
441
442                 seq_printf(m, "Master IER:\t%08x\n",
443                            I915_READ(VLV_MASTER_IER));
444
445                 seq_printf(m, "Render IER:\t%08x\n",
446                            I915_READ(GTIER));
447                 seq_printf(m, "Render IIR:\t%08x\n",
448                            I915_READ(GTIIR));
449                 seq_printf(m, "Render IMR:\t%08x\n",
450                            I915_READ(GTIMR));
451
452                 seq_printf(m, "PM IER:\t\t%08x\n",
453                            I915_READ(GEN6_PMIER));
454                 seq_printf(m, "PM IIR:\t\t%08x\n",
455                            I915_READ(GEN6_PMIIR));
456                 seq_printf(m, "PM IMR:\t\t%08x\n",
457                            I915_READ(GEN6_PMIMR));
458
459                 seq_printf(m, "Port hotplug:\t%08x\n",
460                            I915_READ(PORT_HOTPLUG_EN));
461                 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
462                            I915_READ(VLV_DPFLIPSTAT));
463                 seq_printf(m, "DPINVGTT:\t%08x\n",
464                            I915_READ(DPINVGTT));
465
466         } else if (!HAS_PCH_SPLIT(dev)) {
467                 seq_printf(m, "Interrupt enable:    %08x\n",
468                            I915_READ(IER));
469                 seq_printf(m, "Interrupt identity:  %08x\n",
470                            I915_READ(IIR));
471                 seq_printf(m, "Interrupt mask:      %08x\n",
472                            I915_READ(IMR));
473                 for_each_pipe(pipe)
474                         seq_printf(m, "Pipe %c stat:         %08x\n",
475                                    pipe_name(pipe),
476                                    I915_READ(PIPESTAT(pipe)));
477         } else {
478                 seq_printf(m, "North Display Interrupt enable:          %08x\n",
479                            I915_READ(DEIER));
480                 seq_printf(m, "North Display Interrupt identity:        %08x\n",
481                            I915_READ(DEIIR));
482                 seq_printf(m, "North Display Interrupt mask:            %08x\n",
483                            I915_READ(DEIMR));
484                 seq_printf(m, "South Display Interrupt enable:          %08x\n",
485                            I915_READ(SDEIER));
486                 seq_printf(m, "South Display Interrupt identity:        %08x\n",
487                            I915_READ(SDEIIR));
488                 seq_printf(m, "South Display Interrupt mask:            %08x\n",
489                            I915_READ(SDEIMR));
490                 seq_printf(m, "Graphics Interrupt enable:               %08x\n",
491                            I915_READ(GTIER));
492                 seq_printf(m, "Graphics Interrupt identity:             %08x\n",
493                            I915_READ(GTIIR));
494                 seq_printf(m, "Graphics Interrupt mask:         %08x\n",
495                            I915_READ(GTIMR));
496         }
497         seq_printf(m, "Interrupts received: %d\n",
498                    atomic_read(&dev_priv->irq_received));
499         for_each_ring(ring, dev_priv, i) {
500                 if (IS_GEN6(dev) || IS_GEN7(dev)) {
501                         seq_printf(m,
502                                    "Graphics Interrupt mask (%s):       %08x\n",
503                                    ring->name, I915_READ_IMR(ring));
504                 }
505                 i915_ring_seqno_info(m, ring);
506         }
507         mutex_unlock(&dev->struct_mutex);
508
509         return 0;
510 }
511
512 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
513 {
514         struct drm_info_node *node = (struct drm_info_node *) m->private;
515         struct drm_device *dev = node->minor->dev;
516         drm_i915_private_t *dev_priv = dev->dev_private;
517         int i, ret;
518
519         ret = mutex_lock_interruptible(&dev->struct_mutex);
520         if (ret)
521                 return ret;
522
523         seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
524         seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
525         for (i = 0; i < dev_priv->num_fence_regs; i++) {
526                 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
527
528                 seq_printf(m, "Fence %d, pin count = %d, object = ",
529                            i, dev_priv->fence_regs[i].pin_count);
530                 if (obj == NULL)
531                         seq_printf(m, "unused");
532                 else
533                         describe_obj(m, obj);
534                 seq_printf(m, "\n");
535         }
536
537         mutex_unlock(&dev->struct_mutex);
538         return 0;
539 }
540
541 static int i915_hws_info(struct seq_file *m, void *data)
542 {
543         struct drm_info_node *node = (struct drm_info_node *) m->private;
544         struct drm_device *dev = node->minor->dev;
545         drm_i915_private_t *dev_priv = dev->dev_private;
546         struct intel_ring_buffer *ring;
547         const u32 *hws;
548         int i;
549
550         ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
551         hws = ring->status_page.page_addr;
552         if (hws == NULL)
553                 return 0;
554
555         for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
556                 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
557                            i * 4,
558                            hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
559         }
560         return 0;
561 }
562
563 static const char *ring_str(int ring)
564 {
565         switch (ring) {
566         case RCS: return "render";
567         case VCS: return "bsd";
568         case BCS: return "blt";
569         default: return "";
570         }
571 }
572
573 static const char *pin_flag(int pinned)
574 {
575         if (pinned > 0)
576                 return " P";
577         else if (pinned < 0)
578                 return " p";
579         else
580                 return "";
581 }
582
583 static const char *tiling_flag(int tiling)
584 {
585         switch (tiling) {
586         default:
587         case I915_TILING_NONE: return "";
588         case I915_TILING_X: return " X";
589         case I915_TILING_Y: return " Y";
590         }
591 }
592
593 static const char *dirty_flag(int dirty)
594 {
595         return dirty ? " dirty" : "";
596 }
597
598 static const char *purgeable_flag(int purgeable)
599 {
600         return purgeable ? " purgeable" : "";
601 }
602
603 static void print_error_buffers(struct seq_file *m,
604                                 const char *name,
605                                 struct drm_i915_error_buffer *err,
606                                 int count)
607 {
608         seq_printf(m, "%s [%d]:\n", name, count);
609
610         while (count--) {
611                 seq_printf(m, "  %08x %8u %02x %02x %x %x%s%s%s%s%s%s%s",
612                            err->gtt_offset,
613                            err->size,
614                            err->read_domains,
615                            err->write_domain,
616                            err->rseqno, err->wseqno,
617                            pin_flag(err->pinned),
618                            tiling_flag(err->tiling),
619                            dirty_flag(err->dirty),
620                            purgeable_flag(err->purgeable),
621                            err->ring != -1 ? " " : "",
622                            ring_str(err->ring),
623                            cache_level_str(err->cache_level));
624
625                 if (err->name)
626                         seq_printf(m, " (name: %d)", err->name);
627                 if (err->fence_reg != I915_FENCE_REG_NONE)
628                         seq_printf(m, " (fence: %d)", err->fence_reg);
629
630                 seq_printf(m, "\n");
631                 err++;
632         }
633 }
634
635 static void i915_ring_error_state(struct seq_file *m,
636                                   struct drm_device *dev,
637                                   struct drm_i915_error_state *error,
638                                   unsigned ring)
639 {
640         BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
641         seq_printf(m, "%s command stream:\n", ring_str(ring));
642         seq_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
643         seq_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
644         seq_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);
645         seq_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
646         seq_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
647         seq_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
648         seq_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
649         if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
650                 seq_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
651
652         if (INTEL_INFO(dev)->gen >= 4)
653                 seq_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
654         seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
655         seq_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
656         if (INTEL_INFO(dev)->gen >= 6) {
657                 seq_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
658                 seq_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
659                 seq_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
660                            error->semaphore_mboxes[ring][0],
661                            error->semaphore_seqno[ring][0]);
662                 seq_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
663                            error->semaphore_mboxes[ring][1],
664                            error->semaphore_seqno[ring][1]);
665         }
666         seq_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
667         seq_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
668         seq_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
669         seq_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
670 }
671
672 struct i915_error_state_file_priv {
673         struct drm_device *dev;
674         struct drm_i915_error_state *error;
675 };
676
677 static int i915_error_state(struct seq_file *m, void *unused)
678 {
679         struct i915_error_state_file_priv *error_priv = m->private;
680         struct drm_device *dev = error_priv->dev;
681         drm_i915_private_t *dev_priv = dev->dev_private;
682         struct drm_i915_error_state *error = error_priv->error;
683         struct intel_ring_buffer *ring;
684         int i, j, page, offset, elt;
685
686         if (!error) {
687                 seq_printf(m, "no error state collected\n");
688                 return 0;
689         }
690
691         seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
692                    error->time.tv_usec);
693         seq_printf(m, "Kernel: " UTS_RELEASE "\n");
694         seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
695         seq_printf(m, "EIR: 0x%08x\n", error->eir);
696         seq_printf(m, "IER: 0x%08x\n", error->ier);
697         seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
698         seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
699         seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
700         seq_printf(m, "CCID: 0x%08x\n", error->ccid);
701
702         for (i = 0; i < dev_priv->num_fence_regs; i++)
703                 seq_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
704
705         for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
706                 seq_printf(m, "  INSTDONE_%d: 0x%08x\n", i, error->extra_instdone[i]);
707
708         if (INTEL_INFO(dev)->gen >= 6) {
709                 seq_printf(m, "ERROR: 0x%08x\n", error->error);
710                 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
711         }
712
713         if (INTEL_INFO(dev)->gen == 7)
714                 seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
715
716         for_each_ring(ring, dev_priv, i)
717                 i915_ring_error_state(m, dev, error, i);
718
719         if (error->active_bo)
720                 print_error_buffers(m, "Active",
721                                     error->active_bo,
722                                     error->active_bo_count);
723
724         if (error->pinned_bo)
725                 print_error_buffers(m, "Pinned",
726                                     error->pinned_bo,
727                                     error->pinned_bo_count);
728
729         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
730                 struct drm_i915_error_object *obj;
731
732                 if ((obj = error->ring[i].batchbuffer)) {
733                         seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
734                                    dev_priv->ring[i].name,
735                                    obj->gtt_offset);
736                         offset = 0;
737                         for (page = 0; page < obj->page_count; page++) {
738                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
739                                         seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);
740                                         offset += 4;
741                                 }
742                         }
743                 }
744
745                 if (error->ring[i].num_requests) {
746                         seq_printf(m, "%s --- %d requests\n",
747                                    dev_priv->ring[i].name,
748                                    error->ring[i].num_requests);
749                         for (j = 0; j < error->ring[i].num_requests; j++) {
750                                 seq_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
751                                            error->ring[i].requests[j].seqno,
752                                            error->ring[i].requests[j].jiffies,
753                                            error->ring[i].requests[j].tail);
754                         }
755                 }
756
757                 if ((obj = error->ring[i].ringbuffer)) {
758                         seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
759                                    dev_priv->ring[i].name,
760                                    obj->gtt_offset);
761                         offset = 0;
762                         for (page = 0; page < obj->page_count; page++) {
763                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
764                                         seq_printf(m, "%08x :  %08x\n",
765                                                    offset,
766                                                    obj->pages[page][elt]);
767                                         offset += 4;
768                                 }
769                         }
770                 }
771         }
772
773         if (error->overlay)
774                 intel_overlay_print_error_state(m, error->overlay);
775
776         if (error->display)
777                 intel_display_print_error_state(m, dev, error->display);
778
779         return 0;
780 }
781
782 static ssize_t
783 i915_error_state_write(struct file *filp,
784                        const char __user *ubuf,
785                        size_t cnt,
786                        loff_t *ppos)
787 {
788         struct seq_file *m = filp->private_data;
789         struct i915_error_state_file_priv *error_priv = m->private;
790         struct drm_device *dev = error_priv->dev;
791         int ret;
792
793         DRM_DEBUG_DRIVER("Resetting error state\n");
794
795         ret = mutex_lock_interruptible(&dev->struct_mutex);
796         if (ret)
797                 return ret;
798
799         i915_destroy_error_state(dev);
800         mutex_unlock(&dev->struct_mutex);
801
802         return cnt;
803 }
804
805 static int i915_error_state_open(struct inode *inode, struct file *file)
806 {
807         struct drm_device *dev = inode->i_private;
808         drm_i915_private_t *dev_priv = dev->dev_private;
809         struct i915_error_state_file_priv *error_priv;
810         unsigned long flags;
811
812         error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
813         if (!error_priv)
814                 return -ENOMEM;
815
816         error_priv->dev = dev;
817
818         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
819         error_priv->error = dev_priv->gpu_error.first_error;
820         if (error_priv->error)
821                 kref_get(&error_priv->error->ref);
822         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
823
824         return single_open(file, i915_error_state, error_priv);
825 }
826
827 static int i915_error_state_release(struct inode *inode, struct file *file)
828 {
829         struct seq_file *m = file->private_data;
830         struct i915_error_state_file_priv *error_priv = m->private;
831
832         if (error_priv->error)
833                 kref_put(&error_priv->error->ref, i915_error_state_free);
834         kfree(error_priv);
835
836         return single_release(inode, file);
837 }
838
839 static const struct file_operations i915_error_state_fops = {
840         .owner = THIS_MODULE,
841         .open = i915_error_state_open,
842         .read = seq_read,
843         .write = i915_error_state_write,
844         .llseek = default_llseek,
845         .release = i915_error_state_release,
846 };
847
848 static ssize_t
849 i915_next_seqno_read(struct file *filp,
850                  char __user *ubuf,
851                  size_t max,
852                  loff_t *ppos)
853 {
854         struct drm_device *dev = filp->private_data;
855         drm_i915_private_t *dev_priv = dev->dev_private;
856         char buf[80];
857         int len;
858         int ret;
859
860         ret = mutex_lock_interruptible(&dev->struct_mutex);
861         if (ret)
862                 return ret;
863
864         len = snprintf(buf, sizeof(buf),
865                        "next_seqno :  0x%x\n",
866                        dev_priv->next_seqno);
867
868         mutex_unlock(&dev->struct_mutex);
869
870         if (len > sizeof(buf))
871                 len = sizeof(buf);
872
873         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
874 }
875
876 static ssize_t
877 i915_next_seqno_write(struct file *filp,
878                       const char __user *ubuf,
879                       size_t cnt,
880                       loff_t *ppos)
881 {
882         struct drm_device *dev = filp->private_data;
883         char buf[20];
884         u32 val = 1;
885         int ret;
886
887         if (cnt > 0) {
888                 if (cnt > sizeof(buf) - 1)
889                         return -EINVAL;
890
891                 if (copy_from_user(buf, ubuf, cnt))
892                         return -EFAULT;
893                 buf[cnt] = 0;
894
895                 ret = kstrtouint(buf, 0, &val);
896                 if (ret < 0)
897                         return ret;
898         }
899
900         ret = mutex_lock_interruptible(&dev->struct_mutex);
901         if (ret)
902                 return ret;
903
904         ret = i915_gem_set_seqno(dev, val);
905
906         mutex_unlock(&dev->struct_mutex);
907
908         return ret ?: cnt;
909 }
910
911 static const struct file_operations i915_next_seqno_fops = {
912         .owner = THIS_MODULE,
913         .open = simple_open,
914         .read = i915_next_seqno_read,
915         .write = i915_next_seqno_write,
916         .llseek = default_llseek,
917 };
918
919 static int i915_rstdby_delays(struct seq_file *m, void *unused)
920 {
921         struct drm_info_node *node = (struct drm_info_node *) m->private;
922         struct drm_device *dev = node->minor->dev;
923         drm_i915_private_t *dev_priv = dev->dev_private;
924         u16 crstanddelay;
925         int ret;
926
927         ret = mutex_lock_interruptible(&dev->struct_mutex);
928         if (ret)
929                 return ret;
930
931         crstanddelay = I915_READ16(CRSTANDVID);
932
933         mutex_unlock(&dev->struct_mutex);
934
935         seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
936
937         return 0;
938 }
939
940 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
941 {
942         struct drm_info_node *node = (struct drm_info_node *) m->private;
943         struct drm_device *dev = node->minor->dev;
944         drm_i915_private_t *dev_priv = dev->dev_private;
945         int ret;
946
947         if (IS_GEN5(dev)) {
948                 u16 rgvswctl = I915_READ16(MEMSWCTL);
949                 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
950
951                 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
952                 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
953                 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
954                            MEMSTAT_VID_SHIFT);
955                 seq_printf(m, "Current P-state: %d\n",
956                            (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
957         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
958                 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
959                 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
960                 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
961                 u32 rpstat, cagf;
962                 u32 rpupei, rpcurup, rpprevup;
963                 u32 rpdownei, rpcurdown, rpprevdown;
964                 int max_freq;
965
966                 /* RPSTAT1 is in the GT power well */
967                 ret = mutex_lock_interruptible(&dev->struct_mutex);
968                 if (ret)
969                         return ret;
970
971                 gen6_gt_force_wake_get(dev_priv);
972
973                 rpstat = I915_READ(GEN6_RPSTAT1);
974                 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
975                 rpcurup = I915_READ(GEN6_RP_CUR_UP);
976                 rpprevup = I915_READ(GEN6_RP_PREV_UP);
977                 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
978                 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
979                 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
980                 if (IS_HASWELL(dev))
981                         cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
982                 else
983                         cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
984                 cagf *= GT_FREQUENCY_MULTIPLIER;
985
986                 gen6_gt_force_wake_put(dev_priv);
987                 mutex_unlock(&dev->struct_mutex);
988
989                 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
990                 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
991                 seq_printf(m, "Render p-state ratio: %d\n",
992                            (gt_perf_status & 0xff00) >> 8);
993                 seq_printf(m, "Render p-state VID: %d\n",
994                            gt_perf_status & 0xff);
995                 seq_printf(m, "Render p-state limit: %d\n",
996                            rp_state_limits & 0xff);
997                 seq_printf(m, "CAGF: %dMHz\n", cagf);
998                 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
999                            GEN6_CURICONT_MASK);
1000                 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
1001                            GEN6_CURBSYTAVG_MASK);
1002                 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
1003                            GEN6_CURBSYTAVG_MASK);
1004                 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
1005                            GEN6_CURIAVG_MASK);
1006                 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
1007                            GEN6_CURBSYTAVG_MASK);
1008                 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
1009                            GEN6_CURBSYTAVG_MASK);
1010
1011                 max_freq = (rp_state_cap & 0xff0000) >> 16;
1012                 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
1013                            max_freq * GT_FREQUENCY_MULTIPLIER);
1014
1015                 max_freq = (rp_state_cap & 0xff00) >> 8;
1016                 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
1017                            max_freq * GT_FREQUENCY_MULTIPLIER);
1018
1019                 max_freq = rp_state_cap & 0xff;
1020                 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
1021                            max_freq * GT_FREQUENCY_MULTIPLIER);
1022         } else {
1023                 seq_printf(m, "no P-state info available\n");
1024         }
1025
1026         return 0;
1027 }
1028
1029 static int i915_delayfreq_table(struct seq_file *m, void *unused)
1030 {
1031         struct drm_info_node *node = (struct drm_info_node *) m->private;
1032         struct drm_device *dev = node->minor->dev;
1033         drm_i915_private_t *dev_priv = dev->dev_private;
1034         u32 delayfreq;
1035         int ret, i;
1036
1037         ret = mutex_lock_interruptible(&dev->struct_mutex);
1038         if (ret)
1039                 return ret;
1040
1041         for (i = 0; i < 16; i++) {
1042                 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
1043                 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
1044                            (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
1045         }
1046
1047         mutex_unlock(&dev->struct_mutex);
1048
1049         return 0;
1050 }
1051
1052 static inline int MAP_TO_MV(int map)
1053 {
1054         return 1250 - (map * 25);
1055 }
1056
1057 static int i915_inttoext_table(struct seq_file *m, void *unused)
1058 {
1059         struct drm_info_node *node = (struct drm_info_node *) m->private;
1060         struct drm_device *dev = node->minor->dev;
1061         drm_i915_private_t *dev_priv = dev->dev_private;
1062         u32 inttoext;
1063         int ret, i;
1064
1065         ret = mutex_lock_interruptible(&dev->struct_mutex);
1066         if (ret)
1067                 return ret;
1068
1069         for (i = 1; i <= 32; i++) {
1070                 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1071                 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1072         }
1073
1074         mutex_unlock(&dev->struct_mutex);
1075
1076         return 0;
1077 }
1078
1079 static int ironlake_drpc_info(struct seq_file *m)
1080 {
1081         struct drm_info_node *node = (struct drm_info_node *) m->private;
1082         struct drm_device *dev = node->minor->dev;
1083         drm_i915_private_t *dev_priv = dev->dev_private;
1084         u32 rgvmodectl, rstdbyctl;
1085         u16 crstandvid;
1086         int ret;
1087
1088         ret = mutex_lock_interruptible(&dev->struct_mutex);
1089         if (ret)
1090                 return ret;
1091
1092         rgvmodectl = I915_READ(MEMMODECTL);
1093         rstdbyctl = I915_READ(RSTDBYCTL);
1094         crstandvid = I915_READ16(CRSTANDVID);
1095
1096         mutex_unlock(&dev->struct_mutex);
1097
1098         seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1099                    "yes" : "no");
1100         seq_printf(m, "Boost freq: %d\n",
1101                    (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1102                    MEMMODE_BOOST_FREQ_SHIFT);
1103         seq_printf(m, "HW control enabled: %s\n",
1104                    rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1105         seq_printf(m, "SW control enabled: %s\n",
1106                    rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1107         seq_printf(m, "Gated voltage change: %s\n",
1108                    rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1109         seq_printf(m, "Starting frequency: P%d\n",
1110                    (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1111         seq_printf(m, "Max P-state: P%d\n",
1112                    (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1113         seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1114         seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1115         seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1116         seq_printf(m, "Render standby enabled: %s\n",
1117                    (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1118         seq_printf(m, "Current RS state: ");
1119         switch (rstdbyctl & RSX_STATUS_MASK) {
1120         case RSX_STATUS_ON:
1121                 seq_printf(m, "on\n");
1122                 break;
1123         case RSX_STATUS_RC1:
1124                 seq_printf(m, "RC1\n");
1125                 break;
1126         case RSX_STATUS_RC1E:
1127                 seq_printf(m, "RC1E\n");
1128                 break;
1129         case RSX_STATUS_RS1:
1130                 seq_printf(m, "RS1\n");
1131                 break;
1132         case RSX_STATUS_RS2:
1133                 seq_printf(m, "RS2 (RC6)\n");
1134                 break;
1135         case RSX_STATUS_RS3:
1136                 seq_printf(m, "RC3 (RC6+)\n");
1137                 break;
1138         default:
1139                 seq_printf(m, "unknown\n");
1140                 break;
1141         }
1142
1143         return 0;
1144 }
1145
1146 static int gen6_drpc_info(struct seq_file *m)
1147 {
1148
1149         struct drm_info_node *node = (struct drm_info_node *) m->private;
1150         struct drm_device *dev = node->minor->dev;
1151         struct drm_i915_private *dev_priv = dev->dev_private;
1152         u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
1153         unsigned forcewake_count;
1154         int count=0, ret;
1155
1156
1157         ret = mutex_lock_interruptible(&dev->struct_mutex);
1158         if (ret)
1159                 return ret;
1160
1161         spin_lock_irq(&dev_priv->gt_lock);
1162         forcewake_count = dev_priv->forcewake_count;
1163         spin_unlock_irq(&dev_priv->gt_lock);
1164
1165         if (forcewake_count) {
1166                 seq_printf(m, "RC information inaccurate because somebody "
1167                               "holds a forcewake reference \n");
1168         } else {
1169                 /* NB: we cannot use forcewake, else we read the wrong values */
1170                 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1171                         udelay(10);
1172                 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1173         }
1174
1175         gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1176         trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1177
1178         rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1179         rcctl1 = I915_READ(GEN6_RC_CONTROL);
1180         mutex_unlock(&dev->struct_mutex);
1181         mutex_lock(&dev_priv->rps.hw_lock);
1182         sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
1183         mutex_unlock(&dev_priv->rps.hw_lock);
1184
1185         seq_printf(m, "Video Turbo Mode: %s\n",
1186                    yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1187         seq_printf(m, "HW control enabled: %s\n",
1188                    yesno(rpmodectl1 & GEN6_RP_ENABLE));
1189         seq_printf(m, "SW control enabled: %s\n",
1190                    yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1191                           GEN6_RP_MEDIA_SW_MODE));
1192         seq_printf(m, "RC1e Enabled: %s\n",
1193                    yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1194         seq_printf(m, "RC6 Enabled: %s\n",
1195                    yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1196         seq_printf(m, "Deep RC6 Enabled: %s\n",
1197                    yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1198         seq_printf(m, "Deepest RC6 Enabled: %s\n",
1199                    yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1200         seq_printf(m, "Current RC state: ");
1201         switch (gt_core_status & GEN6_RCn_MASK) {
1202         case GEN6_RC0:
1203                 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1204                         seq_printf(m, "Core Power Down\n");
1205                 else
1206                         seq_printf(m, "on\n");
1207                 break;
1208         case GEN6_RC3:
1209                 seq_printf(m, "RC3\n");
1210                 break;
1211         case GEN6_RC6:
1212                 seq_printf(m, "RC6\n");
1213                 break;
1214         case GEN6_RC7:
1215                 seq_printf(m, "RC7\n");
1216                 break;
1217         default:
1218                 seq_printf(m, "Unknown\n");
1219                 break;
1220         }
1221
1222         seq_printf(m, "Core Power Down: %s\n",
1223                    yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1224
1225         /* Not exactly sure what this is */
1226         seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1227                    I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1228         seq_printf(m, "RC6 residency since boot: %u\n",
1229                    I915_READ(GEN6_GT_GFX_RC6));
1230         seq_printf(m, "RC6+ residency since boot: %u\n",
1231                    I915_READ(GEN6_GT_GFX_RC6p));
1232         seq_printf(m, "RC6++ residency since boot: %u\n",
1233                    I915_READ(GEN6_GT_GFX_RC6pp));
1234
1235         seq_printf(m, "RC6   voltage: %dmV\n",
1236                    GEN6_DECODE_RC6_VID(((rc6vids >> 0) & 0xff)));
1237         seq_printf(m, "RC6+  voltage: %dmV\n",
1238                    GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff)));
1239         seq_printf(m, "RC6++ voltage: %dmV\n",
1240                    GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));
1241         return 0;
1242 }
1243
1244 static int i915_drpc_info(struct seq_file *m, void *unused)
1245 {
1246         struct drm_info_node *node = (struct drm_info_node *) m->private;
1247         struct drm_device *dev = node->minor->dev;
1248
1249         if (IS_GEN6(dev) || IS_GEN7(dev))
1250                 return gen6_drpc_info(m);
1251         else
1252                 return ironlake_drpc_info(m);
1253 }
1254
1255 static int i915_fbc_status(struct seq_file *m, void *unused)
1256 {
1257         struct drm_info_node *node = (struct drm_info_node *) m->private;
1258         struct drm_device *dev = node->minor->dev;
1259         drm_i915_private_t *dev_priv = dev->dev_private;
1260
1261         if (!I915_HAS_FBC(dev)) {
1262                 seq_printf(m, "FBC unsupported on this chipset\n");
1263                 return 0;
1264         }
1265
1266         if (intel_fbc_enabled(dev)) {
1267                 seq_printf(m, "FBC enabled\n");
1268         } else {
1269                 seq_printf(m, "FBC disabled: ");
1270                 switch (dev_priv->no_fbc_reason) {
1271                 case FBC_NO_OUTPUT:
1272                         seq_printf(m, "no outputs");
1273                         break;
1274                 case FBC_STOLEN_TOO_SMALL:
1275                         seq_printf(m, "not enough stolen memory");
1276                         break;
1277                 case FBC_UNSUPPORTED_MODE:
1278                         seq_printf(m, "mode not supported");
1279                         break;
1280                 case FBC_MODE_TOO_LARGE:
1281                         seq_printf(m, "mode too large");
1282                         break;
1283                 case FBC_BAD_PLANE:
1284                         seq_printf(m, "FBC unsupported on plane");
1285                         break;
1286                 case FBC_NOT_TILED:
1287                         seq_printf(m, "scanout buffer not tiled");
1288                         break;
1289                 case FBC_MULTIPLE_PIPES:
1290                         seq_printf(m, "multiple pipes are enabled");
1291                         break;
1292                 case FBC_MODULE_PARAM:
1293                         seq_printf(m, "disabled per module param (default off)");
1294                         break;
1295                 default:
1296                         seq_printf(m, "unknown reason");
1297                 }
1298                 seq_printf(m, "\n");
1299         }
1300         return 0;
1301 }
1302
1303 static int i915_sr_status(struct seq_file *m, void *unused)
1304 {
1305         struct drm_info_node *node = (struct drm_info_node *) m->private;
1306         struct drm_device *dev = node->minor->dev;
1307         drm_i915_private_t *dev_priv = dev->dev_private;
1308         bool sr_enabled = false;
1309
1310         if (HAS_PCH_SPLIT(dev))
1311                 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1312         else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1313                 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1314         else if (IS_I915GM(dev))
1315                 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1316         else if (IS_PINEVIEW(dev))
1317                 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1318
1319         seq_printf(m, "self-refresh: %s\n",
1320                    sr_enabled ? "enabled" : "disabled");
1321
1322         return 0;
1323 }
1324
1325 static int i915_emon_status(struct seq_file *m, void *unused)
1326 {
1327         struct drm_info_node *node = (struct drm_info_node *) m->private;
1328         struct drm_device *dev = node->minor->dev;
1329         drm_i915_private_t *dev_priv = dev->dev_private;
1330         unsigned long temp, chipset, gfx;
1331         int ret;
1332
1333         if (!IS_GEN5(dev))
1334                 return -ENODEV;
1335
1336         ret = mutex_lock_interruptible(&dev->struct_mutex);
1337         if (ret)
1338                 return ret;
1339
1340         temp = i915_mch_val(dev_priv);
1341         chipset = i915_chipset_val(dev_priv);
1342         gfx = i915_gfx_val(dev_priv);
1343         mutex_unlock(&dev->struct_mutex);
1344
1345         seq_printf(m, "GMCH temp: %ld\n", temp);
1346         seq_printf(m, "Chipset power: %ld\n", chipset);
1347         seq_printf(m, "GFX power: %ld\n", gfx);
1348         seq_printf(m, "Total power: %ld\n", chipset + gfx);
1349
1350         return 0;
1351 }
1352
1353 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1354 {
1355         struct drm_info_node *node = (struct drm_info_node *) m->private;
1356         struct drm_device *dev = node->minor->dev;
1357         drm_i915_private_t *dev_priv = dev->dev_private;
1358         int ret;
1359         int gpu_freq, ia_freq;
1360
1361         if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1362                 seq_printf(m, "unsupported on this chipset\n");
1363                 return 0;
1364         }
1365
1366         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1367         if (ret)
1368                 return ret;
1369
1370         seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1371
1372         for (gpu_freq = dev_priv->rps.min_delay;
1373              gpu_freq <= dev_priv->rps.max_delay;
1374              gpu_freq++) {
1375                 ia_freq = gpu_freq;
1376                 sandybridge_pcode_read(dev_priv,
1377                                        GEN6_PCODE_READ_MIN_FREQ_TABLE,
1378                                        &ia_freq);
1379                 seq_printf(m, "%d\t\t%d\n", gpu_freq * GT_FREQUENCY_MULTIPLIER, ia_freq * 100);
1380         }
1381
1382         mutex_unlock(&dev_priv->rps.hw_lock);
1383
1384         return 0;
1385 }
1386
1387 static int i915_gfxec(struct seq_file *m, void *unused)
1388 {
1389         struct drm_info_node *node = (struct drm_info_node *) m->private;
1390         struct drm_device *dev = node->minor->dev;
1391         drm_i915_private_t *dev_priv = dev->dev_private;
1392         int ret;
1393
1394         ret = mutex_lock_interruptible(&dev->struct_mutex);
1395         if (ret)
1396                 return ret;
1397
1398         seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1399
1400         mutex_unlock(&dev->struct_mutex);
1401
1402         return 0;
1403 }
1404
1405 static int i915_opregion(struct seq_file *m, void *unused)
1406 {
1407         struct drm_info_node *node = (struct drm_info_node *) m->private;
1408         struct drm_device *dev = node->minor->dev;
1409         drm_i915_private_t *dev_priv = dev->dev_private;
1410         struct intel_opregion *opregion = &dev_priv->opregion;
1411         void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1412         int ret;
1413
1414         if (data == NULL)
1415                 return -ENOMEM;
1416
1417         ret = mutex_lock_interruptible(&dev->struct_mutex);
1418         if (ret)
1419                 goto out;
1420
1421         if (opregion->header) {
1422                 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1423                 seq_write(m, data, OPREGION_SIZE);
1424         }
1425
1426         mutex_unlock(&dev->struct_mutex);
1427
1428 out:
1429         kfree(data);
1430         return 0;
1431 }
1432
1433 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1434 {
1435         struct drm_info_node *node = (struct drm_info_node *) m->private;
1436         struct drm_device *dev = node->minor->dev;
1437         drm_i915_private_t *dev_priv = dev->dev_private;
1438         struct intel_fbdev *ifbdev;
1439         struct intel_framebuffer *fb;
1440         int ret;
1441
1442         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1443         if (ret)
1444                 return ret;
1445
1446         ifbdev = dev_priv->fbdev;
1447         fb = to_intel_framebuffer(ifbdev->helper.fb);
1448
1449         seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1450                    fb->base.width,
1451                    fb->base.height,
1452                    fb->base.depth,
1453                    fb->base.bits_per_pixel,
1454                    atomic_read(&fb->base.refcount.refcount));
1455         describe_obj(m, fb->obj);
1456         seq_printf(m, "\n");
1457         mutex_unlock(&dev->mode_config.mutex);
1458
1459         mutex_lock(&dev->mode_config.fb_lock);
1460         list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1461                 if (&fb->base == ifbdev->helper.fb)
1462                         continue;
1463
1464                 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1465                            fb->base.width,
1466                            fb->base.height,
1467                            fb->base.depth,
1468                            fb->base.bits_per_pixel,
1469                            atomic_read(&fb->base.refcount.refcount));
1470                 describe_obj(m, fb->obj);
1471                 seq_printf(m, "\n");
1472         }
1473         mutex_unlock(&dev->mode_config.fb_lock);
1474
1475         return 0;
1476 }
1477
1478 static int i915_context_status(struct seq_file *m, void *unused)
1479 {
1480         struct drm_info_node *node = (struct drm_info_node *) m->private;
1481         struct drm_device *dev = node->minor->dev;
1482         drm_i915_private_t *dev_priv = dev->dev_private;
1483         struct intel_ring_buffer *ring;
1484         int ret, i;
1485
1486         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1487         if (ret)
1488                 return ret;
1489
1490         if (dev_priv->ips.pwrctx) {
1491                 seq_printf(m, "power context ");
1492                 describe_obj(m, dev_priv->ips.pwrctx);
1493                 seq_printf(m, "\n");
1494         }
1495
1496         if (dev_priv->ips.renderctx) {
1497                 seq_printf(m, "render context ");
1498                 describe_obj(m, dev_priv->ips.renderctx);
1499                 seq_printf(m, "\n");
1500         }
1501
1502         for_each_ring(ring, dev_priv, i) {
1503                 if (ring->default_context) {
1504                         seq_printf(m, "HW default context %s ring ", ring->name);
1505                         describe_obj(m, ring->default_context->obj);
1506                         seq_printf(m, "\n");
1507                 }
1508         }
1509
1510         mutex_unlock(&dev->mode_config.mutex);
1511
1512         return 0;
1513 }
1514
1515 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1516 {
1517         struct drm_info_node *node = (struct drm_info_node *) m->private;
1518         struct drm_device *dev = node->minor->dev;
1519         struct drm_i915_private *dev_priv = dev->dev_private;
1520         unsigned forcewake_count;
1521
1522         spin_lock_irq(&dev_priv->gt_lock);
1523         forcewake_count = dev_priv->forcewake_count;
1524         spin_unlock_irq(&dev_priv->gt_lock);
1525
1526         seq_printf(m, "forcewake count = %u\n", forcewake_count);
1527
1528         return 0;
1529 }
1530
1531 static const char *swizzle_string(unsigned swizzle)
1532 {
1533         switch(swizzle) {
1534         case I915_BIT_6_SWIZZLE_NONE:
1535                 return "none";
1536         case I915_BIT_6_SWIZZLE_9:
1537                 return "bit9";
1538         case I915_BIT_6_SWIZZLE_9_10:
1539                 return "bit9/bit10";
1540         case I915_BIT_6_SWIZZLE_9_11:
1541                 return "bit9/bit11";
1542         case I915_BIT_6_SWIZZLE_9_10_11:
1543                 return "bit9/bit10/bit11";
1544         case I915_BIT_6_SWIZZLE_9_17:
1545                 return "bit9/bit17";
1546         case I915_BIT_6_SWIZZLE_9_10_17:
1547                 return "bit9/bit10/bit17";
1548         case I915_BIT_6_SWIZZLE_UNKNOWN:
1549                 return "unknown";
1550         }
1551
1552         return "bug";
1553 }
1554
1555 static int i915_swizzle_info(struct seq_file *m, void *data)
1556 {
1557         struct drm_info_node *node = (struct drm_info_node *) m->private;
1558         struct drm_device *dev = node->minor->dev;
1559         struct drm_i915_private *dev_priv = dev->dev_private;
1560         int ret;
1561
1562         ret = mutex_lock_interruptible(&dev->struct_mutex);
1563         if (ret)
1564                 return ret;
1565
1566         seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1567                    swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1568         seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1569                    swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1570
1571         if (IS_GEN3(dev) || IS_GEN4(dev)) {
1572                 seq_printf(m, "DDC = 0x%08x\n",
1573                            I915_READ(DCC));
1574                 seq_printf(m, "C0DRB3 = 0x%04x\n",
1575                            I915_READ16(C0DRB3));
1576                 seq_printf(m, "C1DRB3 = 0x%04x\n",
1577                            I915_READ16(C1DRB3));
1578         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1579                 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1580                            I915_READ(MAD_DIMM_C0));
1581                 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1582                            I915_READ(MAD_DIMM_C1));
1583                 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1584                            I915_READ(MAD_DIMM_C2));
1585                 seq_printf(m, "TILECTL = 0x%08x\n",
1586                            I915_READ(TILECTL));
1587                 seq_printf(m, "ARB_MODE = 0x%08x\n",
1588                            I915_READ(ARB_MODE));
1589                 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1590                            I915_READ(DISP_ARB_CTL));
1591         }
1592         mutex_unlock(&dev->struct_mutex);
1593
1594         return 0;
1595 }
1596
1597 static int i915_ppgtt_info(struct seq_file *m, void *data)
1598 {
1599         struct drm_info_node *node = (struct drm_info_node *) m->private;
1600         struct drm_device *dev = node->minor->dev;
1601         struct drm_i915_private *dev_priv = dev->dev_private;
1602         struct intel_ring_buffer *ring;
1603         int i, ret;
1604
1605
1606         ret = mutex_lock_interruptible(&dev->struct_mutex);
1607         if (ret)
1608                 return ret;
1609         if (INTEL_INFO(dev)->gen == 6)
1610                 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1611
1612         for_each_ring(ring, dev_priv, i) {
1613                 seq_printf(m, "%s\n", ring->name);
1614                 if (INTEL_INFO(dev)->gen == 7)
1615                         seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1616                 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1617                 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1618                 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1619         }
1620         if (dev_priv->mm.aliasing_ppgtt) {
1621                 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1622
1623                 seq_printf(m, "aliasing PPGTT:\n");
1624                 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1625         }
1626         seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1627         mutex_unlock(&dev->struct_mutex);
1628
1629         return 0;
1630 }
1631
1632 static int i915_dpio_info(struct seq_file *m, void *data)
1633 {
1634         struct drm_info_node *node = (struct drm_info_node *) m->private;
1635         struct drm_device *dev = node->minor->dev;
1636         struct drm_i915_private *dev_priv = dev->dev_private;
1637         int ret;
1638
1639
1640         if (!IS_VALLEYVIEW(dev)) {
1641                 seq_printf(m, "unsupported\n");
1642                 return 0;
1643         }
1644
1645         ret = mutex_lock_interruptible(&dev_priv->dpio_lock);
1646         if (ret)
1647                 return ret;
1648
1649         seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1650
1651         seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1652                    intel_dpio_read(dev_priv, _DPIO_DIV_A));
1653         seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1654                    intel_dpio_read(dev_priv, _DPIO_DIV_B));
1655
1656         seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1657                    intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1658         seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1659                    intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1660
1661         seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1662                    intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1663         seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1664                    intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1665
1666         seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1667                    intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1668         seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1669                    intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1670
1671         seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1672                    intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1673
1674         mutex_unlock(&dev_priv->dpio_lock);
1675
1676         return 0;
1677 }
1678
1679 static ssize_t
1680 i915_wedged_read(struct file *filp,
1681                  char __user *ubuf,
1682                  size_t max,
1683                  loff_t *ppos)
1684 {
1685         struct drm_device *dev = filp->private_data;
1686         drm_i915_private_t *dev_priv = dev->dev_private;
1687         char buf[80];
1688         int len;
1689
1690         len = snprintf(buf, sizeof(buf),
1691                        "wedged :  %d\n",
1692                        atomic_read(&dev_priv->gpu_error.reset_counter));
1693
1694         if (len > sizeof(buf))
1695                 len = sizeof(buf);
1696
1697         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1698 }
1699
1700 static ssize_t
1701 i915_wedged_write(struct file *filp,
1702                   const char __user *ubuf,
1703                   size_t cnt,
1704                   loff_t *ppos)
1705 {
1706         struct drm_device *dev = filp->private_data;
1707         char buf[20];
1708         int val = 1;
1709
1710         if (cnt > 0) {
1711                 if (cnt > sizeof(buf) - 1)
1712                         return -EINVAL;
1713
1714                 if (copy_from_user(buf, ubuf, cnt))
1715                         return -EFAULT;
1716                 buf[cnt] = 0;
1717
1718                 val = simple_strtoul(buf, NULL, 0);
1719         }
1720
1721         DRM_INFO("Manually setting wedged to %d\n", val);
1722         i915_handle_error(dev, val);
1723
1724         return cnt;
1725 }
1726
1727 static const struct file_operations i915_wedged_fops = {
1728         .owner = THIS_MODULE,
1729         .open = simple_open,
1730         .read = i915_wedged_read,
1731         .write = i915_wedged_write,
1732         .llseek = default_llseek,
1733 };
1734
1735 static ssize_t
1736 i915_ring_stop_read(struct file *filp,
1737                     char __user *ubuf,
1738                     size_t max,
1739                     loff_t *ppos)
1740 {
1741         struct drm_device *dev = filp->private_data;
1742         drm_i915_private_t *dev_priv = dev->dev_private;
1743         char buf[20];
1744         int len;
1745
1746         len = snprintf(buf, sizeof(buf),
1747                        "0x%08x\n", dev_priv->gpu_error.stop_rings);
1748
1749         if (len > sizeof(buf))
1750                 len = sizeof(buf);
1751
1752         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1753 }
1754
1755 static ssize_t
1756 i915_ring_stop_write(struct file *filp,
1757                      const char __user *ubuf,
1758                      size_t cnt,
1759                      loff_t *ppos)
1760 {
1761         struct drm_device *dev = filp->private_data;
1762         struct drm_i915_private *dev_priv = dev->dev_private;
1763         char buf[20];
1764         int val = 0, ret;
1765
1766         if (cnt > 0) {
1767                 if (cnt > sizeof(buf) - 1)
1768                         return -EINVAL;
1769
1770                 if (copy_from_user(buf, ubuf, cnt))
1771                         return -EFAULT;
1772                 buf[cnt] = 0;
1773
1774                 val = simple_strtoul(buf, NULL, 0);
1775         }
1776
1777         DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1778
1779         ret = mutex_lock_interruptible(&dev->struct_mutex);
1780         if (ret)
1781                 return ret;
1782
1783         dev_priv->gpu_error.stop_rings = val;
1784         mutex_unlock(&dev->struct_mutex);
1785
1786         return cnt;
1787 }
1788
1789 static const struct file_operations i915_ring_stop_fops = {
1790         .owner = THIS_MODULE,
1791         .open = simple_open,
1792         .read = i915_ring_stop_read,
1793         .write = i915_ring_stop_write,
1794         .llseek = default_llseek,
1795 };
1796
1797 #define DROP_UNBOUND 0x1
1798 #define DROP_BOUND 0x2
1799 #define DROP_RETIRE 0x4
1800 #define DROP_ACTIVE 0x8
1801 #define DROP_ALL (DROP_UNBOUND | \
1802                   DROP_BOUND | \
1803                   DROP_RETIRE | \
1804                   DROP_ACTIVE)
1805 static ssize_t
1806 i915_drop_caches_read(struct file *filp,
1807                       char __user *ubuf,
1808                       size_t max,
1809                       loff_t *ppos)
1810 {
1811         char buf[20];
1812         int len;
1813
1814         len = snprintf(buf, sizeof(buf), "0x%08x\n", DROP_ALL);
1815         if (len > sizeof(buf))
1816                 len = sizeof(buf);
1817
1818         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1819 }
1820
1821 static ssize_t
1822 i915_drop_caches_write(struct file *filp,
1823                        const char __user *ubuf,
1824                        size_t cnt,
1825                        loff_t *ppos)
1826 {
1827         struct drm_device *dev = filp->private_data;
1828         struct drm_i915_private *dev_priv = dev->dev_private;
1829         struct drm_i915_gem_object *obj, *next;
1830         char buf[20];
1831         int val = 0, ret;
1832
1833         if (cnt > 0) {
1834                 if (cnt > sizeof(buf) - 1)
1835                         return -EINVAL;
1836
1837                 if (copy_from_user(buf, ubuf, cnt))
1838                         return -EFAULT;
1839                 buf[cnt] = 0;
1840
1841                 val = simple_strtoul(buf, NULL, 0);
1842         }
1843
1844         DRM_DEBUG_DRIVER("Dropping caches: 0x%08x\n", val);
1845
1846         /* No need to check and wait for gpu resets, only libdrm auto-restarts
1847          * on ioctls on -EAGAIN. */
1848         ret = mutex_lock_interruptible(&dev->struct_mutex);
1849         if (ret)
1850                 return ret;
1851
1852         if (val & DROP_ACTIVE) {
1853                 ret = i915_gpu_idle(dev);
1854                 if (ret)
1855                         goto unlock;
1856         }
1857
1858         if (val & (DROP_RETIRE | DROP_ACTIVE))
1859                 i915_gem_retire_requests(dev);
1860
1861         if (val & DROP_BOUND) {
1862                 list_for_each_entry_safe(obj, next, &dev_priv->mm.inactive_list, mm_list)
1863                         if (obj->pin_count == 0) {
1864                                 ret = i915_gem_object_unbind(obj);
1865                                 if (ret)
1866                                         goto unlock;
1867                         }
1868         }
1869
1870         if (val & DROP_UNBOUND) {
1871                 list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list, gtt_list)
1872                         if (obj->pages_pin_count == 0) {
1873                                 ret = i915_gem_object_put_pages(obj);
1874                                 if (ret)
1875                                         goto unlock;
1876                         }
1877         }
1878
1879 unlock:
1880         mutex_unlock(&dev->struct_mutex);
1881
1882         return ret ?: cnt;
1883 }
1884
1885 static const struct file_operations i915_drop_caches_fops = {
1886         .owner = THIS_MODULE,
1887         .open = simple_open,
1888         .read = i915_drop_caches_read,
1889         .write = i915_drop_caches_write,
1890         .llseek = default_llseek,
1891 };
1892
1893 static ssize_t
1894 i915_max_freq_read(struct file *filp,
1895                    char __user *ubuf,
1896                    size_t max,
1897                    loff_t *ppos)
1898 {
1899         struct drm_device *dev = filp->private_data;
1900         drm_i915_private_t *dev_priv = dev->dev_private;
1901         char buf[80];
1902         int len, ret;
1903
1904         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1905                 return -ENODEV;
1906
1907         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1908         if (ret)
1909                 return ret;
1910
1911         len = snprintf(buf, sizeof(buf),
1912                        "max freq: %d\n", dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER);
1913         mutex_unlock(&dev_priv->rps.hw_lock);
1914
1915         if (len > sizeof(buf))
1916                 len = sizeof(buf);
1917
1918         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1919 }
1920
1921 static ssize_t
1922 i915_max_freq_write(struct file *filp,
1923                   const char __user *ubuf,
1924                   size_t cnt,
1925                   loff_t *ppos)
1926 {
1927         struct drm_device *dev = filp->private_data;
1928         struct drm_i915_private *dev_priv = dev->dev_private;
1929         char buf[20];
1930         int val = 1, ret;
1931
1932         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1933                 return -ENODEV;
1934
1935         if (cnt > 0) {
1936                 if (cnt > sizeof(buf) - 1)
1937                         return -EINVAL;
1938
1939                 if (copy_from_user(buf, ubuf, cnt))
1940                         return -EFAULT;
1941                 buf[cnt] = 0;
1942
1943                 val = simple_strtoul(buf, NULL, 0);
1944         }
1945
1946         DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1947
1948         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1949         if (ret)
1950                 return ret;
1951
1952         /*
1953          * Turbo will still be enabled, but won't go above the set value.
1954          */
1955         dev_priv->rps.max_delay = val / GT_FREQUENCY_MULTIPLIER;
1956
1957         gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
1958         mutex_unlock(&dev_priv->rps.hw_lock);
1959
1960         return cnt;
1961 }
1962
1963 static const struct file_operations i915_max_freq_fops = {
1964         .owner = THIS_MODULE,
1965         .open = simple_open,
1966         .read = i915_max_freq_read,
1967         .write = i915_max_freq_write,
1968         .llseek = default_llseek,
1969 };
1970
1971 static ssize_t
1972 i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1973                    loff_t *ppos)
1974 {
1975         struct drm_device *dev = filp->private_data;
1976         drm_i915_private_t *dev_priv = dev->dev_private;
1977         char buf[80];
1978         int len, ret;
1979
1980         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1981                 return -ENODEV;
1982
1983         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1984         if (ret)
1985                 return ret;
1986
1987         len = snprintf(buf, sizeof(buf),
1988                        "min freq: %d\n", dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER);
1989         mutex_unlock(&dev_priv->rps.hw_lock);
1990
1991         if (len > sizeof(buf))
1992                 len = sizeof(buf);
1993
1994         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1995 }
1996
1997 static ssize_t
1998 i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1999                     loff_t *ppos)
2000 {
2001         struct drm_device *dev = filp->private_data;
2002         struct drm_i915_private *dev_priv = dev->dev_private;
2003         char buf[20];
2004         int val = 1, ret;
2005
2006         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2007                 return -ENODEV;
2008
2009         if (cnt > 0) {
2010                 if (cnt > sizeof(buf) - 1)
2011                         return -EINVAL;
2012
2013                 if (copy_from_user(buf, ubuf, cnt))
2014                         return -EFAULT;
2015                 buf[cnt] = 0;
2016
2017                 val = simple_strtoul(buf, NULL, 0);
2018         }
2019
2020         DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
2021
2022         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2023         if (ret)
2024                 return ret;
2025
2026         /*
2027          * Turbo will still be enabled, but won't go below the set value.
2028          */
2029         dev_priv->rps.min_delay = val / GT_FREQUENCY_MULTIPLIER;
2030
2031         gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
2032         mutex_unlock(&dev_priv->rps.hw_lock);
2033
2034         return cnt;
2035 }
2036
2037 static const struct file_operations i915_min_freq_fops = {
2038         .owner = THIS_MODULE,
2039         .open = simple_open,
2040         .read = i915_min_freq_read,
2041         .write = i915_min_freq_write,
2042         .llseek = default_llseek,
2043 };
2044
2045 static ssize_t
2046 i915_cache_sharing_read(struct file *filp,
2047                    char __user *ubuf,
2048                    size_t max,
2049                    loff_t *ppos)
2050 {
2051         struct drm_device *dev = filp->private_data;
2052         drm_i915_private_t *dev_priv = dev->dev_private;
2053         char buf[80];
2054         u32 snpcr;
2055         int len, ret;
2056
2057         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2058                 return -ENODEV;
2059
2060         ret = mutex_lock_interruptible(&dev->struct_mutex);
2061         if (ret)
2062                 return ret;
2063
2064         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
2065         mutex_unlock(&dev_priv->dev->struct_mutex);
2066
2067         len = snprintf(buf, sizeof(buf),
2068                        "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
2069                        GEN6_MBC_SNPCR_SHIFT);
2070
2071         if (len > sizeof(buf))
2072                 len = sizeof(buf);
2073
2074         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
2075 }
2076
2077 static ssize_t
2078 i915_cache_sharing_write(struct file *filp,
2079                   const char __user *ubuf,
2080                   size_t cnt,
2081                   loff_t *ppos)
2082 {
2083         struct drm_device *dev = filp->private_data;
2084         struct drm_i915_private *dev_priv = dev->dev_private;
2085         char buf[20];
2086         u32 snpcr;
2087         int val = 1;
2088
2089         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2090                 return -ENODEV;
2091
2092         if (cnt > 0) {
2093                 if (cnt > sizeof(buf) - 1)
2094                         return -EINVAL;
2095
2096                 if (copy_from_user(buf, ubuf, cnt))
2097                         return -EFAULT;
2098                 buf[cnt] = 0;
2099
2100                 val = simple_strtoul(buf, NULL, 0);
2101         }
2102
2103         if (val < 0 || val > 3)
2104                 return -EINVAL;
2105
2106         DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
2107
2108         /* Update the cache sharing policy here as well */
2109         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
2110         snpcr &= ~GEN6_MBC_SNPCR_MASK;
2111         snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
2112         I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
2113
2114         return cnt;
2115 }
2116
2117 static const struct file_operations i915_cache_sharing_fops = {
2118         .owner = THIS_MODULE,
2119         .open = simple_open,
2120         .read = i915_cache_sharing_read,
2121         .write = i915_cache_sharing_write,
2122         .llseek = default_llseek,
2123 };
2124
2125 /* As the drm_debugfs_init() routines are called before dev->dev_private is
2126  * allocated we need to hook into the minor for release. */
2127 static int
2128 drm_add_fake_info_node(struct drm_minor *minor,
2129                        struct dentry *ent,
2130                        const void *key)
2131 {
2132         struct drm_info_node *node;
2133
2134         node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
2135         if (node == NULL) {
2136                 debugfs_remove(ent);
2137                 return -ENOMEM;
2138         }
2139
2140         node->minor = minor;
2141         node->dent = ent;
2142         node->info_ent = (void *) key;
2143
2144         mutex_lock(&minor->debugfs_lock);
2145         list_add(&node->list, &minor->debugfs_list);
2146         mutex_unlock(&minor->debugfs_lock);
2147
2148         return 0;
2149 }
2150
2151 static int i915_forcewake_open(struct inode *inode, struct file *file)
2152 {
2153         struct drm_device *dev = inode->i_private;
2154         struct drm_i915_private *dev_priv = dev->dev_private;
2155
2156         if (INTEL_INFO(dev)->gen < 6)
2157                 return 0;
2158
2159         gen6_gt_force_wake_get(dev_priv);
2160
2161         return 0;
2162 }
2163
2164 static int i915_forcewake_release(struct inode *inode, struct file *file)
2165 {
2166         struct drm_device *dev = inode->i_private;
2167         struct drm_i915_private *dev_priv = dev->dev_private;
2168
2169         if (INTEL_INFO(dev)->gen < 6)
2170                 return 0;
2171
2172         gen6_gt_force_wake_put(dev_priv);
2173
2174         return 0;
2175 }
2176
2177 static const struct file_operations i915_forcewake_fops = {
2178         .owner = THIS_MODULE,
2179         .open = i915_forcewake_open,
2180         .release = i915_forcewake_release,
2181 };
2182
2183 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
2184 {
2185         struct drm_device *dev = minor->dev;
2186         struct dentry *ent;
2187
2188         ent = debugfs_create_file("i915_forcewake_user",
2189                                   S_IRUSR,
2190                                   root, dev,
2191                                   &i915_forcewake_fops);
2192         if (IS_ERR(ent))
2193                 return PTR_ERR(ent);
2194
2195         return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
2196 }
2197
2198 static int i915_debugfs_create(struct dentry *root,
2199                                struct drm_minor *minor,
2200                                const char *name,
2201                                const struct file_operations *fops)
2202 {
2203         struct drm_device *dev = minor->dev;
2204         struct dentry *ent;
2205
2206         ent = debugfs_create_file(name,
2207                                   S_IRUGO | S_IWUSR,
2208                                   root, dev,
2209                                   fops);
2210         if (IS_ERR(ent))
2211                 return PTR_ERR(ent);
2212
2213         return drm_add_fake_info_node(minor, ent, fops);
2214 }
2215
2216 static struct drm_info_list i915_debugfs_list[] = {
2217         {"i915_capabilities", i915_capabilities, 0},
2218         {"i915_gem_objects", i915_gem_object_info, 0},
2219         {"i915_gem_gtt", i915_gem_gtt_info, 0},
2220         {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2221         {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2222         {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2223         {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2224         {"i915_gem_request", i915_gem_request_info, 0},
2225         {"i915_gem_seqno", i915_gem_seqno_info, 0},
2226         {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2227         {"i915_gem_interrupt", i915_interrupt_info, 0},
2228         {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2229         {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2230         {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2231         {"i915_rstdby_delays", i915_rstdby_delays, 0},
2232         {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2233         {"i915_delayfreq_table", i915_delayfreq_table, 0},
2234         {"i915_inttoext_table", i915_inttoext_table, 0},
2235         {"i915_drpc_info", i915_drpc_info, 0},
2236         {"i915_emon_status", i915_emon_status, 0},
2237         {"i915_ring_freq_table", i915_ring_freq_table, 0},
2238         {"i915_gfxec", i915_gfxec, 0},
2239         {"i915_fbc_status", i915_fbc_status, 0},
2240         {"i915_sr_status", i915_sr_status, 0},
2241         {"i915_opregion", i915_opregion, 0},
2242         {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2243         {"i915_context_status", i915_context_status, 0},
2244         {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2245         {"i915_swizzle_info", i915_swizzle_info, 0},
2246         {"i915_ppgtt_info", i915_ppgtt_info, 0},
2247         {"i915_dpio", i915_dpio_info, 0},
2248 };
2249 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2250
2251 int i915_debugfs_init(struct drm_minor *minor)
2252 {
2253         int ret;
2254
2255         ret = i915_debugfs_create(minor->debugfs_root, minor,
2256                                   "i915_wedged",
2257                                   &i915_wedged_fops);
2258         if (ret)
2259                 return ret;
2260
2261         ret = i915_forcewake_create(minor->debugfs_root, minor);
2262         if (ret)
2263                 return ret;
2264
2265         ret = i915_debugfs_create(minor->debugfs_root, minor,
2266                                   "i915_max_freq",
2267                                   &i915_max_freq_fops);
2268         if (ret)
2269                 return ret;
2270
2271         ret = i915_debugfs_create(minor->debugfs_root, minor,
2272                                   "i915_min_freq",
2273                                   &i915_min_freq_fops);
2274         if (ret)
2275                 return ret;
2276
2277         ret = i915_debugfs_create(minor->debugfs_root, minor,
2278                                   "i915_cache_sharing",
2279                                   &i915_cache_sharing_fops);
2280         if (ret)
2281                 return ret;
2282
2283         ret = i915_debugfs_create(minor->debugfs_root, minor,
2284                                   "i915_ring_stop",
2285                                   &i915_ring_stop_fops);
2286         if (ret)
2287                 return ret;
2288
2289         ret = i915_debugfs_create(minor->debugfs_root, minor,
2290                                   "i915_gem_drop_caches",
2291                                   &i915_drop_caches_fops);
2292         if (ret)
2293                 return ret;
2294
2295         ret = i915_debugfs_create(minor->debugfs_root, minor,
2296                                   "i915_error_state",
2297                                   &i915_error_state_fops);
2298         if (ret)
2299                 return ret;
2300
2301         ret = i915_debugfs_create(minor->debugfs_root, minor,
2302                                  "i915_next_seqno",
2303                                  &i915_next_seqno_fops);
2304         if (ret)
2305                 return ret;
2306
2307         return drm_debugfs_create_files(i915_debugfs_list,
2308                                         I915_DEBUGFS_ENTRIES,
2309                                         minor->debugfs_root, minor);
2310 }
2311
2312 void i915_debugfs_cleanup(struct drm_minor *minor)
2313 {
2314         drm_debugfs_remove_files(i915_debugfs_list,
2315                                  I915_DEBUGFS_ENTRIES, minor);
2316         drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2317                                  1, minor);
2318         drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2319                                  1, minor);
2320         drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2321                                  1, minor);
2322         drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2323                                  1, minor);
2324         drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2325                                  1, minor);
2326         drm_debugfs_remove_files((struct drm_info_list *) &i915_drop_caches_fops,
2327                                  1, minor);
2328         drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2329                                  1, minor);
2330         drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2331                                  1, minor);
2332         drm_debugfs_remove_files((struct drm_info_list *) &i915_next_seqno_fops,
2333                                  1, minor);
2334 }
2335
2336 #endif /* CONFIG_DEBUG_FS */