3 .\" Copyright (c) 1996 A.R.Gordon, andrew.gordon@net-tel.co.uk
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30 .\" Id: man4.i386/lp.4,v 1.9 1999/02/14 12:06:16 nsouch Exp
31 .\" $FreeBSD: src/share/man/man4/lp.4,v 1.5.2.3 2000/12/29 10:18:00 ru Exp $
38 .Nd printer port Internet Protocol driver
42 .Ar myaddress hisaddress
47 .Cd "device ppc0 at isa? port? irq 7"
51 driver allows a PC parallel printer port to be used as a
52 point-to-point network interface between two similarly configured systems.
53 Data is transferred 4 bits at a time, using the printer status lines for
54 input: hence there is no requirement for special bidirectional hardware
55 and any standard AT-compatible printer port with working interrupts may be used.
57 During the boot process, for each
59 device which is probed and has an interrupt assigned, a corresponding
67 causes the corresponding
69 to be reserved for PLIP until the network interface is configured 'down'.
71 The communication protocol is selected by the
78 mode (LPIP). This is the simpler of the two modes
79 and therefore slightly more efficient.
81 Use Crynwr/Linux compatible mode (CLPIP). This mode has a simulated ethernet
82 packet header, and is easier to interface to other types of equipment.
85 The interface MTU defaults to 1500, but may be set to any value. Both ends
86 of the link must be configured with the same MTU.
88 The cable connecting the two parallel ports should be wired as follows:
104 Cables with this wiring are widely available as 'Laplink' cables, and
105 are often coloured yellow.
107 The connections are symmetric, and provide 5 lines in each direction (four
108 data plus one handshake). The two modes use the same wiring, but make a
109 different choice of which line to use as handshake.
111 The signal lines are used as follows:
112 .Bl -tag -width dataxxxx(Pinxx)
123 .It Em ERROR* (pin 15)
135 When idle, all data lines are at zero. Each byte is signalled in four steps:
136 sender writes the 4 most significant bits and raises the handshake line;
137 receiver reads the 4 bits and raises its handshake to acknowledge;
138 sender places the 4 least significant bits on the data lines and lowers
139 the handshake; receiver reads the data and lowers its handshake.
141 The packet format has a two-byte header, comprising the fixed values 0x08,
142 0x00, immediately followed by the IP header and data.
144 The start of a packet is indicated by simply signalling the first byte
145 of the header. The end of the packet is indicated by inverting
146 the data lines (ie. writing the ones-complement of the previous nibble
147 to be transmitted) without changing the state of the handshake.
149 Note that the end-of-packet marker assumes that the handshake signal and
150 the data-out bits can be written in a single instruction - otherwise
151 certain byte values in the packet data would falsely be interpreted
152 as end-of-packet. This is not a problem for the PC printer port,
153 but requires care when implementing this protocol on other equipment.
154 .Ss Crynwr/Linux CLPIP mode
155 The signal lines are used as follows:
156 .Bl -tag -width dataxxxx(Pinxx)
167 .It Em ERROR* (pin 15)
179 When idle, all data lines are at zero. Each byte is signalled in four steps:
180 sender writes the 4 least significant bits and raises the handshake line;
181 receiver reads the 4 bits and raises its handshake to acknowledge;
182 sender places the 4 most significant bits on the data lines and lowers
183 the handshake; receiver reads the data and lowers its handshake.
184 [Note that this is the opposite nibble order to LPIP mode].
188 Length (least significant byte)
189 Length (most significant byte)
190 12 bytes of supposed MAC addresses (ignored by
198 The length includes the 14 header bytes, but not the length bytes themselves
199 nor the checksum byte.
201 The checksum is a simple arithmetic sum of all the bytes (again, including
202 the header but not checksum or length bytes).
205 outgoing checksums, but does not validate incoming ones.
207 The start of packet has to be signalled specially, since the line chosen
208 for handshake-in cannot be used to generate an interrupt. The sender
209 writes the value 0x08 to the data lines, and waits for the receiver
210 to respond by writing 0x01 to its data lines. The sender then starts
211 signalling the first byte of the packet (the length byte).
213 End of packet is deduced from the packet length and is not signalled
214 specially (although the data lines are restored to the zero, idle
215 state to avoid spuriously indicating the start of the next packet).
221 Busy-waiting loops are used while handshaking bytes, (and worse still when
222 waiting for the receiving system to respond to an interrupt for the start
223 of a packet). Hence a fast system talking to a slow one will consume
224 excessive amounts of CPU. This is unavoidable in the case of CLPIP mode
225 due to the choice of handshake lines; it could theoretically be improved
226 in the case of LPIP mode.
228 Polling timeouts are controlled by counting loop iterations rather than
229 timers, and so are dependent on CPU speed. This is somewhat stabilised
230 by the need to perform (slow) ISA bus cycles to actually read the port.