sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2008, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  71  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  72  *   the hardware interrupt in order to avoid handler execution races from
  73  *   scheduled interrupt threads.
  74  */
  75
  76 #include "opt_ifpoll.h"
  77
  78 #include <sys/param.h>
  79 #include <sys/bus.h>
  80 #include <sys/endian.h>
  81 #include <sys/interrupt.h>
  82 #include <sys/kernel.h>
  83 #include <sys/ktr.h>
  84 #include <sys/malloc.h>
  85 #include <sys/mbuf.h>
  86 #include <sys/proc.h>
  87 #include <sys/rman.h>
  88 #include <sys/serialize.h>
  89 #include <sys/socket.h>
  90 #include <sys/sockio.h>
  91 #include <sys/sysctl.h>
  92 #include <sys/systm.h>
  93
  94 #include <net/bpf.h>
  95 #include <net/ethernet.h>
  96 #include <net/if.h>
  97 #include <net/if_arp.h>
  98 #include <net/if_dl.h>
  99 #include <net/if_media.h>
 100 #include <net/if_poll.h>
 101 #include <net/ifq_var.h>
 102 #include <net/vlan/if_vlan_var.h>
 103 #include <net/vlan/if_vlan_ether.h>
 104
 105 #include <netinet/ip.h>
 106 #include <netinet/tcp.h>
 107 #include <netinet/udp.h>
 108
 109 #include <bus/pci/pcivar.h>
 110 #include <bus/pci/pcireg.h>
 111
 112 #include <dev/netif/ig_hal/e1000_api.h>
 113 #include <dev/netif/ig_hal/e1000_82571.h>
 114 #include <dev/netif/em/if_em.h>
 115
 116 #define DEBUG_HW 0
 117
 118 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 119 #define EM_VER  " 7.3.8"
 120
 121 #define _EM_DEVICE(id, ret)     \
 122         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 123 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 124 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 125 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 126
 127 static const struct em_vendor_info em_vendor_info_array[] = {
 128         EM_DEVICE(82540EM),
 129         EM_DEVICE(82540EM_LOM),
 130         EM_DEVICE(82540EP),
 131         EM_DEVICE(82540EP_LOM),
 132         EM_DEVICE(82540EP_LP),
 133
 134         EM_DEVICE(82541EI),
 135         EM_DEVICE(82541ER),
 136         EM_DEVICE(82541ER_LOM),
 137         EM_DEVICE(82541EI_MOBILE),
 138         EM_DEVICE(82541GI),
 139         EM_DEVICE(82541GI_LF),
 140         EM_DEVICE(82541GI_MOBILE),
 141
 142         EM_DEVICE(82542),
 143
 144         EM_DEVICE(82543GC_FIBER),
 145         EM_DEVICE(82543GC_COPPER),
 146
 147         EM_DEVICE(82544EI_COPPER),
 148         EM_DEVICE(82544EI_FIBER),
 149         EM_DEVICE(82544GC_COPPER),
 150         EM_DEVICE(82544GC_LOM),
 151
 152         EM_DEVICE(82545EM_COPPER),
 153         EM_DEVICE(82545EM_FIBER),
 154         EM_DEVICE(82545GM_COPPER),
 155         EM_DEVICE(82545GM_FIBER),
 156         EM_DEVICE(82545GM_SERDES),
 157
 158         EM_DEVICE(82546EB_COPPER),
 159         EM_DEVICE(82546EB_FIBER),
 160         EM_DEVICE(82546EB_QUAD_COPPER),
 161         EM_DEVICE(82546GB_COPPER),
 162         EM_DEVICE(82546GB_FIBER),
 163         EM_DEVICE(82546GB_SERDES),
 164         EM_DEVICE(82546GB_PCIE),
 165         EM_DEVICE(82546GB_QUAD_COPPER),
 166         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 167
 168         EM_DEVICE(82547EI),
 169         EM_DEVICE(82547EI_MOBILE),
 170         EM_DEVICE(82547GI),
 171
 172         EM_EMX_DEVICE(82571EB_COPPER),
 173         EM_EMX_DEVICE(82571EB_FIBER),
 174         EM_EMX_DEVICE(82571EB_SERDES),
 175         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 176         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 177         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 178         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 179         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 180         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 181         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 182
 183         EM_EMX_DEVICE(82572EI_COPPER),
 184         EM_EMX_DEVICE(82572EI_FIBER),
 185         EM_EMX_DEVICE(82572EI_SERDES),
 186         EM_EMX_DEVICE(82572EI),
 187
 188         EM_EMX_DEVICE(82573E),
 189         EM_EMX_DEVICE(82573E_IAMT),
 190         EM_EMX_DEVICE(82573L),
 191
 192         EM_DEVICE(82583V),
 193
 194         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 195         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 196         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 197         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 198
 199         EM_DEVICE(ICH8_IGP_M_AMT),
 200         EM_DEVICE(ICH8_IGP_AMT),
 201         EM_DEVICE(ICH8_IGP_C),
 202         EM_DEVICE(ICH8_IFE),
 203         EM_DEVICE(ICH8_IFE_GT),
 204         EM_DEVICE(ICH8_IFE_G),
 205         EM_DEVICE(ICH8_IGP_M),
 206         EM_DEVICE(ICH8_82567V_3),
 207
 208         EM_DEVICE(ICH9_IGP_M_AMT),
 209         EM_DEVICE(ICH9_IGP_AMT),
 210         EM_DEVICE(ICH9_IGP_C),
 211         EM_DEVICE(ICH9_IGP_M),
 212         EM_DEVICE(ICH9_IGP_M_V),
 213         EM_DEVICE(ICH9_IFE),
 214         EM_DEVICE(ICH9_IFE_GT),
 215         EM_DEVICE(ICH9_IFE_G),
 216         EM_DEVICE(ICH9_BM),
 217
 218         EM_EMX_DEVICE(82574L),
 219         EM_EMX_DEVICE(82574LA),
 220
 221         EM_DEVICE(ICH10_R_BM_LM),
 222         EM_DEVICE(ICH10_R_BM_LF),
 223         EM_DEVICE(ICH10_R_BM_V),
 224         EM_DEVICE(ICH10_D_BM_LM),
 225         EM_DEVICE(ICH10_D_BM_LF),
 226         EM_DEVICE(ICH10_D_BM_V),
 227
 228         EM_DEVICE(PCH_M_HV_LM),
 229         EM_DEVICE(PCH_M_HV_LC),
 230         EM_DEVICE(PCH_D_HV_DM),
 231         EM_DEVICE(PCH_D_HV_DC),
 232
 233         EM_DEVICE(PCH2_LV_LM),
 234         EM_DEVICE(PCH2_LV_V),
 235
 236         EM_DEVICE(PCH_LPT_I217_LM),
 237         EM_DEVICE(PCH_LPT_I217_V),
 238         EM_DEVICE(PCH_LPTLP_I218_LM),
 239         EM_DEVICE(PCH_LPTLP_I218_V),
 240
 241         /* required last entry */
 242         EM_DEVICE_NULL
 243 };
 244
 245 static int      em_probe(device_t);
 246 static int      em_attach(device_t);
 247 static int      em_detach(device_t);
 248 static int      em_shutdown(device_t);
 249 static int      em_suspend(device_t);
 250 static int      em_resume(device_t);
 251
 252 static void     em_init(void *);
 253 static void     em_stop(struct adapter *);
 254 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 255 static void     em_start(struct ifnet *, struct ifaltq_subque *);
 256 #ifdef IFPOLL_ENABLE
 257 static void     em_npoll(struct ifnet *, struct ifpoll_info *);
 258 static void     em_npoll_compat(struct ifnet *, void *, int);
 259 #endif
 260 static void     em_watchdog(struct ifnet *);
 261 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 262 static int      em_media_change(struct ifnet *);
 263 static void     em_timer(void *);
 264
 265 static void     em_intr(void *);
 266 static void     em_intr_mask(void *);
 267 static void     em_intr_body(struct adapter *, boolean_t);
 268 static void     em_rxeof(struct adapter *, int);
 269 static void     em_txeof(struct adapter *);
 270 static void     em_tx_collect(struct adapter *);
 271 static void     em_tx_purge(struct adapter *);
 272 static void     em_enable_intr(struct adapter *);
 273 static void     em_disable_intr(struct adapter *);
 274
 275 static int      em_dma_malloc(struct adapter *, bus_size_t,
 276                     struct em_dma_alloc *);
 277 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 278 static void     em_init_tx_ring(struct adapter *);
 279 static int      em_init_rx_ring(struct adapter *);
 280 static int      em_create_tx_ring(struct adapter *);
 281 static int      em_create_rx_ring(struct adapter *);
 282 static void     em_destroy_tx_ring(struct adapter *, int);
 283 static void     em_destroy_rx_ring(struct adapter *, int);
 284 static int      em_newbuf(struct adapter *, int, int);
 285 static int      em_encap(struct adapter *, struct mbuf **, int *, int *);
 286 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 287                     struct mbuf *);
 288 static int      em_txcsum(struct adapter *, struct mbuf *,
 289                     uint32_t *, uint32_t *);
 290 static int      em_tso_pullup(struct adapter *, struct mbuf **);
 291 static int      em_tso_setup(struct adapter *, struct mbuf *,
 292                     uint32_t *, uint32_t *);
 293
 294 static int      em_get_hw_info(struct adapter *);
 295 static int      em_is_valid_eaddr(const uint8_t *);
 296 static int      em_alloc_pci_res(struct adapter *);
 297 static void     em_free_pci_res(struct adapter *);
 298 static int      em_reset(struct adapter *);
 299 static void     em_setup_ifp(struct adapter *);
 300 static void     em_init_tx_unit(struct adapter *);
 301 static void     em_init_rx_unit(struct adapter *);
 302 static void     em_update_stats(struct adapter *);
 303 static void     em_set_promisc(struct adapter *);
 304 static void     em_disable_promisc(struct adapter *);
 305 static void     em_set_multi(struct adapter *);
 306 static void     em_update_link_status(struct adapter *);
 307 static void     em_smartspeed(struct adapter *);
 308 static void     em_set_itr(struct adapter *, uint32_t);
 309 static void     em_disable_aspm(struct adapter *);
 310
 311 /* Hardware workarounds */
 312 static int      em_82547_fifo_workaround(struct adapter *, int);
 313 static void     em_82547_update_fifo_head(struct adapter *, int);
 314 static int      em_82547_tx_fifo_reset(struct adapter *);
 315 static void     em_82547_move_tail(void *);
 316 static void     em_82547_move_tail_serialized(struct adapter *);
 317 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 318
 319 static void     em_print_debug_info(struct adapter *);
 320 static void     em_print_nvm_info(struct adapter *);
 321 static void     em_print_hw_stats(struct adapter *);
 322
 323 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 324 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 325 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 326 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 327 static void     em_add_sysctl(struct adapter *adapter);
 328
 329 /* Management and WOL Support */
 330 static void     em_get_mgmt(struct adapter *);
 331 static void     em_rel_mgmt(struct adapter *);
 332 static void     em_get_hw_control(struct adapter *);
 333 static void     em_rel_hw_control(struct adapter *);
 334 static void     em_enable_wol(device_t);
 335
 336 static device_method_t em_methods[] = {
 337         /* Device interface */
 338         DEVMETHOD(device_probe,         em_probe),
 339         DEVMETHOD(device_attach,        em_attach),
 340         DEVMETHOD(device_detach,        em_detach),
 341         DEVMETHOD(device_shutdown,      em_shutdown),
 342         DEVMETHOD(device_suspend,       em_suspend),
 343         DEVMETHOD(device_resume,        em_resume),
 344         DEVMETHOD_END
 345 };
 346
 347 static driver_t em_driver = {
 348         "em",
 349         em_methods,
 350         sizeof(struct adapter),
 351 };
 352
 353 static devclass_t em_devclass;
 354
 355 DECLARE_DUMMY_MODULE(if_em);
 356 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 357 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 358
 359 /*
 360  * Tunables
 361  */
 362 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 363 static int      em_rxd = EM_DEFAULT_RXD;
 364 static int      em_txd = EM_DEFAULT_TXD;
 365 static int      em_smart_pwr_down = 0;
 366
 367 /* Controls whether promiscuous also shows bad packets */
 368 static int      em_debug_sbp = FALSE;
 369
 370 static int      em_82573_workaround = 1;
 371 static int      em_msi_enable = 1;
 372
 373 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 374 TUNABLE_INT("hw.em.rxd", &em_rxd);
 375 TUNABLE_INT("hw.em.txd", &em_txd);
 376 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 377 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 378 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 379 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 380
 381 /* Global used in WOL setup with multiport cards */
 382 static int      em_global_quad_port_a = 0;
 383
 384 /* Set this to one to display debug statistics */
 385 static int      em_display_debug_stats = 0;
 386
 387 #if !defined(KTR_IF_EM)
 388 #define KTR_IF_EM       KTR_ALL
 389 #endif
 390 KTR_INFO_MASTER(if_em);
 391 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 392 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 393 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 394 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 395 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 396 #define logif(name)     KTR_LOG(if_em_ ## name)
 397
 398 static int
 399 em_probe(device_t dev)
 400 {
 401         const struct em_vendor_info *ent;
 402         uint16_t vid, did;
 403
 404         vid = pci_get_vendor(dev);
 405         did = pci_get_device(dev);
 406
 407         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 408                 if (vid == ent->vendor_id && did == ent->device_id) {
 409                         device_set_desc(dev, ent->desc);
 410                         device_set_async_attach(dev, TRUE);
 411                         return (ent->ret);
 412                 }
 413         }
 414         return (ENXIO);
 415 }
 416
 417 static int
 418 em_attach(device_t dev)
 419 {
 420         struct adapter *adapter = device_get_softc(dev);
 421         struct ifnet *ifp = &adapter->arpcom.ac_if;
 422         int tsize, rsize;
 423         int error = 0;
 424         uint16_t eeprom_data, device_id, apme_mask;
 425         driver_intr_t *intr_func;
 426
 427         adapter->dev = adapter->osdep.dev = dev;
 428
 429         callout_init_mp(&adapter->timer);
 430         callout_init_mp(&adapter->tx_fifo_timer);
 431
 432         /* Determine hardware and mac info */
 433         error = em_get_hw_info(adapter);
 434         if (error) {
 435                 device_printf(dev, "Identify hardware failed\n");
 436                 goto fail;
 437         }
 438
 439         /* Setup PCI resources */
 440         error = em_alloc_pci_res(adapter);
 441         if (error) {
 442                 device_printf(dev, "Allocation of PCI resources failed\n");
 443                 goto fail;
 444         }
 445
 446         /*
 447          * For ICH8 and family we need to map the flash memory,
 448          * and this must happen after the MAC is identified.
 449          */
 450         if (adapter->hw.mac.type == e1000_ich8lan ||
 451             adapter->hw.mac.type == e1000_ich9lan ||
 452             adapter->hw.mac.type == e1000_ich10lan ||
 453             adapter->hw.mac.type == e1000_pchlan ||
 454             adapter->hw.mac.type == e1000_pch2lan ||
 455             adapter->hw.mac.type == e1000_pch_lpt) {
 456                 adapter->flash_rid = EM_BAR_FLASH;
 457
 458                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 459                                         &adapter->flash_rid, RF_ACTIVE);
 460                 if (adapter->flash == NULL) {
 461                         device_printf(dev, "Mapping of Flash failed\n");
 462                         error = ENXIO;
 463                         goto fail;
 464                 }
 465                 adapter->osdep.flash_bus_space_tag =
 466                     rman_get_bustag(adapter->flash);
 467                 adapter->osdep.flash_bus_space_handle =
 468                     rman_get_bushandle(adapter->flash);
 469
 470                 /*
 471                  * This is used in the shared code
 472                  * XXX this goof is actually not used.
 473                  */
 474                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 475         }
 476
 477         switch (adapter->hw.mac.type) {
 478         case e1000_82571:
 479         case e1000_82572:
 480                 /*
 481                  * Pullup extra 4bytes into the first data segment, see:
 482                  * 82571/82572 specification update errata #7
 483                  *
 484                  * NOTE:
 485                  * 4bytes instead of 2bytes, which are mentioned in the
 486                  * errata, are pulled; mainly to keep rest of the data
 487                  * properly aligned.
 488                  */
 489                 adapter->flags |= EM_FLAG_TSO_PULLEX;
 490                 /* FALL THROUGH */
 491
 492         default:
 493                 if (pci_is_pcie(dev))
 494                         adapter->flags |= EM_FLAG_TSO;
 495                 break;
 496         }
 497
 498         /* Do Shared Code initialization */
 499         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 500                 device_printf(dev, "Setup of Shared code failed\n");
 501                 error = ENXIO;
 502                 goto fail;
 503         }
 504
 505         e1000_get_bus_info(&adapter->hw);
 506
 507         /*
 508          * Validate number of transmit and receive descriptors.  It
 509          * must not exceed hardware maximum, and must be multiple
 510          * of E1000_DBA_ALIGN.
 511          */
 512         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 513             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 514             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 515             em_txd < EM_MIN_TXD) {
 516                 if (adapter->hw.mac.type < e1000_82544)
 517                         adapter->num_tx_desc = EM_MAX_TXD_82543;
 518                 else
 519                         adapter->num_tx_desc = EM_DEFAULT_TXD;
 520                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 521                     adapter->num_tx_desc, em_txd);
 522         } else {
 523                 adapter->num_tx_desc = em_txd;
 524         }
 525         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 526             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 527             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 528             em_rxd < EM_MIN_RXD) {
 529                 if (adapter->hw.mac.type < e1000_82544)
 530                         adapter->num_rx_desc = EM_MAX_RXD_82543;
 531                 else
 532                         adapter->num_rx_desc = EM_DEFAULT_RXD;
 533                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 534                     adapter->num_rx_desc, em_rxd);
 535         } else {
 536                 adapter->num_rx_desc = em_rxd;
 537         }
 538
 539         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 540         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 541         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 542         adapter->rx_buffer_len = MCLBYTES;
 543
 544         /*
 545          * Interrupt throttle rate
 546          */
 547         if (em_int_throttle_ceil == 0) {
 548                 adapter->int_throttle_ceil = 0;
 549         } else {
 550                 int throttle = em_int_throttle_ceil;
 551
 552                 if (throttle < 0)
 553                         throttle = EM_DEFAULT_ITR;
 554
 555                 /* Recalculate the tunable value to get the exact frequency. */
 556                 throttle = 1000000000 / 256 / throttle;
 557
 558                 /* Upper 16bits of ITR is reserved and should be zero */
 559                 if (throttle & 0xffff0000)
 560                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 561
 562                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 563         }
 564
 565         e1000_init_script_state_82541(&adapter->hw, TRUE);
 566         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 567
 568         /* Copper options */
 569         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 570                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 571                 adapter->hw.phy.disable_polarity_correction = FALSE;
 572                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 573         }
 574
 575         /* Set the frame limits assuming standard ethernet sized frames. */
 576         adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 577         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 578
 579         /* This controls when hardware reports transmit completion status. */
 580         adapter->hw.mac.report_tx_early = 1;
 581
 582         /*
 583          * Create top level busdma tag
 584          */
 585         error = bus_dma_tag_create(NULL, 1, 0,
 586                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 587                         NULL, NULL,
 588                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 589                         0, &adapter->parent_dtag);
 590         if (error) {
 591                 device_printf(dev, "could not create top level DMA tag\n");
 592                 goto fail;
 593         }
 594
 595         /*
 596          * Allocate Transmit Descriptor ring
 597          */
 598         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 599                          EM_DBA_ALIGN);
 600         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 601         if (error) {
 602                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 603                 goto fail;
 604         }
 605         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 606
 607         /*
 608          * Allocate Receive Descriptor ring
 609          */
 610         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 611                          EM_DBA_ALIGN);
 612         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 613         if (error) {
 614                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 615                 goto fail;
 616         }
 617         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 618
 619         /* Allocate multicast array memory. */
 620         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 621             M_DEVBUF, M_WAITOK);
 622
 623         /* Indicate SOL/IDER usage */
 624         if (e1000_check_reset_block(&adapter->hw)) {
 625                 device_printf(dev,
 626                     "PHY reset is blocked due to SOL/IDER session.\n");
 627         }
 628
 629         /*
 630          * Start from a known state, this is important in reading the
 631          * nvm and mac from that.
 632          */
 633         e1000_reset_hw(&adapter->hw);
 634
 635         /* Make sure we have a good EEPROM before we read from it */
 636         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 637                 /*
 638                  * Some PCI-E parts fail the first check due to
 639                  * the link being in sleep state, call it again,
 640                  * if it fails a second time its a real issue.
 641                  */
 642                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 643                         device_printf(dev,
 644                             "The EEPROM Checksum Is Not Valid\n");
 645                         error = EIO;
 646                         goto fail;
 647                 }
 648         }
 649
 650         /* Copy the permanent MAC address out of the EEPROM */
 651         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 652                 device_printf(dev, "EEPROM read error while reading MAC"
 653                     " address\n");
 654                 error = EIO;
 655                 goto fail;
 656         }
 657         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 658                 device_printf(dev, "Invalid MAC address\n");
 659                 error = EIO;
 660                 goto fail;
 661         }
 662
 663         /* Allocate transmit descriptors and buffers */
 664         error = em_create_tx_ring(adapter);
 665         if (error) {
 666                 device_printf(dev, "Could not setup transmit structures\n");
 667                 goto fail;
 668         }
 669
 670         /* Allocate receive descriptors and buffers */
 671         error = em_create_rx_ring(adapter);
 672         if (error) {
 673                 device_printf(dev, "Could not setup receive structures\n");
 674                 goto fail;
 675         }
 676
 677         /* Manually turn off all interrupts */
 678         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 679
 680         /* Determine if we have to control management hardware */
 681         if (e1000_enable_mng_pass_thru(&adapter->hw))
 682                 adapter->flags |= EM_FLAG_HAS_MGMT;
 683
 684         /*
 685          * Setup Wake-on-Lan
 686          */
 687         apme_mask = EM_EEPROM_APME;
 688         eeprom_data = 0;
 689         switch (adapter->hw.mac.type) {
 690         case e1000_82542:
 691         case e1000_82543:
 692                 break;
 693
 694         case e1000_82573:
 695         case e1000_82583:
 696                 adapter->flags |= EM_FLAG_HAS_AMT;
 697                 /* FALL THROUGH */
 698
 699         case e1000_82546:
 700         case e1000_82546_rev_3:
 701         case e1000_82571:
 702         case e1000_82572:
 703         case e1000_80003es2lan:
 704                 if (adapter->hw.bus.func == 1) {
 705                         e1000_read_nvm(&adapter->hw,
 706                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 707                 } else {
 708                         e1000_read_nvm(&adapter->hw,
 709                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 710                 }
 711                 break;
 712
 713         case e1000_ich8lan:
 714         case e1000_ich9lan:
 715         case e1000_ich10lan:
 716         case e1000_pchlan:
 717         case e1000_pch2lan:
 718                 apme_mask = E1000_WUC_APME;
 719                 adapter->flags |= EM_FLAG_HAS_AMT;
 720                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 721                 break;
 722
 723         default:
 724                 e1000_read_nvm(&adapter->hw,
 725                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 726                 break;
 727         }
 728         if (eeprom_data & apme_mask)
 729                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 730
 731         /*
 732          * We have the eeprom settings, now apply the special cases
 733          * where the eeprom may be wrong or the board won't support
 734          * wake on lan on a particular port
 735          */
 736         device_id = pci_get_device(dev);
 737         switch (device_id) {
 738         case E1000_DEV_ID_82546GB_PCIE:
 739                 adapter->wol = 0;
 740                 break;
 741
 742         case E1000_DEV_ID_82546EB_FIBER:
 743         case E1000_DEV_ID_82546GB_FIBER:
 744         case E1000_DEV_ID_82571EB_FIBER:
 745                 /*
 746                  * Wake events only supported on port A for dual fiber
 747                  * regardless of eeprom setting
 748                  */
 749                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 750                     E1000_STATUS_FUNC_1)
 751                         adapter->wol = 0;
 752                 break;
 753
 754         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 755         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 756         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 757         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 758                 /* if quad port adapter, disable WoL on all but port A */
 759                 if (em_global_quad_port_a != 0)
 760                         adapter->wol = 0;
 761                 /* Reset for multiple quad port adapters */
 762                 if (++em_global_quad_port_a == 4)
 763                         em_global_quad_port_a = 0;
 764                 break;
 765         }
 766
 767         /* XXX disable wol */
 768         adapter->wol = 0;
 769
 770         /* Setup OS specific network interface */
 771         em_setup_ifp(adapter);
 772
 773         /* Add sysctl tree, must after em_setup_ifp() */
 774         em_add_sysctl(adapter);
 775
 776 #ifdef IFPOLL_ENABLE
 777         /* Polling setup */
 778         ifpoll_compat_setup(&adapter->npoll,
 779             &adapter->sysctl_ctx, adapter->sysctl_tree, device_get_unit(dev),
 780             ifp->if_serializer);
 781 #endif
 782
 783         /* Reset the hardware */
 784         error = em_reset(adapter);
 785         if (error) {
 786                 device_printf(dev, "Unable to reset the hardware\n");
 787                 goto fail;
 788         }
 789
 790         /* Initialize statistics */
 791         em_update_stats(adapter);
 792
 793         adapter->hw.mac.get_link_status = 1;
 794         em_update_link_status(adapter);
 795
 796         /* Do we need workaround for 82544 PCI-X adapter? */
 797         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 798             adapter->hw.mac.type == e1000_82544)
 799                 adapter->pcix_82544 = TRUE;
 800         else
 801                 adapter->pcix_82544 = FALSE;
 802
 803         if (adapter->pcix_82544) {
 804                 /*
 805                  * 82544 on PCI-X may split one TX segment
 806                  * into two TX descs, so we double its number
 807                  * of spare TX desc here.
 808                  */
 809                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 810         } else {
 811                 adapter->spare_tx_desc = EM_TX_SPARE;
 812         }
 813         if (adapter->flags & EM_FLAG_TSO)
 814                 adapter->spare_tx_desc = EM_TX_SPARE_TSO;
 815         adapter->tx_wreg_nsegs = EM_DEFAULT_TXWREG;
 816
 817         /*
 818          * Keep following relationship between spare_tx_desc, oact_tx_desc
 819          * and tx_int_nsegs:
 820          * (spare_tx_desc + EM_TX_RESERVED) <=
 821          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 822          */
 823         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 824         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 825                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 826         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 827                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 828
 829         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 830         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 831                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 832
 833         /* Non-AMT based hardware can now take control from firmware */
 834         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
 835             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
 836                 em_get_hw_control(adapter);
 837
 838         ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
 839
 840         /*
 841          * Missing Interrupt Following ICR read:
 842          *
 843          * 82571/82572 specification update errata #76
 844          * 82573 specification update errata #31
 845          * 82574 specification update errata #12
 846          * 82583 specification update errata #4
 847          */
 848         intr_func = em_intr;
 849         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
 850             (adapter->hw.mac.type == e1000_82571 ||
 851              adapter->hw.mac.type == e1000_82572 ||
 852              adapter->hw.mac.type == e1000_82573 ||
 853              adapter->hw.mac.type == e1000_82574 ||
 854              adapter->hw.mac.type == e1000_82583))
 855                 intr_func = em_intr_mask;
 856
 857         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 858                                intr_func, adapter, &adapter->intr_tag,
 859                                ifp->if_serializer);
 860         if (error) {
 861                 device_printf(dev, "Failed to register interrupt handler");
 862                 ether_ifdetach(&adapter->arpcom.ac_if);
 863                 goto fail;
 864         }
 865         return (0);
 866 fail:
 867         em_detach(dev);
 868         return (error);
 869 }
 870
 871 static int
 872 em_detach(device_t dev)
 873 {
 874         struct adapter *adapter = device_get_softc(dev);
 875
 876         if (device_is_attached(dev)) {
 877                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 878
 879                 lwkt_serialize_enter(ifp->if_serializer);
 880
 881                 em_stop(adapter);
 882
 883                 e1000_phy_hw_reset(&adapter->hw);
 884
 885                 em_rel_mgmt(adapter);
 886                 em_rel_hw_control(adapter);
 887
 888                 if (adapter->wol) {
 889                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 890                                         E1000_WUC_PME_EN);
 891                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 892                         em_enable_wol(dev);
 893                 }
 894
 895                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 896
 897                 lwkt_serialize_exit(ifp->if_serializer);
 898
 899                 ether_ifdetach(ifp);
 900         } else if (adapter->memory != NULL) {
 901                 em_rel_hw_control(adapter);
 902         }
 903         bus_generic_detach(dev);
 904
 905         em_free_pci_res(adapter);
 906
 907         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 908         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 909
 910         /* Free Transmit Descriptor ring */
 911         if (adapter->tx_desc_base)
 912                 em_dma_free(adapter, &adapter->txdma);
 913
 914         /* Free Receive Descriptor ring */
 915         if (adapter->rx_desc_base)
 916                 em_dma_free(adapter, &adapter->rxdma);
 917
 918         /* Free top level busdma tag */
 919         if (adapter->parent_dtag != NULL)
 920                 bus_dma_tag_destroy(adapter->parent_dtag);
 921
 922         /* Free sysctl tree */
 923         if (adapter->sysctl_tree != NULL)
 924                 sysctl_ctx_free(&adapter->sysctl_ctx);
 925
 926         if (adapter->mta != NULL)
 927                 kfree(adapter->mta, M_DEVBUF);
 928
 929         return (0);
 930 }
 931
 932 static int
 933 em_shutdown(device_t dev)
 934 {
 935         return em_suspend(dev);
 936 }
 937
 938 static int
 939 em_suspend(device_t dev)
 940 {
 941         struct adapter *adapter = device_get_softc(dev);
 942         struct ifnet *ifp = &adapter->arpcom.ac_if;
 943
 944         lwkt_serialize_enter(ifp->if_serializer);
 945
 946         em_stop(adapter);
 947
 948         em_rel_mgmt(adapter);
 949         em_rel_hw_control(adapter);
 950
 951         if (adapter->wol) {
 952                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
 953                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 954                 em_enable_wol(dev);
 955         }
 956
 957         lwkt_serialize_exit(ifp->if_serializer);
 958
 959         return bus_generic_suspend(dev);
 960 }
 961
 962 static int
 963 em_resume(device_t dev)
 964 {
 965         struct adapter *adapter = device_get_softc(dev);
 966         struct ifnet *ifp = &adapter->arpcom.ac_if;
 967
 968         lwkt_serialize_enter(ifp->if_serializer);
 969
 970         if (adapter->hw.mac.type == e1000_pch2lan)
 971                 e1000_resume_workarounds_pchlan(&adapter->hw);
 972
 973         em_init(adapter);
 974         em_get_mgmt(adapter);
 975         if_devstart(ifp);
 976
 977         lwkt_serialize_exit(ifp->if_serializer);
 978
 979         return bus_generic_resume(dev);
 980 }
 981
 982 static void
 983 em_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
 984 {
 985         struct adapter *adapter = ifp->if_softc;
 986         struct mbuf *m_head;
 987         int idx = -1, nsegs = 0;
 988
 989         ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
 990         ASSERT_SERIALIZED(ifp->if_serializer);
 991
 992         if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd))
 993                 return;
 994
 995         if (!adapter->link_active) {
 996                 ifq_purge(&ifp->if_snd);
 997                 return;
 998         }
 999
1000         while (!ifq_is_empty(&ifp->if_snd)) {
1001                 /* Now do we at least have a minimal? */
1002                 if (EM_IS_OACTIVE(adapter)) {
1003                         em_tx_collect(adapter);
1004                         if (EM_IS_OACTIVE(adapter)) {
1005                                 ifq_set_oactive(&ifp->if_snd);
1006                                 adapter->no_tx_desc_avail1++;
1007                                 break;
1008                         }
1009                 }
1010
1011                 logif(pkt_txqueue);
1012                 m_head = ifq_dequeue(&ifp->if_snd);
1013                 if (m_head == NULL)
1014                         break;
1015
1016                 if (em_encap(adapter, &m_head, &nsegs, &idx)) {
1017                         IFNET_STAT_INC(ifp, oerrors, 1);
1018                         em_tx_collect(adapter);
1019                         continue;
1020                 }
1021
1022                 if (nsegs >= adapter->tx_wreg_nsegs && idx >= 0) {
1023                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1024                         nsegs = 0;
1025                         idx = -1;
1026                 }
1027
1028                 /* Send a copy of the frame to the BPF listener */
1029                 ETHER_BPF_MTAP(ifp, m_head);
1030
1031                 /* Set timeout in case hardware has problems transmitting. */
1032                 ifp->if_timer = EM_TX_TIMEOUT;
1033         }
1034         if (idx >= 0)
1035                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1036 }
1037
1038 static int
1039 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1040 {
1041         struct adapter *adapter = ifp->if_softc;
1042         struct ifreq *ifr = (struct ifreq *)data;
1043         uint16_t eeprom_data = 0;
1044         int max_frame_size, mask, reinit;
1045         int error = 0;
1046
1047         ASSERT_SERIALIZED(ifp->if_serializer);
1048
1049         switch (command) {
1050         case SIOCSIFMTU:
1051                 switch (adapter->hw.mac.type) {
1052                 case e1000_82573:
1053                         /*
1054                          * 82573 only supports jumbo frames
1055                          * if ASPM is disabled.
1056                          */
1057                         e1000_read_nvm(&adapter->hw,
1058                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1059                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1060                                 max_frame_size = ETHER_MAX_LEN;
1061                                 break;
1062                         }
1063                         /* FALL THROUGH */
1064
1065                 /* Limit Jumbo Frame size */
1066                 case e1000_82571:
1067                 case e1000_82572:
1068                 case e1000_ich9lan:
1069                 case e1000_ich10lan:
1070                 case e1000_pch2lan:
1071                 case e1000_pch_lpt:
1072                 case e1000_82574:
1073                 case e1000_82583:
1074                 case e1000_80003es2lan:
1075                         max_frame_size = 9234;
1076                         break;
1077
1078                 case e1000_pchlan:
1079                         max_frame_size = 4096;
1080                         break;
1081
1082                 /* Adapters that do not support jumbo frames */
1083                 case e1000_82542:
1084                 case e1000_ich8lan:
1085                         max_frame_size = ETHER_MAX_LEN;
1086                         break;
1087
1088                 default:
1089                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1090                         break;
1091                 }
1092                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1093                     ETHER_CRC_LEN) {
1094                         error = EINVAL;
1095                         break;
1096                 }
1097
1098                 ifp->if_mtu = ifr->ifr_mtu;
1099                 adapter->max_frame_size =
1100                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1101
1102                 if (ifp->if_flags & IFF_RUNNING)
1103                         em_init(adapter);
1104                 break;
1105
1106         case SIOCSIFFLAGS:
1107                 if (ifp->if_flags & IFF_UP) {
1108                         if ((ifp->if_flags & IFF_RUNNING)) {
1109                                 if ((ifp->if_flags ^ adapter->if_flags) &
1110                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1111                                         em_disable_promisc(adapter);
1112                                         em_set_promisc(adapter);
1113                                 }
1114                         } else {
1115                                 em_init(adapter);
1116                         }
1117                 } else if (ifp->if_flags & IFF_RUNNING) {
1118                         em_stop(adapter);
1119                 }
1120                 adapter->if_flags = ifp->if_flags;
1121                 break;
1122
1123         case SIOCADDMULTI:
1124         case SIOCDELMULTI:
1125                 if (ifp->if_flags & IFF_RUNNING) {
1126                         em_disable_intr(adapter);
1127                         em_set_multi(adapter);
1128                         if (adapter->hw.mac.type == e1000_82542 &&
1129                             adapter->hw.revision_id == E1000_REVISION_2)
1130                                 em_init_rx_unit(adapter);
1131 #ifdef IFPOLL_ENABLE
1132                         if (!(ifp->if_flags & IFF_NPOLLING))
1133 #endif
1134                                 em_enable_intr(adapter);
1135                 }
1136                 break;
1137
1138         case SIOCSIFMEDIA:
1139                 /* Check SOL/IDER usage */
1140                 if (e1000_check_reset_block(&adapter->hw)) {
1141                         device_printf(adapter->dev, "Media change is"
1142                             " blocked due to SOL/IDER session.\n");
1143                         break;
1144                 }
1145                 /* FALL THROUGH */
1146
1147         case SIOCGIFMEDIA:
1148                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1149                 break;
1150
1151         case SIOCSIFCAP:
1152                 reinit = 0;
1153                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1154                 if (mask & IFCAP_RXCSUM) {
1155                         ifp->if_capenable ^= IFCAP_RXCSUM;
1156                         reinit = 1;
1157                 }
1158                 if (mask & IFCAP_TXCSUM) {
1159                         ifp->if_capenable ^= IFCAP_TXCSUM;
1160                         if (ifp->if_capenable & IFCAP_TXCSUM)
1161                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1162                         else
1163                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1164                 }
1165                 if (mask & IFCAP_TSO) {
1166                         ifp->if_capenable ^= IFCAP_TSO;
1167                         if (ifp->if_capenable & IFCAP_TSO)
1168                                 ifp->if_hwassist |= CSUM_TSO;
1169                         else
1170                                 ifp->if_hwassist &= ~CSUM_TSO;
1171                 }
1172                 if (mask & IFCAP_VLAN_HWTAGGING) {
1173                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1174                         reinit = 1;
1175                 }
1176                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1177                         em_init(adapter);
1178                 break;
1179
1180         default:
1181                 error = ether_ioctl(ifp, command, data);
1182                 break;
1183         }
1184         return (error);
1185 }
1186
1187 static void
1188 em_watchdog(struct ifnet *ifp)
1189 {
1190         struct adapter *adapter = ifp->if_softc;
1191
1192         ASSERT_SERIALIZED(ifp->if_serializer);
1193
1194         /*
1195          * The timer is set to 5 every time start queues a packet.
1196          * Then txeof keeps resetting it as long as it cleans at
1197          * least one descriptor.
1198          * Finally, anytime all descriptors are clean the timer is
1199          * set to 0.
1200          */
1201
1202         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1203             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1204                 /*
1205                  * If we reach here, all TX jobs are completed and
1206                  * the TX engine should have been idled for some time.
1207                  * We don't need to call if_devstart() here.
1208                  */
1209                 ifq_clr_oactive(&ifp->if_snd);
1210                 ifp->if_timer = 0;
1211                 return;
1212         }
1213
1214         /*
1215          * If we are in this routine because of pause frames, then
1216          * don't reset the hardware.
1217          */
1218         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1219             E1000_STATUS_TXOFF) {
1220                 ifp->if_timer = EM_TX_TIMEOUT;
1221                 return;
1222         }
1223
1224         if (e1000_check_for_link(&adapter->hw) == 0)
1225                 if_printf(ifp, "watchdog timeout -- resetting\n");
1226
1227         IFNET_STAT_INC(ifp, oerrors, 1);
1228         adapter->watchdog_events++;
1229
1230         em_init(adapter);
1231
1232         if (!ifq_is_empty(&ifp->if_snd))
1233                 if_devstart(ifp);
1234 }
1235
1236 static void
1237 em_init(void *xsc)
1238 {
1239         struct adapter *adapter = xsc;
1240         struct ifnet *ifp = &adapter->arpcom.ac_if;
1241         device_t dev = adapter->dev;
1242
1243         ASSERT_SERIALIZED(ifp->if_serializer);
1244
1245         em_stop(adapter);
1246
1247         /* Get the latest mac address, User can use a LAA */
1248         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1249
1250         /* Put the address into the Receive Address Array */
1251         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1252
1253         /*
1254          * With the 82571 adapter, RAR[0] may be overwritten
1255          * when the other port is reset, we make a duplicate
1256          * in RAR[14] for that eventuality, this assures
1257          * the interface continues to function.
1258          */
1259         if (adapter->hw.mac.type == e1000_82571) {
1260                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1261                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1262                     E1000_RAR_ENTRIES - 1);
1263         }
1264
1265         /* Reset the hardware */
1266         if (em_reset(adapter)) {
1267                 device_printf(dev, "Unable to reset the hardware\n");
1268                 /* XXX em_stop()? */
1269                 return;
1270         }
1271         em_update_link_status(adapter);
1272
1273         /* Setup VLAN support, basic and offload if available */
1274         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1275
1276         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1277                 uint32_t ctrl;
1278
1279                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1280                 ctrl |= E1000_CTRL_VME;
1281                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1282         }
1283
1284         /* Configure for OS presence */
1285         em_get_mgmt(adapter);
1286
1287         /* Prepare transmit descriptors and buffers */
1288         em_init_tx_ring(adapter);
1289         em_init_tx_unit(adapter);
1290
1291         /* Setup Multicast table */
1292         em_set_multi(adapter);
1293
1294         /* Prepare receive descriptors and buffers */
1295         if (em_init_rx_ring(adapter)) {
1296                 device_printf(dev, "Could not setup receive structures\n");
1297                 em_stop(adapter);
1298                 return;
1299         }
1300         em_init_rx_unit(adapter);
1301
1302         /* Don't lose promiscuous settings */
1303         em_set_promisc(adapter);
1304
1305         ifp->if_flags |= IFF_RUNNING;
1306         ifq_clr_oactive(&ifp->if_snd);
1307
1308         callout_reset(&adapter->timer, hz, em_timer, adapter);
1309         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1310
1311         /* MSI/X configuration for 82574 */
1312         if (adapter->hw.mac.type == e1000_82574) {
1313                 int tmp;
1314
1315                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1316                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1317                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1318                 /*
1319                  * XXX MSIX
1320                  * Set the IVAR - interrupt vector routing.
1321                  * Each nibble represents a vector, high bit
1322                  * is enable, other 3 bits are the MSIX table
1323                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1324                  * Link (other) to 2, hence the magic number.
1325                  */
1326                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1327         }
1328
1329 #ifdef IFPOLL_ENABLE
1330         /*
1331          * Only enable interrupts if we are not polling, make sure
1332          * they are off otherwise.
1333          */
1334         if (ifp->if_flags & IFF_NPOLLING)
1335                 em_disable_intr(adapter);
1336         else
1337 #endif /* IFPOLL_ENABLE */
1338                 em_enable_intr(adapter);
1339
1340         /* AMT based hardware can now take control from firmware */
1341         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1342             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1343             adapter->hw.mac.type >= e1000_82571)
1344                 em_get_hw_control(adapter);
1345 }
1346
1347 #ifdef IFPOLL_ENABLE
1348
1349 static void
1350 em_npoll_compat(struct ifnet *ifp, void *arg __unused, int count)
1351 {
1352         struct adapter *adapter = ifp->if_softc;
1353
1354         ASSERT_SERIALIZED(ifp->if_serializer);
1355
1356         if (adapter->npoll.ifpc_stcount-- == 0) {
1357                 uint32_t reg_icr;
1358
1359                 adapter->npoll.ifpc_stcount = adapter->npoll.ifpc_stfrac;
1360
1361                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1362                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1363                         callout_stop(&adapter->timer);
1364                         adapter->hw.mac.get_link_status = 1;
1365                         em_update_link_status(adapter);
1366                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1367                 }
1368         }
1369
1370         em_rxeof(adapter, count);
1371         em_txeof(adapter);
1372
1373         if (!ifq_is_empty(&ifp->if_snd))
1374                 if_devstart(ifp);
1375 }
1376
1377 static void
1378 em_npoll(struct ifnet *ifp, struct ifpoll_info *info)
1379 {
1380         struct adapter *adapter = ifp->if_softc;
1381
1382         ASSERT_SERIALIZED(ifp->if_serializer);
1383
1384         if (info != NULL) {
1385                 int cpuid = adapter->npoll.ifpc_cpuid;
1386
1387                 info->ifpi_rx[cpuid].poll_func = em_npoll_compat;
1388                 info->ifpi_rx[cpuid].arg = NULL;
1389                 info->ifpi_rx[cpuid].serializer = ifp->if_serializer;
1390
1391                 if (ifp->if_flags & IFF_RUNNING)
1392                         em_disable_intr(adapter);
1393                 ifq_set_cpuid(&ifp->if_snd, cpuid);
1394         } else {
1395                 if (ifp->if_flags & IFF_RUNNING)
1396                         em_enable_intr(adapter);
1397                 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
1398         }
1399 }
1400
1401 #endif /* IFPOLL_ENABLE */
1402
1403 static void
1404 em_intr(void *xsc)
1405 {
1406         em_intr_body(xsc, TRUE);
1407 }
1408
1409 static void
1410 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1411 {
1412         struct ifnet *ifp = &adapter->arpcom.ac_if;
1413         uint32_t reg_icr;
1414
1415         logif(intr_beg);
1416         ASSERT_SERIALIZED(ifp->if_serializer);
1417
1418         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1419
1420         if (chk_asserted &&
1421             ((adapter->hw.mac.type >= e1000_82571 &&
1422               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1423              reg_icr == 0)) {
1424                 logif(intr_end);
1425                 return;
1426         }
1427
1428         /*
1429          * XXX: some laptops trigger several spurious interrupts
1430          * on em(4) when in the resume cycle. The ICR register
1431          * reports all-ones value in this case. Processing such
1432          * interrupts would lead to a freeze. I don't know why.
1433          */
1434         if (reg_icr == 0xffffffff) {
1435                 logif(intr_end);
1436                 return;
1437         }
1438
1439         if (ifp->if_flags & IFF_RUNNING) {
1440                 if (reg_icr &
1441                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1442                         em_rxeof(adapter, -1);
1443                 if (reg_icr & E1000_ICR_TXDW) {
1444                         em_txeof(adapter);
1445                         if (!ifq_is_empty(&ifp->if_snd))
1446                                 if_devstart(ifp);
1447                 }
1448         }
1449
1450         /* Link status change */
1451         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1452                 callout_stop(&adapter->timer);
1453                 adapter->hw.mac.get_link_status = 1;
1454                 em_update_link_status(adapter);
1455
1456                 /* Deal with TX cruft when link lost */
1457                 em_tx_purge(adapter);
1458
1459                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1460         }
1461
1462         if (reg_icr & E1000_ICR_RXO)
1463                 adapter->rx_overruns++;
1464
1465         logif(intr_end);
1466 }
1467
1468 static void
1469 em_intr_mask(void *xsc)
1470 {
1471         struct adapter *adapter = xsc;
1472
1473         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1474         /*
1475          * NOTE:
1476          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1477          * so don't check it.
1478          */
1479         em_intr_body(adapter, FALSE);
1480         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1481 }
1482
1483 static void
1484 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1485 {
1486         struct adapter *adapter = ifp->if_softc;
1487         u_char fiber_type = IFM_1000_SX;
1488
1489         ASSERT_SERIALIZED(ifp->if_serializer);
1490
1491         em_update_link_status(adapter);
1492
1493         ifmr->ifm_status = IFM_AVALID;
1494         ifmr->ifm_active = IFM_ETHER;
1495
1496         if (!adapter->link_active)
1497                 return;
1498
1499         ifmr->ifm_status |= IFM_ACTIVE;
1500
1501         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1502             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1503                 if (adapter->hw.mac.type == e1000_82545)
1504                         fiber_type = IFM_1000_LX;
1505                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1506         } else {
1507                 switch (adapter->link_speed) {
1508                 case 10:
1509                         ifmr->ifm_active |= IFM_10_T;
1510                         break;
1511                 case 100:
1512                         ifmr->ifm_active |= IFM_100_TX;
1513                         break;
1514
1515                 case 1000:
1516                         ifmr->ifm_active |= IFM_1000_T;
1517                         break;
1518                 }
1519                 if (adapter->link_duplex == FULL_DUPLEX)
1520                         ifmr->ifm_active |= IFM_FDX;
1521                 else
1522                         ifmr->ifm_active |= IFM_HDX;
1523         }
1524 }
1525
1526 static int
1527 em_media_change(struct ifnet *ifp)
1528 {
1529         struct adapter *adapter = ifp->if_softc;
1530         struct ifmedia *ifm = &adapter->media;
1531
1532         ASSERT_SERIALIZED(ifp->if_serializer);
1533
1534         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1535                 return (EINVAL);
1536
1537         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1538         case IFM_AUTO:
1539                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1540                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1541                 break;
1542
1543         case IFM_1000_LX:
1544         case IFM_1000_SX:
1545         case IFM_1000_T:
1546                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1547                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1548                 break;
1549
1550         case IFM_100_TX:
1551                 adapter->hw.mac.autoneg = FALSE;
1552                 adapter->hw.phy.autoneg_advertised = 0;
1553                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1554                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1555                 else
1556                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1557                 break;
1558
1559         case IFM_10_T:
1560                 adapter->hw.mac.autoneg = FALSE;
1561                 adapter->hw.phy.autoneg_advertised = 0;
1562                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1563                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1564                 else
1565                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1566                 break;
1567
1568         default:
1569                 if_printf(ifp, "Unsupported media type\n");
1570                 break;
1571         }
1572
1573         em_init(adapter);
1574
1575         return (0);
1576 }
1577
1578 static int
1579 em_encap(struct adapter *adapter, struct mbuf **m_headp,
1580     int *segs_used, int *idx)
1581 {
1582         bus_dma_segment_t segs[EM_MAX_SCATTER];
1583         bus_dmamap_t map;
1584         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1585         struct e1000_tx_desc *ctxd = NULL;
1586         struct mbuf *m_head = *m_headp;
1587         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1588         int maxsegs, nsegs, i, j, first, last = 0, error;
1589
1590         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1591                 error = em_tso_pullup(adapter, m_headp);
1592                 if (error)
1593                         return error;
1594                 m_head = *m_headp;
1595         }
1596
1597         txd_upper = txd_lower = 0;
1598         txd_used = 0;
1599
1600         /*
1601          * Capture the first descriptor index, this descriptor
1602          * will have the index of the EOP which is the only one
1603          * that now gets a DONE bit writeback.
1604          */
1605         first = adapter->next_avail_tx_desc;
1606         tx_buffer = &adapter->tx_buffer_area[first];
1607         tx_buffer_mapped = tx_buffer;
1608         map = tx_buffer->map;
1609
1610         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1611         KASSERT(maxsegs >= adapter->spare_tx_desc,
1612                 ("not enough spare TX desc"));
1613         if (adapter->pcix_82544) {
1614                 /* Half it; see the comment in em_attach() */
1615                 maxsegs >>= 1;
1616         }
1617         if (maxsegs > EM_MAX_SCATTER)
1618                 maxsegs = EM_MAX_SCATTER;
1619
1620         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1621                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1622         if (error) {
1623                 if (error == ENOBUFS)
1624                         adapter->mbuf_alloc_failed++;
1625                 else
1626                         adapter->no_tx_dma_setup++;
1627
1628                 m_freem(*m_headp);
1629                 *m_headp = NULL;
1630                 return error;
1631         }
1632         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1633
1634         m_head = *m_headp;
1635         adapter->tx_nsegs += nsegs;
1636         *segs_used += nsegs;
1637
1638         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1639                 /* TSO will consume one TX desc */
1640                 i = em_tso_setup(adapter, m_head, &txd_upper, &txd_lower);
1641                 adapter->tx_nsegs += i;
1642                 *segs_used += i;
1643         } else if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1644                 /* TX csum offloading will consume one TX desc */
1645                 i = em_txcsum(adapter, m_head, &txd_upper, &txd_lower);
1646                 adapter->tx_nsegs += i;
1647                 *segs_used += i;
1648         }
1649
1650         /* Handle VLAN tag */
1651         if (m_head->m_flags & M_VLANTAG) {
1652                 /* Set the vlan id. */
1653                 txd_upper |= (htole16(m_head->m_pkthdr.ether_vlantag) << 16);
1654                 /* Tell hardware to add tag */
1655                 txd_lower |= htole32(E1000_TXD_CMD_VLE);
1656         }
1657
1658         i = adapter->next_avail_tx_desc;
1659
1660         /* Set up our transmit descriptors */
1661         for (j = 0; j < nsegs; j++) {
1662                 /* If adapter is 82544 and on PCIX bus */
1663                 if(adapter->pcix_82544) {
1664                         DESC_ARRAY desc_array;
1665                         uint32_t array_elements, counter;
1666
1667                         /*
1668                          * Check the Address and Length combination and
1669                          * split the data accordingly
1670                          */
1671                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1672                                                 segs[j].ds_len, &desc_array);
1673                         for (counter = 0; counter < array_elements; counter++) {
1674                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1675
1676                                 tx_buffer = &adapter->tx_buffer_area[i];
1677                                 ctxd = &adapter->tx_desc_base[i];
1678
1679                                 ctxd->buffer_addr = htole64(
1680                                     desc_array.descriptor[counter].address);
1681                                 ctxd->lower.data = htole32(
1682                                     E1000_TXD_CMD_IFCS | txd_lower |
1683                                     desc_array.descriptor[counter].length);
1684                                 ctxd->upper.data = htole32(txd_upper);
1685
1686                                 last = i;
1687                                 if (++i == adapter->num_tx_desc)
1688                                         i = 0;
1689
1690                                 txd_used++;
1691                         }
1692                 } else {
1693                         tx_buffer = &adapter->tx_buffer_area[i];
1694                         ctxd = &adapter->tx_desc_base[i];
1695
1696                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1697                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1698                                                    txd_lower | segs[j].ds_len);
1699                         ctxd->upper.data = htole32(txd_upper);
1700
1701                         last = i;
1702                         if (++i == adapter->num_tx_desc)
1703                                 i = 0;
1704                 }
1705         }
1706
1707         adapter->next_avail_tx_desc = i;
1708         if (adapter->pcix_82544) {
1709                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1710                 adapter->num_tx_desc_avail -= txd_used;
1711         } else {
1712                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1713                 adapter->num_tx_desc_avail -= nsegs;
1714         }
1715
1716         tx_buffer->m_head = m_head;
1717         tx_buffer_mapped->map = tx_buffer->map;
1718         tx_buffer->map = map;
1719
1720         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1721                 adapter->tx_nsegs = 0;
1722
1723                 /*
1724                  * Report Status (RS) is turned on
1725                  * every tx_int_nsegs descriptors.
1726                  */
1727                 cmd = E1000_TXD_CMD_RS;
1728
1729                 /*
1730                  * Keep track of the descriptor, which will
1731                  * be written back by hardware.
1732                  */
1733                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1734                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1735                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1736         }
1737
1738         /*
1739          * Last Descriptor of Packet needs End Of Packet (EOP)
1740          */
1741         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1742
1743         if (adapter->hw.mac.type == e1000_82547) {
1744                 /*
1745                  * Advance the Transmit Descriptor Tail (TDT), this tells the
1746                  * E1000 that this frame is available to transmit.
1747                  */
1748                 if (adapter->link_duplex == HALF_DUPLEX) {
1749                         em_82547_move_tail_serialized(adapter);
1750                 } else {
1751                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1752                         em_82547_update_fifo_head(adapter,
1753                             m_head->m_pkthdr.len);
1754                 }
1755         } else {
1756                 /*
1757                  * Defer TDT updating, until enough descriptors are setup
1758                  */
1759                 *idx = i;
1760         }
1761         return (0);
1762 }
1763
1764 /*
1765  * 82547 workaround to avoid controller hang in half-duplex environment.
1766  * The workaround is to avoid queuing a large packet that would span
1767  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1768  * in this case.  We do that only when FIFO is quiescent.
1769  */
1770 static void
1771 em_82547_move_tail_serialized(struct adapter *adapter)
1772 {
1773         struct e1000_tx_desc *tx_desc;
1774         uint16_t hw_tdt, sw_tdt, length = 0;
1775         bool eop = 0;
1776
1777         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1778
1779         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1780         sw_tdt = adapter->next_avail_tx_desc;
1781
1782         while (hw_tdt != sw_tdt) {
1783                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1784                 length += tx_desc->lower.flags.length;
1785                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1786                 if (++hw_tdt == adapter->num_tx_desc)
1787                         hw_tdt = 0;
1788
1789                 if (eop) {
1790                         if (em_82547_fifo_workaround(adapter, length)) {
1791                                 adapter->tx_fifo_wrk_cnt++;
1792                                 callout_reset(&adapter->tx_fifo_timer, 1,
1793                                         em_82547_move_tail, adapter);
1794                                 break;
1795                         }
1796                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1797                         em_82547_update_fifo_head(adapter, length);
1798                         length = 0;
1799                 }
1800         }
1801 }
1802
1803 static void
1804 em_82547_move_tail(void *xsc)
1805 {
1806         struct adapter *adapter = xsc;
1807         struct ifnet *ifp = &adapter->arpcom.ac_if;
1808
1809         lwkt_serialize_enter(ifp->if_serializer);
1810         em_82547_move_tail_serialized(adapter);
1811         lwkt_serialize_exit(ifp->if_serializer);
1812 }
1813
1814 static int
1815 em_82547_fifo_workaround(struct adapter *adapter, int len)
1816 {
1817         int fifo_space, fifo_pkt_len;
1818
1819         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1820
1821         if (adapter->link_duplex == HALF_DUPLEX) {
1822                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1823
1824                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1825                         if (em_82547_tx_fifo_reset(adapter))
1826                                 return (0);
1827                         else
1828                                 return (1);
1829                 }
1830         }
1831         return (0);
1832 }
1833
1834 static void
1835 em_82547_update_fifo_head(struct adapter *adapter, int len)
1836 {
1837         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1838
1839         /* tx_fifo_head is always 16 byte aligned */
1840         adapter->tx_fifo_head += fifo_pkt_len;
1841         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1842                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1843 }
1844
1845 static int
1846 em_82547_tx_fifo_reset(struct adapter *adapter)
1847 {
1848         uint32_t tctl;
1849
1850         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1851              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1852             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1853              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1854             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1855              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1856             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1857                 /* Disable TX unit */
1858                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1859                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1860                     tctl & ~E1000_TCTL_EN);
1861
1862                 /* Reset FIFO pointers */
1863                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1864                     adapter->tx_head_addr);
1865                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1866                     adapter->tx_head_addr);
1867                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1868                     adapter->tx_head_addr);
1869                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1870                     adapter->tx_head_addr);
1871
1872                 /* Re-enable TX unit */
1873                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1874                 E1000_WRITE_FLUSH(&adapter->hw);
1875
1876                 adapter->tx_fifo_head = 0;
1877                 adapter->tx_fifo_reset_cnt++;
1878
1879                 return (TRUE);
1880         } else {
1881                 return (FALSE);
1882         }
1883 }
1884
1885 static void
1886 em_set_promisc(struct adapter *adapter)
1887 {
1888         struct ifnet *ifp = &adapter->arpcom.ac_if;
1889         uint32_t reg_rctl;
1890
1891         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1892
1893         if (ifp->if_flags & IFF_PROMISC) {
1894                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1895                 /* Turn this on if you want to see bad packets */
1896                 if (em_debug_sbp)
1897                         reg_rctl |= E1000_RCTL_SBP;
1898                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1899         } else if (ifp->if_flags & IFF_ALLMULTI) {
1900                 reg_rctl |= E1000_RCTL_MPE;
1901                 reg_rctl &= ~E1000_RCTL_UPE;
1902                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1903         }
1904 }
1905
1906 static void
1907 em_disable_promisc(struct adapter *adapter)
1908 {
1909         uint32_t reg_rctl;
1910
1911         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1912
1913         reg_rctl &= ~E1000_RCTL_UPE;
1914         reg_rctl &= ~E1000_RCTL_MPE;
1915         reg_rctl &= ~E1000_RCTL_SBP;
1916         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1917 }
1918
1919 static void
1920 em_set_multi(struct adapter *adapter)
1921 {
1922         struct ifnet *ifp = &adapter->arpcom.ac_if;
1923         struct ifmultiaddr *ifma;
1924         uint32_t reg_rctl = 0;
1925         uint8_t *mta;
1926         int mcnt = 0;
1927
1928         mta = adapter->mta;
1929         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1930
1931         if (adapter->hw.mac.type == e1000_82542 &&
1932             adapter->hw.revision_id == E1000_REVISION_2) {
1933                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1934                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1935                         e1000_pci_clear_mwi(&adapter->hw);
1936                 reg_rctl |= E1000_RCTL_RST;
1937                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1938                 msec_delay(5);
1939         }
1940
1941         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1942                 if (ifma->ifma_addr->sa_family != AF_LINK)
1943                         continue;
1944
1945                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1946                         break;
1947
1948                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1949                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1950                 mcnt++;
1951         }
1952
1953         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1954                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1955                 reg_rctl |= E1000_RCTL_MPE;
1956                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1957         } else {
1958                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
1959         }
1960
1961         if (adapter->hw.mac.type == e1000_82542 &&
1962             adapter->hw.revision_id == E1000_REVISION_2) {
1963                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1964                 reg_rctl &= ~E1000_RCTL_RST;
1965                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1966                 msec_delay(5);
1967                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1968                         e1000_pci_set_mwi(&adapter->hw);
1969         }
1970 }
1971
1972 /*
1973  * This routine checks for link status and updates statistics.
1974  */
1975 static void
1976 em_timer(void *xsc)
1977 {
1978         struct adapter *adapter = xsc;
1979         struct ifnet *ifp = &adapter->arpcom.ac_if;
1980
1981         lwkt_serialize_enter(ifp->if_serializer);
1982
1983         em_update_link_status(adapter);
1984         em_update_stats(adapter);
1985
1986         /* Reset LAA into RAR[0] on 82571 */
1987         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
1988                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1989
1990         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
1991                 em_print_hw_stats(adapter);
1992
1993         em_smartspeed(adapter);
1994
1995         callout_reset(&adapter->timer, hz, em_timer, adapter);
1996
1997         lwkt_serialize_exit(ifp->if_serializer);
1998 }
1999
2000 static void
2001 em_update_link_status(struct adapter *adapter)
2002 {
2003         struct e1000_hw *hw = &adapter->hw;
2004         struct ifnet *ifp = &adapter->arpcom.ac_if;
2005         device_t dev = adapter->dev;
2006         uint32_t link_check = 0;
2007
2008         /* Get the cached link value or read phy for real */
2009         switch (hw->phy.media_type) {
2010         case e1000_media_type_copper:
2011                 if (hw->mac.get_link_status) {
2012                         /* Do the work to read phy */
2013                         e1000_check_for_link(hw);
2014                         link_check = !hw->mac.get_link_status;
2015                         if (link_check) /* ESB2 fix */
2016                                 e1000_cfg_on_link_up(hw);
2017                 } else {
2018                         link_check = TRUE;
2019                 }
2020                 break;
2021
2022         case e1000_media_type_fiber:
2023                 e1000_check_for_link(hw);
2024                 link_check =
2025                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2026                 break;
2027
2028         case e1000_media_type_internal_serdes:
2029                 e1000_check_for_link(hw);
2030                 link_check = adapter->hw.mac.serdes_has_link;
2031                 break;
2032
2033         case e1000_media_type_unknown:
2034         default:
2035                 break;
2036         }
2037
2038         /* Now check for a transition */
2039         if (link_check && adapter->link_active == 0) {
2040                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2041                     &adapter->link_duplex);
2042
2043                 /*
2044                  * Check if we should enable/disable SPEED_MODE bit on
2045                  * 82571/82572
2046                  */
2047                 if (adapter->link_speed != SPEED_1000 &&
2048                     (hw->mac.type == e1000_82571 ||
2049                      hw->mac.type == e1000_82572)) {
2050                         int tarc0;
2051
2052                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2053                         tarc0 &= ~SPEED_MODE_BIT;
2054                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2055                 }
2056                 if (bootverbose) {
2057                         device_printf(dev, "Link is up %d Mbps %s\n",
2058                             adapter->link_speed,
2059                             ((adapter->link_duplex == FULL_DUPLEX) ?
2060                             "Full Duplex" : "Half Duplex"));
2061                 }
2062                 adapter->link_active = 1;
2063                 adapter->smartspeed = 0;
2064                 ifp->if_baudrate = adapter->link_speed * 1000000;
2065                 ifp->if_link_state = LINK_STATE_UP;
2066                 if_link_state_change(ifp);
2067         } else if (!link_check && adapter->link_active == 1) {
2068                 ifp->if_baudrate = adapter->link_speed = 0;
2069                 adapter->link_duplex = 0;
2070                 if (bootverbose)
2071                         device_printf(dev, "Link is Down\n");
2072                 adapter->link_active = 0;
2073 #if 0
2074                 /* Link down, disable watchdog */
2075                 if->if_timer = 0;
2076 #endif
2077                 ifp->if_link_state = LINK_STATE_DOWN;
2078                 if_link_state_change(ifp);
2079         }
2080 }
2081
2082 static void
2083 em_stop(struct adapter *adapter)
2084 {
2085         struct ifnet *ifp = &adapter->arpcom.ac_if;
2086         int i;
2087
2088         ASSERT_SERIALIZED(ifp->if_serializer);
2089
2090         em_disable_intr(adapter);
2091
2092         callout_stop(&adapter->timer);
2093         callout_stop(&adapter->tx_fifo_timer);
2094
2095         ifp->if_flags &= ~IFF_RUNNING;
2096         ifq_clr_oactive(&ifp->if_snd);
2097         ifp->if_timer = 0;
2098
2099         e1000_reset_hw(&adapter->hw);
2100         if (adapter->hw.mac.type >= e1000_82544)
2101                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2102
2103         for (i = 0; i < adapter->num_tx_desc; i++) {
2104                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2105
2106                 if (tx_buffer->m_head != NULL) {
2107                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2108                         m_freem(tx_buffer->m_head);
2109                         tx_buffer->m_head = NULL;
2110                 }
2111         }
2112
2113         for (i = 0; i < adapter->num_rx_desc; i++) {
2114                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2115
2116                 if (rx_buffer->m_head != NULL) {
2117                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2118                         m_freem(rx_buffer->m_head);
2119                         rx_buffer->m_head = NULL;
2120                 }
2121         }
2122
2123         if (adapter->fmp != NULL)
2124                 m_freem(adapter->fmp);
2125         adapter->fmp = NULL;
2126         adapter->lmp = NULL;
2127
2128         adapter->csum_flags = 0;
2129         adapter->csum_lhlen = 0;
2130         adapter->csum_iphlen = 0;
2131         adapter->csum_thlen = 0;
2132         adapter->csum_mss = 0;
2133         adapter->csum_pktlen = 0;
2134
2135         adapter->tx_dd_head = 0;
2136         adapter->tx_dd_tail = 0;
2137         adapter->tx_nsegs = 0;
2138 }
2139
2140 static int
2141 em_get_hw_info(struct adapter *adapter)
2142 {
2143         device_t dev = adapter->dev;
2144
2145         /* Save off the information about this board */
2146         adapter->hw.vendor_id = pci_get_vendor(dev);
2147         adapter->hw.device_id = pci_get_device(dev);
2148         adapter->hw.revision_id = pci_get_revid(dev);
2149         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2150         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2151
2152         /* Do Shared Code Init and Setup */
2153         if (e1000_set_mac_type(&adapter->hw))
2154                 return ENXIO;
2155         return 0;
2156 }
2157
2158 static int
2159 em_alloc_pci_res(struct adapter *adapter)
2160 {
2161         device_t dev = adapter->dev;
2162         u_int intr_flags;
2163         int val, rid, msi_enable;
2164
2165         /* Enable bus mastering */
2166         pci_enable_busmaster(dev);
2167
2168         adapter->memory_rid = EM_BAR_MEM;
2169         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2170                                 &adapter->memory_rid, RF_ACTIVE);
2171         if (adapter->memory == NULL) {
2172                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2173                 return (ENXIO);
2174         }
2175         adapter->osdep.mem_bus_space_tag =
2176             rman_get_bustag(adapter->memory);
2177         adapter->osdep.mem_bus_space_handle =
2178             rman_get_bushandle(adapter->memory);
2179
2180         /* XXX This is quite goofy, it is not actually used */
2181         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2182
2183         /* Only older adapters use IO mapping */
2184         if (adapter->hw.mac.type > e1000_82543 &&
2185             adapter->hw.mac.type < e1000_82571) {
2186                 /* Figure our where our IO BAR is ? */
2187                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2188                         val = pci_read_config(dev, rid, 4);
2189                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2190                                 adapter->io_rid = rid;
2191                                 break;
2192                         }
2193                         rid += 4;
2194                         /* check for 64bit BAR */
2195                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2196                                 rid += 4;
2197                 }
2198                 if (rid >= PCIR_CARDBUSCIS) {
2199                         device_printf(dev, "Unable to locate IO BAR\n");
2200                         return (ENXIO);
2201                 }
2202                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2203                                         &adapter->io_rid, RF_ACTIVE);
2204                 if (adapter->ioport == NULL) {
2205                         device_printf(dev, "Unable to allocate bus resource: "
2206                             "ioport\n");
2207                         return (ENXIO);
2208                 }
2209                 adapter->hw.io_base = 0;
2210                 adapter->osdep.io_bus_space_tag =
2211                     rman_get_bustag(adapter->ioport);
2212                 adapter->osdep.io_bus_space_handle =
2213                     rman_get_bushandle(adapter->ioport);
2214         }
2215
2216         /*
2217          * Don't enable MSI-X on 82574, see:
2218          * 82574 specification update errata #15
2219          *
2220          * Don't enable MSI on PCI/PCI-X chips, see:
2221          * 82540 specification update errata #6
2222          * 82545 specification update errata #4
2223          *
2224          * Don't enable MSI on 82571/82572, see:
2225          * 82571/82572 specification update errata #63
2226          */
2227         msi_enable = em_msi_enable;
2228         if (msi_enable &&
2229             (!pci_is_pcie(dev) ||
2230              adapter->hw.mac.type == e1000_82571 ||
2231              adapter->hw.mac.type == e1000_82572))
2232                 msi_enable = 0;
2233
2234         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2235             &adapter->intr_rid, &intr_flags);
2236
2237         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2238                 int unshared;
2239
2240                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2241                 if (!unshared) {
2242                         adapter->flags |= EM_FLAG_SHARED_INTR;
2243                         if (bootverbose)
2244                                 device_printf(dev, "IRQ shared\n");
2245                 } else {
2246                         intr_flags &= ~RF_SHAREABLE;
2247                         if (bootverbose)
2248                                 device_printf(dev, "IRQ unshared\n");
2249                 }
2250         }
2251
2252         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2253             &adapter->intr_rid, intr_flags);
2254         if (adapter->intr_res == NULL) {
2255                 device_printf(dev, "Unable to allocate bus resource: "
2256                     "interrupt\n");
2257                 return (ENXIO);
2258         }
2259
2260         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2261         adapter->hw.back = &adapter->osdep;
2262         return (0);
2263 }
2264
2265 static void
2266 em_free_pci_res(struct adapter *adapter)
2267 {
2268         device_t dev = adapter->dev;
2269
2270         if (adapter->intr_res != NULL) {
2271                 bus_release_resource(dev, SYS_RES_IRQ,
2272                     adapter->intr_rid, adapter->intr_res);
2273         }
2274
2275         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2276                 pci_release_msi(dev);
2277
2278         if (adapter->memory != NULL) {
2279                 bus_release_resource(dev, SYS_RES_MEMORY,
2280                     adapter->memory_rid, adapter->memory);
2281         }
2282
2283         if (adapter->flash != NULL) {
2284                 bus_release_resource(dev, SYS_RES_MEMORY,
2285                     adapter->flash_rid, adapter->flash);
2286         }
2287
2288         if (adapter->ioport != NULL) {
2289                 bus_release_resource(dev, SYS_RES_IOPORT,
2290                     adapter->io_rid, adapter->ioport);
2291         }
2292 }
2293
2294 static int
2295 em_reset(struct adapter *adapter)
2296 {
2297         device_t dev = adapter->dev;
2298         uint16_t rx_buffer_size;
2299         uint32_t pba;
2300
2301         /* When hardware is reset, fifo_head is also reset */
2302         adapter->tx_fifo_head = 0;
2303
2304         /* Set up smart power down as default off on newer adapters. */
2305         if (!em_smart_pwr_down &&
2306             (adapter->hw.mac.type == e1000_82571 ||
2307              adapter->hw.mac.type == e1000_82572)) {
2308                 uint16_t phy_tmp = 0;
2309
2310                 /* Speed up time to link by disabling smart power down. */
2311                 e1000_read_phy_reg(&adapter->hw,
2312                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2313                 phy_tmp &= ~IGP02E1000_PM_SPD;
2314                 e1000_write_phy_reg(&adapter->hw,
2315                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2316         }
2317
2318         /*
2319          * Packet Buffer Allocation (PBA)
2320          * Writing PBA sets the receive portion of the buffer
2321          * the remainder is used for the transmit buffer.
2322          *
2323          * Devices before the 82547 had a Packet Buffer of 64K.
2324          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
2325          * After the 82547 the buffer was reduced to 40K.
2326          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
2327          *   Note: default does not leave enough room for Jumbo Frame >10k.
2328          */
2329         switch (adapter->hw.mac.type) {
2330         case e1000_82547:
2331         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
2332                 if (adapter->max_frame_size > 8192)
2333                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
2334                 else
2335                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
2336                 adapter->tx_fifo_head = 0;
2337                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
2338                 adapter->tx_fifo_size =
2339                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
2340                 break;
2341
2342         /* Total Packet Buffer on these is 48K */
2343         case e1000_82571:
2344         case e1000_82572:
2345         case e1000_80003es2lan:
2346                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
2347                 break;
2348
2349         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
2350                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
2351                 break;
2352
2353         case e1000_82574:
2354         case e1000_82583:
2355                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
2356                 break;
2357
2358         case e1000_ich8lan:
2359                 pba = E1000_PBA_8K;
2360                 break;
2361
2362         case e1000_ich9lan:
2363         case e1000_ich10lan:
2364 #define E1000_PBA_10K   0x000A
2365                 pba = E1000_PBA_10K;
2366                 break;
2367
2368         case e1000_pchlan:
2369         case e1000_pch2lan:
2370         case e1000_pch_lpt:
2371                 pba = E1000_PBA_26K;
2372                 break;
2373
2374         default:
2375                 /* Devices before 82547 had a Packet Buffer of 64K.   */
2376                 if (adapter->max_frame_size > 8192)
2377                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
2378                 else
2379                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
2380         }
2381         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
2382
2383         /*
2384          * These parameters control the automatic generation (Tx) and
2385          * response (Rx) to Ethernet PAUSE frames.
2386          * - High water mark should allow for at least two frames to be
2387          *   received after sending an XOFF.
2388          * - Low water mark works best when it is very near the high water mark.
2389          *   This allows the receiver to restart by sending XON when it has
2390          *   drained a bit. Here we use an arbitary value of 1500 which will
2391          *   restart after one full frame is pulled from the buffer. There
2392          *   could be several smaller frames in the buffer and if so they will
2393          *   not trigger the XON until their total number reduces the buffer
2394          *   by 1500.
2395          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2396          */
2397         rx_buffer_size =
2398                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2399
2400         adapter->hw.fc.high_water = rx_buffer_size -
2401                                     roundup2(adapter->max_frame_size, 1024);
2402         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2403
2404         if (adapter->hw.mac.type == e1000_80003es2lan)
2405                 adapter->hw.fc.pause_time = 0xFFFF;
2406         else
2407                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2408
2409         adapter->hw.fc.send_xon = TRUE;
2410
2411         adapter->hw.fc.requested_mode = e1000_fc_full;
2412
2413         /*
2414          * Device specific overrides/settings
2415          */
2416         switch (adapter->hw.mac.type) {
2417         case e1000_pchlan:
2418                 /* Workaround: no TX flow ctrl for PCH */
2419                 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2420                 adapter->hw.fc.pause_time = 0xFFFF; /* override */
2421                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2422                         adapter->hw.fc.high_water = 0x3500;
2423                         adapter->hw.fc.low_water = 0x1500;
2424                 } else {
2425                         adapter->hw.fc.high_water = 0x5000;
2426                         adapter->hw.fc.low_water = 0x3000;
2427                 }
2428                 adapter->hw.fc.refresh_time = 0x1000;
2429                 break;
2430
2431         case e1000_pch2lan:
2432         case e1000_pch_lpt:
2433                 adapter->hw.fc.high_water = 0x5C20;
2434                 adapter->hw.fc.low_water = 0x5048;
2435                 adapter->hw.fc.pause_time = 0x0650;
2436                 adapter->hw.fc.refresh_time = 0x0400;
2437                 /* Jumbos need adjusted PBA */
2438                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2439                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2440                 else
2441                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2442                 break;
2443
2444         case e1000_ich9lan:
2445         case e1000_ich10lan:
2446                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2447                         adapter->hw.fc.high_water = 0x2800;
2448                         adapter->hw.fc.low_water =
2449                             adapter->hw.fc.high_water - 8;
2450                         break;
2451                 }
2452                 /* FALL THROUGH */
2453         default:
2454                 if (adapter->hw.mac.type == e1000_80003es2lan)
2455                         adapter->hw.fc.pause_time = 0xFFFF;
2456                 break;
2457         }
2458
2459         /* Issue a global reset */
2460         e1000_reset_hw(&adapter->hw);
2461         if (adapter->hw.mac.type >= e1000_82544)
2462                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2463         em_disable_aspm(adapter);
2464
2465         if (e1000_init_hw(&adapter->hw) < 0) {
2466                 device_printf(dev, "Hardware Initialization Failed\n");
2467                 return (EIO);
2468         }
2469
2470         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2471         e1000_get_phy_info(&adapter->hw);
2472         e1000_check_for_link(&adapter->hw);
2473
2474         return (0);
2475 }
2476
2477 static void
2478 em_setup_ifp(struct adapter *adapter)
2479 {
2480         struct ifnet *ifp = &adapter->arpcom.ac_if;
2481
2482         if_initname(ifp, device_get_name(adapter->dev),
2483                     device_get_unit(adapter->dev));
2484         ifp->if_softc = adapter;
2485         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2486         ifp->if_init =  em_init;
2487         ifp->if_ioctl = em_ioctl;
2488         ifp->if_start = em_start;
2489 #ifdef IFPOLL_ENABLE
2490         ifp->if_npoll = em_npoll;
2491 #endif
2492         ifp->if_watchdog = em_watchdog;
2493         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2494         ifq_set_ready(&ifp->if_snd);
2495
2496         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2497
2498         ifp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2499         if (adapter->hw.mac.type >= e1000_82543)
2500                 ifp->if_capabilities |= IFCAP_HWCSUM;
2501         if (adapter->flags & EM_FLAG_TSO)
2502                 ifp->if_capabilities |= IFCAP_TSO;
2503         ifp->if_capenable = ifp->if_capabilities;
2504
2505         if (ifp->if_capenable & IFCAP_TXCSUM)
2506                 ifp->if_hwassist |= EM_CSUM_FEATURES;
2507         if (ifp->if_capenable & IFCAP_TSO)
2508                 ifp->if_hwassist |= CSUM_TSO;
2509
2510         /*
2511          * Tell the upper layer(s) we support long frames.
2512          */
2513         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2514
2515         /*
2516          * Specify the media types supported by this adapter and register
2517          * callbacks to update media and link information
2518          */
2519         ifmedia_init(&adapter->media, IFM_IMASK,
2520                      em_media_change, em_media_status);
2521         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2522             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2523                 u_char fiber_type = IFM_1000_SX; /* default type */
2524
2525                 if (adapter->hw.mac.type == e1000_82545)
2526                         fiber_type = IFM_1000_LX;
2527                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2528                             0, NULL);
2529                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2530         } else {
2531                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2532                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2533                             0, NULL);
2534                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2535                             0, NULL);
2536                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2537                             0, NULL);
2538                 if (adapter->hw.phy.type != e1000_phy_ife) {
2539                         ifmedia_add(&adapter->media,
2540                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2541                         ifmedia_add(&adapter->media,
2542                                 IFM_ETHER | IFM_1000_T, 0, NULL);
2543                 }
2544         }
2545         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2546         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2547 }
2548
2549
2550 /*
2551  * Workaround for SmartSpeed on 82541 and 82547 controllers
2552  */
2553 static void
2554 em_smartspeed(struct adapter *adapter)
2555 {
2556         uint16_t phy_tmp;
2557
2558         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2559             adapter->hw.mac.autoneg == 0 ||
2560             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2561                 return;
2562
2563         if (adapter->smartspeed == 0) {
2564                 /*
2565                  * If Master/Slave config fault is asserted twice,
2566                  * we assume back-to-back
2567                  */
2568                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2569                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2570                         return;
2571                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2572                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2573                         e1000_read_phy_reg(&adapter->hw,
2574                             PHY_1000T_CTRL, &phy_tmp);
2575                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2576                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2577                                 e1000_write_phy_reg(&adapter->hw,
2578                                     PHY_1000T_CTRL, phy_tmp);
2579                                 adapter->smartspeed++;
2580                                 if (adapter->hw.mac.autoneg &&
2581                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2582                                     !e1000_read_phy_reg(&adapter->hw,
2583                                      PHY_CONTROL, &phy_tmp)) {
2584                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2585                                                    MII_CR_RESTART_AUTO_NEG;
2586                                         e1000_write_phy_reg(&adapter->hw,
2587                                             PHY_CONTROL, phy_tmp);
2588                                 }
2589                         }
2590                 }
2591                 return;
2592         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2593                 /* If still no link, perhaps using 2/3 pair cable */
2594                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2595                 phy_tmp |= CR_1000T_MS_ENABLE;
2596                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2597                 if (adapter->hw.mac.autoneg &&
2598                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2599                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2600                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2601                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2602                 }
2603         }
2604
2605         /* Restart process after EM_SMARTSPEED_MAX iterations */
2606         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2607                 adapter->smartspeed = 0;
2608 }
2609
2610 static int
2611 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2612               struct em_dma_alloc *dma)
2613 {
2614         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2615                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2616                                 &dma->dma_tag, &dma->dma_map,
2617                                 &dma->dma_paddr);
2618         if (dma->dma_vaddr == NULL)
2619                 return ENOMEM;
2620         else
2621                 return 0;
2622 }
2623
2624 static void
2625 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2626 {
2627         if (dma->dma_tag == NULL)
2628                 return;
2629         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2630         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2631         bus_dma_tag_destroy(dma->dma_tag);
2632 }
2633
2634 static int
2635 em_create_tx_ring(struct adapter *adapter)
2636 {
2637         device_t dev = adapter->dev;
2638         struct em_buffer *tx_buffer;
2639         int error, i;
2640
2641         adapter->tx_buffer_area =
2642                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2643                         M_DEVBUF, M_WAITOK | M_ZERO);
2644
2645         /*
2646          * Create DMA tags for tx buffers
2647          */
2648         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2649                         1, 0,                   /* alignment, bounds */
2650                         BUS_SPACE_MAXADDR,      /* lowaddr */
2651                         BUS_SPACE_MAXADDR,      /* highaddr */
2652                         NULL, NULL,             /* filter, filterarg */
2653                         EM_TSO_SIZE,            /* maxsize */
2654                         EM_MAX_SCATTER,         /* nsegments */
2655                         PAGE_SIZE,              /* maxsegsize */
2656                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2657                         BUS_DMA_ONEBPAGE,       /* flags */
2658                         &adapter->txtag);
2659         if (error) {
2660                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2661                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2662                 adapter->tx_buffer_area = NULL;
2663                 return error;
2664         }
2665
2666         /*
2667          * Create DMA maps for tx buffers
2668          */
2669         for (i = 0; i < adapter->num_tx_desc; i++) {
2670                 tx_buffer = &adapter->tx_buffer_area[i];
2671
2672                 error = bus_dmamap_create(adapter->txtag,
2673                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2674                                           &tx_buffer->map);
2675                 if (error) {
2676                         device_printf(dev, "Unable to create TX DMA map\n");
2677                         em_destroy_tx_ring(adapter, i);
2678                         return error;
2679                 }
2680         }
2681         return (0);
2682 }
2683
2684 static void
2685 em_init_tx_ring(struct adapter *adapter)
2686 {
2687         /* Clear the old ring contents */
2688         bzero(adapter->tx_desc_base,
2689             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2690
2691         /* Reset state */
2692         adapter->next_avail_tx_desc = 0;
2693         adapter->next_tx_to_clean = 0;
2694         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2695 }
2696
2697 static void
2698 em_init_tx_unit(struct adapter *adapter)
2699 {
2700         uint32_t tctl, tarc, tipg = 0;
2701         uint64_t bus_addr;
2702
2703         /* Setup the Base and Length of the Tx Descriptor Ring */
2704         bus_addr = adapter->txdma.dma_paddr;
2705         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2706             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2707         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2708             (uint32_t)(bus_addr >> 32));
2709         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2710             (uint32_t)bus_addr);
2711         /* Setup the HW Tx Head and Tail descriptor pointers */
2712         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2713         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2714
2715         /* Set the default values for the Tx Inter Packet Gap timer */
2716         switch (adapter->hw.mac.type) {
2717         case e1000_82542:
2718                 tipg = DEFAULT_82542_TIPG_IPGT;
2719                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2720                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2721                 break;
2722
2723         case e1000_80003es2lan:
2724                 tipg = DEFAULT_82543_TIPG_IPGR1;
2725                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2726                     E1000_TIPG_IPGR2_SHIFT;
2727                 break;
2728
2729         default:
2730                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2731                     adapter->hw.phy.media_type ==
2732                     e1000_media_type_internal_serdes)
2733                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2734                 else
2735                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2736                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2737                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2738                 break;
2739         }
2740
2741         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2742
2743         /* NOTE: 0 is not allowed for TIDV */
2744         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2745         if(adapter->hw.mac.type >= e1000_82540)
2746                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2747
2748         if (adapter->hw.mac.type == e1000_82571 ||
2749             adapter->hw.mac.type == e1000_82572) {
2750                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2751                 tarc |= SPEED_MODE_BIT;
2752                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2753         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2754                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2755                 tarc |= 1;
2756                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2757                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2758                 tarc |= 1;
2759                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2760         }
2761
2762         /* Program the Transmit Control Register */
2763         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2764         tctl &= ~E1000_TCTL_CT;
2765         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2766                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2767
2768         if (adapter->hw.mac.type >= e1000_82571)
2769                 tctl |= E1000_TCTL_MULR;
2770
2771         /* This write will effectively turn on the transmit unit. */
2772         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2773
2774         if (adapter->hw.mac.type == e1000_82571 ||
2775             adapter->hw.mac.type == e1000_82572 ||
2776             adapter->hw.mac.type == e1000_80003es2lan) {
2777                 /* Bit 28 of TARC1 must be cleared when MULR is enabled */
2778                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2779                 tarc &= ~(1 << 28);
2780                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2781         }
2782 }
2783
2784 static void
2785 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2786 {
2787         struct em_buffer *tx_buffer;
2788         int i;
2789
2790         if (adapter->tx_buffer_area == NULL)
2791                 return;
2792
2793         for (i = 0; i < ndesc; i++) {
2794                 tx_buffer = &adapter->tx_buffer_area[i];
2795
2796                 KKASSERT(tx_buffer->m_head == NULL);
2797                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2798         }
2799         bus_dma_tag_destroy(adapter->txtag);
2800
2801         kfree(adapter->tx_buffer_area, M_DEVBUF);
2802         adapter->tx_buffer_area = NULL;
2803 }
2804
2805 /*
2806  * The offload context needs to be set when we transfer the first
2807  * packet of a particular protocol (TCP/UDP).  This routine has been
2808  * enhanced to deal with inserted VLAN headers.
2809  *
2810  * If the new packet's ether header length, ip header length and
2811  * csum offloading type are same as the previous packet, we should
2812  * avoid allocating a new csum context descriptor; mainly to take
2813  * advantage of the pipeline effect of the TX data read request.
2814  *
2815  * This function returns number of TX descrptors allocated for
2816  * csum context.
2817  */
2818 static int
2819 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2820           uint32_t *txd_upper, uint32_t *txd_lower)
2821 {
2822         struct e1000_context_desc *TXD;
2823         int curr_txd, ehdrlen, csum_flags;
2824         uint32_t cmd, hdr_len, ip_hlen;
2825
2826         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2827         ip_hlen = mp->m_pkthdr.csum_iphlen;
2828         ehdrlen = mp->m_pkthdr.csum_lhlen;
2829
2830         if (adapter->csum_lhlen == ehdrlen &&
2831             adapter->csum_iphlen == ip_hlen &&
2832             adapter->csum_flags == csum_flags) {
2833                 /*
2834                  * Same csum offload context as the previous packets;
2835                  * just return.
2836                  */
2837                 *txd_upper = adapter->csum_txd_upper;
2838                 *txd_lower = adapter->csum_txd_lower;
2839                 return 0;
2840         }
2841
2842         /*
2843          * Setup a new csum offload context.
2844          */
2845
2846         curr_txd = adapter->next_avail_tx_desc;
2847         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2848
2849         cmd = 0;
2850
2851         /* Setup of IP header checksum. */
2852         if (csum_flags & CSUM_IP) {
2853                 /*
2854                  * Start offset for header checksum calculation.
2855                  * End offset for header checksum calculation.
2856                  * Offset of place to put the checksum.
2857                  */
2858                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2859                 TXD->lower_setup.ip_fields.ipcse =
2860                     htole16(ehdrlen + ip_hlen - 1);
2861                 TXD->lower_setup.ip_fields.ipcso =
2862                     ehdrlen + offsetof(struct ip, ip_sum);
2863                 cmd |= E1000_TXD_CMD_IP;
2864                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2865         }
2866         hdr_len = ehdrlen + ip_hlen;
2867
2868         if (csum_flags & CSUM_TCP) {
2869                 /*
2870                  * Start offset for payload checksum calculation.
2871                  * End offset for payload checksum calculation.
2872                  * Offset of place to put the checksum.
2873                  */
2874                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2875                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2876                 TXD->upper_setup.tcp_fields.tucso =
2877                     hdr_len + offsetof(struct tcphdr, th_sum);
2878                 cmd |= E1000_TXD_CMD_TCP;
2879                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2880         } else if (csum_flags & CSUM_UDP) {
2881                 /*
2882                  * Start offset for header checksum calculation.
2883                  * End offset for header checksum calculation.
2884                  * Offset of place to put the checksum.
2885                  */
2886                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2887                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2888                 TXD->upper_setup.tcp_fields.tucso =
2889                     hdr_len + offsetof(struct udphdr, uh_sum);
2890                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2891         }
2892
2893         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2894                      E1000_TXD_DTYP_D;          /* Data descr */
2895
2896         /* Save the information for this csum offloading context */
2897         adapter->csum_lhlen = ehdrlen;
2898         adapter->csum_iphlen = ip_hlen;
2899         adapter->csum_flags = csum_flags;
2900         adapter->csum_txd_upper = *txd_upper;
2901         adapter->csum_txd_lower = *txd_lower;
2902
2903         TXD->tcp_seg_setup.data = htole32(0);
2904         TXD->cmd_and_length =
2905             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2906
2907         if (++curr_txd == adapter->num_tx_desc)
2908                 curr_txd = 0;
2909
2910         KKASSERT(adapter->num_tx_desc_avail > 0);
2911         adapter->num_tx_desc_avail--;
2912
2913         adapter->next_avail_tx_desc = curr_txd;
2914         return 1;
2915 }
2916
2917 static void
2918 em_txeof(struct adapter *adapter)
2919 {
2920         struct ifnet *ifp = &adapter->arpcom.ac_if;
2921         struct em_buffer *tx_buffer;
2922         int first, num_avail;
2923
2924         if (adapter->tx_dd_head == adapter->tx_dd_tail)
2925                 return;
2926
2927         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2928                 return;
2929
2930         num_avail = adapter->num_tx_desc_avail;
2931         first = adapter->next_tx_to_clean;
2932
2933         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2934                 struct e1000_tx_desc *tx_desc;
2935                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2936
2937                 tx_desc = &adapter->tx_desc_base[dd_idx];
2938                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2939                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2940
2941                         if (++dd_idx == adapter->num_tx_desc)
2942                                 dd_idx = 0;
2943
2944                         while (first != dd_idx) {
2945                                 logif(pkt_txclean);
2946
2947                                 num_avail++;
2948
2949                                 tx_buffer = &adapter->tx_buffer_area[first];
2950                                 if (tx_buffer->m_head) {
2951                                         IFNET_STAT_INC(ifp, opackets, 1);
2952                                         bus_dmamap_unload(adapter->txtag,
2953                                                           tx_buffer->map);
2954                                         m_freem(tx_buffer->m_head);
2955                                         tx_buffer->m_head = NULL;
2956                                 }
2957
2958                                 if (++first == adapter->num_tx_desc)
2959                                         first = 0;
2960                         }
2961                 } else {
2962                         break;
2963                 }
2964         }
2965         adapter->next_tx_to_clean = first;
2966         adapter->num_tx_desc_avail = num_avail;
2967
2968         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2969                 adapter->tx_dd_head = 0;
2970                 adapter->tx_dd_tail = 0;
2971         }
2972
2973         if (!EM_IS_OACTIVE(adapter)) {
2974                 ifq_clr_oactive(&ifp->if_snd);
2975
2976                 /* All clean, turn off the timer */
2977                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2978                         ifp->if_timer = 0;
2979         }
2980 }
2981
2982 static void
2983 em_tx_collect(struct adapter *adapter)
2984 {
2985         struct ifnet *ifp = &adapter->arpcom.ac_if;
2986         struct em_buffer *tx_buffer;
2987         int tdh, first, num_avail, dd_idx = -1;
2988
2989         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2990                 return;
2991
2992         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
2993         if (tdh == adapter->next_tx_to_clean)
2994                 return;
2995
2996         if (adapter->tx_dd_head != adapter->tx_dd_tail)
2997                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2998
2999         num_avail = adapter->num_tx_desc_avail;
3000         first = adapter->next_tx_to_clean;
3001
3002         while (first != tdh) {
3003                 logif(pkt_txclean);
3004
3005                 num_avail++;
3006
3007                 tx_buffer = &adapter->tx_buffer_area[first];
3008                 if (tx_buffer->m_head) {
3009                         IFNET_STAT_INC(ifp, opackets, 1);
3010                         bus_dmamap_unload(adapter->txtag,
3011                                           tx_buffer->map);
3012                         m_freem(tx_buffer->m_head);
3013                         tx_buffer->m_head = NULL;
3014                 }
3015
3016                 if (first == dd_idx) {
3017                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3018                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3019                                 adapter->tx_dd_head = 0;
3020                                 adapter->tx_dd_tail = 0;
3021                                 dd_idx = -1;
3022                         } else {
3023                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3024                         }
3025                 }
3026
3027                 if (++first == adapter->num_tx_desc)
3028                         first = 0;
3029         }
3030         adapter->next_tx_to_clean = first;
3031         adapter->num_tx_desc_avail = num_avail;
3032
3033         if (!EM_IS_OACTIVE(adapter)) {
3034                 ifq_clr_oactive(&ifp->if_snd);
3035
3036                 /* All clean, turn off the timer */
3037                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3038                         ifp->if_timer = 0;
3039         }
3040 }
3041
3042 /*
3043  * When Link is lost sometimes there is work still in the TX ring
3044  * which will result in a watchdog, rather than allow that do an
3045  * attempted cleanup and then reinit here.  Note that this has been
3046  * seens mostly with fiber adapters.
3047  */
3048 static void
3049 em_tx_purge(struct adapter *adapter)
3050 {
3051         struct ifnet *ifp = &adapter->arpcom.ac_if;
3052
3053         if (!adapter->link_active && ifp->if_timer) {
3054                 em_tx_collect(adapter);
3055                 if (ifp->if_timer) {
3056                         if_printf(ifp, "Link lost, TX pending, reinit\n");
3057                         ifp->if_timer = 0;
3058                         em_init(adapter);
3059                 }
3060         }
3061 }
3062
3063 static int
3064 em_newbuf(struct adapter *adapter, int i, int init)
3065 {
3066         struct mbuf *m;
3067         bus_dma_segment_t seg;
3068         bus_dmamap_t map;
3069         struct em_buffer *rx_buffer;
3070         int error, nseg;
3071
3072         m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
3073         if (m == NULL) {
3074                 adapter->mbuf_cluster_failed++;
3075                 if (init) {
3076                         if_printf(&adapter->arpcom.ac_if,
3077                                   "Unable to allocate RX mbuf\n");
3078                 }
3079                 return (ENOBUFS);
3080         }
3081         m->m_len = m->m_pkthdr.len = MCLBYTES;
3082
3083         if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
3084                 m_adj(m, ETHER_ALIGN);
3085
3086         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3087                         adapter->rx_sparemap, m,
3088                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3089         if (error) {
3090                 m_freem(m);
3091                 if (init) {
3092                         if_printf(&adapter->arpcom.ac_if,
3093                                   "Unable to load RX mbuf\n");
3094                 }
3095                 return (error);
3096         }
3097
3098         rx_buffer = &adapter->rx_buffer_area[i];
3099         if (rx_buffer->m_head != NULL)
3100                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3101
3102         map = rx_buffer->map;
3103         rx_buffer->map = adapter->rx_sparemap;
3104         adapter->rx_sparemap = map;
3105
3106         rx_buffer->m_head = m;
3107
3108         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3109         return (0);
3110 }
3111
3112 static int
3113 em_create_rx_ring(struct adapter *adapter)
3114 {
3115         device_t dev = adapter->dev;
3116         struct em_buffer *rx_buffer;
3117         int i, error;
3118
3119         adapter->rx_buffer_area =
3120                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3121                         M_DEVBUF, M_WAITOK | M_ZERO);
3122
3123         /*
3124          * Create DMA tag for rx buffers
3125          */
3126         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3127                         1, 0,                   /* alignment, bounds */
3128                         BUS_SPACE_MAXADDR,      /* lowaddr */
3129                         BUS_SPACE_MAXADDR,      /* highaddr */
3130                         NULL, NULL,             /* filter, filterarg */
3131                         MCLBYTES,               /* maxsize */
3132                         1,                      /* nsegments */
3133                         MCLBYTES,               /* maxsegsize */
3134                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3135                         &adapter->rxtag);
3136         if (error) {
3137                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3138                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3139                 adapter->rx_buffer_area = NULL;
3140                 return error;
3141         }
3142
3143         /*
3144          * Create spare DMA map for rx buffers
3145          */
3146         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3147                                   &adapter->rx_sparemap);
3148         if (error) {
3149                 device_printf(dev, "Unable to create spare RX DMA map\n");
3150                 bus_dma_tag_destroy(adapter->rxtag);
3151                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3152                 adapter->rx_buffer_area = NULL;
3153                 return error;
3154         }
3155
3156         /*
3157          * Create DMA maps for rx buffers
3158          */
3159         for (i = 0; i < adapter->num_rx_desc; i++) {
3160                 rx_buffer = &adapter->rx_buffer_area[i];
3161
3162                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3163                                           &rx_buffer->map);
3164                 if (error) {
3165                         device_printf(dev, "Unable to create RX DMA map\n");
3166                         em_destroy_rx_ring(adapter, i);
3167                         return error;
3168                 }
3169         }
3170         return (0);
3171 }
3172
3173 static int
3174 em_init_rx_ring(struct adapter *adapter)
3175 {
3176         int i, error;
3177
3178         /* Reset descriptor ring */
3179         bzero(adapter->rx_desc_base,
3180             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3181
3182         /* Allocate new ones. */
3183         for (i = 0; i < adapter->num_rx_desc; i++) {
3184                 error = em_newbuf(adapter, i, 1);
3185                 if (error)
3186                         return (error);
3187         }
3188
3189         /* Setup our descriptor pointers */
3190         adapter->next_rx_desc_to_check = 0;
3191
3192         return (0);
3193 }
3194
3195 static void
3196 em_init_rx_unit(struct adapter *adapter)
3197 {
3198         struct ifnet *ifp = &adapter->arpcom.ac_if;
3199         uint64_t bus_addr;
3200         uint32_t rctl;
3201
3202         /*
3203          * Make sure receives are disabled while setting
3204          * up the descriptor ring
3205          */
3206         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3207         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3208
3209         if (adapter->hw.mac.type >= e1000_82540) {
3210                 uint32_t itr;
3211
3212                 /*
3213                  * Set the interrupt throttling rate. Value is calculated
3214                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3215                  */
3216                 if (adapter->int_throttle_ceil)
3217                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3218                 else
3219                         itr = 0;
3220                 em_set_itr(adapter, itr);
3221         }
3222
3223         /* Disable accelerated ackknowledge */
3224         if (adapter->hw.mac.type == e1000_82574) {
3225                 E1000_WRITE_REG(&adapter->hw,
3226                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3227         }
3228
3229         /* Receive Checksum Offload for TCP and UDP */
3230         if (ifp->if_capenable & IFCAP_RXCSUM) {
3231                 uint32_t rxcsum;
3232
3233                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3234                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3235                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3236         }
3237
3238         /*
3239          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3240          * long latencies are observed, like Lenovo X60. This
3241          * change eliminates the problem, but since having positive
3242          * values in RDTR is a known source of problems on other
3243          * platforms another solution is being sought.
3244          */
3245         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3246                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3247                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3248         }
3249
3250         /*
3251          * Setup the Base and Length of the Rx Descriptor Ring
3252          */
3253         bus_addr = adapter->rxdma.dma_paddr;
3254         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3255             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3256         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3257             (uint32_t)(bus_addr >> 32));
3258         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3259             (uint32_t)bus_addr);
3260
3261         /*
3262          * Setup the HW Rx Head and Tail Descriptor Pointers
3263          */
3264         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3265         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3266
3267         /* Set PTHRESH for improved jumbo performance */
3268         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3269             (adapter->hw.mac.type == e1000_pch2lan) ||
3270             (adapter->hw.mac.type == e1000_ich10lan)) &&
3271             (ifp->if_mtu > ETHERMTU)) {
3272                 uint32_t rxdctl;
3273
3274                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3275                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3276         }
3277
3278         if (adapter->hw.mac.type >= e1000_pch2lan) {
3279                 if (ifp->if_mtu > ETHERMTU)
3280                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3281                 else
3282                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3283         }
3284
3285         /* Setup the Receive Control Register */
3286         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3287         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3288                 E1000_RCTL_RDMTS_HALF |
3289                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3290
3291         /* Make sure VLAN Filters are off */
3292         rctl &= ~E1000_RCTL_VFE;
3293
3294         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3295                 rctl |= E1000_RCTL_SBP;
3296         else
3297                 rctl &= ~E1000_RCTL_SBP;
3298
3299         switch (adapter->rx_buffer_len) {
3300         default:
3301         case 2048:
3302                 rctl |= E1000_RCTL_SZ_2048;
3303                 break;
3304
3305         case 4096:
3306                 rctl |= E1000_RCTL_SZ_4096 |
3307                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3308                 break;
3309
3310         case 8192:
3311                 rctl |= E1000_RCTL_SZ_8192 |
3312                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3313                 break;
3314
3315         case 16384:
3316                 rctl |= E1000_RCTL_SZ_16384 |
3317                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3318                 break;
3319         }
3320
3321         if (ifp->if_mtu > ETHERMTU)
3322                 rctl |= E1000_RCTL_LPE;
3323         else
3324                 rctl &= ~E1000_RCTL_LPE;
3325
3326         /* Enable Receives */
3327         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3328 }
3329
3330 static void
3331 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3332 {
3333         struct em_buffer *rx_buffer;
3334         int i;
3335
3336         if (adapter->rx_buffer_area == NULL)
3337                 return;
3338
3339         for (i = 0; i < ndesc; i++) {
3340                 rx_buffer = &adapter->rx_buffer_area[i];
3341
3342                 KKASSERT(rx_buffer->m_head == NULL);
3343                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3344         }
3345         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3346         bus_dma_tag_destroy(adapter->rxtag);
3347
3348         kfree(adapter->rx_buffer_area, M_DEVBUF);
3349         adapter->rx_buffer_area = NULL;
3350 }
3351
3352 static void
3353 em_rxeof(struct adapter *adapter, int count)
3354 {
3355         struct ifnet *ifp = &adapter->arpcom.ac_if;
3356         uint8_t status, accept_frame = 0, eop = 0;
3357         uint16_t len, desc_len, prev_len_adj;
3358         struct e1000_rx_desc *current_desc;
3359         struct mbuf *mp;
3360         int i;
3361
3362         i = adapter->next_rx_desc_to_check;
3363         current_desc = &adapter->rx_desc_base[i];
3364
3365         if (!(current_desc->status & E1000_RXD_STAT_DD))
3366                 return;
3367
3368         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3369                 struct mbuf *m = NULL;
3370
3371                 logif(pkt_receive);
3372
3373                 mp = adapter->rx_buffer_area[i].m_head;
3374
3375                 /*
3376                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3377                  * needs to access the last received byte in the mbuf.
3378                  */
3379                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3380                                 BUS_DMASYNC_POSTREAD);
3381
3382                 accept_frame = 1;
3383                 prev_len_adj = 0;
3384                 desc_len = le16toh(current_desc->length);
3385                 status = current_desc->status;
3386                 if (status & E1000_RXD_STAT_EOP) {
3387                         count--;
3388                         eop = 1;
3389                         if (desc_len < ETHER_CRC_LEN) {
3390                                 len = 0;
3391                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3392                         } else {
3393                                 len = desc_len - ETHER_CRC_LEN;
3394                         }
3395                 } else {
3396                         eop = 0;
3397                         len = desc_len;
3398                 }
3399
3400                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3401                         uint8_t last_byte;
3402                         uint32_t pkt_len = desc_len;
3403
3404                         if (adapter->fmp != NULL)
3405                                 pkt_len += adapter->fmp->m_pkthdr.len;
3406
3407                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3408                         if (TBI_ACCEPT(&adapter->hw, status,
3409                             current_desc->errors, pkt_len, last_byte,
3410                             adapter->min_frame_size, adapter->max_frame_size)) {
3411                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3412                                     &adapter->stats, pkt_len,
3413                                     adapter->hw.mac.addr,
3414                                     adapter->max_frame_size);
3415                                 if (len > 0)
3416                                         len--;
3417                         } else {
3418                                 accept_frame = 0;
3419                         }
3420                 }
3421
3422                 if (accept_frame) {
3423                         if (em_newbuf(adapter, i, 0) != 0) {
3424                                 IFNET_STAT_INC(ifp, iqdrops, 1);
3425                                 goto discard;
3426                         }
3427
3428                         /* Assign correct length to the current fragment */
3429                         mp->m_len = len;
3430
3431                         if (adapter->fmp == NULL) {
3432                                 mp->m_pkthdr.len = len;
3433                                 adapter->fmp = mp; /* Store the first mbuf */
3434                                 adapter->lmp = mp;
3435                         } else {
3436                                 /*
3437                                  * Chain mbuf's together
3438                                  */
3439
3440                                 /*
3441                                  * Adjust length of previous mbuf in chain if
3442                                  * we received less than 4 bytes in the last
3443                                  * descriptor.
3444                                  */
3445                                 if (prev_len_adj > 0) {
3446                                         adapter->lmp->m_len -= prev_len_adj;
3447                                         adapter->fmp->m_pkthdr.len -=
3448                                             prev_len_adj;
3449                                 }
3450                                 adapter->lmp->m_next = mp;
3451                                 adapter->lmp = adapter->lmp->m_next;
3452                                 adapter->fmp->m_pkthdr.len += len;
3453                         }
3454
3455                         if (eop) {
3456                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3457                                 IFNET_STAT_INC(ifp, ipackets, 1);
3458
3459                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3460                                         em_rxcsum(adapter, current_desc,
3461                                                   adapter->fmp);
3462                                 }
3463
3464                                 if (status & E1000_RXD_STAT_VP) {
3465                                         adapter->fmp->m_pkthdr.ether_vlantag =
3466                                             (le16toh(current_desc->special) &
3467                                             E1000_RXD_SPC_VLAN_MASK);
3468                                         adapter->fmp->m_flags |= M_VLANTAG;
3469                                 }
3470                                 m = adapter->fmp;
3471                                 adapter->fmp = NULL;
3472                                 adapter->lmp = NULL;
3473                         }
3474                 } else {
3475                         IFNET_STAT_INC(ifp, ierrors, 1);
3476 discard:
3477 #ifdef foo
3478                         /* Reuse loaded DMA map and just update mbuf chain */
3479                         mp = adapter->rx_buffer_area[i].m_head;
3480                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3481                         mp->m_data = mp->m_ext.ext_buf;
3482                         mp->m_next = NULL;
3483                         if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3484                                 m_adj(mp, ETHER_ALIGN);
3485 #endif
3486                         if (adapter->fmp != NULL) {
3487                                 m_freem(adapter->fmp);
3488                                 adapter->fmp = NULL;
3489                                 adapter->lmp = NULL;
3490                         }
3491                         m = NULL;
3492                 }
3493
3494                 /* Zero out the receive descriptors status. */
3495                 current_desc->status = 0;
3496
3497                 if (m != NULL)
3498                         ifp->if_input(ifp, m);
3499
3500                 /* Advance our pointers to the next descriptor. */
3501                 if (++i == adapter->num_rx_desc)
3502                         i = 0;
3503                 current_desc = &adapter->rx_desc_base[i];
3504         }
3505         adapter->next_rx_desc_to_check = i;
3506
3507         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3508         if (--i < 0)
3509                 i = adapter->num_rx_desc - 1;
3510         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3511 }
3512
3513 static void
3514 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3515           struct mbuf *mp)
3516 {
3517         /* 82543 or newer only */
3518         if (adapter->hw.mac.type < e1000_82543 ||
3519             /* Ignore Checksum bit is set */
3520             (rx_desc->status & E1000_RXD_STAT_IXSM))
3521                 return;
3522
3523         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3524             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3525                 /* IP Checksum Good */
3526                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3527         }
3528
3529         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3530             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3531                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3532                                            CSUM_PSEUDO_HDR |
3533                                            CSUM_FRAG_NOT_CHECKED;
3534                 mp->m_pkthdr.csum_data = htons(0xffff);
3535         }
3536 }
3537
3538 static void
3539 em_enable_intr(struct adapter *adapter)
3540 {
3541         uint32_t ims_mask = IMS_ENABLE_MASK;
3542
3543         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3544
3545 #if 0
3546         /* XXX MSIX */
3547         if (adapter->hw.mac.type == e1000_82574) {
3548                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3549                 ims_mask |= EM_MSIX_MASK;
3550         }
3551 #endif
3552         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3553 }
3554
3555 static void
3556 em_disable_intr(struct adapter *adapter)
3557 {
3558         uint32_t clear = 0xffffffff;
3559
3560         /*
3561          * The first version of 82542 had an errata where when link was forced
3562          * it would stay up even up even if the cable was disconnected.
3563          * Sequence errors were used to detect the disconnect and then the
3564          * driver would unforce the link.  This code in the in the ISR.  For
3565          * this to work correctly the Sequence error interrupt had to be
3566          * enabled all the time.
3567          */
3568         if (adapter->hw.mac.type == e1000_82542 &&
3569             adapter->hw.revision_id == E1000_REVISION_2)
3570                 clear &= ~E1000_ICR_RXSEQ;
3571         else if (adapter->hw.mac.type == e1000_82574)
3572                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3573
3574         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3575
3576         adapter->npoll.ifpc_stcount = 0;
3577
3578         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3579 }
3580
3581 /*
3582  * Bit of a misnomer, what this really means is
3583  * to enable OS management of the system... aka
3584  * to disable special hardware management features
3585  */
3586 static void
3587 em_get_mgmt(struct adapter *adapter)
3588 {
3589         /* A shared code workaround */
3590 #define E1000_82542_MANC2H E1000_MANC2H
3591         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3592                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3593                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3594
3595                 /* disable hardware interception of ARP */
3596                 manc &= ~(E1000_MANC_ARP_EN);
3597
3598                 /* enable receiving management packets to the host */
3599                 if (adapter->hw.mac.type >= e1000_82571) {
3600                         manc |= E1000_MANC_EN_MNG2HOST;
3601 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3602 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3603                         manc2h |= E1000_MNG2HOST_PORT_623;
3604                         manc2h |= E1000_MNG2HOST_PORT_664;
3605                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3606                 }
3607
3608                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3609         }
3610 }
3611
3612 /*
3613  * Give control back to hardware management
3614  * controller if there is one.
3615  */
3616 static void
3617 em_rel_mgmt(struct adapter *adapter)
3618 {
3619         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3620                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3621
3622                 /* re-enable hardware interception of ARP */
3623                 manc |= E1000_MANC_ARP_EN;
3624
3625                 if (adapter->hw.mac.type >= e1000_82571)
3626                         manc &= ~E1000_MANC_EN_MNG2HOST;
3627
3628                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3629         }
3630 }
3631
3632 /*
3633  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3634  * For ASF and Pass Through versions of f/w this means that
3635  * the driver is loaded.  For AMT version (only with 82573)
3636  * of the f/w this means that the network i/f is open.
3637  */
3638 static void
3639 em_get_hw_control(struct adapter *adapter)
3640 {
3641         /* Let firmware know the driver has taken over */
3642         if (adapter->hw.mac.type == e1000_82573) {
3643                 uint32_t swsm;
3644
3645                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3646                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3647                     swsm | E1000_SWSM_DRV_LOAD);
3648         } else {
3649                 uint32_t ctrl_ext;
3650
3651                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3652                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3653                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3654         }
3655         adapter->flags |= EM_FLAG_HW_CTRL;
3656 }
3657
3658 /*
3659  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3660  * For ASF and Pass Through versions of f/w this means that the
3661  * driver is no longer loaded.  For AMT version (only with 82573)
3662  * of the f/w this means that the network i/f is closed.
3663  */
3664 static void
3665 em_rel_hw_control(struct adapter *adapter)
3666 {
3667         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3668                 return;
3669         adapter->flags &= ~EM_FLAG_HW_CTRL;
3670
3671         /* Let firmware taken over control of h/w */
3672         if (adapter->hw.mac.type == e1000_82573) {
3673                 uint32_t swsm;
3674
3675                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3676                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3677                     swsm & ~E1000_SWSM_DRV_LOAD);
3678         } else {
3679                 uint32_t ctrl_ext;
3680
3681                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3682                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3683                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3684         }
3685 }
3686
3687 static int
3688 em_is_valid_eaddr(const uint8_t *addr)
3689 {
3690         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3691
3692         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3693                 return (FALSE);
3694
3695         return (TRUE);
3696 }
3697
3698 /*
3699  * Enable PCI Wake On Lan capability
3700  */
3701 void
3702 em_enable_wol(device_t dev)
3703 {
3704         uint16_t cap, status;
3705         uint8_t id;
3706
3707         /* First find the capabilities pointer*/
3708         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3709
3710         /* Read the PM Capabilities */
3711         id = pci_read_config(dev, cap, 1);
3712         if (id != PCIY_PMG)     /* Something wrong */
3713                 return;
3714
3715         /*
3716          * OK, we have the power capabilities,
3717          * so now get the status register
3718          */
3719         cap += PCIR_POWER_STATUS;
3720         status = pci_read_config(dev, cap, 2);
3721         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3722         pci_write_config(dev, cap, status, 2);
3723 }
3724
3725
3726 /*
3727  * 82544 Coexistence issue workaround.
3728  *    There are 2 issues.
3729  *       1. Transmit Hang issue.
3730  *    To detect this issue, following equation can be used...
3731  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3732  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3733  *
3734  *       2. DAC issue.
3735  *    To detect this issue, following equation can be used...
3736  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3737  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3738  *
3739  *    WORKAROUND:
3740  *        Make sure we do not have ending address
3741  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3742  */
3743 static uint32_t
3744 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3745 {
3746         uint32_t safe_terminator;
3747
3748         /*
3749          * Since issue is sensitive to length and address.
3750          * Let us first check the address...
3751          */
3752         if (length <= 4) {
3753                 desc_array->descriptor[0].address = address;
3754                 desc_array->descriptor[0].length = length;
3755                 desc_array->elements = 1;
3756                 return (desc_array->elements);
3757         }
3758
3759         safe_terminator =
3760         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3761
3762         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3763         if (safe_terminator == 0 ||
3764             (safe_terminator > 4 && safe_terminator < 9) ||
3765             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3766                 desc_array->descriptor[0].address = address;
3767                 desc_array->descriptor[0].length = length;
3768                 desc_array->elements = 1;
3769                 return (desc_array->elements);
3770         }
3771
3772         desc_array->descriptor[0].address = address;
3773         desc_array->descriptor[0].length = length - 4;
3774         desc_array->descriptor[1].address = address + (length - 4);
3775         desc_array->descriptor[1].length = 4;
3776         desc_array->elements = 2;
3777         return (desc_array->elements);
3778 }
3779
3780 static void
3781 em_update_stats(struct adapter *adapter)
3782 {
3783         struct ifnet *ifp = &adapter->arpcom.ac_if;
3784
3785         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3786             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3787                 adapter->stats.symerrs +=
3788                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3789                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3790         }
3791         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3792         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3793         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3794         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3795
3796         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3797         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3798         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3799         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3800         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3801         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3802         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3803         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3804         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3805         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3806         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3807         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3808         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3809         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3810         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3811         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3812         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3813         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3814         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3815         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3816
3817         /* For the 64-bit byte counters the low dword must be read first. */
3818         /* Both registers clear on the read of the high dword */
3819
3820         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3821         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3822
3823         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3824         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3825         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3826         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3827         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3828
3829         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3830         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3831
3832         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3833         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3834         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3835         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3836         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3837         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3838         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3839         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3840         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3841         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3842
3843         if (adapter->hw.mac.type >= e1000_82543) {
3844                 adapter->stats.algnerrc +=
3845                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3846                 adapter->stats.rxerrc +=
3847                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3848                 adapter->stats.tncrs +=
3849                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3850                 adapter->stats.cexterr +=
3851                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3852                 adapter->stats.tsctc +=
3853                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3854                 adapter->stats.tsctfc +=
3855                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3856         }
3857
3858         IFNET_STAT_SET(ifp, collisions, adapter->stats.colc);
3859
3860         /* Rx Errors */
3861         IFNET_STAT_SET(ifp, ierrors,
3862             adapter->dropped_pkts + adapter->stats.rxerrc +
3863             adapter->stats.crcerrs + adapter->stats.algnerrc +
3864             adapter->stats.ruc + adapter->stats.roc +
3865             adapter->stats.mpc + adapter->stats.cexterr);
3866
3867         /* Tx Errors */
3868         IFNET_STAT_SET(ifp, oerrors,
3869             adapter->stats.ecol + adapter->stats.latecol +
3870             adapter->watchdog_events);
3871 }
3872
3873 static void
3874 em_print_debug_info(struct adapter *adapter)
3875 {
3876         device_t dev = adapter->dev;
3877         uint8_t *hw_addr = adapter->hw.hw_addr;
3878
3879         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3880         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3881             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3882             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3883         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3884             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3885             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3886         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3887             adapter->hw.fc.high_water,
3888             adapter->hw.fc.low_water);
3889         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3890             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3891             E1000_READ_REG(&adapter->hw, E1000_TADV));
3892         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3893             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3894             E1000_READ_REG(&adapter->hw, E1000_RADV));
3895         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3896             (long long)adapter->tx_fifo_wrk_cnt,
3897             (long long)adapter->tx_fifo_reset_cnt);
3898         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3899             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3900             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3901         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3902             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3903             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3904         device_printf(dev, "Num Tx descriptors avail = %d\n",
3905             adapter->num_tx_desc_avail);
3906         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3907             adapter->no_tx_desc_avail1);
3908         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3909             adapter->no_tx_desc_avail2);
3910         device_printf(dev, "Std mbuf failed = %ld\n",
3911             adapter->mbuf_alloc_failed);
3912         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3913             adapter->mbuf_cluster_failed);
3914         device_printf(dev, "Driver dropped packets = %ld\n",
3915             adapter->dropped_pkts);
3916         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3917             adapter->no_tx_dma_setup);
3918 }
3919
3920 static void
3921 em_print_hw_stats(struct adapter *adapter)
3922 {
3923         device_t dev = adapter->dev;
3924
3925         device_printf(dev, "Excessive collisions = %lld\n",
3926             (long long)adapter->stats.ecol);
3927 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
3928         device_printf(dev, "Symbol errors = %lld\n",
3929             (long long)adapter->stats.symerrs);
3930 #endif
3931         device_printf(dev, "Sequence errors = %lld\n",
3932             (long long)adapter->stats.sec);
3933         device_printf(dev, "Defer count = %lld\n",
3934             (long long)adapter->stats.dc);
3935         device_printf(dev, "Missed Packets = %lld\n",
3936             (long long)adapter->stats.mpc);
3937         device_printf(dev, "Receive No Buffers = %lld\n",
3938             (long long)adapter->stats.rnbc);
3939         /* RLEC is inaccurate on some hardware, calculate our own. */
3940         device_printf(dev, "Receive Length Errors = %lld\n",
3941             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3942         device_printf(dev, "Receive errors = %lld\n",
3943             (long long)adapter->stats.rxerrc);
3944         device_printf(dev, "Crc errors = %lld\n",
3945             (long long)adapter->stats.crcerrs);
3946         device_printf(dev, "Alignment errors = %lld\n",
3947             (long long)adapter->stats.algnerrc);
3948         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3949             (long long)adapter->stats.cexterr);
3950         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3951         device_printf(dev, "watchdog timeouts = %ld\n",
3952             adapter->watchdog_events);
3953         device_printf(dev, "XON Rcvd = %lld\n",
3954             (long long)adapter->stats.xonrxc);
3955         device_printf(dev, "XON Xmtd = %lld\n",
3956             (long long)adapter->stats.xontxc);
3957         device_printf(dev, "XOFF Rcvd = %lld\n",
3958             (long long)adapter->stats.xoffrxc);
3959         device_printf(dev, "XOFF Xmtd = %lld\n",
3960             (long long)adapter->stats.xofftxc);
3961         device_printf(dev, "Good Packets Rcvd = %lld\n",
3962             (long long)adapter->stats.gprc);
3963         device_printf(dev, "Good Packets Xmtd = %lld\n",
3964             (long long)adapter->stats.gptc);
3965 }
3966
3967 static void
3968 em_print_nvm_info(struct adapter *adapter)
3969 {
3970         uint16_t eeprom_data;
3971         int i, j, row = 0;
3972
3973         /* Its a bit crude, but it gets the job done */
3974         kprintf("\nInterface EEPROM Dump:\n");
3975         kprintf("Offset\n0x0000  ");
3976         for (i = 0, j = 0; i < 32; i++, j++) {
3977                 if (j == 8) { /* Make the offset block */
3978                         j = 0; ++row;
3979                         kprintf("\n0x00%x0  ",row);
3980                 }
3981                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3982                 kprintf("%04x ", eeprom_data);
3983         }
3984         kprintf("\n");
3985 }
3986
3987 static int
3988 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3989 {
3990         struct adapter *adapter;
3991         struct ifnet *ifp;
3992         int error, result;
3993
3994         result = -1;
3995         error = sysctl_handle_int(oidp, &result, 0, req);
3996         if (error || !req->newptr)
3997                 return (error);
3998
3999         adapter = (struct adapter *)arg1;
4000         ifp = &adapter->arpcom.ac_if;
4001
4002         lwkt_serialize_enter(ifp->if_serializer);
4003
4004         if (result == 1)
4005                 em_print_debug_info(adapter);
4006
4007         /*
4008          * This value will cause a hex dump of the
4009          * first 32 16-bit words of the EEPROM to
4010          * the screen.
4011          */
4012         if (result == 2)
4013                 em_print_nvm_info(adapter);
4014
4015         lwkt_serialize_exit(ifp->if_serializer);
4016
4017         return (error);
4018 }
4019
4020 static int
4021 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
4022 {
4023         int error, result;
4024
4025         result = -1;
4026         error = sysctl_handle_int(oidp, &result, 0, req);
4027         if (error || !req->newptr)
4028                 return (error);
4029
4030         if (result == 1) {
4031                 struct adapter *adapter = (struct adapter *)arg1;
4032                 struct ifnet *ifp = &adapter->arpcom.ac_if;
4033
4034                 lwkt_serialize_enter(ifp->if_serializer);
4035                 em_print_hw_stats(adapter);
4036                 lwkt_serialize_exit(ifp->if_serializer);
4037         }
4038         return (error);
4039 }
4040
4041 static void
4042 em_add_sysctl(struct adapter *adapter)
4043 {
4044         sysctl_ctx_init(&adapter->sysctl_ctx);
4045         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
4046                                         SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
4047                                         device_get_nameunit(adapter->dev),
4048                                         CTLFLAG_RD, 0, "");
4049         if (adapter->sysctl_tree == NULL) {
4050                 device_printf(adapter->dev, "can't add sysctl node\n");
4051         } else {
4052                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4053                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4054                     OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4055                     em_sysctl_debug_info, "I", "Debug Information");
4056
4057                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4058                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4059                     OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4060                     em_sysctl_stats, "I", "Statistics");
4061
4062                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4063                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4064                     OID_AUTO, "rxd", CTLFLAG_RD,
4065                     &adapter->num_rx_desc, 0, NULL);
4066                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4067                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4068                     OID_AUTO, "txd", CTLFLAG_RD,
4069                     &adapter->num_tx_desc, 0, NULL);
4070
4071                 if (adapter->hw.mac.type >= e1000_82540) {
4072                         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4073                             SYSCTL_CHILDREN(adapter->sysctl_tree),
4074                             OID_AUTO, "int_throttle_ceil",
4075                             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4076                             em_sysctl_int_throttle, "I",
4077                             "interrupt throttling rate");
4078                 }
4079                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4080                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4081                     OID_AUTO, "int_tx_nsegs",
4082                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4083                     em_sysctl_int_tx_nsegs, "I",
4084                     "# segments per TX interrupt");
4085                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4086                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4087                     OID_AUTO, "wreg_tx_nsegs", CTLFLAG_RW,
4088                     &adapter->tx_wreg_nsegs, 0,
4089                     "# segments before write to hardware register");
4090         }
4091 }
4092
4093 static int
4094 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4095 {
4096         struct adapter *adapter = (void *)arg1;
4097         struct ifnet *ifp = &adapter->arpcom.ac_if;
4098         int error, throttle;
4099
4100         throttle = adapter->int_throttle_ceil;
4101         error = sysctl_handle_int(oidp, &throttle, 0, req);
4102         if (error || req->newptr == NULL)
4103                 return error;
4104         if (throttle < 0 || throttle > 1000000000 / 256)
4105                 return EINVAL;
4106
4107         if (throttle) {
4108                 /*
4109                  * Set the interrupt throttling rate in 256ns increments,
4110                  * recalculate sysctl value assignment to get exact frequency.
4111                  */
4112                 throttle = 1000000000 / 256 / throttle;
4113
4114                 /* Upper 16bits of ITR is reserved and should be zero */
4115                 if (throttle & 0xffff0000)
4116                         return EINVAL;
4117         }
4118
4119         lwkt_serialize_enter(ifp->if_serializer);
4120
4121         if (throttle)
4122                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4123         else
4124                 adapter->int_throttle_ceil = 0;
4125
4126         if (ifp->if_flags & IFF_RUNNING)
4127                 em_set_itr(adapter, throttle);
4128
4129         lwkt_serialize_exit(ifp->if_serializer);
4130
4131         if (bootverbose) {
4132                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4133                           adapter->int_throttle_ceil);
4134         }
4135         return 0;
4136 }
4137
4138 static int
4139 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4140 {
4141         struct adapter *adapter = (void *)arg1;
4142         struct ifnet *ifp = &adapter->arpcom.ac_if;
4143         int error, segs;
4144
4145         segs = adapter->tx_int_nsegs;
4146         error = sysctl_handle_int(oidp, &segs, 0, req);
4147         if (error || req->newptr == NULL)
4148                 return error;
4149         if (segs <= 0)
4150                 return EINVAL;
4151
4152         lwkt_serialize_enter(ifp->if_serializer);
4153
4154         /*
4155          * Don't allow int_tx_nsegs to become:
4156          * o  Less the oact_tx_desc
4157          * o  Too large that no TX desc will cause TX interrupt to
4158          *    be generated (OACTIVE will never recover)
4159          * o  Too small that will cause tx_dd[] overflow
4160          */
4161         if (segs < adapter->oact_tx_desc ||
4162             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4163             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4164                 error = EINVAL;
4165         } else {
4166                 error = 0;
4167                 adapter->tx_int_nsegs = segs;
4168         }
4169
4170         lwkt_serialize_exit(ifp->if_serializer);
4171
4172         return error;
4173 }
4174
4175 static void
4176 em_set_itr(struct adapter *adapter, uint32_t itr)
4177 {
4178         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4179         if (adapter->hw.mac.type == e1000_82574) {
4180                 int i;
4181
4182                 /*
4183                  * When using MSIX interrupts we need to
4184                  * throttle using the EITR register
4185                  */
4186                 for (i = 0; i < 4; ++i) {
4187                         E1000_WRITE_REG(&adapter->hw,
4188                             E1000_EITR_82574(i), itr);
4189                 }
4190         }
4191 }
4192
4193 static void
4194 em_disable_aspm(struct adapter *adapter)
4195 {
4196         uint16_t link_cap, link_ctrl, disable;
4197         uint8_t pcie_ptr, reg;
4198         device_t dev = adapter->dev;
4199
4200         switch (adapter->hw.mac.type) {
4201         case e1000_82571:
4202         case e1000_82572:
4203         case e1000_82573:
4204                 /*
4205                  * 82573 specification update
4206                  * errata #8 disable L0s
4207                  * errata #41 disable L1
4208                  *
4209                  * 82571/82572 specification update
4210                  # errata #13 disable L1
4211                  * errata #68 disable L0s
4212                  */
4213                 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4214                 break;
4215
4216         case e1000_82574:
4217         case e1000_82583:
4218                 /*
4219                  * 82574 specification update errata #20
4220                  * 82583 specification update errata #9
4221                  *
4222                  * There is no need to disable L1
4223                  */
4224                 disable = PCIEM_LNKCTL_ASPM_L0S;
4225                 break;
4226
4227         default:
4228                 return;
4229         }
4230
4231         pcie_ptr = pci_get_pciecap_ptr(dev);
4232         if (pcie_ptr == 0)
4233                 return;
4234
4235         link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4236         if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4237                 return;
4238
4239         if (bootverbose) {
4240                 if_printf(&adapter->arpcom.ac_if,
4241                     "disable ASPM %#02x\n", disable);
4242         }
4243
4244         reg = pcie_ptr + PCIER_LINKCTRL;
4245         link_ctrl = pci_read_config(dev, reg, 2);
4246         link_ctrl &= ~disable;
4247         pci_write_config(dev, reg, link_ctrl, 2);
4248 }
4249
4250 static int
4251 em_tso_pullup(struct adapter *adapter, struct mbuf **mp)
4252 {
4253         int iphlen, hoff, thoff, ex = 0;
4254         struct mbuf *m;
4255         struct ip *ip;
4256
4257         m = *mp;
4258         KASSERT(M_WRITABLE(m), ("TSO mbuf not writable"));
4259
4260         iphlen = m->m_pkthdr.csum_iphlen;
4261         thoff = m->m_pkthdr.csum_thlen;
4262         hoff = m->m_pkthdr.csum_lhlen;
4263
4264         KASSERT(iphlen > 0, ("invalid ip hlen"));
4265         KASSERT(thoff > 0, ("invalid tcp hlen"));
4266         KASSERT(hoff > 0, ("invalid ether hlen"));
4267
4268         if (adapter->flags & EM_FLAG_TSO_PULLEX)
4269                 ex = 4;
4270
4271         if (m->m_len < hoff + iphlen + thoff + ex) {
4272                 m = m_pullup(m, hoff + iphlen + thoff + ex);
4273                 if (m == NULL) {
4274                         *mp = NULL;
4275                         return ENOBUFS;
4276                 }
4277                 *mp = m;
4278         }
4279         ip = mtodoff(m, struct ip *, hoff);
4280         ip->ip_len = 0;
4281
4282         return 0;
4283 }
4284
4285 static int
4286 em_tso_setup(struct adapter *adapter, struct mbuf *mp,
4287     uint32_t *txd_upper, uint32_t *txd_lower)
4288 {
4289         struct e1000_context_desc *TXD;
4290         int hoff, iphlen, thoff, hlen;
4291         int mss, pktlen, curr_txd;
4292
4293         iphlen = mp->m_pkthdr.csum_iphlen;
4294         thoff = mp->m_pkthdr.csum_thlen;
4295         hoff = mp->m_pkthdr.csum_lhlen;
4296         mss = mp->m_pkthdr.tso_segsz;
4297         pktlen = mp->m_pkthdr.len;
4298
4299         if (adapter->csum_flags == CSUM_TSO &&
4300             adapter->csum_iphlen == iphlen &&
4301             adapter->csum_lhlen == hoff &&
4302             adapter->csum_thlen == thoff &&
4303             adapter->csum_mss == mss &&
4304             adapter->csum_pktlen == pktlen) {
4305                 *txd_upper = adapter->csum_txd_upper;
4306                 *txd_lower = adapter->csum_txd_lower;
4307                 return 0;
4308         }
4309         hlen = hoff + iphlen + thoff;
4310
4311         /*
4312          * Setup a new TSO context.
4313          */
4314
4315         curr_txd = adapter->next_avail_tx_desc;
4316         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
4317
4318         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
4319                      E1000_TXD_DTYP_D |         /* Data descr type */
4320                      E1000_TXD_CMD_TSE;         /* Do TSE on this packet */
4321
4322         /* IP and/or TCP header checksum calculation and insertion. */
4323         *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
4324
4325         /*
4326          * Start offset for header checksum calculation.
4327          * End offset for header checksum calculation.
4328          * Offset of place put the checksum.
4329          */
4330         TXD->lower_setup.ip_fields.ipcss = hoff;
4331         TXD->lower_setup.ip_fields.ipcse = htole16(hoff + iphlen - 1);
4332         TXD->lower_setup.ip_fields.ipcso = hoff + offsetof(struct ip, ip_sum);
4333
4334         /*
4335          * Start offset for payload checksum calculation.
4336          * End offset for payload checksum calculation.
4337          * Offset of place to put the checksum.
4338          */
4339         TXD->upper_setup.tcp_fields.tucss = hoff + iphlen;
4340         TXD->upper_setup.tcp_fields.tucse = 0;
4341         TXD->upper_setup.tcp_fields.tucso =
4342             hoff + iphlen + offsetof(struct tcphdr, th_sum);
4343
4344         /*
4345          * Payload size per packet w/o any headers.
4346          * Length of all headers up to payload.
4347          */
4348         TXD->tcp_seg_setup.fields.mss = htole16(mss);
4349         TXD->tcp_seg_setup.fields.hdr_len = hlen;
4350         TXD->cmd_and_length = htole32(E1000_TXD_CMD_IFCS |
4351                                 E1000_TXD_CMD_DEXT |    /* Extended descr */
4352                                 E1000_TXD_CMD_TSE |     /* TSE context */
4353                                 E1000_TXD_CMD_IP |      /* Do IP csum */
4354                                 E1000_TXD_CMD_TCP |     /* Do TCP checksum */
4355                                 (pktlen - hlen));       /* Total len */
4356
4357         /* Save the information for this TSO context */
4358         adapter->csum_flags = CSUM_TSO;
4359         adapter->csum_lhlen = hoff;
4360         adapter->csum_iphlen = iphlen;
4361         adapter->csum_thlen = thoff;
4362         adapter->csum_mss = mss;
4363         adapter->csum_pktlen = pktlen;
4364         adapter->csum_txd_upper = *txd_upper;
4365         adapter->csum_txd_lower = *txd_lower;
4366
4367         if (++curr_txd == adapter->num_tx_desc)
4368                 curr_txd = 0;
4369
4370         KKASSERT(adapter->num_tx_desc_avail > 0);
4371         adapter->num_tx_desc_avail--;
4372
4373         adapter->next_avail_tx_desc = curr_txd;
4374         return 1;
4375 }