2 * Copyright (c) 2007-2009
3 * Damien Bergamini <damien.bergamini@free.fr>
5 * Benjamin Close <benjsc@FreeBSD.org>
6 * Copyright (c) 2008 Sam Leffler, Errno Consulting
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
28 #include <sys/param.h>
29 #include <sys/sockio.h>
30 #include <sys/sysctl.h>
32 #include <sys/kernel.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/malloc.h>
38 #include <sys/endian.h>
39 #include <sys/firmware.h>
40 #include <sys/limits.h>
41 #include <sys/module.h>
42 #include <sys/queue.h>
43 #include <sys/taskqueue.h>
44 #include <sys/libkern.h>
47 #include <sys/resource.h>
48 #include <machine/clock.h>
50 #include <bus/pci/pcireg.h>
51 #include <bus/pci/pcivar.h>
55 #include <net/if_arp.h>
56 #include <net/ifq_var.h>
57 #include <net/ethernet.h>
58 #include <net/if_dl.h>
59 #include <net/if_media.h>
60 #include <net/if_types.h>
62 #include <netinet/in.h>
63 #include <netinet/in_systm.h>
64 #include <netinet/in_var.h>
65 #include <netinet/if_ether.h>
66 #include <netinet/ip.h>
68 #include <netproto/802_11/ieee80211_var.h>
69 #include <netproto/802_11/ieee80211_radiotap.h>
70 #include <netproto/802_11/ieee80211_regdomain.h>
71 #include <netproto/802_11/ieee80211_ratectl.h>
73 #include "if_iwnreg.h"
74 #include "if_iwnvar.h"
76 static int iwn_pci_probe(device_t);
77 static int iwn_pci_attach(device_t);
78 static const struct iwn_hal *iwn_hal_attach(struct iwn_softc *);
79 static void iwn_radiotap_attach(struct iwn_softc *);
80 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
81 const char name[IFNAMSIZ], int unit, int opmode,
82 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
83 const uint8_t mac[IEEE80211_ADDR_LEN]);
84 static void iwn_vap_delete(struct ieee80211vap *);
85 static int iwn_cleanup(device_t);
86 static int iwn_pci_detach(device_t);
87 static int iwn_nic_lock(struct iwn_softc *);
88 static int iwn_eeprom_lock(struct iwn_softc *);
89 static int iwn_init_otprom(struct iwn_softc *);
90 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
91 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
92 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
93 void **, bus_size_t, bus_size_t, int);
94 static void iwn_dma_contig_free(struct iwn_dma_info *);
95 static int iwn_alloc_sched(struct iwn_softc *);
96 static void iwn_free_sched(struct iwn_softc *);
97 static int iwn_alloc_kw(struct iwn_softc *);
98 static void iwn_free_kw(struct iwn_softc *);
99 static int iwn_alloc_ict(struct iwn_softc *);
100 static void iwn_free_ict(struct iwn_softc *);
101 static int iwn_alloc_fwmem(struct iwn_softc *);
102 static void iwn_free_fwmem(struct iwn_softc *);
103 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
104 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
105 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
106 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
108 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
109 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
110 static void iwn5000_ict_reset(struct iwn_softc *);
111 static int iwn_read_eeprom(struct iwn_softc *,
112 uint8_t macaddr[IEEE80211_ADDR_LEN]);
113 static void iwn4965_read_eeprom(struct iwn_softc *);
114 static void iwn4965_print_power_group(struct iwn_softc *, int);
115 static void iwn5000_read_eeprom(struct iwn_softc *);
116 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
117 static void iwn_read_eeprom_band(struct iwn_softc *, int);
119 static void iwn_read_eeprom_ht40(struct iwn_softc *, int);
121 static void iwn_read_eeprom_channels(struct iwn_softc *, int,
123 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
124 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
125 const uint8_t mac[IEEE80211_ADDR_LEN]);
126 static void iwn_newassoc(struct ieee80211_node *, int);
127 static int iwn_media_change(struct ifnet *);
128 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
129 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
130 struct iwn_rx_data *);
131 static void iwn_timer_callout(void *);
132 static void iwn_calib_reset(struct iwn_softc *);
133 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
134 struct iwn_rx_data *);
136 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
137 struct iwn_rx_data *);
139 static void iwn5000_rx_calib_results(struct iwn_softc *,
140 struct iwn_rx_desc *, struct iwn_rx_data *);
141 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
142 struct iwn_rx_data *);
143 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
144 struct iwn_rx_data *);
145 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
146 struct iwn_rx_data *);
147 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int,
149 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
150 static void iwn_notif_intr(struct iwn_softc *);
151 static void iwn_wakeup_intr(struct iwn_softc *);
152 static void iwn_rftoggle_intr(struct iwn_softc *);
153 static void iwn_fatal_intr(struct iwn_softc *);
154 static void iwn_intr(void *);
155 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
157 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
160 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
162 static uint8_t iwn_plcp_signal(int);
163 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
164 struct ieee80211_node *, struct iwn_tx_ring *);
165 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
166 const struct ieee80211_bpf_params *);
167 static void iwn_start(struct ifnet *);
168 static void iwn_start_locked(struct ifnet *);
169 static void iwn_watchdog(struct iwn_softc *sc);
170 static int iwn_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
171 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
172 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
174 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
176 static int iwn_set_link_quality(struct iwn_softc *, uint8_t, int);
177 static int iwn_add_broadcast_node(struct iwn_softc *, int);
178 static int iwn_wme_update(struct ieee80211com *);
179 static void iwn_update_mcast(struct ifnet *);
180 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
181 static int iwn_set_critical_temp(struct iwn_softc *);
182 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
183 static void iwn4965_power_calibration(struct iwn_softc *, int);
184 static int iwn4965_set_txpower(struct iwn_softc *,
185 struct ieee80211_channel *, int);
186 static int iwn5000_set_txpower(struct iwn_softc *,
187 struct ieee80211_channel *, int);
188 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
189 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
190 static int iwn_get_noise(const struct iwn_rx_general_stats *);
191 static int iwn4965_get_temperature(struct iwn_softc *);
192 static int iwn5000_get_temperature(struct iwn_softc *);
193 static int iwn_init_sensitivity(struct iwn_softc *);
194 static void iwn_collect_noise(struct iwn_softc *,
195 const struct iwn_rx_general_stats *);
196 static int iwn4965_init_gains(struct iwn_softc *);
197 static int iwn5000_init_gains(struct iwn_softc *);
198 static int iwn4965_set_gains(struct iwn_softc *);
199 static int iwn5000_set_gains(struct iwn_softc *);
200 static void iwn_tune_sensitivity(struct iwn_softc *,
201 const struct iwn_rx_stats *);
202 static int iwn_send_sensitivity(struct iwn_softc *);
203 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
204 static int iwn_config(struct iwn_softc *);
205 static int iwn_scan(struct iwn_softc *);
206 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
207 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
209 static int iwn_ampdu_rx_start(struct ieee80211com *,
210 struct ieee80211_node *, uint8_t);
211 static void iwn_ampdu_rx_stop(struct ieee80211com *,
212 struct ieee80211_node *, uint8_t);
213 static int iwn_ampdu_tx_start(struct ieee80211com *,
214 struct ieee80211_node *, uint8_t);
215 static void iwn_ampdu_tx_stop(struct ieee80211com *,
216 struct ieee80211_node *, uint8_t);
217 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
218 struct ieee80211_node *, uint8_t, uint16_t);
219 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, uint8_t, uint16_t);
220 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
221 struct ieee80211_node *, uint8_t, uint16_t);
222 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, uint8_t, uint16_t);
224 static int iwn5000_query_calibration(struct iwn_softc *);
225 static int iwn5000_send_calibration(struct iwn_softc *);
226 static int iwn5000_send_wimax_coex(struct iwn_softc *);
227 static int iwn4965_post_alive(struct iwn_softc *);
228 static int iwn5000_post_alive(struct iwn_softc *);
229 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
231 static int iwn4965_load_firmware(struct iwn_softc *);
232 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
233 const uint8_t *, int);
234 static int iwn5000_load_firmware(struct iwn_softc *);
235 static int iwn_read_firmware(struct iwn_softc *);
236 static int iwn_clock_wait(struct iwn_softc *);
237 static int iwn_apm_init(struct iwn_softc *);
238 static void iwn_apm_stop_master(struct iwn_softc *);
239 static void iwn_apm_stop(struct iwn_softc *);
240 static int iwn4965_nic_config(struct iwn_softc *);
241 static int iwn5000_nic_config(struct iwn_softc *);
242 static int iwn_hw_prepare(struct iwn_softc *);
243 static int iwn_hw_init(struct iwn_softc *);
244 static void iwn_hw_stop(struct iwn_softc *);
245 static void iwn_init_locked(struct iwn_softc *);
246 static void iwn_init(void *);
247 static void iwn_stop_locked(struct iwn_softc *);
248 static void iwn_stop(struct iwn_softc *);
249 static void iwn_scan_start(struct ieee80211com *);
250 static void iwn_scan_end(struct ieee80211com *);
251 static void iwn_set_channel(struct ieee80211com *);
252 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
253 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
254 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
255 struct ieee80211_channel *);
256 static int iwn_setregdomain(struct ieee80211com *,
257 struct ieee80211_regdomain *, int,
258 struct ieee80211_channel []);
259 static void iwn_hw_reset_task(void *, int);
260 static void iwn_radio_on_task(void *, int);
261 static void iwn_radio_off_task(void *, int);
262 static void iwn_sysctlattach(struct iwn_softc *);
263 static int iwn_pci_shutdown(device_t);
264 static int iwn_pci_suspend(device_t);
265 static int iwn_pci_resume(device_t);
270 IWN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
271 IWN_DEBUG_RECV = 0x00000002, /* basic recv operation */
272 IWN_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */
273 IWN_DEBUG_TXPOW = 0x00000008, /* tx power processing */
274 IWN_DEBUG_RESET = 0x00000010, /* reset processing */
275 IWN_DEBUG_OPS = 0x00000020, /* iwn_ops processing */
276 IWN_DEBUG_BEACON = 0x00000040, /* beacon handling */
277 IWN_DEBUG_WATCHDOG = 0x00000080, /* watchdog timeout */
278 IWN_DEBUG_INTR = 0x00000100, /* ISR */
279 IWN_DEBUG_CALIBRATE = 0x00000200, /* periodic calibration */
280 IWN_DEBUG_NODE = 0x00000400, /* node management */
281 IWN_DEBUG_LED = 0x00000800, /* led management */
282 IWN_DEBUG_CMD = 0x00001000, /* cmd submission */
283 IWN_DEBUG_FATAL = 0x80000000, /* fatal errors */
284 IWN_DEBUG_ANY = 0xffffffff
287 #define DPRINTF(sc, m, fmt, ...) do { \
288 if (sc->sc_debug & (m)) \
289 kprintf(fmt, __VA_ARGS__); \
292 static const char *iwn_intr_str(uint8_t);
294 #define DPRINTF(sc, m, fmt, ...) do { (void) sc; } while (0)
303 static const struct iwn_ident iwn_ident_table [] = {
304 { 0x8086, 0x4229, "Intel(R) PRO/Wireless 4965BGN" },
305 { 0x8086, 0x422D, "Intel(R) PRO/Wireless 4965BGN" },
306 { 0x8086, 0x4230, "Intel(R) PRO/Wireless 4965BGN" },
307 { 0x8086, 0x4233, "Intel(R) PRO/Wireless 4965BGN" },
308 { 0x8086, 0x4232, "Intel(R) PRO/Wireless 5100" },
309 { 0x8086, 0x4237, "Intel(R) PRO/Wireless 5100" },
310 { 0x8086, 0x423C, "Intel(R) PRO/Wireless 5150" },
311 { 0x8086, 0x423D, "Intel(R) PRO/Wireless 5150" },
312 { 0x8086, 0x4235, "Intel(R) PRO/Wireless 5300" },
313 { 0x8086, 0x4236, "Intel(R) PRO/Wireless 5300" },
314 { 0x8086, 0x423A, "Intel(R) PRO/Wireless 5350" },
315 { 0x8086, 0x423B, "Intel(R) PRO/Wireless 5350" },
316 { 0x8086, 0x0083, "Intel(R) PRO/Wireless 1000" },
317 { 0x8086, 0x0084, "Intel(R) PRO/Wireless 1000" },
318 { 0x8086, 0x008D, "Intel(R) PRO/Wireless 6000" },
319 { 0x8086, 0x008E, "Intel(R) PRO/Wireless 6000" },
320 { 0x8086, 0x4238, "Intel(R) PRO/Wireless 6000" },
321 { 0x8086, 0x4239, "Intel(R) PRO/Wireless 6000" },
322 { 0x8086, 0x422B, "Intel(R) PRO/Wireless 6000" },
323 { 0x8086, 0x422C, "Intel(R) PRO/Wireless 6000" },
324 { 0x8086, 0x0086, "Intel(R) PRO/Wireless 6050" },
325 { 0x8086, 0x0087, "Intel(R) PRO/Wireless 6050" },
326 { 0x8086, 0x08AE, "Intel(R) Centrino Wireless-N 100" },
330 static const struct iwn_hal iwn4965_hal = {
331 iwn4965_load_firmware,
335 iwn4965_update_sched,
336 iwn4965_get_temperature,
344 iwn4965_ampdu_tx_start,
345 iwn4965_ampdu_tx_stop,
349 IWN4965_ID_BROADCAST,
352 IWN4965_FW_TEXT_MAXSZ,
353 IWN4965_FW_DATA_MAXSZ,
358 static const struct iwn_hal iwn5000_hal = {
359 iwn5000_load_firmware,
363 iwn5000_update_sched,
364 iwn5000_get_temperature,
372 iwn5000_ampdu_tx_start,
373 iwn5000_ampdu_tx_stop,
377 IWN5000_ID_BROADCAST,
380 IWN5000_FW_TEXT_MAXSZ,
381 IWN5000_FW_DATA_MAXSZ,
387 iwn_pci_probe(device_t dev)
389 const struct iwn_ident *ident;
391 /* no wlan serializer needed */
392 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
393 if (pci_get_vendor(dev) == ident->vendor &&
394 pci_get_device(dev) == ident->device) {
395 device_set_desc(dev, ident->name);
403 iwn_pci_attach(device_t dev)
405 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
406 struct ieee80211com *ic;
408 const struct iwn_hal *hal;
414 uint8_t macaddr[IEEE80211_ADDR_LEN];
416 wlan_serialize_enter();
421 if (bus_dma_tag_create(sc->sc_dmat,
423 BUS_SPACE_MAXADDR_32BIT,
431 device_printf(dev, "cannot allocate DMA tag\n");
438 /* prepare sysctl tree for use in sub modules */
439 sysctl_ctx_init(&sc->sc_sysctl_ctx);
440 sc->sc_sysctl_tree = SYSCTL_ADD_NODE(&sc->sc_sysctl_ctx,
441 SYSCTL_STATIC_CHILDREN(_hw),
443 device_get_nameunit(sc->sc_dev),
447 * Get the offset of the PCI Express Capability Structure in PCI
448 * Configuration Space.
450 error = pci_find_extcap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
452 device_printf(dev, "PCIe capability structure not found!\n");
456 /* Clear device-specific "PCI retry timeout" register (41h). */
457 pci_write_config(dev, 0x41, 0, 1);
459 /* Hardware bug workaround. */
460 tmp = pci_read_config(dev, PCIR_COMMAND, 1);
461 if (tmp & PCIM_CMD_INTxDIS) {
462 DPRINTF(sc, IWN_DEBUG_RESET, "%s: PCIe INTx Disable set\n",
464 tmp &= ~PCIM_CMD_INTxDIS;
465 pci_write_config(dev, PCIR_COMMAND, tmp, 1);
468 /* Enable bus-mastering. */
469 pci_enable_busmaster(dev);
471 sc->mem_rid = PCIR_BAR(0);
472 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
474 if (sc->mem == NULL ) {
475 device_printf(dev, "could not allocate memory resources\n");
480 sc->sc_st = rman_get_bustag(sc->mem);
481 sc->sc_sh = rman_get_bushandle(sc->mem);
484 if ((result = pci_msi_count(dev)) == 1 &&
485 pci_alloc_msi(dev, &result) == 0)
488 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
489 RF_ACTIVE | RF_SHAREABLE);
490 if (sc->irq == NULL) {
491 device_printf(dev, "could not allocate interrupt resource\n");
496 callout_init(&sc->sc_timer_to);
497 TASK_INIT(&sc->sc_reinit_task, 0, iwn_hw_reset_task, sc );
498 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on_task, sc );
499 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off_task, sc );
501 /* Attach Hardware Abstraction Layer. */
502 hal = iwn_hal_attach(sc);
504 error = ENXIO; /* XXX: Wrong error code? */
508 error = iwn_hw_prepare(sc);
510 device_printf(dev, "hardware not ready, error %d\n", error);
514 /* Allocate DMA memory for firmware transfers. */
515 error = iwn_alloc_fwmem(sc);
518 "could not allocate memory for firmware, error %d\n",
523 /* Allocate "Keep Warm" page. */
524 error = iwn_alloc_kw(sc);
527 "could not allocate \"Keep Warm\" page, error %d\n", error);
531 /* Allocate ICT table for 5000 Series. */
532 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
533 (error = iwn_alloc_ict(sc)) != 0) {
535 "%s: could not allocate ICT table, error %d\n",
540 /* Allocate TX scheduler "rings". */
541 error = iwn_alloc_sched(sc);
544 "could not allocate TX scheduler rings, error %d\n",
549 /* Allocate TX rings (16 on 4965AGN, 20 on 5000). */
550 for (i = 0; i < hal->ntxqs; i++) {
551 error = iwn_alloc_tx_ring(sc, &sc->txq[i], i);
554 "could not allocate Tx ring %d, error %d\n",
560 /* Allocate RX ring. */
561 error = iwn_alloc_rx_ring(sc, &sc->rxq);
564 "could not allocate Rx ring, error %d\n", error);
568 /* Clear pending interrupts. */
569 IWN_WRITE(sc, IWN_INT, 0xffffffff);
571 /* Count the number of available chains. */
573 ((sc->txchainmask >> 2) & 1) +
574 ((sc->txchainmask >> 1) & 1) +
575 ((sc->txchainmask >> 0) & 1);
577 ((sc->rxchainmask >> 2) & 1) +
578 ((sc->rxchainmask >> 1) & 1) +
579 ((sc->rxchainmask >> 0) & 1);
581 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
583 device_printf(dev, "can not allocate ifnet structure\n");
589 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
590 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
592 /* Set device capabilities. */
594 IEEE80211_C_STA /* station mode supported */
595 | IEEE80211_C_MONITOR /* monitor mode supported */
596 | IEEE80211_C_TXPMGT /* tx power management */
597 | IEEE80211_C_SHSLOT /* short slot time supported */
599 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
600 | IEEE80211_C_BGSCAN /* background scanning */
602 | IEEE80211_C_IBSS /* ibss/adhoc mode */
604 | IEEE80211_C_WME /* WME */
607 /* XXX disable until HT channel setup works */
609 IEEE80211_HTCAP_SMPS_ENA /* SM PS mode enabled */
610 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width */
611 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
612 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
613 | IEEE80211_HTCAP_RXSTBC_2STREAM/* 1-2 spatial streams */
614 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
615 /* s/w capabilities */
616 | IEEE80211_HTC_HT /* HT operation */
617 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
618 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
621 /* Set HT capabilities. */
623 #if IWN_RBUF_SIZE == 8192
624 IEEE80211_HTCAP_AMSDU7935 |
626 IEEE80211_HTCAP_CBW20_40 |
627 IEEE80211_HTCAP_SGI20 |
628 IEEE80211_HTCAP_SGI40;
629 if (sc->hw_type != IWN_HW_REV_TYPE_4965)
630 ic->ic_htcaps |= IEEE80211_HTCAP_GF;
631 if (sc->hw_type == IWN_HW_REV_TYPE_6050)
632 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DYN;
634 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DIS;
637 /* Read MAC address, channels, etc from EEPROM. */
638 error = iwn_read_eeprom(sc, macaddr);
640 device_printf(dev, "could not read EEPROM, error %d\n",
645 device_printf(sc->sc_dev, "MIMO %dT%dR, %.4s, address %6D\n",
646 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
650 /* Set supported HT rates. */
651 ic->ic_sup_mcs[0] = 0xff;
652 if (sc->nrxchains > 1)
653 ic->ic_sup_mcs[1] = 0xff;
654 if (sc->nrxchains > 2)
655 ic->ic_sup_mcs[2] = 0xff;
658 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
660 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
661 ifp->if_init = iwn_init;
662 ifp->if_ioctl = iwn_ioctl;
663 ifp->if_start = iwn_start;
664 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
665 ifq_set_ready(&ifp->if_snd);
667 ieee80211_ifattach(ic, macaddr);
668 ic->ic_vap_create = iwn_vap_create;
669 ic->ic_vap_delete = iwn_vap_delete;
670 ic->ic_raw_xmit = iwn_raw_xmit;
671 ic->ic_node_alloc = iwn_node_alloc;
672 ic->ic_newassoc = iwn_newassoc;
673 ic->ic_wme.wme_update = iwn_wme_update;
674 ic->ic_update_mcast = iwn_update_mcast;
675 ic->ic_scan_start = iwn_scan_start;
676 ic->ic_scan_end = iwn_scan_end;
677 ic->ic_set_channel = iwn_set_channel;
678 ic->ic_scan_curchan = iwn_scan_curchan;
679 ic->ic_scan_mindwell = iwn_scan_mindwell;
680 ic->ic_setregdomain = iwn_setregdomain;
682 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
683 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
684 ic->ic_ampdu_tx_start = iwn_ampdu_tx_start;
685 ic->ic_ampdu_tx_stop = iwn_ampdu_tx_stop;
688 iwn_radiotap_attach(sc);
689 iwn_sysctlattach(sc);
692 * Hook our interrupt after all initialization is complete.
694 error = bus_setup_intr(dev, sc->irq, INTR_MPSAFE,
695 iwn_intr, sc, &sc->sc_ih,
696 &wlan_global_serializer);
698 device_printf(dev, "could not set up interrupt, error %d\n",
703 ieee80211_announce(ic);
704 wlan_serialize_exit();
709 wlan_serialize_exit();
713 static const struct iwn_hal *
714 iwn_hal_attach(struct iwn_softc *sc)
716 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> 4) & 0xf;
718 switch (sc->hw_type) {
719 case IWN_HW_REV_TYPE_4965:
720 sc->sc_hal = &iwn4965_hal;
721 sc->limits = &iwn4965_sensitivity_limits;
722 sc->fwname = "iwn4965fw";
723 sc->txchainmask = IWN_ANT_AB;
724 sc->rxchainmask = IWN_ANT_ABC;
726 case IWN_HW_REV_TYPE_5100:
727 sc->sc_hal = &iwn5000_hal;
728 sc->limits = &iwn5000_sensitivity_limits;
729 sc->fwname = "iwn5000fw";
730 sc->txchainmask = IWN_ANT_B;
731 sc->rxchainmask = IWN_ANT_AB;
733 case IWN_HW_REV_TYPE_5150:
734 sc->sc_hal = &iwn5000_hal;
735 sc->limits = &iwn5150_sensitivity_limits;
736 sc->fwname = "iwn5150fw";
737 sc->txchainmask = IWN_ANT_A;
738 sc->rxchainmask = IWN_ANT_AB;
740 case IWN_HW_REV_TYPE_5300:
741 case IWN_HW_REV_TYPE_5350:
742 sc->sc_hal = &iwn5000_hal;
743 sc->limits = &iwn5000_sensitivity_limits;
744 sc->fwname = "iwn5000fw";
745 sc->txchainmask = IWN_ANT_ABC;
746 sc->rxchainmask = IWN_ANT_ABC;
748 case IWN_HW_REV_TYPE_1000:
749 sc->sc_hal = &iwn5000_hal;
750 sc->limits = &iwn1000_sensitivity_limits;
751 sc->fwname = "iwn1000fw";
752 sc->txchainmask = IWN_ANT_A;
753 sc->rxchainmask = IWN_ANT_AB;
755 case IWN_HW_REV_TYPE_6000:
756 sc->sc_hal = &iwn5000_hal;
757 sc->limits = &iwn6000_sensitivity_limits;
758 sc->fwname = "iwn6000fw";
759 switch (pci_get_device(sc->sc_dev)) {
762 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
763 sc->txchainmask = IWN_ANT_BC;
764 sc->rxchainmask = IWN_ANT_BC;
767 sc->txchainmask = IWN_ANT_ABC;
768 sc->rxchainmask = IWN_ANT_ABC;
772 case IWN_HW_REV_TYPE_6050:
773 sc->sc_hal = &iwn5000_hal;
774 sc->limits = &iwn6000_sensitivity_limits;
775 sc->fwname = "iwn6000fw";
776 sc->txchainmask = IWN_ANT_AB;
777 sc->rxchainmask = IWN_ANT_AB;
780 device_printf(sc->sc_dev, "adapter type %d not supported\n",
788 * Attach the interface to 802.11 radiotap.
791 iwn_radiotap_attach(struct iwn_softc *sc)
793 struct ifnet *ifp = sc->sc_ifp;
794 struct ieee80211com *ic = ifp->if_l2com;
796 ieee80211_radiotap_attach(ic,
797 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
798 IWN_TX_RADIOTAP_PRESENT,
799 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
800 IWN_RX_RADIOTAP_PRESENT);
803 static struct ieee80211vap *
804 iwn_vap_create(struct ieee80211com *ic,
805 const char name[IFNAMSIZ], int unit, int opmode, int flags,
806 const uint8_t bssid[IEEE80211_ADDR_LEN],
807 const uint8_t mac[IEEE80211_ADDR_LEN])
810 struct ieee80211vap *vap;
812 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
814 ivp = (struct iwn_vap *) kmalloc(sizeof(struct iwn_vap),
815 M_80211_VAP, M_INTWAIT | M_ZERO);
819 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
820 vap->iv_bmissthreshold = 10; /* override default */
821 /* Override with driver methods. */
822 ivp->iv_newstate = vap->iv_newstate;
823 vap->iv_newstate = iwn_newstate;
825 ieee80211_ratectl_init(vap);
826 /* Complete setup. */
827 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status);
828 ic->ic_opmode = opmode;
833 iwn_vap_delete(struct ieee80211vap *vap)
835 struct iwn_vap *ivp = IWN_VAP(vap);
837 ieee80211_ratectl_deinit(vap);
838 ieee80211_vap_detach(vap);
839 kfree(ivp, M_80211_VAP);
843 iwn_cleanup(device_t dev)
845 struct iwn_softc *sc = device_get_softc(dev);
846 struct ifnet *ifp = sc->sc_ifp;
847 struct ieee80211com *ic;
853 ieee80211_draintask(ic, &sc->sc_reinit_task);
854 ieee80211_draintask(ic, &sc->sc_radioon_task);
855 ieee80211_draintask(ic, &sc->sc_radiooff_task);
858 callout_stop(&sc->sc_timer_to);
859 ieee80211_ifdetach(ic);
862 /* cleanup sysctl nodes */
863 sysctl_ctx_free(&sc->sc_sysctl_ctx);
865 /* Free DMA resources. */
866 iwn_free_rx_ring(sc, &sc->rxq);
867 if (sc->sc_hal != NULL)
868 for (i = 0; i < sc->sc_hal->ntxqs; i++)
869 iwn_free_tx_ring(sc, &sc->txq[i]);
872 if (sc->ict != NULL) {
878 if (sc->irq != NULL) {
879 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
880 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
881 if (sc->irq_rid == 1)
882 pci_release_msi(dev);
886 if (sc->mem != NULL) {
887 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
900 iwn_pci_detach(device_t dev)
902 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
904 wlan_serialize_enter();
906 bus_dma_tag_destroy(sc->sc_dmat);
907 wlan_serialize_exit();
913 iwn_nic_lock(struct iwn_softc *sc)
917 /* Request exclusive access to NIC. */
918 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
920 /* Spin until we actually get the lock. */
921 for (ntries = 0; ntries < 1000; ntries++) {
922 if ((IWN_READ(sc, IWN_GP_CNTRL) &
923 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
924 IWN_GP_CNTRL_MAC_ACCESS_ENA)
932 iwn_nic_unlock(struct iwn_softc *sc)
934 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
937 static __inline uint32_t
938 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
940 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
941 IWN_BARRIER_READ_WRITE(sc);
942 return IWN_READ(sc, IWN_PRPH_RDATA);
946 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
948 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
949 IWN_BARRIER_WRITE(sc);
950 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
954 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
956 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
960 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
962 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
966 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
967 const uint32_t *data, int count)
969 for (; count > 0; count--, data++, addr += 4)
970 iwn_prph_write(sc, addr, *data);
973 static __inline uint32_t
974 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
976 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
977 IWN_BARRIER_READ_WRITE(sc);
978 return IWN_READ(sc, IWN_MEM_RDATA);
982 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
984 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
985 IWN_BARRIER_WRITE(sc);
986 IWN_WRITE(sc, IWN_MEM_WDATA, data);
990 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
994 tmp = iwn_mem_read(sc, addr & ~3);
996 tmp = (tmp & 0x0000ffff) | data << 16;
998 tmp = (tmp & 0xffff0000) | data;
999 iwn_mem_write(sc, addr & ~3, tmp);
1002 static __inline void
1003 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1006 for (; count > 0; count--, addr += 4)
1007 *data++ = iwn_mem_read(sc, addr);
1010 static __inline void
1011 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1014 for (; count > 0; count--, addr += 4)
1015 iwn_mem_write(sc, addr, val);
1019 iwn_eeprom_lock(struct iwn_softc *sc)
1023 for (i = 0; i < 100; i++) {
1024 /* Request exclusive access to EEPROM. */
1025 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1026 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1028 /* Spin until we actually get the lock. */
1029 for (ntries = 0; ntries < 100; ntries++) {
1030 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1031 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1039 static __inline void
1040 iwn_eeprom_unlock(struct iwn_softc *sc)
1042 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1046 * Initialize access by host to One Time Programmable ROM.
1047 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1050 iwn_init_otprom(struct iwn_softc *sc)
1052 uint16_t prev, base, next;
1055 /* Wait for clock stabilization before accessing prph. */
1056 error = iwn_clock_wait(sc);
1060 error = iwn_nic_lock(sc);
1063 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1065 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1068 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1069 if (sc->hw_type != IWN_HW_REV_TYPE_1000) {
1070 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1071 IWN_RESET_LINK_PWR_MGMT_DIS);
1073 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1074 /* Clear ECC status. */
1075 IWN_SETBITS(sc, IWN_OTP_GP,
1076 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1079 * Find the block before last block (contains the EEPROM image)
1080 * for HW without OTP shadow RAM.
1082 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
1083 /* Switch to absolute addressing mode. */
1084 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1086 for (count = 0; count < IWN1000_OTP_NBLOCKS; count++) {
1087 error = iwn_read_prom_data(sc, base, &next, 2);
1090 if (next == 0) /* End of linked-list. */
1093 base = le16toh(next);
1095 if (count == 0 || count == IWN1000_OTP_NBLOCKS)
1097 /* Skip "next" word. */
1098 sc->prom_base = prev + 1;
1104 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1108 uint8_t *out = data;
1110 addr += sc->prom_base;
1111 for (; count > 0; count -= 2, addr++) {
1112 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1113 for (ntries = 0; ntries < 10; ntries++) {
1114 val = IWN_READ(sc, IWN_EEPROM);
1115 if (val & IWN_EEPROM_READ_VALID)
1120 device_printf(sc->sc_dev,
1121 "timeout reading ROM at 0x%x\n", addr);
1124 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1125 /* OTPROM, check for ECC errors. */
1126 tmp = IWN_READ(sc, IWN_OTP_GP);
1127 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1128 device_printf(sc->sc_dev,
1129 "OTPROM ECC error at 0x%x\n", addr);
1132 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1133 /* Correctable ECC error, clear bit. */
1134 IWN_SETBITS(sc, IWN_OTP_GP,
1135 IWN_OTP_GP_ECC_CORR_STTS);
1146 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1150 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1151 *(bus_addr_t *)arg = segs[0].ds_addr;
1155 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1156 void **kvap, bus_size_t size, bus_size_t alignment, int flags)
1163 error = bus_dma_tag_create(sc->sc_dmat, alignment,
1164 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1165 1, size, flags, &dma->tag);
1167 device_printf(sc->sc_dev,
1168 "%s: bus_dma_tag_create failed, error %d\n",
1172 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1173 flags | BUS_DMA_ZERO, &dma->map);
1175 device_printf(sc->sc_dev,
1176 "%s: bus_dmamem_alloc failed, error %d\n", __func__, error);
1179 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr,
1180 size, iwn_dma_map_addr, &dma->paddr, flags);
1182 device_printf(sc->sc_dev,
1183 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1191 iwn_dma_contig_free(dma);
1196 iwn_dma_contig_free(struct iwn_dma_info *dma)
1198 if (dma->tag != NULL) {
1199 if (dma->map != NULL) {
1200 if (dma->paddr == 0) {
1201 bus_dmamap_sync(dma->tag, dma->map,
1202 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1203 bus_dmamap_unload(dma->tag, dma->map);
1205 bus_dmamap_destroy(dma->tag, dma->map);
1207 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1208 bus_dma_tag_destroy(dma->tag);
1213 iwn_alloc_sched(struct iwn_softc *sc)
1215 /* TX scheduler rings must be aligned on a 1KB boundary. */
1216 return iwn_dma_contig_alloc(sc, &sc->sched_dma,
1217 (void **)&sc->sched, sc->sc_hal->schedsz, 1024, BUS_DMA_NOWAIT);
1221 iwn_free_sched(struct iwn_softc *sc)
1223 iwn_dma_contig_free(&sc->sched_dma);
1227 iwn_alloc_kw(struct iwn_softc *sc)
1229 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1230 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096,
1235 iwn_free_kw(struct iwn_softc *sc)
1237 iwn_dma_contig_free(&sc->kw_dma);
1241 iwn_alloc_ict(struct iwn_softc *sc)
1243 /* ICT table must be aligned on a 4KB boundary. */
1244 return iwn_dma_contig_alloc(sc, &sc->ict_dma,
1245 (void **)&sc->ict, IWN_ICT_SIZE, 4096, BUS_DMA_NOWAIT);
1249 iwn_free_ict(struct iwn_softc *sc)
1251 iwn_dma_contig_free(&sc->ict_dma);
1255 iwn_alloc_fwmem(struct iwn_softc *sc)
1257 /* Must be aligned on a 16-byte boundary. */
1258 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL,
1259 sc->sc_hal->fwsz, 16, BUS_DMA_NOWAIT);
1263 iwn_free_fwmem(struct iwn_softc *sc)
1265 iwn_dma_contig_free(&sc->fw_dma);
1269 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1276 /* Allocate RX descriptors (256-byte aligned). */
1277 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1278 error = iwn_dma_contig_alloc(sc, &ring->desc_dma,
1279 (void **)&ring->desc, size, 256, BUS_DMA_NOWAIT);
1281 device_printf(sc->sc_dev,
1282 "%s: could not allocate Rx ring DMA memory, error %d\n",
1287 error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
1288 BUS_SPACE_MAXADDR_32BIT,
1289 BUS_SPACE_MAXADDR, NULL, NULL, MJUMPAGESIZE, 1,
1290 MJUMPAGESIZE, BUS_DMA_NOWAIT, &ring->data_dmat);
1292 device_printf(sc->sc_dev,
1293 "%s: bus_dma_tag_create_failed, error %d\n",
1298 /* Allocate RX status area (16-byte aligned). */
1299 error = iwn_dma_contig_alloc(sc, &ring->stat_dma,
1300 (void **)&ring->stat, sizeof (struct iwn_rx_status),
1301 16, BUS_DMA_NOWAIT);
1303 device_printf(sc->sc_dev,
1304 "%s: could not allocate Rx status DMA memory, error %d\n",
1310 * Allocate and map RX buffers.
1312 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1313 struct iwn_rx_data *data = &ring->data[i];
1316 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1318 device_printf(sc->sc_dev,
1319 "%s: bus_dmamap_create failed, error %d\n",
1324 data->m = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR,
1326 if (data->m == NULL) {
1327 device_printf(sc->sc_dev,
1328 "%s: could not allocate rx mbuf\n", __func__);
1334 error = bus_dmamap_load(ring->data_dmat, data->map,
1335 mtod(data->m, caddr_t), MJUMPAGESIZE,
1336 iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
1337 if (error != 0 && error != EFBIG) {
1338 device_printf(sc->sc_dev,
1339 "%s: bus_dmamap_load failed, error %d\n",
1342 error = ENOMEM; /* XXX unique code */
1345 bus_dmamap_sync(ring->data_dmat, data->map,
1346 BUS_DMASYNC_PREWRITE);
1348 /* Set physical address of RX buffer (256-byte aligned). */
1349 ring->desc[i] = htole32(paddr >> 8);
1351 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1352 BUS_DMASYNC_PREWRITE);
1355 iwn_free_rx_ring(sc, ring);
1360 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1364 if (iwn_nic_lock(sc) == 0) {
1365 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1366 for (ntries = 0; ntries < 1000; ntries++) {
1367 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1368 IWN_FH_RX_STATUS_IDLE)
1375 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
1376 "timeout resetting Rx ring");
1380 sc->last_rx_valid = 0;
1384 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1388 iwn_dma_contig_free(&ring->desc_dma);
1389 iwn_dma_contig_free(&ring->stat_dma);
1391 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1392 struct iwn_rx_data *data = &ring->data[i];
1394 if (data->m != NULL) {
1395 bus_dmamap_sync(ring->data_dmat, data->map,
1396 BUS_DMASYNC_POSTREAD);
1397 bus_dmamap_unload(ring->data_dmat, data->map);
1400 if (data->map != NULL)
1401 bus_dmamap_destroy(ring->data_dmat, data->map);
1406 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1416 /* Allocate TX descriptors (256-byte aligned.) */
1417 size = IWN_TX_RING_COUNT * sizeof(struct iwn_tx_desc);
1418 error = iwn_dma_contig_alloc(sc, &ring->desc_dma,
1419 (void **)&ring->desc, size, 256, BUS_DMA_NOWAIT);
1421 device_printf(sc->sc_dev,
1422 "%s: could not allocate TX ring DMA memory, error %d\n",
1428 * We only use rings 0 through 4 (4 EDCA + cmd) so there is no need
1429 * to allocate commands space for other rings.
1434 size = IWN_TX_RING_COUNT * sizeof(struct iwn_tx_cmd);
1435 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma,
1436 (void **)&ring->cmd, size, 4, BUS_DMA_NOWAIT);
1438 device_printf(sc->sc_dev,
1439 "%s: could not allocate TX cmd DMA memory, error %d\n",
1444 error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
1445 BUS_SPACE_MAXADDR_32BIT,
1446 BUS_SPACE_MAXADDR, NULL, NULL, MJUMPAGESIZE, IWN_MAX_SCATTER - 1,
1447 MJUMPAGESIZE, BUS_DMA_NOWAIT, &ring->data_dmat);
1449 device_printf(sc->sc_dev,
1450 "%s: bus_dma_tag_create_failed, error %d\n",
1455 paddr = ring->cmd_dma.paddr;
1456 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1457 struct iwn_tx_data *data = &ring->data[i];
1459 data->cmd_paddr = paddr;
1460 data->scratch_paddr = paddr + 12;
1461 paddr += sizeof (struct iwn_tx_cmd);
1463 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1465 device_printf(sc->sc_dev,
1466 "%s: bus_dmamap_create failed, error %d\n",
1470 bus_dmamap_sync(ring->data_dmat, data->map,
1471 BUS_DMASYNC_PREWRITE);
1475 iwn_free_tx_ring(sc, ring);
1480 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
1484 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1485 struct iwn_tx_data *data = &ring->data[i];
1487 if (data->m != NULL) {
1488 bus_dmamap_unload(ring->data_dmat, data->map);
1493 /* Clear TX descriptors. */
1494 memset(ring->desc, 0, ring->desc_dma.size);
1495 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1496 BUS_DMASYNC_PREWRITE);
1497 sc->qfullmsk &= ~(1 << ring->qid);
1503 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
1507 iwn_dma_contig_free(&ring->desc_dma);
1508 iwn_dma_contig_free(&ring->cmd_dma);
1510 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1511 struct iwn_tx_data *data = &ring->data[i];
1513 if (data->m != NULL) {
1514 bus_dmamap_sync(ring->data_dmat, data->map,
1515 BUS_DMASYNC_POSTWRITE);
1516 bus_dmamap_unload(ring->data_dmat, data->map);
1519 if (data->map != NULL)
1520 bus_dmamap_destroy(ring->data_dmat, data->map);
1525 iwn5000_ict_reset(struct iwn_softc *sc)
1527 /* Disable interrupts. */
1528 IWN_WRITE(sc, IWN_INT_MASK, 0);
1530 /* Reset ICT table. */
1531 memset(sc->ict, 0, IWN_ICT_SIZE);
1534 /* Set physical address of ICT table (4KB aligned.) */
1535 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
1536 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
1537 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
1539 /* Enable periodic RX interrupt. */
1540 sc->int_mask |= IWN_INT_RX_PERIODIC;
1541 /* Switch to ICT interrupt mode in driver. */
1542 sc->sc_flags |= IWN_FLAG_USE_ICT;
1544 /* Re-enable interrupts. */
1545 IWN_WRITE(sc, IWN_INT, 0xffffffff);
1546 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
1550 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
1552 const struct iwn_hal *hal = sc->sc_hal;
1556 /* Check whether adapter has an EEPROM or an OTPROM. */
1557 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
1558 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
1559 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
1560 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
1561 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
1563 /* Adapter has to be powered on for EEPROM access to work. */
1564 error = iwn_apm_init(sc);
1566 device_printf(sc->sc_dev,
1567 "%s: could not power ON adapter, error %d\n",
1572 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
1573 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
1576 error = iwn_eeprom_lock(sc);
1578 device_printf(sc->sc_dev,
1579 "%s: could not lock ROM, error %d\n",
1584 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1585 error = iwn_init_otprom(sc);
1587 device_printf(sc->sc_dev,
1588 "%s: could not initialize OTPROM, error %d\n",
1594 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
1595 sc->rfcfg = le16toh(val);
1596 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
1598 /* Read MAC address. */
1599 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
1601 /* Read adapter-specific information from EEPROM. */
1602 hal->read_eeprom(sc);
1604 iwn_apm_stop(sc); /* Power OFF adapter. */
1606 iwn_eeprom_unlock(sc);
1611 iwn4965_read_eeprom(struct iwn_softc *sc)
1617 /* Read regulatory domain (4 ASCII characters.) */
1618 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
1620 /* Read the list of authorized channels (20MHz ones only.) */
1621 for (i = 0; i < 5; i++) {
1622 addr = iwn4965_regulatory_bands[i];
1623 iwn_read_eeprom_channels(sc, i, addr);
1626 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
1627 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
1628 sc->maxpwr2GHz = val & 0xff;
1629 sc->maxpwr5GHz = val >> 8;
1630 /* Check that EEPROM values are within valid range. */
1631 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
1632 sc->maxpwr5GHz = 38;
1633 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
1634 sc->maxpwr2GHz = 38;
1635 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
1636 sc->maxpwr2GHz, sc->maxpwr5GHz);
1638 /* Read samples for each TX power group. */
1639 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
1642 /* Read voltage at which samples were taken. */
1643 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
1644 sc->eeprom_voltage = (int16_t)le16toh(val);
1645 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
1646 sc->eeprom_voltage);
1649 /* Print samples. */
1650 if (sc->sc_debug & IWN_DEBUG_ANY) {
1651 for (i = 0; i < IWN_NBANDS; i++)
1652 iwn4965_print_power_group(sc, i);
1659 iwn4965_print_power_group(struct iwn_softc *sc, int i)
1661 struct iwn4965_eeprom_band *band = &sc->bands[i];
1662 struct iwn4965_eeprom_chan_samples *chans = band->chans;
1665 kprintf("===band %d===\n", i);
1666 kprintf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
1667 kprintf("chan1 num=%d\n", chans[0].num);
1668 for (c = 0; c < 2; c++) {
1669 for (j = 0; j < IWN_NSAMPLES; j++) {
1670 kprintf("chain %d, sample %d: temp=%d gain=%d "
1671 "power=%d pa_det=%d\n", c, j,
1672 chans[0].samples[c][j].temp,
1673 chans[0].samples[c][j].gain,
1674 chans[0].samples[c][j].power,
1675 chans[0].samples[c][j].pa_det);
1678 kprintf("chan2 num=%d\n", chans[1].num);
1679 for (c = 0; c < 2; c++) {
1680 for (j = 0; j < IWN_NSAMPLES; j++) {
1681 kprintf("chain %d, sample %d: temp=%d gain=%d "
1682 "power=%d pa_det=%d\n", c, j,
1683 chans[1].samples[c][j].temp,
1684 chans[1].samples[c][j].gain,
1685 chans[1].samples[c][j].power,
1686 chans[1].samples[c][j].pa_det);
1693 iwn5000_read_eeprom(struct iwn_softc *sc)
1695 struct iwn5000_eeprom_calib_hdr hdr;
1697 uint32_t addr, base;
1701 /* Read regulatory domain (4 ASCII characters.) */
1702 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
1703 base = le16toh(val);
1704 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
1705 sc->eeprom_domain, 4);
1707 /* Read the list of authorized channels (20MHz ones only.) */
1708 for (i = 0; i < 5; i++) {
1709 addr = base + iwn5000_regulatory_bands[i];
1710 iwn_read_eeprom_channels(sc, i, addr);
1713 /* Read enhanced TX power information for 6000 Series. */
1714 if (sc->hw_type >= IWN_HW_REV_TYPE_6000)
1715 iwn_read_eeprom_enhinfo(sc);
1717 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
1718 base = le16toh(val);
1719 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
1720 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
1721 "%s: calib version=%u pa type=%u voltage=%u\n",
1722 __func__, hdr.version, hdr.pa_type, le16toh(hdr.volt));
1723 sc->calib_ver = hdr.version;
1725 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
1726 /* Compute temperature offset. */
1727 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
1728 temp = le16toh(val);
1729 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
1730 volt = le16toh(val);
1731 sc->temp_off = temp - (volt / -5);
1732 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
1733 temp, volt, sc->temp_off);
1735 /* Read crystal calibration. */
1736 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
1737 &sc->eeprom_crystal, sizeof (uint32_t));
1738 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
1739 le32toh(sc->eeprom_crystal));
1744 * Translate EEPROM flags to net80211.
1747 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
1752 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
1753 nflags |= IEEE80211_CHAN_PASSIVE;
1754 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
1755 nflags |= IEEE80211_CHAN_NOADHOC;
1756 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
1757 nflags |= IEEE80211_CHAN_DFS;
1758 /* XXX apparently IBSS may still be marked */
1759 nflags |= IEEE80211_CHAN_NOADHOC;
1766 iwn_read_eeprom_band(struct iwn_softc *sc, int n)
1768 struct ifnet *ifp = sc->sc_ifp;
1769 struct ieee80211com *ic = ifp->if_l2com;
1770 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
1771 const struct iwn_chan_band *band = &iwn_bands[n];
1772 struct ieee80211_channel *c;
1773 int i, chan, nflags;
1775 for (i = 0; i < band->nchan; i++) {
1776 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
1777 DPRINTF(sc, IWN_DEBUG_RESET,
1778 "skip chan %d flags 0x%x maxpwr %d\n",
1779 band->chan[i], channels[i].flags,
1780 channels[i].maxpwr);
1783 chan = band->chan[i];
1784 nflags = iwn_eeprom_channel_flags(&channels[i]);
1786 DPRINTF(sc, IWN_DEBUG_RESET,
1787 "add chan %d flags 0x%x maxpwr %d\n",
1788 chan, channels[i].flags, channels[i].maxpwr);
1790 c = &ic->ic_channels[ic->ic_nchans++];
1792 c->ic_maxregpower = channels[i].maxpwr;
1793 c->ic_maxpower = 2*c->ic_maxregpower;
1795 /* Save maximum allowed TX power for this channel. */
1796 sc->maxpwr[chan] = channels[i].maxpwr;
1798 if (n == 0) { /* 2GHz band */
1799 c->ic_freq = ieee80211_ieee2mhz(chan,
1802 /* G =>'s B is supported */
1803 c->ic_flags = IEEE80211_CHAN_B | nflags;
1805 c = &ic->ic_channels[ic->ic_nchans++];
1807 c->ic_flags = IEEE80211_CHAN_G | nflags;
1808 } else { /* 5GHz band */
1809 c->ic_freq = ieee80211_ieee2mhz(chan,
1811 c->ic_flags = IEEE80211_CHAN_A | nflags;
1812 sc->sc_flags |= IWN_FLAG_HAS_5GHZ;
1815 /* XXX no constraints on using HT20 */
1816 /* add HT20, HT40 added separately */
1817 c = &ic->ic_channels[ic->ic_nchans++];
1819 c->ic_flags |= IEEE80211_CHAN_HT20;
1820 /* XXX NARROW =>'s 1/2 and 1/4 width? */
1827 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n)
1829 struct ifnet *ifp = sc->sc_ifp;
1830 struct ieee80211com *ic = ifp->if_l2com;
1831 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
1832 const struct iwn_chan_band *band = &iwn_bands[n];
1833 struct ieee80211_channel *c, *cent, *extc;
1836 for (i = 0; i < band->nchan; i++) {
1837 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID) ||
1838 !(channels[i].flags & IWN_EEPROM_CHAN_WIDE)) {
1839 DPRINTF(sc, IWN_DEBUG_RESET,
1840 "skip chan %d flags 0x%x maxpwr %d\n",
1841 band->chan[i], channels[i].flags,
1842 channels[i].maxpwr);
1846 * Each entry defines an HT40 channel pair; find the
1847 * center channel, then the extension channel above.
1849 cent = ieee80211_find_channel_byieee(ic, band->chan[i],
1850 band->flags & ~IEEE80211_CHAN_HT);
1851 if (cent == NULL) { /* XXX shouldn't happen */
1852 device_printf(sc->sc_dev,
1853 "%s: no entry for channel %d\n",
1854 __func__, band->chan[i]);
1857 extc = ieee80211_find_channel(ic, cent->ic_freq+20,
1858 band->flags & ~IEEE80211_CHAN_HT);
1860 DPRINTF(sc, IWN_DEBUG_RESET,
1861 "skip chan %d, extension channel not found\n",
1866 DPRINTF(sc, IWN_DEBUG_RESET,
1867 "add ht40 chan %d flags 0x%x maxpwr %d\n",
1868 band->chan[i], channels[i].flags, channels[i].maxpwr);
1870 c = &ic->ic_channels[ic->ic_nchans++];
1872 c->ic_extieee = extc->ic_ieee;
1873 c->ic_flags &= ~IEEE80211_CHAN_HT;
1874 c->ic_flags |= IEEE80211_CHAN_HT40U;
1875 c = &ic->ic_channels[ic->ic_nchans++];
1877 c->ic_extieee = cent->ic_ieee;
1878 c->ic_flags &= ~IEEE80211_CHAN_HT;
1879 c->ic_flags |= IEEE80211_CHAN_HT40D;
1885 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
1887 struct ifnet *ifp = sc->sc_ifp;
1888 struct ieee80211com *ic = ifp->if_l2com;
1890 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
1891 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
1894 iwn_read_eeprom_band(sc, n);
1897 iwn_read_eeprom_ht40(sc, n);
1899 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
1903 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
1905 struct iwn_eeprom_enhinfo enhinfo[35];
1910 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
1911 base = le16toh(val);
1912 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
1913 enhinfo, sizeof enhinfo);
1915 memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr);
1916 for (i = 0; i < NELEM(enhinfo); i++) {
1917 if (enhinfo[i].chan == 0 || enhinfo[i].reserved != 0)
1918 continue; /* Skip invalid entries. */
1921 if (sc->txchainmask & IWN_ANT_A)
1922 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
1923 if (sc->txchainmask & IWN_ANT_B)
1924 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
1925 if (sc->txchainmask & IWN_ANT_C)
1926 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
1927 if (sc->ntxchains == 2)
1928 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
1929 else if (sc->ntxchains == 3)
1930 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
1931 maxpwr /= 2; /* Convert half-dBm to dBm. */
1933 DPRINTF(sc, IWN_DEBUG_RESET, "enhinfo %d, maxpwr=%d\n", i,
1935 sc->enh_maxpwr[i] = maxpwr;
1939 static struct ieee80211_node *
1940 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
1942 return kmalloc(sizeof (struct iwn_node), M_80211_NODE,M_INTWAIT | M_ZERO);
1946 iwn_newassoc(struct ieee80211_node *ni, int isnew)
1950 ieee80211_ratectl_node_deinit(ni);
1953 ieee80211_ratectl_node_init(ni);
1957 iwn_media_change(struct ifnet *ifp)
1959 int error = ieee80211_media_change(ifp);
1960 /* NB: only the fixed rate can change and that doesn't need a reset */
1961 return (error == ENETRESET ? 0 : error);
1965 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1967 struct iwn_vap *ivp = IWN_VAP(vap);
1968 struct ieee80211com *ic = vap->iv_ic;
1969 struct iwn_softc *sc = ic->ic_ifp->if_softc;
1972 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1973 ieee80211_state_name[vap->iv_state],
1974 ieee80211_state_name[nstate]);
1976 callout_stop(&sc->sc_timer_to);
1978 if (nstate == IEEE80211_S_AUTH && vap->iv_state != IEEE80211_S_AUTH) {
1979 /* !AUTH -> AUTH requires adapter config */
1980 /* Reset state to handle reassociations correctly. */
1981 sc->rxon.associd = 0;
1982 sc->rxon.filter &= ~htole32(IWN_FILTER_BSS);
1983 iwn_calib_reset(sc);
1984 error = iwn_auth(sc, vap);
1986 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1988 * !RUN -> RUN requires setting the association id
1989 * which is done with a firmware cmd. We also defer
1990 * starting the timers until that work is done.
1992 error = iwn_run(sc, vap);
1994 if (nstate == IEEE80211_S_RUN) {
1996 * RUN -> RUN transition; just restart the timers.
1998 iwn_calib_reset(sc);
2000 return ivp->iv_newstate(vap, nstate, arg);
2004 * Process an RX_PHY firmware notification. This is usually immediately
2005 * followed by an MPDU_RX_DONE notification.
2008 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2009 struct iwn_rx_data *data)
2011 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2013 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2014 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2016 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2017 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2018 sc->last_rx_valid = 1;
2022 iwn_timer_callout(void *arg)
2024 struct iwn_softc *sc = arg;
2027 wlan_serialize_enter();
2028 if (sc->calib_cnt && --sc->calib_cnt == 0) {
2029 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2030 "send statistics request");
2031 (void) iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2033 sc->calib_cnt = 60; /* do calibration every 60s */
2035 iwn_watchdog(sc); /* NB: piggyback tx watchdog */
2036 callout_reset(&sc->sc_timer_to, hz, iwn_timer_callout, sc);
2037 wlan_serialize_exit();
2041 iwn_calib_reset(struct iwn_softc *sc)
2043 callout_reset(&sc->sc_timer_to, hz, iwn_timer_callout, sc);
2044 sc->calib_cnt = 60; /* do calibration every 60s */
2048 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2049 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2052 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2053 struct iwn_rx_data *data)
2055 const struct iwn_hal *hal = sc->sc_hal;
2056 struct ifnet *ifp = sc->sc_ifp;
2057 struct ieee80211com *ic = ifp->if_l2com;
2058 struct iwn_rx_ring *ring = &sc->rxq;
2059 struct ieee80211_frame *wh;
2060 struct ieee80211_node *ni;
2061 struct mbuf *m, *m1;
2062 struct iwn_rx_stat *stat;
2066 int error, len, rssi, nf;
2068 if (desc->type == IWN_MPDU_RX_DONE) {
2069 /* Check for prior RX_PHY notification. */
2070 if (!sc->last_rx_valid) {
2071 DPRINTF(sc, IWN_DEBUG_ANY,
2072 "%s: missing RX_PHY\n", __func__);
2076 sc->last_rx_valid = 0;
2077 stat = &sc->last_rx_stat;
2079 stat = (struct iwn_rx_stat *)(desc + 1);
2081 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2083 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2084 device_printf(sc->sc_dev,
2085 "%s: invalid rx statistic header, len %d\n",
2086 __func__, stat->cfg_phy_len);
2090 if (desc->type == IWN_MPDU_RX_DONE) {
2091 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
2092 head = (caddr_t)(mpdu + 1);
2093 len = le16toh(mpdu->len);
2095 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
2096 len = le16toh(stat->len);
2099 flags = le32toh(*(uint32_t *)(head + len));
2101 /* Discard frames with a bad FCS early. */
2102 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
2103 DPRINTF(sc, IWN_DEBUG_RECV, "%s: rx flags error %x\n",
2108 /* Discard frames that are too short. */
2109 if (len < sizeof (*wh)) {
2110 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
2116 /* XXX don't need mbuf, just dma buffer */
2117 m1 = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
2119 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
2124 bus_dmamap_unload(ring->data_dmat, data->map);
2126 error = bus_dmamap_load(ring->data_dmat, data->map,
2127 mtod(m1, caddr_t), MJUMPAGESIZE,
2128 iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
2129 if (error != 0 && error != EFBIG) {
2130 device_printf(sc->sc_dev,
2131 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
2139 /* Update RX descriptor. */
2140 ring->desc[ring->cur] = htole32(paddr >> 8);
2141 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2142 BUS_DMASYNC_PREWRITE);
2144 /* Finalize mbuf. */
2145 m->m_pkthdr.rcvif = ifp;
2147 m->m_pkthdr.len = m->m_len = len;
2149 rssi = hal->get_rssi(sc, stat);
2151 /* Grab a reference to the source node. */
2152 wh = mtod(m, struct ieee80211_frame *);
2153 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
2154 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
2155 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
2157 if (ieee80211_radiotap_active(ic)) {
2158 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
2160 tap->wr_tsft = htole64(stat->tstamp);
2162 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
2163 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2164 switch (stat->rate) {
2166 case 10: tap->wr_rate = 2; break;
2167 case 20: tap->wr_rate = 4; break;
2168 case 55: tap->wr_rate = 11; break;
2169 case 110: tap->wr_rate = 22; break;
2171 case 0xd: tap->wr_rate = 12; break;
2172 case 0xf: tap->wr_rate = 18; break;
2173 case 0x5: tap->wr_rate = 24; break;
2174 case 0x7: tap->wr_rate = 36; break;
2175 case 0x9: tap->wr_rate = 48; break;
2176 case 0xb: tap->wr_rate = 72; break;
2177 case 0x1: tap->wr_rate = 96; break;
2178 case 0x3: tap->wr_rate = 108; break;
2179 /* Unknown rate: should not happen. */
2180 default: tap->wr_rate = 0;
2182 tap->wr_dbm_antsignal = rssi;
2183 tap->wr_dbm_antnoise = nf;
2186 /* Send the frame to the 802.11 layer. */
2188 (void) ieee80211_input(ni, m, rssi - nf, nf);
2189 /* Node is no longer needed. */
2190 ieee80211_free_node(ni);
2192 (void) ieee80211_input_all(ic, m, rssi - nf, nf);
2197 /* Process an incoming Compressed BlockAck. */
2199 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2200 struct iwn_rx_data *data)
2202 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
2203 struct iwn_tx_ring *txq;
2205 txq = &sc->txq[letoh16(ba->qid)];
2211 * Process a CALIBRATION_RESULT notification sent by the initialization
2212 * firmware on response to a CMD_CALIB_CONFIG command (5000 only.)
2215 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2216 struct iwn_rx_data *data)
2218 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
2221 /* Runtime firmware should not send such a notification. */
2222 if (sc->sc_flags & IWN_FLAG_CALIB_DONE)
2225 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2226 len = (le32toh(desc->len) & 0x3fff) - 4;
2228 switch (calib->code) {
2229 case IWN5000_PHY_CALIB_DC:
2230 if (sc->hw_type == IWN_HW_REV_TYPE_5150 ||
2231 sc->hw_type == IWN_HW_REV_TYPE_6050)
2234 case IWN5000_PHY_CALIB_LO:
2237 case IWN5000_PHY_CALIB_TX_IQ:
2240 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
2241 if (sc->hw_type < IWN_HW_REV_TYPE_6000 &&
2242 sc->hw_type != IWN_HW_REV_TYPE_5150)
2245 case IWN5000_PHY_CALIB_BASE_BAND:
2249 if (idx == -1) /* Ignore other results. */
2252 /* Save calibration result. */
2253 if (sc->calibcmd[idx].buf != NULL)
2254 kfree(sc->calibcmd[idx].buf, M_DEVBUF);
2255 sc->calibcmd[idx].buf = kmalloc(len, M_DEVBUF, M_INTWAIT);
2256 if (sc->calibcmd[idx].buf == NULL) {
2257 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2258 "not enough memory for calibration result %d\n",
2262 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2263 "saving calibration result code=%d len=%d\n", calib->code, len);
2264 sc->calibcmd[idx].len = len;
2265 memcpy(sc->calibcmd[idx].buf, calib, len);
2269 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
2270 * The latter is sent by the firmware after each received beacon.
2273 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2274 struct iwn_rx_data *data)
2276 const struct iwn_hal *hal = sc->sc_hal;
2277 struct ifnet *ifp = sc->sc_ifp;
2278 struct ieee80211com *ic = ifp->if_l2com;
2279 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2280 struct iwn_calib_state *calib = &sc->calib;
2281 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
2284 /* Beacon stats are meaningful only when associated and not scanning. */
2285 if (vap->iv_state != IEEE80211_S_RUN ||
2286 (ic->ic_flags & IEEE80211_F_SCAN))
2289 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2290 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: cmd %d\n", __func__, desc->type);
2291 iwn_calib_reset(sc); /* Reset TX power calibration timeout. */
2293 /* Test if temperature has changed. */
2294 if (stats->general.temp != sc->rawtemp) {
2295 /* Convert "raw" temperature to degC. */
2296 sc->rawtemp = stats->general.temp;
2297 temp = hal->get_temperature(sc);
2298 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
2301 /* Update TX power if need be (4965AGN only.) */
2302 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
2303 iwn4965_power_calibration(sc, temp);
2306 if (desc->type != IWN_BEACON_STATISTICS)
2307 return; /* Reply to a statistics request. */
2309 sc->noise = iwn_get_noise(&stats->rx.general);
2310 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
2312 /* Test that RSSI and noise are present in stats report. */
2313 if (le32toh(stats->rx.general.flags) != 1) {
2314 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
2315 "received statistics without RSSI");
2319 if (calib->state == IWN_CALIB_STATE_ASSOC)
2320 iwn_collect_noise(sc, &stats->rx.general);
2321 else if (calib->state == IWN_CALIB_STATE_RUN)
2322 iwn_tune_sensitivity(sc, &stats->rx);
2326 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
2327 * and 5000 adapters have different incompatible TX status formats.
2330 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2331 struct iwn_rx_data *data)
2333 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
2334 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2336 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
2337 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
2338 __func__, desc->qid, desc->idx, stat->ackfailcnt,
2339 stat->btkillcnt, stat->rate, le16toh(stat->duration),
2340 le32toh(stat->status));
2342 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2343 iwn_tx_done(sc, desc, stat->ackfailcnt, le32toh(stat->status) & 0xff);
2347 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2348 struct iwn_rx_data *data)
2350 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
2351 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2353 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
2354 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
2355 __func__, desc->qid, desc->idx, stat->ackfailcnt,
2356 stat->btkillcnt, stat->rate, le16toh(stat->duration),
2357 le32toh(stat->status));
2360 /* Reset TX scheduler slot. */
2361 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
2364 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2365 iwn_tx_done(sc, desc, stat->ackfailcnt, le16toh(stat->status) & 0xff);
2369 * Adapter-independent backend for TX_DONE firmware notifications.
2372 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,
2375 struct ifnet *ifp = sc->sc_ifp;
2376 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2377 struct iwn_tx_data *data = &ring->data[desc->idx];
2379 struct ieee80211_node *ni;
2380 struct ieee80211vap *vap;
2382 KASSERT(data->ni != NULL, ("no node"));
2384 /* Unmap and free mbuf. */
2385 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
2386 bus_dmamap_unload(ring->data_dmat, data->map);
2387 m = data->m, data->m = NULL;
2388 ni = data->ni, data->ni = NULL;
2391 if (m->m_flags & M_TXCB) {
2393 * Channels marked for "radar" require traffic to be received
2394 * to unlock before we can transmit. Until traffic is seen
2395 * any attempt to transmit is returned immediately with status
2396 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
2397 * happen on first authenticate after scanning. To workaround
2398 * this we ignore a failure of this sort in AUTH state so the
2399 * 802.11 layer will fall back to using a timeout to wait for
2400 * the AUTH reply. This allows the firmware time to see
2401 * traffic so a subsequent retry of AUTH succeeds. It's
2402 * unclear why the firmware does not maintain state for
2403 * channels recently visited as this would allow immediate
2404 * use of the channel after a scan (where we see traffic).
2406 if (status == IWN_TX_FAIL_TX_LOCKED &&
2407 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
2408 ieee80211_process_callback(ni, m, 0);
2410 ieee80211_process_callback(ni, m,
2411 (status & IWN_TX_FAIL) != 0);
2415 * Update rate control statistics for the node.
2417 if (status & 0x80) {
2419 ieee80211_ratectl_tx_complete(vap, ni,
2420 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
2422 ieee80211_ratectl_tx_complete(vap, ni,
2423 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
2426 ieee80211_free_node(ni);
2428 sc->sc_tx_timer = 0;
2429 if (--ring->queued < IWN_TX_RING_LOMARK) {
2430 sc->qfullmsk &= ~(1 << ring->qid);
2431 if (sc->qfullmsk == 0 &&
2432 (ifp->if_flags & IFF_OACTIVE)) {
2433 ifp->if_flags &= ~IFF_OACTIVE;
2434 iwn_start_locked(ifp);
2440 * Process a "command done" firmware notification. This is where we wakeup
2441 * processes waiting for a synchronous command completion.
2444 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
2446 struct iwn_tx_ring *ring = &sc->txq[4];
2447 struct iwn_tx_data *data;
2449 if ((desc->qid & 0xf) != 4)
2450 return; /* Not a command ack. */
2452 data = &ring->data[desc->idx];
2454 /* If the command was mapped in an mbuf, free it. */
2455 if (data->m != NULL) {
2456 bus_dmamap_unload(ring->data_dmat, data->map);
2460 wakeup(&ring->desc[desc->idx]);
2464 * Process an INT_FH_RX or INT_SW_RX interrupt.
2467 iwn_notif_intr(struct iwn_softc *sc)
2469 struct ifnet *ifp = sc->sc_ifp;
2470 struct ieee80211com *ic = ifp->if_l2com;
2471 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2474 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
2475 BUS_DMASYNC_POSTREAD);
2477 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
2478 while (sc->rxq.cur != hw) {
2479 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
2480 struct iwn_rx_desc *desc;
2482 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2483 BUS_DMASYNC_POSTREAD);
2484 desc = mtod(data->m, struct iwn_rx_desc *);
2486 DPRINTF(sc, IWN_DEBUG_RECV,
2487 "%s: qid %x idx %d flags %x type %d(%s) len %d\n",
2488 __func__, desc->qid & 0xf, desc->idx, desc->flags,
2489 desc->type, iwn_intr_str(desc->type),
2490 le16toh(desc->len));
2492 if (!(desc->qid & 0x80)) /* Reply to a command. */
2493 iwn_cmd_done(sc, desc);
2495 switch (desc->type) {
2497 iwn_rx_phy(sc, desc, data);
2500 case IWN_RX_DONE: /* 4965AGN only. */
2501 case IWN_MPDU_RX_DONE:
2502 /* An 802.11 frame has been received. */
2503 iwn_rx_done(sc, desc, data);
2507 case IWN_RX_COMPRESSED_BA:
2508 /* A Compressed BlockAck has been received. */
2509 iwn_rx_compressed_ba(sc, desc, data);
2514 /* An 802.11 frame has been transmitted. */
2515 sc->sc_hal->tx_done(sc, desc, data);
2518 case IWN_RX_STATISTICS:
2519 case IWN_BEACON_STATISTICS:
2520 iwn_rx_statistics(sc, desc, data);
2523 case IWN_BEACON_MISSED:
2525 struct iwn_beacon_missed *miss =
2526 (struct iwn_beacon_missed *)(desc + 1);
2529 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2530 BUS_DMASYNC_POSTREAD);
2531 misses = le32toh(miss->consecutive);
2533 /* XXX not sure why we're notified w/ zero */
2536 DPRINTF(sc, IWN_DEBUG_STATE,
2537 "%s: beacons missed %d/%d\n", __func__,
2538 misses, le32toh(miss->total));
2541 * If more than 5 consecutive beacons are missed,
2542 * reinitialize the sensitivity state machine.
2544 if (vap->iv_state == IEEE80211_S_RUN && misses > 5)
2545 (void) iwn_init_sensitivity(sc);
2546 if (misses >= vap->iv_bmissthreshold)
2547 ieee80211_beacon_miss(ic);
2552 struct iwn_ucode_info *uc =
2553 (struct iwn_ucode_info *)(desc + 1);
2555 /* The microcontroller is ready. */
2556 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2557 BUS_DMASYNC_POSTREAD);
2558 DPRINTF(sc, IWN_DEBUG_RESET,
2559 "microcode alive notification version=%d.%d "
2560 "subtype=%x alive=%x\n", uc->major, uc->minor,
2561 uc->subtype, le32toh(uc->valid));
2563 if (le32toh(uc->valid) != 1) {
2564 device_printf(sc->sc_dev,
2565 "microcontroller initialization failed");
2568 if (uc->subtype == IWN_UCODE_INIT) {
2569 /* Save microcontroller report. */
2570 memcpy(&sc->ucode_info, uc, sizeof (*uc));
2572 /* Save the address of the error log in SRAM. */
2573 sc->errptr = le32toh(uc->errptr);
2576 case IWN_STATE_CHANGED:
2578 uint32_t *status = (uint32_t *)(desc + 1);
2581 * State change allows hardware switch change to be
2582 * noted. However, we handle this in iwn_intr as we
2583 * get both the enable/disble intr.
2585 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2586 BUS_DMASYNC_POSTREAD);
2587 DPRINTF(sc, IWN_DEBUG_INTR, "state changed to %x\n",
2591 case IWN_START_SCAN:
2593 struct iwn_start_scan *scan =
2594 (struct iwn_start_scan *)(desc + 1);
2596 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2597 BUS_DMASYNC_POSTREAD);
2598 DPRINTF(sc, IWN_DEBUG_ANY,
2599 "%s: scanning channel %d status %x\n",
2600 __func__, scan->chan, le32toh(scan->status));
2605 struct iwn_stop_scan *scan =
2606 (struct iwn_stop_scan *)(desc + 1);
2608 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2609 BUS_DMASYNC_POSTREAD);
2610 DPRINTF(sc, IWN_DEBUG_STATE,
2611 "scan finished nchan=%d status=%d chan=%d\n",
2612 scan->nchan, scan->status, scan->chan);
2614 ieee80211_scan_next(vap);
2617 case IWN5000_CALIBRATION_RESULT:
2618 iwn5000_rx_calib_results(sc, desc, data);
2621 case IWN5000_CALIBRATION_DONE:
2622 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
2627 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
2630 /* Tell the firmware what we have processed. */
2631 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
2632 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
2636 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
2637 * from power-down sleep mode.
2640 iwn_wakeup_intr(struct iwn_softc *sc)
2644 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
2647 /* Wakeup RX and TX rings. */
2648 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
2649 for (qid = 0; qid < sc->sc_hal->ntxqs; qid++) {
2650 struct iwn_tx_ring *ring = &sc->txq[qid];
2651 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
2656 iwn_rftoggle_intr(struct iwn_softc *sc)
2658 struct ifnet *ifp = sc->sc_ifp;
2659 struct ieee80211com *ic = ifp->if_l2com;
2660 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
2662 device_printf(sc->sc_dev, "RF switch: radio %s\n",
2663 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
2664 if (tmp & IWN_GP_CNTRL_RFKILL)
2665 ieee80211_runtask(ic, &sc->sc_radioon_task);
2667 ieee80211_runtask(ic, &sc->sc_radiooff_task);
2671 * Dump the error log of the firmware when a firmware panic occurs. Although
2672 * we can't debug the firmware because it is neither open source nor free, it
2673 * can help us to identify certain classes of problems.
2676 iwn_fatal_intr(struct iwn_softc *sc)
2678 const struct iwn_hal *hal = sc->sc_hal;
2679 struct iwn_fw_dump dump;
2682 /* Force a complete recalibration on next init. */
2683 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
2685 /* Check that the error log address is valid. */
2686 if (sc->errptr < IWN_FW_DATA_BASE ||
2687 sc->errptr + sizeof (dump) >
2688 IWN_FW_DATA_BASE + hal->fw_data_maxsz) {
2689 kprintf("%s: bad firmware error log address 0x%08x\n",
2690 __func__, sc->errptr);
2693 if (iwn_nic_lock(sc) != 0) {
2694 kprintf("%s: could not read firmware error log\n",
2698 /* Read firmware error log from SRAM. */
2699 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
2700 sizeof (dump) / sizeof (uint32_t));
2703 if (dump.valid == 0) {
2704 kprintf("%s: firmware error log is empty\n",
2708 kprintf("firmware error log:\n");
2709 kprintf(" error type = \"%s\" (0x%08X)\n",
2710 (dump.id < NELEM(iwn_fw_errmsg)) ?
2711 iwn_fw_errmsg[dump.id] : "UNKNOWN",
2713 kprintf(" program counter = 0x%08X\n", dump.pc);
2714 kprintf(" source line = 0x%08X\n", dump.src_line);
2715 kprintf(" error data = 0x%08X%08X\n",
2716 dump.error_data[0], dump.error_data[1]);
2717 kprintf(" branch link = 0x%08X%08X\n",
2718 dump.branch_link[0], dump.branch_link[1]);
2719 kprintf(" interrupt link = 0x%08X%08X\n",
2720 dump.interrupt_link[0], dump.interrupt_link[1]);
2721 kprintf(" time = %u\n", dump.time[0]);
2723 /* Dump driver status (TX and RX rings) while we're here. */
2724 kprintf("driver status:\n");
2725 for (i = 0; i < hal->ntxqs; i++) {
2726 struct iwn_tx_ring *ring = &sc->txq[i];
2727 kprintf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
2728 i, ring->qid, ring->cur, ring->queued);
2730 kprintf(" rx ring: cur=%d\n", sc->rxq.cur);
2736 struct iwn_softc *sc = arg;
2737 struct ifnet *ifp = sc->sc_ifp;
2738 uint32_t r1, r2, tmp;
2740 /* Disable interrupts. */
2741 IWN_WRITE(sc, IWN_INT_MASK, 0);
2743 /* Read interrupts from ICT (fast) or from registers (slow). */
2744 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
2746 while (sc->ict[sc->ict_cur] != 0) {
2747 tmp |= sc->ict[sc->ict_cur];
2748 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
2749 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
2752 if (tmp == 0xffffffff) /* Shouldn't happen. */
2754 else if (tmp & 0xc0000) /* Workaround a HW bug. */
2756 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
2757 r2 = 0; /* Unused. */
2759 r1 = IWN_READ(sc, IWN_INT);
2760 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0)
2761 return; /* Hardware gone! */
2762 r2 = IWN_READ(sc, IWN_FH_INT);
2765 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=%x reg2=%x\n", r1, r2);
2767 if (r1 == 0 && r2 == 0)
2768 goto done; /* Interrupt not for us. */
2770 /* Acknowledge interrupts. */
2771 IWN_WRITE(sc, IWN_INT, r1);
2772 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
2773 IWN_WRITE(sc, IWN_FH_INT, r2);
2775 if (r1 & IWN_INT_RF_TOGGLED) {
2776 iwn_rftoggle_intr(sc);
2779 if (r1 & IWN_INT_CT_REACHED) {
2780 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
2783 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
2785 ifp->if_flags &= ~IFF_UP;
2786 iwn_stop_locked(sc);
2789 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
2790 (r2 & IWN_FH_INT_RX)) {
2791 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
2792 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
2793 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
2794 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
2795 IWN_INT_PERIODIC_DIS);
2797 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
2798 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
2799 IWN_INT_PERIODIC_ENA);
2805 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
2806 if (sc->sc_flags & IWN_FLAG_USE_ICT)
2807 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
2808 wakeup(sc); /* FH DMA transfer completed. */
2811 if (r1 & IWN_INT_ALIVE)
2812 wakeup(sc); /* Firmware is alive. */
2814 if (r1 & IWN_INT_WAKEUP)
2815 iwn_wakeup_intr(sc);
2818 /* Re-enable interrupts. */
2819 if (ifp->if_flags & IFF_UP)
2820 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2824 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
2825 * 5000 adapters use a slightly different format.)
2828 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
2831 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
2833 *w = htole16(len + 8);
2834 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2835 BUS_DMASYNC_PREWRITE);
2836 if (idx < IWN_SCHED_WINSZ) {
2837 *(w + IWN_TX_RING_COUNT) = *w;
2838 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2839 BUS_DMASYNC_PREWRITE);
2844 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
2847 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
2849 *w = htole16(id << 12 | (len + 8));
2851 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2852 BUS_DMASYNC_PREWRITE);
2853 if (idx < IWN_SCHED_WINSZ) {
2854 *(w + IWN_TX_RING_COUNT) = *w;
2855 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2856 BUS_DMASYNC_PREWRITE);
2862 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
2864 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
2866 *w = (*w & htole16(0xf000)) | htole16(1);
2867 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2868 BUS_DMASYNC_PREWRITE);
2869 if (idx < IWN_SCHED_WINSZ) {
2870 *(w + IWN_TX_RING_COUNT) = *w;
2871 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2872 BUS_DMASYNC_PREWRITE);
2878 iwn_plcp_signal(int rate) {
2881 for (i = 0; i < IWN_RIDX_MAX + 1; i++) {
2882 if (rate == iwn_rates[i].rate)
2890 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
2891 struct iwn_tx_ring *ring)
2893 const struct iwn_hal *hal = sc->sc_hal;
2894 const struct ieee80211_txparam *tp;
2895 const struct iwn_rate *rinfo;
2896 struct ieee80211vap *vap = ni->ni_vap;
2897 struct ieee80211com *ic = ni->ni_ic;
2898 struct iwn_node *wn = (void *)ni;
2899 struct iwn_tx_desc *desc;
2900 struct iwn_tx_data *data;
2901 struct iwn_tx_cmd *cmd;
2902 struct iwn_cmd_data *tx;
2903 struct ieee80211_frame *wh;
2904 struct ieee80211_key *k = NULL;
2906 bus_dma_segment_t segs[IWN_MAX_SCATTER];
2909 int totlen, error, pad, nsegs = 0, i, rate;
2910 uint8_t ridx, type, txant;
2912 wh = mtod(m, struct ieee80211_frame *);
2913 hdrlen = ieee80211_anyhdrsize(wh);
2914 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2916 desc = &ring->desc[ring->cur];
2917 data = &ring->data[ring->cur];
2919 /* Choose a TX rate index. */
2920 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
2921 if (type == IEEE80211_FC0_TYPE_MGT)
2922 rate = tp->mgmtrate;
2923 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
2924 rate = tp->mcastrate;
2925 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
2926 rate = tp->ucastrate;
2928 /* XXX pass pktlen */
2929 ieee80211_ratectl_rate(ni, NULL, 0);
2931 rate = ni->ni_txrate;
2933 ridx = iwn_plcp_signal(rate);
2934 rinfo = &iwn_rates[ridx];
2936 /* Encrypt the frame if need be. */
2937 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
2938 k = ieee80211_crypto_encap(ni, m);
2943 /* Packet header may have moved, reset our local pointer. */
2944 wh = mtod(m, struct ieee80211_frame *);
2946 totlen = m->m_pkthdr.len;
2948 if (ieee80211_radiotap_active_vap(vap)) {
2949 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
2952 tap->wt_rate = rinfo->rate;
2954 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2956 ieee80211_radiotap_tx(vap, m);
2959 /* Prepare TX firmware command. */
2960 cmd = &ring->cmd[ring->cur];
2961 cmd->code = IWN_CMD_TX_DATA;
2963 cmd->qid = ring->qid;
2964 cmd->idx = ring->cur;
2966 tx = (struct iwn_cmd_data *)cmd->data;
2967 /* NB: No need to clear tx, all fields are reinitialized here. */
2968 tx->scratch = 0; /* clear "scratch" area */
2971 if (!IEEE80211_IS_MULTICAST(wh->i_addr1))
2972 flags |= IWN_TX_NEED_ACK;
2974 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
2975 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
2976 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
2978 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
2979 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
2981 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
2982 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2983 /* NB: Group frames are sent using CCK in 802.11b/g. */
2984 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
2985 flags |= IWN_TX_NEED_RTS;
2986 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
2987 ridx >= IWN_RIDX_OFDM6) {
2988 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
2989 flags |= IWN_TX_NEED_CTS;
2990 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
2991 flags |= IWN_TX_NEED_RTS;
2993 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
2994 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
2995 /* 5000 autoselects RTS/CTS or CTS-to-self. */
2996 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
2997 flags |= IWN_TX_NEED_PROTECTION;
2999 flags |= IWN_TX_FULL_TXOP;
3003 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
3004 type != IEEE80211_FC0_TYPE_DATA)
3005 tx->id = hal->broadcast_id;
3009 if (type == IEEE80211_FC0_TYPE_MGT) {
3010 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3012 /* Tell HW to set timestamp in probe responses. */
3013 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
3014 flags |= IWN_TX_INSERT_TSTAMP;
3016 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
3017 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
3018 tx->timeout = htole16(3);
3020 tx->timeout = htole16(2);
3022 tx->timeout = htole16(0);
3025 /* First segment length must be a multiple of 4. */
3026 flags |= IWN_TX_NEED_PADDING;
3027 pad = 4 - (hdrlen & 3);
3031 tx->len = htole16(totlen);
3033 tx->rts_ntries = 60;
3034 tx->data_ntries = 15;
3035 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
3036 tx->plcp = rinfo->plcp;
3037 tx->rflags = rinfo->flags;
3038 if (tx->id == hal->broadcast_id) {
3039 /* Group or management frame. */
3041 /* XXX Alternate between antenna A and B? */
3042 txant = IWN_LSB(sc->txchainmask);
3043 tx->rflags |= IWN_RFLAG_ANT(txant);
3045 tx->linkq = IWN_RIDX_OFDM54 - ridx;
3046 flags |= IWN_TX_LINKQ; /* enable MRR */
3049 /* Set physical address of "scratch area". */
3050 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
3051 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
3053 /* Copy 802.11 header in TX command. */
3054 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
3056 /* Trim 802.11 header. */
3059 tx->flags = htole32(flags);
3062 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
3063 m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3064 if (error == EFBIG) {
3065 /* too many fragments, linearize */
3066 mnew = m_defrag(m, MB_DONTWAIT);
3068 device_printf(sc->sc_dev,
3069 "%s: could not defrag mbuf\n", __func__);
3074 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
3075 data->map, m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3078 device_printf(sc->sc_dev,
3079 "%s: bus_dmamap_load_mbuf_segment failed, error %d\n",
3089 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
3090 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
3092 /* Fill TX descriptor. */
3093 desc->nsegs = 1 + nsegs;
3094 /* First DMA segment is used by the TX command. */
3095 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
3096 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
3097 (4 + sizeof (*tx) + hdrlen + pad) << 4);
3098 /* Other DMA segments are for data payload. */
3099 for (i = 1; i <= nsegs; i++) {
3100 desc->segs[i].addr = htole32(IWN_LOADDR(segs[i - 1].ds_addr));
3101 desc->segs[i].len = htole16(IWN_HIADDR(segs[i - 1].ds_addr) |
3102 segs[i - 1].ds_len << 4);
3105 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
3106 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
3107 BUS_DMASYNC_PREWRITE);
3108 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3109 BUS_DMASYNC_PREWRITE);
3112 /* Update TX scheduler. */
3113 hal->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
3117 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
3118 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
3120 /* Mark TX ring as full if we reach a certain threshold. */
3121 if (++ring->queued > IWN_TX_RING_HIMARK)
3122 sc->qfullmsk |= 1 << ring->qid;
3128 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
3129 struct ieee80211_node *ni, struct iwn_tx_ring *ring,
3130 const struct ieee80211_bpf_params *params)
3132 const struct iwn_hal *hal = sc->sc_hal;
3133 const struct iwn_rate *rinfo;
3134 struct ifnet *ifp = sc->sc_ifp;
3135 struct ieee80211vap *vap = ni->ni_vap;
3136 struct ieee80211com *ic = ifp->if_l2com;
3137 struct iwn_tx_cmd *cmd;
3138 struct iwn_cmd_data *tx;
3139 struct ieee80211_frame *wh;
3140 struct iwn_tx_desc *desc;
3141 struct iwn_tx_data *data;
3144 bus_dma_segment_t segs[IWN_MAX_SCATTER];
3147 int totlen, error, pad, nsegs = 0, i, rate;
3148 uint8_t ridx, type, txant;
3150 wh = mtod(m, struct ieee80211_frame *);
3151 hdrlen = ieee80211_anyhdrsize(wh);
3152 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3154 desc = &ring->desc[ring->cur];
3155 data = &ring->data[ring->cur];
3157 /* Choose a TX rate index. */
3158 rate = params->ibp_rate0;
3159 if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
3160 /* XXX fall back to mcast/mgmt rate? */
3164 ridx = iwn_plcp_signal(rate);
3165 rinfo = &iwn_rates[ridx];
3167 totlen = m->m_pkthdr.len;
3169 /* Prepare TX firmware command. */
3170 cmd = &ring->cmd[ring->cur];
3171 cmd->code = IWN_CMD_TX_DATA;
3173 cmd->qid = ring->qid;
3174 cmd->idx = ring->cur;
3176 tx = (struct iwn_cmd_data *)cmd->data;
3177 /* NB: No need to clear tx, all fields are reinitialized here. */
3178 tx->scratch = 0; /* clear "scratch" area */
3181 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
3182 flags |= IWN_TX_NEED_ACK;
3183 if (params->ibp_flags & IEEE80211_BPF_RTS) {
3184 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
3185 /* 5000 autoselects RTS/CTS or CTS-to-self. */
3186 flags &= ~IWN_TX_NEED_RTS;
3187 flags |= IWN_TX_NEED_PROTECTION;
3189 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
3191 if (params->ibp_flags & IEEE80211_BPF_CTS) {
3192 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
3193 /* 5000 autoselects RTS/CTS or CTS-to-self. */
3194 flags &= ~IWN_TX_NEED_CTS;
3195 flags |= IWN_TX_NEED_PROTECTION;
3197 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
3199 if (type == IEEE80211_FC0_TYPE_MGT) {
3200 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3202 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
3203 flags |= IWN_TX_INSERT_TSTAMP;
3205 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
3206 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
3207 tx->timeout = htole16(3);
3209 tx->timeout = htole16(2);
3211 tx->timeout = htole16(0);
3214 /* First segment length must be a multiple of 4. */
3215 flags |= IWN_TX_NEED_PADDING;
3216 pad = 4 - (hdrlen & 3);
3220 if (ieee80211_radiotap_active_vap(vap)) {
3221 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
3224 tap->wt_rate = rate;
3226 ieee80211_radiotap_tx(vap, m);
3229 tx->len = htole16(totlen);
3231 tx->id = hal->broadcast_id;
3232 tx->rts_ntries = params->ibp_try1;
3233 tx->data_ntries = params->ibp_try0;
3234 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
3235 tx->plcp = rinfo->plcp;
3236 tx->rflags = rinfo->flags;
3237 /* Group or management frame. */
3239 txant = IWN_LSB(sc->txchainmask);
3240 tx->rflags |= IWN_RFLAG_ANT(txant);
3241 /* Set physical address of "scratch area". */
3242 paddr = ring->cmd_dma.paddr + ring->cur * sizeof (struct iwn_tx_cmd);
3243 tx->loaddr = htole32(IWN_LOADDR(paddr));
3244 tx->hiaddr = IWN_HIADDR(paddr);
3246 /* Copy 802.11 header in TX command. */
3247 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
3249 /* Trim 802.11 header. */
3252 tx->flags = htole32(flags);
3255 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
3256 m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3257 if (error == EFBIG) {
3258 /* Too many fragments, linearize. */
3259 mnew = m_defrag(m, MB_DONTWAIT);
3261 device_printf(sc->sc_dev,
3262 "%s: could not defrag mbuf\n", __func__);
3267 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
3268 data->map, m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3271 device_printf(sc->sc_dev,
3272 "%s: bus_dmamap_load_mbuf_segment failed, error %d\n",
3282 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
3283 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
3285 /* Fill TX descriptor. */
3286 desc->nsegs = 1 + nsegs;
3287 /* First DMA segment is used by the TX command. */
3288 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
3289 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
3290 (4 + sizeof (*tx) + hdrlen + pad) << 4);
3291 /* Other DMA segments are for data payload. */
3292 for (i = 1; i <= nsegs; i++) {
3293 desc->segs[i].addr = htole32(IWN_LOADDR(segs[i - 1].ds_addr));
3294 desc->segs[i].len = htole16(IWN_HIADDR(segs[i - 1].ds_addr) |
3295 segs[i - 1].ds_len << 4);
3298 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
3299 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
3300 BUS_DMASYNC_PREWRITE);
3301 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3302 BUS_DMASYNC_PREWRITE);
3305 /* Update TX scheduler. */
3306 hal->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
3310 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
3311 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
3313 /* Mark TX ring as full if we reach a certain threshold. */
3314 if (++ring->queued > IWN_TX_RING_HIMARK)
3315 sc->qfullmsk |= 1 << ring->qid;
3321 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
3322 const struct ieee80211_bpf_params *params)
3324 struct ieee80211com *ic = ni->ni_ic;
3325 struct ifnet *ifp = ic->ic_ifp;
3326 struct iwn_softc *sc = ifp->if_softc;
3327 struct iwn_tx_ring *txq;
3330 if ((ifp->if_flags & IFF_RUNNING) == 0) {
3331 ieee80211_free_node(ni);
3337 txq = &sc->txq[M_WME_GETAC(m)];
3339 txq = &sc->txq[params->ibp_pri & 3];
3341 if (params == NULL) {
3343 * Legacy path; interpret frame contents to decide
3344 * precisely how to send the frame.
3346 error = iwn_tx_data(sc, m, ni, txq);
3349 * Caller supplied explicit parameters to use in
3350 * sending the frame.
3352 error = iwn_tx_data_raw(sc, m, ni, txq, params);
3355 /* NB: m is reclaimed on tx failure */
3356 ieee80211_free_node(ni);
3363 iwn_start(struct ifnet *ifp)
3365 struct iwn_softc *sc;
3369 wlan_serialize_enter();
3370 iwn_start_locked(ifp);
3371 wlan_serialize_exit();
3375 iwn_start_locked(struct ifnet *ifp)
3377 struct iwn_softc *sc = ifp->if_softc;
3378 struct ieee80211_node *ni;
3379 struct iwn_tx_ring *txq;
3384 if (sc->qfullmsk != 0) {
3385 ifp->if_flags |= IFF_OACTIVE;
3388 m = ifq_dequeue(&ifp->if_snd, NULL);
3391 KKASSERT(M_TRAILINGSPACE(m) >= 0);
3392 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
3393 pri = M_WME_GETAC(m);
3394 txq = &sc->txq[pri];
3395 if (iwn_tx_data(sc, m, ni, txq) != 0) {
3397 ieee80211_free_node(ni);
3400 sc->sc_tx_timer = 5;
3405 iwn_watchdog(struct iwn_softc *sc)
3407 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
3408 struct ifnet *ifp = sc->sc_ifp;
3409 struct ieee80211com *ic = ifp->if_l2com;
3411 if_printf(ifp, "device timeout\n");
3412 ieee80211_runtask(ic, &sc->sc_reinit_task);
3417 iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred)
3419 struct iwn_softc *sc = ifp->if_softc;
3420 struct ieee80211com *ic = ifp->if_l2com;
3421 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3422 struct ifreq *ifr = (struct ifreq *) data;
3423 int error = 0, startall = 0, stop = 0;
3427 if (ifp->if_flags & IFF_UP) {
3428 if (!(ifp->if_flags & IFF_RUNNING)) {
3429 iwn_init_locked(sc);
3430 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
3436 if (ifp->if_flags & IFF_RUNNING)
3437 iwn_stop_locked(sc);
3440 ieee80211_start_all(ic);
3441 else if (vap != NULL && stop)
3442 ieee80211_stop(vap);
3445 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
3448 error = ether_ioctl(ifp, cmd, data);
3458 * Send a command to the firmware.
3461 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
3463 struct iwn_tx_ring *ring = &sc->txq[4];
3464 struct iwn_tx_desc *desc;
3465 struct iwn_tx_data *data;
3466 struct iwn_tx_cmd *cmd;
3471 desc = &ring->desc[ring->cur];
3472 data = &ring->data[ring->cur];
3475 if (size > sizeof cmd->data) {
3476 /* Command is too large to fit in a descriptor. */
3477 if (totlen > MJUMPAGESIZE)
3479 m = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
3482 cmd = mtod(m, struct iwn_tx_cmd *);
3483 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
3484 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3491 cmd = &ring->cmd[ring->cur];
3492 paddr = data->cmd_paddr;
3497 cmd->qid = ring->qid;
3498 cmd->idx = ring->cur;
3499 memcpy(cmd->data, buf, size);
3502 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
3503 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
3505 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
3506 __func__, iwn_intr_str(cmd->code), cmd->code,
3507 cmd->flags, cmd->qid, cmd->idx);
3509 if (size > sizeof cmd->data) {
3510 bus_dmamap_sync(ring->data_dmat, data->map,
3511 BUS_DMASYNC_PREWRITE);
3513 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
3514 BUS_DMASYNC_PREWRITE);
3516 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3517 BUS_DMASYNC_PREWRITE);
3520 /* Update TX scheduler. */
3521 sc->sc_hal->update_sched(sc, ring->qid, ring->cur, 0, 0);
3524 /* Kick command ring. */
3525 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
3526 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
3531 error = zsleep(desc, &wlan_global_serializer, 0, "iwncmd", hz);
3536 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
3538 struct iwn4965_node_info hnode;
3542 * We use the node structure for 5000 Series internally (it is
3543 * a superset of the one for 4965AGN). We thus copy the common
3544 * fields before sending the command.
3546 src = (caddr_t)node;
3547 dst = (caddr_t)&hnode;
3548 memcpy(dst, src, 48);
3549 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
3550 memcpy(dst + 48, src + 72, 20);
3551 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
3555 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
3557 /* Direct mapping. */
3558 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
3562 static const uint8_t iwn_ridx_to_plcp[] = {
3563 10, 20, 55, 110, /* CCK */
3564 0xd, 0xf, 0x5, 0x7, 0x9, 0xb, 0x1, 0x3, 0x3 /* OFDM R1-R4 */
3566 static const uint8_t iwn_siso_mcs_to_plcp[] = {
3567 0, 0, 0, 0, /* CCK */
3568 0, 0, 1, 2, 3, 4, 5, 6, 7 /* HT */
3570 static const uint8_t iwn_mimo_mcs_to_plcp[] = {
3571 0, 0, 0, 0, /* CCK */
3572 8, 8, 9, 10, 11, 12, 13, 14, 15 /* HT */
3575 static const uint8_t iwn_prev_ridx[] = {
3576 /* NB: allow fallback from CCK11 to OFDM9 and from OFDM6 to CCK5 */
3577 0, 0, 1, 5, /* CCK */
3578 2, 4, 3, 6, 7, 8, 9, 10, 10 /* OFDM */
3582 * Configure hardware link parameters for the specified
3583 * node operating on the specified channel.
3586 iwn_set_link_quality(struct iwn_softc *sc, uint8_t id, int async)
3588 struct ifnet *ifp = sc->sc_ifp;
3589 struct ieee80211com *ic = ifp->if_l2com;
3590 struct iwn_cmd_link_quality linkq;
3591 const struct iwn_rate *rinfo;
3593 uint8_t txant, ridx;
3595 /* Use the first valid TX antenna. */
3596 txant = IWN_LSB(sc->txchainmask);
3598 memset(&linkq, 0, sizeof linkq);
3600 linkq.antmsk_1stream = txant;
3601 linkq.antmsk_2stream = IWN_ANT_AB;
3602 linkq.ampdu_max = 31;
3603 linkq.ampdu_threshold = 3;
3604 linkq.ampdu_limit = htole16(4000); /* 4ms */
3607 if (IEEE80211_IS_CHAN_HT(c))
3611 if (id == IWN_ID_BSS)
3612 ridx = IWN_RIDX_OFDM54;
3613 else if (IEEE80211_IS_CHAN_A(ic->ic_curchan))
3614 ridx = IWN_RIDX_OFDM6;
3616 ridx = IWN_RIDX_CCK1;
3618 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
3619 rinfo = &iwn_rates[ridx];
3621 if (IEEE80211_IS_CHAN_HT40(c)) {
3622 linkq.retry[i].plcp = iwn_mimo_mcs_to_plcp[ridx]
3624 linkq.retry[i].rflags = IWN_RFLAG_HT
3627 } else if (IEEE80211_IS_CHAN_HT(c)) {
3628 linkq.retry[i].plcp = iwn_siso_mcs_to_plcp[ridx]
3630 linkq.retry[i].rflags = IWN_RFLAG_HT;
3635 linkq.retry[i].plcp = rinfo->plcp;
3636 linkq.retry[i].rflags = rinfo->flags;
3638 linkq.retry[i].rflags |= IWN_RFLAG_ANT(txant);
3639 ridx = iwn_prev_ridx[ridx];
3642 if (sc->sc_debug & IWN_DEBUG_STATE) {
3643 kprintf("%s: set link quality for node %d, mimo %d ssmask %d\n",
3644 __func__, id, linkq.mimo, linkq.antmsk_1stream);
3645 kprintf("%s:", __func__);
3646 for (i = 0; i < IWN_MAX_TX_RETRIES; i++)
3647 kprintf(" %d:%x", linkq.retry[i].plcp,
3648 linkq.retry[i].rflags);
3652 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
3656 * Broadcast node is used to send group-addressed and management frames.
3659 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
3661 const struct iwn_hal *hal = sc->sc_hal;
3662 struct ifnet *ifp = sc->sc_ifp;
3663 struct iwn_node_info node;
3666 memset(&node, 0, sizeof node);
3667 IEEE80211_ADDR_COPY(node.macaddr, ifp->if_broadcastaddr);
3668 node.id = hal->broadcast_id;
3669 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
3670 error = hal->add_node(sc, &node, async);
3674 error = iwn_set_link_quality(sc, hal->broadcast_id, async);
3679 iwn_wme_update(struct ieee80211com *ic)
3681 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
3682 #define IWN_TXOP_TO_US(v) (v<<5)
3683 struct iwn_softc *sc = ic->ic_ifp->if_softc;
3684 struct iwn_edca_params cmd;
3687 memset(&cmd, 0, sizeof cmd);
3688 cmd.flags = htole32(IWN_EDCA_UPDATE);
3689 for (i = 0; i < WME_NUM_AC; i++) {
3690 const struct wmeParams *wmep =
3691 &ic->ic_wme.wme_chanParams.cap_wmeParams[i];
3692 cmd.ac[i].aifsn = wmep->wmep_aifsn;
3693 cmd.ac[i].cwmin = htole16(IWN_EXP2(wmep->wmep_logcwmin));
3694 cmd.ac[i].cwmax = htole16(IWN_EXP2(wmep->wmep_logcwmax));
3695 cmd.ac[i].txoplimit =
3696 htole16(IWN_TXOP_TO_US(wmep->wmep_txopLimit));
3698 (void) iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1 /*async*/);
3700 #undef IWN_TXOP_TO_US
3705 iwn_update_mcast(struct ifnet *ifp)
3711 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
3713 struct iwn_cmd_led led;
3715 /* Clear microcode LED ownership. */
3716 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
3719 led.unit = htole32(10000); /* on/off in unit of 100ms */
3722 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
3726 * Set the critical temperature at which the firmware will stop the radio
3730 iwn_set_critical_temp(struct iwn_softc *sc)
3732 struct iwn_critical_temp crit;
3735 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
3737 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
3738 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
3739 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3740 temp = IWN_CTOK(110);
3743 memset(&crit, 0, sizeof crit);
3744 crit.tempR = htole32(temp);
3745 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n",
3747 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
3751 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
3753 struct iwn_cmd_timing cmd;
3756 memset(&cmd, 0, sizeof cmd);
3757 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
3758 cmd.bintval = htole16(ni->ni_intval);
3759 cmd.lintval = htole16(10);
3761 /* Compute remaining time until next beacon. */
3762 val = (uint64_t)ni->ni_intval * 1024; /* msecs -> usecs */
3763 mod = le64toh(cmd.tstamp) % val;
3764 cmd.binitval = htole32((uint32_t)(val - mod));
3766 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
3767 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
3769 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
3773 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
3775 struct ifnet *ifp = sc->sc_ifp;
3776 struct ieee80211com *ic = ifp->if_l2com;
3778 /* Adjust TX power if need be (delta >= 3 degC.) */
3779 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
3780 __func__, sc->temp, temp);
3781 if (abs(temp - sc->temp) >= 3) {
3782 /* Record temperature of last calibration. */
3784 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
3789 * Set TX power for current channel (each rate has its own power settings).
3790 * This function takes into account the regulatory information from EEPROM,
3791 * the current temperature and the current voltage.
3794 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
3797 /* Fixed-point arithmetic division using a n-bit fractional part. */
3798 #define fdivround(a, b, n) \
3799 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
3800 /* Linear interpolation. */
3801 #define interpolate(x, x1, y1, x2, y2, n) \
3802 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
3804 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
3805 struct ifnet *ifp = sc->sc_ifp;
3806 struct ieee80211com *ic = ifp->if_l2com;
3807 struct iwn_ucode_info *uc = &sc->ucode_info;
3808 struct iwn4965_cmd_txpower cmd;
3809 struct iwn4965_eeprom_chan_samples *chans;
3810 int32_t vdiff, tdiff;
3811 int i, c, grp, maxpwr;
3812 const uint8_t *rf_gain, *dsp_gain;
3815 /* Retrieve channel number. */
3816 chan = ieee80211_chan2ieee(ic, ch);
3817 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
3820 memset(&cmd, 0, sizeof cmd);
3821 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
3824 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
3825 maxpwr = sc->maxpwr5GHz;
3826 rf_gain = iwn4965_rf_gain_5ghz;
3827 dsp_gain = iwn4965_dsp_gain_5ghz;
3829 maxpwr = sc->maxpwr2GHz;
3830 rf_gain = iwn4965_rf_gain_2ghz;
3831 dsp_gain = iwn4965_dsp_gain_2ghz;
3834 /* Compute voltage compensation. */
3835 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
3840 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3841 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
3842 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
3844 /* Get channel attenuation group. */
3845 if (chan <= 20) /* 1-20 */
3847 else if (chan <= 43) /* 34-43 */
3849 else if (chan <= 70) /* 44-70 */
3851 else if (chan <= 124) /* 71-124 */
3855 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3856 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
3858 /* Get channel sub-band. */
3859 for (i = 0; i < IWN_NBANDS; i++)
3860 if (sc->bands[i].lo != 0 &&
3861 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
3863 if (i == IWN_NBANDS) /* Can't happen in real-life. */
3865 chans = sc->bands[i].chans;
3866 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3867 "%s: chan %d sub-band=%d\n", __func__, chan, i);
3869 for (c = 0; c < 2; c++) {
3870 uint8_t power, gain, temp;
3871 int maxchpwr, pwr, ridx, idx;
3873 power = interpolate(chan,
3874 chans[0].num, chans[0].samples[c][1].power,
3875 chans[1].num, chans[1].samples[c][1].power, 1);
3876 gain = interpolate(chan,
3877 chans[0].num, chans[0].samples[c][1].gain,
3878 chans[1].num, chans[1].samples[c][1].gain, 1);
3879 temp = interpolate(chan,
3880 chans[0].num, chans[0].samples[c][1].temp,
3881 chans[1].num, chans[1].samples[c][1].temp, 1);
3882 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3883 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
3884 __func__, c, power, gain, temp);
3886 /* Compute temperature compensation. */
3887 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
3888 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3889 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
3890 __func__, tdiff, sc->temp, temp);
3892 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
3893 /* Convert dBm to half-dBm. */
3894 maxchpwr = sc->maxpwr[chan] * 2;
3896 maxchpwr -= 6; /* MIMO 2T: -3dB */
3900 /* Adjust TX power based on rate. */
3901 if ((ridx % 8) == 5)
3902 pwr -= 15; /* OFDM48: -7.5dB */
3903 else if ((ridx % 8) == 6)
3904 pwr -= 17; /* OFDM54: -8.5dB */
3905 else if ((ridx % 8) == 7)
3906 pwr -= 20; /* OFDM60: -10dB */
3908 pwr -= 10; /* Others: -5dB */
3910 /* Do not exceed channel max TX power. */
3914 idx = gain - (pwr - power) - tdiff - vdiff;
3915 if ((ridx / 8) & 1) /* MIMO */
3916 idx += (int32_t)le32toh(uc->atten[grp][c]);
3919 idx += 9; /* 5GHz */
3920 if (ridx == IWN_RIDX_MAX)
3923 /* Make sure idx stays in a valid range. */
3926 else if (idx > IWN4965_MAX_PWR_INDEX)
3927 idx = IWN4965_MAX_PWR_INDEX;
3929 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3930 "%s: Tx chain %d, rate idx %d: power=%d\n",
3931 __func__, c, ridx, idx);
3932 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
3933 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
3937 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3938 "%s: set tx power for chan %d\n", __func__, chan);
3939 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
3946 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
3949 struct iwn5000_cmd_txpower cmd;
3952 * TX power calibration is handled automatically by the firmware
3955 memset(&cmd, 0, sizeof cmd);
3956 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
3957 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
3958 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
3959 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: setting TX power\n", __func__);
3960 return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async);
3964 * Retrieve the maximum RSSI (in dBm) among receivers.
3967 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
3969 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
3973 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
3974 agc = (le16toh(phy->agc) >> 7) & 0x7f;
3978 if (mask & IWN_ANT_A) /* Ant A */
3979 rssi = max(rssi, phy->rssi[0]);
3980 if (mask & IWN_ATH_B) /* Ant B */
3981 rssi = max(rssi, phy->rssi[2]);
3982 if (mask & IWN_ANT_C) /* Ant C */
3983 rssi = max(rssi, phy->rssi[4]);
3985 rssi = max(rssi, phy->rssi[0]);
3986 rssi = max(rssi, phy->rssi[2]);
3987 rssi = max(rssi, phy->rssi[4]);
3990 DPRINTF(sc, IWN_DEBUG_RECV, "%s: agc %d mask 0x%x rssi %d %d %d "
3991 "result %d\n", __func__, agc, mask,
3992 phy->rssi[0], phy->rssi[2], phy->rssi[4],
3993 rssi - agc - IWN_RSSI_TO_DBM);
3994 return rssi - agc - IWN_RSSI_TO_DBM;
3998 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
4000 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
4004 agc = (le32toh(phy->agc) >> 9) & 0x7f;
4006 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
4007 le16toh(phy->rssi[1]) & 0xff);
4008 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
4010 DPRINTF(sc, IWN_DEBUG_RECV, "%s: agc %d rssi %d %d %d "
4011 "result %d\n", __func__, agc,
4012 phy->rssi[0], phy->rssi[1], phy->rssi[2],
4013 rssi - agc - IWN_RSSI_TO_DBM);
4014 return rssi - agc - IWN_RSSI_TO_DBM;
4018 * Retrieve the average noise (in dBm) among receivers.
4021 iwn_get_noise(const struct iwn_rx_general_stats *stats)
4023 int i, total, nbant, noise;
4026 for (i = 0; i < 3; i++) {
4027 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
4032 /* There should be at least one antenna but check anyway. */
4033 return (nbant == 0) ? -127 : (total / nbant) - 107;
4037 * Compute temperature (in degC) from last received statistics.
4040 iwn4965_get_temperature(struct iwn_softc *sc)
4042 struct iwn_ucode_info *uc = &sc->ucode_info;
4043 int32_t r1, r2, r3, r4, temp;
4045 r1 = le32toh(uc->temp[0].chan20MHz);
4046 r2 = le32toh(uc->temp[1].chan20MHz);
4047 r3 = le32toh(uc->temp[2].chan20MHz);
4048 r4 = le32toh(sc->rawtemp);
4050 if (r1 == r3) /* Prevents division by 0 (should not happen.) */
4053 /* Sign-extend 23-bit R4 value to 32-bit. */
4054 r4 = (r4 << 8) >> 8;
4055 /* Compute temperature in Kelvin. */
4056 temp = (259 * (r4 - r2)) / (r3 - r1);
4057 temp = (temp * 97) / 100 + 8;
4059 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
4061 return IWN_KTOC(temp);
4065 iwn5000_get_temperature(struct iwn_softc *sc)
4070 * Temperature is not used by the driver for 5000 Series because
4071 * TX power calibration is handled by firmware. We export it to
4072 * users through the sensor framework though.
4074 temp = le32toh(sc->rawtemp);
4075 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
4076 temp = (temp / -5) + sc->temp_off;
4077 temp = IWN_KTOC(temp);
4083 * Initialize sensitivity calibration state machine.
4086 iwn_init_sensitivity(struct iwn_softc *sc)
4088 const struct iwn_hal *hal = sc->sc_hal;
4089 struct iwn_calib_state *calib = &sc->calib;
4093 /* Reset calibration state machine. */
4094 memset(calib, 0, sizeof (*calib));
4095 calib->state = IWN_CALIB_STATE_INIT;
4096 calib->cck_state = IWN_CCK_STATE_HIFA;
4097 /* Set initial correlation values. */
4098 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
4099 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
4100 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
4101 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
4102 calib->cck_x4 = 125;
4103 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
4104 calib->energy_cck = sc->limits->energy_cck;
4106 /* Write initial sensitivity. */
4107 error = iwn_send_sensitivity(sc);
4111 /* Write initial gains. */
4112 error = hal->init_gains(sc);
4116 /* Request statistics at each beacon interval. */
4118 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: calibrate phy\n", __func__);
4119 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
4123 * Collect noise and RSSI statistics for the first 20 beacons received
4124 * after association and use them to determine connected antennas and
4125 * to set differential gains.
4128 iwn_collect_noise(struct iwn_softc *sc,
4129 const struct iwn_rx_general_stats *stats)
4131 const struct iwn_hal *hal = sc->sc_hal;
4132 struct iwn_calib_state *calib = &sc->calib;
4136 /* Accumulate RSSI and noise for all 3 antennas. */
4137 for (i = 0; i < 3; i++) {
4138 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
4139 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
4141 /* NB: We update differential gains only once after 20 beacons. */
4142 if (++calib->nbeacons < 20)
4145 /* Determine highest average RSSI. */
4146 val = MAX(calib->rssi[0], calib->rssi[1]);
4147 val = MAX(calib->rssi[2], val);
4149 /* Determine which antennas are connected. */
4150 sc->chainmask = sc->rxchainmask;
4151 for (i = 0; i < 3; i++)
4152 if (val - calib->rssi[i] > 15 * 20)
4153 sc->chainmask &= ~(1 << i);
4155 /* If none of the TX antennas are connected, keep at least one. */
4156 if ((sc->chainmask & sc->txchainmask) == 0)
4157 sc->chainmask |= IWN_LSB(sc->txchainmask);
4159 (void)hal->set_gains(sc);
4160 calib->state = IWN_CALIB_STATE_RUN;
4163 /* XXX Disable RX chains with no antennas connected. */
4164 sc->rxon.rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
4165 (void)iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 1);
4170 /* Enable power-saving mode if requested by user. */
4171 if (sc->sc_ic.ic_flags & IEEE80211_F_PMGTON)
4172 (void)iwn_set_pslevel(sc, 0, 3, 1);
4177 iwn4965_init_gains(struct iwn_softc *sc)
4179 struct iwn_phy_calib_gain cmd;
4181 memset(&cmd, 0, sizeof cmd);
4182 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
4183 /* Differential gains initially set to 0 for all 3 antennas. */
4184 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4185 "%s: setting initial differential gains\n", __func__);
4186 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4190 iwn5000_init_gains(struct iwn_softc *sc)
4192 struct iwn_phy_calib cmd;
4194 memset(&cmd, 0, sizeof cmd);
4195 cmd.code = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
4198 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4199 "%s: setting initial differential gains\n", __func__);
4200 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4204 iwn4965_set_gains(struct iwn_softc *sc)
4206 struct iwn_calib_state *calib = &sc->calib;
4207 struct iwn_phy_calib_gain cmd;
4208 int i, delta, noise;
4210 /* Get minimal noise among connected antennas. */
4211 noise = INT_MAX; /* NB: There's at least one antenna. */
4212 for (i = 0; i < 3; i++)
4213 if (sc->chainmask & (1 << i))
4214 noise = MIN(calib->noise[i], noise);
4216 memset(&cmd, 0, sizeof cmd);
4217 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
4218 /* Set differential gains for connected antennas. */
4219 for (i = 0; i < 3; i++) {
4220 if (sc->chainmask & (1 << i)) {
4221 /* Compute attenuation (in unit of 1.5dB). */
4222 delta = (noise - (int32_t)calib->noise[i]) / 30;
4223 /* NB: delta <= 0 */
4224 /* Limit to [-4.5dB,0]. */
4225 cmd.gain[i] = MIN(abs(delta), 3);
4227 cmd.gain[i] |= 1 << 2; /* sign bit */
4230 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4231 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
4232 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
4233 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4237 iwn5000_set_gains(struct iwn_softc *sc)
4239 struct iwn_calib_state *calib = &sc->calib;
4240 struct iwn_phy_calib_gain cmd;
4241 int i, ant, delta, div;
4243 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
4244 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
4246 memset(&cmd, 0, sizeof cmd);
4247 cmd.code = IWN5000_PHY_CALIB_NOISE_GAIN;
4250 /* Get first available RX antenna as referential. */
4251 ant = IWN_LSB(sc->rxchainmask);
4252 /* Set differential gains for other antennas. */
4253 for (i = ant + 1; i < 3; i++) {
4254 if (sc->chainmask & (1 << i)) {
4255 /* The delta is relative to antenna "ant". */
4256 delta = ((int32_t)calib->noise[ant] -
4257 (int32_t)calib->noise[i]) / div;
4258 /* Limit to [-4.5dB,+4.5dB]. */
4259 cmd.gain[i - 1] = MIN(abs(delta), 3);
4261 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
4264 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4265 "setting differential gains Ant B/C: %x/%x (%x)\n",
4266 cmd.gain[0], cmd.gain[1], sc->chainmask);
4267 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4271 * Tune RF RX sensitivity based on the number of false alarms detected
4272 * during the last beacon period.
4275 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
4277 #define inc(val, inc, max) \
4278 if ((val) < (max)) { \
4279 if ((val) < (max) - (inc)) \
4285 #define dec(val, dec, min) \
4286 if ((val) > (min)) { \
4287 if ((val) > (min) + (dec)) \
4294 const struct iwn_sensitivity_limits *limits = sc->limits;
4295 struct iwn_calib_state *calib = &sc->calib;
4296 uint32_t val, rxena, fa;
4297 uint32_t energy[3], energy_min;
4298 uint8_t noise[3], noise_ref;
4299 int i, needs_update = 0;
4301 /* Check that we've been enabled long enough. */
4302 rxena = le32toh(stats->general.load);
4306 /* Compute number of false alarms since last call for OFDM. */
4307 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
4308 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
4309 fa *= 200 * 1024; /* 200TU */
4311 /* Save counters values for next call. */
4312 calib->bad_plcp_ofdm = le32toh(stats->ofdm.bad_plcp);
4313 calib->fa_ofdm = le32toh(stats->ofdm.fa);
4315 if (fa > 50 * rxena) {
4316 /* High false alarm count, decrease sensitivity. */
4317 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4318 "%s: OFDM high false alarm count: %u\n", __func__, fa);
4319 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
4320 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
4321 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
4322 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
4324 } else if (fa < 5 * rxena) {
4325 /* Low false alarm count, increase sensitivity. */
4326 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4327 "%s: OFDM low false alarm count: %u\n", __func__, fa);
4328 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
4329 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
4330 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
4331 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
4334 /* Compute maximum noise among 3 receivers. */
4335 for (i = 0; i < 3; i++)
4336 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
4337 val = MAX(noise[0], noise[1]);
4338 val = MAX(noise[2], val);
4339 /* Insert it into our samples table. */
4340 calib->noise_samples[calib->cur_noise_sample] = val;
4341 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
4343 /* Compute maximum noise among last 20 samples. */
4344 noise_ref = calib->noise_samples[0];
4345 for (i = 1; i < 20; i++)
4346 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
4348 /* Compute maximum energy among 3 receivers. */
4349 for (i = 0; i < 3; i++)
4350 energy[i] = le32toh(stats->general.energy[i]);
4351 val = MIN(energy[0], energy[1]);
4352 val = MIN(energy[2], val);
4353 /* Insert it into our samples table. */
4354 calib->energy_samples[calib->cur_energy_sample] = val;
4355 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
4357 /* Compute minimum energy among last 10 samples. */
4358 energy_min = calib->energy_samples[0];
4359 for (i = 1; i < 10; i++)
4360 energy_min = MAX(energy_min, calib->energy_samples[i]);
4363 /* Compute number of false alarms since last call for CCK. */
4364 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
4365 fa += le32toh(stats->cck.fa) - calib->fa_cck;
4366 fa *= 200 * 1024; /* 200TU */
4368 /* Save counters values for next call. */
4369 calib->bad_plcp_cck = le32toh(stats->cck.bad_plcp);
4370 calib->fa_cck = le32toh(stats->cck.fa);
4372 if (fa > 50 * rxena) {
4373 /* High false alarm count, decrease sensitivity. */
4374 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4375 "%s: CCK high false alarm count: %u\n", __func__, fa);
4376 calib->cck_state = IWN_CCK_STATE_HIFA;
4379 if (calib->cck_x4 > 160) {
4380 calib->noise_ref = noise_ref;
4381 if (calib->energy_cck > 2)
4382 dec(calib->energy_cck, 2, energy_min);
4384 if (calib->cck_x4 < 160) {
4385 calib->cck_x4 = 161;
4388 inc(calib->cck_x4, 3, limits->max_cck_x4);
4390 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
4392 } else if (fa < 5 * rxena) {
4393 /* Low false alarm count, increase sensitivity. */
4394 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4395 "%s: CCK low false alarm count: %u\n", __func__, fa);
4396 calib->cck_state = IWN_CCK_STATE_LOFA;
4399 if (calib->cck_state != IWN_CCK_STATE_INIT &&
4400 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
4401 calib->low_fa > 100)) {
4402 inc(calib->energy_cck, 2, limits->min_energy_cck);
4403 dec(calib->cck_x4, 3, limits->min_cck_x4);
4404 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
4407 /* Not worth to increase or decrease sensitivity. */
4408 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4409 "%s: CCK normal false alarm count: %u\n", __func__, fa);
4411 calib->noise_ref = noise_ref;
4413 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
4414 /* Previous interval had many false alarms. */
4415 dec(calib->energy_cck, 8, energy_min);
4417 calib->cck_state = IWN_CCK_STATE_INIT;
4421 (void)iwn_send_sensitivity(sc);
4427 iwn_send_sensitivity(struct iwn_softc *sc)
4429 struct iwn_calib_state *calib = &sc->calib;
4430 struct iwn_sensitivity_cmd cmd;
4432 memset(&cmd, 0, sizeof cmd);
4433 cmd.which = IWN_SENSITIVITY_WORKTBL;
4434 /* OFDM modulation. */
4435 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
4436 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
4437 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
4438 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
4439 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
4440 cmd.energy_ofdm_th = htole16(62);
4441 /* CCK modulation. */
4442 cmd.corr_cck_x4 = htole16(calib->cck_x4);
4443 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
4444 cmd.energy_cck = htole16(calib->energy_cck);
4445 /* Barker modulation: use default values. */
4446 cmd.corr_barker = htole16(190);
4447 cmd.corr_barker_mrc = htole16(390);
4449 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4450 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
4451 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
4452 calib->ofdm_mrc_x4, calib->cck_x4,
4453 calib->cck_mrc_x4, calib->energy_cck);
4454 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, sizeof cmd, 1);
4458 * Set STA mode power saving level (between 0 and 5).
4459 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
4462 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
4464 const struct iwn_pmgt *pmgt;
4465 struct iwn_pmgt_cmd cmd;
4466 uint32_t max, skip_dtim;
4470 /* Select which PS parameters to use. */
4472 pmgt = &iwn_pmgt[0][level];
4473 else if (dtim <= 10)
4474 pmgt = &iwn_pmgt[1][level];
4476 pmgt = &iwn_pmgt[2][level];
4478 memset(&cmd, 0, sizeof cmd);
4479 if (level != 0) /* not CAM */
4480 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
4482 cmd.flags |= htole16(IWN_PS_FAST_PD);
4483 /* Retrieve PCIe Active State Power Management (ASPM). */
4484 tmp = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
4485 if (!(tmp & 0x1)) /* L0s Entry disabled. */
4486 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
4487 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
4488 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
4494 skip_dtim = pmgt->skip_dtim;
4495 if (skip_dtim != 0) {
4496 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
4497 max = pmgt->intval[4];
4498 if (max == (uint32_t)-1)
4499 max = dtim * (skip_dtim + 1);
4500 else if (max > dtim)
4501 max = (max / dtim) * dtim;
4504 for (i = 0; i < 5; i++)
4505 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
4507 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
4509 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
4513 iwn_config(struct iwn_softc *sc)
4515 const struct iwn_hal *hal = sc->sc_hal;
4516 struct ifnet *ifp = sc->sc_ifp;
4517 struct ieee80211com *ic = ifp->if_l2com;
4518 struct iwn_bluetooth bluetooth;
4523 /* Configure valid TX chains for 5000 Series. */
4524 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4525 txmask = htole32(sc->txchainmask);
4526 DPRINTF(sc, IWN_DEBUG_RESET,
4527 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
4528 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
4531 device_printf(sc->sc_dev,
4532 "%s: could not configure valid TX chains, "
4533 "error %d\n", __func__, error);
4538 /* Configure bluetooth coexistence. */
4539 memset(&bluetooth, 0, sizeof bluetooth);
4540 bluetooth.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
4541 bluetooth.lead_time = IWN_BT_LEAD_TIME_DEF;
4542 bluetooth.max_kill = IWN_BT_MAX_KILL_DEF;
4543 DPRINTF(sc, IWN_DEBUG_RESET, "%s: config bluetooth coexistence\n",
4545 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &bluetooth, sizeof bluetooth, 0);
4547 device_printf(sc->sc_dev,
4548 "%s: could not configure bluetooth coexistence, error %d\n",
4553 /* Set mode, channel, RX filter and enable RX. */
4554 memset(&sc->rxon, 0, sizeof (struct iwn_rxon));
4555 IEEE80211_ADDR_COPY(sc->rxon.myaddr, IF_LLADDR(ifp));
4556 IEEE80211_ADDR_COPY(sc->rxon.wlap, IF_LLADDR(ifp));
4557 sc->rxon.chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
4558 sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
4559 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
4560 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4561 switch (ic->ic_opmode) {
4562 case IEEE80211_M_STA:
4563 sc->rxon.mode = IWN_MODE_STA;
4564 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);
4566 case IEEE80211_M_MONITOR:
4567 sc->rxon.mode = IWN_MODE_MONITOR;
4568 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST |
4569 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
4572 /* Should not get there. */
4575 sc->rxon.cck_mask = 0x0f; /* not yet negotiated */
4576 sc->rxon.ofdm_mask = 0xff; /* not yet negotiated */
4577 sc->rxon.ht_single_mask = 0xff;
4578 sc->rxon.ht_dual_mask = 0xff;
4579 sc->rxon.ht_triple_mask = 0xff;
4581 IWN_RXCHAIN_VALID(sc->rxchainmask) |
4582 IWN_RXCHAIN_MIMO_COUNT(2) |
4583 IWN_RXCHAIN_IDLE_COUNT(2);
4584 sc->rxon.rxchain = htole16(rxchain);
4585 DPRINTF(sc, IWN_DEBUG_RESET, "%s: setting configuration\n", __func__);
4586 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 0);
4588 device_printf(sc->sc_dev,
4589 "%s: RXON command failed\n", __func__);
4593 error = iwn_add_broadcast_node(sc, 0);
4595 device_printf(sc->sc_dev,
4596 "%s: could not add broadcast node\n", __func__);
4600 /* Configuration has changed, set TX power accordingly. */
4601 error = hal->set_txpower(sc, ic->ic_curchan, 0);
4603 device_printf(sc->sc_dev,
4604 "%s: could not set TX power\n", __func__);
4608 error = iwn_set_critical_temp(sc);
4610 device_printf(sc->sc_dev,
4611 "%s: ccould not set critical temperature\n", __func__);
4615 /* Set power saving level to CAM during initialization. */
4616 error = iwn_set_pslevel(sc, 0, 0, 0);
4618 device_printf(sc->sc_dev,
4619 "%s: could not set power saving level\n", __func__);
4626 iwn_scan(struct iwn_softc *sc)
4628 struct ifnet *ifp = sc->sc_ifp;
4629 struct ieee80211com *ic = ifp->if_l2com;
4630 struct ieee80211_scan_state *ss = ic->ic_scan; /*XXX*/
4631 struct iwn_scan_hdr *hdr;
4632 struct iwn_cmd_data *tx;
4633 struct iwn_scan_essid *essid;
4634 struct iwn_scan_chan *chan;
4635 struct ieee80211_frame *wh;
4636 struct ieee80211_rateset *rs;
4637 struct ieee80211_channel *c;
4638 int buflen, error, nrates;
4640 uint8_t *buf, *frm, txant;
4642 buf = kmalloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_INTWAIT | M_ZERO);
4644 device_printf(sc->sc_dev,
4645 "%s: could not allocate buffer for scan command\n",
4649 hdr = (struct iwn_scan_hdr *)buf;
4652 * Move to the next channel if no frames are received within 10ms
4653 * after sending the probe request.
4655 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
4656 hdr->quiet_threshold = htole16(1); /* min # of packets */
4658 /* Select antennas for scanning. */
4660 IWN_RXCHAIN_VALID(sc->rxchainmask) |
4661 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
4662 IWN_RXCHAIN_DRIVER_FORCE;
4663 if (IEEE80211_IS_CHAN_A(ic->ic_curchan) &&
4664 sc->hw_type == IWN_HW_REV_TYPE_4965) {
4665 /* Ant A must be avoided in 5GHz because of an HW bug. */
4666 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_BC);
4667 } else /* Use all available RX antennas. */
4668 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
4669 hdr->rxchain = htole16(rxchain);
4670 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
4672 tx = (struct iwn_cmd_data *)(hdr + 1);
4673 tx->flags = htole32(IWN_TX_AUTO_SEQ);
4674 tx->id = sc->sc_hal->broadcast_id;
4675 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4677 if (IEEE80211_IS_CHAN_A(ic->ic_curchan)) {
4678 /* Send probe requests at 6Mbps. */
4679 tx->plcp = iwn_rates[IWN_RIDX_OFDM6].plcp;
4680 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
4682 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
4683 /* Send probe requests at 1Mbps. */
4684 tx->plcp = iwn_rates[IWN_RIDX_CCK1].plcp;
4685 tx->rflags = IWN_RFLAG_CCK;
4686 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
4688 /* Use the first valid TX antenna. */
4689 txant = IWN_LSB(sc->txchainmask);
4690 tx->rflags |= IWN_RFLAG_ANT(txant);
4692 essid = (struct iwn_scan_essid *)(tx + 1);
4693 if (ss->ss_ssid[0].len != 0) {
4694 essid[0].id = IEEE80211_ELEMID_SSID;
4695 essid[0].len = ss->ss_ssid[0].len;
4696 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
4700 * Build a probe request frame. Most of the following code is a
4701 * copy & paste of what is done in net80211.
4703 wh = (struct ieee80211_frame *)(essid + 20);
4704 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
4705 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
4706 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
4707 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr);
4708 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(ifp));
4709 IEEE80211_ADDR_COPY(wh->i_addr3, ifp->if_broadcastaddr);
4710 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
4711 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
4713 frm = (uint8_t *)(wh + 1);
4716 *frm++ = IEEE80211_ELEMID_SSID;
4717 *frm++ = ss->ss_ssid[0].len;
4718 memcpy(frm, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
4719 frm += ss->ss_ssid[0].len;
4721 /* Add supported rates IE. */
4722 *frm++ = IEEE80211_ELEMID_RATES;
4723 nrates = rs->rs_nrates;
4724 if (nrates > IEEE80211_RATE_SIZE)
4725 nrates = IEEE80211_RATE_SIZE;
4727 memcpy(frm, rs->rs_rates, nrates);
4730 /* Add supported xrates IE. */
4731 if (rs->rs_nrates > IEEE80211_RATE_SIZE) {
4732 nrates = rs->rs_nrates - IEEE80211_RATE_SIZE;
4733 *frm++ = IEEE80211_ELEMID_XRATES;
4734 *frm++ = (uint8_t)nrates;
4735 memcpy(frm, rs->rs_rates + IEEE80211_RATE_SIZE, nrates);
4739 /* Set length of probe request. */
4740 tx->len = htole16(frm - (uint8_t *)wh);
4743 chan = (struct iwn_scan_chan *)frm;
4744 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
4746 if (ss->ss_nssid > 0)
4747 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
4748 chan->dsp_gain = 0x6e;
4749 if (IEEE80211_IS_CHAN_5GHZ(c) &&
4750 !(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
4751 chan->rf_gain = 0x3b;
4752 chan->active = htole16(24);
4753 chan->passive = htole16(110);
4754 chan->flags |= htole32(IWN_CHAN_ACTIVE);
4755 } else if (IEEE80211_IS_CHAN_5GHZ(c)) {
4756 chan->rf_gain = 0x3b;
4757 chan->active = htole16(24);
4758 if (sc->rxon.associd)
4759 chan->passive = htole16(78);
4761 chan->passive = htole16(110);
4762 hdr->crc_threshold = 0xffff;
4763 } else if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
4764 chan->rf_gain = 0x28;
4765 chan->active = htole16(36);
4766 chan->passive = htole16(120);
4767 chan->flags |= htole32(IWN_CHAN_ACTIVE);
4769 chan->rf_gain = 0x28;
4770 chan->active = htole16(36);
4771 if (sc->rxon.associd)
4772 chan->passive = htole16(88);
4774 chan->passive = htole16(120);
4775 hdr->crc_threshold = 0xffff;
4778 DPRINTF(sc, IWN_DEBUG_STATE,
4779 "%s: chan %u flags 0x%x rf_gain 0x%x "
4780 "dsp_gain 0x%x active 0x%x passive 0x%x\n", __func__,
4781 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
4782 chan->active, chan->passive);
4786 buflen = (uint8_t *)chan - buf;
4787 hdr->len = htole16(buflen);
4789 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
4791 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
4792 kfree(buf, M_DEVBUF);
4797 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
4799 const struct iwn_hal *hal = sc->sc_hal;
4800 struct ifnet *ifp = sc->sc_ifp;
4801 struct ieee80211com *ic = ifp->if_l2com;
4802 struct ieee80211_node *ni = vap->iv_bss;
4805 sc->calib.state = IWN_CALIB_STATE_INIT;
4807 /* Update adapter configuration. */
4808 IEEE80211_ADDR_COPY(sc->rxon.bssid, ni->ni_bssid);
4809 sc->rxon.chan = htole16(ieee80211_chan2ieee(ic, ni->ni_chan));
4810 sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
4811 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
4812 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4813 if (ic->ic_flags & IEEE80211_F_SHSLOT)
4814 sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);
4815 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
4816 sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);
4817 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
4818 sc->rxon.cck_mask = 0;
4819 sc->rxon.ofdm_mask = 0x15;
4820 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
4821 sc->rxon.cck_mask = 0x03;
4822 sc->rxon.ofdm_mask = 0;
4824 /* XXX assume 802.11b/g */
4825 sc->rxon.cck_mask = 0x0f;
4826 sc->rxon.ofdm_mask = 0x15;
4828 DPRINTF(sc, IWN_DEBUG_STATE,
4829 "%s: config chan %d mode %d flags 0x%x cck 0x%x ofdm 0x%x "
4830 "ht_single 0x%x ht_dual 0x%x rxchain 0x%x "
4831 "myaddr %6D wlap %6D bssid %6D associd %d filter 0x%x\n",
4833 le16toh(sc->rxon.chan), sc->rxon.mode, le32toh(sc->rxon.flags),
4834 sc->rxon.cck_mask, sc->rxon.ofdm_mask,
4835 sc->rxon.ht_single_mask, sc->rxon.ht_dual_mask,
4836 le16toh(sc->rxon.rxchain),
4837 sc->rxon.myaddr, ":", sc->rxon.wlap, ":", sc->rxon.bssid, ":",
4838 le16toh(sc->rxon.associd), le32toh(sc->rxon.filter));
4839 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 1);
4841 device_printf(sc->sc_dev,
4842 "%s: RXON command failed, error %d\n", __func__, error);
4846 /* Configuration has changed, set TX power accordingly. */
4847 error = hal->set_txpower(sc, ni->ni_chan, 1);
4849 device_printf(sc->sc_dev,
4850 "%s: could not set Tx power, error %d\n", __func__, error);
4854 * Reconfiguring RXON clears the firmware nodes table so we must
4855 * add the broadcast node again.
4857 error = iwn_add_broadcast_node(sc, 1);
4859 device_printf(sc->sc_dev,
4860 "%s: could not add broadcast node, error %d\n",
4868 * Configure the adapter for associated state.
4871 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
4873 #define MS(v,x) (((v) & x) >> x##_S)
4874 const struct iwn_hal *hal = sc->sc_hal;
4875 struct ifnet *ifp = sc->sc_ifp;
4876 struct ieee80211com *ic = ifp->if_l2com;
4877 struct ieee80211_node *ni = vap->iv_bss;
4878 struct iwn_node_info node;
4881 sc->calib.state = IWN_CALIB_STATE_INIT;
4883 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
4884 /* Link LED blinks while monitoring. */
4885 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
4888 error = iwn_set_timing(sc, ni);
4890 device_printf(sc->sc_dev,
4891 "%s: could not set timing, error %d\n", __func__, error);
4895 /* Update adapter configuration. */
4896 IEEE80211_ADDR_COPY(sc->rxon.bssid, ni->ni_bssid);
4897 sc->rxon.chan = htole16(ieee80211_chan2ieee(ic, ni->ni_chan));
4898 sc->rxon.associd = htole16(IEEE80211_AID(ni->ni_associd));
4899 /* Short preamble and slot time are negotiated when associating. */
4900 sc->rxon.flags &= ~htole32(IWN_RXON_SHPREAMBLE | IWN_RXON_SHSLOT);
4901 sc->rxon.flags |= htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
4902 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
4903 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4905 sc->rxon.flags &= ~htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4906 if (ic->ic_flags & IEEE80211_F_SHSLOT)
4907 sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);
4908 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
4909 sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);
4910 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
4911 sc->rxon.cck_mask = 0;
4912 sc->rxon.ofdm_mask = 0x15;
4913 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
4914 sc->rxon.cck_mask = 0x03;
4915 sc->rxon.ofdm_mask = 0;
4917 /* XXX assume 802.11b/g */
4918 sc->rxon.cck_mask = 0x0f;
4919 sc->rxon.ofdm_mask = 0x15;
4922 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
4923 sc->rxon.flags &= ~htole32(IWN_RXON_HT);
4924 if (IEEE80211_IS_CHAN_HT40U(ni->ni_chan))
4925 sc->rxon.flags |= htole32(IWN_RXON_HT40U);
4926 else if (IEEE80211_IS_CHAN_HT40D(ni->ni_chan))
4927 sc->rxon.flags |= htole32(IWN_RXON_HT40D);
4929 sc->rxon.flags |= htole32(IWN_RXON_HT20);
4930 sc->rxon.rxchain = htole16(
4931 IWN_RXCHAIN_VALID(3)
4932 | IWN_RXCHAIN_MIMO_COUNT(3)
4933 | IWN_RXCHAIN_IDLE_COUNT(1)
4934 | IWN_RXCHAIN_MIMO_FORCE);
4936 maxrxampdu = MS(ni->ni_htparam, IEEE80211_HTCAP_MAXRXAMPDU);
4937 ampdudensity = MS(ni->ni_htparam, IEEE80211_HTCAP_MPDUDENSITY);
4939 maxrxampdu = ampdudensity = 0;
4941 sc->rxon.filter |= htole32(IWN_FILTER_BSS);
4943 DPRINTF(sc, IWN_DEBUG_STATE,
4944 "%s: config chan %d mode %d flags 0x%x cck 0x%x ofdm 0x%x "
4945 "ht_single 0x%x ht_dual 0x%x rxchain 0x%x "
4946 "myaddr %6D wlap %6D bssid %6D associd %d filter 0x%x\n",
4948 le16toh(sc->rxon.chan), sc->rxon.mode, le32toh(sc->rxon.flags),
4949 sc->rxon.cck_mask, sc->rxon.ofdm_mask,
4950 sc->rxon.ht_single_mask, sc->rxon.ht_dual_mask,
4951 le16toh(sc->rxon.rxchain),
4952 sc->rxon.myaddr, ":", sc->rxon.wlap, ":", sc->rxon.bssid, ":",
4953 le16toh(sc->rxon.associd), le32toh(sc->rxon.filter));
4954 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 1);
4956 device_printf(sc->sc_dev,
4957 "%s: could not update configuration, error %d\n",
4962 /* Configuration has changed, set TX power accordingly. */
4963 error = hal->set_txpower(sc, ni->ni_chan, 1);
4965 device_printf(sc->sc_dev,
4966 "%s: could not set Tx power, error %d\n", __func__, error);
4971 memset(&node, 0, sizeof node);
4972 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
4973 node.id = IWN_ID_BSS;
4975 node.htflags = htole32(IWN_AMDPU_SIZE_FACTOR(3) |
4976 IWN_AMDPU_DENSITY(5)); /* 2us */
4978 DPRINTF(sc, IWN_DEBUG_STATE, "%s: add BSS node, id %d htflags 0x%x\n",
4979 __func__, node.id, le32toh(node.htflags));
4980 error = hal->add_node(sc, &node, 1);
4982 device_printf(sc->sc_dev, "could not add BSS node\n");
4985 DPRINTF(sc, IWN_DEBUG_STATE, "setting link quality for node %d\n",
4987 error = iwn_set_link_quality(sc, node.id, 1);
4989 device_printf(sc->sc_dev,
4990 "%s: could not setup MRR for node %d, error %d\n",
4991 __func__, node.id, error);
4995 error = iwn_init_sensitivity(sc);
4997 device_printf(sc->sc_dev,
4998 "%s: could not set sensitivity, error %d\n",
5003 /* Start periodic calibration timer. */
5004 sc->calib.state = IWN_CALIB_STATE_ASSOC;
5005 iwn_calib_reset(sc);
5007 /* Link LED always on while associated. */
5008 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
5016 * This function is called by upper layer when an ADDBA request is received
5017 * from another STA and before the ADDBA response is sent.
5020 iwn_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
5023 struct ieee80211_rx_ba *ba = &ni->ni_rx_ba[tid];
5024 struct iwn_softc *sc = ic->ic_softc;
5025 struct iwn_node *wn = (void *)ni;
5026 struct iwn_node_info node;
5028 memset(&node, 0, sizeof node);
5030 node.control = IWN_NODE_UPDATE;
5031 node.flags = IWN_FLAG_SET_ADDBA;
5032 node.addba_tid = tid;
5033 node.addba_ssn = htole16(ba->ba_winstart);
5034 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
5035 wn->id, tid, ba->ba_winstart));
5036 return sc->sc_hal->add_node(sc, &node, 1);
5040 * This function is called by upper layer on teardown of an HT-immediate
5041 * Block Ack agreement (eg. uppon receipt of a DELBA frame.)
5044 iwn_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
5047 struct iwn_softc *sc = ic->ic_softc;
5048 struct iwn_node *wn = (void *)ni;
5049 struct iwn_node_info node;
5051 memset(&node, 0, sizeof node);
5053 node.control = IWN_NODE_UPDATE;
5054 node.flags = IWN_FLAG_SET_DELBA;
5055 node.delba_tid = tid;
5056 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
5057 (void)sc->sc_hal->add_node(sc, &node, 1);
5061 * This function is called by upper layer when an ADDBA response is received
5065 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
5068 struct ieee80211_tx_ba *ba = &ni->ni_tx_ba[tid];
5069 struct iwn_softc *sc = ic->ic_softc;
5070 const struct iwn_hal *hal = sc->sc_hal;
5071 struct iwn_node *wn = (void *)ni;
5072 struct iwn_node_info node;
5075 /* Enable TX for the specified RA/TID. */
5076 wn->disable_tid &= ~(1 << tid);
5077 memset(&node, 0, sizeof node);
5079 node.control = IWN_NODE_UPDATE;
5080 node.flags = IWN_FLAG_SET_DISABLE_TID;
5081 node.disable_tid = htole16(wn->disable_tid);
5082 error = hal->add_node(sc, &node, 1);
5086 if ((error = iwn_nic_lock(sc)) != 0)
5088 hal->ampdu_tx_start(sc, ni, tid, ba->ba_winstart);
5094 iwn_ampdu_tx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
5097 struct ieee80211_tx_ba *ba = &ni->ni_tx_ba[tid];
5098 struct iwn_softc *sc = ic->ic_softc;
5101 error = iwn_nic_lock(sc);
5104 sc->sc_hal->ampdu_tx_stop(sc, tid, ba->ba_winstart);
5109 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
5110 uint8_t tid, uint16_t ssn)
5112 struct iwn_node *wn = (void *)ni;
5115 /* Stop TX scheduler while we're changing its configuration. */
5116 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5117 IWN4965_TXQ_STATUS_CHGACT);
5119 /* Assign RA/TID translation to the queue. */
5120 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
5123 /* Enable chain-building mode for the queue. */
5124 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
5126 /* Set starting sequence number from the ADDBA request. */
5127 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5128 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
5130 /* Set scheduler window size. */
5131 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
5133 /* Set scheduler frame limit. */
5134 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
5135 IWN_SCHED_LIMIT << 16);
5137 /* Enable interrupts for the queue. */
5138 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
5140 /* Mark the queue as active. */
5141 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5142 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
5143 iwn_tid2fifo[tid] << 1);
5147 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, uint8_t tid, uint16_t ssn)
5151 /* Stop TX scheduler while we're changing its configuration. */
5152 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5153 IWN4965_TXQ_STATUS_CHGACT);
5155 /* Set starting sequence number from the ADDBA request. */
5156 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5157 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
5159 /* Disable interrupts for the queue. */
5160 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
5162 /* Mark the queue as inactive. */
5163 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5164 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
5168 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
5169 uint8_t tid, uint16_t ssn)
5171 struct iwn_node *wn = (void *)ni;
5174 /* Stop TX scheduler while we're changing its configuration. */
5175 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5176 IWN5000_TXQ_STATUS_CHGACT);
5178 /* Assign RA/TID translation to the queue. */
5179 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
5182 /* Enable chain-building mode for the queue. */
5183 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
5185 /* Enable aggregation for the queue. */
5186 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
5188 /* Set starting sequence number from the ADDBA request. */
5189 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5190 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
5192 /* Set scheduler window size and frame limit. */
5193 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
5194 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
5196 /* Enable interrupts for the queue. */
5197 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
5199 /* Mark the queue as active. */
5200 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5201 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
5205 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, uint8_t tid, uint16_t ssn)
5209 /* Stop TX scheduler while we're changing its configuration. */
5210 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5211 IWN5000_TXQ_STATUS_CHGACT);
5213 /* Disable aggregation for the queue. */
5214 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
5216 /* Set starting sequence number from the ADDBA request. */
5217 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5218 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
5220 /* Disable interrupts for the queue. */
5221 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
5223 /* Mark the queue as inactive. */
5224 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5225 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
5230 * Query calibration tables from the initialization firmware. We do this
5231 * only once at first boot. Called from a process context.
5234 iwn5000_query_calibration(struct iwn_softc *sc)
5236 struct iwn5000_calib_config cmd;
5239 memset(&cmd, 0, sizeof cmd);
5240 cmd.ucode.once.enable = 0xffffffff;
5241 cmd.ucode.once.start = 0xffffffff;
5242 cmd.ucode.once.send = 0xffffffff;
5243 cmd.ucode.flags = 0xffffffff;
5244 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
5246 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
5250 /* Wait at most two seconds for calibration to complete. */
5251 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
5252 error = zsleep(sc, &wlan_global_serializer,
5253 0, "iwninit", 2 * hz);
5259 * Send calibration results to the runtime firmware. These results were
5260 * obtained on first boot from the initialization firmware.
5263 iwn5000_send_calibration(struct iwn_softc *sc)
5267 for (idx = 0; idx < 5; idx++) {
5268 if (sc->calibcmd[idx].buf == NULL)
5269 continue; /* No results available. */
5270 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5271 "send calibration result idx=%d len=%d\n",
5272 idx, sc->calibcmd[idx].len);
5273 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
5274 sc->calibcmd[idx].len, 0);
5276 device_printf(sc->sc_dev,
5277 "%s: could not send calibration result, error %d\n",
5286 iwn5000_send_wimax_coex(struct iwn_softc *sc)
5288 struct iwn5000_wimax_coex wimax;
5291 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
5292 /* Enable WiMAX coexistence for combo adapters. */
5294 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
5295 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
5296 IWN_WIMAX_COEX_STA_TABLE_VALID |
5297 IWN_WIMAX_COEX_ENABLE;
5298 memcpy(wimax.events, iwn6050_wimax_events,
5299 sizeof iwn6050_wimax_events);
5303 /* Disable WiMAX coexistence. */
5305 memset(wimax.events, 0, sizeof wimax.events);
5307 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
5309 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
5313 * This function is called after the runtime firmware notifies us of its
5314 * readiness (called in a process context.)
5317 iwn4965_post_alive(struct iwn_softc *sc)
5321 if ((error = iwn_nic_lock(sc)) != 0)
5324 /* Clear TX scheduler state in SRAM. */
5325 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
5326 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
5327 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
5329 /* Set physical address of TX scheduler rings (1KB aligned.) */
5330 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
5332 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
5334 /* Disable chain mode for all our 16 queues. */
5335 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
5337 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
5338 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
5339 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
5341 /* Set scheduler window size. */
5342 iwn_mem_write(sc, sc->sched_base +
5343 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
5344 /* Set scheduler frame limit. */
5345 iwn_mem_write(sc, sc->sched_base +
5346 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
5347 IWN_SCHED_LIMIT << 16);
5350 /* Enable interrupts for all our 16 queues. */
5351 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
5352 /* Identify TX FIFO rings (0-7). */
5353 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
5355 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
5356 for (qid = 0; qid < 7; qid++) {
5357 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
5358 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5359 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
5366 * This function is called after the initialization or runtime firmware
5367 * notifies us of its readiness (called in a process context.)
5370 iwn5000_post_alive(struct iwn_softc *sc)
5374 /* Switch to using ICT interrupt mode. */
5375 iwn5000_ict_reset(sc);
5377 error = iwn_nic_lock(sc);
5381 /* Clear TX scheduler state in SRAM. */
5382 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
5383 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
5384 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
5386 /* Set physical address of TX scheduler rings (1KB aligned.) */
5387 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
5389 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
5391 /* Enable chain mode for all queues, except command queue. */
5392 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
5393 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
5395 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
5396 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
5397 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
5399 iwn_mem_write(sc, sc->sched_base +
5400 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
5401 /* Set scheduler window size and frame limit. */
5402 iwn_mem_write(sc, sc->sched_base +
5403 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
5404 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
5407 /* Enable interrupts for all our 20 queues. */
5408 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
5409 /* Identify TX FIFO rings (0-7). */
5410 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
5412 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
5413 for (qid = 0; qid < 7; qid++) {
5414 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
5415 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5416 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
5420 /* Configure WiMAX coexistence for combo adapters. */
5421 error = iwn5000_send_wimax_coex(sc);
5423 device_printf(sc->sc_dev,
5424 "%s: could not configure WiMAX coexistence, error %d\n",
5428 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
5429 struct iwn5000_phy_calib_crystal cmd;
5431 /* Perform crystal calibration. */
5432 memset(&cmd, 0, sizeof cmd);
5433 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
5436 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
5437 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
5438 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5439 "sending crystal calibration %d, %d\n",
5440 cmd.cap_pin[0], cmd.cap_pin[1]);
5441 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
5443 device_printf(sc->sc_dev,
5444 "%s: crystal calibration failed, error %d\n",
5449 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
5450 /* Query calibration from the initialization firmware. */
5451 error = iwn5000_query_calibration(sc);
5453 device_printf(sc->sc_dev,
5454 "%s: could not query calibration, error %d\n",
5459 * We have the calibration results now, reboot with the
5460 * runtime firmware (call ourselves recursively!)
5463 error = iwn_hw_init(sc);
5465 /* Send calibration results to runtime firmware. */
5466 error = iwn5000_send_calibration(sc);
5472 * The firmware boot code is small and is intended to be copied directly into
5473 * the NIC internal memory (no DMA transfer.)
5476 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
5480 size /= sizeof (uint32_t);
5482 error = iwn_nic_lock(sc);
5486 /* Copy microcode image into NIC memory. */
5487 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
5488 (const uint32_t *)ucode, size);
5490 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
5491 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
5492 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
5494 /* Start boot load now. */
5495 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
5497 /* Wait for transfer to complete. */
5498 for (ntries = 0; ntries < 1000; ntries++) {
5499 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
5500 IWN_BSM_WR_CTRL_START))
5504 if (ntries == 1000) {
5505 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
5511 /* Enable boot after power up. */
5512 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
5519 iwn4965_load_firmware(struct iwn_softc *sc)
5521 struct iwn_fw_info *fw = &sc->fw;
5522 struct iwn_dma_info *dma = &sc->fw_dma;
5525 /* Copy initialization sections into pre-allocated DMA-safe memory. */
5526 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
5527 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5528 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
5529 fw->init.text, fw->init.textsz);
5530 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5532 /* Tell adapter where to find initialization sections. */
5533 error = iwn_nic_lock(sc);
5536 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
5537 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
5538 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
5539 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
5540 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
5543 /* Load firmware boot code. */
5544 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
5546 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
5550 /* Now press "execute". */
5551 IWN_WRITE(sc, IWN_RESET, 0);
5553 /* Wait at most one second for first alive notification. */
5554 error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz);
5556 device_printf(sc->sc_dev,
5557 "%s: timeout waiting for adapter to initialize, error %d\n",
5562 /* Retrieve current temperature for initial TX power calibration. */
5563 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
5564 sc->temp = iwn4965_get_temperature(sc);
5566 /* Copy runtime sections into pre-allocated DMA-safe memory. */
5567 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
5568 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5569 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
5570 fw->main.text, fw->main.textsz);
5571 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5573 /* Tell adapter where to find runtime sections. */
5574 error = iwn_nic_lock(sc);
5578 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
5579 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
5580 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
5581 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
5582 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
5583 IWN_FW_UPDATED | fw->main.textsz);
5590 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
5591 const uint8_t *section, int size)
5593 struct iwn_dma_info *dma = &sc->fw_dma;
5596 /* Copy firmware section into pre-allocated DMA-safe memory. */
5597 memcpy(dma->vaddr, section, size);
5598 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5600 error = iwn_nic_lock(sc);
5604 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
5605 IWN_FH_TX_CONFIG_DMA_PAUSE);
5607 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
5608 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
5609 IWN_LOADDR(dma->paddr));
5610 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
5611 IWN_HIADDR(dma->paddr) << 28 | size);
5612 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
5613 IWN_FH_TXBUF_STATUS_TBNUM(1) |
5614 IWN_FH_TXBUF_STATUS_TBIDX(1) |
5615 IWN_FH_TXBUF_STATUS_TFBD_VALID);
5617 /* Kick Flow Handler to start DMA transfer. */
5618 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
5619 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
5624 * Wait at most five seconds for FH DMA transfer to complete.
5626 error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz);
5631 iwn5000_load_firmware(struct iwn_softc *sc)
5633 struct iwn_fw_part *fw;
5636 /* Load the initialization firmware on first boot only. */
5637 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
5638 &sc->fw.main : &sc->fw.init;
5640 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
5641 fw->text, fw->textsz);
5643 device_printf(sc->sc_dev,
5644 "%s: could not load firmware %s section, error %d\n",
5645 __func__, ".text", error);
5648 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
5649 fw->data, fw->datasz);
5651 device_printf(sc->sc_dev,
5652 "%s: could not load firmware %s section, error %d\n",
5653 __func__, ".data", error);
5657 /* Now press "execute". */
5658 IWN_WRITE(sc, IWN_RESET, 0);
5663 iwn_read_firmware(struct iwn_softc *sc)
5665 const struct iwn_hal *hal = sc->sc_hal;
5666 struct iwn_fw_info *fw = &sc->fw;
5667 const uint32_t *ptr;
5670 int wlan_serialized;
5673 * Read firmware image from filesystem. The firmware can block
5674 * in a taskq and deadlock against our serializer so unlock
5677 wlan_serialized = IS_SERIALIZED(&wlan_global_serializer);
5678 if (wlan_serialized)
5679 wlan_serialize_exit();
5680 sc->fw_fp = firmware_get(sc->fwname);
5681 if (wlan_serialized)
5682 wlan_serialize_enter();
5683 if (sc->fw_fp == NULL) {
5684 device_printf(sc->sc_dev,
5685 "%s: could not load firmare image \"%s\"\n", __func__,
5690 size = sc->fw_fp->datasize;
5692 device_printf(sc->sc_dev,
5693 "%s: truncated firmware header: %zu bytes\n",
5698 /* Process firmware header. */
5699 ptr = (const uint32_t *)sc->fw_fp->data;
5700 rev = le32toh(*ptr++);
5701 /* Check firmware API version. */
5702 if (IWN_FW_API(rev) <= 1) {
5703 device_printf(sc->sc_dev,
5704 "%s: bad firmware, need API version >=2\n", __func__);
5707 if (IWN_FW_API(rev) >= 3) {
5708 /* Skip build number (version 2 header). */
5712 fw->main.textsz = le32toh(*ptr++);
5713 fw->main.datasz = le32toh(*ptr++);
5714 fw->init.textsz = le32toh(*ptr++);
5715 fw->init.datasz = le32toh(*ptr++);
5716 fw->boot.textsz = le32toh(*ptr++);
5719 /* Sanity-check firmware header. */
5720 if (fw->main.textsz > hal->fw_text_maxsz ||
5721 fw->main.datasz > hal->fw_data_maxsz ||
5722 fw->init.textsz > hal->fw_text_maxsz ||
5723 fw->init.datasz > hal->fw_data_maxsz ||
5724 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
5725 (fw->boot.textsz & 3) != 0) {
5726 device_printf(sc->sc_dev, "%s: invalid firmware header\n",
5731 /* Check that all firmware sections fit. */
5732 if (fw->main.textsz + fw->main.datasz + fw->init.textsz +
5733 fw->init.datasz + fw->boot.textsz > size) {
5734 device_printf(sc->sc_dev,
5735 "%s: firmware file too short: %zu bytes\n",
5740 /* Get pointers to firmware sections. */
5741 fw->main.text = (const uint8_t *)ptr;
5742 fw->main.data = fw->main.text + fw->main.textsz;
5743 fw->init.text = fw->main.data + fw->main.datasz;
5744 fw->init.data = fw->init.text + fw->init.textsz;
5745 fw->boot.text = fw->init.data + fw->init.datasz;
5751 iwn_clock_wait(struct iwn_softc *sc)
5755 /* Set "initialization complete" bit. */
5756 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
5758 /* Wait for clock stabilization. */
5759 for (ntries = 0; ntries < 2500; ntries++) {
5760 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
5764 device_printf(sc->sc_dev,
5765 "%s: timeout waiting for clock stabilization\n", __func__);
5770 iwn_apm_init(struct iwn_softc *sc)
5775 /* Disable L0s exit timer (NMI bug workaround.) */
5776 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
5777 /* Don't wait for ICH L0s (ICH bug workaround.) */
5778 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
5780 /* Set FH wait threshold to max (HW bug under stress workaround.) */
5781 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
5783 /* Enable HAP INTA to move adapter from L1a to L0s. */
5784 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
5786 /* Retrieve PCIe Active State Power Management (ASPM). */
5787 tmp = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
5788 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
5789 if (tmp & 0x02) /* L1 Entry enabled. */
5790 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
5792 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
5794 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
5795 sc->hw_type != IWN_HW_REV_TYPE_6000 &&
5796 sc->hw_type != IWN_HW_REV_TYPE_6050)
5797 IWN_SETBITS(sc, IWN_ANA_PLL, IWN_ANA_PLL_INIT);
5799 /* Wait for clock stabilization before accessing prph. */
5800 error = iwn_clock_wait(sc);
5804 error = iwn_nic_lock(sc);
5808 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
5809 /* Enable DMA and BSM (Bootstrap State Machine.) */
5810 iwn_prph_write(sc, IWN_APMG_CLK_EN,
5811 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
5812 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
5815 iwn_prph_write(sc, IWN_APMG_CLK_EN,
5816 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
5820 /* Disable L1-Active. */
5821 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
5828 iwn_apm_stop_master(struct iwn_softc *sc)
5832 /* Stop busmaster DMA activity. */
5833 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
5834 for (ntries = 0; ntries < 100; ntries++) {
5835 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
5839 device_printf(sc->sc_dev, "%s: timeout waiting for master\n",
5844 iwn_apm_stop(struct iwn_softc *sc)
5846 iwn_apm_stop_master(sc);
5848 /* Reset the entire device. */
5849 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
5851 /* Clear "initialization complete" bit. */
5852 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
5856 iwn4965_nic_config(struct iwn_softc *sc)
5858 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
5860 * I don't believe this to be correct but this is what the
5861 * vendor driver is doing. Probably the bits should not be
5862 * shifted in IWN_RFCFG_*.
5864 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5865 IWN_RFCFG_TYPE(sc->rfcfg) |
5866 IWN_RFCFG_STEP(sc->rfcfg) |
5867 IWN_RFCFG_DASH(sc->rfcfg));
5869 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5870 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
5875 iwn5000_nic_config(struct iwn_softc *sc)
5880 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
5881 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5882 IWN_RFCFG_TYPE(sc->rfcfg) |
5883 IWN_RFCFG_STEP(sc->rfcfg) |
5884 IWN_RFCFG_DASH(sc->rfcfg));
5886 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5887 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
5889 error = iwn_nic_lock(sc);
5892 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
5894 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
5896 * Select first Switching Voltage Regulator (1.32V) to
5897 * solve a stability issue related to noisy DC2DC line
5898 * in the silicon of 1000 Series.
5900 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
5901 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
5902 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
5903 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
5907 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
5908 /* Use internal power amplifier only. */
5909 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
5911 if (sc->hw_type == IWN_HW_REV_TYPE_6050 && sc->calib_ver >= 6) {
5912 /* Indicate that ROM calibration version is >=6. */
5913 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
5919 * Take NIC ownership over Intel Active Management Technology (AMT).
5922 iwn_hw_prepare(struct iwn_softc *sc)
5926 /* Check if hardware is ready. */
5927 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
5928 for (ntries = 0; ntries < 5; ntries++) {
5929 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
5930 IWN_HW_IF_CONFIG_NIC_READY)
5935 /* Hardware not ready, force into ready state. */
5936 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
5937 for (ntries = 0; ntries < 15000; ntries++) {
5938 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
5939 IWN_HW_IF_CONFIG_PREPARE_DONE))
5943 if (ntries == 15000)
5946 /* Hardware should be ready now. */
5947 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
5948 for (ntries = 0; ntries < 5; ntries++) {
5949 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
5950 IWN_HW_IF_CONFIG_NIC_READY)
5958 iwn_hw_init(struct iwn_softc *sc)
5960 const struct iwn_hal *hal = sc->sc_hal;
5961 int error, chnl, qid;
5963 /* Clear pending interrupts. */
5964 IWN_WRITE(sc, IWN_INT, 0xffffffff);
5966 error = iwn_apm_init(sc);
5968 device_printf(sc->sc_dev,
5969 "%s: could not power ON adapter, error %d\n",
5974 /* Select VMAIN power source. */
5975 error = iwn_nic_lock(sc);
5978 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
5981 /* Perform adapter-specific initialization. */
5982 error = hal->nic_config(sc);
5986 /* Initialize RX ring. */
5987 error = iwn_nic_lock(sc);
5990 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
5991 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
5992 /* Set physical address of RX ring (256-byte aligned.) */
5993 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
5994 /* Set physical address of RX status (16-byte aligned.) */
5995 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
5997 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
5998 IWN_FH_RX_CONFIG_ENA |
5999 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
6000 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
6001 IWN_FH_RX_CONFIG_SINGLE_FRAME |
6002 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
6003 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
6005 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
6007 error = iwn_nic_lock(sc);
6011 /* Initialize TX scheduler. */
6012 iwn_prph_write(sc, hal->sched_txfact_addr, 0);
6014 /* Set physical address of "keep warm" page (16-byte aligned.) */
6015 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
6017 /* Initialize TX rings. */
6018 for (qid = 0; qid < hal->ntxqs; qid++) {
6019 struct iwn_tx_ring *txq = &sc->txq[qid];
6021 /* Set physical address of TX ring (256-byte aligned.) */
6022 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
6023 txq->desc_dma.paddr >> 8);
6027 /* Enable DMA channels. */
6028 for (chnl = 0; chnl < hal->ndmachnls; chnl++) {
6029 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
6030 IWN_FH_TX_CONFIG_DMA_ENA |
6031 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
6034 /* Clear "radio off" and "commands blocked" bits. */
6035 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
6036 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
6038 /* Clear pending interrupts. */
6039 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6040 /* Enable interrupt coalescing. */
6041 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
6042 /* Enable interrupts. */
6043 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
6045 /* _Really_ make sure "radio off" bit is cleared! */
6046 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
6047 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
6049 error = hal->load_firmware(sc);
6051 device_printf(sc->sc_dev,
6052 "%s: could not load firmware, error %d\n",
6056 /* Wait at most one second for firmware alive notification. */
6057 error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz);
6059 device_printf(sc->sc_dev,
6060 "%s: timeout waiting for adapter to initialize, error %d\n",
6064 /* Do post-firmware initialization. */
6065 error = hal->post_alive(sc);
6071 iwn_hw_stop(struct iwn_softc *sc)
6073 const struct iwn_hal *hal = sc->sc_hal;
6075 int chnl, qid, ntries;
6077 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
6079 /* Disable interrupts. */
6080 IWN_WRITE(sc, IWN_INT_MASK, 0);
6081 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6082 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
6083 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
6085 /* Make sure we no longer hold the NIC lock. */
6088 /* Stop TX scheduler. */
6089 iwn_prph_write(sc, hal->sched_txfact_addr, 0);
6091 /* Stop all DMA channels. */
6092 if (iwn_nic_lock(sc) == 0) {
6093 for (chnl = 0; chnl < hal->ndmachnls; chnl++) {
6094 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
6095 for (ntries = 0; ntries < 200; ntries++) {
6096 tmp = IWN_READ(sc, IWN_FH_TX_STATUS);
6097 if ((tmp & IWN_FH_TX_STATUS_IDLE(chnl)) ==
6098 IWN_FH_TX_STATUS_IDLE(chnl))
6107 iwn_reset_rx_ring(sc, &sc->rxq);
6109 /* Reset all TX rings. */
6110 for (qid = 0; qid < hal->ntxqs; qid++)
6111 iwn_reset_tx_ring(sc, &sc->txq[qid]);
6113 if (iwn_nic_lock(sc) == 0) {
6114 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
6115 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
6120 /* Power OFF adapter. */
6125 iwn_init_locked(struct iwn_softc *sc)
6127 struct ifnet *ifp = sc->sc_ifp;
6129 int wlan_serializer_needed;
6132 * The kernel generic firmware loader can wind up calling this
6133 * without the wlan serializer, while the wlan subsystem will
6134 * call it with the serializer.
6136 * Make sure we hold the serializer or we will have timing issues
6137 * with the wlan subsystem.
6139 wlan_serializer_needed = !IS_SERIALIZED(&wlan_global_serializer);
6140 if (wlan_serializer_needed)
6141 wlan_serialize_enter();
6143 error = iwn_hw_prepare(sc);
6145 device_printf(sc->sc_dev, "%s: hardware not ready, eror %d\n",
6150 /* Initialize interrupt mask to default value. */
6151 sc->int_mask = IWN_INT_MASK_DEF;
6152 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
6154 /* Check that the radio is not disabled by hardware switch. */
6155 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
6156 device_printf(sc->sc_dev,
6157 "radio is disabled by hardware switch\n");
6159 /* Enable interrupts to get RF toggle notifications. */
6160 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6161 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
6162 if (wlan_serializer_needed)
6163 wlan_serialize_exit();
6167 /* Read firmware images from the filesystem. */
6168 error = iwn_read_firmware(sc);
6170 device_printf(sc->sc_dev,
6171 "%s: could not read firmware, error %d\n",
6176 /* Initialize hardware and upload firmware. */
6177 error = iwn_hw_init(sc);
6178 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
6181 device_printf(sc->sc_dev,
6182 "%s: could not initialize hardware, error %d\n",
6187 /* Configure adapter now that it is ready. */
6188 error = iwn_config(sc);
6190 device_printf(sc->sc_dev,
6191 "%s: could not configure device, error %d\n",
6196 ifp->if_flags &= ~IFF_OACTIVE;
6197 ifp->if_flags |= IFF_RUNNING;
6198 if (wlan_serializer_needed)
6199 wlan_serialize_exit();
6203 iwn_stop_locked(sc);
6204 if (wlan_serializer_needed)
6205 wlan_serialize_exit();
6211 struct iwn_softc *sc = arg;
6212 struct ifnet *ifp = sc->sc_ifp;
6213 struct ieee80211com *ic = ifp->if_l2com;
6215 wlan_serialize_enter();
6216 iwn_init_locked(sc);
6217 wlan_serialize_exit();
6219 if (ifp->if_flags & IFF_RUNNING)
6220 ieee80211_start_all(ic);
6224 iwn_stop_locked(struct iwn_softc *sc)
6226 struct ifnet *ifp = sc->sc_ifp;
6228 sc->sc_tx_timer = 0;
6229 callout_stop(&sc->sc_timer_to);
6230 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
6232 /* Power OFF hardware. */
6237 iwn_stop(struct iwn_softc *sc)
6239 wlan_serialize_enter();
6240 iwn_stop_locked(sc);
6241 wlan_serialize_exit();
6245 * Callback from net80211 to start a scan.
6248 iwn_scan_start(struct ieee80211com *ic)
6250 struct ifnet *ifp = ic->ic_ifp;
6251 struct iwn_softc *sc = ifp->if_softc;
6253 /* make the link LED blink while we're scanning */
6254 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
6258 * Callback from net80211 to terminate a scan.
6261 iwn_scan_end(struct ieee80211com *ic)
6263 struct ifnet *ifp = ic->ic_ifp;
6264 struct iwn_softc *sc = ifp->if_softc;
6265 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6267 if (vap->iv_state == IEEE80211_S_RUN) {
6268 /* Set link LED to ON status if we are associated */
6269 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
6274 * Callback from net80211 to force a channel change.
6277 iwn_set_channel(struct ieee80211com *ic)
6279 const struct ieee80211_channel *c = ic->ic_curchan;
6280 struct ifnet *ifp = ic->ic_ifp;
6281 struct iwn_softc *sc = ifp->if_softc;
6283 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
6284 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
6285 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
6286 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
6290 * Callback from net80211 to start scanning of the current channel.
6293 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
6295 struct ieee80211vap *vap = ss->ss_vap;
6296 struct iwn_softc *sc = vap->iv_ic->ic_ifp->if_softc;
6299 error = iwn_scan(sc);
6301 ieee80211_cancel_scan(vap);
6305 * Callback from net80211 to handle the minimum dwell time being met.
6306 * The intent is to terminate the scan but we just let the firmware
6307 * notify us when it's finished as we have no safe way to abort it.
6310 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
6312 /* NB: don't try to abort scan; wait for firmware to finish */
6315 static struct iwn_eeprom_chan *
6316 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
6320 for (j = 0; j < 7; j++) {
6321 for (i = 0; i < iwn_bands[j].nchan; i++) {
6322 if (iwn_bands[j].chan[i] == c->ic_ieee)
6323 return &sc->eeprom_channels[j][i];
6331 * Enforce flags read from EEPROM.
6334 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
6335 int nchan, struct ieee80211_channel chans[])
6337 struct iwn_softc *sc = ic->ic_ifp->if_softc;
6340 for (i = 0; i < nchan; i++) {
6341 struct ieee80211_channel *c = &chans[i];
6342 struct iwn_eeprom_chan *channel;
6344 channel = iwn_find_eeprom_channel(sc, c);
6345 if (channel == NULL) {
6346 if_printf(ic->ic_ifp,
6347 "%s: invalid channel %u freq %u/0x%x\n",
6348 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
6351 c->ic_flags |= iwn_eeprom_channel_flags(channel);
6358 iwn_hw_reset_task(void *arg0, int pending)
6360 struct iwn_softc *sc = arg0;
6362 struct ieee80211com *ic;
6364 wlan_serialize_enter();
6367 iwn_stop_locked(sc);
6368 iwn_init_locked(sc);
6369 ieee80211_notify_radio(ic, 1);
6370 wlan_serialize_exit();
6374 iwn_radio_on_task(void *arg0, int pending)
6376 struct iwn_softc *sc = arg0;
6378 struct ieee80211com *ic;
6379 struct ieee80211vap *vap;
6381 wlan_serialize_enter();
6384 vap = TAILQ_FIRST(&ic->ic_vaps);
6386 iwn_init_locked(sc);
6387 ieee80211_init(vap);
6389 wlan_serialize_exit();
6393 iwn_radio_off_task(void *arg0, int pending)
6395 struct iwn_softc *sc = arg0;
6397 struct ieee80211com *ic;
6398 struct ieee80211vap *vap;
6400 wlan_serialize_enter();
6403 vap = TAILQ_FIRST(&ic->ic_vaps);
6404 iwn_stop_locked(sc);
6406 ieee80211_stop(vap);
6408 /* Enable interrupts to get RF toggle notification. */
6409 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6410 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
6411 wlan_serialize_exit();
6415 iwn_sysctlattach(struct iwn_softc *sc)
6417 struct sysctl_ctx_list *ctx;
6418 struct sysctl_oid *tree;
6420 ctx = &sc->sc_sysctl_ctx;
6421 tree = sc->sc_sysctl_tree;
6423 device_printf(sc->sc_dev, "can't add sysctl node\n");
6429 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6430 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "control debugging printfs");
6435 iwn_pci_shutdown(device_t dev)
6437 struct iwn_softc *sc = device_get_softc(dev);
6439 wlan_serialize_enter();
6440 iwn_stop_locked(sc);
6441 wlan_serialize_exit();
6447 iwn_pci_suspend(device_t dev)
6449 struct iwn_softc *sc = device_get_softc(dev);
6450 struct ifnet *ifp = sc->sc_ifp;
6451 struct ieee80211com *ic = ifp->if_l2com;
6452 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6454 wlan_serialize_enter();
6455 iwn_stop_locked(sc);
6457 ieee80211_stop(vap);
6458 wlan_serialize_exit();
6464 iwn_pci_resume(device_t dev)
6466 struct iwn_softc *sc = device_get_softc(dev);
6468 struct ieee80211com *ic;
6469 struct ieee80211vap *vap;
6471 wlan_serialize_enter();
6474 vap = TAILQ_FIRST(&ic->ic_vaps);
6475 /* Clear device-specific "PCI retry timeout" register (41h). */
6476 pci_write_config(dev, 0x41, 0, 1);
6478 if (ifp->if_flags & IFF_UP) {
6479 iwn_init_locked(sc);
6481 ieee80211_init(vap);
6482 if (ifp->if_flags & IFF_RUNNING)
6483 iwn_start_locked(ifp);
6485 wlan_serialize_exit();
6492 iwn_intr_str(uint8_t cmd)
6496 case IWN_UC_READY: return "UC_READY";
6497 case IWN_ADD_NODE_DONE: return "ADD_NODE_DONE";
6498 case IWN_TX_DONE: return "TX_DONE";
6499 case IWN_START_SCAN: return "START_SCAN";
6500 case IWN_STOP_SCAN: return "STOP_SCAN";
6501 case IWN_RX_STATISTICS: return "RX_STATS";
6502 case IWN_BEACON_STATISTICS: return "BEACON_STATS";
6503 case IWN_STATE_CHANGED: return "STATE_CHANGED";
6504 case IWN_BEACON_MISSED: return "BEACON_MISSED";
6505 case IWN_RX_PHY: return "RX_PHY";
6506 case IWN_MPDU_RX_DONE: return "MPDU_RX_DONE";
6507 case IWN_RX_DONE: return "RX_DONE";
6509 /* Command Notifications */
6510 case IWN_CMD_RXON: return "IWN_CMD_RXON";
6511 case IWN_CMD_RXON_ASSOC: return "IWN_CMD_RXON_ASSOC";
6512 case IWN_CMD_EDCA_PARAMS: return "IWN_CMD_EDCA_PARAMS";
6513 case IWN_CMD_TIMING: return "IWN_CMD_TIMING";
6514 case IWN_CMD_LINK_QUALITY: return "IWN_CMD_LINK_QUALITY";
6515 case IWN_CMD_SET_LED: return "IWN_CMD_SET_LED";
6516 case IWN5000_CMD_WIMAX_COEX: return "IWN5000_CMD_WIMAX_COEX";
6517 case IWN5000_CMD_CALIB_CONFIG: return "IWN5000_CMD_CALIB_CONFIG";
6518 case IWN5000_CMD_CALIB_RESULT: return "IWN5000_CMD_CALIB_RESULT";
6519 case IWN5000_CMD_CALIB_COMPLETE: return "IWN5000_CMD_CALIB_COMPLETE";
6520 case IWN_CMD_SET_POWER_MODE: return "IWN_CMD_SET_POWER_MODE";
6521 case IWN_CMD_SCAN: return "IWN_CMD_SCAN";
6522 case IWN_CMD_SCAN_RESULTS: return "IWN_CMD_SCAN_RESULTS";
6523 case IWN_CMD_TXPOWER: return "IWN_CMD_TXPOWER";
6524 case IWN_CMD_TXPOWER_DBM: return "IWN_CMD_TXPOWER_DBM";
6525 case IWN5000_CMD_TX_ANT_CONFIG: return "IWN5000_CMD_TX_ANT_CONFIG";
6526 case IWN_CMD_BT_COEX: return "IWN_CMD_BT_COEX";
6527 case IWN_CMD_SET_CRITICAL_TEMP: return "IWN_CMD_SET_CRITICAL_TEMP";
6528 case IWN_CMD_SET_SENSITIVITY: return "IWN_CMD_SET_SENSITIVITY";
6529 case IWN_CMD_PHY_CALIB: return "IWN_CMD_PHY_CALIB";
6531 return "UNKNOWN INTR NOTIF/CMD";
6533 #endif /* IWN_DEBUG */
6535 static device_method_t iwn_methods[] = {
6536 /* Device interface */
6537 DEVMETHOD(device_probe, iwn_pci_probe),
6538 DEVMETHOD(device_attach, iwn_pci_attach),
6539 DEVMETHOD(device_detach, iwn_pci_detach),
6540 DEVMETHOD(device_shutdown, iwn_pci_shutdown),
6541 DEVMETHOD(device_suspend, iwn_pci_suspend),
6542 DEVMETHOD(device_resume, iwn_pci_resume),
6546 static driver_t iwn_driver = {
6549 sizeof (struct iwn_softc)
6551 static devclass_t iwn_devclass;
6553 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
6554 MODULE_DEPEND(iwn, pci, 1, 1, 1);
6555 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
6556 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
6557 MODULE_DEPEND(iwn, wlan_amrr, 1, 1, 1);