2 * Copyright (c) 2006 Bernd Walter. All rights reserved.
3 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 * Portions of this software may have been developed with reference to
26 * the SD Simplified Specification. The following disclaimer may apply:
28 * The following conditions apply to the release of the simplified
29 * specification ("Simplified Specification") by the SD Card Association and
30 * the SD Group. The Simplified Specification is a subset of the complete SD
31 * Specification which is owned by the SD Card Association and the SD
32 * Group. This Simplified Specification is provided on a non-confidential
33 * basis subject to the disclaimers below. Any implementation of the
34 * Simplified Specification may require a license from the SD Card
35 * Association, SD Group, SD-3C LLC or other third parties.
39 * The information contained in the Simplified Specification is presented only
40 * as a standard specification for SD Cards and SD Host/Ancillary products and
41 * is provided "AS-IS" without any representations or warranties of any
42 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
43 * Card Association for any damages, any infringements of patents or other
44 * right of the SD Group, SD-3C LLC, the SD Card Association or any third
45 * parties, which may result from its use. No license is granted by
46 * implication, estoppel or otherwise under any patent or other rights of the
47 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
48 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
49 * or the SD Card Association to disclose or distribute any technical
50 * information, know-how or other confidential information to any third party.
52 * $FreeBSD: src/sys/dev/mmc/mmc.c,v 1.38 2009/08/20 19:17:53 jhb Exp $
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/kernel.h>
58 #include <sys/malloc.h>
60 #include <sys/module.h>
61 #include <sys/spinlock.h>
63 #include <sys/endian.h>
64 #include <sys/sysctl.h>
66 #include <bus/mmc/mmcreg.h>
67 #include <bus/mmc/mmcbrvar.h>
68 #include <bus/mmc/mmcvar.h>
70 #include "mmcbus_if.h"
75 struct intr_config_hook config_intrhook;
84 uint32_t raw_cid[4]; /* Raw bits of the CID */
85 uint32_t raw_csd[4]; /* Raw bits of the CSD */
86 uint32_t raw_scr[2]; /* Raw bits of the SCR */
87 uint8_t raw_ext_csd[512]; /* Raw bits of the EXT_CSD */
88 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */
90 enum mmc_card_mode mode;
91 struct mmc_cid cid; /* cid decoded */
92 struct mmc_csd csd; /* csd decoded */
93 struct mmc_scr scr; /* scr decoded */
94 struct mmc_sd_status sd_status; /* SD_STATUS decoded */
95 u_char read_only; /* True when the device is read-only */
96 u_char bus_width; /* Bus width to use */
97 u_char timing; /* Bus timing support */
98 u_char high_cap; /* High Capacity card (block addressed) */
99 uint32_t sec_count; /* Card capacity in 512byte blocks */
100 uint32_t tran_speed; /* Max speed in normal mode */
101 uint32_t hs_tran_speed; /* Max speed in high speed mode */
102 uint32_t erase_sector; /* Card native erase sector size */
105 #define CMD_RETRIES 3
107 SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver");
109 static int mmc_debug;
110 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RW, &mmc_debug, 0, "Debug level");
112 /* bus entry points */
113 static int mmc_probe(device_t dev);
114 static int mmc_attach(device_t dev);
115 static int mmc_detach(device_t dev);
116 static int mmc_suspend(device_t dev);
117 static int mmc_resume(device_t dev);
119 #define MMC_LOCK(_sc) lockmgr(&(_sc)->sc_lock, LK_EXCLUSIVE)
120 #define MMC_UNLOCK(_sc) lockmgr(&(_sc)->sc_lock, LK_RELEASE)
121 #define MMC_LOCK_INIT(_sc) lockinit(&(_sc)->sc_lock, "mmc", 0, LK_CANRECURSE)
122 #define MMC_LOCK_DESTROY(_sc) lockuninit(&(_sc)->sc_lock);
123 #define MMC_ASSERT_LOCKED(_sc) KKASSERT(lockstatus(&(_sc)->sc_lock, curthread) != 0);
124 #define MMC_ASSERT_UNLOCKED(_sc) KKASSERT(lockstatus(&(_sc)->sc_lock, curthread) == 0);
126 static int mmc_calculate_clock(struct mmc_softc *sc);
127 static void mmc_delayed_attach(void *);
128 static void mmc_power_down(struct mmc_softc *sc);
129 static int mmc_wait_for_cmd(struct mmc_softc *sc, struct mmc_command *cmd,
131 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
132 uint32_t arg, uint32_t flags, uint32_t *resp, int retries);
133 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca);
134 static int mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width);
135 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr);
136 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr);
137 static int mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd);
138 static void mmc_scan(struct mmc_softc *sc);
139 static int mmc_delete_cards(struct mmc_softc *sc);
144 DELAY(1000 * ms); /* XXX BAD */
148 mmc_probe(device_t dev)
151 device_set_desc(dev, "MMC/SD bus");
156 mmc_attach(device_t dev)
158 struct mmc_softc *sc;
160 sc = device_get_softc(dev);
164 /* We'll probe and attach our children later, but before / mount */
165 sc->config_intrhook.ich_func = mmc_delayed_attach;
166 sc->config_intrhook.ich_arg = sc;
167 sc->config_intrhook.ich_desc = "mmc";
168 if (config_intrhook_establish(&sc->config_intrhook) != 0)
169 device_printf(dev, "config_intrhook_establish failed\n");
174 mmc_detach(device_t dev)
176 struct mmc_softc *sc = device_get_softc(dev);
179 if ((err = mmc_delete_cards(sc)) != 0)
182 MMC_LOCK_DESTROY(sc);
188 mmc_suspend(device_t dev)
190 struct mmc_softc *sc = device_get_softc(dev);
193 err = bus_generic_suspend(dev);
201 mmc_resume(device_t dev)
203 struct mmc_softc *sc = device_get_softc(dev);
206 return (bus_generic_resume(dev));
210 mmc_acquire_bus(device_t busdev, device_t dev)
212 struct mmc_softc *sc;
213 struct mmc_ivars *ivar;
217 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev);
220 sc = device_get_softc(busdev);
223 panic("mmc: host bridge didn't seralize us.");
229 * Keep track of the last rca that we've selected. If
230 * we're asked to do it again, don't. We never
231 * unselect unless the bus code itself wants the mmc
232 * bus, and constantly reselecting causes problems.
234 rca = mmc_get_rca(dev);
235 if (sc->last_rca != rca) {
236 mmc_select_card(sc, rca);
238 /* Prepare bus width for the new card. */
239 ivar = device_get_ivars(dev);
240 if (bootverbose || mmc_debug) {
241 device_printf(busdev,
242 "setting bus width to %d bits\n",
243 (ivar->bus_width == bus_width_4) ? 4 :
244 (ivar->bus_width == bus_width_8) ? 8 : 1);
246 mmc_set_card_bus_width(sc, rca, ivar->bus_width);
247 mmcbr_set_bus_width(busdev, ivar->bus_width);
248 mmcbr_update_ios(busdev);
252 * If there's a card selected, stand down.
254 if (sc->last_rca != 0) {
255 mmc_select_card(sc, 0);
264 mmc_release_bus(device_t busdev, device_t dev)
266 struct mmc_softc *sc;
269 sc = device_get_softc(busdev);
273 panic("mmc: releasing unowned bus.");
274 if (sc->owner != dev)
275 panic("mmc: you don't own the bus. game over.");
277 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev);
287 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr)
290 return (ocr & MMC_OCR_VOLTAGE);
294 mmc_highest_voltage(uint32_t ocr)
298 for (i = 30; i >= 0; i--)
305 mmc_wakeup(struct mmc_request *req)
307 struct mmc_softc *sc;
309 sc = (struct mmc_softc *)req->done_data;
311 req->flags |= MMC_REQ_DONE;
317 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req)
320 req->done = mmc_wakeup;
323 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x",
324 req->cmd->opcode, req->cmd->arg, req->cmd->flags);
325 if (req->cmd->data) {
326 kprintf(" data %d\n", (int)req->cmd->data->len);
330 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req);
332 while ((req->flags & MMC_REQ_DONE) == 0)
333 lksleep(req, &sc->sc_lock, 0, "mmcreq", 0);
335 if (mmc_debug > 2 || (mmc_debug > 1 && req->cmd->error))
336 device_printf(sc->dev, "RESULT: %d\n", req->cmd->error);
341 mmc_wait_for_request(device_t brdev, device_t reqdev, struct mmc_request *req)
343 struct mmc_softc *sc = device_get_softc(brdev);
345 return (mmc_wait_for_req(sc, req));
349 mmc_wait_for_cmd(struct mmc_softc *sc, struct mmc_command *cmd, int retries)
351 struct mmc_request mreq;
353 memset(&mreq, 0, sizeof(mreq));
354 memset(cmd->resp, 0, sizeof(cmd->resp));
355 cmd->retries = retries;
357 mmc_wait_for_req(sc, &mreq);
362 mmc_wait_for_app_cmd(struct mmc_softc *sc, uint32_t rca,
363 struct mmc_command *cmd, int retries)
365 struct mmc_command appcmd;
366 int err = MMC_ERR_NONE, i;
368 for (i = 0; i <= retries; i++) {
369 appcmd.opcode = MMC_APP_CMD;
370 appcmd.arg = rca << 16;
371 appcmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
373 mmc_wait_for_cmd(sc, &appcmd, 0);
375 if (err != MMC_ERR_NONE)
377 if (!(appcmd.resp[0] & R1_APP_CMD))
378 return MMC_ERR_FAILED;
379 mmc_wait_for_cmd(sc, cmd, 0);
381 if (err == MMC_ERR_NONE)
388 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
389 uint32_t arg, uint32_t flags, uint32_t *resp, int retries)
391 struct mmc_command cmd;
394 memset(&cmd, 0, sizeof(cmd));
399 err = mmc_wait_for_cmd(sc, &cmd, retries);
405 if (flags & MMC_RSP_136)
406 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t));
414 mmc_idle_cards(struct mmc_softc *sc)
417 struct mmc_command cmd;
420 mmcbr_set_chip_select(dev, cs_high);
421 mmcbr_update_ios(dev);
424 memset(&cmd, 0, sizeof(cmd));
425 cmd.opcode = MMC_GO_IDLE_STATE;
427 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC;
429 mmc_wait_for_cmd(sc, &cmd, 0);
432 mmcbr_set_chip_select(dev, cs_dontcare);
433 mmcbr_update_ios(dev);
438 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
440 struct mmc_command cmd;
441 int err = MMC_ERR_NONE, i;
443 memset(&cmd, 0, sizeof(cmd));
444 cmd.opcode = ACMD_SD_SEND_OP_COND;
446 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
449 for (i = 0; i < 100; i++) {
450 err = mmc_wait_for_app_cmd(sc, 0, &cmd, CMD_RETRIES);
451 if (err != MMC_ERR_NONE)
453 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
454 (ocr & MMC_OCR_VOLTAGE) == 0)
456 err = MMC_ERR_TIMEOUT;
459 if (rocr && err == MMC_ERR_NONE)
465 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
467 struct mmc_command cmd;
468 int err = MMC_ERR_NONE, i;
470 memset(&cmd, 0, sizeof(cmd));
471 cmd.opcode = MMC_SEND_OP_COND;
473 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
476 for (i = 0; i < 100; i++) {
477 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
478 if (err != MMC_ERR_NONE)
480 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
481 (ocr & MMC_OCR_VOLTAGE) == 0)
483 err = MMC_ERR_TIMEOUT;
486 if (rocr && err == MMC_ERR_NONE)
492 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs)
494 struct mmc_command cmd;
497 memset(&cmd, 0, sizeof(cmd));
498 cmd.opcode = SD_SEND_IF_COND;
499 cmd.arg = (vhs << 8) + 0xAA;
500 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR;
503 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
508 mmc_power_up(struct mmc_softc *sc)
513 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev)));
514 mmcbr_set_bus_mode(dev, opendrain);
515 mmcbr_set_chip_select(dev, cs_dontcare);
516 mmcbr_set_bus_width(dev, bus_width_1);
517 mmcbr_set_power_mode(dev, power_up);
518 mmcbr_set_clock(dev, 0);
519 mmcbr_update_ios(dev);
522 mmcbr_set_clock(dev, mmcbr_get_f_min(sc->dev));
523 mmcbr_set_timing(dev, bus_timing_normal);
524 mmcbr_set_power_mode(dev, power_on);
525 mmcbr_update_ios(dev);
530 mmc_power_down(struct mmc_softc *sc)
532 device_t dev = sc->dev;
534 mmcbr_set_bus_mode(dev, opendrain);
535 mmcbr_set_chip_select(dev, cs_dontcare);
536 mmcbr_set_bus_width(dev, bus_width_1);
537 mmcbr_set_power_mode(dev, power_off);
538 mmcbr_set_clock(dev, 0);
539 mmcbr_set_timing(dev, bus_timing_normal);
540 mmcbr_update_ios(dev);
544 mmc_select_card(struct mmc_softc *sc, uint16_t rca)
548 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC;
549 return (mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16,
550 flags, NULL, CMD_RETRIES));
554 mmc_switch(struct mmc_softc *sc, uint8_t set, uint8_t index, uint8_t value)
556 struct mmc_command cmd;
559 cmd.opcode = MMC_SWITCH_FUNC;
560 cmd.arg = (MMC_SWITCH_FUNC_WR << 24) |
564 cmd.flags = MMC_RSP_R1B | MMC_CMD_AC;
566 err = mmc_wait_for_cmd(sc, &cmd, 0);
571 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value,
575 struct mmc_command cmd;
576 struct mmc_data data;
578 memset(&cmd, 0, sizeof(struct mmc_command));
579 memset(&data, 0, sizeof(struct mmc_data));
582 cmd.opcode = SD_SWITCH_FUNC;
583 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
584 cmd.arg = mode << 31; /* 0 - check, 1 - set */
585 cmd.arg |= 0x00FFFFFF;
586 cmd.arg &= ~(0xF << (grp * 4));
587 cmd.arg |= value << (grp * 4);
592 data.flags = MMC_DATA_READ;
594 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
599 mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width)
601 struct mmc_command cmd;
605 if (mmcbr_get_mode(sc->dev) == mode_sd) {
606 memset(&cmd, 0, sizeof(struct mmc_command));
607 cmd.opcode = ACMD_SET_BUS_WIDTH;
608 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
611 cmd.arg = SD_BUS_WIDTH_1;
614 cmd.arg = SD_BUS_WIDTH_4;
617 return (MMC_ERR_INVALID);
619 err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES);
623 value = EXT_CSD_BUS_WIDTH_1;
626 value = EXT_CSD_BUS_WIDTH_4;
629 value = EXT_CSD_BUS_WIDTH_8;
632 return (MMC_ERR_INVALID);
634 err = mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
641 mmc_set_timing(struct mmc_softc *sc, int timing)
645 u_char switch_res[64];
648 case bus_timing_normal:
655 return (MMC_ERR_INVALID);
657 if (mmcbr_get_mode(sc->dev) == mode_sd)
658 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1,
661 err = mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL,
662 EXT_CSD_HS_TIMING, value);
667 mmc_test_bus_width(struct mmc_softc *sc)
669 struct mmc_command cmd;
670 struct mmc_data data;
673 uint8_t p8[8] = { 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
674 uint8_t p8ok[8] = { 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
675 uint8_t p4[4] = { 0x5A, 0x00, 0x00, 0x00, };
676 uint8_t p4ok[4] = { 0xA5, 0x00, 0x00, 0x00, };
678 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) {
679 mmcbr_set_bus_width(sc->dev, bus_width_8);
680 mmcbr_update_ios(sc->dev);
682 cmd.opcode = MMC_BUSTEST_W;
684 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
689 data.flags = MMC_DATA_WRITE;
690 mmc_wait_for_cmd(sc, &cmd, 0);
692 cmd.opcode = MMC_BUSTEST_R;
694 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
699 data.flags = MMC_DATA_READ;
700 err = mmc_wait_for_cmd(sc, &cmd, 0);
702 mmcbr_set_bus_width(sc->dev, bus_width_1);
703 mmcbr_update_ios(sc->dev);
705 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0)
706 return (bus_width_8);
709 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) {
710 mmcbr_set_bus_width(sc->dev, bus_width_4);
711 mmcbr_update_ios(sc->dev);
713 cmd.opcode = MMC_BUSTEST_W;
715 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
720 data.flags = MMC_DATA_WRITE;
721 mmc_wait_for_cmd(sc, &cmd, 0);
723 cmd.opcode = MMC_BUSTEST_R;
725 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
730 data.flags = MMC_DATA_READ;
731 err = mmc_wait_for_cmd(sc, &cmd, 0);
733 mmcbr_set_bus_width(sc->dev, bus_width_1);
734 mmcbr_update_ios(sc->dev);
736 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0)
737 return (bus_width_4);
739 return (bus_width_1);
743 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
745 const int i = (bit_len / 32) - (start / 32) - 1;
746 const int shift = start & 31;
747 uint32_t retval = bits[i] >> shift;
748 if (size + shift > 32)
749 retval |= bits[i - 1] << (32 - shift);
750 return (retval & ((1 << size) - 1));
754 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
758 /* There's no version info, so we take it on faith */
759 memset(cid, 0, sizeof(*cid));
760 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
761 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
762 for (i = 0; i < 5; i++)
763 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
765 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
766 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
767 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
768 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
772 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid)
776 /* There's no version info, so we take it on faith */
777 memset(cid, 0, sizeof(*cid));
778 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
779 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
780 for (i = 0; i < 6; i++)
781 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
783 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
784 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
785 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
786 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997;
789 static const int exp[8] = {
790 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
792 static const int mant[16] = {
793 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
795 static const int cur_min[8] = {
796 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
798 static const int cur_max[8] = {
799 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
803 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
809 memset(csd, 0, sizeof(*csd));
810 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
812 m = mmc_get_bits(raw_csd, 128, 115, 4);
813 e = mmc_get_bits(raw_csd, 128, 112, 3);
814 csd->tacc = exp[e] * mant[m] + 9 / 10;
815 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
816 m = mmc_get_bits(raw_csd, 128, 99, 4);
817 e = mmc_get_bits(raw_csd, 128, 96, 3);
818 csd->tran_speed = exp[e] * 10000 * mant[m];
819 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
820 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
821 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
822 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
823 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
824 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
825 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
826 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
827 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
828 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
829 m = mmc_get_bits(raw_csd, 128, 62, 12);
830 e = mmc_get_bits(raw_csd, 128, 47, 3);
831 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
832 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
833 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
834 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
835 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
836 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
837 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
838 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
840 m = mmc_get_bits(raw_csd, 128, 115, 4);
841 e = mmc_get_bits(raw_csd, 128, 112, 3);
842 csd->tacc = exp[e] * mant[m] + 9 / 10;
843 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
844 m = mmc_get_bits(raw_csd, 128, 99, 4);
845 e = mmc_get_bits(raw_csd, 128, 96, 3);
846 csd->tran_speed = exp[e] * 10000 * mant[m];
847 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
848 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
849 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
850 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
851 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
852 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
853 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) *
855 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
856 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
857 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
858 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
859 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
860 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
861 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
863 panic("unknown SD CSD version");
867 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
872 memset(csd, 0, sizeof(*csd));
873 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
874 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
875 m = mmc_get_bits(raw_csd, 128, 115, 4);
876 e = mmc_get_bits(raw_csd, 128, 112, 3);
877 csd->tacc = exp[e] * mant[m] + 9 / 10;
878 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
879 m = mmc_get_bits(raw_csd, 128, 99, 4);
880 e = mmc_get_bits(raw_csd, 128, 96, 3);
881 csd->tran_speed = exp[e] * 10000 * mant[m];
882 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
883 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
884 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
885 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
886 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
887 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
888 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
889 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
890 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
891 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
892 m = mmc_get_bits(raw_csd, 128, 62, 12);
893 e = mmc_get_bits(raw_csd, 128, 47, 3);
894 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
895 csd->erase_blk_en = 0;
896 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
897 (mmc_get_bits(raw_csd, 128, 37, 5) + 1);
898 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
899 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
900 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
901 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
902 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
906 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
908 unsigned int scr_struct;
910 memset(scr, 0, sizeof(*scr));
912 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
913 if (scr_struct != 0) {
914 kprintf("Unrecognised SCR structure version %d\n",
918 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
919 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
923 mmc_app_decode_sd_status(uint32_t *raw_sd_status,
924 struct mmc_sd_status *sd_status)
927 memset(sd_status, 0, sizeof(*sd_status));
929 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2);
930 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1);
931 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16);
932 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12);
933 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8);
934 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8);
935 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4);
936 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16);
937 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6);
938 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2);
942 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid)
944 struct mmc_command cmd;
947 cmd.opcode = MMC_ALL_SEND_CID;
949 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
951 err = mmc_wait_for_cmd(sc, &cmd, 0);
952 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
957 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcid)
959 struct mmc_command cmd;
962 cmd.opcode = MMC_SEND_CSD;
964 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
966 err = mmc_wait_for_cmd(sc, &cmd, 0);
967 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
972 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr)
975 struct mmc_command cmd;
976 struct mmc_data data;
978 memset(&cmd, 0, sizeof(struct mmc_command));
979 memset(&data, 0, sizeof(struct mmc_data));
981 memset(rawscr, 0, 8);
982 cmd.opcode = ACMD_SEND_SCR;
983 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
989 data.flags = MMC_DATA_READ;
991 err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES);
992 rawscr[0] = be32toh(rawscr[0]);
993 rawscr[1] = be32toh(rawscr[1]);
998 mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd)
1001 struct mmc_command cmd;
1002 struct mmc_data data;
1004 memset(&cmd, 0, sizeof(struct mmc_command));
1005 memset(&data, 0, sizeof(struct mmc_data));
1007 memset(rawextcsd, 0, 512);
1008 cmd.opcode = MMC_SEND_EXT_CSD;
1009 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1013 data.data = rawextcsd;
1015 data.flags = MMC_DATA_READ;
1017 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
1022 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus)
1025 struct mmc_command cmd;
1026 struct mmc_data data;
1028 memset(&cmd, 0, sizeof(struct mmc_command));
1029 memset(&data, 0, sizeof(struct mmc_data));
1031 memset(rawsdstatus, 0, 64);
1032 cmd.opcode = ACMD_SD_STATUS;
1033 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1037 data.data = rawsdstatus;
1039 data.flags = MMC_DATA_READ;
1041 err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES);
1042 for (i = 0; i < 16; i++)
1043 rawsdstatus[i] = be32toh(rawsdstatus[i]);
1048 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp)
1050 struct mmc_command cmd;
1053 cmd.opcode = MMC_SET_RELATIVE_ADDR;
1054 cmd.arg = resp << 16;
1055 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1057 err = mmc_wait_for_cmd(sc, &cmd, 0);
1062 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp)
1064 struct mmc_command cmd;
1067 cmd.opcode = SD_SEND_RELATIVE_ADDR;
1069 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1071 err = mmc_wait_for_cmd(sc, &cmd, 0);
1072 *resp = cmd.resp[0];
1077 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard)
1079 device_printf(dev, "Card at relative address %d%s:\n",
1080 ivar->rca, newcard ? " added" : "");
1081 device_printf(dev, " card: %s%s (0x%x/0x%x/\"%s\" rev %d.%d "
1082 "m/d %02d.%04d s/n %08x)\n",
1083 ivar->mode == mode_sd ? "SD" : "MMC",
1084 ivar->high_cap ? " High Capacity" : "",
1085 ivar->cid.mid, ivar->cid.oid,
1086 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f,
1087 ivar->cid.mdt_month, ivar->cid.mdt_year, ivar->cid.psn);
1088 device_printf(dev, " bus: %ubit, %uMHz%s\n",
1089 (ivar->bus_width == bus_width_1 ? 1 :
1090 (ivar->bus_width == bus_width_4 ? 4 : 8)),
1091 (ivar->timing == bus_timing_hs ?
1092 ivar->hs_tran_speed : ivar->tran_speed) / 1000000,
1093 ivar->timing == bus_timing_hs ? ", high speed timing" : "");
1094 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n",
1095 ivar->sec_count, ivar->erase_sector,
1096 ivar->read_only ? ", read-only" : "");
1100 mmc_discover_cards(struct mmc_softc *sc)
1102 struct mmc_ivars *ivar = NULL;
1104 int err, i, devcount, newcard;
1105 uint32_t raw_cid[4];
1106 uint32_t resp, sec_count;
1109 u_char switch_res[64];
1111 if (bootverbose || mmc_debug)
1112 device_printf(sc->dev, "Probing cards\n");
1114 err = mmc_all_send_cid(sc, raw_cid);
1115 if (err == MMC_ERR_TIMEOUT)
1117 if (err != MMC_ERR_NONE) {
1118 device_printf(sc->dev, "Error reading CID %d\n", err);
1122 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
1124 for (i = 0; i < devcount; i++) {
1125 ivar = device_get_ivars(devlist[i]);
1126 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 0) {
1131 kfree(devlist, M_TEMP);
1132 if (bootverbose || mmc_debug) {
1133 device_printf(sc->dev, "%sard detected (CID %08x%08x%08x%08x)\n",
1134 newcard ? "New c" : "C",
1135 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]);
1138 ivar = kmalloc(sizeof(struct mmc_ivars), M_DEVBUF,
1140 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid));
1142 if (mmcbr_get_ro(sc->dev))
1143 ivar->read_only = 1;
1144 ivar->bus_width = bus_width_1;
1145 ivar->timing = bus_timing_normal;
1146 ivar->mode = mmcbr_get_mode(sc->dev);
1147 if (ivar->mode == mode_sd) {
1148 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid);
1149 mmc_send_relative_addr(sc, &resp);
1150 ivar->rca = resp >> 16;
1152 mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1153 mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd);
1154 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1155 if (ivar->csd.csd_structure > 0)
1157 ivar->tran_speed = ivar->csd.tran_speed;
1158 ivar->erase_sector = ivar->csd.erase_sector *
1159 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1160 /* Get card SCR. Card must be selected to fetch it. */
1161 mmc_select_card(sc, ivar->rca);
1162 mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr);
1163 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
1164 /* Get card switch capabilities (command class 10). */
1165 if ((ivar->scr.sda_vsn >= 1) &&
1166 (ivar->csd.ccc & (1<<10))) {
1167 mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK,
1168 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE,
1170 if (switch_res[13] & 2) {
1171 ivar->timing = bus_timing_hs;
1172 ivar->hs_tran_speed = SD_MAX_HS;
1175 mmc_app_sd_status(sc, ivar->rca, ivar->raw_sd_status);
1176 mmc_app_decode_sd_status(ivar->raw_sd_status,
1178 if (ivar->sd_status.au_size != 0) {
1179 ivar->erase_sector =
1180 16 << ivar->sd_status.au_size;
1182 mmc_select_card(sc, 0);
1183 /* Find max supported bus width. */
1184 if ((mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) &&
1185 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4))
1186 ivar->bus_width = bus_width_4;
1187 if (bootverbose || mmc_debug)
1188 mmc_log_card(sc->dev, ivar, newcard);
1191 child = device_add_child(sc->dev, NULL, -1);
1192 device_set_ivars(child, ivar);
1196 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid);
1198 mmc_set_relative_addr(sc, ivar->rca);
1200 mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1201 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd);
1202 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1203 ivar->tran_speed = ivar->csd.tran_speed;
1204 ivar->erase_sector = ivar->csd.erase_sector *
1205 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1206 /* Only MMC >= 4.x cards support EXT_CSD. */
1207 if (ivar->csd.spec_vers >= 4) {
1208 /* Card must be selected to fetch EXT_CSD. */
1209 mmc_select_card(sc, ivar->rca);
1210 mmc_send_ext_csd(sc, ivar->raw_ext_csd);
1211 /* Handle extended capacity from EXT_CSD */
1212 sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] +
1213 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) +
1214 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) +
1215 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1216 if (sec_count != 0) {
1217 ivar->sec_count = sec_count;
1220 /* Get card speed in high speed mode. */
1221 ivar->timing = bus_timing_hs;
1222 if (ivar->raw_ext_csd[EXT_CSD_CARD_TYPE]
1223 & EXT_CSD_CARD_TYPE_52)
1224 ivar->hs_tran_speed = MMC_TYPE_52_MAX_HS;
1225 else if (ivar->raw_ext_csd[EXT_CSD_CARD_TYPE]
1226 & EXT_CSD_CARD_TYPE_26)
1227 ivar->hs_tran_speed = MMC_TYPE_26_MAX_HS;
1229 ivar->hs_tran_speed = ivar->tran_speed;
1230 /* Find max supported bus width. */
1231 ivar->bus_width = mmc_test_bus_width(sc);
1232 mmc_select_card(sc, 0);
1233 /* Handle HC erase sector size. */
1234 if (ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) {
1235 ivar->erase_sector = 1024 *
1236 ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE];
1237 mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL,
1238 EXT_CSD_ERASE_GRP_DEF, 1);
1241 ivar->bus_width = bus_width_1;
1242 ivar->timing = bus_timing_normal;
1244 if (bootverbose || mmc_debug)
1245 mmc_log_card(sc->dev, ivar, newcard);
1248 child = device_add_child(sc->dev, NULL, -1);
1249 device_set_ivars(child, ivar);
1255 mmc_rescan_cards(struct mmc_softc *sc)
1257 struct mmc_ivars *ivar = NULL;
1259 int err, i, devcount;
1261 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
1263 for (i = 0; i < devcount; i++) {
1264 ivar = device_get_ivars(devlist[i]);
1265 if (mmc_select_card(sc, ivar->rca)) {
1266 if (bootverbose || mmc_debug)
1267 device_printf(sc->dev, "Card at relative address %d lost.\n",
1269 device_delete_child(sc->dev, devlist[i]);
1270 kfree(ivar, M_DEVBUF);
1273 kfree(devlist, M_TEMP);
1274 mmc_select_card(sc, 0);
1278 mmc_delete_cards(struct mmc_softc *sc)
1280 struct mmc_ivars *ivar;
1282 int err, i, devcount;
1284 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
1286 for (i = 0; i < devcount; i++) {
1287 ivar = device_get_ivars(devlist[i]);
1288 if (bootverbose || mmc_debug)
1289 device_printf(sc->dev, "Card at relative address %d deleted.\n",
1291 device_delete_child(sc->dev, devlist[i]);
1292 kfree(ivar, M_DEVBUF);
1294 kfree(devlist, M_TEMP);
1299 mmc_go_discovery(struct mmc_softc *sc)
1306 if (mmcbr_get_power_mode(dev) != power_on) {
1308 * First, try SD modes
1310 mmcbr_set_mode(dev, mode_sd);
1312 mmcbr_set_bus_mode(dev, pushpull);
1313 if (bootverbose || mmc_debug)
1314 device_printf(sc->dev, "Probing bus\n");
1316 err = mmc_send_if_cond(sc, 1);
1317 if ((bootverbose || mmc_debug) && err == 0)
1318 device_printf(sc->dev, "SD 2.0 interface conditions: OK\n");
1319 if (mmc_send_app_op_cond(sc, err ? 0 : MMC_OCR_CCS, &ocr) !=
1321 if (bootverbose || mmc_debug)
1322 device_printf(sc->dev, "SD probe: failed\n");
1326 mmcbr_set_mode(dev, mode_mmc);
1327 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
1328 if (bootverbose || mmc_debug)
1329 device_printf(sc->dev, "MMC probe: failed\n");
1330 ocr = 0; /* Failed both, powerdown. */
1331 } else if (bootverbose || mmc_debug)
1332 device_printf(sc->dev,
1333 "MMC probe: OK (OCR: 0x%08x)\n", ocr);
1334 } else if (bootverbose || mmc_debug)
1335 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n", ocr);
1337 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
1338 if (mmcbr_get_ocr(dev) != 0)
1341 mmcbr_set_bus_mode(dev, opendrain);
1342 mmcbr_set_clock(dev, mmcbr_get_f_min(dev));
1343 mmcbr_update_ios(dev);
1344 /* XXX recompute vdd based on new cards? */
1347 * Make sure that we have a mutually agreeable voltage to at least
1348 * one card on the bus.
1350 if (bootverbose || mmc_debug)
1351 device_printf(sc->dev, "Current OCR: 0x%08x\n", mmcbr_get_ocr(dev));
1352 if (mmcbr_get_ocr(dev) == 0) {
1353 mmc_delete_cards(sc);
1358 * Reselect the cards after we've idled them above.
1360 if (mmcbr_get_mode(dev) == mode_sd) {
1361 err = mmc_send_if_cond(sc, 1);
1362 mmc_send_app_op_cond(sc,
1363 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL);
1365 mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL);
1366 mmc_discover_cards(sc);
1367 mmc_rescan_cards(sc);
1369 mmcbr_set_bus_mode(dev, pushpull);
1370 mmcbr_update_ios(dev);
1371 mmc_calculate_clock(sc);
1372 bus_generic_attach(dev);
1373 /* mmc_update_children_sysctl(dev);*/
1377 mmc_calculate_clock(struct mmc_softc *sc)
1379 int max_dtr, max_hs_dtr, max_timing;
1380 int nkid, i, f_min, f_max;
1382 struct mmc_ivars *ivar;
1384 f_min = mmcbr_get_f_min(sc->dev);
1385 f_max = mmcbr_get_f_max(sc->dev);
1386 max_dtr = max_hs_dtr = f_max;
1387 if ((mmcbr_get_caps(sc->dev) & MMC_CAP_HSPEED))
1388 max_timing = bus_timing_hs;
1390 max_timing = bus_timing_normal;
1391 if (device_get_children(sc->dev, &kids, &nkid) != 0)
1392 panic("can't get children");
1393 for (i = 0; i < nkid; i++) {
1394 ivar = device_get_ivars(kids[i]);
1395 if (ivar->timing < max_timing)
1396 max_timing = ivar->timing;
1397 if (ivar->tran_speed < max_dtr)
1398 max_dtr = ivar->tran_speed;
1399 if (ivar->hs_tran_speed < max_hs_dtr)
1400 max_hs_dtr = ivar->hs_tran_speed;
1402 for (i = 0; i < nkid; i++) {
1403 ivar = device_get_ivars(kids[i]);
1404 if (ivar->timing == bus_timing_normal)
1406 mmc_select_card(sc, ivar->rca);
1407 mmc_set_timing(sc, max_timing);
1409 mmc_select_card(sc, 0);
1410 kfree(kids, M_TEMP);
1411 if (max_timing == bus_timing_hs)
1412 max_dtr = max_hs_dtr;
1413 if (bootverbose || mmc_debug) {
1414 device_printf(sc->dev,
1415 "setting transfer rate to %d.%03dMHz%s\n",
1416 max_dtr / 1000000, (max_dtr / 1000) % 1000,
1417 max_timing == bus_timing_hs ? " (high speed timing)" : "");
1419 mmcbr_set_timing(sc->dev, max_timing);
1420 mmcbr_set_clock(sc->dev, max_dtr);
1421 mmcbr_update_ios(sc->dev);
1426 mmc_scan(struct mmc_softc *sc)
1428 device_t dev = sc->dev;
1430 mmc_acquire_bus(dev, dev);
1431 mmc_go_discovery(sc);
1432 mmc_release_bus(dev, dev);
1436 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
1438 struct mmc_ivars *ivar = device_get_ivars(child);
1443 case MMC_IVAR_DSR_IMP:
1444 *(int *)result = ivar->csd.dsr_imp;
1446 case MMC_IVAR_MEDIA_SIZE:
1447 *(off_t *)result = ivar->sec_count;
1450 *(int *)result = ivar->rca;
1452 case MMC_IVAR_SECTOR_SIZE:
1453 *(int *)result = MMC_SECTOR_SIZE;
1455 case MMC_IVAR_TRAN_SPEED:
1456 *(int *)result = mmcbr_get_clock(bus);
1458 case MMC_IVAR_READ_ONLY:
1459 *(int *)result = ivar->read_only;
1461 case MMC_IVAR_HIGH_CAP:
1462 *(int *)result = ivar->high_cap;
1464 case MMC_IVAR_CARD_TYPE:
1465 *(int *)result = ivar->mode;
1467 case MMC_IVAR_BUS_WIDTH:
1468 *(int *)result = ivar->bus_width;
1470 case MMC_IVAR_ERASE_SECTOR:
1471 *(int *)result = ivar->erase_sector;
1473 case MMC_IVAR_MAX_DATA:
1474 *(int *)result = mmcbr_get_max_data(bus);
1481 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
1484 * None are writable ATM
1491 mmc_delayed_attach(void *xsc)
1493 struct mmc_softc *sc = xsc;
1496 config_intrhook_disestablish(&sc->config_intrhook);
1499 static device_method_t mmc_methods[] = {
1501 DEVMETHOD(device_probe, mmc_probe),
1502 DEVMETHOD(device_attach, mmc_attach),
1503 DEVMETHOD(device_detach, mmc_detach),
1504 DEVMETHOD(device_suspend, mmc_suspend),
1505 DEVMETHOD(device_resume, mmc_resume),
1508 DEVMETHOD(bus_read_ivar, mmc_read_ivar),
1509 DEVMETHOD(bus_write_ivar, mmc_write_ivar),
1511 /* MMC Bus interface */
1512 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request),
1513 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus),
1514 DEVMETHOD(mmcbus_release_bus, mmc_release_bus),
1519 static driver_t mmc_driver = {
1522 sizeof(struct mmc_softc),
1524 static devclass_t mmc_devclass;
1527 DRIVER_MODULE(mmc, sdhci, mmc_driver, mmc_devclass, NULL, NULL);