2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/acpica/acpi_cpu.c,v 1.72 2008/04/12 12:06:00 rpaulo Exp $
31 #include <sys/param.h>
33 #include <sys/kernel.h>
34 #include <sys/malloc.h>
35 #include <sys/globaldata.h>
36 #include <sys/power.h>
39 #include <sys/thread2.h>
40 #include <sys/serialize.h>
41 #include <sys/msgport2.h>
42 #include <sys/microtime_pcpu.h>
44 #include <bus/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/globaldata.h>
47 #include <machine/md_var.h>
48 #include <machine/smp.h>
51 #include <net/netisr2.h>
52 #include <net/netmsg2.h>
53 #include <net/if_var.h>
58 #include "acpi_cpu_cstate.h"
61 * Support for ACPI Processor devices, including C[1-3+] sleep states.
64 /* Hooks for the ACPI CA debugging infrastructure */
65 #define _COMPONENT ACPI_PROCESSOR
66 ACPI_MODULE_NAME("PROCESSOR")
68 struct netmsg_acpi_cst {
69 struct netmsg_base base;
70 struct acpi_cst_softc *sc;
74 #define MAX_CX_STATES 8
76 struct acpi_cst_softc {
78 struct acpi_cpux_softc *cst_parent;
79 ACPI_HANDLE cst_handle;
81 uint32_t cst_flags; /* ACPI_CST_FLAG_ */
82 uint32_t cst_p_blk; /* ACPI P_BLK location */
83 uint32_t cst_p_blk_len; /* P_BLK length (must be 6). */
84 struct acpi_cst_cx cst_cx_states[MAX_CX_STATES];
85 int cst_cx_count; /* Number of valid Cx states. */
86 int cst_prev_sleep; /* Last idle sleep duration. */
88 int cst_non_c3; /* Index of lowest non-C3 state. */
89 u_long cst_cx_stats[MAX_CX_STATES];/* Cx usage history. */
90 /* Values for sysctl. */
91 int cst_cx_lowest; /* Current Cx lowest */
92 int cst_cx_lowest_req; /* Requested Cx lowest */
93 char cst_cx_supported[64];
96 #define ACPI_CST_FLAG_PROBING 0x1
98 #define PCI_VENDOR_INTEL 0x8086
99 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
100 #define PCI_REVISION_A_STEP 0
101 #define PCI_REVISION_B_STEP 1
102 #define PCI_REVISION_4E 2
103 #define PCI_REVISION_4M 3
104 #define PIIX4_DEVACTB_REG 0x58
105 #define PIIX4_BRLD_EN_IRQ0 (1<<0)
106 #define PIIX4_BRLD_EN_IRQ (1<<1)
107 #define PIIX4_BRLD_EN_IRQ8 (1<<5)
108 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | \
109 PIIX4_BRLD_EN_IRQ | \
111 #define PIIX4_PCNTRL_BST_EN (1<<10)
113 /* Platform hardware resource information. */
114 static uint32_t acpi_cst_smi_cmd; /* Value to write to SMI_CMD. */
115 static uint8_t acpi_cst_ctrl; /* Indicate we are _CST aware. */
116 int acpi_cst_quirks; /* Indicate any hardware bugs. */
117 static boolean_t acpi_cst_use_fadt;
120 static boolean_t acpi_cst_disable_idle;
121 /* Disable entry to idle function */
122 static int acpi_cst_cx_count; /* Number of valid Cx states */
124 /* Values for sysctl. */
125 static int acpi_cst_cx_lowest; /* Current Cx lowest */
126 static int acpi_cst_cx_lowest_req; /* Requested Cx lowest */
128 /* Number of C3 state requesters */
129 static int acpi_cst_c3_reqs;
131 static device_t *acpi_cst_devices;
132 static int acpi_cst_ndevices;
133 static struct acpi_cst_softc **acpi_cst_softc;
134 static struct lwkt_serialize acpi_cst_slize = LWKT_SERIALIZE_INITIALIZER;
136 static int acpi_cst_probe(device_t);
137 static int acpi_cst_attach(device_t);
138 static int acpi_cst_suspend(device_t);
139 static int acpi_cst_resume(device_t);
140 static int acpi_cst_shutdown(device_t);
142 static void acpi_cst_notify(device_t);
143 static void acpi_cst_postattach(void *);
144 static void acpi_cst_idle(void);
146 static void acpi_cst_cx_probe(struct acpi_cst_softc *);
147 static void acpi_cst_cx_probe_fadt(struct acpi_cst_softc *);
148 static int acpi_cst_cx_probe_cst(struct acpi_cst_softc *, int);
149 static int acpi_cst_cx_reprobe_cst(struct acpi_cst_softc *);
151 static void acpi_cst_startup(struct acpi_cst_softc *);
152 static void acpi_cst_support_list(struct acpi_cst_softc *);
153 static int acpi_cst_set_lowest(struct acpi_cst_softc *, int);
154 static int acpi_cst_set_lowest_oncpu(struct acpi_cst_softc *, int);
155 static void acpi_cst_non_c3(struct acpi_cst_softc *);
156 static void acpi_cst_global_cx_count(void);
157 static int acpi_cst_set_quirks(void);
158 static void acpi_cst_c3_bm_rld(struct acpi_cst_softc *);
159 static void acpi_cst_free_resource(struct acpi_cst_softc *, int);
160 static void acpi_cst_c1_halt(void);
162 static int acpi_cst_usage_sysctl(SYSCTL_HANDLER_ARGS);
163 static int acpi_cst_lowest_sysctl(SYSCTL_HANDLER_ARGS);
164 static int acpi_cst_lowest_use_sysctl(SYSCTL_HANDLER_ARGS);
165 static int acpi_cst_global_lowest_sysctl(SYSCTL_HANDLER_ARGS);
166 static int acpi_cst_global_lowest_use_sysctl(SYSCTL_HANDLER_ARGS);
168 static int acpi_cst_cx_setup(struct acpi_cst_cx *cx);
169 static void acpi_cst_c1_halt_enter(const struct acpi_cst_cx *);
170 static void acpi_cst_cx_io_enter(const struct acpi_cst_cx *);
172 static device_method_t acpi_cst_methods[] = {
173 /* Device interface */
174 DEVMETHOD(device_probe, acpi_cst_probe),
175 DEVMETHOD(device_attach, acpi_cst_attach),
176 DEVMETHOD(device_detach, bus_generic_detach),
177 DEVMETHOD(device_shutdown, acpi_cst_shutdown),
178 DEVMETHOD(device_suspend, acpi_cst_suspend),
179 DEVMETHOD(device_resume, acpi_cst_resume),
182 DEVMETHOD(bus_add_child, bus_generic_add_child),
183 DEVMETHOD(bus_read_ivar, bus_generic_read_ivar),
184 DEVMETHOD(bus_get_resource_list, bus_generic_get_resource_list),
185 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
186 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
187 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
188 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
189 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
190 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
191 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
192 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
193 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
197 static driver_t acpi_cst_driver = {
200 sizeof(struct acpi_cst_softc),
203 static devclass_t acpi_cst_devclass;
204 DRIVER_MODULE(cpu_cst, cpu, acpi_cst_driver, acpi_cst_devclass, NULL, NULL);
205 MODULE_DEPEND(cpu_cst, acpi, 1, 1, 1);
208 acpi_cst_probe(device_t dev)
212 if (acpi_disabled("cpu_cst") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
215 cpu_id = acpi_get_magic(dev);
217 if (acpi_cst_softc == NULL)
218 acpi_cst_softc = kmalloc(sizeof(struct acpi_cst_softc *) *
219 SMP_MAXCPU, M_TEMP /* XXX */, M_INTWAIT | M_ZERO);
222 * Check if we already probed this processor. We scan the bus twice
223 * so it's possible we've already seen this one.
225 if (acpi_cst_softc[cpu_id] != NULL) {
226 device_printf(dev, "CPU%d cstate already exist\n", cpu_id);
230 /* Mark this processor as in-use and save our derived id for attach. */
231 acpi_cst_softc[cpu_id] = (void *)1;
232 device_set_desc(dev, "ACPI CPU C-State");
238 acpi_cst_attach(device_t dev)
242 struct acpi_cst_softc *sc;
245 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
247 sc = device_get_softc(dev);
249 sc->cst_parent = device_get_softc(device_get_parent(dev));
250 sc->cst_handle = acpi_get_handle(dev);
251 sc->cst_cpuid = acpi_get_magic(dev);
252 acpi_cst_softc[sc->cst_cpuid] = sc;
253 acpi_cst_smi_cmd = AcpiGbl_FADT.SmiCommand;
254 acpi_cst_ctrl = AcpiGbl_FADT.CstControl;
257 buf.Length = ACPI_ALLOCATE_BUFFER;
258 status = AcpiEvaluateObject(sc->cst_handle, NULL, NULL, &buf);
259 if (ACPI_FAILURE(status)) {
260 device_printf(dev, "attach failed to get Processor obj - %s\n",
261 AcpiFormatException(status));
264 obj = (ACPI_OBJECT *)buf.Pointer;
265 sc->cst_p_blk = obj->Processor.PblkAddress;
266 sc->cst_p_blk_len = obj->Processor.PblkLength;
268 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "cpu_cst%d: P_BLK at %#x/%d\n",
269 device_get_unit(dev), sc->cst_p_blk, sc->cst_p_blk_len));
272 * If this is the first cpu we attach, create and initialize the generic
273 * resources that will be used by all acpi cpu devices.
275 if (device_get_unit(dev) == 0) {
276 /* Assume we won't be using FADT for Cx states by default */
277 acpi_cst_use_fadt = FALSE;
279 /* Queue post cpu-probing task handler */
280 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cst_postattach, NULL);
283 /* Probe for Cx state support. */
284 acpi_cst_cx_probe(sc);
286 /* Finally, call identify and probe/attach for child devices. */
287 bus_generic_probe(dev);
288 bus_generic_attach(dev);
294 * Disable any entry to the idle function during suspend and re-enable it
298 acpi_cst_suspend(device_t dev)
302 error = bus_generic_suspend(dev);
305 acpi_cst_disable_idle = TRUE;
310 acpi_cst_resume(device_t dev)
312 acpi_cst_disable_idle = FALSE;
313 return (bus_generic_resume(dev));
317 acpi_cst_shutdown(device_t dev)
319 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
321 /* Allow children to shutdown first. */
322 bus_generic_shutdown(dev);
325 * Disable any entry to the idle function. There is a small race where
326 * an idle thread have passed this check but not gone to sleep. This
327 * is ok since device_shutdown() does not free the softc, otherwise
328 * we'd have to be sure all threads were evicted before returning.
330 acpi_cst_disable_idle = TRUE;
336 acpi_cst_cx_probe(struct acpi_cst_softc *sc)
338 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
340 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
341 sc->cst_prev_sleep = 1000000;
342 sc->cst_cx_lowest = 0;
343 sc->cst_cx_lowest_req = 0;
346 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
347 * any, we'll revert to FADT/P_BLK Cx control method which will be
348 * handled by acpi_cst_postattach. We need to defer to after having
349 * probed all the cpus in the system before probing for Cx states from
350 * FADT as we may already have found cpus with valid _CST packages.
352 if (!acpi_cst_use_fadt && acpi_cst_cx_probe_cst(sc, 0) != 0) {
354 * We were unable to find a _CST package for this cpu or there
355 * was an error parsing it. Switch back to generic mode.
357 acpi_cst_use_fadt = TRUE;
359 device_printf(sc->cst_dev, "switching to FADT Cx mode\n");
363 * TODO: _CSD Package should be checked here.
368 acpi_cst_cx_probe_fadt(struct acpi_cst_softc *sc)
370 struct acpi_cst_cx *cx_ptr;
374 * Free all previously allocated resources.
377 * It is needed, since we could enter here because of other
378 * cpu's _CST probing failure.
380 acpi_cst_free_resource(sc, 0);
382 sc->cst_cx_count = 0;
383 cx_ptr = sc->cst_cx_states;
385 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
386 sc->cst_prev_sleep = 1000000;
388 /* C1 has been required since just after ACPI 1.0 */
389 cx_ptr->gas.SpaceId = ACPI_ADR_SPACE_FIXED_HARDWARE;
390 cx_ptr->type = ACPI_STATE_C1;
391 cx_ptr->trans_lat = 0;
392 cx_ptr->enter = acpi_cst_c1_halt_enter;
393 error = acpi_cst_cx_setup(cx_ptr);
395 panic("C1 FADT HALT setup failed: %d", error);
399 /* C2(+) is not supported on MP system */
400 if (ncpus > 1 && (AcpiGbl_FADT.Flags & ACPI_FADT_C2_MP_SUPPORTED) == 0)
404 * The spec says P_BLK must be 6 bytes long. However, some systems
405 * use it to indicate a fractional set of features present so we
406 * take 5 as C2. Some may also have a value of 7 to indicate
407 * another C3 but most use _CST for this (as required) and having
408 * "only" C1-C3 is not a hardship.
410 if (sc->cst_p_blk_len < 5)
413 /* Validate and allocate resources for C2 (P_LVL2). */
414 if (AcpiGbl_FADT.C2Latency <= 100) {
415 cx_ptr->gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
416 cx_ptr->gas.BitWidth = 8;
417 cx_ptr->gas.Address = sc->cst_p_blk + 4;
419 cx_ptr->rid = sc->cst_parent->cpux_next_rid;
420 acpi_bus_alloc_gas(sc->cst_dev, &cx_ptr->res_type, &cx_ptr->rid,
421 &cx_ptr->gas, &cx_ptr->res, RF_SHAREABLE);
422 if (cx_ptr->res != NULL) {
423 sc->cst_parent->cpux_next_rid++;
424 cx_ptr->type = ACPI_STATE_C2;
425 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
426 cx_ptr->enter = acpi_cst_cx_io_enter;
427 cx_ptr->btag = rman_get_bustag(cx_ptr->res);
428 cx_ptr->bhand = rman_get_bushandle(cx_ptr->res);
429 error = acpi_cst_cx_setup(cx_ptr);
431 panic("C2 FADT I/O setup failed: %d", error);
437 if (sc->cst_p_blk_len < 6)
440 /* Validate and allocate resources for C3 (P_LVL3). */
441 if (AcpiGbl_FADT.C3Latency <= 1000 &&
442 !(acpi_cst_quirks & ACPI_CST_QUIRK_NO_C3)) {
443 cx_ptr->gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
444 cx_ptr->gas.BitWidth = 8;
445 cx_ptr->gas.Address = sc->cst_p_blk + 5;
447 cx_ptr->rid = sc->cst_parent->cpux_next_rid;
448 acpi_bus_alloc_gas(sc->cst_dev, &cx_ptr->res_type, &cx_ptr->rid,
449 &cx_ptr->gas, &cx_ptr->res, RF_SHAREABLE);
450 if (cx_ptr->res != NULL) {
451 sc->cst_parent->cpux_next_rid++;
452 cx_ptr->type = ACPI_STATE_C3;
453 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
454 cx_ptr->enter = acpi_cst_cx_io_enter;
455 cx_ptr->btag = rman_get_bustag(cx_ptr->res);
456 cx_ptr->bhand = rman_get_bushandle(cx_ptr->res);
457 error = acpi_cst_cx_setup(cx_ptr);
459 panic("C3 FADT I/O setup failed: %d", error);
467 * Parse a _CST package and set up its Cx states. Since the _CST object
468 * can change dynamically, our notify handler may call this function
469 * to clean up and probe the new _CST package.
472 acpi_cst_cx_probe_cst(struct acpi_cst_softc *sc, int reprobe)
474 struct acpi_cst_cx *cx_ptr;
482 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
486 KKASSERT(&curthread->td_msgport == netisr_cpuport(sc->cst_cpuid));
490 buf.Length = ACPI_ALLOCATE_BUFFER;
491 status = AcpiEvaluateObject(sc->cst_handle, "_CST", NULL, &buf);
492 if (ACPI_FAILURE(status))
495 /* _CST is a package with a count and at least one Cx package. */
496 top = (ACPI_OBJECT *)buf.Pointer;
497 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
498 device_printf(sc->cst_dev, "invalid _CST package\n");
499 AcpiOsFree(buf.Pointer);
502 if (count != top->Package.Count - 1) {
503 device_printf(sc->cst_dev, "invalid _CST state count (%d != %d)\n",
504 count, top->Package.Count - 1);
505 count = top->Package.Count - 1;
507 if (count > MAX_CX_STATES) {
508 device_printf(sc->cst_dev, "_CST has too many states (%d)\n", count);
509 count = MAX_CX_STATES;
512 sc->cst_flags |= ACPI_CST_FLAG_PROBING;
516 * Free all previously allocated resources
518 * NOTE: It is needed for _CST reprobing.
520 acpi_cst_free_resource(sc, 0);
522 /* Set up all valid states. */
523 sc->cst_cx_count = 0;
524 cx_ptr = sc->cst_cx_states;
525 for (i = 0; i < count; i++) {
528 pkg = &top->Package.Elements[i + 1];
529 if (!ACPI_PKG_VALID(pkg, 4) ||
530 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
531 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
532 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
534 device_printf(sc->cst_dev, "skipping invalid Cx state package\n");
538 /* Validate the state to see if we should use it. */
539 switch (cx_ptr->type) {
542 cx_ptr->enter = acpi_cst_c1_halt_enter;
543 error = acpi_cst_cx_setup(cx_ptr);
545 panic("C1 CST HALT setup failed: %d", error);
554 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_C3) != 0) {
555 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
556 "cpu_cst%d: C3[%d] not available.\n",
557 device_get_unit(sc->cst_dev), i));
564 * Allocate the control register for C2 or C3(+).
566 KASSERT(cx_ptr->res == NULL, ("still has res"));
567 acpi_PkgRawGas(pkg, 0, &cx_ptr->gas);
569 cx_ptr->rid = sc->cst_parent->cpux_next_rid;
570 acpi_bus_alloc_gas(sc->cst_dev, &cx_ptr->res_type, &cx_ptr->rid,
571 &cx_ptr->gas, &cx_ptr->res, RF_SHAREABLE);
572 if (cx_ptr->res != NULL) {
573 sc->cst_parent->cpux_next_rid++;
574 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
575 "cpu_cst%d: Got C%d - %d latency\n",
576 device_get_unit(sc->cst_dev), cx_ptr->type,
578 cx_ptr->enter = acpi_cst_cx_io_enter;
579 cx_ptr->btag = rman_get_bustag(cx_ptr->res);
580 cx_ptr->bhand = rman_get_bushandle(cx_ptr->res);
581 error = acpi_cst_cx_setup(cx_ptr);
583 panic("C%d CST I/O setup failed: %d", cx_ptr->type, error);
588 error = acpi_cst_cx_setup(cx_ptr);
590 KASSERT(cx_ptr->enter != NULL,
591 ("C%d enter is not set", cx_ptr->type));
598 AcpiOsFree(buf.Pointer);
601 /* If there are C3(+) states, always enable bus master wakeup */
602 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM) == 0) {
603 for (i = 0; i < sc->cst_cx_count; ++i) {
604 struct acpi_cst_cx *cx = &sc->cst_cx_states[i];
606 if (cx->type >= ACPI_STATE_C3) {
607 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
613 /* Fix up the lowest Cx being used */
614 acpi_cst_set_lowest_oncpu(sc, sc->cst_cx_lowest_req);
618 * Cache the lowest non-C3 state.
619 * NOTE: must after cst_cx_lowest is set.
624 sc->cst_flags &= ~ACPI_CST_FLAG_PROBING;
630 acpi_cst_cx_reprobe_cst_handler(netmsg_t msg)
632 struct netmsg_acpi_cst *rmsg = (struct netmsg_acpi_cst *)msg;
635 error = acpi_cst_cx_probe_cst(rmsg->sc, 1);
636 lwkt_replymsg(&rmsg->base.lmsg, error);
640 acpi_cst_cx_reprobe_cst(struct acpi_cst_softc *sc)
642 struct netmsg_acpi_cst msg;
644 netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
645 acpi_cst_cx_reprobe_cst_handler);
648 return lwkt_domsg(netisr_cpuport(sc->cst_cpuid), &msg.base.lmsg, 0);
652 * Call this *after* all CPUs Cx states have been attached.
655 acpi_cst_postattach(void *arg)
657 struct acpi_cst_softc *sc;
660 /* Get set of Cx state devices */
661 devclass_get_devices(acpi_cst_devclass, &acpi_cst_devices,
665 * Setup any quirks that might necessary now that we have probed
666 * all the CPUs' Cx states.
668 acpi_cst_set_quirks();
670 if (acpi_cst_use_fadt) {
672 * We are using Cx mode from FADT, probe for available Cx states
673 * for all processors.
675 for (i = 0; i < acpi_cst_ndevices; i++) {
676 sc = device_get_softc(acpi_cst_devices[i]);
677 acpi_cst_cx_probe_fadt(sc);
681 * We are using _CST mode, remove C3 state if necessary.
683 * As we now know for sure that we will be using _CST mode
684 * install our notify handler.
686 for (i = 0; i < acpi_cst_ndevices; i++) {
687 sc = device_get_softc(acpi_cst_devices[i]);
688 if (acpi_cst_quirks & ACPI_CST_QUIRK_NO_C3) {
689 /* Free part of unused resources */
690 acpi_cst_free_resource(sc, sc->cst_non_c3 + 1);
691 sc->cst_cx_count = sc->cst_non_c3 + 1;
693 sc->cst_parent->cpux_cst_notify = acpi_cst_notify;
696 acpi_cst_global_cx_count();
698 /* Perform Cx final initialization. */
699 for (i = 0; i < acpi_cst_ndevices; i++) {
700 sc = device_get_softc(acpi_cst_devices[i]);
701 acpi_cst_startup(sc);
703 if (sc->cst_parent->glob_sysctl_tree != NULL) {
704 struct acpi_cpux_softc *cpux = sc->cst_parent;
706 /* Add a sysctl handler to handle global Cx lowest setting */
707 SYSCTL_ADD_PROC(&cpux->glob_sysctl_ctx,
708 SYSCTL_CHILDREN(cpux->glob_sysctl_tree),
709 OID_AUTO, "cx_lowest",
710 CTLTYPE_STRING | CTLFLAG_RW, NULL, 0,
711 acpi_cst_global_lowest_sysctl, "A",
712 "Requested global lowest Cx sleep state");
713 SYSCTL_ADD_PROC(&cpux->glob_sysctl_ctx,
714 SYSCTL_CHILDREN(cpux->glob_sysctl_tree),
715 OID_AUTO, "cx_lowest_use",
716 CTLTYPE_STRING | CTLFLAG_RD, NULL, 0,
717 acpi_cst_global_lowest_use_sysctl, "A",
718 "Global lowest Cx sleep state to use");
722 /* Take over idling from cpu_idle_default(). */
723 acpi_cst_cx_lowest = 0;
724 acpi_cst_cx_lowest_req = 0;
725 acpi_cst_disable_idle = FALSE;
728 cpu_idle_hook = acpi_cst_idle;
732 acpi_cst_support_list(struct acpi_cst_softc *sc)
738 * Set up the list of Cx states
740 sbuf_new(&sb, sc->cst_cx_supported, sizeof(sc->cst_cx_supported),
742 for (i = 0; i < sc->cst_cx_count; i++)
743 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cst_cx_states[i].trans_lat);
749 acpi_cst_c3_bm_rld_handler(netmsg_t msg)
751 struct netmsg_acpi_cst *rmsg = (struct netmsg_acpi_cst *)msg;
753 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
754 lwkt_replymsg(&rmsg->base.lmsg, 0);
758 acpi_cst_c3_bm_rld(struct acpi_cst_softc *sc)
760 struct netmsg_acpi_cst msg;
762 netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
763 acpi_cst_c3_bm_rld_handler);
766 lwkt_domsg(netisr_cpuport(sc->cst_cpuid), &msg.base.lmsg, 0);
770 acpi_cst_startup(struct acpi_cst_softc *sc)
772 struct acpi_cpux_softc *cpux = sc->cst_parent;
773 int i, bm_rld_done = 0;
775 for (i = 0; i < sc->cst_cx_count; ++i) {
776 struct acpi_cst_cx *cx = &sc->cst_cx_states[i];
779 /* If there are C3(+) states, always enable bus master wakeup */
780 if (cx->type >= ACPI_STATE_C3 && !bm_rld_done &&
781 (acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM) == 0) {
782 acpi_cst_c3_bm_rld(sc);
786 /* Redo the Cx setup, since quirks have been changed */
787 error = acpi_cst_cx_setup(cx);
789 panic("C%d startup setup failed: %d", i + 1, error);
792 acpi_cst_support_list(sc);
794 SYSCTL_ADD_STRING(&cpux->pcpu_sysctl_ctx,
795 SYSCTL_CHILDREN(cpux->pcpu_sysctl_tree),
796 OID_AUTO, "cx_supported", CTLFLAG_RD,
797 sc->cst_cx_supported, 0,
798 "Cx/microsecond values for supported Cx states");
799 SYSCTL_ADD_PROC(&cpux->pcpu_sysctl_ctx,
800 SYSCTL_CHILDREN(cpux->pcpu_sysctl_tree),
801 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
802 (void *)sc, 0, acpi_cst_lowest_sysctl, "A",
803 "requested lowest Cx sleep state");
804 SYSCTL_ADD_PROC(&cpux->pcpu_sysctl_ctx,
805 SYSCTL_CHILDREN(cpux->pcpu_sysctl_tree),
806 OID_AUTO, "cx_lowest_use", CTLTYPE_STRING | CTLFLAG_RD,
807 (void *)sc, 0, acpi_cst_lowest_use_sysctl, "A",
808 "lowest Cx sleep state to use");
809 SYSCTL_ADD_PROC(&cpux->pcpu_sysctl_ctx,
810 SYSCTL_CHILDREN(cpux->pcpu_sysctl_tree),
811 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
812 (void *)sc, 0, acpi_cst_usage_sysctl, "A",
813 "percent usage for each Cx state");
816 /* Signal platform that we can handle _CST notification. */
817 if (!acpi_cst_use_fadt && acpi_cst_ctrl != 0) {
819 AcpiOsWritePort(acpi_cst_smi_cmd, acpi_cst_ctrl, 8);
826 * Idle the CPU in the lowest state possible. This function is called with
827 * interrupts disabled. Note that once it re-enables interrupts, a task
828 * switch can occur so do not access shared data (i.e. the softc) after
829 * interrupts are re-enabled.
834 struct acpi_cst_softc *sc;
835 struct acpi_cst_cx *cx_next;
836 union microtime_pcpu start, end;
837 int cx_next_idx, i, tdiff, bm_arb_disabled = 0;
839 /* If disabled, return immediately. */
840 if (acpi_cst_disable_idle) {
846 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
847 * since there is no Cx state for this processor.
849 sc = acpi_cst_softc[mdcpu->mi.gd_cpuid];
855 /* Still probing; use C1 */
856 if (sc->cst_flags & ACPI_CST_FLAG_PROBING) {
861 /* Find the lowest state that has small enough latency. */
863 for (i = sc->cst_cx_lowest; i >= 0; i--) {
864 if (sc->cst_cx_states[i].trans_lat * 3 <= sc->cst_prev_sleep) {
871 * Check for bus master activity if needed for the selected state.
872 * If there was activity, clear the bit and use the lowest non-C3 state.
874 cx_next = &sc->cst_cx_states[cx_next_idx];
875 if (cx_next->flags & ACPI_CST_CX_FLAG_BM_STS) {
878 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
879 if (bm_active != 0) {
880 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
881 cx_next_idx = sc->cst_non_c3;
885 /* Select the next state and update statistics. */
886 cx_next = &sc->cst_cx_states[cx_next_idx];
887 sc->cst_cx_stats[cx_next_idx]++;
888 KASSERT(cx_next->type != ACPI_STATE_C0, ("C0 sleep"));
891 * Execute HLT (or equivalent) and wait for an interrupt. We can't
892 * calculate the time spent in C1 since the place we wake up is an
893 * ISR. Assume we slept half of quantum and return.
895 if (cx_next->type == ACPI_STATE_C1) {
896 sc->cst_prev_sleep = (sc->cst_prev_sleep * 3 + 500000 / hz) / 4;
897 cx_next->enter(cx_next);
901 /* Execute the proper preamble before enter the selected state. */
902 if (cx_next->preamble == ACPI_CST_CX_PREAMBLE_BM_ARB) {
903 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1);
905 } else if (cx_next->preamble == ACPI_CST_CX_PREAMBLE_WBINVD) {
906 ACPI_FLUSH_CPU_CACHE();
910 * Enter the selected state and check time spent asleep.
912 microtime_pcpu_get(&start);
915 cx_next->enter(cx_next);
918 microtime_pcpu_get(&end);
920 /* Enable bus master arbitration, if it was disabled. */
922 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0);
926 /* Find the actual time asleep in microseconds. */
927 tdiff = microtime_pcpu_diff(&start, &end);
928 sc->cst_prev_sleep = (sc->cst_prev_sleep * 3 + tdiff) / 4;
932 * Re-evaluate the _CST object when we are notified that it changed.
935 acpi_cst_notify(device_t dev)
937 struct acpi_cst_softc *sc = device_get_softc(dev);
939 KASSERT(curthread->td_type != TD_TYPE_NETISR,
940 ("notify in netisr%d", mycpuid));
942 lwkt_serialize_enter(&acpi_cst_slize);
944 /* Update the list of Cx states. */
945 acpi_cst_cx_reprobe_cst(sc);
946 acpi_cst_support_list(sc);
948 /* Update the new lowest useable Cx state for all CPUs. */
949 acpi_cst_global_cx_count();
952 * Fix up the lowest Cx being used
954 if (acpi_cst_cx_lowest_req < acpi_cst_cx_count)
955 acpi_cst_cx_lowest = acpi_cst_cx_lowest_req;
956 if (acpi_cst_cx_lowest > acpi_cst_cx_count - 1)
957 acpi_cst_cx_lowest = acpi_cst_cx_count - 1;
959 lwkt_serialize_exit(&acpi_cst_slize);
963 acpi_cst_set_quirks(void)
968 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
971 * Bus mastering arbitration control is needed to keep caches coherent
972 * while sleeping in C3. If it's not present but a working flush cache
973 * instruction is present, flush the caches before entering C3 instead.
974 * Otherwise, just disable C3 completely.
976 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
977 AcpiGbl_FADT.Pm2ControlLength == 0) {
978 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
979 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
980 acpi_cst_quirks |= ACPI_CST_QUIRK_NO_BM;
981 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
982 "cpu_cst: no BM control, using flush cache method\n"));
984 acpi_cst_quirks |= ACPI_CST_QUIRK_NO_C3;
985 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
986 "cpu_cst: no BM control, C3 not available\n"));
990 /* Look for various quirks of the PIIX4 part. */
991 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
992 if (acpi_dev != NULL) {
993 switch (pci_get_revid(acpi_dev)) {
995 * Disable C3 support for all PIIX4 chipsets. Some of these parts
996 * do not report the BMIDE status to the BM status register and
997 * others have a livelock bug if Type-F DMA is enabled. Linux
998 * works around the BMIDE bug by reading the BM status directly
999 * but we take the simpler approach of disabling C3 for these
1002 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1003 * Livelock") from the January 2002 PIIX4 specification update.
1004 * Applies to all PIIX4 models.
1006 * Also, make sure that all interrupts cause a "Stop Break"
1007 * event to exit from C2 state.
1008 * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak)
1009 * should be set to zero, otherwise it causes C2 to short-sleep.
1010 * PIIX4 doesn't properly support C3 and bus master activity
1011 * need not break out of C2.
1013 case PCI_REVISION_A_STEP:
1014 case PCI_REVISION_B_STEP:
1015 case PCI_REVISION_4E:
1016 case PCI_REVISION_4M:
1017 acpi_cst_quirks |= ACPI_CST_QUIRK_NO_C3;
1018 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1019 "cpu_cst: working around PIIX4 bug, disabling C3\n"));
1021 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
1022 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
1023 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1024 "cpu_cst: PIIX4: enabling IRQs to generate Stop Break\n"));
1025 val |= PIIX4_STOP_BREAK_MASK;
1026 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
1028 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val);
1030 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1031 "cpu_cst: PIIX4: reset BRLD_EN_BM\n"));
1032 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
1044 acpi_cst_usage_sysctl(SYSCTL_HANDLER_ARGS)
1046 struct acpi_cst_softc *sc;
1050 uintmax_t fract, sum, whole;
1052 sc = (struct acpi_cst_softc *) arg1;
1054 for (i = 0; i < sc->cst_cx_count; i++)
1055 sum += sc->cst_cx_stats[i];
1056 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1057 for (i = 0; i < sc->cst_cx_count; i++) {
1059 whole = (uintmax_t)sc->cst_cx_stats[i] * 100;
1060 fract = (whole % sum) * 100;
1061 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1062 (u_int)(fract / sum));
1064 sbuf_printf(&sb, "0.00%% ");
1066 sbuf_printf(&sb, "last %dus", sc->cst_prev_sleep);
1069 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1076 acpi_cst_set_lowest_oncpu(struct acpi_cst_softc *sc, int val)
1078 int old_lowest, error = 0, old_lowest_req;
1079 uint32_t old_type, type;
1081 KKASSERT(mycpuid == sc->cst_cpuid);
1083 old_lowest_req = sc->cst_cx_lowest_req;
1084 sc->cst_cx_lowest_req = val;
1086 if (val > sc->cst_cx_count - 1)
1087 val = sc->cst_cx_count - 1;
1088 old_lowest = atomic_swap_int(&sc->cst_cx_lowest, val);
1090 old_type = sc->cst_cx_states[old_lowest].type;
1091 type = sc->cst_cx_states[val].type;
1092 if (old_type >= ACPI_STATE_C3 && type < ACPI_STATE_C3) {
1093 KKASSERT(acpi_cst_c3_reqs > 0);
1094 if (atomic_fetchadd_int(&acpi_cst_c3_reqs, -1) == 1) {
1096 * All of the CPUs exit C3(+) state, use a better
1099 error = cputimer_intr_select_caps(CPUTIMER_INTR_CAP_NONE);
1100 KKASSERT(!error || error == ERESTART);
1101 if (error == ERESTART) {
1103 kprintf("disable C3(+), restart intr cputimer\n");
1104 cputimer_intr_restart();
1107 } else if (type >= ACPI_STATE_C3 && old_type < ACPI_STATE_C3) {
1108 if (atomic_fetchadd_int(&acpi_cst_c3_reqs, 1) == 0) {
1110 * When the first CPU enters C3(+) state, switch
1111 * to an one shot timer, which could handle
1112 * C3(+) state, i.e. the timer will not hang.
1114 error = cputimer_intr_select_caps(CPUTIMER_INTR_CAP_PS);
1115 if (error == ERESTART) {
1117 kprintf("enable C3(+), restart intr cputimer\n");
1118 cputimer_intr_restart();
1120 kprintf("no suitable intr cputimer found\n");
1123 sc->cst_cx_lowest_req = old_lowest_req;
1124 sc->cst_cx_lowest = old_lowest;
1125 atomic_fetchadd_int(&acpi_cst_c3_reqs, -1);
1133 /* Cache the new lowest non-C3 state. */
1134 acpi_cst_non_c3(sc);
1136 /* Reset the statistics counters. */
1137 bzero(sc->cst_cx_stats, sizeof(sc->cst_cx_stats));
1142 acpi_cst_set_lowest_handler(netmsg_t msg)
1144 struct netmsg_acpi_cst *rmsg = (struct netmsg_acpi_cst *)msg;
1147 error = acpi_cst_set_lowest_oncpu(rmsg->sc, rmsg->val);
1148 lwkt_replymsg(&rmsg->base.lmsg, error);
1152 acpi_cst_set_lowest(struct acpi_cst_softc *sc, int val)
1154 struct netmsg_acpi_cst msg;
1156 netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
1157 acpi_cst_set_lowest_handler);
1161 return lwkt_domsg(netisr_cpuport(sc->cst_cpuid), &msg.base.lmsg, 0);
1165 acpi_cst_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1167 struct acpi_cst_softc *sc;
1171 sc = (struct acpi_cst_softc *)arg1;
1172 ksnprintf(state, sizeof(state), "C%d", sc->cst_cx_lowest_req + 1);
1173 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1174 if (error != 0 || req->newptr == NULL)
1176 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1178 val = (int) strtol(state + 1, NULL, 10) - 1;
1182 lwkt_serialize_enter(&acpi_cst_slize);
1183 error = acpi_cst_set_lowest(sc, val);
1184 lwkt_serialize_exit(&acpi_cst_slize);
1190 acpi_cst_lowest_use_sysctl(SYSCTL_HANDLER_ARGS)
1192 struct acpi_cst_softc *sc;
1195 sc = (struct acpi_cst_softc *)arg1;
1196 ksnprintf(state, sizeof(state), "C%d", sc->cst_cx_lowest + 1);
1197 return sysctl_handle_string(oidp, state, sizeof(state), req);
1201 acpi_cst_global_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1203 struct acpi_cst_softc *sc;
1207 ksnprintf(state, sizeof(state), "C%d", acpi_cst_cx_lowest_req + 1);
1208 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1209 if (error != 0 || req->newptr == NULL)
1211 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1213 val = (int) strtol(state + 1, NULL, 10) - 1;
1217 lwkt_serialize_enter(&acpi_cst_slize);
1219 acpi_cst_cx_lowest_req = val;
1220 acpi_cst_cx_lowest = val;
1221 if (acpi_cst_cx_lowest > acpi_cst_cx_count - 1)
1222 acpi_cst_cx_lowest = acpi_cst_cx_count - 1;
1224 /* Update the new lowest useable Cx state for all CPUs. */
1225 for (i = 0; i < acpi_cst_ndevices; i++) {
1226 sc = device_get_softc(acpi_cst_devices[i]);
1227 error = acpi_cst_set_lowest(sc, val);
1234 lwkt_serialize_exit(&acpi_cst_slize);
1240 acpi_cst_global_lowest_use_sysctl(SYSCTL_HANDLER_ARGS)
1244 ksnprintf(state, sizeof(state), "C%d", acpi_cst_cx_lowest + 1);
1245 return sysctl_handle_string(oidp, state, sizeof(state), req);
1249 * Put the CPU in C1 in a machine-dependant way.
1250 * XXX: shouldn't be here!
1253 acpi_cst_c1_halt(void)
1256 if ((mycpu->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0)
1257 __asm __volatile("sti; hlt");
1259 __asm __volatile("sti; pause");
1263 acpi_cst_non_c3(struct acpi_cst_softc *sc)
1268 for (i = sc->cst_cx_lowest; i >= 0; i--) {
1269 if (sc->cst_cx_states[i].type < ACPI_STATE_C3) {
1275 device_printf(sc->cst_dev, "non-C3 %d\n", sc->cst_non_c3);
1279 * Update the largest Cx state supported in the global acpi_cst_cx_count.
1280 * It will be used in the global Cx sysctl handler.
1283 acpi_cst_global_cx_count(void)
1285 struct acpi_cst_softc *sc;
1288 if (acpi_cst_ndevices == 0) {
1289 acpi_cst_cx_count = 0;
1293 sc = device_get_softc(acpi_cst_devices[0]);
1294 acpi_cst_cx_count = sc->cst_cx_count;
1296 for (i = 1; i < acpi_cst_ndevices; i++) {
1297 struct acpi_cst_softc *sc = device_get_softc(acpi_cst_devices[i]);
1299 if (sc->cst_cx_count < acpi_cst_cx_count)
1300 acpi_cst_cx_count = sc->cst_cx_count;
1303 kprintf("cpu_cst: global Cx count %d\n", acpi_cst_cx_count);
1307 acpi_cst_c1_halt_enter(const struct acpi_cst_cx *cx __unused)
1313 acpi_cst_cx_io_enter(const struct acpi_cst_cx *cx)
1318 * Read I/O to enter this Cx state
1320 bus_space_read_1(cx->btag, cx->bhand, 0);
1322 * Perform a dummy I/O read. Since it may take an arbitrary time
1323 * to enter the idle state, this read makes sure that we are frozen.
1325 AcpiRead(&dummy, &AcpiGbl_FADT.XPmTimerBlock);
1329 acpi_cst_cx_setup(struct acpi_cst_cx *cx)
1331 cx->flags &= ~ACPI_CST_CX_FLAG_BM_STS;
1332 cx->preamble = ACPI_CST_CX_PREAMBLE_NONE;
1334 if (cx->type >= ACPI_STATE_C3) {
1336 * Set the required operations for entering C3(+) state.
1337 * Later acpi_cst_md_cx_setup() may fix them up.
1341 * Always check BM_STS.
1343 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM) == 0)
1344 cx->flags |= ACPI_CST_CX_FLAG_BM_STS;
1347 * According to the ACPI specification, bus master arbitration
1348 * is only available on UP system. For MP system, cache flushing
1351 if (ncpus == 1 && (acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM) == 0)
1352 cx->preamble = ACPI_CST_CX_PREAMBLE_BM_ARB;
1354 cx->preamble = ACPI_CST_CX_PREAMBLE_WBINVD;
1356 return acpi_cst_md_cx_setup(cx);
1360 acpi_cst_free_resource(struct acpi_cst_softc *sc, int start)
1364 for (i = start; i < MAX_CX_STATES; ++i) {
1365 struct acpi_cst_cx *cx = &sc->cst_cx_states[i];
1367 if (cx->res != NULL)
1368 bus_release_resource(sc->cst_dev, cx->res_type, cx->rid, cx->res);
1369 memset(cx, 0, sizeof(*cx));