2 * Copyright 2003 Eric Anholt.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
21 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 * $FreeBSD: src/sys/dev/drm2/drm_pci.c,v 1.1 2012/05/22 11:07:44 kib Exp $
28 * \brief PCI consistent, DMA-accessible memory allocation.
30 * \author Eric Anholt <anholt@FreeBSD.org>
35 /**********************************************************************/
36 /** \name PCI memory */
40 drm_pci_busdma_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
42 drm_dma_handle_t *dmah = arg;
47 KASSERT(nsegs == 1, ("drm_pci_busdma_callback: bad dma segment count"));
48 dmah->busaddr = segs[0].ds_addr;
52 * \brief Allocate a physically contiguous DMA-accessible consistent
56 drm_pci_alloc(struct drm_device *dev, size_t size,
57 size_t align, dma_addr_t maxaddr)
59 drm_dma_handle_t *dmah;
62 /* Need power-of-two alignment, so fail the allocation if it isn't. */
63 if ((align & (align - 1)) != 0) {
64 DRM_ERROR("drm_pci_alloc with non-power-of-two alignment %d\n",
69 dmah = kmalloc(sizeof(drm_dma_handle_t), DRM_MEM_DMA, M_ZERO | M_NOWAIT);
73 #if 0 /* HT XXX XXX XXX */
74 /* Make sure we aren't holding locks here */
75 mtx_assert(&dev->dev_lock, MA_NOTOWNED);
76 if (mtx_owned(&dev->dev_lock))
77 DRM_ERROR("called while holding dev_lock\n");
78 mtx_assert(&dev->dma_lock, MA_NOTOWNED);
79 if (mtx_owned(&dev->dma_lock))
80 DRM_ERROR("called while holding dma_lock\n");
83 ret = bus_dma_tag_create(NULL, align, 0, /* tag, align, boundary */
84 maxaddr, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
85 NULL, NULL, /* filtfunc, filtfuncargs */
86 size, 1, size, /* maxsize, nsegs, maxsegsize */
90 drm_free(dmah, DRM_MEM_DMA);
94 ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr,
95 BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_NOCACHE, &dmah->map);
97 bus_dma_tag_destroy(dmah->tag);
98 drm_free(dmah, DRM_MEM_DMA);
102 ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr, size,
103 drm_pci_busdma_callback, dmah, BUS_DMA_NOWAIT);
105 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
106 bus_dma_tag_destroy(dmah->tag);
107 drm_free(dmah, DRM_MEM_DMA);
115 * \brief Free a DMA-accessible consistent memory block.
118 drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah)
123 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
124 bus_dma_tag_destroy(dmah->tag);
126 drm_free(dmah, DRM_MEM_DMA);
131 int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask)
135 u32 lnkcap = 0, lnkcap2 = 0;
138 if (!drm_device_is_pcie(dev))
141 root = device_get_parent(dev->dev);
144 pci_find_extcap(root, PCIY_EXPRESS, &pos);
148 /* we've been informed via and serverworks don't make the cut */
149 if (pci_get_vendor(root) == PCI_VENDOR_ID_VIA ||
150 pci_get_vendor(root) == PCI_VENDOR_ID_SERVERWORKS)
153 lnkcap = pci_read_config(root, pos + PCIER_LINKCAP, 4);
154 lnkcap2 = pci_read_config(root, pos + PCIER_LINK_CAP2, 4);
156 lnkcap &= PCIEM_LNKCAP_SPEED_MASK;
159 #define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */
160 #define PCI_EXP_LNKCAP2_SLS_5_0GB 0x04 /* Supported Link Speed 5.0GT/s */
161 #define PCI_EXP_LNKCAP2_SLS_8_0GB 0x08 /* Supported Link Speed 8.0GT/s */
163 if (lnkcap2) { /* PCIE GEN 3.0 */
164 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB)
165 *mask |= DRM_PCIE_SPEED_25;
166 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB)
167 *mask |= DRM_PCIE_SPEED_50;
168 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB)
169 *mask |= DRM_PCIE_SPEED_80;
172 *mask |= DRM_PCIE_SPEED_25;
174 *mask |= DRM_PCIE_SPEED_50;
177 DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", pci_get_vendor(root), pci_get_device(root), lnkcap, lnkcap2);