2 * Copyright (c) 2005 David Young. All rights reserved.
4 * This code was written by David Young.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. Neither the name of the author nor the names of any co-contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
19 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
20 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
21 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
22 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
23 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
24 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 * $NetBSD: si4136reg.h,v 1.4 2006/03/08 08:26:50 dyoung Exp $
32 * $DragonFly: src/sys/dev/netif/rtw/si4136reg.h,v 1.2 2007/10/14 04:15:17 sephe Exp $
35 #ifndef _DEV_IC_SI4136REG_H_
36 #define _DEV_IC_SI4136REG_H_
39 * Serial bus format for Silicon Laboratories Si4126/Si4136 RF synthesizer.
41 #define SI4126_TWI_DATA_MASK __BITS(21, 4)
42 #define SI4126_TWI_ADDR_MASK __BITS(3, 0)
45 * Registers for Silicon Laboratories Si4126/Si4136 RF synthesizer.
47 #define SI4126_MAIN 0 /* main configuration */
48 #define SI4126_MAIN_AUXSEL_MASK __BITS(13, 12) /* aux. output pin function */
50 #define SI4126_MAIN_AUXSEL_RSVD __SHIFTIN(0x0, SI4126_MAIN_AUXSEL_MASK)
52 #define SI4126_MAIN_AUXSEL_FRCLOW __SHIFTIN(0x1, SI4126_MAIN_AUXSEL_MASK)
53 /* Lock Detect (LDETB) */
54 #define SI4126_MAIN_AUXSEL_LDETB __SHIFTIN(0x3, SI4126_MAIN_AUXSEL_MASK)
56 #define SI4126_MAIN_IFDIV_MASK __BITS(11, 10) /* IFOUT = IFVCO
57 * frequency / 2**IFDIV.
60 /* 1: divide crystal input (XIN) by 2 */
61 #define SI4126_MAIN_XINDIV2 __BIT(6)
62 #define SI4126_MAIN_LPWR __BIT(5) /* 1: low-power mode */
63 #define SI4126_MAIN_AUTOPDB __BIT(3) /* 1: equivalent to
64 * reg[SI4126_POWER] <-
68 * 0: power-down under control
69 * of reg[SI4126_POWER].
72 #define SI4126_GAIN 1 /* phase detector gain */
73 #define SI4126_GAIN_KPI_MASK __BITS(5, 4) /* IF phase detector gain */
74 #define SI4126_GAIN_KP2_MASK __BITS(3, 2) /* RF2 phase detector gain */
75 #define SI4126_GAIN_KP1_MASK __BITS(1, 0) /* RF1 phase detector gain */
77 #define SI4126_POWER 2 /* powerdown */
78 #define SI4126_POWER_PDIB __BIT(1) /* 1: IF synthesizer on */
79 #define SI4126_POWER_PDRB __BIT(0) /* 1: RF synthesizer on */
81 #define SI4126_RF1N 3 /* RF1 N divider */
82 #define SI4126_RF2N 4 /* RF2 N divider */
83 #define SI4126_IFN 5 /* IF N divider */
84 #define SI4126_RF1R 6 /* RF1 R divider */
85 #define SI4126_RF2R 7 /* RF2 R divider */
86 #define SI4126_IFR 8 /* IF R divider */
88 #endif /* _DEV_IC_SI4136REG_H_ */