2 * Interface for the 93C66/56/46/26/06 serial eeprom parts.
4 * Copyright (c) 1995, 1996 Daniel M. Eischen
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice immediately at the beginning of the file, without modification,
12 * this list of conditions, and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Absolutely no warranty of function or purpose is made by the author
18 * 4. Modifications may be freely made to this file if the above conditions
21 * $FreeBSD: src/sys/dev/aic7xxx/93cx6.c,v 1.5 2000/01/07 23:08:17 gibbs Exp $
22 * $NetBSD: smc93cx6.c,v 1.12 2005/12/11 12:21:28 christos Exp $
23 * $DragonFly: src/sys/dev/netif/rtw/smc93cx6.c,v 1.5 2007/10/14 04:15:17 sephe Exp $
27 * The instruction set of the 93C66/56/46/26/06 chips are as follows:
30 * Function Bit Code Address** Data Description
31 * -------------------------------------------------------------------
32 * READ 1 10 A5 - A0 Reads data stored in memory,
33 * starting at specified address
34 * EWEN 1 00 11XXXX Write enable must precede
35 * all programming modes
36 * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0
37 * WRITE 1 01 A5 - A0 D15 - D0 Writes register
38 * ERAL 1 00 10XXXX Erase all registers
39 * WRAL 1 00 01XXXX D15 - D0 Writes to all registers
40 * EWDS 1 00 00XXXX Disables all programming
42 * *Note: A value of X for address is a don't care condition.
43 * **Note: There are 8 address bits for the 93C56/66 chips unlike
44 * the 93C46/26/06 chips which have 6 address bits.
46 * The 93C46 has a four wire interface: clock, chip select, data in, and
47 * data out. In order to perform one of the above functions, you need
48 * to enable the chip select for a clock period (typically a minimum of
49 * 1 usec, with the clock high and low a minimum of 750 and 250 nsec
50 * respectively). While the chip select remains high, you can clock in
51 * the instructions (above) starting with the start bit, followed by the
52 * OP code, Address, and Data (if needed). For the READ instruction, the
53 * requested 16-bit register contents is read from the data out line but
54 * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
55 * first). The clock cycling from low to high initiates the next data
56 * bit to be sent from the chip.
60 #include "opt_aic7xxx.h"
62 #include <sys/param.h>
63 #include <sys/systm.h>
66 #include <dev/netif/rtw/smc93cx6var.h>
69 * Right now, we only have to read the SEEPROM. But we make it easier to
70 * add other 93Cx6 functions.
72 static struct seeprom_cmd {
74 unsigned char bits[3];
75 } seeprom_read = {3, {1, 1, 0}};
77 /* XXX bus barriers */
78 #define CLOCK_PULSE(sd, rdy) do { \
80 * Wait for the SEERDY to go high; about 800 ns. \
84 DELAY(4); /* more than long enough */ \
87 while ((SEEPROM_STATUS_INB(sd) & rdy) == 0 && cpi-- > 0) { \
90 (void)SEEPROM_INB(sd); /* Clear clock */ \
94 * Read the serial EEPROM and returns 1 if successful and 0 if
98 read_seeprom(struct seeprom_descriptor *sd, u_int16_t *buf,
99 bus_size_t start_addr, bus_size_t count)
107 * Read the requested registers of the seeprom. The loop
108 * will range from 0 to count-1.
110 for (k = start_addr; k < count + start_addr; k++) {
111 /* Send chip select for one clock cycle. */
112 temp = sd->sd_MS ^ sd->sd_CS;
113 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
114 CLOCK_PULSE(sd, sd->sd_RDY);
117 * Now we're ready to send the read command followed by the
118 * address of the 16-bit register we want to read.
120 for (i = 0; i < seeprom_read.len; i++) {
121 if (seeprom_read.bits[i] != 0)
123 SEEPROM_OUTB(sd, temp);
124 CLOCK_PULSE(sd, sd->sd_RDY);
125 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
126 CLOCK_PULSE(sd, sd->sd_RDY);
127 if (seeprom_read.bits[i] != 0)
130 /* Send the 6 or 8 bit address (MSB first, LSB last). */
131 for (i = (sd->sd_chip - 1); i >= 0; i--) {
132 if ((k & (1 << i)) != 0)
134 SEEPROM_OUTB(sd, temp);
135 CLOCK_PULSE(sd, sd->sd_RDY);
136 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
137 CLOCK_PULSE(sd, sd->sd_RDY);
138 if ((k & (1 << i)) != 0)
143 * Now read the 16 bit register. An initial 0 precedes the
144 * register contents which begins with bit 15 (MSB) and ends
145 * with bit 0 (LSB). The initial 0 will be shifted off the
146 * top of our word as we let the loop run from 0 to 16.
149 for (i = 16; i >= 0; i--) {
150 SEEPROM_OUTB(sd, temp);
151 CLOCK_PULSE(sd, sd->sd_RDY);
153 if (SEEPROM_DATA_INB(sd) & sd->sd_DI)
155 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
156 CLOCK_PULSE(sd, sd->sd_RDY);
159 buf[k - start_addr] = v;
161 /* Reset the chip select for the next command cycle. */
163 SEEPROM_OUTB(sd, temp);
164 CLOCK_PULSE(sd, sd->sd_RDY);
165 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
166 CLOCK_PULSE(sd, sd->sd_RDY);
167 SEEPROM_OUTB(sd, temp);
168 CLOCK_PULSE(sd, sd->sd_RDY);
170 #ifdef AHC_DUMP_EEPROM
171 kprintf("\nSerial EEPROM:\n\t");
172 for (k = 0; k < count; k = k + 1) {
173 if (((k % 8) == 0) && (k != 0)) {
176 kprintf (" 0x%x", buf[k]);