2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
29 #include <linux/export.h>
31 #include "intel_drv.h"
32 #include "intel_ringbuffer.h"
33 #include <drm/i915_drm.h>
36 #define DRM_I915_RING_DEBUG 1
39 #if defined(CONFIG_DEBUG_FS)
47 static const char *yesno(int v)
49 return v ? "yes" : "no";
52 static int i915_capabilities(struct seq_file *m, void *data)
54 struct drm_info_node *node = (struct drm_info_node *) m->private;
55 struct drm_device *dev = node->minor->dev;
56 const struct intel_device_info *info = INTEL_INFO(dev);
58 seq_printf(m, "gen: %d\n", info->gen);
59 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
60 #define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
61 #define DEV_INFO_SEP ;
69 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
71 if (obj->user_pin_count > 0)
73 else if (obj->pin_count > 0)
79 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
81 switch (obj->tiling_mode) {
83 case I915_TILING_NONE: return " ";
84 case I915_TILING_X: return "X";
85 case I915_TILING_Y: return "Y";
89 static const char *cache_level_str(int type)
92 case I915_CACHE_NONE: return " uncached";
93 case I915_CACHE_LLC: return " snooped (LLC)";
94 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
100 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
102 seq_printf(m, "%pK: %s%s %8zdKiB %04x %04x %d %d %d%s%s%s",
105 get_tiling_flag(obj),
106 obj->base.size / 1024,
107 obj->base.read_domains,
108 obj->base.write_domain,
109 obj->last_read_seqno,
110 obj->last_write_seqno,
111 obj->last_fenced_seqno,
112 cache_level_str(obj->cache_level),
113 obj->dirty ? " dirty" : "",
114 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
116 seq_printf(m, " (name: %d)", obj->base.name);
118 seq_printf(m, " (pinned x %d)", obj->pin_count);
119 if (obj->fence_reg != I915_FENCE_REG_NONE)
120 seq_printf(m, " (fence: %d)", obj->fence_reg);
121 if (obj->gtt_space != NULL)
122 seq_printf(m, " (gtt offset: %08x, size: %08x)",
123 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
124 if (obj->pin_mappable || obj->fault_mappable) {
126 if (obj->pin_mappable)
128 if (obj->fault_mappable)
131 seq_printf(m, " (%s mappable)", s);
133 if (obj->ring != NULL)
134 seq_printf(m, " (%s)", obj->ring->name);
137 static int i915_gem_object_list_info(struct seq_file *m, void *data)
139 struct drm_info_node *node = (struct drm_info_node *) m->private;
140 uintptr_t list = (uintptr_t) node->info_ent->data;
141 struct list_head *head;
142 struct drm_device *dev = node->minor->dev;
143 drm_i915_private_t *dev_priv = dev->dev_private;
144 struct drm_i915_gem_object *obj;
145 size_t total_obj_size, total_gtt_size;
148 ret = mutex_lock_interruptible(&dev->struct_mutex);
154 seq_printf(m, "Active:\n");
155 head = &dev_priv->mm.active_list;
158 seq_printf(m, "Inactive:\n");
159 head = &dev_priv->mm.inactive_list;
162 mutex_unlock(&dev->struct_mutex);
166 total_obj_size = total_gtt_size = count = 0;
167 list_for_each_entry(obj, head, mm_list) {
169 describe_obj(m, obj);
171 total_obj_size += obj->base.size;
172 total_gtt_size += obj->gtt_space->size;
175 mutex_unlock(&dev->struct_mutex);
177 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
178 count, total_obj_size, total_gtt_size);
182 #define count_objects(list, member) do { \
183 list_for_each_entry(obj, list, member) { \
184 size += obj->gtt_space->size; \
186 if (obj->map_and_fenceable) { \
187 mappable_size += obj->gtt_space->size; \
193 static int i915_gem_object_info(struct seq_file *m, void* data)
195 struct drm_info_node *node = (struct drm_info_node *) m->private;
196 struct drm_device *dev = node->minor->dev;
197 struct drm_i915_private *dev_priv = dev->dev_private;
198 u32 count, mappable_count, purgeable_count;
199 size_t size, mappable_size, purgeable_size;
200 struct drm_i915_gem_object *obj;
203 ret = mutex_lock_interruptible(&dev->struct_mutex);
207 seq_printf(m, "%u objects, %zu bytes\n",
208 dev_priv->mm.object_count,
209 dev_priv->mm.object_memory);
211 size = count = mappable_size = mappable_count = 0;
212 count_objects(&dev_priv->mm.bound_list, gtt_list);
213 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
214 count, mappable_count, size, mappable_size);
216 size = count = mappable_size = mappable_count = 0;
217 count_objects(&dev_priv->mm.active_list, mm_list);
218 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
219 count, mappable_count, size, mappable_size);
221 size = count = mappable_size = mappable_count = 0;
222 count_objects(&dev_priv->mm.inactive_list, mm_list);
223 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
224 count, mappable_count, size, mappable_size);
226 size = count = purgeable_size = purgeable_count = 0;
227 list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) {
228 size += obj->base.size, ++count;
229 if (obj->madv == I915_MADV_DONTNEED)
230 purgeable_size += obj->base.size, ++purgeable_count;
232 seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
234 size = count = mappable_size = mappable_count = 0;
235 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
236 if (obj->fault_mappable) {
237 size += obj->gtt_space->size;
240 if (obj->pin_mappable) {
241 mappable_size += obj->gtt_space->size;
244 if (obj->madv == I915_MADV_DONTNEED) {
245 purgeable_size += obj->base.size;
249 seq_printf(m, "%u purgeable objects, %zu bytes\n",
250 purgeable_count, purgeable_size);
251 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
252 mappable_count, mappable_size);
253 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
256 seq_printf(m, "%zu [%zu] gtt total\n",
257 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
259 mutex_unlock(&dev->struct_mutex);
264 static int i915_gem_gtt_info(struct seq_file *m, void* data)
266 struct drm_info_node *node = (struct drm_info_node *) m->private;
267 struct drm_device *dev = node->minor->dev;
268 uintptr_t list = (uintptr_t) node->info_ent->data;
269 struct drm_i915_private *dev_priv = dev->dev_private;
270 struct drm_i915_gem_object *obj;
271 size_t total_obj_size, total_gtt_size;
274 ret = mutex_lock_interruptible(&dev->struct_mutex);
278 total_obj_size = total_gtt_size = count = 0;
279 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
280 if (list == PINNED_LIST && obj->pin_count == 0)
284 describe_obj(m, obj);
286 total_obj_size += obj->base.size;
287 total_gtt_size += obj->gtt_space->size;
291 mutex_unlock(&dev->struct_mutex);
293 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
294 count, total_obj_size, total_gtt_size);
299 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
301 struct drm_info_node *node = (struct drm_info_node *) m->private;
302 struct drm_device *dev = node->minor->dev;
304 struct intel_crtc *crtc;
306 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
307 const char pipe = pipe_name(crtc->pipe);
308 const char plane = plane_name(crtc->plane);
309 struct intel_unpin_work *work;
311 spin_lock_irqsave(&dev->event_lock, flags);
312 work = crtc->unpin_work;
314 seq_printf(m, "No flip due on pipe %c (plane %c)\n",
317 if (atomic_read(&work->pending) < INTEL_FLIP_COMPLETE) {
318 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
321 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
324 if (work->enable_stall_check)
325 seq_printf(m, "Stall check enabled, ");
327 seq_printf(m, "Stall check waiting for page flip ioctl, ");
328 seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
330 if (work->old_fb_obj) {
331 struct drm_i915_gem_object *obj = work->old_fb_obj;
333 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
335 if (work->pending_flip_obj) {
336 struct drm_i915_gem_object *obj = work->pending_flip_obj;
338 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
341 spin_unlock_irqrestore(&dev->event_lock, flags);
347 static int i915_gem_request_info(struct seq_file *m, void *data)
349 struct drm_info_node *node = (struct drm_info_node *) m->private;
350 struct drm_device *dev = node->minor->dev;
351 drm_i915_private_t *dev_priv = dev->dev_private;
352 struct intel_ring_buffer *ring;
353 struct drm_i915_gem_request *gem_request;
356 ret = mutex_lock_interruptible(&dev->struct_mutex);
361 for_each_ring(ring, dev_priv, i) {
362 if (list_empty(&ring->request_list))
365 seq_printf(m, "%s requests:\n", ring->name);
366 list_for_each_entry(gem_request,
369 seq_printf(m, " %d @ %d\n",
371 (int) (jiffies - gem_request->emitted_jiffies));
375 mutex_unlock(&dev->struct_mutex);
378 seq_printf(m, "No requests\n");
383 static void i915_ring_seqno_info(struct seq_file *m,
384 struct intel_ring_buffer *ring)
386 if (ring->get_seqno) {
387 seq_printf(m, "Current sequence (%s): %d\n",
388 ring->name, ring->get_seqno(ring, false));
392 static int i915_gem_seqno_info(struct seq_file *m, void *data)
394 struct drm_info_node *node = (struct drm_info_node *) m->private;
395 struct drm_device *dev = node->minor->dev;
396 drm_i915_private_t *dev_priv = dev->dev_private;
397 struct intel_ring_buffer *ring;
400 ret = mutex_lock_interruptible(&dev->struct_mutex);
404 for_each_ring(ring, dev_priv, i)
405 i915_ring_seqno_info(m, ring);
407 mutex_unlock(&dev->struct_mutex);
413 static int i915_interrupt_info(struct seq_file *m, void *data)
415 struct drm_info_node *node = (struct drm_info_node *) m->private;
416 struct drm_device *dev = node->minor->dev;
417 drm_i915_private_t *dev_priv = dev->dev_private;
418 struct intel_ring_buffer *ring;
421 ret = mutex_lock_interruptible(&dev->struct_mutex);
425 if (IS_VALLEYVIEW(dev)) {
426 seq_printf(m, "Display IER:\t%08x\n",
428 seq_printf(m, "Display IIR:\t%08x\n",
430 seq_printf(m, "Display IIR_RW:\t%08x\n",
431 I915_READ(VLV_IIR_RW));
432 seq_printf(m, "Display IMR:\t%08x\n",
435 seq_printf(m, "Pipe %c stat:\t%08x\n",
437 I915_READ(PIPESTAT(pipe)));
439 seq_printf(m, "Master IER:\t%08x\n",
440 I915_READ(VLV_MASTER_IER));
442 seq_printf(m, "Render IER:\t%08x\n",
444 seq_printf(m, "Render IIR:\t%08x\n",
446 seq_printf(m, "Render IMR:\t%08x\n",
449 seq_printf(m, "PM IER:\t\t%08x\n",
450 I915_READ(GEN6_PMIER));
451 seq_printf(m, "PM IIR:\t\t%08x\n",
452 I915_READ(GEN6_PMIIR));
453 seq_printf(m, "PM IMR:\t\t%08x\n",
454 I915_READ(GEN6_PMIMR));
456 seq_printf(m, "Port hotplug:\t%08x\n",
457 I915_READ(PORT_HOTPLUG_EN));
458 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
459 I915_READ(VLV_DPFLIPSTAT));
460 seq_printf(m, "DPINVGTT:\t%08x\n",
461 I915_READ(DPINVGTT));
463 } else if (!HAS_PCH_SPLIT(dev)) {
464 seq_printf(m, "Interrupt enable: %08x\n",
466 seq_printf(m, "Interrupt identity: %08x\n",
468 seq_printf(m, "Interrupt mask: %08x\n",
471 seq_printf(m, "Pipe %c stat: %08x\n",
473 I915_READ(PIPESTAT(pipe)));
475 seq_printf(m, "North Display Interrupt enable: %08x\n",
477 seq_printf(m, "North Display Interrupt identity: %08x\n",
479 seq_printf(m, "North Display Interrupt mask: %08x\n",
481 seq_printf(m, "South Display Interrupt enable: %08x\n",
483 seq_printf(m, "South Display Interrupt identity: %08x\n",
485 seq_printf(m, "South Display Interrupt mask: %08x\n",
487 seq_printf(m, "Graphics Interrupt enable: %08x\n",
489 seq_printf(m, "Graphics Interrupt identity: %08x\n",
491 seq_printf(m, "Graphics Interrupt mask: %08x\n",
494 seq_printf(m, "Interrupts received: %d\n",
495 atomic_read(&dev_priv->irq_received));
496 for_each_ring(ring, dev_priv, i) {
497 if (IS_GEN6(dev) || IS_GEN7(dev)) {
499 "Graphics Interrupt mask (%s): %08x\n",
500 ring->name, I915_READ_IMR(ring));
502 i915_ring_seqno_info(m, ring);
504 mutex_unlock(&dev->struct_mutex);
509 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
511 struct drm_info_node *node = (struct drm_info_node *) m->private;
512 struct drm_device *dev = node->minor->dev;
513 drm_i915_private_t *dev_priv = dev->dev_private;
516 ret = mutex_lock_interruptible(&dev->struct_mutex);
520 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
521 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
522 for (i = 0; i < dev_priv->num_fence_regs; i++) {
523 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
525 seq_printf(m, "Fence %d, pin count = %d, object = ",
526 i, dev_priv->fence_regs[i].pin_count);
528 seq_printf(m, "unused");
530 describe_obj(m, obj);
534 mutex_unlock(&dev->struct_mutex);
538 static int i915_hws_info(struct seq_file *m, void *data)
540 struct drm_info_node *node = (struct drm_info_node *) m->private;
541 struct drm_device *dev = node->minor->dev;
542 drm_i915_private_t *dev_priv = dev->dev_private;
543 struct intel_ring_buffer *ring;
544 const volatile u32 __iomem *hws;
547 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
548 hws = (volatile u32 __iomem *)ring->status_page.page_addr;
552 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
553 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
555 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
560 static const char *ring_str(int ring)
563 case RCS: return "render";
564 case VCS: return "bsd";
565 case BCS: return "blt";
570 static const char *pin_flag(int pinned)
580 static const char *tiling_flag(int tiling)
584 case I915_TILING_NONE: return "";
585 case I915_TILING_X: return " X";
586 case I915_TILING_Y: return " Y";
590 static const char *dirty_flag(int dirty)
592 return dirty ? " dirty" : "";
595 static const char *purgeable_flag(int purgeable)
597 return purgeable ? " purgeable" : "";
600 static void print_error_buffers(struct seq_file *m,
602 struct drm_i915_error_buffer *err,
605 seq_printf(m, "%s [%d]:\n", name, count);
608 seq_printf(m, " %08x %8u %04x %04x %x %x%s%s%s%s%s%s%s",
613 err->rseqno, err->wseqno,
614 pin_flag(err->pinned),
615 tiling_flag(err->tiling),
616 dirty_flag(err->dirty),
617 purgeable_flag(err->purgeable),
618 err->ring != -1 ? " " : "",
620 cache_level_str(err->cache_level));
623 seq_printf(m, " (name: %d)", err->name);
624 if (err->fence_reg != I915_FENCE_REG_NONE)
625 seq_printf(m, " (fence: %d)", err->fence_reg);
632 static void i915_ring_error_state(struct seq_file *m,
633 struct drm_device *dev,
634 struct drm_i915_error_state *error,
637 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
638 seq_printf(m, "%s command stream:\n", ring_str(ring));
639 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
640 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
641 seq_printf(m, " CTL: 0x%08x\n", error->ctl[ring]);
642 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
643 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
644 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
645 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]);
646 if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
647 seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr);
649 if (INTEL_INFO(dev)->gen >= 4)
650 seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]);
651 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]);
652 seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]);
653 if (INTEL_INFO(dev)->gen >= 6) {
654 seq_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
655 seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
656 seq_printf(m, " SYNC_0: 0x%08x [last synced 0x%08x]\n",
657 error->semaphore_mboxes[ring][0],
658 error->semaphore_seqno[ring][0]);
659 seq_printf(m, " SYNC_1: 0x%08x [last synced 0x%08x]\n",
660 error->semaphore_mboxes[ring][1],
661 error->semaphore_seqno[ring][1]);
663 seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]);
664 seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring]));
665 seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
666 seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
669 struct i915_error_state_file_priv {
670 struct drm_device *dev;
671 struct drm_i915_error_state *error;
674 static int i915_error_state(struct seq_file *m, void *unused)
676 struct i915_error_state_file_priv *error_priv = m->private;
677 struct drm_device *dev = error_priv->dev;
678 drm_i915_private_t *dev_priv = dev->dev_private;
679 struct drm_i915_error_state *error = error_priv->error;
680 struct intel_ring_buffer *ring;
681 int i, j, page, offset, elt;
684 seq_printf(m, "no error state collected\n");
688 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
689 error->time.tv_usec);
690 seq_printf(m, "Kernel: " UTS_RELEASE "\n");
691 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
692 seq_printf(m, "EIR: 0x%08x\n", error->eir);
693 seq_printf(m, "IER: 0x%08x\n", error->ier);
694 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
695 seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
696 seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
697 seq_printf(m, "CCID: 0x%08x\n", error->ccid);
699 for (i = 0; i < dev_priv->num_fence_regs; i++)
700 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
702 for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
703 seq_printf(m, " INSTDONE_%d: 0x%08x\n", i, error->extra_instdone[i]);
705 if (INTEL_INFO(dev)->gen >= 6) {
706 seq_printf(m, "ERROR: 0x%08x\n", error->error);
707 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
710 if (INTEL_INFO(dev)->gen == 7)
711 seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
713 for_each_ring(ring, dev_priv, i)
714 i915_ring_error_state(m, dev, error, i);
716 if (error->active_bo)
717 print_error_buffers(m, "Active",
719 error->active_bo_count);
721 if (error->pinned_bo)
722 print_error_buffers(m, "Pinned",
724 error->pinned_bo_count);
726 for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
727 struct drm_i915_error_object *obj;
729 if ((obj = error->ring[i].batchbuffer)) {
730 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
731 dev_priv->ring[i].name,
734 for (page = 0; page < obj->page_count; page++) {
735 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
736 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
742 if (error->ring[i].num_requests) {
743 seq_printf(m, "%s --- %d requests\n",
744 dev_priv->ring[i].name,
745 error->ring[i].num_requests);
746 for (j = 0; j < error->ring[i].num_requests; j++) {
747 seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
748 error->ring[i].requests[j].seqno,
749 error->ring[i].requests[j].jiffies,
750 error->ring[i].requests[j].tail);
754 if ((obj = error->ring[i].ringbuffer)) {
755 seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
756 dev_priv->ring[i].name,
759 for (page = 0; page < obj->page_count; page++) {
760 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
761 seq_printf(m, "%08x : %08x\n",
763 obj->pages[page][elt]);
771 intel_overlay_print_error_state(m, error->overlay);
774 intel_display_print_error_state(m, dev, error->display);
780 i915_error_state_write(struct file *filp,
781 const char __user *ubuf,
785 struct seq_file *m = filp->private_data;
786 struct i915_error_state_file_priv *error_priv = m->private;
787 struct drm_device *dev = error_priv->dev;
790 DRM_DEBUG_DRIVER("Resetting error state\n");
792 ret = mutex_lock_interruptible(&dev->struct_mutex);
796 i915_destroy_error_state(dev);
797 mutex_unlock(&dev->struct_mutex);
802 static int i915_error_state_open(struct inode *inode, struct file *file)
804 struct drm_device *dev = inode->i_private;
805 drm_i915_private_t *dev_priv = dev->dev_private;
806 struct i915_error_state_file_priv *error_priv;
809 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
813 error_priv->dev = dev;
815 spin_lock_irqsave(&dev_priv->error_lock, flags);
816 error_priv->error = dev_priv->first_error;
817 if (error_priv->error)
818 kref_get(&error_priv->error->ref);
819 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
821 return single_open(file, i915_error_state, error_priv);
824 static int i915_error_state_release(struct inode *inode, struct file *file)
826 struct seq_file *m = file->private_data;
827 struct i915_error_state_file_priv *error_priv = m->private;
829 if (error_priv->error)
830 kref_put(&error_priv->error->ref, i915_error_state_free);
833 return single_release(inode, file);
836 static const struct file_operations i915_error_state_fops = {
837 .owner = THIS_MODULE,
838 .open = i915_error_state_open,
840 .write = i915_error_state_write,
841 .llseek = default_llseek,
842 .release = i915_error_state_release,
845 static int i915_rstdby_delays(struct seq_file *m, void *unused)
847 struct drm_info_node *node = (struct drm_info_node *) m->private;
848 struct drm_device *dev = node->minor->dev;
849 drm_i915_private_t *dev_priv = dev->dev_private;
853 ret = mutex_lock_interruptible(&dev->struct_mutex);
857 crstanddelay = I915_READ16(CRSTANDVID);
859 mutex_unlock(&dev->struct_mutex);
861 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
866 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
868 struct drm_info_node *node = (struct drm_info_node *) m->private;
869 struct drm_device *dev = node->minor->dev;
870 drm_i915_private_t *dev_priv = dev->dev_private;
874 u16 rgvswctl = I915_READ16(MEMSWCTL);
875 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
877 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
878 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
879 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
881 seq_printf(m, "Current P-state: %d\n",
882 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
883 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
884 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
885 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
886 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
888 u32 rpupei, rpcurup, rpprevup;
889 u32 rpdownei, rpcurdown, rpprevdown;
892 /* RPSTAT1 is in the GT power well */
893 ret = mutex_lock_interruptible(&dev->struct_mutex);
897 gen6_gt_force_wake_get(dev_priv);
899 rpstat = I915_READ(GEN6_RPSTAT1);
900 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
901 rpcurup = I915_READ(GEN6_RP_CUR_UP);
902 rpprevup = I915_READ(GEN6_RP_PREV_UP);
903 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
904 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
905 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
907 cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
909 cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
910 cagf *= GT_FREQUENCY_MULTIPLIER;
912 gen6_gt_force_wake_put(dev_priv);
913 mutex_unlock(&dev->struct_mutex);
915 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
916 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
917 seq_printf(m, "Render p-state ratio: %d\n",
918 (gt_perf_status & 0xff00) >> 8);
919 seq_printf(m, "Render p-state VID: %d\n",
920 gt_perf_status & 0xff);
921 seq_printf(m, "Render p-state limit: %d\n",
922 rp_state_limits & 0xff);
923 seq_printf(m, "CAGF: %dMHz\n", cagf);
924 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
926 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
927 GEN6_CURBSYTAVG_MASK);
928 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
929 GEN6_CURBSYTAVG_MASK);
930 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
932 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
933 GEN6_CURBSYTAVG_MASK);
934 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
935 GEN6_CURBSYTAVG_MASK);
937 max_freq = (rp_state_cap & 0xff0000) >> 16;
938 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
939 max_freq * GT_FREQUENCY_MULTIPLIER);
941 max_freq = (rp_state_cap & 0xff00) >> 8;
942 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
943 max_freq * GT_FREQUENCY_MULTIPLIER);
945 max_freq = rp_state_cap & 0xff;
946 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
947 max_freq * GT_FREQUENCY_MULTIPLIER);
949 seq_printf(m, "no P-state info available\n");
955 static int i915_delayfreq_table(struct seq_file *m, void *unused)
957 struct drm_info_node *node = (struct drm_info_node *) m->private;
958 struct drm_device *dev = node->minor->dev;
959 drm_i915_private_t *dev_priv = dev->dev_private;
963 ret = mutex_lock_interruptible(&dev->struct_mutex);
967 for (i = 0; i < 16; i++) {
968 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
969 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
970 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
973 mutex_unlock(&dev->struct_mutex);
978 static inline int MAP_TO_MV(int map)
980 return 1250 - (map * 25);
983 static int i915_inttoext_table(struct seq_file *m, void *unused)
985 struct drm_info_node *node = (struct drm_info_node *) m->private;
986 struct drm_device *dev = node->minor->dev;
987 drm_i915_private_t *dev_priv = dev->dev_private;
991 ret = mutex_lock_interruptible(&dev->struct_mutex);
995 for (i = 1; i <= 32; i++) {
996 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
997 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1000 mutex_unlock(&dev->struct_mutex);
1005 static int ironlake_drpc_info(struct seq_file *m)
1007 struct drm_info_node *node = (struct drm_info_node *) m->private;
1008 struct drm_device *dev = node->minor->dev;
1009 drm_i915_private_t *dev_priv = dev->dev_private;
1010 u32 rgvmodectl, rstdbyctl;
1014 ret = mutex_lock_interruptible(&dev->struct_mutex);
1018 rgvmodectl = I915_READ(MEMMODECTL);
1019 rstdbyctl = I915_READ(RSTDBYCTL);
1020 crstandvid = I915_READ16(CRSTANDVID);
1022 mutex_unlock(&dev->struct_mutex);
1024 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1026 seq_printf(m, "Boost freq: %d\n",
1027 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1028 MEMMODE_BOOST_FREQ_SHIFT);
1029 seq_printf(m, "HW control enabled: %s\n",
1030 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1031 seq_printf(m, "SW control enabled: %s\n",
1032 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1033 seq_printf(m, "Gated voltage change: %s\n",
1034 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1035 seq_printf(m, "Starting frequency: P%d\n",
1036 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1037 seq_printf(m, "Max P-state: P%d\n",
1038 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1039 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1040 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1041 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1042 seq_printf(m, "Render standby enabled: %s\n",
1043 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1044 seq_printf(m, "Current RS state: ");
1045 switch (rstdbyctl & RSX_STATUS_MASK) {
1047 seq_printf(m, "on\n");
1049 case RSX_STATUS_RC1:
1050 seq_printf(m, "RC1\n");
1052 case RSX_STATUS_RC1E:
1053 seq_printf(m, "RC1E\n");
1055 case RSX_STATUS_RS1:
1056 seq_printf(m, "RS1\n");
1058 case RSX_STATUS_RS2:
1059 seq_printf(m, "RS2 (RC6)\n");
1061 case RSX_STATUS_RS3:
1062 seq_printf(m, "RC3 (RC6+)\n");
1065 seq_printf(m, "unknown\n");
1072 static int gen6_drpc_info(struct seq_file *m)
1075 struct drm_info_node *node = (struct drm_info_node *) m->private;
1076 struct drm_device *dev = node->minor->dev;
1077 struct drm_i915_private *dev_priv = dev->dev_private;
1078 u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
1079 unsigned forcewake_count;
1083 ret = mutex_lock_interruptible(&dev->struct_mutex);
1087 spin_lock_irq(&dev_priv->gt_lock);
1088 forcewake_count = dev_priv->forcewake_count;
1089 spin_unlock_irq(&dev_priv->gt_lock);
1091 if (forcewake_count) {
1092 seq_printf(m, "RC information inaccurate because somebody "
1093 "holds a forcewake reference \n");
1095 /* NB: we cannot use forcewake, else we read the wrong values */
1096 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1098 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1101 gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1102 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1104 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1105 rcctl1 = I915_READ(GEN6_RC_CONTROL);
1106 mutex_unlock(&dev->struct_mutex);
1107 mutex_lock(&dev_priv->rps.hw_lock);
1108 sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
1109 mutex_unlock(&dev_priv->rps.hw_lock);
1111 seq_printf(m, "Video Turbo Mode: %s\n",
1112 yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1113 seq_printf(m, "HW control enabled: %s\n",
1114 yesno(rpmodectl1 & GEN6_RP_ENABLE));
1115 seq_printf(m, "SW control enabled: %s\n",
1116 yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1117 GEN6_RP_MEDIA_SW_MODE));
1118 seq_printf(m, "RC1e Enabled: %s\n",
1119 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1120 seq_printf(m, "RC6 Enabled: %s\n",
1121 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1122 seq_printf(m, "Deep RC6 Enabled: %s\n",
1123 yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1124 seq_printf(m, "Deepest RC6 Enabled: %s\n",
1125 yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1126 seq_printf(m, "Current RC state: ");
1127 switch (gt_core_status & GEN6_RCn_MASK) {
1129 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1130 seq_printf(m, "Core Power Down\n");
1132 seq_printf(m, "on\n");
1135 seq_printf(m, "RC3\n");
1138 seq_printf(m, "RC6\n");
1141 seq_printf(m, "RC7\n");
1144 seq_printf(m, "Unknown\n");
1148 seq_printf(m, "Core Power Down: %s\n",
1149 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1151 /* Not exactly sure what this is */
1152 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1153 I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1154 seq_printf(m, "RC6 residency since boot: %u\n",
1155 I915_READ(GEN6_GT_GFX_RC6));
1156 seq_printf(m, "RC6+ residency since boot: %u\n",
1157 I915_READ(GEN6_GT_GFX_RC6p));
1158 seq_printf(m, "RC6++ residency since boot: %u\n",
1159 I915_READ(GEN6_GT_GFX_RC6pp));
1161 seq_printf(m, "RC6 voltage: %dmV\n",
1162 GEN6_DECODE_RC6_VID(((rc6vids >> 0) & 0xff)));
1163 seq_printf(m, "RC6+ voltage: %dmV\n",
1164 GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff)));
1165 seq_printf(m, "RC6++ voltage: %dmV\n",
1166 GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));
1170 static int i915_drpc_info(struct seq_file *m, void *unused)
1172 struct drm_info_node *node = (struct drm_info_node *) m->private;
1173 struct drm_device *dev = node->minor->dev;
1175 if (IS_GEN6(dev) || IS_GEN7(dev))
1176 return gen6_drpc_info(m);
1178 return ironlake_drpc_info(m);
1181 static int i915_fbc_status(struct seq_file *m, void *unused)
1183 struct drm_info_node *node = (struct drm_info_node *) m->private;
1184 struct drm_device *dev = node->minor->dev;
1185 drm_i915_private_t *dev_priv = dev->dev_private;
1187 if (!I915_HAS_FBC(dev)) {
1188 seq_printf(m, "FBC unsupported on this chipset\n");
1192 if (intel_fbc_enabled(dev)) {
1193 seq_printf(m, "FBC enabled\n");
1195 seq_printf(m, "FBC disabled: ");
1196 switch (dev_priv->no_fbc_reason) {
1198 seq_printf(m, "no outputs");
1200 case FBC_STOLEN_TOO_SMALL:
1201 seq_printf(m, "not enough stolen memory");
1203 case FBC_UNSUPPORTED_MODE:
1204 seq_printf(m, "mode not supported");
1206 case FBC_MODE_TOO_LARGE:
1207 seq_printf(m, "mode too large");
1210 seq_printf(m, "FBC unsupported on plane");
1213 seq_printf(m, "scanout buffer not tiled");
1215 case FBC_MULTIPLE_PIPES:
1216 seq_printf(m, "multiple pipes are enabled");
1218 case FBC_MODULE_PARAM:
1219 seq_printf(m, "disabled per module param (default off)");
1222 seq_printf(m, "unknown reason");
1224 seq_printf(m, "\n");
1229 static int i915_sr_status(struct seq_file *m, void *unused)
1231 struct drm_info_node *node = (struct drm_info_node *) m->private;
1232 struct drm_device *dev = node->minor->dev;
1233 drm_i915_private_t *dev_priv = dev->dev_private;
1234 bool sr_enabled = false;
1236 if (HAS_PCH_SPLIT(dev))
1237 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1238 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1239 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1240 else if (IS_I915GM(dev))
1241 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1242 else if (IS_PINEVIEW(dev))
1243 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1245 seq_printf(m, "self-refresh: %s\n",
1246 sr_enabled ? "enabled" : "disabled");
1251 static int i915_emon_status(struct seq_file *m, void *unused)
1253 struct drm_info_node *node = (struct drm_info_node *) m->private;
1254 struct drm_device *dev = node->minor->dev;
1255 drm_i915_private_t *dev_priv = dev->dev_private;
1256 unsigned long temp, chipset, gfx;
1262 ret = mutex_lock_interruptible(&dev->struct_mutex);
1266 temp = i915_mch_val(dev_priv);
1267 chipset = i915_chipset_val(dev_priv);
1268 gfx = i915_gfx_val(dev_priv);
1269 mutex_unlock(&dev->struct_mutex);
1271 seq_printf(m, "GMCH temp: %ld\n", temp);
1272 seq_printf(m, "Chipset power: %ld\n", chipset);
1273 seq_printf(m, "GFX power: %ld\n", gfx);
1274 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1279 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1281 struct drm_info_node *node = (struct drm_info_node *) m->private;
1282 struct drm_device *dev = node->minor->dev;
1283 drm_i915_private_t *dev_priv = dev->dev_private;
1285 int gpu_freq, ia_freq;
1287 if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1288 seq_printf(m, "unsupported on this chipset\n");
1292 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1296 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1298 for (gpu_freq = dev_priv->rps.min_delay;
1299 gpu_freq <= dev_priv->rps.max_delay;
1302 sandybridge_pcode_read(dev_priv,
1303 GEN6_PCODE_READ_MIN_FREQ_TABLE,
1305 seq_printf(m, "%d\t\t%d\n", gpu_freq * GT_FREQUENCY_MULTIPLIER, ia_freq * 100);
1308 mutex_unlock(&dev_priv->rps.hw_lock);
1313 static int i915_gfxec(struct seq_file *m, void *unused)
1315 struct drm_info_node *node = (struct drm_info_node *) m->private;
1316 struct drm_device *dev = node->minor->dev;
1317 drm_i915_private_t *dev_priv = dev->dev_private;
1320 ret = mutex_lock_interruptible(&dev->struct_mutex);
1324 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1326 mutex_unlock(&dev->struct_mutex);
1331 static int i915_opregion(struct seq_file *m, void *unused)
1333 struct drm_info_node *node = (struct drm_info_node *) m->private;
1334 struct drm_device *dev = node->minor->dev;
1335 drm_i915_private_t *dev_priv = dev->dev_private;
1336 struct intel_opregion *opregion = &dev_priv->opregion;
1337 void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1343 ret = mutex_lock_interruptible(&dev->struct_mutex);
1347 if (opregion->header) {
1348 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1349 seq_write(m, data, OPREGION_SIZE);
1352 mutex_unlock(&dev->struct_mutex);
1359 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1361 struct drm_info_node *node = (struct drm_info_node *) m->private;
1362 struct drm_device *dev = node->minor->dev;
1363 drm_i915_private_t *dev_priv = dev->dev_private;
1364 struct intel_fbdev *ifbdev;
1365 struct intel_framebuffer *fb;
1368 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1372 ifbdev = dev_priv->fbdev;
1373 fb = to_intel_framebuffer(ifbdev->helper.fb);
1375 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1379 fb->base.bits_per_pixel);
1380 describe_obj(m, fb->obj);
1381 seq_printf(m, "\n");
1383 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1384 if (&fb->base == ifbdev->helper.fb)
1387 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1391 fb->base.bits_per_pixel);
1392 describe_obj(m, fb->obj);
1393 seq_printf(m, "\n");
1396 mutex_unlock(&dev->mode_config.mutex);
1401 static int i915_context_status(struct seq_file *m, void *unused)
1403 struct drm_info_node *node = (struct drm_info_node *) m->private;
1404 struct drm_device *dev = node->minor->dev;
1405 drm_i915_private_t *dev_priv = dev->dev_private;
1408 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1412 if (dev_priv->ips.pwrctx) {
1413 seq_printf(m, "power context ");
1414 describe_obj(m, dev_priv->ips.pwrctx);
1415 seq_printf(m, "\n");
1418 if (dev_priv->ips.renderctx) {
1419 seq_printf(m, "render context ");
1420 describe_obj(m, dev_priv->ips.renderctx);
1421 seq_printf(m, "\n");
1424 mutex_unlock(&dev->mode_config.mutex);
1429 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1431 struct drm_info_node *node = (struct drm_info_node *) m->private;
1432 struct drm_device *dev = node->minor->dev;
1433 struct drm_i915_private *dev_priv = dev->dev_private;
1434 unsigned forcewake_count;
1436 spin_lock_irq(&dev_priv->gt_lock);
1437 forcewake_count = dev_priv->forcewake_count;
1438 spin_unlock_irq(&dev_priv->gt_lock);
1440 seq_printf(m, "forcewake count = %u\n", forcewake_count);
1445 static const char *swizzle_string(unsigned swizzle)
1448 case I915_BIT_6_SWIZZLE_NONE:
1450 case I915_BIT_6_SWIZZLE_9:
1452 case I915_BIT_6_SWIZZLE_9_10:
1453 return "bit9/bit10";
1454 case I915_BIT_6_SWIZZLE_9_11:
1455 return "bit9/bit11";
1456 case I915_BIT_6_SWIZZLE_9_10_11:
1457 return "bit9/bit10/bit11";
1458 case I915_BIT_6_SWIZZLE_9_17:
1459 return "bit9/bit17";
1460 case I915_BIT_6_SWIZZLE_9_10_17:
1461 return "bit9/bit10/bit17";
1462 case I915_BIT_6_SWIZZLE_UNKNOWN:
1469 static int i915_swizzle_info(struct seq_file *m, void *data)
1471 struct drm_info_node *node = (struct drm_info_node *) m->private;
1472 struct drm_device *dev = node->minor->dev;
1473 struct drm_i915_private *dev_priv = dev->dev_private;
1476 ret = mutex_lock_interruptible(&dev->struct_mutex);
1480 seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1481 swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1482 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1483 swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1485 if (IS_GEN3(dev) || IS_GEN4(dev)) {
1486 seq_printf(m, "DDC = 0x%08x\n",
1488 seq_printf(m, "C0DRB3 = 0x%04x\n",
1489 I915_READ16(C0DRB3));
1490 seq_printf(m, "C1DRB3 = 0x%04x\n",
1491 I915_READ16(C1DRB3));
1492 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1493 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1494 I915_READ(MAD_DIMM_C0));
1495 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1496 I915_READ(MAD_DIMM_C1));
1497 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1498 I915_READ(MAD_DIMM_C2));
1499 seq_printf(m, "TILECTL = 0x%08x\n",
1500 I915_READ(TILECTL));
1501 seq_printf(m, "ARB_MODE = 0x%08x\n",
1502 I915_READ(ARB_MODE));
1503 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1504 I915_READ(DISP_ARB_CTL));
1506 mutex_unlock(&dev->struct_mutex);
1511 static int i915_ppgtt_info(struct seq_file *m, void *data)
1513 struct drm_info_node *node = (struct drm_info_node *) m->private;
1514 struct drm_device *dev = node->minor->dev;
1515 struct drm_i915_private *dev_priv = dev->dev_private;
1516 struct intel_ring_buffer *ring;
1520 ret = mutex_lock_interruptible(&dev->struct_mutex);
1523 if (INTEL_INFO(dev)->gen == 6)
1524 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1526 for_each_ring(ring, dev_priv, i) {
1527 seq_printf(m, "%s\n", ring->name);
1528 if (INTEL_INFO(dev)->gen == 7)
1529 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1530 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1531 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1532 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1534 if (dev_priv->mm.aliasing_ppgtt) {
1535 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1537 seq_printf(m, "aliasing PPGTT:\n");
1538 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1540 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1541 mutex_unlock(&dev->struct_mutex);
1546 static int i915_dpio_info(struct seq_file *m, void *data)
1548 struct drm_info_node *node = (struct drm_info_node *) m->private;
1549 struct drm_device *dev = node->minor->dev;
1550 struct drm_i915_private *dev_priv = dev->dev_private;
1554 if (!IS_VALLEYVIEW(dev)) {
1555 seq_printf(m, "unsupported\n");
1559 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1563 seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1565 seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1566 intel_dpio_read(dev_priv, _DPIO_DIV_A));
1567 seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1568 intel_dpio_read(dev_priv, _DPIO_DIV_B));
1570 seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1571 intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1572 seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1573 intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1575 seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1576 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1577 seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1578 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1580 seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1581 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1582 seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1583 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1585 seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1586 intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1588 mutex_unlock(&dev->mode_config.mutex);
1594 i915_wedged_read(struct file *filp,
1599 struct drm_device *dev = filp->private_data;
1600 drm_i915_private_t *dev_priv = dev->dev_private;
1604 len = snprintf(buf, sizeof(buf),
1606 atomic_read(&dev_priv->mm.wedged));
1608 if (len > sizeof(buf))
1611 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1615 i915_wedged_write(struct file *filp,
1616 const char __user *ubuf,
1620 struct drm_device *dev = filp->private_data;
1625 if (cnt > sizeof(buf) - 1)
1628 if (copy_from_user(buf, ubuf, cnt))
1632 val = simple_strtoul(buf, NULL, 0);
1635 DRM_INFO("Manually setting wedged to %d\n", val);
1636 i915_handle_error(dev, val);
1641 static const struct file_operations i915_wedged_fops = {
1642 .owner = THIS_MODULE,
1643 .open = simple_open,
1644 .read = i915_wedged_read,
1645 .write = i915_wedged_write,
1646 .llseek = default_llseek,
1650 i915_ring_stop_read(struct file *filp,
1655 struct drm_device *dev = filp->private_data;
1656 drm_i915_private_t *dev_priv = dev->dev_private;
1660 len = snprintf(buf, sizeof(buf),
1661 "0x%08x\n", dev_priv->stop_rings);
1663 if (len > sizeof(buf))
1666 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1670 i915_ring_stop_write(struct file *filp,
1671 const char __user *ubuf,
1675 struct drm_device *dev = filp->private_data;
1676 struct drm_i915_private *dev_priv = dev->dev_private;
1681 if (cnt > sizeof(buf) - 1)
1684 if (copy_from_user(buf, ubuf, cnt))
1688 val = simple_strtoul(buf, NULL, 0);
1691 DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1693 ret = mutex_lock_interruptible(&dev->struct_mutex);
1697 dev_priv->stop_rings = val;
1698 mutex_unlock(&dev->struct_mutex);
1703 static const struct file_operations i915_ring_stop_fops = {
1704 .owner = THIS_MODULE,
1705 .open = simple_open,
1706 .read = i915_ring_stop_read,
1707 .write = i915_ring_stop_write,
1708 .llseek = default_llseek,
1712 i915_max_freq_read(struct file *filp,
1717 struct drm_device *dev = filp->private_data;
1718 drm_i915_private_t *dev_priv = dev->dev_private;
1722 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1725 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1729 len = snprintf(buf, sizeof(buf),
1730 "max freq: %d\n", dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER);
1731 mutex_unlock(&dev_priv->rps.hw_lock);
1733 if (len > sizeof(buf))
1736 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1740 i915_max_freq_write(struct file *filp,
1741 const char __user *ubuf,
1745 struct drm_device *dev = filp->private_data;
1746 struct drm_i915_private *dev_priv = dev->dev_private;
1750 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1754 if (cnt > sizeof(buf) - 1)
1757 if (copy_from_user(buf, ubuf, cnt))
1761 val = simple_strtoul(buf, NULL, 0);
1764 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1766 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1771 * Turbo will still be enabled, but won't go above the set value.
1773 dev_priv->rps.max_delay = val / GT_FREQUENCY_MULTIPLIER;
1775 gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
1776 mutex_unlock(&dev_priv->rps.hw_lock);
1781 static const struct file_operations i915_max_freq_fops = {
1782 .owner = THIS_MODULE,
1783 .open = simple_open,
1784 .read = i915_max_freq_read,
1785 .write = i915_max_freq_write,
1786 .llseek = default_llseek,
1790 i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1793 struct drm_device *dev = filp->private_data;
1794 drm_i915_private_t *dev_priv = dev->dev_private;
1798 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1801 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1805 len = snprintf(buf, sizeof(buf),
1806 "min freq: %d\n", dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER);
1807 mutex_unlock(&dev_priv->rps.hw_lock);
1809 if (len > sizeof(buf))
1812 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1816 i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1819 struct drm_device *dev = filp->private_data;
1820 struct drm_i915_private *dev_priv = dev->dev_private;
1824 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1828 if (cnt > sizeof(buf) - 1)
1831 if (copy_from_user(buf, ubuf, cnt))
1835 val = simple_strtoul(buf, NULL, 0);
1838 DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1840 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1845 * Turbo will still be enabled, but won't go below the set value.
1847 dev_priv->rps.min_delay = val / GT_FREQUENCY_MULTIPLIER;
1849 gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
1850 mutex_unlock(&dev_priv->rps.hw_lock);
1855 static const struct file_operations i915_min_freq_fops = {
1856 .owner = THIS_MODULE,
1857 .open = simple_open,
1858 .read = i915_min_freq_read,
1859 .write = i915_min_freq_write,
1860 .llseek = default_llseek,
1864 i915_cache_sharing_read(struct file *filp,
1869 struct drm_device *dev = filp->private_data;
1870 drm_i915_private_t *dev_priv = dev->dev_private;
1875 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1878 ret = mutex_lock_interruptible(&dev->struct_mutex);
1882 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1883 mutex_unlock(&dev_priv->dev->struct_mutex);
1885 len = snprintf(buf, sizeof(buf),
1886 "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1887 GEN6_MBC_SNPCR_SHIFT);
1889 if (len > sizeof(buf))
1892 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1896 i915_cache_sharing_write(struct file *filp,
1897 const char __user *ubuf,
1901 struct drm_device *dev = filp->private_data;
1902 struct drm_i915_private *dev_priv = dev->dev_private;
1907 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1911 if (cnt > sizeof(buf) - 1)
1914 if (copy_from_user(buf, ubuf, cnt))
1918 val = simple_strtoul(buf, NULL, 0);
1921 if (val < 0 || val > 3)
1924 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1926 /* Update the cache sharing policy here as well */
1927 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1928 snpcr &= ~GEN6_MBC_SNPCR_MASK;
1929 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1930 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1935 static const struct file_operations i915_cache_sharing_fops = {
1936 .owner = THIS_MODULE,
1937 .open = simple_open,
1938 .read = i915_cache_sharing_read,
1939 .write = i915_cache_sharing_write,
1940 .llseek = default_llseek,
1943 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1944 * allocated we need to hook into the minor for release. */
1946 drm_add_fake_info_node(struct drm_minor *minor,
1950 struct drm_info_node *node;
1952 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1954 debugfs_remove(ent);
1958 node->minor = minor;
1960 node->info_ent = (void *) key;
1962 mutex_lock(&minor->debugfs_lock);
1963 list_add(&node->list, &minor->debugfs_list);
1964 mutex_unlock(&minor->debugfs_lock);
1969 static int i915_forcewake_open(struct inode *inode, struct file *file)
1971 struct drm_device *dev = inode->i_private;
1972 struct drm_i915_private *dev_priv = dev->dev_private;
1974 if (INTEL_INFO(dev)->gen < 6)
1977 gen6_gt_force_wake_get(dev_priv);
1982 static int i915_forcewake_release(struct inode *inode, struct file *file)
1984 struct drm_device *dev = inode->i_private;
1985 struct drm_i915_private *dev_priv = dev->dev_private;
1987 if (INTEL_INFO(dev)->gen < 6)
1990 gen6_gt_force_wake_put(dev_priv);
1995 static const struct file_operations i915_forcewake_fops = {
1996 .owner = THIS_MODULE,
1997 .open = i915_forcewake_open,
1998 .release = i915_forcewake_release,
2001 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
2003 struct drm_device *dev = minor->dev;
2006 ent = debugfs_create_file("i915_forcewake_user",
2009 &i915_forcewake_fops);
2011 return PTR_ERR(ent);
2013 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
2016 static int i915_debugfs_create(struct dentry *root,
2017 struct drm_minor *minor,
2019 const struct file_operations *fops)
2021 struct drm_device *dev = minor->dev;
2024 ent = debugfs_create_file(name,
2029 return PTR_ERR(ent);
2031 return drm_add_fake_info_node(minor, ent, fops);
2034 static struct drm_info_list i915_debugfs_list[] = {
2035 {"i915_capabilities", i915_capabilities, 0},
2036 {"i915_gem_objects", i915_gem_object_info, 0},
2037 {"i915_gem_gtt", i915_gem_gtt_info, 0},
2038 {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2039 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2040 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2041 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2042 {"i915_gem_request", i915_gem_request_info, 0},
2043 {"i915_gem_seqno", i915_gem_seqno_info, 0},
2044 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2045 {"i915_gem_interrupt", i915_interrupt_info, 0},
2046 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2047 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2048 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2049 {"i915_rstdby_delays", i915_rstdby_delays, 0},
2050 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2051 {"i915_delayfreq_table", i915_delayfreq_table, 0},
2052 {"i915_inttoext_table", i915_inttoext_table, 0},
2053 {"i915_drpc_info", i915_drpc_info, 0},
2054 {"i915_emon_status", i915_emon_status, 0},
2055 {"i915_ring_freq_table", i915_ring_freq_table, 0},
2056 {"i915_gfxec", i915_gfxec, 0},
2057 {"i915_fbc_status", i915_fbc_status, 0},
2058 {"i915_sr_status", i915_sr_status, 0},
2059 {"i915_opregion", i915_opregion, 0},
2060 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2061 {"i915_context_status", i915_context_status, 0},
2062 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2063 {"i915_swizzle_info", i915_swizzle_info, 0},
2064 {"i915_ppgtt_info", i915_ppgtt_info, 0},
2065 {"i915_dpio", i915_dpio_info, 0},
2067 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2069 int i915_debugfs_init(struct drm_minor *minor)
2073 ret = i915_debugfs_create(minor->debugfs_root, minor,
2079 ret = i915_forcewake_create(minor->debugfs_root, minor);
2083 ret = i915_debugfs_create(minor->debugfs_root, minor,
2085 &i915_max_freq_fops);
2089 ret = i915_debugfs_create(minor->debugfs_root, minor,
2091 &i915_min_freq_fops);
2095 ret = i915_debugfs_create(minor->debugfs_root, minor,
2096 "i915_cache_sharing",
2097 &i915_cache_sharing_fops);
2101 ret = i915_debugfs_create(minor->debugfs_root, minor,
2103 &i915_ring_stop_fops);
2107 ret = i915_debugfs_create(minor->debugfs_root, minor,
2109 &i915_error_state_fops);
2113 return drm_debugfs_create_files(i915_debugfs_list,
2114 I915_DEBUGFS_ENTRIES,
2115 minor->debugfs_root, minor);
2118 void i915_debugfs_cleanup(struct drm_minor *minor)
2120 drm_debugfs_remove_files(i915_debugfs_list,
2121 I915_DEBUGFS_ENTRIES, minor);
2122 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2124 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2126 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2128 drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2130 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2132 drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2134 drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2138 #endif /* CONFIG_DEBUG_FS */