2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * $FreeBSD: head/sys/dev/drm2/radeon/ObjectID.h 254885 2013-08-25 19:37:15Z dumbbell $
24 /* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */
33 /****************************************************/
34 /* Graphics Object Type Definition */
35 /****************************************************/
36 #define GRAPH_OBJECT_TYPE_NONE 0x0
37 #define GRAPH_OBJECT_TYPE_GPU 0x1
38 #define GRAPH_OBJECT_TYPE_ENCODER 0x2
39 #define GRAPH_OBJECT_TYPE_CONNECTOR 0x3
40 #define GRAPH_OBJECT_TYPE_ROUTER 0x4
42 #define GRAPH_OBJECT_TYPE_DISPLAY_PATH 0x6
43 #define GRAPH_OBJECT_TYPE_GENERIC 0x7
45 /****************************************************/
46 /* Encoder Object ID Definition */
47 /****************************************************/
48 #define ENCODER_OBJECT_ID_NONE 0x00
50 /* Radeon Class Display Hardware */
51 #define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01
52 #define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02
53 #define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03
54 #define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04
55 #define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */
56 #define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06
57 #define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07
59 /* External Third Party Encoders */
60 #define ENCODER_OBJECT_ID_SI170B 0x08
61 #define ENCODER_OBJECT_ID_CH7303 0x09
62 #define ENCODER_OBJECT_ID_CH7301 0x0A
63 #define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to Radeon Class Display Hardware */
64 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C
65 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D
66 #define ENCODER_OBJECT_ID_TITFP513 0x0E
67 #define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for Radeon */
68 #define ENCODER_OBJECT_ID_VT1623 0x10
69 #define ENCODER_OBJECT_ID_HDMI_SI1930 0x11
70 #define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12
71 #define ENCODER_OBJECT_ID_ALMOND 0x22
72 #define ENCODER_OBJECT_ID_TRAVIS 0x23
73 #define ENCODER_OBJECT_ID_NUTMEG 0x22
74 /* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */
75 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13
76 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14
77 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15
78 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV and CRT */
79 #define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual link, no HDCP.) */
80 #define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */
81 #define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19
82 #define ENCODER_OBJECT_ID_VT1625 0x1A
83 #define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B
84 #define ENCODER_OBJECT_ID_DP_AN9801 0x1C
85 #define ENCODER_OBJECT_ID_DP_DP501 0x1D
86 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY 0x1E
87 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA 0x1F
88 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 0x20
89 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 0x21
90 #define ENCODER_OBJECT_ID_INTERNAL_VCE 0x24
92 #define ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO 0xFF
94 /****************************************************/
95 /* Connector Object ID Definition */
96 /****************************************************/
97 #define CONNECTOR_OBJECT_ID_NONE 0x00
98 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01
99 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02
100 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03
101 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D 0x04
102 #define CONNECTOR_OBJECT_ID_VGA 0x05
103 #define CONNECTOR_OBJECT_ID_COMPOSITE 0x06
104 #define CONNECTOR_OBJECT_ID_SVIDEO 0x07
105 #define CONNECTOR_OBJECT_ID_YPbPr 0x08
106 #define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09
107 #define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV & TV */
108 #define CONNECTOR_OBJECT_ID_SCART 0x0B
109 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C
110 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D
111 #define CONNECTOR_OBJECT_ID_LVDS 0x0E
112 #define CONNECTOR_OBJECT_ID_7PIN_DIN 0x0F
113 #define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR 0x10
114 #define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11
115 #define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12
116 #define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13
117 #define CONNECTOR_OBJECT_ID_eDP 0x14
118 #define CONNECTOR_OBJECT_ID_MXM 0x15
119 #define CONNECTOR_OBJECT_ID_LVDS_eDP 0x16
123 /****************************************************/
124 /* Router Object ID Definition */
125 /****************************************************/
126 #define ROUTER_OBJECT_ID_NONE 0x00
127 #define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01
129 /****************************************************/
130 /* Generic Object ID Definition */
131 /****************************************************/
132 #define GENERIC_OBJECT_ID_NONE 0x00
133 #define GENERIC_OBJECT_ID_GLSYNC 0x01
134 #define GENERIC_OBJECT_ID_PX2_NON_DRIVABLE 0x02
135 #define GENERIC_OBJECT_ID_MXM_OPM 0x03
136 #define GENERIC_OBJECT_ID_STEREO_PIN 0x04 //This object could show up from Misc Object table, it follows ATOM_OBJECT format, and contains one ATOM_OBJECT_GPIO_CNTL_RECORD for the stereo pin
138 /****************************************************/
139 /* Graphics Object ENUM ID Definition */
140 /****************************************************/
141 #define GRAPH_OBJECT_ENUM_ID1 0x01
142 #define GRAPH_OBJECT_ENUM_ID2 0x02
143 #define GRAPH_OBJECT_ENUM_ID3 0x03
144 #define GRAPH_OBJECT_ENUM_ID4 0x04
145 #define GRAPH_OBJECT_ENUM_ID5 0x05
146 #define GRAPH_OBJECT_ENUM_ID6 0x06
147 #define GRAPH_OBJECT_ENUM_ID7 0x07
149 /****************************************************/
150 /* Graphics Object ID Bit definition */
151 /****************************************************/
152 #define OBJECT_ID_MASK 0x00FF
153 #define ENUM_ID_MASK 0x0700
154 #define RESERVED1_ID_MASK 0x0800
155 #define OBJECT_TYPE_MASK 0x7000
156 #define RESERVED2_ID_MASK 0x8000
158 #define OBJECT_ID_SHIFT 0x00
159 #define ENUM_ID_SHIFT 0x08
160 #define OBJECT_TYPE_SHIFT 0x0C
163 /****************************************************/
164 /* Graphics Object family definition */
165 /****************************************************/
166 #define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
167 GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
168 /****************************************************/
169 /* GPU Object ID definition - Shared with BIOS */
170 /****************************************************/
171 #define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
172 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
174 /****************************************************/
175 /* Encoder Object ID definition - Shared with BIOS */
176 /****************************************************/
178 #define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101
179 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102
180 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103
181 #define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104
182 #define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105
183 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106
184 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107
185 #define ENCODER_SIL170B_ENUM_ID1 0x2108
186 #define ENCODER_CH7303_ENUM_ID1 0x2109
187 #define ENCODER_CH7301_ENUM_ID1 0x210A
188 #define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B
189 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 0x210C
190 #define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 0x210D
191 #define ENCODER_TITFP513_ENUM_ID1 0x210E
192 #define ENCODER_INTERNAL_LVTM1_ENUM_ID1 0x210F
193 #define ENCODER_VT1623_ENUM_ID1 0x2110
194 #define ENCODER_HDMI_SI1930_ENUM_ID1 0x2111
195 #define ENCODER_HDMI_INTERNAL_ENUM_ID1 0x2112
196 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113
197 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114
198 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115
199 #define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116
200 #define ENCODER_SI178_ENUM_ID1 0x2117
201 #define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118
202 #define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119
203 #define ENCODER_VT1625_ENUM_ID1 0x211A
204 #define ENCODER_HDMI_SI1932_ENUM_ID1 0x211B
205 #define ENCODER_ENCODER_DP_AN9801_ENUM_ID1 0x211C
206 #define ENCODER_DP_DP501_ENUM_ID1 0x211D
207 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E
209 #define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
210 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
211 ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
213 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
214 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
215 ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
217 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
218 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
219 ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
221 #define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
222 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
223 ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
225 #define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
226 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
227 ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
229 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
230 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
231 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
233 #define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
234 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
235 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
237 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
238 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
239 ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
241 #define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
242 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
243 ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
245 #define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
246 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
247 ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
249 #define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
250 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
251 ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
253 #define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
254 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
255 ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
257 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
258 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
259 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
261 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
262 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
263 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
266 #define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
267 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
268 ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
271 #define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
272 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
273 ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
275 #define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
276 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
277 ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
279 #define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
280 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
281 ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
283 #define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
284 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
285 ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
287 #define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
288 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
289 ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
291 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
292 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
293 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
296 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
297 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
298 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
301 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
302 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
303 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
305 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
306 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
307 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
309 #define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
310 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
311 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with CV/TV and CRT
313 #define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
314 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
315 ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
317 #define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
318 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
319 ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
321 #define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
322 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
323 ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
325 #define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
326 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
327 ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
329 #define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
330 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
331 ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
333 #define ENCODER_DP_DP501_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
334 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
335 ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
337 #define ENCODER_DP_AN9801_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
338 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
339 ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
341 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
342 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
343 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
345 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
346 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
347 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
349 #define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
350 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
351 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
353 #define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
354 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
355 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
357 #define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
358 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
359 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
361 #define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
362 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
363 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
365 #define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
366 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
367 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
369 #define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
370 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
371 ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
373 #define ENCODER_ALMOND_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
374 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
375 ENCODER_OBJECT_ID_ALMOND << OBJECT_ID_SHIFT)
377 #define ENCODER_ALMOND_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
378 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
379 ENCODER_OBJECT_ID_ALMOND << OBJECT_ID_SHIFT)
381 #define ENCODER_TRAVIS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
382 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
383 ENCODER_OBJECT_ID_TRAVIS << OBJECT_ID_SHIFT)
385 #define ENCODER_TRAVIS_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
386 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
387 ENCODER_OBJECT_ID_TRAVIS << OBJECT_ID_SHIFT)
389 #define ENCODER_NUTMEG_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
390 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
391 ENCODER_OBJECT_ID_NUTMEG << OBJECT_ID_SHIFT)
393 #define ENCODER_VCE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
394 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
395 ENCODER_OBJECT_ID_INTERNAL_VCE << OBJECT_ID_SHIFT)
397 /****************************************************/
398 /* Connector Object ID definition - Shared with BIOS */
399 /****************************************************/
401 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 0x3101
402 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 0x3102
403 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 0x3103
404 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 0x3104
405 #define CONNECTOR_VGA_ENUM_ID1 0x3105
406 #define CONNECTOR_COMPOSITE_ENUM_ID1 0x3106
407 #define CONNECTOR_SVIDEO_ENUM_ID1 0x3107
408 #define CONNECTOR_YPbPr_ENUM_ID1 0x3108
409 #define CONNECTOR_D_CONNECTORE_ENUM_ID1 0x3109
410 #define CONNECTOR_9PIN_DIN_ENUM_ID1 0x310A
411 #define CONNECTOR_SCART_ENUM_ID1 0x310B
412 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 0x310C
413 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 0x310D
414 #define CONNECTOR_LVDS_ENUM_ID1 0x310E
415 #define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F
416 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110
418 #define CONNECTOR_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
419 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
420 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
422 #define CONNECTOR_LVDS_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
423 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
424 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
426 #define CONNECTOR_eDP_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
427 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
428 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
430 #define CONNECTOR_eDP_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
431 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
432 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
434 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
435 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
436 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
438 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
439 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
440 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
442 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
443 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
444 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
446 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
447 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
448 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
450 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
451 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
452 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
454 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
455 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
456 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
458 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
459 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
460 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
462 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
463 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
464 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
466 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
467 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
468 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
470 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
471 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
472 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
474 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
475 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
476 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
478 #define CONNECTOR_VGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
479 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
480 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
482 #define CONNECTOR_VGA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
483 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
484 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
486 #define CONNECTOR_COMPOSITE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
487 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
488 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
490 #define CONNECTOR_COMPOSITE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
491 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
492 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
494 #define CONNECTOR_SVIDEO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
495 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
496 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
498 #define CONNECTOR_SVIDEO_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
499 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
500 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
502 #define CONNECTOR_YPbPr_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
503 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
504 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
506 #define CONNECTOR_YPbPr_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
507 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
508 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
510 #define CONNECTOR_D_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
511 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
512 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
514 #define CONNECTOR_D_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
515 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
516 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
518 #define CONNECTOR_9PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
519 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
520 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
522 #define CONNECTOR_9PIN_DIN_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
523 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
524 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
526 #define CONNECTOR_SCART_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
527 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
528 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
530 #define CONNECTOR_SCART_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
531 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
532 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
534 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
535 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
536 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
538 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
539 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
540 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
542 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
543 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
544 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
546 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
547 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
548 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
550 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
551 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
552 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
554 #define CONNECTOR_7PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
555 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
556 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
558 #define CONNECTOR_7PIN_DIN_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
559 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
560 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
562 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
563 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
564 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
566 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
567 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
568 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
570 #define CONNECTOR_CROSSFIRE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
571 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
572 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
574 #define CONNECTOR_CROSSFIRE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
575 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
576 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
579 #define CONNECTOR_HARDCODE_DVI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
580 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
581 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
583 #define CONNECTOR_HARDCODE_DVI_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
584 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
585 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
587 #define CONNECTOR_DISPLAYPORT_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
588 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
589 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
591 #define CONNECTOR_DISPLAYPORT_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
592 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
593 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
595 #define CONNECTOR_DISPLAYPORT_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
596 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
597 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
599 #define CONNECTOR_DISPLAYPORT_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
600 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
601 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
603 #define CONNECTOR_DISPLAYPORT_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
604 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
605 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
607 #define CONNECTOR_DISPLAYPORT_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
608 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
609 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
611 #define CONNECTOR_MXM_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
612 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
613 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_A
615 #define CONNECTOR_MXM_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
616 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
617 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_B
619 #define CONNECTOR_MXM_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
620 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
621 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_C
623 #define CONNECTOR_MXM_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
624 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
625 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_D
627 #define CONNECTOR_MXM_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
628 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
629 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_LVDS_TXxx
631 #define CONNECTOR_MXM_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
632 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
633 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_LVDS_UXxx
635 #define CONNECTOR_MXM_ENUM_ID7 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
636 GRAPH_OBJECT_ENUM_ID7 << ENUM_ID_SHIFT |\
637 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DAC
639 #define CONNECTOR_LVDS_eDP_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
640 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
641 CONNECTOR_OBJECT_ID_LVDS_eDP << OBJECT_ID_SHIFT)
643 #define CONNECTOR_LVDS_eDP_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
644 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
645 CONNECTOR_OBJECT_ID_LVDS_eDP << OBJECT_ID_SHIFT)
647 /****************************************************/
648 /* Router Object ID definition - Shared with BIOS */
649 /****************************************************/
650 #define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
651 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
652 ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
656 /****************************************************/
657 /* Generic Object ID definition - Shared with BIOS */
658 /****************************************************/
659 #define GENERICOBJECT_GLSYNC_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
660 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
661 GENERIC_OBJECT_ID_GLSYNC << OBJECT_ID_SHIFT)
663 #define GENERICOBJECT_PX2_NON_DRIVABLE_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
664 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
665 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
667 #define GENERICOBJECT_PX2_NON_DRIVABLE_ID2 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
668 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
669 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
671 #define GENERICOBJECT_MXM_OPM_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
672 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
673 GENERIC_OBJECT_ID_MXM_OPM << OBJECT_ID_SHIFT)
675 #define GENERICOBJECT_STEREO_PIN_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
676 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
677 GENERIC_OBJECT_ID_STEREO_PIN << OBJECT_ID_SHIFT)
679 /****************************************************/
680 /* Object Cap definition - Shared with BIOS */
681 /****************************************************/
682 #define GRAPHICS_OBJECT_CAP_I2C 0x00000001L
683 #define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L
686 #define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01
687 #define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02
688 #define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03
694 #endif /*GRAPHICTYPE */